Datasheet FDMA1025P Datasheet (Fairchild)

May 20

FDMA1025P Dual P-Channel PowerTrench

FDMA1025P
Dual P-Channel PowerTrench

–20V, –3.1A, 155m:
Features

 Max r

 Max r

 Low profile - 0.8mm maximum - in the new package MicroFET

2X2 mm

 RoHS Compliant

Free from halogenated compounds and antimony



oxides

= 155m: at VGS = –4.5V, ID = –3.1A

DS(on)

= 220m: at VGS = –2.5V, ID = –2.3A

DS(on)

PIN 1

S1 G1 D2

D1

D2

®

MOSFET

General Description

This device is designed specifically as a single package solution
for the battery charge switch in cellular handset and other ultra ­portable applications. It features two independent P-Channel
MOSFETs with low on-state resistance for minimum conduction
losses. When connected in the typical common source
configuration, bi-directional current flow is possible.

The MicroFET 2X2 package offers exceptional thermal

formance for its physical size and well suited to linear mode

per
applications.

Application

 DC - DC Conversion

S1

G1

16

1

2

2

6

D1

5

5

G2

tm

®

MOSFET

D2

3

3

D1 G2 S2

MicroFET 2X2

MOSFET Maximum Ratings T

Symbol Parameter Ratings Units

V

DS

V

GS

I

D

P

D

, T

T

J

STG

Drain to Source Voltage –20 V

Gate to Source Voltage ±12 V

Drain Current -Continuous (Note 1a) –3.1

-Pulsed –6

Power Dissipation for Single Operation (Note 1a) 1.4

Power Dissipation (Note 1b) 0.7

Operating and Storage Junction Temperature Range –55 to +150 °C

= 25°C unless otherwise noted

A

Thermal Characteristics

R

TJA

R

TJA

R

TJA

R

TJA

Thermal Resistance Single Operation, Junction to Ambient (Note 1a) 86

Thermal Resistance Single Operation, Junction to Ambient (Note 1b) 173

Thermal Resistance Dual Operation, Junction to Ambient (Note 1c) 69

Thermal Resistance Dual Operation, Junction to Ambient (Note 1d) 151

Package Marking and Ordering Information

Device Marking Device Package Reel Size Tape Width Quantity

025 FDMA1025P MicroFET 2X2 7’’ 8mm 3000 units

4

4

S2

A

W

°C/W

©2010 Fairchild Semiconductor Corporation
FDMA1025P Rev.B4

1

www.fairchildsemi.com

FDMA1025P Dual P-Channel PowerTrench

Electrical Characteristics T

= 25°C unless otherwise noted

J

Symbol Parameter Test Conditions Min Typ Max Units

Off Characteristics

BV

'BV
'T

I

DSS

I

GSS

DSS

DSS

J

Drain to Source Breakdown Voltage ID = –250PA, VGS = 0V –20 V

Breakdown Voltage Temperature
Coefficient

Zero Gate Voltage Drain Current

I

= –250PA, referenced to 25°C 14 mV/°C

D

VDS = –16V, –1

= 0V TJ = 125°C

V

GS

–100

Gate to Source Leakage Current VGS = ±12V, VDS= 0V ±100 nA

On Characteristics

V

GS(th)

'V
'T

r

DS(on)

g

FS

GS(th)

J

Gate to Source Threshold Voltage VGS = VDS, ID = –250PA –0.4

Gate to Source Threshold Voltage
Temperature Coefficient

Drain to Source On Resistance

I

= –250PA, referenced to 25°C –3.8 mV/°C

D

V

= –4.5V, ID = –3.1A 88 155

GS

= –2.5V, ID = –2.3A 144 220

GS

= –4.5V, ID = –3.1A,TJ = 125°C 121 220

V

GS

–0.9

–1.5 V

Forward Transconductance VDS = –5V, ID = –3.1A 6.2 S

Dynamic Characteristics

C

iss

C

oss

C

rss

Input Capacitance

Output Capacitance 80 105 pF

Reverse Transfer Capacitance 45 70 pF

= –10V, VGS = 0V,

V

DS

f = 1MHz

340 450 pF

Switching Characteristics

t

d(on)

t

r

t

d(off)

t

f

Q

Q

Q

g(TOT)

gs

gd

Turn-On Delay Time

Rise Time 14 26 ns

Turn-Off Delay Time 13 24 ns

V

= –10V, ID = –3.1A

DD

= –4.5V, R

V

GS

GEN

= 6:

Fall Time 816ns

Total Gate Charge at 4.5V VGS= 0V to –4.5V

Gate to Source Gate Charge 0.8 nC

V

DD

= –3.1A

I

D

= –10V

Gate to Drain “Miller” Charge 1.0 nC

510ns

3.4 4.8 nC

PA

m:V

®

MOSFET

Drain-Source Diode Characteristics

I

S

V

SD

t

rr

Q

rr

FDMA1025P Rev.B4

Maximum Continuous Source-Drain Diode Forward A

Source to Drain Diode Forward Voltage VGS= 0V, IS= –1.1A (Note 2) –0.8 –1.2 V

Reverse Recovery Time

Reverse Recovery Charge 10 15 nC

= –3.1A, di/dt = 100A/Ps

I

F

2

–1.1

17 26 ns

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Notes:

1. R

is determined with the device mounted on a 1 in2 oz. copper pad on a 1.5 x 1.5 in. board of FR-4 material. R

TJA

user's board design.

(a) R

= 86 °C/W when mounted on a 1 in2 pad of 2 oz copper, 1.5 " x 1.5 " x 0.062 " thick PCB. For single operation.

TJA

(b) R

= 173 °C/W when mounted on a minimum pad of 2 oz copper. For single operation.

TJA

(c) R

= 69oC/W when mounted on a 1 in2pad of 2 oz copper, 1.5 ” x 1.5 ” x 0.062 ” thick PCB. For dual operation.

TJA

(d) R

= 151oC/W when mounted on a minimum pad of 2 oz copper. For dual operation.

TJA

o

b)173

a)86oC/W when
mounted on a 1

2

pad of 2 oz

in
copper.

2. Pulse Test : Pulse Width < 300 us, Duty Cycle < 2.0

C/W when
mounted on a
minimum pad of 2
oz copper.

is guaranteed by design while R

TJC

o

C/W when

c)69
mounted on a 1 in
pad of 2 oz copper.

2

is determined by the

TJA

o

d)151

C/W when
mounted on a
minimum pad of 2 oz
copper.

FDMA1025P Dual P-Channel PowerTrench

®

MOSFET

FDMA1025P Rev.B4

4

www.fairchildsemi.com

FDMA1025P Dual P-Channel PowerTrench

Typical Characteristics T

6

5

4

3

VGS = -2.5V

2

, DRAIN CURRENT (A)

D

-I

1

0

0123

-VDS, DRAIN TO SOURCE VOLTAGE (V)

Figure 1.

1.6

1.4

On Region Characteristics Figure 2.

ID =-3.1A
V

= -4.5V

GS

1.2

1.0

NORMALIZED

0.8

0.6

DRAIN TO SOURCE ON-RESISTANCE

-50 -25 0 25 50 75 100 125 150

TJ, JUNCTION TEMPERATURE (oC)

V

GS

VGS = -3.5V

= 25°C unless otherwise noted

J

=-4.5V

VGS = -1.8V

PULSE DURATION = 80Ps
DUTY CYCLE = 0.5%MAX

5

PULSE DURATION = 80Ps
DUTY CYCLE = 0.5%MAX

4

VGS = -1.8V

3

2

NORMALIZED

VGS = -2.5V

VGS = -3.5V

1

DRAIN TO SOURCE ON-RESISTANCE

0

0123456

-ID, DRAIN CURRENT(A)

VGS=-4.5V

N o r m a l i z e d O n - R e s i s t a n c e

vs Drain Current and Gate Voltage

500

400

(m:)

300

, DRAIN TO

200

DS(on)

r

100

TJ= 25oC

SOURCE ON-RESISTANCE

0

23456

-VGS, GATE TO SOURCE VOLTAGE (V)

PULSE DURATION = 80Ps
DUTY CYCLE = 0.5%MAX

ID= -3.1A

TJ= 125oC

®

MOSFET

F i g u r e 3 . N o r m a l i z e d O n R e s i s t a n c e

6

5

4

3

2

, DRAIN CURRENT (A)

D

1

-I

0

1.0 1.5 2.0 2.5 3.0

FDMA1025P Rev.B4

vs Junction Temperature

PULSE DURATION = 80Ps
DUTY CYCLE = 0.5%MAX

TJ= 150oC

-VGS, GATE TO SOURCE VOLTAGE (V)

TJ= 25oC

TJ= -55oC

Figure 5. Transfer Characteristics

Figure 4.

O n - R es i s t a n c e vs G a t e t o

Source Voltage

10

VGS= 0V

1

TJ= 150oC

0.1

0.01

0.001

, REVERSE DRAIN CURRENT (A)

S

-I

0.0001

0.0 0.2 0.4 0.6 0.8 1.0 1.2

-VSD, BODY DIODE FORWARD VOLTAGE (V)

Figure 6.

S o u r ce t o D r a i n Di o d e

TJ = 25oC

TJ = -55oC

Forward Voltage vs Source Current

4

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FDMA1025P Dual P-Channel PowerTrench

Typical Characteristics T

10

ID= -3.1A

8

6

4

2

, GATE TO SOURCE VOLTAGE(V)

GS

0

-V

02468

Qg, GATE CHARGE(nC)

Figure 7.

Gate Charge Characteristics Figure 8.

20

10

1

SINGLE PULSE
T

= MAX RATED

J

=173oC/W

R

TJA

0.1

, DRAIN CURRENT (A)

-I

T

D

0.01

= 25OC

A

THIS AREA IS
LIMITED BY r

0.1 1 10

-VDS, DRAIN to SOURCE VOLTAGE (V)

VDD= -8V

DS(on)

= 25°C unless otherwise noted

J

VDD = -10V

VDD = -12V

100us

1ms

10ms

100ms

1s
10s

DC

50

1000

C

iss

C

oss

100

C

CAPACITANCE (pF)

f = 1MHz
V

= 0V

GS

10

0.1 1 10

rss

-VDS, DRAIN TO SOURCE VOLTAGE (V)

C a p a c i t a n c e v s D r a i n

to Source Voltage

100

VGS = -4.5V

10

1

), PEAK TRANSIENT POWER (W)

PK

P(

SINGLE PULSE

0.6

10-410-310-210-110010110210

t, PULSE WIDTH (s)

FOR TEMPERATURES

o

ABOVE 25

CURRENT AS FOLLOWS:

I = I

25

C DERATE PEAK

150 TA–

------------------------

125

30

®

MOSFET

TA = 25oC

3

TJA

0.01

IMPEDANCE, Z

NORMALIZED THERMAL

0.001

FDMA1025P Rev.B4

F ig ur e 9. Fo rw ar d B ia s S a fe

erating Area

Op

1

DUTY CYCLE-DESCENDING ORDER

D = 0.5

0.2

0.1

0.1

0.05

0.02

0.01

SINGLE PULSE

-4

10

-3

10

-2

10

t, RECTANGULAR PULSE DURATION (s)

Figure 11. Transient Thermal Response Curve

Figure 10.

S i n g l e P u l s e M a x i m u m

Power Dissipation

P

DM

t

1

t

NOTES:
DUTY FACTOR: D = t

PEAK TJ = PDM x Z

-1

10

0

10

TJA

5

2

1/t2

x R

+ T

TJA

A

1

10

2

10

www.fairchildsemi.com

Dimensional Outline and Pad Layout

FDMA1025P Dual P-Channel PowerTrench

®

MOSFET

FDMA1025P Rev.B4

6

www.fairchildsemi.com

TRADEMARKS

tm

®

tm

tm

The following includes registered and unregistered tradema rks and service marks, owned by Fair child Semiconductor and/ or its global subsidiaries, and is no t
intended to be an exhaustive list of all such trademarks.

AccuPower™
Auto-SPM™
Build it Now™
CorePLUS™
CorePOWER™
CROSSVOLT™
CTL™
Current Transfer Logic™
DEUXPEED
Dual Cool™
EcoSPARK
EfficentMax™
ESBC™

Fairchild
Fairchild Semiconductor
FACT Quiet Series™
FACT
FAST
FastvCore™
FETBench™
FlashWriter
FPS™

®

®

®

®

®

®

*

F-PFS™

®

FRFET
Global Power Resource
Green FPS™
Green FPS™ e-Series™
Gmax™
GTO™
IntelliMAX™
ISOPLANAR™
MegaBuck™
MICROCOUPLER™
MicroFET™
MicroPak™
MicroPak2™
MillerDrive™

®

MotionMax™
Motion-SPM™
OptiHiT™
OPTOLOGIC
OPTOPLANAR

®

®

SM

®

PDP SPM™

Power-SPM™
PowerTrench
PowerXS™
Programmable Active Droop™
QFET
QS™
Quiet Series™
RapidConfigure™

Saving our world, 1mW/W/kW at a time™
SignalWise™
SmartMax™
SMART START™
SPM
STEALTH™
SuperFET™
SuperSOT™-3
SuperSOT™-6
SuperSOT™-8
SupreMOS™
SyncFET™
Sync-Lock™

®

®

™

®

®*
The Power Franchise

TinyBoost™
TinyBuck™
TinyCalc™
TinyLogic
TINYOPTO™
TinyPower™
TinyPWM™
TinyWire™
TriFault Detect™
TRUECURRENT™*
µSerDes™

UHC
Ultra FRFET™
UniFET™
VCX™
VisualMax™
XS™

®

®

®

®

*Trademarks of System General Corporation, used under license by Fairchild Semiconductor.

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE
RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY
PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD’S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY
THEREIN, WHICH COVERS THESE PRODUCTS.

FDMA1025P Dual P-Channel PowerTrench

®

MOSFET

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE
EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION.

As used here in:

1. Life support devices or systems are devices or systems which, (a) are
intended for surgical implant into the body or (b ) support or su stain li fe,
and (c) whose failure to perform when properly used in acco rdance with
instructions for use provided in the labeling, can be reasonably

2. A critical component in any component of a life support, device, or
system whose failure to perform can be reasonably expected to cause
the failure of the life support device or system, or to affect its safety or
effectiveness.

expected to result in a significant injury of the user.

ANTI-COUNTERFEITING POLICY

Fairchild Semiconductor Corporation’s Anti-Counterfeiting Policy. Fairchild’s Anti-Counterfeiting Policy is also stated on our external website,
www.Fairchildsemi.com, under Sales Support
Counterfeiting of semiconductor parts is a growing problem in the industry. All manufact ures of semiconductor products are experien cing counterfeiting of their

parts. Customers who inadvertently purchase counterfei t par ts e xperi en ce many prob lems such a s loss of b rand rep utati on, subst anda rd p erf ormance , fa iled
application, and increased cost of product i on and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the
proliferation of counterfeit parts. Fairch ild strongly encourage s custom ers to purch ase Fairchi ld parts either directly from Fa irchild or from Authorized Fai rchild
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committed to combat this global problem and encourage o ur customers to do their p art in stopping this practice b y buying direct or from authorized dist ributors.

PRODUCT STATUS DEFINITIONS
Definition of Terms

Datasheet Identification Product Status Definition

Advance Information Formative / In Design

Preliminary First Production

No Identification Needed Full Production

Obsolete Not In Production

FDMA1025P Rev. B4

Datasheet contains the design specifications for product development. Specifications
may change in any manner without notice.

Datasheet contains preliminary data; supplementary data will be published at a later
date. Fairchild Semiconductor reserves the right to make changes at any time without
notice to improve design.

Datasheet contains final specifications. Fairchild Semiconductor reserves the right to
make changes at any time without notice to improve the design.

Datasheet contains specifications on a product that is discontinued by Fai rchild
Semiconductor. The datashe et is for reference information only.

Rev. I48

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