Fairchild 6N137 service manual

Single-Channel: 6N137, HCPL2601, HCPL2611 Dual-Channel: HCPL2630, HCPL2631 — High Speed 10MBit/s Logic Gate Optocouplers

August 2008

Single-Channel: 6N137, HCPL2601, HCPL2611
Dual-Channel: HCPL2630, HCPL2631
High Speed 10MBit/s Logic Gate Optocouplers

Features

■

Very high speed – 10 MBit/s
Superior CMR – 10 kV/µs

■

■

Double working voltage-480V

■

Fan-out of 8 over -40°C to +85°C
Logic gate output

■

■

Strobable output

■

Wired OR-open collector
U.L. recognized (File # E90700)

■

Applications

■

Ground loop elimination

■

LSTTL to TTL, LSTTL or 5-volt CMOS
Line receiver, data transmission

■

■

Data multiplexing
Switching power supplies

■

■

Pulse transformer replacement
Computer-peripheral interface

■

Description

The 6N137, HCPL2601, HCPL2611 single-channel and
HCPL2630, HCPL2631 dual-channel optocouplers
consist of a 850 nm AlGaAS LED, optically coupled to a
very high speed integrated photo-detector logic gate with
a strobable output. This output features an open collec­tor, thereby permitting wired OR outputs. The coupled
parameters are guaranteed over the temperature range
of -40°C to +85°C. A maximum input signal of 5mA will
provide a minimum output sink current of 13mA (fan out
of 8).

An internal noise shield provides superior common
mode rejection of typically 10kV/µs. The HCPL2601 and
HCPL2631 has a minimum CMR of 5kV/µs. The
HCPL2611 has a minimum CMR of 10kV/µs.

Schematics Package Outlines

N/C

1

+

2

V

F

_

3

N/C

4 5

8

7

6

V

CC

V

E

V

O

GND

+

1

V

F1

_

2

_

3

V

F2

+

4 5

8

7

6

V

CC

V

01

V

02

GND

8

Truth Table (Positive Logic)

8

1

8

1

1

Input Enable Output

6N137
HCPL2601
HCPL2611

A 0.1µF bypass capacitor must be connected between pins 8 and 5

©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.7

HCPL2630
HCPL2631

(1)

.

H H L

L H H

H L H

L L H

H NC L

L NC H

(T

Absolute Maximum Ratings

= 25°C unless otherwise specified)

A

Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.

Symbol Parameter Value Units

T

STG

T

OPR

T

SOL

EMITTER

I

F

V

E

V

R

P

I

DETECTOR

V

CC

(1 minute max)

I

O

V

O

P

O

Storage Temperature -55 to +125 °C
Operating Temperature -40 to +85 °C
Lead Solder Temperature 260 for 10 sec °C

DC/Average Forward Single Channel 50 mA
Input Current Dual Channel (Each Channel) 30
Enable Input Voltage Not to Exceed

V

by more than 500mV

CC

Single Channel 5.5 V

Reverse Input Voltage Each Channel 5.0 V
Power Dissipation Single Channel 100 mW

Dual Channel (Each Channel) 45

Supply Voltage 7.0 V

Output Current Single Channel 50 mA

Dual Channel (Each Channel) 50
Output Voltage Each Channel 7.0 V
Collector Output Single Channel 85 mW
Power Dissipation Dual Channel (Each Channel) 60

Single-Channel: 6N137, HCPL2601, HCPL2611 Dual-Channel: HCPL2630, HCPL2631 — High Speed 10MBit/s Logic Gate Optocouplers

Recommended Operating Conditions

The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.

Symbol Parameter Min. Max. Units

I

FL

I

FH

V

CC

V

EL

V

EH

T

A

NFan Out (TTL load) 8

*6.3mA is a guard banded value which allows for at least 20% CTR degradation. Initial input current threshold value
is 5.0mA or less.

©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.7 2

Input Current, Low Level 0 250 µA
Input Current, High Level *6.3 15 mA
Supply Voltage, Output 4.5 5.5 V
Enable Voltage, Low Level 0 0.8 V
Enable Voltage, High Level 2.0 V

CC

V

Low Level Supply Current -40 +85 °C

∆

/ ∆

(T

Electrical Characteristics

= 0 to 70°C unless otherwise specified)

A

Individual Component Characteristics

Symbol Parameter Test Conditions Min. Typ.* Max. Unit

EMITTER

V

B

C

V

F

DETECTOR

I

CCH

I

CCL

I

EL

I

EH

V
V

Input Forward Voltage I

F

Input Reverse Breakdown

VR

= 10mA 1.8 V

F

I

= 10µA 5.0 V

R

Voltage
Input Capacitance V

IN

T

Input Diode Temperature

A

= 0, f = 1MHz 60 pF

F

I

= 10mA -1.4 mV/°C

F

Coefficient

High Level Supply Current V

CC

V

E

= 0.5V

= 5.5V, I

Low Level Supply Current Single Channel V

Dual Channel V
Low Level Enable Current V
High Level Enable Current V
High Level Enable Voltage V

EH

Low Level Enable Voltage V

EL

= 5.5V, V

CC

= 5.5V, V

CC

= 5.5V, I

CC

= 5.5V, I

CC

T

= 25°C 1.4 1.75

A

= 0mA,

F

Single Channel 7 10 mA
Dual Channel 10 15

= 5.5V,

CC

= 10mA

I

F

= 0.5V 14 21

E

= 0.5V -0.8 -1.6 mA

E

= 2.0V -0.6 -1.6 mA

E

= 10mA 2.0 V

F

= 10mA

F

(3)

913mA

0.8 V

Single-Channel: 6N137, HCPL2601, HCPL2611 Dual-Channel: HCPL2630, HCPL2631 — High Speed 10MBit/s Logic Gate Optocouplers

Switching Characteristics

(T

= -40°C to +85°C, V

A

CC

= 5V, I

= 7.5mA unless otherwise specified)

F

Symbol AC Characteristics Test Conditions Min. Typ.* Max. Unit

T

PLH

Propagation Delay
Time to Output HIGH

= 350 Ω ,

R

L

= 15pF

C

L

(4)

(Fig. 12)

Level

T

PHL

Propagation Delay
Time to Output LOW
Level

–T

|T

PHL

| Pulse Width Distortion (R

PLH

t

Output Rise Time

r

T

A

R

L

L

R

L

(5)

= 25°C

= 350 Ω , C

= 350 Ω , C

= 350 Ω , C

= 15pF (Fig. 12) 100

L

= 15pF (Fig. 12) 3 35 ns

L

= 15pF

L

(10–90%)

t

Output Rise Time

f

R

= 350 Ω , C

L

= 15pF

L

(90–10%)

t

ELH

Enable Propagation
Delay Time to Output

I

= 7.5mA, V

F

(Fig. 13)

= 3.5V, R

EH

HIGH Level

t

EHL

Enable Propagation
Delay Time to Output

I

= 7.5mA, V

F

(Fig. 13)

= 3.5V, RL = 350Ω, CL = 15pF

EH

LOW Level

| Common Mode

|CM

H

Tr ansient Immunity
(at Output HIGH Level)

|CM

| Common Mode

L

Tr ansient Immunity
(at Output LOW Level)

TA = 25°C, |VCM| = 50V
(Peak), I
V

OH

R

L

|V

= 0mA,

F

(Min.) = 2.0V,

= 350Ω

CM

(10)

(Fig. 14)

| = 400V HCPL2611 10,000 15,000 V/µs

RL = 350Ω, IF = 7.5mA,

(Max.) = 0.8V,

V

OL

T

A

|V

(11)

= 25°C

| = 400V HCPL2611 10,000 15,000

CM

(Fig. 14)

T

= 25°C 20 45 75 ns

A

100

25 45 75 ns

(6)

(Fig. 12) 50 ns

(7)

(Fig. 12) 12 ns

= 350 Ω , C

L

L

= 15pF

(8)

(9)

20 ns

20 ns

6N137, HCPL2630 10,000 V/µs
HCPL2601, HCPL2631 5000 10,000

6N137, HCPL2630 10,000
HCPL2601, HCPL2631 5000 10,000

©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.7 3

Electrical Characteristics (Continued)

Single-Channel: 6N137, HCPL2601, HCPL2611 Dual-Channel: HCPL2630, HCPL2631 — High Speed 10MBit/s Logic Gate Optocouplers

Transfer Characteristics (T

= -40 to +85°C unless otherwise specified)

A

Symbol DC Characteristics Test Conditions Min. Typ.* Max. Unit

I

OH

V

I

FT

Isolation Characteristics (T

HIGH Level Output Current VCC = 5.5V, VO = 5.5V,

I

= 250µA, VE = 2.0V

F

LOW Level Output Current VCC = 5.5V, IF = 5mA, VE = 2.0V,

OL

I

= 13mA

CL

(2)

Input Threshold Current VCC = 5.5V, VO = 0.6V, VE = 2.0V,

I

= 13mA

OL

= -40°C to +85°C unless otherwise specified.)

A

(2)

100 µA

.35 0.6 V

3 5 mA

Symbol Characteristics Test Conditions Min. Typ.* Max. Unit

I

Input-Output Insulation

I-O

Leakage Current

V

Withstand Insulation Test

ISO

Voltage
R
C

*All Typicals at V

Notes:

1. The V
or solid tantalum capacitor with good high frequency characteristic and should be connected as close as possible
to the package V

Resistance (Input to Output) V

I-O

Capacitance (Input to Output) f = 1MHz

I-O

= 5V, TA = 25°C

CC

supply to each optoisolator must be bypassed by a 0.1µF capacitor or larger. This can be either a ceramic

CC

and GND pins of each device.

CC

2. Each channel.

3. Enable Input – No pull up resistor required as the device has an internal pull up resistor.

4. t

5. t

6. t

7. t

8. t

9. t

10. CM

11. CM

– Propagation delay is measured from the 3.75mA level on the HIGH to LOW transition of the input current

PLH

pulse to the 1.5 V level on the LOW to HIGH transition of the output voltage pulse.

– Propagation delay is measured from the 3.75mA level on the LOW to HIGH transition of the input current

PHL

pulse to the 1.5 V level on the HIGH to LOW transition of the output voltage pulse.

– Rise time is measured from the 90% to the 10% levels on the LOW to HIGH transition of the output pulse.

r

– Fall time is measured from the 10% to the 90% levels on the HIGH to LOW transition of the output pulse.

f

– Enable input propagation delay is measured from the 1.5V level on the HIGH to LOW transition of the input

ELH

voltage pulse to the 1.5V level on the LOW to HIGH transition of the output voltage pulse.

– Enable input propagation delay is measured from the 1.5V level on the LOW to HIGH transition of the input

EHL

voltage pulse to the 1.5V level on the HIGH to LOW transition of the output voltage pulse.

– The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the

H

HIGH state (i.e., V

– The maximum tolerable rate of rise of the common mode voltage to ensure the output will remain in the

L

LOW output state (i.e., V

> 2.0V). Measured in volts per microsecond (V/µs).

OUT

< 0.8V). Measured in volts per microsecond (V/µs).

OUT

12. Device considered a two-terminal device: Pins 1, 2, 3 and 4 shorted together, and Pins 5, 6, 7 and 8 shorted
together.

Relative humidity = 45%,
T

= 25°C, t = 5s,

A

V

= 3000 VDC

I-O

RH < 50%, TA = 25°C,
I

≤ 2µA, t = 1 min.

I-O

= 500V

I-O

(12)

(12)

(12)

(12)

1.0* µA

2500 V

12

10

0.6 pF

RMS

Ω

©2005 Fairchild Semiconductor Corporation www.fairchildsemi.com
6N137, HCPL2601, HCPL2611, HCPL2630, HCPL2631 Rev. 1.0.7 4