Epson S1S65010 Technical Manual

Network Camera Controller with JPEG Encorder

S1S65010

Evaluation Board Technical Manual

(S5U1S65K01H0100/S5U1S65K01H1100)

NOTICE

No part of this material may be reproduced or duplicated in a ny form or by any means without the written perm ission of Seiko Epson. Seiko Epson reserves the right to m ake changes to this m aterial without notice . Seiko Epson do es not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no repres entation or warranty that anything made in accordance with this material will be free from any pat ent or copyright infringement of a third party. This material or portions t he r eof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Law of Japan and m ay require an export li cense from the Min istry of Internat ional Trade and Industry or other approval from another government agency.

All product names mentioned herein are trademarks and/or registered trademarks of their respective owners.





Configuration of product number

Device

S1 S 65010 F 00A1 00

Evaluation Board

S5U 1S 65K01 H 1 00

x

Packing Specification Specification

Package

[F: QFP]

Model Code Product Classification 2

[S: Communication]

Product Classification 1

[S1: Semiconductor IC]

Packing Specification Board Revision

Board Code

[0: Main Board, 1: Camera Board]

1. OVERVIEW

This product, the S1S65010 Evaluation Board Kit, is for quickly building a network-accessible camera based on the Seiko Epson S1S65010 network camera chip. It consists of two main components: a main board (Product Number S5U1S65K01H0100) containing the S1S65010 and other major ICs and a camera board (Product Number S5U1S65K01H1100) for mounting a camera module.

2. COMPONENTS

2.1. Main Board (Product Number S5U1S65K01H0100)

Network camera IC: S1S65010 Flash EEPROM: 4 MB (Toshiba TC58FVM5B2ATG65) SRAM: 2 MB (Toshiba TC55VBM416AFTN) SDRAM: 16 MB (Micron MT48LC8M16A2TG-75) Ethernet interface: Support 10/100BaseT via MII

RJ45 connector ↔ TG110-LC55NC ↔ ICS1893BF JTAG debugging interface: 20-pin connector for in-circuit emulator or other debugger Camera board interface: 16/40-pin connector for camera board

2

C: Part of the camera board interface connector is used for camera control.

I

It is also connected to a serial EEPROM (BR24L56RFVM-W).

2

S: Part of the camera board interface connector is used for connecting a

I

monaural codec IC. GPIO: Part of the camera board interface connector is used for evaluating

GPIO operation. Serial interface: 10-pin RS232-C connector

Power supply voltage: 5 V ± 10%

2.2. Camera Board (Product Number S5U1S65K01H1100)



This board provides connectors for the following three CMOS camera modules.

• OmniVision OV7640 EAA (or OV7648 EAA)

• Hynix HV7131GP (HYCA3-L01)

• Fuji Film Microdevices SA2101A

Note: This board does not support simultaneous connection of multiple camera modules. The

developer must pick one of the above three.

This board includes a monaural codec IC, an AK4536 with built-in microphone and speaker amplifiers.



S1S65010 Evaluation Board Technical Manual (Rev. 1.1e)

EPSON

1

2. COMPONENTS

2.3. Block Diagram

The following figure gives block diagram for both the main and camera boards in this evaluation kit.



MINI JACK

２３２

Port

Camera Board

Monoural

Codec

Serial

EEPROM

DIP-SW

２３２

Driver

S1S65010

JTAG I/F

３２KHｚ

OSC

CMOS

Camera Module

CMOS

Camera Module

CMOS

Camera Module

10/100 PHY

25MKHｚ

OSC

Note: The developer must pick one of the three supported camera modules.

Main Board

Pulse Trans

RJ-45

Connector

Data

Bus

Flash ROM

（Max 4 MB )

SDRAM (16 MB)

SRAM

（Max 2 MB)

Buffer

CF Card

Connector

Figure 2.1. Block Diagram

  

2

EPSON

S1S65010

Evaluation Board Technical Manual (Rev. 1.1e)

3. MECHANICAL SPECIFICATIONS



3. MECHANICAL SPECIFICATIONS

The next two Figures show the layout and dimensions of the main and camera boards, respectively.



3.1. Main Board (Product Number S5U1S65K01H0100) Layout and Dimensions

Main Board Layout

and

Dimensions

Top View

C

88

L

759568

33

22

2

1

CN10

12345

SW1

9

10

CN13

1

2

Bottom View

U8

6

CN6

2

１６V４７１６V

2

SW9

1

SRAM

TC58FVM5

B2AFT65

15161

１０１６V１０１６V

CN9

CN11

４７

1

U8

S1S65K/61K

NetworkBorad2

U7

DiskOnChip

（OPTION）

U7

SW3

LED3 LED4

SW5

12

11

②

SW8

U9

CN2

①

①②

U9

MT48LC8M16A2TG- 75

1234567

SW10MODE INIT SW6

6

8

1228.64

CN4

U4

1234567

S1S65010

30.5

Screw hole

4-φ3.5

40

39

CN12

1

2

CN5CN3

U4

U12

SW4 SW7

1

34.4

CN7

8

CN1

1

ICS1893BF U12

19

1

T1

TG110-LC55N2 HALO

T1

CN7

20

SW2

12

Space for applying seal with serial number

U10

TC7MH574

U11

JP5

TC4S71F

FK

JP4

SP3232

U18

ECY

U3

PST600

U2

JP7

TC7W14

JP6

BR24L

16

FVM-W

U1

GND

uPC2933T

INOUT

Figure 3.1. Main Board (Product Number S5U1S65K01H0100) Layout and Dimensions

S1S65010 Evaluation Board Technical Manual (Rev. 1.1e)

TC58FVM5B2AF

T65

50

JP2

U15

MM1572H

U17

U6

CN8

U14

TC4S30F

JP3

U16

2

LT196

EPSON

TC74VCX16245FT

U13

1

JP1

157F

TC74VHC

U5

32.768KHz

SG-3030JF

X1

K-624-01

X2

25MHz

SG-645SCG

3

3. MECHANICAL SPECIFICATIONS

65

0

3.2. Camera Board (Product Number S5U1S65K01H1100) Layout and Dimensions

Camera Board

Layout and

Dimensions

C

Top View

L

95.0

56.0

CN５

1

23

CN７

CN8

.

58.0

CN9

12.0 12.0 12.018.5

CN10

CN3

１６V

１０

1

２

SA2101A

１６V

１０

１６V

１０

２．２

１６V

１０

１６V

１０

１６V

U9

１６V １０

1234567

１６V １０

SW5

15

1

CF CTRL

２

16

１０

MM1572H

U3

X1

25MHz

SG-645SCG

TC7W14

U1

8

１０

１６V

１０

LT1962

U7

１６V １０

MM1572H MM1572H

U6

１６V

１０

CN１

U5

1234567

SW3 SW4

CAMERAEXT

12.0

22 44

9.8

TC74VHC

SW2

05FT

U2

1

SW1

1

8

10.5

18.85

CN２

1

19

MM1572H

U4

20

LED1

1

2

SP3232EC Y

HYCA3-L01RS232C

2

９

１０

38.0

１

２

CN６

39

40

20.0

5.2

12.028.64

Bottom View

88.0

for c onnec tin g an O mniV isi on camera module

Screw hole

4-φ3.5

1

CN4

2

31

32

MIC

LINE-IN

NetworkBorad

S1S65K/61K

LINE-OUT

52.0

SP-OUT

Ｋ−６２５−０１



Figure 3.2. Camera Board (Product Number S5U1S65K01H1100) Layout and Dimensions

4

EPSON

Evaluation Board Technical Manual (Rev. 1.1e)

S1S65010

4. EXTERNAL PINS

4.1. Main Board Interface Connectors

The following Figure shows the locations of the exter nal interface connectors on the main board. The Tables in the following six subsections list their pin assignments.



1

2



CN10

12345

SW1

2

1

CN11

４７

１６V４７１６V

2

SW9

1

U8

TC58FVM5

B2AFT6 5

1

SRAM

6

S1S65K/61K

NetworkBorad2

9

10

U7

CN13

1

2

DiskOnChip （OPTION）

U7

5

SW3

CN6

2

15161

１０１６V１０１６V

CN9

LED3 LED4

12

11

SW8

SW5

U9

1234567

CN2

①②

U9

MT48LC8M16A2TG-75

8

SW10MODE INIT SW6

CN4

U4

1234567

S1S65010

40

39

CN12

1

2

CN5CN3

U4

8

U12

SW4 SW7

1

CN7

CN1

1

ICS1893BF

U12

19

20

SW2

1

T1

TG110-LC55N2

T1

HALO

CN7

4

3

7



Figure 4.1. Main Board Layout

S1S65010 Evaluation Board Technical Manual (Rev. 1.1e)

     

EPSON

5

4. EXTERNAL PINS

4.1.1. Camera Interface and Expansion Connectors

(1) GPIOD and GPIOE or CF control/monitor (CN11: XG8W-1631)

(1) in Figure 4.1

Number

Function

Number

Function

1 VDD (5 V) 2 VDD (5 V)

3 CFCE2# (GPIOD2) 4 CFCE1# (GPIOD3)

5 CFIORD# (GPIOE0) 6 CFIOWR# (GPIOE1)

7 CFIREQ (GPIOE4) 8 CFRST# (GPIOE3)

9 CFWAIT# (GPIOE2) 10 CFSTSCHG# (GPIOE5)

11 CFDEN# (GPIOE6) 12 CFDIR# (GPIOE7)

13 RESET# 14 GND

15 GND 16 GND

If the user application system does not use CF cards, the CF card interface lines are available for use as GPIOD[3:2] and GPIOE[7:0], as indicated with parentheses in the above Table.

(2) Camera interface and expansion connector (CN12: XG8W-4031)

(2) in Figure 4.1

Number

Function

Number

Function

1 GND 2 GND

3 CAMDATA0 4 CAMDATA1

5 CAMDATA2 6 CAMDATA3

7 CAMDATA4 8 CAMDATA5

9 CAMDATA6 10 CAMDATA7

11 CMCLKOUT 12 CMCLKIN

13 CMVREF 14 CMHREF

15 CAMVDD 16 CAMVDD

17 I2C_SDA 18 I2C_SCL

19 3.3V 20 3.3V

21 GPIOA0 22 GPIOA1

23

25

GPIOA2 (TXD1/SPI_SS)

GPIOA4 (SPI_MISO)

24

26

GPIOA3 (RXD1/SPI_SCLK)

GPIOA5 (SPI_MOSI)

27 GPIOA6 28 GPIOA7

29

31

33

GPIOB0 (I2S0_WS)

GPIOB2 (I2S0_SD)

GPIOB4 (Timer 1 out)

30

32

34 GPIOB5

GPIOB1 (I2S0_SCK)

GPIOB3 (I2S1_SD)

35 GPIOB6 36 GPIOB7

37 GPIOD0 38 GPIOD1

39 GND 40 GND

6

Evaluation Board Technical Manual (Rev. 1.1e)

EPSON

S1S65010

4. EXTERNAL PINS

4.1.2. Ethernet Interface (CN7: TM11R-5M2-88-LP)

(3) in Figure 4.1

Pin Number Function Pin Number Function

1 TPTXDP 2 TPTXDN

3 TPRXDP 4 NC

5 NC 6 TPRXDN

7 NC 8 NC

4.1.3. JTAG In-Circuit Emulator Interface (CN1: XG8W-2031)

(4) in Figure 4.1

Pin Number Function Pin Number Function

1 3.3 V 2 3.3 V

3 nTRST 4 GND

5 TDI 6 GND

7 TMS 8 GND

9 TCK 10 GND

11 GND 12 GND

13 TDO 14 GND

15 nSRST 16 GND

17 NC 18 GND

19 NC 20 GND



4.1.4. Serial (RS232-C) Interface (CN13: XG8W-1031)

Pin Number Function Pin Number Function

1 NC 2 RXD

3 TXD 4 NC

5 GND 6 NC

7 RTS 8 CTS

9 NC 10 NC

This layout matches that used by such PC motherboard manufacturers as ASUS and GIGABYTE.

4.1.5. Power Supply Connector (CN10: MJ-179P)

This is for connecting the AC power supply adapter included with the kit.



(5) in Figure 4.1

(6) in Figure 4.1

S1S65010 Evaluation Board Technical Manual (Rev. 1.1e)

EPSON

7

4. EXTERNAL PINS

4.1.6. CF Card Interface (CN8: M21A-50PD-SF)

Pin Number Function Pin Number Function

1 GND 2 D3 (CF_D3)

3 D4 (CF_D4) 4 D5 (CF_D5)

5 D6 (CF_D6) 6 D7 (CF_D7)

7 CE1# (CFCE1#) 8 A10 (MA10)

9 OE# (CFOE#) 10 A9 (MA9)

11 A8 (MA8) 12 A7 (MA7)

13 VCC1 (3.3V) 14 A6 (MA6)

15 A5 (MA5) 16 A4 (MA4)

17 A3 (MA3) 18 A2 (MA2)

19 A1 (MA1) 20 A0 (MA0)

21 D0 (CF_D0) 22 D1 (CF_D1)

23 D2 (CF_D2) 24 WP (NC)

25 CD2# (NC) 26 CD1# (NC)

27 D11 (CF_D11) 28 D12 (CF_D12)

29 D13 (CF_D13) 30 D14 (CF_D14)

31 D15 (CF_D15) 32 CE2# (CFCE2#)

33 VS1# (NC) 34

35

37

39 CSEL# (CSEL#) 40 VS2# (NC)

41

43 INPACK# (NC) 44 REG# (REG#)

45

47 D8 (CF_D8) 48 D9 (CF_D9)

49 D10 (CD_D10) 50 GND

IOWR#

(CFIOWR#)

RDY/BSY (CFIREQ)

RESET

(CFRST_CN)

BVD2

(BVD2/DASP)

(7) in Figure 4.1

IORD#

(CFIORD#)

36 WE# (MWE0#)

38 VCC1 (3.3V)

42

46

WAIT#

(CFWAIT#)

BVD1

(CFSTSCHG#)

The following pins are nonfunc tiona l on this eval uat ion boar d bec ause t he S1S6 5010 does n ot su pport them: VS1#, VS2#, WP, CD1#, CD2#, INPACK#, and BVD2.



8

Evaluation Board Technical Manual (Rev. 1.1e)

EPSON

S1S65010

4. EXTERNAL PINS

4.2. Camera Board Interface Connectors

The following Figure shows the locations of the exter nal interface connectors on the cam era board. The Tables in the following four subsections list their pin assignments.



10

4

CN５

1

23

CN ７

SA2101A

5

１０

２．２

１６ V

CN8

１０

１６ V

CN9

6

CN10

7

CN3

１０

１６ V

1

１６V

１０

１６V

U9

１６V １０

15

1234567

SW5

1

X1

25MHz

SG-645SCG

8

9

22 44

TC74VHC

SW2

05FT

１６V１０１６V

MM1572H MM1572H

U6

１６V１０１６V １０

1234567

CN１

１０

U5

SW3 SW4

CAMER A EXT

１６V １０

１０

１６ V

MM1572H

U3

2

LT196

U7

TC7W14

U1

U2

1

SW1

1

8

CN２

MM1572H

U4

LED1

1

2

119

20

SP3232 ECY

HYCA3- L 01RS232C

2

９

１０

１

２

CN ６

39

8

3



２

1



4.2.1. Main Board Interfaces

(1) CF control/monitor (CN3: HIF3H-16DB-2.54S)

Pin Number Function Pin Number Function

1 5 V 2 5 V

3 NC 4 NC

5 NC 6 NC

7 NC 8 NC

9 NC 10 NC

11 NC 12 NC

13 RESET# 14 GND

15 GND 16 GND

CF CTRL

16 ２

2

Figure 4.2. Camera Board Layout

40



(1) in Figure 4.2

S1S65010 Evaluation Board Technical Manual (Rev. 1.1e)

EPSON

9

4. EXTERNAL PINS

(2) Camera interface and expansion connector (CN1: HIF3H-40DB-2.54DS)

(2) in Figure 4.2

Pin Number Function Pin Number Function

1 GND 2 GND

3 CAMDATA0 4 CAMDATA1

5 CAMDATA2 6 CAMDATA3

7 CAMDATA4 8 CAMDATA5

9 CAMDATA6 10 CAMDATA7

11 CMCLKOUT 12 CMCLKIN

13 CMVREF 14 CMHREF

15 CAMVDD 16 CAMVDD

17 I2C_SDA 18 I2C_SCL

19 3.3V 20 3.3V

21 GPIOA0 22 GPIOA1

23

25

GPIOA2

(TXD1/SPI_SS)

GPIOA4

(SPI_MISO)

24

26

GPIOA3

(RXD1/SPI_SCLK)

GPIOA5

(SPI_MOSI)

27 GPIOA6 28 GPIOA7

29

31

33

GPIOB0

(I2S0_WS)

GPIOB2

(I2S0_SD)

GPIOB4

(Timer 1 out)

30

32

34 GPIOB5

GPIOB1

(I2S0_SCK)

GPIOB3

(I2S1_SD)

35 GPIOB6 36 GPIOB7

37 GPIOD0 38 GPIOD1

39 GND 40 GND

4.2.2. Serial (RS232-C) Interface (CN6: XG8W-1031)

(3) in Figure 4.2

Pin Number Function Pin Number Function

1 NC 2 RXD

3 TXD 4 NC

5 GND 6 NC

7 RTS 8 CTS

9 NC 10 NC

This layout matches that used by such PC motherboard manufacturers as ASUS and GIGABYTE.



10

Evaluation Board Technical Manual (Rev. 1.1e)

EPSON

S1S65010

4. EXTERNAL PINS

4.2.3. Audio Interface Connectors (CN7 to CN10: A2PA-3PGG)

These are for a microphone, a speaker, and line I/O.

(4) to (7) in Figure 4.2

Connector Function Note

CN7 Microphone input

CN8 Line input

CN9 Line output

CN10 Speaker output



4.2.4. Camera Module Connectors (CN2, CN4, and CN5)

This board provides three (mutually exclusive) connectors for connecting a CMOS camera module.

(8) to (10) in Figure 4.2



Location Function Product Number

CN2 HV7131GP (HYCA3-L01) 245602-020-000-829

CN4 OV7640 EAA (or OV7648 EAA) 803-93-032-10-001

CN5 SA2101A A5-44DA-2DS

     

S1S65010 Evaluation Board Technical Manual (Rev. 1.1e)

EPSON

11

5. FUNCTIONAL DESCRIPTION

Figures 5.1 and 5.2 show component locations on both sides of the main board. The following nine subsections describe their functions.

7

4

5

2

1

CN10

U8

12345

6

SW1

NetworkBorad2

9

10

CN13

1

2

CN6

2

SW9

1

SRAM

TC58FVM5

B2AF T6 5

15161

１０１６V１０１６V

CN9

CN4

CN2

SW5

12

11

①②

SW8

①②

U4

S1S65010

U4

CN11

４７

１６V４７１６V

1

U8

S1S65K/61K

U9

U7

Disk OnChip

（OPTION）

U7

SW3

LED3 LED4

MT48LC8M16A2TG-75

1234567

SW10MODE INIT SW6

8

1234567

8

3 2 1

Figure 5.1. Main Board (Top View)

U12

CN5CN3

SW4 SW7

1

CN7

40

39

CN12

1

2

CN1

1

ICS1893BF U12

19

20

SW2

1

T1

TG110-LC55N2 HALO

T1

CN7

6

U10

JP5

TC7MH574

U11

FK

TC4S71F

JP4

TC58FVM5B2AF

U18

SP3232 ECY

U3

PST600

U2

TC7W14

JP7

BR24L

16

FVM-W

U1

GND

uPC2933T

INOUT

T65

50

JP6

JP2

U15

MM1572H

U17

12 11 10 9 8

Figure 5.2. Main Board (Bottom View)

U6U13

CN8

U14

TC4S30F

JP3

JP1

U16

2

LT196

TC74VCX16245FT

U13

K-624-01

1

157F

TC74VHC

U5

SG- 3030JF

32.768KHz

X1

X2

25MHz

SG-645SCG

12

EPSON

S1S65010

Evaluation Board Technical Manual (Rev. 1.1e)

5. FUNCTIONAL DESCRIPTION

5.1. Mode Select DIP Switches (SW6)

(1) in Figure 5.1

These switches (SW6) on the main board specify the system configuration i nputs MODESEL[7: 0] described in Section 4.1 of the S1S65010 Technical Manual. The following Table summarizes their function.

Table 5.1



Number

SW6

1-16

SW6

2-15

SW6

3-14

SW6

4-13

SW6

5-12

SW6

6-11

SW6

7-10

SW6

8-9

Symbol Abbreviation

SW6 1

SW6 2

SW6 3

SW6 4

SW6 5

SW6 6

SW6 7

SW6 8

MD0

(MODESEL0)

MD1

(MODESEL1)

MD2

(MODESEL2)

MD3

(MODESEL3)

MD4

(MODESEL4)

MD5

(MODESEL5)

MD6

(MODESEL6)

MD7

(MODESEL7)

32 kHz mode Reserved (for testing)

Insert crystal oscillator stabilization interval (3 seconds)

Normal operation Reserved (for testing)

Reserved (must be 0)

SW normal operation

Application mode Monitor mode

Wired LAN connection

User setting User setting

Note: This evaluation board appropriates this S1S65010 user setting input for use in returning switches to

their factory default settings.



5.2. GPIOB DIP Switches (SW10)

Function

0 (OFF) 1 (ON)

Skip stabilization interval (10 ms)

Return switches to factory defaults

Wireless LAN connection

Note

See Note.

(2) in Figure 5.1

These switches (SW10) specify input to the corresponding GPIOB port pins: “1” for the OFF position and “0” for ON.

Table 5.2

Number

SW10

1-16

SW10

2-15

SW10

3-14

SW10

4-13

SW10

5-12

SW10

6-11

SW10

7-10

SW10

8-9

Symbol Abbreviation

0 (OFF) 1 (ON)

SW10 1 GPIOB0 Logical “1” input Logical “0” input

SW10 2 GPIOB1 Logical “1” input Logical “0” input

SW10 3 GPIOB2 Logical “1” input Logical “0” input

SW10 4 GPIOB3 Logical “1” input Logical “0” input

SW10 5 GPIOB4 Logical “1” input Logical “0” input

SW10 6 GPIOB5 Logical “1” input Logical “0” input

SW10 7 GPIOB6 Logical “1” input Logical “0” input

SW10 8 GPIOB7 Logical “1” input Logical “0” input

Function

Note

S1S65010 Evaluation Board Technical Manual (Rev. 1.1e)

EPSON

13

5. FUNCTIONAL DESCRIPTION

5.3. Hardware Reset Switch (SW3)

(3) in Figure 5.1

This switch (SW3) is available for user application systems using hardware resets.

 

5.4. CF Card CFOE#/CFRST Select Switch (SW8)

(4) in Figure 5.1

The (SW8) switch on this board configures the CFOE# and CFRST outputs to the CF card interface. The following Table describes the three configurations available.

If the user application system does n ot use CF car ds, set this to the OFF positi on. Otherwise, set as C =

c.

The default setting is OFF.

Display

Position

c

OFF NC NC

d

CFOE# (CF card input)

MOE# (S1S65010 output) CFRST (S1S65010 output)

GND RESET# (HW-RESET)

C

CFRST_CN (CF card input)

5.5. Memory Chip Select Switch (SW5)

(5) in Figure 5.1

c, C =

Notes

This board includes Flash ROM and SRAM for use as external memory. The (SW5) switch on this board configures their chip select signals. The following Table describes the three configurations available.

The default setting is

Display

Position

c

OFF NC NC

d

The following is a close-up view of the switches used in Sections 5.4 and 5.5 above. They each offer three settings:

c, d, and OFF.

c.

C

MCSB# (SRAM CS#)

MCS1# (S1S65010 output) MCS0# (S1S65010 output)

MCS0# (S1S65010 output) MCS1# (S1S65010 output)

MCSA# (Flash ROM CS#)

C

Notes

SW8

12

5.6. Connection Switch for nSRST from JTAG In-Circuit Emulator (SW2)

(6) in Figure 5.1

The (SW2) switch on this board controls the use of the nSRST signal from the JTAG in-circuit emulator as a system hardware reset signal. The default setting is ON. Change this to OFF as necessary.

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5. FUNCTIONAL DESCRIPTION

5.7. External Memory Control Signal Monitor Connector (CN9)

(7) in Figure 5.1

The 12-pin connector (CN9) on this board is for monitoring control signals for external memory mounted on this evaluation board. The following Table lists the pin assignments.

Pin Number Function Pin Number Function

1 MCS0# 2 MDQML

3 MCS1# 4 MDQMH

5 MCS2# 6 MCAS#

7 MOE# 8 MRAS#

9 MWE0# 10 MCLKEN

11 MWE1# 12 MCLK

5.8. External Memory Expansion SOLDER_JP (JP1-JP3)

(8) to (10) in Figure 5.2



This evaluation board has JP2 and JP3 soldered together because it ships with 4 MB of Flash ROM in the external memory space. JP1 permits expansion to 8 MB. The default JP1 is no connection.



Connection

Source

Connection

Target

Function

JP1 GPIOB6 MA22 GPIOB6 functions as MA22

JP2 GPIOD1 MA21 GPIOD1 functions as MA21

JP3 GPIOD0 MA20 GPIOD0 functions as MA20

Note: The firmware must configure the S1S65010 pins GPIOD0, GPIOD1, and GPIOB6 to match.



5.9. CF Card Interface SOLDER_JP (JP6, JP7)

(11) to (12) in Figure 5.2

The JP6 and JP7 SOLDER_JP on this board control the connectio n of pull-up and pull-down resistances to t his evaluation board’s CF card interface BVD2/DASP signal.



Connection

Source

JP6 BVD2/DASP Pull_Up Forces logic level “1” input for BVD2/DASP

JP7 BVD2/DASP Pull_Down Forces logic level “0” input for BVD2/DASP

Connection

Target

Function

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15

6. SPECIFICATIONS

6.1. Power Supplies

The main board uses three regulators to generate internal 3.3 V, 2.7 V, 1.8 V power supplies from the 5 V ± 10% power supply connected to CN10. The following Table lists their applications.



Table 6.1. Main Board Power Supplies

Location Part No. Application Notes

3.3 V U15 UPC2933T S1S65010 I/O circuits and other chips on board

2.7 V U17 MM1572H S1S65010 camera interface

1.8 V U16 LT1962EMS8-1.8 S1S65010 core and analog PLL

The developer must match the parts used to camera module used.



The camera board uses three regulators to generate internal power supplies for the three camera modules supported from the 5 V ±10% power supply connected to CN3 pins 1 and 2. The following Table lists their applications.



Table 6.2. Camera Board Power Supplies

Location Part No. Application Notes

2.9 V U6 MM1572KN

1.8 V U7 LT1962EMS8-1.8

2.5 V U5 MM1572FN OmniVision OV7640 EAA or OV7648 EAA

2.8 V U6 MM1572JN Hynix HV7131GP (HYCA3-L01)

Fuji Film Microdevices SA2101A

   

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S1S65010

6. SPECIFICATIONS

6.2. Current Consumption

TBD

    

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6. SPECIFICATIONS

6.3. Debugging Environment

The debugging interface (CN1) is for connecting PALMiCE or other debugger. Figure 6.1 shows the results of connecting PALMiCE; Figure 6.2, a PALMiCE system controller register readout.



Figure 6.1



Figure 6.2

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S1S65010

6. SPECIFICATIONS

 Notes on Debuggers

This kit supports the following two debuggers.

• Multi-ICE

• PALMiCE

The debugging interface (CN1) on this evaluation board is com patible with b oth. The basic load m odule is webcam.axf (ELF format) generated with the armcc (ARM compiler ADS 1.2 [Build 805]).



Table 6.3. Debugger Connections



Debugger

Connections

Evaluation

Board

PC

Load

Module

Notes

Multi-ICE JTAG Parallel port *.axf Flash ROM updates not allowed.

PALMiCE JTAG USB *.ctx Convert with dw22ctx.

For further details on basic debugger setup, Flash ROM support, etc., refer to the debugger manual, the Flash ROM data sheets, and any updates on the manufacturers’ websites.

(1) Important Notes on Using Multi-ICE

Multi-ICE cannot be used to write to the load modules to the Flash ROM on this evaluation board (Toshiba TC58FV5B2AFX65) because it supports only the following types of Flash ROM. Note that PALMiCE does not have this restriction.

Table 6.4. Flash ROM Update Support

Debugger

Sector

Format

Capacity Sample Supported Devices

128K × 32 4M DT28F320 (Intel)

Multi-ICE

256 × 2048 512K AT29C040A (ATMEL)

256 × 512 128K AT29C1024 (ATMEL)

PALMiCE Configurable Configurable Configure to match device

The Compact Flash interface (CFI) supports Intel and Fujitsu Flash ROMs. Using Multi-ICE to download to ATMEL Flash ROMs requires ch anging downloaders. In its sta ndard configuration, this debugger supports only the Intel DT28F320 and equivalents. Using Multi-ICE to debug code executed from ROM (as in this kit) requires at least one watch point unit available. Use the following procedure to modify the standard AXD settings.

(1) Boot the Multi-ICE server. (2) Boot the AXD. (3) Choose the AXD menu command “Options”|“Configure Processor” to open the configuration

panel. (4) Deselect all Vector catch check boxes. (5) Deselect the Semihosting check box. (6) Press the “OK” button to apply the new settings. Failure to modify the above settings causes writing the load module to abort with the following

message.

Error: Too many breakpoints

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6. SPECIFICATIONS

(2) Important Notes on Using PALMiCE

Use the following procedure to set up the evaluation board and PALMiCE. (1) Boot the newest version of CSIDE and specify ARM720T Rev.4 as the CPU core. (2) Choose the menu command “Target System Settings” and specify 5 MHz as the JTAG clock.

(3) Choose the menu command “Target System Settings”|“Initial Settings” and specify the m acro

file. (4) Under “Initial Settings”, specify 3500 ms as the interval to wait after leaving the reset state. (5) Under “Initial Settings”, select the “Use low-speed clock” check box and then specify 5 MHz. (6) Under “Initial Settings”, select “Port access method” and specify the judging criteria. (7) Specify Toshiba TC58FV5B2AFX65 for the Flash memory.

Note that changing the CPU core specification requires loading the PALMiCE program directly. Double-clicking on the parameter file cside.cpf provides no menu command for doing so. The following shows the screen for specifying the JTAG clock speed.

(See Figure 6.3)



Figure 6.3. Specifying 5 MHz for JTAG Clock

  

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6. SPECIFICATIONS

The following shows the dialog box for specifying the macro file and wait interval.



Figure 6.4. Initial Settings Tab



The following shows the dialog box for specifying the low-speed clock and port access method.



S1S65010 Evaluation Board Technical Manual (Rev. 1.1e)

Figure 6.5. Low-Speed Clock Settings

EPSON



21

6. SPECIFICATIONS

Macro files contain the following types of commands.

SelectJtagClock(0) // Set JTAG clock frequency to 2 kHz Outport(3,0xFFFFD014,0x000000FF) Outport(3,0xFFFFD00C,0x00000001) // Access I/O port  Outport(3,0xFFFFD018,0x00000001) // boost clock from 32 kHz to 52 MHz SelectJtagClock(5) // Set JTAG clock frequency to 5 kHz Outport(3,0xFFFF101C,0x00000005) // Initialize GPIOD0/1 as MA20/21

After the above steps, the code in the Flash ROM turns on th e PLL and starts operation with a CPU clock frequency of 50 MHz. If necessary, use the menu command “Add Flash memory” to add the a bove Flash memory to the list. The following shows the dialog box for adding Flash memory.



Figure 6.6. Initializing Evaluation Board Settings



Figure 6.7. Adding Flash Memory



Serial Debugging

Debugging is also possible over a serial cable connected to the serial port (CN16). Set the terminal emulator's baud rate to 9600. Figures 6.8 and 6.9 respectively show the serial port configuration dialog box and sample console output for Tera Term; Figures 6.10 and 6.11, the same for HyperTerminal.



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S1S65010

6. SPECIFICATIONS



Figure 6.8. Specifying Baud Rate (Tera Term)

S1S65010 Evaluation Board Technical Manual (Rev. 1.1e)

Figure 6.9. Using Tera Term

EPSON



23

6. SPECIFICATIONS



Figure 6.10. Specifying Baud Rate (HyperTerminal)



Figure 6.11. Using Hy perTerminal

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S1S65010

6. SPECIFICATIONS

Debugging of the reference code is a lso possible over a L AN cable connected t o a PC. Not e, however, that a direct connection to a PC requires a cross cable.

The following is the procedure.

1. Connect the two boards (main and camera).

2. Connect the power supply to the power supply connector.

3. Turn on the green power supply LED on the board to light.

4. Connect the kit to the PC with an Ethernet cross cable or to a hub with a straight cable.

5. Change the PC’s IP address to match the target. This evaluation board set the default IP address 192.168.1.253, so make sure that there are no

duplications of IP addresses.

We recommend the following Japanese free software for changing the PC’s IP address.

Win95 Series: KemaNet

http://www.vector.co.jp/soft/win95/net/se060975.html

Win2K Series: valhell IP config http://www.vector.co.jp/soft/winnt/net/se132582.html



6. Test the cable connection and IP address setting with the following console command.

ping 192.168.1.253

If everything is functioning correctly, there should be a response similar to the following.

----------------------------------------------- Pinging 192.168.1.253 with 32 bytes of data:

Reply from 192.168.1.253: bytes=32 time<10ms TTL=128 Reply from 192.168.1.253: bytes=32 time<10ms TTL=128 Reply from 192.168.1.253: bytes=32 time<10ms TTL=128 Reply from 192.168.1.253: bytes=32 time<10ms TTL=128

Ping statistics for 192.168.1.253: Packets: Sent = 4, Received = 4, Lost = 0 (0% loss), Approximate round trip times in milli-seconds: Minimum = 0ms, Maximum = 0ms, Average = 0ms

------------------------------------------------

7. Boot the PC’s Web browser (Internet Explorer, Netscape, etc.) If the Java plug-in has not been installed, download it from the following URL.

http://java.sun.com/getjava/ja/install-windows.html

8. Access the following address with the Web browser.

http://192.168.1.253/

9. Click on “Continuous image” on the menu screen that appears.

10. Input the user name and password, then star t capturing/monitori ng. This board shi ps with only on e user and the following default password.

User name: root

password:



S1S65010 Evaluation Board Technical Manual (Rev. 1.1e)

administrator

EPSON

25

7. IMPORTANT USAGE NOTES

(1) This kit does not support hot-plugging of CF cards. The CF card must be in place when the power

is first applied. The firmware assumes that it is always in place.

              



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8. PARTS LISTS

8.1. Main Board Parts

The following Table lists the major parts on the main board—that is, all parts except resistors and capacitors.

Table 8.1. Main Board Parts

Unit

PART NO. PART NAME STANDARD Q'TY

PCB K-624-01 MINICOM 1 U4 NETCAM CHIP S1S65010 (144pinQFP) EPSON 1 U6 FROM TC58FVM5B2AFT65(48pinTSOP) Toshiba 1 U8 SRAM TC55VBM416AFTN (48pinTSOP) Toshiba 1

5 U9 SDRAM MT48LC8M16A2TG-75 (54pinTSOP) MICRON 1 U12 10/100 PHYSICAL ICS1893BF (48pinTSOP) ICS 1 U1 SERIAL ROM BR24L16RFVM-W (MSOP8) Rohm 1 U3 Reset IC PST600K (2.5V MMP3A) Mitsumi 1 U13 Bus driver TC74VCX16245FT (48pinTTSOP) Toshiba 1 10 U15 Regulator uPC2933T (3.3V) NEC 1 U16 LT1962EMS8-1.8 (MS8) Linear Technology 1 U17 MM1572H(2.7V 5pin SOT-25A) Mitsumi 1 U18 RS232C driver SP3232ECY (16pinTSSOP) SIPEX 1 U2 Logic IC TC7W14F Toshiba 1 15 U5 TC74VCX157FT Toshiba 1 U10 TC7MH574FK Toshiba 1 U11 TC4S71F Toshiba 1 U14 TC4S30F Toshiba 1

20 X1 OSC SG-3030JF(32.768KHz) EPSON 1 X2 OSC

T1 Puls transformer TG110-LC55N2 HALO 1 CN7 RJ45 connector TM11R-5M2-88-LP Hirose 1 CN10 Power supply connector MJ-179P Marushin Musen 1 25 CN2,CN3,CN4,CN5 Pin header HW-2P-G Mac Eight 4 CN6 HWW-4PW-G (No positioning pin) Mac Eight 1 CN9 HWW-6PW-G (No positioning pin) Mac eight 1 CN13 XG8W-1031 OMRON 1 CN11 XG8W-1631 OMRON 1 30 CN1 XG8W-2031 OMRON 1 CN12 XG8W-4031 OMRON 1 CN11 CF card connector MI21A-50PD-SF Hirose 1 SW1 Tactile switch B3FS-1000 OMRON 1 SW2,SW3,SW6 DIP switches CHS-08B COPAL 2 35 CHS-06B COPAL 1 CHS-01A1 COPAL 4 CS-4-22YA COPAL 2 ∆ ∆ Created DWG.G 2004.6.16 Approved by APP CHK DWG ∆ ∆

∆ ∆

Corrections

∆

SG-645SCG (25MHｚ)

EPSON 1

price

PARTS LIST

NOTES



S1S65010 Evaluation Board Technical Manual (Rev. 1.1e)

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27

8. PARTS LISTS

8.2. Camera Board Parts

The following Table lists the major parts on the camera board—t hat is, all parts except resistors and capacitors.

Table 8.2. Camera Board Parts

PART NO.

Bare board K-625-01 MINICOM 1

U1 IC U2 TC74VHC05FT Toshiba 1

U4 TC4S30F Toshiba 1

U8 U3 MM1572FN(2.5V 5pin SOT-25A) Mitsumi 1 U5 MM1572JN(2.8V 5pin SOT-25A) Mitsumi 1 U6 MM1572KN(2.9V 5pin SOT-25A) Mitsumi 1

U7

U9

SW2, SW1 Switch CHS-01A1 Copal 2 SW3, SW5 CHS-08B Copal 2 SW4 CHS-02B Copal 1

CN1 Connector HIF3H-40DB-2.54DS Hirose 1 CN3 HIF3H-16DB-2.54DS Hirose 1 CN6 XG8W-1031 OMRON 1 CN4 803-93-032-10-001 Presidip 1 CN5 A3-44DA-2DS Hirose 1 CN2 245602-020-000-829 Kyosera 1 CN7, CN8, CN9, CN10 Mini jack A2PA-3PGG Sengoku Densho 4 FL1 Filter BNX002-01 Murata 1 LED1, LED2, LED3, LED4,

LED5, LED6, LED7, LED8 LED PG1101W(Green) Stanley 8 X1 OSC SG-645SCG(12.288MHz) EPSON 1 R24 Chip resistor RK73Z1JTD0(0Ω) KOA 1

∆ ∆ created DWG.G 2004.7.1 Approved by APP CHK DWG

∆ ∆

Corrections

∆

PART

NAME

STANDARD Q'TY

TC7W14F(SOP8-P1.27)

SP3232ECY(16pinTSSOP)

LT1962EMS8-1.8(MS8) AK4536VN(28pinQFN)

Toshiba 1

SIPEX 1

Linear Technology 1

Akai 1

Unit

price

NOTES

PARTSLIST



  

28

EPSON

Evaluation Board Technical Manual (Rev. 1.1e)

S1S65010

9. MISCELLANEOUS

The following Figure shows this kit with a camera module.



Figure9.1.Camera Board with OV7640 Module

 

S1S65010 Evaluation Board Technical Manual (Rev. 1.1e)

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29

9. MISCELLANEOUS

   

30

Evaluation Board Technical Manual (Rev. 1.1e)

EPSON

S1S65010

AMERICA

EPSON ELECTRONICS AMERICA, INC. HEADQUARTERS

150 River Oaks Parkway San Jose, CA 95134, U.S.A. Phone: +1-800-228-3964 FAX: +1-408-922-0238

SALES OFFICES West

1960 E.Grand Avenue Flr 2 El Segundo, CA 90245, U.S.A. Phone: +1-800-249-7730 FAX: +1-310-955-5400

Central

101 Virginia Street, Suite 290 Crystal Lake, IL 60014, U.S.A. Phone: +1-800-853-3588 FAX: +1-815-455-7633

Northeast

301 Edgewater Place, Suite 210 Wakefield, MA 01880, U.S.A. Phone: +1-800-922-7667 FAX: +1-781-246-5443

Southeast

3010 Royal Blvd. South, Suite 170 Alpharetta, GA 30005, U.S.A. Phone: +1-877-332-0020 FAX: +1-770-777-2637

EUROPE

EPSON EUROPE ELECTRONICS GmbH HEADQUARTERS

Riesstrasse 15 80992 Munich, GERMANY Phone: +49-89-14005-0 FAX: +49-89-14005-110

DÜSSELDORF BRANCH OFFICE

Altstadtstrasse 176 51379 Leverkusen, GERMANY Phone: +49-2171-5045-0 FAX: +49-2171-5045-10

FRENCH BRANCH OFFICE

1 Avenue de l’ Atlantique, LP 915 Les Conquerants Z.A. de Courtaboeuf 2, F-91976 Les Ulis Cedex, FRANCE Phone: +33-1-64862350 FAX: +33-1-64862355

BARCELONA BRANCH OFFICE Barcelona Design Center

Edificio Testa, C/Alcalde Barnils 64-68, Modulo C 2a planta E-08190 Sant Cugat del Vallès, SPAIN Phone: +34-93-544-2490 FAX: +34-93-544-2491

UK & IRELAND BRANCH OFFICE

8 The Square, Stockley Park, Uxbridge Middx UB11 1FW, UNITED KINGDOM Phone: +44-1295-750-216/+44-1342-824451 FAX: +44-89-14005 446/447

Scotland Design Center

Integration House, The Alba Campus Livingston West Lothian, EH54 7EG, SCOTLAND Phone: +44-1506-605040 FAX: +44-1506-605041

International Sales Operations

ASIA

EPSON (CHINA) CO., LTD.

23F, Beijing Silver Tower 2# North RD DongSanHuan ChaoYang District, Beijing, CHINA Phone: +86-10-6410-6655 FAX: +86-10-6410-7320

SHANGHAI BRANCH

7F, High-Tech Bldg., 900, Yishan Road, Shanghai 200233, CHINA Phone: +86-21-5423-5522 FAX: +86-21-5423-5512

EPSON HONG KONG LTD.

20/F., Harbour Centre, 25 Harbour Road Wanchai, Hong Kong Phone: +852-2585-4600 FAX: +852-2827-4346 Telex: 65542 EPSCO HX

EPSON TAIWAN TECHNOLOGY & TRADING LTD.

14F, No. 7, Song Ren Road, Taipei 110 Phone: +886-2-8786-6688 FAX: +886-2-8786-6677

HSINCHU OFFICE

No. 99, Jiangong Road, Hsinchu City 300 Phone: +886-3-573-9900 FAX: +886-3-573-9169

EPSON SINGAPORE PTE., LTD.

401 Commonwealth Drive, #07-01 Haw Par Technocentre, SINGAPORE 149598 Phone: +65-6586-3100 FAX: +65-6472-4291

SEIKO EPSON CORPORATION KOREA OFFICE

50F, KLI 63 Bldg., 60 Yoido-dong Youngdeungpo-Ku, Seoul, 150-763, KOREA Phone: +82-2-784-6027 FAX: +82-2-767-3677

GUMI OFFICE

6F, Good Morning Securities Bldg., 56 Songjeong-Dong, Gumi-City, Seoul, 730-090, KOREA Phone: +82-54-454-6027 FAX: +82-54-454-6093

- JAPAN -

SEIKO EPSON CORPORATION SEMICONDUCTOR OPERATIONS DIVISION

IC Sales Dept. IC International Sales Group

421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN Phone: +81-42-587-5814 FAX: +81-42-587-5117

In pursuit of “Saving” Technology, Epson electronic devices.

Our lineup of semiconductors, displays and quartz devices

assists in creating the products of our customers’ dreams.

Epson IS energy savings.

S1S65010

Evaluation Board Technical Manual

SEIKO EPSON CORPORATION

SEMICONDUCTOR OPERATIONS DIVISION

EPSON Electronic Devices Website

http://www.epsondevice.com/

Document code: 410080300

First issue February, 2005

Printed in Japan