No part of this material may be reproduced or duplicated in any form or by any means without the written
permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material
or due to its application or use in any product or circuit and, further, there is no representation that this material is
applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any
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All other product names mentioned herein are trademarks and/or registered trademarks of their respective
companies.
12. CHARACTERISTIC DATA .............................................................................................................27
12.1 S1F76980F0C000* Characteristic Data ................................................................................27
S1F76980 Technical Manual (Rev.1.0) EPSONi
Page 5
1. DESCRIPTION
1. DESCRIPTION
The S1F76980 series is a low consumption current power supply input control IC, which monitors the voltage
of 3-system input power supply and is capable of continuously switching power supply of the system selected in
the priority sequence in the IC. For operations below the operating voltage, the product also guarantees
operations in reduced power mode by setting the output level of the control signal to Hi-Z.
The use of this IC decreases voltage drop, if the Pch power MOS transistor is used as a switch for a
conventional diode circuit, and contributes to the battery life extension. If the result of monitoring the output
voltages shows the voltage higher than that set externally, the voltage limiter circuit operates and provides
measures against overvoltage after output stage.
The package is QFN4-24.
This IC is most suitable for power input control circuit of portable device that is used by switching 3-system
input power.
2. FEATURES
• Consumption current : Typ. 20µA (VCC=0V, VBUS=0V, VBAT=2.5V, 25°C)
Max. 40µA (V
Typ. 0.1µA (V
CC=0V, VBUS=0V, VBAT=2.5V, -30°C to +85°C)
CC=0V, VBUS=0V, VBAT=2.5V, POWER switch OFF, 25°C)
• Operating voltage : 0 to 6.5V (Absolute maximum rating - 0.3 to 9.0V)
(The output level of control signal is forced to be Hi-Z under the output
guarantee voltage.)
• Temperature characteristics : Typ. ±100ppm/°C
• Built-in power monitoring circuit (V
CC, VBUS) :
Detecting voltage 2.0 to 6.3V (Aluminum option: 0.1V steps)
Hysteresis width: 0.05 to 1.00V (Aluminum option: 0.05V steps)
Accuracy: Set voltage ±3.0%
• Built-in power monitoring circuit (V
BAT):
Detecting voltage 1.6 to 4.3V (Aluminum option: 0.1V steps)
Hysteresis width: 0.1 to 2.1V (Aluminum option: 0.1V steps)
Accuracy: Set voltage ±3.0%
• Built-in power-on detecting circuit, voltage limiter circuit for preventing output overvoltage, and power
input control logic circuit.
• Operating temperature : -30°C to +85°C
• Package : QFN4-24P(4×4×0.85mm)
• This IC is neither designed for strong radiation activity proof nor light resistance.
(Note 1) For detecting voltage (-*DET) and release voltage (+*DET), those other than the above table are also
available.
S1F76980 Technical Manual (Rev.1.0) EPSON1
Page 6
4. BLOCK DIAGRAM
4. BLOCK DIAGRAM
VBAT
VBUS
VCC
VCC
BSEL
V
IQ
CUDLY
ONOFSW
CSFT
V
PSW
CBDLY
TM3
VDD
V
BUS
BAT
SS
Power
switching circuit
Reference
voltage
generator
Power
voltage
monitoring
circuit
(V
CC)
Power
voltage
monitoring
circuit
(V
BUS)
Power
voltage
monitoring
circuit
(V
BAT)
Power-on
reset
circuit
Fig.4.1 Block diagram
S1F76980
Switching
control
circuit
OC1
OC2
OU1
OU2
OB1
OB2
OUT
V
FB
CDET
UDET
BDET
2 EPSONS1F76980 Technical Manual (Rev.1.0)
Page 7
5. DESCRIPTION OF BLOCK DIAGRAM
5. DESCRIPTION OF BLOCK DIAGRAM
(1) Power voltage monitoring circuit (VCC, VBUS, VBAT)
This circuit monitors input voltage of each power supply pin and detects low voltage. Leaving hysteresis width
prevents output from becoming unstable (oscillating) when low voltage is detected.
Moreover, the IC contains a circuit to guarantee the voltage monitoring result below the operating voltage.
(2) Power switching circuit
This circuit selects a power supply (V
(3) Reference voltage generator
This circuit generates reference voltage and reference current necessary in this IC.
(4) Power-on reset circuit
This circuit generates IC initialization signal until the internal power supply of the IC (V
(5) Switching control circuit
This circuit controls output of a signal that selects optimum input power supply according to input conditions of
three power supplies (V
BUS and VBAT can also be switched during operation, using the external pin BSEL.
V
CC, VBUS, and VBAT) and in the priority sequence set in the IC. The priority sequence of
DD) used in the IC from three power supplies (VCC, VBUS and VBAT).
ONOFSW I 2 Power switching operation select pin. H: ON-ON switching, L: OFF-OFF switching
PSW I 15 VBAT power supply switch pin H: OFF, L: ON (normally fixed at LOW)
BSEL I 4 Used to set the priority sequence of VBUS and VBAT. H:VBUS, L:VBAT
FB I 13
CBDLY O 16
CUDLY O 20
CSFT O 23 Pin used to connect the soft start time setting capacitor
CDET O 24
UDET O 21
BDET O 18
OC1 O 6
OC2 O 7 VCC (adapter) power supply output-side control pin. L: Switch ON, H: Switch OFF
OU1 O 9
OU2 O 10 VBUS (USB) power supply output-side control pin. L: Switch ON, H: Switch OFF
OB1 O 12
OB2 O 11 VBAT (battery) power supply output-side control pin. L: Switch ON, H: Switch OFF
Pin
No.
Feedback input pin.
If measures against overvoltage are taken after output stage, feed back voltage at
an appropriate voltage dividing ratio.
If it is not necessary to take measures against overvoltage, pull down.
Pin used to connect the V
capacitor
Pin used to connect the V
capacitor
Output pin used to monitor the V
On Nch open drain output L: Input enabled, Hi-Z: Input disabled
Output pin used to monitor the V
On Nch open drain output L: Input enabled, Hi-Z: Input disabled
Output pin used to monitor the V
On Nch open drain output L: Input enabled, Hi-Z: Input disabled
CC (adapter) power supply input-side control pin. L: Switch ON, H: Switch OFF
V
To take measures against overvoltage, operate an external MOS transistor as a
regulator.
BUS (USB) power supply input-side control pin. L: Switch ON, H: Switch OFF
V
To take measures against overvoltage, operate an external MOS transistor as a
regulator.
BAT (battery) power supply input-side control pin. L: Switch ON, H: Switch OFF
V
To take measures against overvoltage, operate an external MOS transistor as a
regulator.
BAT-system low voltage detection dead time setting
BUS-system low voltage release delay time setting
• Power Supply Pin
Pin Name I/O
VCC I 1 VCC (adapter) power supply input-side pin.
VBUS I 22 VBUS (USB) power supply input-side pin.
VBAT I 14 VBAT (battery) power supply input-side pin.
VOUTI 5 3-system select power supply output-side pin.
VSS I 8 GND pin.
VDDO 3 Pin used to connect the smoothing capacitor in the IC.
Pin
No.
• Test pin
Pin Name I/O
TM3 I 19 Normally fixed to LOW.
IQ I 17 Normally fixed to LOW.
Pin
No.
Function
CC (adapter) power supply input voltage.
BUS (USB) power supply input voltage.
BAT (battery) power supply input voltage.
Function
Function
S1F76980 Technical Manual (Rev.1.0) EPSON5
Page 10
8. FUNCTIONAL DESCRIPTION
8. FUNCTIONAL DESCRIPTION
8.1 Operation Description
The S1F76980 series is a low consumption current power supply input control IC, which monitors the voltage
of 3-system input power supply and is capable of continuously switching power supply of the system selected in
the priority sequence in the IC. The voltage limiter function of output voltage is included in the switching
control circuit to control the output voltage V
of an external resistor. For operations below the operating voltage, the function also guarantees operations in
reduced power mode by setting the output level of the control signal to Hi-Z.
8.2 Power Voltage Monitoring Circuit (VCC, VBUS, VBAT)
This circuit monitors input voltage of each power supply pin and detects low voltage. It inputs the dividing
voltage (V
REF) generated in the IC to the comparator for detecting voltage. The comparator detects a potential
(V
difference between V
possible defective condition due to power noise or the like.
In the example below, the detecting voltage (-V
with input voltage raised are set using the following formulas:
Detecting voltage: -V
Release voltage: +V
The power line is equipped with an output guarantee circuit that turns the power off when the voltage drops to
below the output guarantee voltage and forces to set the *DET (*=C/U/B) pin to Hi-Z by fixing the XOFF
signal to LOW
Fig.8.2.1 shows the V
Fig.8.2.2 shows the V
Fig.8.2.3 shows the V
REG) of the resistors R1, R2, and R3 connected between power supplies and the reference voltage
REG and VREF even if it is inappreciable; therefore, a hysteresis circuit is added to avoid a
DET = (R2 + R3) / R3) x VREF (Formula 8.2.1)
DET = (R1 + R2 + R3 / R3) x VREF (Formula 8.2.2)
CC power voltage monitoring circuit.
BUS power voltage monitoring circuit.
BAT power voltage monitoring circuit.
The power is turned off when the voltage is below the
VCC
Output
guarantee
output guarantee voltage.
R1
R2
VREG
R3
Fig.8.2.1 Block diagram for V
OUT not to exceed the set voltage, using the voltage dividing ratio
DET) with input voltage lowered and the release voltage (+VDET)
CDET
+
CMP
-
V
REF
XOFF
CC power voltage monitoring circuit
6 EPSONS1F76980 Technical Manual (Rev.1.0)
Page 11
8. FUNCTIONAL DESCRIPTION
Y
VBUS
Output
guarantee
Fig.8.2.2 Block diagram for V
(Note 2) The release time may be specified by external capacitor only for the V
monitoring. The recommended value of the capacitor is approximately 50ms for 6800pF.
Release delay setting time TUDLY [ms] = Set coefficient (7353) × C [µF]
In case of the recommended C=6800[pF], the release delay time is TUDLY=50[ms].
The power is turned off when the voltage is below the
output guarantee voltage.
R1
R2
+
CMP
-
BUS power voltage monitoring circuit
XOFF
R3
VREG
V
REF
Typ.
UDET
(Note 2)
CUDL
BUS-system power voltage
S1F76980 Technical Manual (Rev.1.0) EPSON7
Page 12
8. FUNCTIONAL DESCRIPTION
Y
VBAT
Output
guarantee
PSW
(Note 3)
Fig.8.2.3 Block diagram for V
(Note 3) The power switch built in the output guarantee circuit may be turned ON/OFF by the PSW pin only for
BAT-system power supply.
the V
(Note 4) The detecting voltage dead time of power voltage monitoring may be specified by external capacitor
only for the V
for 6800pF. However, when the voltage is temporarily below the output guarantee voltage, low voltage
is detected even during the dead time.
For detecting voltage = 1.6V, detecting voltage dead setting time TBDLY [S] = Set coefficient (147) × C [µF]
In case of the recommended C=6800[pF], the release delay time is TBDLY=1[S].
For detecting voltage = 2.8V, detecting voltage dead setting time TBDLY [S] = Set coefficient (250) × C [µF]
In case of the recommended C=6800[pF], the release delay time is TBDLY=1.7[S].
The power is turned off when the voltage is below the
output guarantee voltage.
R1
R2
+
VREG
R3
XOFF
BAT-system power supply. The recommended value of the capacitor is approximately 1s
V
REF
CMP
-
BAT power voltage monitoring circuit
BDET
(Note 4)
CBDL
Typ.
Typ.
8 EPSONS1F76980 Technical Manual (Rev.1.0)
Page 13
8. FUNCTIONAL DESCRIPTION
8.3 Switching Control Circuit
This circuit controls output of a signal that selects optimum input power supply according to input conditions of
three power supplies (V
(1) Power input control logic
(Note 5) The priority sequence may be changed with the BSEL pin.
It can be switched even during operation of IC.
(Note 6) L: Input disabled, H: Input enabled
(2) Switch configuration
Fig.8.4.1 shows the configuration diagram of power supply selection switches, that are configured outside the
IC.
The O*1 (OC1, OU1, and OB1) pin performs over voltage limiter control while the O*2 (OC2, OU2, and OB2)
pin controls backflow prevention.
OC1
OC2
CC, VBUS, and VBAT) and in the priority sequence set in the IC.
VCC
L L L OFF
L L H
L H L
L H H ()
H L L
H L H
H H L
H H H
VCC
VBUS
OU1
OU2
VBUS
VBAT
VOUT
Output selection system
VBAT
OB1
OB2
VOUT
Fig.8.4.1 Switch configuration
S1F76980 Technical Manual (Rev.1.0) EPSON9
Page 14
8. FUNCTIONAL DESCRIPTION
(3) Power-on operation
Fig.8.4.2 shows an example of power-on operation from the initial state at power-on to the power selection.
State A State BState C
VBAT power-on
Description of each state
State A: Input power not selected.
BAT input enabled, backflow potential between input power supply (VBAT) and VOUT
{: V
BAT input enabled, elimination of backflow potential between input power supply (VBAT) and VOUT (Typ.
|: V
19mV)
BAT input disabled
}: V
Fig.8.4.2 State transition at V
BAT power-on
10 EPSONS1F76980 Technical Manual (Rev.1.0)
Page 15
8. FUNCTIONAL DESCRIPTION
(4) Power supply switching operation 1 (OFF-OFF switching)
Fig.8.4.3 shows an example of power supply switching operation 1 on connection / disconnection of power
supply with a higher priority level.
State C State B State E
State AState D
Description of each state
State A: Input power not selected.
CC & VBAT input enabled, elimination of backflow potential between input power supply (VCC) and VOUT
|: V
(Typ. 19mV)
CC & VBAT input enabled, backflow potential between input power supply (VCC) and VOUT
}: V
CC input disabled, VBAT input enabled
~: V
CC input disabled, VBAT input enabled, elimination of backflow potential between input power supply
: V
BAT) and VOUT (Typ. 19 mV)
(V
CC input disabled, VBAT input enabled, backflow potential between input power supply (VBAT) and VOUT
: V
Fig.8.4.3 V
BAT⇔ VCC power supply switching state transition 1
S1F76980 Technical Manual (Rev.1.0) EPSON11
Page 16
8. FUNCTIONAL DESCRIPTION
(5) Power supply switching operation 2 (ON-ON switching)
Fig.8.4.4 shows an example of power supply switching operation 2 on connection / disconnection of power
supply with a higher priority level.
State C State B State E
Description of each state
State A: Input power not selected.
CC & VBAT input enabled, elimination of backflow potential between input power supply (VCC) and VOUT
|: V
(Typ. 19mV) (TBD)
CC & VBAT input enabled, backflow potential between input power supply (VCC) and VOUT
}: V
CC input disabled, VBAT input enabled
~: V
CC input disabled, VBAT input enabled, elimination of backflow potential between input power supply
: V
BAT) and VOUT
(V
CC input disabled, VBAT input enabled, backflow potential between input power supply (VBAT) and VOUT
: V
CC & VBAT input enabled, elimination of backflow potential between input power supply (VCC) and VOUT
: V
(Typ. 19mV), simultaneous ON-time (Typ. 800µs) lapse
CC & VBAT input enabled, backflow potential between input power supply (VCC) and VOUT (Typ . 19mV),
: V
simultaneous ON-time (Typ.800µs) lapse
Fig.8.4.4 V
(Note 7) For ON-ON switching, input power supply is temporarily shorted. We recommend OFF-OFF
switching, however, use ON-ON switching on your own authority after carefully evaluating the
switching in the set if you want to minimize voltage drop when switching power supply. SEIKO
EPSON, however, shall not be liable for any defective conditions or the like due to backflow to input
power supply caused by ON-ON switching.
(Note 8) Combining the V
BAT priority (BSEL=LOW) pin with the ON-ON switching (ONOFSW=HIGH) pin
generates abnormal output waveforms at switching; therefore, this combination should be avoided to
output normal waveforms.
BAT⇔ VCC power switching state transition 2
S1F76980 Technical Manual (Rev.1.0) EPSON13
Page 18
8. FUNCTIONAL DESCRIPTION
(6) Overvoltage limiter control
If measures against overvoltage are required after output stage of V
resistance to the FB pin. To set the V
OUT voltage, refer to the formula below. Set so that the total resistance of
RFB1 + RFB2 is between 1 and 10 MegΩ .
OUT=VREF x ((RFB1+RFB2)/RFB2)
V
Incoming current can be prevented by connecting a capacitor for setting the soft start time to the CSFT pin as
measures against incoming current at cold start (no charge in the V
can be obtained from the following formula.
Typ.
Soft start setting time TSFT [ms] = Set coefficient (70) × C [µF]
For recommended C = 0.01 [µF], soft start time: TSFT = 0.7 [ms]
VCC
VREF = 1.05V
+
AMP
-
OC1
SFT
OC2
CSFT
CSFT
VOUT
RFB1
FB
RFB2
Fig.8.4.4 Overvoltage limiter circuit diagram
OUT, feed back and input voltage divided by
OUT smoothing capacitor). The setting time
VBUS
OU1
OU2
OB1
OB2
VOUT
VBAT
14 EPSONS1F76980 Technical Manual (Rev.1.0)
Page 19
8. FUNCTIONAL DESCRIPTION
p
p
r
8.4 Recommended IC Protection Circuit
The following external circuits for protection of IC are recommended.
(1) Measures against reverse insertion of V
Reverse insertion of power supply causes an IC breakage. Using the following external circuit configuration
prevents an IC breakage.
VBAT(+)+3V
VCC(+)-3V
VCC
Back-flow
revention
VBAT(-)
VSS
CC(-)
V
Fig.8.5.1 V
CC power supply reverse-insertion support circuit
(2) Measures against input power supply floating
Causing the floating state by removing the input power supplies (V
and reach the midpoint potential. This state is not effective for the IC, so we recommend that the IC be
connected to a discharge resistor. The recommended resistance value is between 1 and 2.2 MegΩ. If a lower
resistance is required depending on setting conditions, however, determine the appropriate value after careful
evaluation.
CC power supply
OC1
OC2
VOUT
FB
Current
limite
OFF
OFF
CC, VBUS, and VBAT) may eliminate the load
OB1
OB2
Back-flow
revention
VOUT
ON
ON
S1F76980 Technical Manual (Rev.1.0) EPSON15
Page 20
9. ELECTRICAL CHARACTERISTICS
9. ELECTRICAL CHARACTERISTICS
9.1 Absolute Maximum Ratings
Item Symbol
Input power voltage VIN VSS-0.3 9.0 V
Input pin voltage 1 VI1 VSS-0.3 VBAT+0.3V BSEL -
Input pin voltage 2 VI2 VSS-0.3 9.0 V PSW, IQ
Input pin voltage 3 VI3 VSS-0.3 VDD+0.3V ONOFSW (Note 9)
Output voltage VO VSS-0.3 9.0 V
IOX1
Output current
Allowable dissipation Pd
Operating temperature Topr -30 85 °C
Storage temperature Tstg -55 150 °C
Soldering temperature and timeTsol
IOX2
IXDET
(Note 9) V
DD provides the power supply with VCC, VBUS and VBAT set to the highest power level.
(Note 10) Do not externally apply the voltage to the output pin.
(Note 11) Using with a condition exceeding the above absolute maximum rating may result in malfunction or
unrecoverable damage. Moreover, normal function may be achieved temporarily but its reliability
may be significantly low.
Rated value
Min. Max.
-
-
100 mA OC2, OU2, OB2
-
10 mA CDET, UDET, BDET
-
550 mW
-
260x10 °Cxs
10 mA OC1, OU1, OB1
Unit Applicable pin Remarks
V
CC, VBUS, VBAT,
V
OUT
OC1, OC2, OU1,
OU2, OB1, OB2,
CDET, UDET, BDET
-
-
-
-
-
-
-
-
-
-
-
-
-
-
16 EPSONS1F76980 Technical Manual (Rev.1.0)
Page 21
9. ELECTRICAL CHARACTERISTICS
9.2 Recommended Operating Conditions
Item Symbol
VCC 0.0 - 6.5 V
Input voltage
Output voltage
Smoothing capacitor
Dead time setting
capacitor
Release time setting
capacitor
Soft start setting
capacitor
Pull-up resistor
Pull-down resistor
Total feedback
resistor
External MOS FET MOS
VBUS 0.0 - 6.5 V
VBAT 0.0 - 6.5 V
V
OUT 0.0
OX1 0.0 - 6.5 V OC1, OU1, OB1
OX2 0.0 - 6.5 V OC2, OU2, OB2