Page 1
S1F76640
Technical Manual
Rev.1.5
Page 2
NOTICE
No part of this material may be reproduced or duplicated in any form or by any means without the written
permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material
or due to its application or use in any product or circuit and, further, there is no representation that this material
is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to
any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty
that anything made in accordance with this material will be free from any patent or copyright infringement of a
third party. This material or portions thereof may contain technology or the subject relating to strategic
products under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export
license from the Ministry of International Trade and Industry or other approval from another government
agency.
All other product names mentioned herein are trademarks and/or registered trademarks of their respective
companies.
©SEIKO EPSON CORPORATION 2007, All rights reserved.
Page 3
Configuration of product number
!DEVICES
S1 F 76640 M 0C0 000
Packing specifications
Specifications
Shape
(M:SOP, SSOP)
Model number
Model name
(F : Power Supply)
Product classification
(S1:Semiconductors)
Page 4
Page 5
CONTENTS
1. DESCRIPTION........................................................................................................................................1
2. FEATURES..............................................................................................................................................1
3. BLOCK DIAGRAM................................................................................................................................2
4. PIN DESCRIPTION................................................................................................................................3
4.1 Pin Assignment............................................................................................................................................3
4.2 Pin Functions ...............................................................................................................................................4
5. FUNCTIONAL DESCRIPTION............................................................................................................5
6. ELECTRICAL CHARACTERISTICS.................................................................................................8
6.1 Absolute Maximum Ratings........................................................................................................................8
6.2 Recommended Operating Conditions..........................................................................................................9
6.3 Electrical Characteristics............................................................................................................................10
6.4 Measuring Circuit......................................................................................................................................11
7. CHARACTERISTIC DATA.................................................................................................................12
8. APPLIED CIRCUIT EXAMPLES ......................................................................................................17
S1F76640 Technical Manual (Rev.1.5) EPSON i
Page 6
Page 7
1. DESCRIPTION
1. DESCRIPTION
The S1F76640 is a high efficient and low power consuming CMOS DC-DC converter.
It consists of two components: a booster and a stabilizer.
The booster provides double boosting output (3.6 to 11V), triple boosting output (5.4 to 16.5V) or quadruple
boosting output (7.2 to 22V) for input voltage (1.8 to -5.5V).
Moreover, the use of external parts such as diode and capacitor provides boosting of higher magnification.
The voltage stabilizer enables you to set to any output voltage.
It also provides three types of negative temperature gradients for voltage stabilization output, and it is most
suitable for LCD power.
The S1F76640 enables you to drive an IC (liquid crystal driver, analog IC, etc.) that would usually require
another power supply in addition to the logic main power, using a single power supply. Therefore, it is suitable
for supplying micro-power to compact electrical devices such as hand-held computers with low power
consumption.
2. FEATURES
(1) Highly efficient and low power consuming CMOS DC-DC converter
(2) Easy conversion from input voltage V
Output 2 × V
(3) The use of external parts such as diode and capacitor provides boosting of higher magnification
(4) Built-in output voltage stabilizer
- Any output voltage settable with external resistor
(5) Output current: Max. 20mA (V
(6) Efficiency of power conversion: typ.95 %
(7) Three types of reference voltage with negative temperature gradient characteristics suitable for LCD drive
power supply.
(8) Power-off operation by external signal
- Static current for power-off: Max. 2μA
(9) Boosting of higher magnification through serial connection
(10) Low voltage operation: Most suitable for battery drive
(11) Built-in CR oscillation circuit
(12) SSOP2-16 pins
(13) This IC is not designed to be radiation resistant
DD (+6.6V), 3 × VDD (+9.9V), and 4 × VDD (+13.2V) from input VDD (+3.3V)
DD (+3.3V) to three types of positive voltages
DD = +5V)
S1F76640 Technical Manual (Rev.1.5) EPSON 1
Page 8
03. BLOCK DIAGRAM
r
r
r
r
3. BLOCK DIAGRAM
CAP3+
CAP2−
CAP2+
CAP1−
CAP1+
VDD
OSC1
OSC2
VSS(GND)
Voltage converte
CR
oscillation
circuit
Booster
Reference voltage generato
Stabilize
Fig.3.1 Block Diagram
Voltage stabilize
OUT
V
VRI
REG
V
RV
OFF
XP
TC1
TC2
Temperature gradient selection circuit
2 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 9
+
−
+
−
4. PIN DESCRIPTION
4.1 Pin Assignment
V
XP
(GND)V
OSC1
OSC2
RV
REG
TC1
TC2
OFF
SS
SSOP2-16PIN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Fig.4.1 SSOP2-16 Pin Assignment
4. PIN DESCRIPTION
RI
V
OUT
V
CAP3+
CAP2
CAP2
CAP1
CAP1
DD
V
S1F76640 Technical Manual (Rev.1.5) EPSON 3
Page 10
04. PIN DESCRIPTION
4.2 Pin Functions
Pin Name Pin No. Function
CAP1+ 11 Positive pin connected to pump-up capacitor for double boosting
CAP1− 10 Negative pin connected to pump-up capacitor for double boosting
Next-stage clock for serial connection
CAP2+ 13 Positive pin connected to pump-up capacitor for triple boosting
CAP2− 12 Negative pin connected to pump-up capacitor for 3rd boosting
Output pin for double boosting (shorted with V
CAP3+ 14 Positive pin connected to pump-up capacitor for quadruple boosting
Output pin for triple boosting (shorted with V
TC1 3 Temperature gradient selection pin
TC2 4 Temperature gradient selection pin
VDD 9 Power supply pin (Positive side, system VCC)
VOUT 15 Output pin for quadruple boosting
VRI 16 Stabilizer input pin
VREG 2 Stabilizing voltage output pin
RV 1 Stabilizing voltage adjustment pin
Adjusts the V
volume (3-pin resistor) connected between the V
XPOFF 5 VREG output ON/OFF control pin
Controls S1F76640M0C power-off (V
signal from the XP
OSC2 8 Pin connected to oscillation resistor
Opened for external clock operation.
OSC1 7 Pin connected to oscillation resistor
Functions as a clock input pin for external clock operation
VSS(GND) 6 Power supply pin (Negative side, system GND)
REG output voltage by connecting an intermediate tap of the external
OFF system to this pin.
OUT)
OUT)
DD and VREG pins to the RV pin.
REG output power off) by inputting a control
4 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 11
5. FUNCTIONAL DESCRIPTION
5. FUNCTIONAL DESCRIPTION
! CR oscillation circuit
The S1F76640 is equipped with a CR oscillation circuit as an internal oscillation circuit, connecting external
resistor R
Note 1: The oscillation frequency varies depending on the wiring capacity, so the wire between the OSC1 and
To set the external resistor R
efficiency in Figures 7.12 and 7.13, and then obtain R
The relationship between R
400kΩ<R
OSC for oscillation between the OSC1 and OSC2 pins (Fig.5.1).
OSC1
OSC2
(Note 1)
OSC
R
OSC1
OSC2
Open
External clock
Fig.5.1 CR oscillation circuit Fig.5.2 External Clock Operation
OSC2 pins and R
OSC<2MΩ.
OSC must be short as much as possible.
OSC, first obtain the oscillation frequency fOSC that satisfies the maximum
OSC corresponding to the fOSC in Fig.7.1.
OSC and fOSC can be briefly expressed by the following equation on condition that
1
OSC
AR ・=
(where A is a constant: GND = 0V, VDD = 5V, fOSC A = 2.0 × 1010 (Ω•Hz))
OSC
f
Therefore, the R
(Recommended oscillation frequency: 10kHz to 30kHz (R
OSC value can be obtained from the relational expression above.
OSC: 2MΩ to 680kΩ)
For external clock operation, open the OSC2 pin as shown in Fig.5.2 and input external clocks (duty 50%) from
the OSC1 pin.
S1F76640 Technical Manual (Rev.1.5) EPSON 5
Page 12
05. FUNCTIONAL DESCRIPTION
X
Ω
" Voltage converters (I) and (II)
Voltage converters (I) and (II) perform double boosting and triple boosting for input power voltage V
clocks generated in the CR oscillation circuit.
For double boosting, the double input voltage is obtained from the Vout pin by connecting an external pump-up
capacitor between CAP1+ and CAP1- and jumpering between CAP2+, CAP3+ and V
For triple boosting, 3V
DD is output from the VOUT pin by connecting an external pump-up capacitor between
OUT.
CAP1+ and CAP1- and between CAP2+ and CAP2-, and connecting an external smoothing capacitor between
DD and VOUT.
V
For quadruple boosting, 3V
DD is output from the VOUT pin by connecting an external pump-up capacitor
between CAP1+ and CAP1- and between CAP2+ and CAP2-, and connecting an external smoothing capacitor
between V
Figures 5.3, 5.4 and 5.5 show the relationships between input and output voltages, using V
DD and VOUT.
SS = 0V and VDD =
5V.
CAP1+=2V
VDD=5V
SS
=0V
V
DD
=10V
CAP2+=3VDD=15V
Note 1:
VDD=5V
VSS=0V
CAP3+=4VDD=20V
VDD=5V
VSS=0V
Fig.5.3 Relationships between Fig.5.4 Relationships between Fig.5.5 Relationships
Double Boosting Voltages Triple Boosting Voltages between Quadruple
Boosting Voltages
Note 1: In triple boosting, the double boosting output (+10V) cannot be extracted from the CAP2+ pin.
Note 2: In quadruple boosting, the double boosting output (+10V) cannot be extracted from the CAP2+ pin.
Note 3: In quadruple boosting, the triple boosting output (+15V) cannot be extracted from the CAP3+ pin.
# Reference voltage generator, voltage stabilizer
The reference voltage generator generates a reference voltage required to operate the voltage stabilizer, and
provides a temperature gradient to the reference voltage.
There are three types of temperature gradients and the appropriate one is selected by a signal sent from the
temperature gradient selection circuit. The voltage stabilizer stabilizes boosting output voltage V
outputs any voltage.
As shown in Fig.5.5, the V
OUT by connecting the external resistor RRV and changing the voltage of the intermediate tap.
V
REG output voltage can be set to any voltage between the reference voltage VRV and
P
V
RV
V
SS
OFF
REG
R1
Control signal
RV
R
=100kΩto 1M
V
REG
────
=
RV
R
R1
RV
$
V
Fig.5.6 Voltage Stabilizer
The voltage stabilizer, which contains the power-off function, enables V
REG output ON/OFF control when the
signal is sent from the system (microprocessor, etc.).
When XP
If the V
OFF = High (VDD), the VREG output is turned on; when XPOFF = Low (GND), it is turned off.
REG output ON/OFF control is not necessary, XPOFF is fixed to High (VDD) as shown in Fig.4.5 (dashed
lines).
DD using
Note 3:
Note 2:
OUT and
6 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 13
5. FUNCTIONAL DESCRIPTION
% Temperature gradient selection circuit
As shown in Table 5.1, the S1F76640 provides three types of temperature gradients suitable for LCD driving to
REG output.
V
Table 5.1 Correspondence between Temperature Gradients and VREG Output ON/OFF
XPOFF
Note 1)
1(VDD) L(VSS) L(VSS) -0.40%/°C ON ON
1(VDD) L(VSS) H(VOUT) -0.30%/°C ON ON
1(VDD) H(VOUT) L(VSS) -0.50%/°C ON ON
1(VDD) H(VOUT) H(VOUT) -0.50%/°C ON OFF
0(VSS) L(VSS) L(VSS)
0(VSS) L(VSS) H(VOUT)
0(VSS) H(VOUT) L(VSS)
0(VSS) H(VOUT) H(VOUT)
TC2
Note 1)
TC1
Note 1)
Temperature
gradient CT
Note 2)
-
-
OFF(Hi-Z) Note 3) OFF
-
OFF(Hi-Z) Note 3) OFF
-
OFF(Hi-Z) ON Boosting only Note 5)
V
REG output
OFF(Hi-Z) Note 3) OFF
CR
oscillation
circuit
Remarks
-
-
-
Serial connection
Note 4)
-
-
-
Note 1: The high voltage is different between the XP
OFF, TC2, and TC1 pins.
Note 2: The temperature gradient CT is defined in the following formula:
V
CT=
50°C - 0°C V
REG (50°C) - VREG (0°C) 1
×
×100 (%/°C)
REG (25°C)
Example: When CT- = -0.3%/°C is selected;
REG output at Ta = 25°C is VREG (25°C) = 8V,
if V
REG /ΔT = CT $ | VREG (25°C) | = -0.3×10
Δ V
REG | value reduces 40mV each time the temperature rises by 1°C.
the | V
REG (25°C) = 10V results in Δ | VREG | /ΔT = 30mV/°C.
- V
-2
×8 = 24mV/°C is obtained,
Note 3: When the power is off (V
DD-0.5V.
to V
REG output: OFF, CR oscillation circuit: OFF), the VOUT output voltage is set
Note 4: Selecting this mode for serial connection drives the next-stage IC with the first-stage clock, and
reduces the power consumption of the next-stage IC. (See item 8 - (4).)
Note 5: Select this mode for boosting operation only. It minimizes the current consumption.
S1F76640 Technical Manual (Rev.1.5) EPSON 7
Page 14
06. ELECTRICAL CHARACTERISTICS
6. ELECTRICAL CHARACTERISTICS
6.1 Absolute Maximum Ratings
Item Symbol
Input power voltage VDD GND-0.3 24/N V VDD (N= 3, 4)
8 N = 3: Triple boosting
6 N = 4: Quadruple boosting
Input pin voltage VI GND-0.3 VDD-0.3 V 0SC1, XPOFF
GND-0.3 VOUT-0.3 V TC1, TC2, RV
Output voltage V0 GND-0.3 24 V VOUT Note 3:
GND-0.3 VOUT V VREG Note 3:
Output pin voltage 1 V0C1 GND-0.3 VDD-0.3 V CAP1+, CAP2+, 0SC2
Output pin voltage 2 V0C2 GND-0.3 2×VDD-0.3 V CAP1-
Output pin voltage 3 V0C3 GND-0.3 3×VDD-0.3 V CAP2-
Output pin voltage 4 V0C4 GND-0.3 4×VDD-0.3 V CAP3-
Allowable dissipation Pd
Operating temperature Topr -40 85 °C
Storage temperature Tstg -55 150 °C
Soldering temperature and time Tsol
Standard value
Min. Max.
-
-
260"10 °C"s Lead part
210 mW SSOP-16PIN
Unit Remarks
-
-
Note 1: Use exceeding the absolute maximum ratings above may cause a permanent destruction of the IC.
A long-duration operation at the absolute maximum ratings may significantly decrease reliability.
Note 2: All the voltage values above are based on GND.
Note 3: The V
OUT and VREG output pins output the boosted voltage and stabilized boosted-voltage.
No external voltage should therefore be applied to these pins. When being compelled to apply external
voltage to the pins for use, it must be in the allowable range of the rated voltages above.
8 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 15
6. ELECTRICAL CHARACTERISTICS
+
+
+
−
−
+ − + − + − + −
6.2 Recommended Operating Conditions
Item Symbol
Boosting start voltage VSAT1 1.8
VSAT2 2.2
Boosting stop voltage VSTP
Output load current IOUT
Oscillation frequency
External resistor for oscillation ROSC 680 2000 kΩ
Boosting capacitor C1,C2,C3,C4 3.3
Stabilization-output adjusting resistor RRV 100 1000 kΩ
fOSC 10 30 kHz
Note 1: All voltages are based on the condition that the V
Note 2: For low-voltage (V
DD = 1.8 to 2.2V) operation, the recommended circuit is as follows:
I
V
1
2
3
4
5
6
7
8
RV
REG
V
TC1
TC2
OFF
P
VSS
OSC1
OSC2
V
CAP3
CAP2
CAP2
CAP1
CAP1
(D1 (VF (IF = 1mA) ≤ 0.6V recommended)
Fig.6.2.1 Recommended Circuit for Low-voltage Operation (Example of Quadruple Booster Circuit)
Standard value
Min. Max.
-
-
20 mA
SS (GND) is equal to 0V.
VRI
16
OUT
15
14
13
12
11
10
9
DD
V
C2
C1
Unit Remarks
-
V ROSC=1MΩ, C4≥10μF
CL/C4≥1/20, Note 2)
-
V ROSC=1MΩ
1.8 V ROSC=1MΩ
-
-
-
-
μF
C4
C3
D1
R
L
-
-
CL
S1F76640 Technical Manual (Rev.1.5) EPSON 9
Page 16
06. ELECTRICAL CHARACTERISTICS
6.3 Electrical Characteristics
If not specified Ta=-40°C to +85°C VSS=0V､VDD=5V
Item
Input power voltage VDD 1.8 - 5.5 V
Output voltage VOUT
VREG VRV - 22 V R=∞, RRv=1MΩ,
Stabilizer operating
voltage
Booster current
consumption
Stabilized circuit
current consumption
Static current IQ
Oscillation frequency f0SC 14.0 17.5 21.0 kHZ ROSC=1MΩ !
Output impedance ROUT
conversion efficiency
Note 2)
Stabilization output
voltage variation
Stabilization output
load variation Note
3)
Stabilization output
saturated resistance
Note 4)
Reference voltage VRV0 1.70 1.90 2.20 V TC2=GND, TC1=VOUT,
VRV1 1.80 2.00 2.20 V TC2=TC1=GND,Ta=25°C
VRV2 1.50 1.60 1.80 V TC2=VOUT, TC1=GND,
Temperature CT0 -0.40 -0.30 -0.20 %/°CVDD=5V､VOUT=20V "
gradient CT1 -0.50 -0.40 -0.30 %/°C Note 5)
CT2 -0.60 -0.50 -0.40 %/°C
Input leak current IL
Symbol
VOUT VRV+2.5
Iopr1
Iopr2
Pef 90 95
ΔVREG
ΔV
OUT･VREG
ΔV
REG
ΔI
OUT
R
SAT
Standard value
Min. Typ. Max.
- -
-
30 60 μARL=∞, ROSC=1MΩ !
-
25 50 μARL=∞, VOUT=20V "
-
-
250 350 Ω IOUT=10mA !
0.1
-
5 - Ω VOUT=20V, VREG=15V
-
10 - Ω RSAT=Δ(VOUT-VREG)/
-
22 V
-
22 V
-
2 μA TC2=TC1=VOUT, Rl=∞ !
-
-
-
2 μA Poff, TC1, TC20SC1, and
Unit Conditions
V
OUT=22V
% IOUT=5mA ! Boosting power
%/V 10V<VOUT<20V,
V
REG=10V
RL=∞, Ta=25°C
Ta =2 5°C, 0<I
TC1=V
ΔI
OUT
0<I
OUT<10mA, RV=GND,
Ta =2 5°C
Ta =2 5°C
Ta =2 5°C
RV pins
OUT<10Ma
OUT, TC2=GND
Note 1: All voltages are based on the condition that the V
SS (GND) is equal to 0V.
Note 2: The values above indicate the conversion efficiency of the booster. When the stabilizer is active, the
loss is (V
It is, therefore, recommended to use the method of reducing (V
If (V
REG - VOUT) × IOUT.
OUT - VREG) as much as possible.
OUT - VOUT) × IOUT is high, the stabilizer characteristics vary as the IC temperature rises.
Note 3: See Figures 7.15, 7.16, and 7.17.
Note 4: RSAT indicates the inclination shown in Fig.7.18; V
voltage of the V
REG output.
OUT - Δ(VOUT - VREG) indicates the lower limit
Note 5: The computational expression of CT is shown below:
V
CT=
50°C - 0°C V
REG (50°C) - VREG (0°C) 1
×
REG (25°C)
×100 (%/°C)
Measuring
circuit
-
"
-
"
"
"
"
#
10 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 17
A
A
+−+
−
+−+
−
A
A
A
6.4 Measuring Circuit
! Booster circuit characteristics Measuring circuit
opr1
I
R
OSC
" Stabilization circuit characteristics Measuring circuit
O
V
R1
R2
L
R
V
REG
IO
V
I
V
# Input leak current Measuring circuit
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
1
2
3
4
5
6
7
8
1
16
2
15
3
14
4
13
5
12
6
11
7
10
8
9
6. ELECTRICAL CHARACTERISTICS
O
I
V
O
V
16
15
14
13
C2
12
11
C1
10
9
9
L
R
C3
opr2
I
(excluding the current flowing
through R1, R2 and RL)
(RRV＝R1+R2)
Connected to each
measurement pin
C4
S1F76640 Technical Manual (Rev.1.5) EPSON 11
Page 18
07. CHARACTERISTIC DATA
7. CHARACTERISTIC DATA
1000
osc [kHz]
f
A]
μ
[
OPR1
I
Ta=25°C
VDD=5V
100
10
1
10 100 1000 10000
VDD=3V
VDD=2V
R
OSC
[
]
Ω
ｋ
Fig.7.1 Oscillation frequency- External
resistor for oscillation
70
Ta=2 5°C
V
=5V
DD
60
C1 to C4=10μF
50
=17.5kHz
OSC
f
OSC
f
=8.75kHz
40
30
20
10
0
0123456
f
V
OSC
DD
=35kHz
[V]
Fig.7.3 Booster current consumption
- Input voltage
20
18
16
osc [kHz]
14
f
12
10
-40 -20 0 20 40 60 80 100
VDD=5V
VDD=3V
VDD=2V
Ｔａ
Fig.7.2 Oscillation frequency
20
15
10
[V]
O
V
=5V
Quadru ple
boosting
I
O
5
Ta=2 5°C
V
DD
C1 to C4=10μF
0
0102030
Fig.7.4 Output voltage (V
[°C]
Triple
boosting
[mA]
O) - Output current !
Dou ble
boosting
12 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 19
7. CHARACTERISTIC DATA
12
10
8
6
[V]
O
V
4
2
0
Quad ruple
boosting
Ta=2 5°C
=3V
V
DD
C1 to C4=10μF
0 5 10 15 20
Triple
boosting
I
O
Dou bl e
boosting
[mA]
Fig.7.5 Output voltage (V
O) - Output current " Fig.7.6 Output voltage (VO) - Output current #
700
600
Ta=25°C
=5mA
I
O
500
400
]
Ω
[
O
300
R
Quadru ple
boosting
Triple
boosting
Dou ble
boosting
200
100
0
0123456
V
[V]
DD
Fig.7.7 Output impedance - Input voltage ! Fig.7.8 Output impedance - Input voltage "
10
9
8
7
6
5
[V]
O
V
4
3
Ta=2 5°C
2
V
1
C1 to C4=10μF
0
0246810
700
600
500
400
]
Ω
[
O
300
R
200
100
0
0123456
DD
=2V
Quadru ple
boosting
Quadru ple
boosting
Triple
boosting
I
[mA]
O
V
DD
[V]
Dou ble
boosting
Ta=2 5°C
=10mA
I
O
Triple
boosting
Dou ble
boosting
S1F76640 Technical Manual (Rev.1.5) EPSON 13
Page 20
07. CHARACTERISTIC DATA
g
A
μ
100
90
80
Peff [% ]
Quadruple
boosting
70
Pe f f
60
50
40
Dou ble
30
boosting I
20
10
0
0102030
Fig.7.9 Boosting power conversion efficiency
100
90
80
]
Peff [%
Quadruple
boosting
70
Pe f f
60
50
Triple
40
boosting I
Double
30
boosting I
20
10
0
012345678910
Fig.7.11 Boosting power conversion efficiency
Input current - Output current #
Triple
Triple
boostin
boosting Peff
Quadruple
boosting
I
DD
DD
Dou ble
boosting Peff
[mA]
I
O
Ta=25°C
V
=5V
DD
C1 to C4=10μF
- Output current !
Input current - Output current !
Triple
boosting Peff
Quadruple
boosting I
DD
DD
DD
I
O
Double
boosting Peff
Ta=25°C
V
DD
C1 to C4=1 0
[mA]
=2V
F
- Output current #
150
120
90
60
30
0
50
40
30
20
10
0
100
90
80
[mA]
DD
I
Quadruple
70
boosting
Pe f f
60
50
Peff [% ]
Triple
40
boosting I
Double
30
boosting I
20
10
0
0 5 10 15 20
Triple
boosting Peff
Quadruple
boosting
DD
DD
Double
boosting Peff
[mA]
I
O
Ta=2 5°C
V
=3V
DD
C1 to C4=1 0μF
Fig.7.10 Boosting power conversion efficiency
- Output current "
Input current - Output current "
100
90
80
70
60
[mA]
DD
I
50
Peff [% ]
40
30
IO=2mA
20
10
0
1 10 100 1000
IO=5m
OSC
f
IO=10m A
[kHz]
IO=20mA
Ta=2 5°C
V
=5V
DD
C1 to C4=1 0μF
Fig.7.12 Boosting power conversion efficiency
- Oscillation frequency !
100
90
80
70
60
50
40
30
20
10
0
[mA]
DD
I
14 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 21
100
90
80
70
60
]
Peff [%
Fig.7.13 Boosting power conversion efficiency
2.6
2.5
2.4
2.3
2.2
[V]V
2.1
A1
ST
2.0
1.9
1.8
1.7
1.6
IO=1mA
50
40
30
20
10
0
1 10 100 1000
IO=2mA
IO=5m A
OSC
f
IO=10m A
Ta=25°C
V
=3V
DD
C1 to C4=10μF
[kHz]
- Oscillation frequency "
Ta=2 5°C
V
=5V
DD
C1 to C4=1 0μF
0.1 1.0 10.0 100.0
[kΩ]
R
L
Fig.7.15 Boosting start voltage
- load resistance
7. CHARACTERISTIC DATA
100
90
80
70
60
50
Peff [% ]
40
30
20
10
0
IO=0.5m A
1 10 100 1000
IO=1m A
[kHz]
OSC
f
Fig.7.14 Boosting power conversion efficiency
- Oscillation frequency #
0.5
0.4
0.3
| [V]
O
-V
REG
|V
VO=8V
0.2
0.1
0.0
0 5 10 15 20 25 30
VO=12V
VO=20V
[m A]
I
O
Fig.7.16 Stabilization output saturated resistance
- Load current
IO=5m A
IO=2mA
Ta=25°C
V
=3V
DD
C1 to C4=1 0μF
Ta=2 5°C
C1 to C4=1 0μF
S1F76640 Technical Manual (Rev.1.5) EPSON 15
Page 22
07. CHARACTERISTIC DATA
8.00
7.95
[V]
REG
V
7.90
]
[V
REG
V
Ta=25°C
V
=20V
O
7.85
0.1 1.0 10.0 100.0
I
REG
[mA]
Fig.7.17 Output voltage (V
- Output current !
4.00
3.95
3.90
Ta=2 5°C
=8V
V
3.85
O
0.1 1.0 10.0 100.0
I
REG
[m A]
Fig.7.19 Output voltage (V
- Output current #
REG)
REG)
6.00
5.95
[V]
REG
V
5.90
Ta=25°C
=12V
V
5.85
O
0.1 1.0 10.0 100.0
I
REG
[mA]
Fig.7.18 Output voltage (VREG)
- Output current "
40
C)
(25
REG
(Ta)-V
REG
V
［％］
30
100
×
20
°
10
C)
°
0
(25
REG
-10
V
-20
-30
──────────────
-40
-40-20 0 20406080100
C
T2
C
T1
C
T0
Ta [°C]
Fig.7.20 Reference voltage - Temperature
16 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 23
8. APPLIED CIRCUIT EXAMPLES
μ
μ
μ
μ
×
−
μ
×
μ
μ
μ
8. APPLIED CIRCUIT EXAMPLES
(1) Quadruple boosting, Triple Boosting and Double Boosting
Fig.8.1 shows a connection example for obtaining quadruple boosting output for input voltage by operating
the booster only.
For triple boosting, remove the capacitor C1 and jumper between the CAP1+ (pin No.11) and V
pins; triple boosting (15V) is obtained from V
For double boosting, further remove the capacitor C2 and jumper between the CAP2+ (pin No.13) and
DD (No.9) pins; double boosting (10V) is obtained from VOUT.
V
VSS
DD
V
OSC
R
1MΩ
1
RV
REG
2
V
3
TC1
TC2
4
5
OFF
XP
SS
V
6
OSC1
7
8
OSC2
VRI
V
CAP3+
CAP2+
CAP2−
CAP1+
CAP1−
V
O
DD
Fig.8.1 Quadruple Booster Fig.8.2 Diagram of Voltage Relations
OUT.
16
OUT
V
15
14
13
+
C2
F
10
−
12
11
10
9
C3
+
10
−
C1
+
F
10
−
(=V
C4
+
F
10
−
F
DD
4)
V
DD
(+5V)
VSS (0V)
V
OUT
(+20V)
for Quadruple Boosting
DD (No.9)
DD
$
V
4
(2) Quadruple boosting + Stabilizer
Fig.8.3 shows an applied-circuit example for stabilizing the boosting output obtained in Fig.8.1 the
stabilizer and providing the temperature gradient for the V
REG output through the temperature gradient
selection circuit.
This application example can indicate two outputs from V
O and VREG at the same time.
Triple boosting + stabilizer operation using the triple boosting and double boosting + stabilizer operation is
also available.
R1+R2
REG
V
(=
R1
C5
10μF
＋
－
RRV
-
1MΩ
VSS
VDD
)･V
R2
R1
RV
#Note 1
OSC
R
1MΩ
1
RV VRI
REG
2
V
3
TC1
TC2
4
5
OFF
XP
SS
V
6
OSC1
7
8
OSC2
16
OUT
DD
V
(=V
4)
OUT
V
CAP3+
CAP2+
CAP2
CAP1+
CAP1−
V
15
14
13
C2
+
F
10
－
−
12
11
C1
+
F
10
－
−
10
DD
9
C4
+
10
－
−
C3
+
F
10
－
−
OUT
V
F
DD
(+5V)
V
(+20V)
VSS (0V)
4 $ V
V
DD
REG
Fig.8.3 Quadruple Boosting + Stabilizer Fig.8.4 Diagram of Voltage Relations
(Temperature Gradient of C
T1) for Quadruple Boosting +
Stabilizer
Note 1: The RV pin (No.1) has high input impedance. If the wire is long, use a shield wire or the like to prevent
noise. To reduce the influence of noise, it is effective to reduce the R
RV value. (However, the RRV
current consumption will increase.)
S1F76640 Technical Manual (Rev.1.5) EPSON 17
Page 24
08. APPLIED CIRCUIT EXAMPLES
−
μ
μ
−
μ
μ
Ω
μ
A
−
+ −
(3) Parallel Connection
As shown in Fig.8.1, multi-connection reduces output impedance Ro.
Therefore, a configuration of n parallel connections lowers Ro to 1/n. Smoothing capacitor C4, which is a
single device, is shared by those connections. To obtain stabilization output after parallel connections,
apply the connection shown in Fig.8.3 to only one of the n parallel connections shown in Fig.8.5.
V
REG
RL
RRV
1MΩ
R2
R1
O
I
VSS
OUT
V
V
DD
(+5V)
VSS (0V)
Fig.8.6 Diagram of Voltage Relations Fig.8.7 Output Voltage - Output Current
in Parallel Connection
ROSC
1M
Ω
(+20V)
1
RV VRI
2
V
REG
3
TC1
TC2
4
5
XP
OFF
SS
V
6
OSC1
7
8
OSC2
Fig.8.5 Parallel Connection
$
4
V
DD
CAP3
CAP2
CAP2
CAP1
CAP1
F
ROSC
1M
1
RV
2
V
REG
3
TC1
TC2
4
5
XP
OFF
SS
V
6
OSC1
7
8
OSC2
CAP3
CAP2
CAP2
CAP1
CAP1
VRI
V
16
V
O
15
14
+
13
+
−
+
−
DD
12
11
10
C2’
+
10μF
−
C1’
+
10μF
−
DD
V
9
16
15
VO
14
+
13
+
+
−
V
DD
C2
+
10
12
11
10
9
F
C1
+
F
10
C4
10
C3
+
F
10
−
20
[V]
15
O
V
Ta=25°C
10
0 10203040
O
I
[mA]
OUT
V
C3’
+
F
10
−
18 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 25
8. APPLIED CIRCUIT EXAMPLES
+
−
−
+
+
A
μ
− + − +
(4) Serial Connection
The serial connection in the S1F76640 (connecting V
next stage respectively) further increases output voltage. However, the serial connection raises output
impedance. Fig.8.8 shows an example of serial connection for further stabilizing output by obtaining V
OSC
R
1MΩ
DD = 5V.
1
RV VRI
REG
2
V
3
TC1
TC2
4
5
OFF
XP
SS
V
6
OSC1
7
8
OSC2
OUT
V
CAP3+
CAP2+
CAP2
CAP1
CAP1−
V
16
15
14
13
12
−
+
11
10
DD
9
+
−
C4
10μF
C3
10μF
D1
RV
R
1MΩ
+
C5
10
F
25V from V
V
VSS
REG
L
R
O
I
VDD (=VSS’)
Fig.8.8 Serial Connection
V
OUT
Next stageFirst stage
V
V
V
DD
SS
OUT
(+10V)
(+5V)
(0V)
2 $ VDD
Max.6.0V
Fig.8.9 Diagram of Voltage Relations in Serial Connection
25
' [V]
O
V
20
15
Ta=25°C
10
012345678
I
Fig.8.10 Output Voltage - Output Current
DD and VO in the pre-stage to VSS and VDD in the
R2
R1
’(+25V)
1
RV
2
REG
V
3
TC1
TC2
4
5
OFF
XP
SS
V
6
OSC1
7
8
OSC2
CAP3
CAP2
CAP2
CAP1
CAP1
VRI
V
16
O
V
15
14
C4’
V
C3’
+
10μF
−
REG
+
10μF
−
13
C2’
+
10μF
−
12
11
C1’
10μF
−
10
DD
9
4 $(VDD’－VSS’）
VDD’
VSS’
O
[mA]
O =
OUT
V
(=VDD’)
OUT
V
’
S1F76640 Technical Manual (Rev.1.5) EPSON 19
Page 26
08. APPLIED CIRCUIT EXAMPLES
Note 1: <Notes on load connection>
As shown in Fig.8.8, when connecting load between V
in the second stage) and V
REG in the second stage in serial connection, the following points should be
noted: When the IC is activated or no normal output is generated at the V
off by the P
below V
below V
OFF signal, current flows into to the VREG pin from VSS in the first stage (or other voltage
SS in the second stage) through load. If the voltage exceeding the absolute maximum rating
SS in the second stage is generated at the VREG pin, the may interfere with normal operation of
the IC. For serial connection, as shown in Fig.8.8, connect diode D1 between V
REG, so that the voltage below VSS in the second stage will not be applied to the VREG pin.
and V
Note 2: In Fig.8.8, the first stage is assigned to triple boosting and the next-stage to quadruple boosting;
however, quadruple boosting is available for both the first and next stages unless the input voltage
DD’ - VSS’ in the next stage exceeds the standard value (6.0V). For serial connection, each IC must be
V
designed in compliance with the standard (V
DD - VSS ≤ 6.0V, VO - VSS ≤ 24V) (See Fig.8.9).
Note 3: When double boosting is provided in the first stage, the first-stage CAP1- output can be used as a
next-stage clock; however, when triple boosting is provided, it cannot be used as a next-stage clock.
Therefore, to obtain a next-stage clock, externally install R
in Table 4.2, the next-stage external clock operation by the pre-stage CAP1- output is available only for
temperature gradient CT = -0.5%/°C. If another temperature gradient is required, use an internal
oscillator like the above.
Note 4: In serial connection, the temperature gradient is provided for the V
Fig.8.9) of the IC in which the stabilizer is active.
REG value changes according to temperature as follows:
The V
Δ | V
Δ T
REG |
CT ( VREG (25°C) - VSS’ )
It changes at the ratio above.
SS in the first stage (or other voltage below VSS
REG pin while VREG is turned
DD in the second stage
OSC and use an internal oscillator. As shown
SS - VREG voltage (VREG – VSS’ in
20 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 27
8. APPLIED CIRCUIT EXAMPLES
μ
A
(5) Negative Voltage Conversion
The S1F76640 converts input voltage to negative voltage for double boosting or triple boosting through the
circuit shown in Fig.8.11. (For double boosting, remove capacitor C2 and diode D3 and jumper between
both ends of D3.)
However, the output voltage rises forward voltage VF of the diode. For example, as shown in Fig.8.12,
SS ＝0V; VDD = 5V; and VF = 0.6V results in VO’ = -10V+3×0.6V = - 8.2V (-5V+2×0.6V = -3.8V for
V
double boosting).
VSS
OSC
R
1MΩ
1
RV
2
REG
V
3
TC1
TC2
4
5
OFF
XP
SS
V
6
OSC1
7
8
OSC2
CAP3
CAP2
CAP2
CAP1
CAP1
V
VRI
16
OUT
V
O
V
15
+
14
+
13
C2
+ −
−
12
10μF
+
11
C1
+ −
−
10
DD
10μF
9
D3
D2
D1
C6
+
10
−
R
I
’
DD
(+5V)
V
F
L
O
VSS (0V)
$
3
VDD
DD
V
VOUT’ (-8.2V)
3 $ VF
Fig.8.11 Negative-Voltage Conversion Fig.8.12 Diagram of Voltage Relations for
Negative Voltage Conversion
0
Ta=25°C
' [V]
-5
O
V
-10
010203040
O
I
[mA]
Fig.8.13 Output Voltage - Output Current
S1F76640 Technical Manual (Rev.1.5) EPSON 21
Page 28
08. APPLIED CIRCUIT EXAMPLES
+
−
−
+
+
μ
Ω
A
−
μ
μ
μ
A
+ − + −
(6) Negative-Voltage Conversion + Positive-Voltage Conversion
Combining the triple boosting (Fig.8.1) with the negative voltage conversion (Fig.8.11) generates the
circuit shown in Fig.8.14, and outputs 15V and -8.2V from 5V input.
In this case, the output impedance is higher than that for negative voltage conversion only or positive
voltage conversion only.
Fig.8.15 Diagram of Voltage Relations for Negative-Voltage Conversion + Positive-Voltage
Fig.8.16 Output Voltage - Output Current Fig.8.17 Output Voltage - Output Current
1
RV
REG
2
V
3
TC1
TC2
4
5
OFF
XP
VSS
OSC
R
1M
SS
V
6
OSC1
7
8
OSC2
Fig.8.14 Negative-Voltage Conversion + Positive-Voltage Conversion
DD
V
VSS (0V)
15
10
[V]
O
V
5
Ta=25°C
O
'=5mA
I
0
0 10203040
O
[mA]
I
(+5V)
16
VRI
OUT
V
15
CAP3
14
CAP2
13
12
CAP2
CAP1
11
10
CAP1
DD
V
9
DD
$
V
3
Conversion
C3
+
10
C4
10
3 $ V
OUT
V
OUT
V
C5
10
F
F
F
C2
＋ －
10μF
+
C1
＋ －
−
10μF
3
OUT
’ (−8.2V)
V
F
V
$
VDD
OUT
C6
10
F
RL’
Io’
(+15V)
L
R
Io
DD
V
0
Ta=25°C
Io=5mA
' [V]
-5
O
V
-10
010203040
O
' [mA]
I
22 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 29
8. APPLIED CIRCUIT EXAMPLES
+
−
−
+
+
Ω
μ
−
μ
μ
−
(7) Example of Changing the Temperature Gradient with an External Temperature Sensor (Thermistor)
The S1F76640, which is equipped with the temperature gradient selection circuit in the stabilizer, enables
you to select three types of temperature gradients (-0.30%/°C, -0.40%/°C, and -0.50%/°C) as V
If other temperature gradients are required, as shown in Fig.8.18, connect a thermistor to resistor R
output voltage adjustment) in series; you can change the temperature gradient to any value.
REG
V
Note 2
P
R
R2
R1
VSS
V
DD
RT
RV
R
1MΩ
R
1M
OSC
1
RV VRI
2
REG
V
3
TC1
4
TC2
5
OFF
XP
SS
V
6
OSC1
7
8
OSC2
V
CAP3
CAP2
CAP2
CAP1
CAP1
OUT
V
16
OUT
V
15
14
13
+
C2
F
10
12
11
10
DD
9
C3
+
10
+
C1
F
10
−
+
C4
10μF
−
F
Fig.8.18 Temperature Gradient Change Example
(For pins 3 and 4, select a lower temperature gradient than the one to be changed from Table 5.1.)
[Measurement conditions]
DD: 5V
V
SS: 0V
V
RV: 1MΩ (set to VREG = 10 at 25°C)
R
T: 10kΩ (0°C/50°C Ratio 9.00)
R
Temperature gradient: -0.3 %/°C
REG
(25°C)| [%]
(°C)|-|V
REG
REG
100×|V
(25°C)|/|V
10
8
Thermistor used
6
4
2
0
-2
-4
-6
Thermistor not used
-8
-10
0 1020304050
Ta [°C]
Fig.8.19 Output Voltage - Temperature
Note 1: The relationship between R
R
VREG =
PV + RT
R1
Using a thermistor as R
T and VREG is indicated as follows:
RV
T increases the temperature gradient for VREG.
Note 2: The temperature characteristics of the thermistor indicate the nonlinearity; however, connecting resistor
P to the thermistor in parallel changes nonlinear characteristics to linear characteristics.
R
REG output.
RV (for
S1F76640 Technical Manual (Rev.1.5) EPSON 23
Page 30
08. APPLIED CIRCUIT EXAMPLES
(8) Example of Configuration of Electronic Volume Circuit of Voltage Stabilization Output (VREG)
C4
+
−
10μF
+
−
C3
10μF
+
−
+
−
C2
10μF
C1
10μF
(Quadruple boosting)
1
16
15
14
13
12
11
10
9
VRI
V
OUT
CAP3+
CAP2+
CAP2−
CAP1+
CAP1−
V
DD
RVI
REG
V
TC1
TC2
OFF
XP
V
OSC1
OSC2
2
3
4
5
6
SS
7
8
XPOFF
(VDD/VSS)
VSS or VOUT
SS or VOU T
V
ROSC
1MΩ
(74HC4051)
13
IN0
14
IN1
15
IN2
12
IN3
1
IN4
5
IN5
2
IN6
4
IN7
16
CC
V
V
EE VSS
COM
INH
8 7
Power stabilization output
REG output)
(V
3
11
A
B
C
CTRL0
10
CTRL1
9
CTRL2
6
Negative power input
Positive power input
Fig.8.20 Electronic Volume Circuit of Voltage Stabilization Output
24 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 31
8. APPLIED CIRCUIT EXAMPLES
−
μ
μ
μ
μ
−
A
− + − + −
−
(9) Example of Configuration of Booster Circuits of High Magnification Using Diode
Adding an external diode to the S1F76640 provides quintuple or higher boosting operation and voltage
stabilization output. It is recommended to use the diode of smaller V
boosting output increases due to the influence of drop of forward voltage V
F = 0.6V results in output shown in Fig.8.22.
V
Fig.8.21 shows an example of circuit configuration that provides boosting by 6x magnification using two
diodes and voltage stabilization output. Use the shortest possible wire between V
Fig.8.22 shows the diagram of voltage relations.
Use the voltage to be applied to the VRI pin at or below the absolute maximum rated voltage.
REG
V
RRV
1MΩ
C7
10μF
R2
R1
VSS
VDD
L
R
IO
+
R
1M
OSC
1
RV VRI
2
REG
V
3
TC1
4
TC2
5
XP
SS
V
6
OSC1
7
Ω
8
OSC2
OFF
16
15
O
V
14
CAP3+
13
CAP2+
12
CAP2
CAP1+
CAP1−
V
11
10
DD
9
(For pins 3 and 4, select any temperature gradient.)
Fig.8.21 Boosters of High Magnification
25
F
OUT
V
(+16V)
DD
DD
V
(+4V)
SS
V
(0V)
4
6 $ V
DD
$
V
2 $ V
V
6 $ V
OUT
’ (+22.8V)
DD
2 $ V
20
' [V]
O
V
F
15
10
0 5 10 15 20
Fig.8.22 Diagram of Voltage Relations of Fig.8.23 Output Voltage - Output Current
Boosters of High Magnification
F as the output impedance of the
F of the diode. VDD = 4V and
O and VRI.
OUT
V
+
−
OUT
V
C6
10μF
’
D1 D2
C4
+
C5
+
F
10
C1
10
C2
10
−
10μF
C3
10
−
F
F
F
+
Ta=25°C
O
[mA]
I
S1F76640 Technical Manual (Rev.1.5) EPSON 25
Page 32
08. APPLIED CIRCUIT EXAMPLES
AMERICA
EPSON ELECTRONICS AMERICA, INC.
HEADQUARTERS
2580 Orchard Parkway
San Jose , CA 95131,USA
Phone: +1-800-228-3964 FAX: +1-408-922-0238
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Phone: +1-800-922-7667 FAX: +1-781-246-5443
EUROPE
EPSON EUROPE ELECTRONICS GmbH
HEADQUARTERS
Riesstrasse 15
80992 Munich, GERMANY
Phone: +49-89-14005-0 FAX: +49-89-14005-110
DÜSSELDORF BRANCH OFFICE
Altstadtstrasse 176
51379 Leverkusen, GERMANY
Phone: +49-2171-5045-0 FAX: +49-2171-5045-10
FRENCH BRANCH OFFICE
1 Avenue de l’ Atlantique, LP 915 Les Conquerants
Z.A. de Courtaboeuf 2, F-91976 Les Ulis Cedex, FRANCE
Phone: +33-1-64862350 FAX: +33-1-64862355
UK & IRELAND BRANCH OFFICE
8 The Square, Stockley Park, Uxbridge
Middx UB11 1FW, UNITED KINGDOM
Phone: +44-1295-750-216/+44-1342-824451
FAX: +44-89-14005 446/447
Scotland Design Center
Integration House, The Alba Campus
Livingston West Lothian, EH54 7EG, SCOTLAND
Phone: +44-1506-605040 FAX: +44-1506-605041
ASIA
EPSON (CHINA) CO., LTD.
23F, Beijing Silver Tower 2# North RD DongSanHuan
ChaoYang District, Beijing, CHINA
Phone: +86-10-6410-6655 FAX: +86-10-6410-7320
SHANGHAI BRANCH
7F, High-Tech Bldg., 900, Yishan Road,
Shanghai 200233, CHINA
Phone: +86-21-5423-5522 FAX: +86-21-5423-5512
EPSON HONG KONG LTD.
20/F., Harbour Centre, 25 Harbour Road
Wanchai, Hong Kong
Phone: +852-2585-4600 FAX: +852-2827-4346
Telex: 65542 EPSCO HX
EPSONElectronic Technology Development (Shenzhen)
LTD.
12/F, Dawning Mansion, Keji South 12th Road,
Hi- Tech Park, Shenzhen
Phone: +86-755-2699-3828 FAX: +86-755-2699-3838
EPSON TAIWAN TECHNOLOGY & TRADING LTD.
14F, No. 7, Song Ren Road,
Taipei 110
Phone: +886-2-8786-6688 FAX: +886-2-8786-6660
EPSON SINGAPORE PTE., LTD.
1 HarbourFront Place,
#03-02 HarbourFront Tower One, Singapore 098633
Phone: +65-6586-5500 FAX: +65-6271-3182
SEIKO EPSON CORPORATION
KOREA OFFICE
50F, KLI 63 Bldg., 60 Yoido-dong
Youngdeungpo-Ku, Seoul, 150-763, KOREA
Phone: +82-2-784-6027 FAX: +82-2-767-3677
GUMI OFFICE
2F, Grand B/D, 457-4 Songjeong-dong,
Gumi-City, KOREA
Phone: +82-54-454-6027 FAX: +82-54-454-6093
SEIKO EPSON CORPORATION
SEMICONDUCTOR OPERATIONS DIVISION
IC Sales Dept.
IC International Sales Group
421-8, Hino, Hino-shi, Tokyo 191-8501, JAPAN
Phone: +81-42-587-5814 FAX: +81-42-587-5117
Document Code: 410214401
First Issue November 2005
Printed March 2007 in JAPAN
26 EPSON S1F76640 Technical Manual (Rev.1.5)
Page 33
Mouser Electronics
Authorized Distributor
Click to View Pricing, Inventory, Delivery & Lifecycle Information:
Epson:
S1F76640M0C0
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