Page 1
MF302-12
IEEE1394 Controller
POWER SUPPLY IC
S1F76610 Technical Manual
Page 2
S1F76610 Series
S1F76610 Series CMOS DC/DC Converter (Voltage
Doubler / Tripler) & Voltage Regulator
DESCRIPTION
The S1F76610 Series is a highly effecient CMOS DC/
DC converter for doubling or tripling an input voltage.
It incorporates an on-chip voltage regulator to ensure
stable output at the specified voltage. The S1F76610
Series offers a choice of three, optional temperature
gradients for applications such as LCD panel power
supplies.
The S1F76610C0B0 is available in 14-pin plastic DIPs,
the S1F76610M0B0, in 14-pin plastic SOPs, and the
S1F76610M2B0 in 16-pin plastic SSOPs.
FEATURES
• 95% (Typ.) conversion efficiency
• Up to four output voltages, V
voltage, V
I
• On-chip voltage regulator
• 20mA maximum output current at V
• Three temperature gradients : –0.1, –0.4 and –0.6%/
°C
O, relative to the input
I = –5V
• External shut-down control
•2µA maximum output current when shut-down
• Two-in-series configuration doubles negative output
voltage.
• On-chip RC oscillator
• S1F76610C0B0 ...... Plastic DIP-14 pin
S1F76610M0B0......Plastic SOP5-14 Pin
S1F76610M2B0......Plastic SSOP2-16 pin
APPLICATIONS
• Power supplies for LCD panels
• Fixed-voltage power supplies for battery-operated
equipment
• Power supplies for pagers, memory cards, calculators
and similar hand-held equipment
• Fixed-voltage power supplies for medical equipment
• Fixed-voltage power supplies for communications
equipment
• Power supplies for microcomputers
• Uninterruptable power supplies
Series
S1F76610
BLOCK DIAGRAM
V
DD
OSC1
OSC2
V
I
CAP1–
CAP1+
CAP2–
CAP2+
CR
oscilator
Voltage
multiplier
(1)
Voltage
multiplier
(2)
Multiplication
stage
Reference
voltge
generator
Temperature
gradient
selector
Voltage regulator
Stabilization
stage
TC1
TC2
P
OFF
RV
V
REG
V
O
S1F70000 Series EPSON 2–1
Technical Manual
Page 3
S1F76610 Series
PIN ASSIGNMENTS
TC1
TC2
V
1
2
3
4
5
6
7
I
CAP+
CAP–
CAP2+
CAP2–
PIN DESCRIPTIONS
S1F76610C0B0/M0B0
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Pin name
CAP1+
CAP1–
CAP2+
CAP2–
TC1
TC2
I
V
VO
VREG
RV
POFF
OSC2
OSC1
DD
V
NC
TC1
TC2
V
1
2
3
4
5
6
7
8
I
16
15
14
13
12
11
10
9
VDD
OSC1
NC
OSC2
OFF
P
RV
REG
V
VO
14
13
12
11
10
9
8
VDD
OSC1
OSC2
OFF
P
RV
VREG
VO
CAP+
CAP–
CAP2+
CAP2–
S1F76610M2B0S1F76610C0B0/M0B0
Description
Positive charge-pump connection for ×2 multiplier
Negative charge-pump connection for ×2 multiplier
Positive charge-pump connection for ×3 multiplier
Negative charge-pump connection for ×3 multiplier or ×2 multiplier output
Temperature gradient selects
Negative supply (system ground)
×3 multiplier output
Voltage regulator output
Voltage regulator output adjust
Voltage regulator output ON/OFF control
Resistor connection. Open when using external clock
Resistor connection. Clock input when using external clock
Positive supply (system V
CC)
2–2 EPSON S1F70000 Series
Technical Manual
Page 4
S1F76610 Series
SPECIFICATIONS
Absolute Maximum Ratings
Parameter
Input supply voltage
Input terminal voltage
Output voltage
Allowable dissipation
Working temperature
Storage temperature
Soldering temperature
and time
Codes
V
I – VDD
VI – VDD
VO – VDD
PD
Topr
Tstg
Tsol
Notes
1. Using the IC under conditions exceeding the aforementioned absolute maximum ratings may lead to permanent destruction of
the IC. Also, if an IC is operated at the absolute maximum ratings for a longer period of time, its functional reliability may be
substantially deteriorated.
2. All the voltage ratings are based on V
3. The output terminals (V
O,VREG) are meant to output boosted voltage or stabilized boosted voltage. They, therefore, are not the
DD = 0V.
terminals to apply an external voltage. In case the using specifications unavoidably call for application of an external voltage,
keep such voltage below the voltage ratings given above.
Reconmmended Operating Conditions
VDD = 0V, Ta = –40 to +85˚C unless otherwise noted
Parameter Symbol Conditions
Oscillator startup voltage
Oscillator shutdown voltage
Load resistance
Output current
Clock frequency
CR oscillator network resistance
Capacitance
Stabilization voltage sensing resistance
Notes
1. The recommended circuit configuration for low-valtage operation (when V
the following figure. Note that diode D1 should have a maximum forward voltage of 0.6V with 1.0mA forward current.
L min can be varied depending on the input voltage.
2. R
C1, C2, C3
Ratings
–20/N to V
I – 0.3 to VDD + 0.3
V
V
O – 0.3 to VDD + 0.3
–20 to V
O to VDD + 0.3
V
DD + 0.3
DD + 0.3
Max. 300
–40 to +85
–55 to +150
260 • 10
ROSC =1MΩ
3 = 10 µF, CL/C3 ≤ 1/20,
C
Ta = –20 to +85˚C.
STA
V
VSTP
See note 1.
OSC = 1MΩ
R
R
OSC = 1MΩ
RL
IO
fOSC
ROSC
RRV
Units Remarks
N = 2: Boosting to a double voltage
V
N = 3: Boosting to a triple voltage
V
OSC1, OSC2, P
V
TC1, TC2, RV
V
V
O Note 3)
V
REG Note 3)
V
OFF
mW
Plastic package
°C
°C
°C • s
At leads
Rating
Min.
—
—
–1.8
Lmin.
R
See note 2.
—
10.0
680
3.3
100
I is between –1.2V and –2.2V) is shown in
Typ.
—
—
—
—
—
—
—
—
—
Max.
–1.8
–2.2
—
—
20.0
30.0
2,000
—
1,000
Unit
V
V
Ω
mA
kHz
kΩ
µF
kΩ
Series
S1F76610
S1F70000 Series EPSON 2–3
Technical Manual
Page 5
S1F76610 Series
3. RLmin is a function of V1
C1
10µF
C2
10µF
5
4
3
2
1
Minimum load resistance (kΩ)
0
1
1
+
2
3
+
4
5
6
7
Voltage
doubler
C3
+
22µF
D1
V
STA2
V
STA1
Voltage
tripler
Input voltage (V)
14
13
12
11
10
R
OSC
1MΩ
CLR
9
8
L
654321.5
Electrical Characteristics
VDD = 0V, V1 = –5V, Ta = –40 to +85°C unless otherwise noted
Rating
Typ.
—
—
—
—
40
5.0
—
20.0
Max.
–1.8
—
–2.6
–3.2
80
12.0
2.0
24.0
Technical Manual
Unit
V
V
V
V
µA
µA
µA
kHz
Input voltage
Output voltage
Regulator voltage
Stabilization circuit operating voltage
Multiplier current
Stabilization current
Quiescent current
Clock frequency
SymbolParameter Conditions
VI
VO
RL = ∞, RRV = 1MΩ,
VREG
O = –18V
V
VO
IOPR1
IOPR2
IQ
fOSC
L = ∞, ROSC = 1MΩ
R
R
L = ∞, RRV = 1MΩ,
O = –15V
V
TC2 = TC1 = V
OSC = 1MΩ
R
O, RL = ∞
Min.
–6.0
–18.0
–18.0
–18.0
—
—
—
16.0
2–4 EPSON S1F70000 Series
Page 6
Parameter
Output impedance
Multiplication efficiency
Stabilization output voltage
differential
Stabilization output load differential
Stabilization output saturation
resistance
Reference voltage
Symbol
O
R
Peff
∆V
REG
∆VO·VREG
∆VREG
∆IO
SAT
R
VRV
Conditions
O = 10mA
I
O = 5mA
I
VO = –18 to –8V,
REG = –8V, RL = ∞,
V
Ta = 25˚C
V
O = –15V,
V
REG = –8V, Ta = 25˚C,
O = 0 to 10µA,
I
TC1 = V
DD, TC2 = VO
RSAT = ∆(VREG – VO)/∆IO,
I
O = 0 to 10µA,
R
V = VDD, Ta = 25˚C
RC2 = VO, TC1 = VDD,
Ta = 25˚C
TC2 = TC1 = V
O,
Ta = 25˚C
Min.
—
90.0
—
—
—
–2.3
–1.7
S1F76610 Series
Rating
Typ.
150
95.0
0.2
5.0
8.0
–1.5
–1.3
Max.
200
—
—
—
—
–1.0
–1.1
Unit
Ω
%
%/V
Ω
Ω
V
Series
S1F76610
Temperature gradient
OFF, TC1, TC2, OSC1, and RV
P
input leakage current
Note
|VREG (50°C)| – |VREG (0°C)|
CT = ×
50°C – 0°C
CT
ILKI
100
|V
REG (25°C)|
TC2 = V
Ta = 25˚C
See note.
DD, TC1 = VO,
–1.1
–0.25
–0.5
–0.7
—
–0.9
–0.1
–0.4
–0.6
—
–0.8
–0.01
–0.3
–0.5
2.0
%/˚C
µA
S1F70000 Series EPSON 2–5
Technical Manual
Page 7
S1F76610 Series
Typical Performance Characteristics
1000
Ta = 25°C
VI = –5V
I
= –3V
100
V
I
= –2V
V
[kHz]
OSC
f
10
1
10 100 1000 10000
R
OSC
[kΩ]
26
25
24
23
22
21
20
19
18
[kHz]
17
16
OSC
f
15
14
13
12
11
10
9
8
–40 –20 0 20 40 60 80 100
Ta [°C]
VI = –5.0V
V
I
= –3.0V
V
I
= –2.0V
(1) Clock frequency vs. External resistance (2) Clock frequency vs. Ambient temperature
150
Ta = 25°C
fOSC = 40kHz
100
0
–5
Ta = 25°C
V
I
= –5.0V
fOSC =
IOPR [µA]
20kHz
50
OSC = 10kHz
f
0
–7 –6 –5 –4 –3 –2 –1 0
I [V]
V
[V]
O
V
×2 multiplier
–10
×3 multiplier
–15
0 10203040
O
[mA]
I
(3) Multiplier current vs. Input voltage (4) Output voltage vs. Output current
2–6 EPSON S1F70000 Series
Technical Manual
Page 8
S1F76610 Series
0
Ta = 25°C
I
= –3.0V
V
×2 multiplier
–5
Vo [V]
×3 multiplier
–10
–15
0 102030
I
O
[mA]
0
Ta = 25°C
–1
V
I
= –2.0V
–2
[V]
–3
O
×2 multiplier
V
–4
×3 multiplier
–5
–6
012345678910
IO [mA]
(5) Output voltage vs. Output current (6) Output voltage vs. Output current
100
90
80
Ta = 25°C
70
I
= –5.0V
V
60
50
×3 multiplier
I
Peff [%]
I
40
30
20
10
0
0 1020304050
×2 multiplier
I
I
I
O
[mA]
×2 multiplier
Peff
×3 multiplier
Peff
100
90
80
70
60
50
40
30
20
10
0
[mA]
I
I
100
90
80
Ta = 25°C
70
I
= –3.0V
V
60
50
Peff [%]
×3 multiplier
I
I
40
30
20
10
0
0 5 10 15 20 25 30
×2 multiplier
I
I
×3 multiplier
Peff
IO [mA]
×2 multiplier
Peff
60
54
48
42
36
30
24
18
12
6
0
[mA]
I
I
Series
S1F76610
(7) Multiplication efficiency/input current (8) Multiplication efficiency/input current
vs. Output current vs. Output current
S1F70000 Series EPSON 2–7
Technical Manual
Page 9
S1F76610 Series
100
90
×2 multiplier
Peff
80
Ta = 25°C
70
60
V
I
= –2.0V
×3 multiplier
Peff
50
Peff [%]
40
×3 multiplier
I
I
30
20
×2 multiplier
I
I
10
0
012345678910
I
O
[mA]
40
36
32
28
24
20
16
12
8
4
0
[mA]
I
I
Ta = 25°C
I
O
400
= 6mA
300
[Ω]
O
R
200
×3 multiplier
100
×2 multiplier
0
–7 –6 –5 –4 –3 –2 –1 0
V
I
[V]
(9) Multiplication efficiency/input current (10) Output impedance vs. Input voltage
vs. Output current
500
500
400
Ta = 25°C
I
O
= 10mA
100
IO = 2mA
90
I
O
= 5mA
300
[Ω]
O
R
200
×3 multiplier
100
×2 multiplier
0
–7 –6 –5 –4 –3 –2 –1 0
I
[V]
V
80
I
O
Peff [%]
70
= 10mA
I
O
= 20mA
60
I
O
= 30mA
50
1 10 100 1000
f
OSC
[kHz]
Ta = 25°C
VI = –5.0V
(11) Output impedance vs. Input voltage (12) Multiplication efficiency vs. Clock frequency
2–8 EPSON S1F70000 Series
Technical Manual
Page 10
S1F76610 Series
100
90
IO = 0.5mA
IO = 1.0mA
IO = 2.0mA
IO = 4.0mA
–7.850
VO = –15V
Ta = 25°C
–7.900
80
[V]
REG
Peff [%]
70
V
–7.950
Ta = 25°C
60
50
1 10 100 1000
OSC
[kHz]
f
VI = – 3.0V
–8.000
0.0001 0.0010 0.0100 0.1000
I
O
[V]
(13) Multiplication efficiency vs. Clock frequency (14) Output voltage vs. Output current
–5.850
VO = –9V
Ta = 25°C
–5.900
–2.850
VO = –6V
Ta = 25°C
–2.900
Series
S1F76610
[V]
REG
V
–5.950
–6.000
0.0001 0.0010 0.0100 0.1000
IO [V]
[V]
REG
V
–2.950
–3.000
0.0001 0.0010 0.0100 0.1000
I
O
[V]
(15) Output voltage vs. Output current (16) Output voltage vs. Output current
S1F70000 Series EPSON 2–9
Technical Manual
Page 11
S1F76610 Series
0.30
Ta = 25°C
0.25
0.20
0.15
|VREG-VO| [V]
0.10
0.05
0.00
0 5 10 15 20
I
O
[mA]
V
O
V
O
V
O
= –5V
= –10V
= –15V
50
(25°C)| [%]
REG
0
(25°C)|/|V
REG
(°C)|-|V
REG
100×|V
–50
–40 –20 0 20 40 60 80 100
Ta [°C]
(17) Regulator voltage vs. Output current (18) Regulator output stability ratio vs.
Ambient temperature
Temperature Gradient Control
The S1F7661C0B0 offers a choice of three temperature
gradients which can be used to adjust the voltage regulator output in applications such as power supplies for
driving LCDs.
POFF
1 (VDD)
1 (V
DD)
DD)
1 (V
1 (V
DD)
0 (VI)
0 (V
I)
I)
0 (V
I)
0 (V
TC2
See note 1.
O)
Low (V
Low (V
O)
High (V
High (V
DD)
DD)
Low (VO)
Low (V
O)
High (V
High (V
DD)
DD)
TC1
Low (V
High (V
Low (V
High (V
Low (VO)
High (V
Low (V
High (V
Temperature
See note 2.
O)
DD)
O)
DD)
DD)
O)
DD)
Notes
1. The definition of LOW for P
OFF differs from that for TC1 and TC2.
2. The temperature gradient affects the voltage between V
gradient
(%/˚C)
–0.4
–0.1
–0.6
–0.6
—
—
—
—
DD and VREG.
Voltage
regulator
output
ON
ON
ON
ON
OFF
(high impedance)
OFF
(high impedance)
OFF
(high impedance)
OFF
(high impedance)
CR osciliator
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
Remarks
Serial connection
operational
CT0
CT1
CT2
Multiplier
2–10 EPSON S1F70000 Series
Technical Manual
Page 12
FUNCTIONAL DESCRIPTIONS
V
CC
(+5V)
GND
(–5V)
V
DD
= 0 V
V
I
= –5 V
V
CAP2
– = 2VI = –10 V
VDD = 0 V
V
I = –5 V
V
O = 3VI = –15 V
CR Oscillator
The on-chip CR oscillator network frequency is determined by the external resistor, R
tween OSC1 and OSC2. This oscillator can be disabled
in favor of an external clock by leaving OSC2 open and
applying an external clock signal to OSC1.
Oscillator External clock
OSC, connected be-
S1F76610 Series
Voltage Multiplier
The voltage multiplier uses the clock signal from the
oscillator to double or triple the input voltage. This requires three external capacitors–two charge-pump capacitors between CAP1+ and CAP1– and CAP2+ and
CAP2–, respectively, and a smoothing capacitor between V
I and VO.
OSC
OSC1
External clock
signal
OSC2
OSC1
R
OSC2
Reference Volatge Generator and Voltage
Regulator
The reference voltage generator supplies a reference
voltage to the voltage regulator to control the output.
This voltage can be switched ON and OFF.
V
DD
V
P
REG
OFF
RV
Control signal
R
RV
= 100 kΩ to 1 MΩ
VDD = 0 V
V
= –5 V
I
5 V
C1 +
10 µF
C2
10 µF
1
2
3
+
4
5
6
7
+
C3
10 µF
14
13
12
11
10
9
8
R
OSC
1 MΩ
VO = –15 V
Double voltage potential levels
R1
R2
R
RV
100 kΩ
to
1 MΩ
V
REG
C4
+
10 µF
= –8 V
Series
S1F76610
Tripled voltage potential levels
S1F70000 Series EPSON 2–11
Technical Manual
Page 13
S1F76610 Series
TYPICAL APPLICATIONS
Voltage Tripler with Regulator
The following figure shows the circuit required to triple
the input voltage, regulate the result and add a temperature gradient of –0.4%/°C. Note that the high input impedance of RV requires appropriate noise countermeasures.
VDD = 0 V
V
= –5 V
I
10 µF
5 V
10 µF
C1 +
C2
1
2
3
+
4
5
6
7
+
C3
10 µF
14
13
12
11
10
9
8
R1
R
OSC
1 MΩ
R2
VO = –15 V
R
RV
100 kΩ
to
1 MΩ
V
REG
C4
+
10 µF
= –8 V
R
RV
=V
R
1
RV
Converting a Voltage Tripler to a Voltage
Doubler
To convert this curcuit to a voltage doubler, remove capacitor C2 and short circuit CAP2– to V
VDD = 0 V
14
13
12
11
10
9
8
5 V
VI = –5 V
C1 +
10µF
C2
10µF
1
2
3
+
4
5
6
7
+
C3
10 µF
R
OSC
1 MΩ
O.
VO = –15 V
Parallel Connection
Connecting two or more chips in parallel reduces the
output impedance by 1/n, where n is the number of devices used.
Only the single output smoothing capacitor, C3, is re-
VDD = 0 V
14
13
12
11
10
R
OSC
1 MΩ
9
8
= –5 V
V
I
5 V
C1
10 µF
C2
10 µF
1
+
2
3
+
4
5
6
7
quired when any number of devices are connected in
parallel. Also, the voltage regulator in one chip is sufficient to regulate the combined output.
C1
10 µF
C2
10 µF
+
C3
10 µF
1
+
2
3
+
4
5
6
7
14
13
12
11
10
R
R
OSC
1 MΩ
9
8
V
= –15 V
O
RV
100 kΩ
to
1 MΩ
V
REG
+
C4
10 µF
= –10 V
2–12 EPSON S1F70000 Series
Technical Manual
Page 14
Serial Connection
Connecting two or more chips in series obtains a higher
output voltage than can be obtained using a parallel
<Precautions when connecting loads>
In case of series connections, when connecting loads
between the first stage V
second stage V
DD or up) and the second stage VREG as
shown in Fig. 2-13, be cautions about the following
point.
* When normal output is not occurring at the V
minal such as at times of starting up or when turning
the V
REG off by POFF signals, if current flows into the
second stage V
V
DD
= 0V
REG terminal through the load from
DD (or other potential of the
REG ter-
S1F76610 Series
connection, however, this also raises the output impedance.
the first stage VDD (or other potential of the second
stage V
absolute maximum rating for the second stage V
the V
hampered. Consequently, When making a series
connection, insert a diode D1 between the second
stage V
voltage exceeding the second stage V
not be applied to the V
DD or up) to cause a voltage exceeding the
DD at
REG terminal, normal operation of the IC may be
I and VREG as shown in Fig. 2-13 so that a
DD or up may
REG terminal.
V
DD'
= VI = –5V
Series
S1F76610
VI = –5V
5V
10µF
+
–
10µF
+–
14
1
13
2
3
4
5
6
7
12
11
10
9
VO = –10V= V
8
1MΩ
I
Positive Voltage Conversion
Adding diodes converts a negative voltage to a positive
one.
To convert the voltage tripler shown earlier to a voltage
doubler, remove C2 and D2, and short circuit D3. Small
Schottky diodes are recommended for all these diodes.
The resulting voltage is lowered by V
in the forward direction for each diode used. For example, if V
DD = 0V, VI = –5V, and VF = 0.6V, the re-
sulting voltages would be as follows.
• For a voltage tripler,
V
O = 10 – (3 × 0.6) = 8.2V
• For a voltage doubler,
V
O = 5 – (2 × 0.6) = 3.8V
F, the voltage drop
10µF
10µF
+
10µF
+
–
+
–
–
= 0 V
V
DD
VI = –5 V
1
2
3
4
5
6
7
5 V
V
D1
D2
D3
= 8.2 V
O
14
13
12
11
10
REG'
Load
= –15V
14
13
12
11
10
9
8
R
OSC
1 MΩ
100kΩ
to
+
1MΩ
10µF
–
9
O
= –20V
V
8
D1
C1
+
C3
10 µF
10 µF
10 µF
+
+
C2
1
2
3
4
5
6
7
V
S1F70000 Series EPSON 2–13
Technical Manual
Page 15
S1F76610 Series
Simultaneous Voltage Conversion
Combining a standard voltage tripler circuit with one
for positive voltage conversion generates both –15 and
8.2V outputs from a single input, however, it also raises
the output impedance.
A voltage doubler generates –10 and 3.8V outputs.
VDD = 0 V
= 8.2 V
O2
V
O2 = 8.2V
10 µF
+
10 µF
10 µF
+
10 µF
10 µF
+
1
2
++
3
4
5
6
7
+
10 µF
14
13
12
11
10
R
OSC
1 MΩ
9
V
= –15 V
O1
8
D1
D2
5 V
D3
V
= –5 V
V
I
Potential levels
Using an External Gradient
The S1F7661C0B0/M0B0 offers three built-in temperature gradients— –0.1, –0.4 and –0.6%/°C.
To set the gradient externally, place a thermistor, R
series with the variable resistor, R
RV, used to adjust the
output voltage.
R1
V
R
V
1
2
3
4
5
6
7
14
13
12
11
10
+
10 µF
9
8
R
DD
RV
T
REG
R
T, in
P
VDD = 0 V
I = –5 V
V
O1 = –15 V
V
2–14 EPSON S1F70000 Series
Technical Manual
Loading...