Page 1
S1F76540M0C Series
Technical Manual
Rev.1.1
Page 2
NOTICE
No part of this material may be reproduced or duplicated in any form or by any means without the written
permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice.
Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material
or due to its application or use in any product or circuit and, further, there is no representation that this material
is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to
any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty
that anything made in accordance with this material will be free from any patent or copyright infringement of a
third party. This material or portions thereof may contain technology or the subject relating to strategic
products under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export
license from the Ministry of Economy, Trade and Industry or other approval from another government agency.
All other product names mentioned herein are trademarks and/or registered trademarks of their respective
companies.
©SEIKO EPSON CORPORATION 2009, All rights reserved..
Page 3
Table of Contents
1. DESCRIPTION............................................................................................................. 1
1.1 Description.................................................................................................................................1
1.2 Features .....................................................................................................................................1
2. BLOCK DIAGRAM ......................................................................................................2
3. PIN ASSIGNMENT ......................................................................................................2
4. PIN DESCRIPTION...................................................................................................... 3
5. FUNCTIONAL DESCRIPTION.....................................................................................4
5.1 Clock Generator ........................................................................................................................4
5.2 Voltage Converter......................................................................................................................5
5.3 Reference Voltage Circuit .........................................................................................................6
5.4 Voltage Stabilizer.......................................................................................................................7
5.5 Power-off Control Circuit..........................................................................................................9
5.6 Soft Start Circuit ......................................................................................................................10
6. ABSOLUTE MAXIMUM RATINGS ............................................................................ 11
7. ELECTRICAL CHARACTERISTICS MEASUREMENT STANDARD........................12
7.1 DC Characteristics ..................................................................................................................12
7.2 AC Characteristics ..................................................................................................................14
8. CHARACTERISTICS GRAPHS................................................................................. 15
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES .......................................... 19
9.1 Quadruple Boosting + Regulator ...........................................................................................19
9.2 3rd Boosting + Regulator........................................................................................................20
9.3 Double Boosting + Regulator .................................................................................................21
9.4 Quadruple Boosting ................................................................................................................22
9.5 3rd Boosting ............................................................................................................................23
9.6 Double Boosting......................................................................................................................24
9.7 Parallel Connection (Boosting Capacity Increase)...............................................................25
9.8 High-Magnification Boosting Using a Diode.........................................................................26
9.8.1 Quintuple Boosting + Regulator ..........................................................................................26
9.8.2 Sextuple Boosting + Regulator............................................................................................28
9.9 Positive Voltage Converter .....................................................................................................30
9.10 Connection Example when Changing the Regulator Temperature Coefficient................32
S1F76540M0C Series Technical Manual EPSON i
(Rev.1.1)
Page 4
1. DESCRIPTION
1. DESCRIPTION
1.1 Description
S1F76540 consists of charge pump type DC/DC converter and voltage regulator with high efficiency and low
power consumption using the CMOS process.
The charge pump type DC/DC converter uses four (three or two) external capacitors to negatively generate the
output voltage, which is four times (triple or twice) higher than for the input voltage.
The voltage regulator uses two external resistors to set the output voltage generated by the DC/DC converter to
any value and supply the regulated output voltage. If necessary, you can provide the negative temperature
gradient characteristics to the regulated output voltage, and it is appropriate for LCD power.
S1F76540 turns the power off with an external signal, enabling you to reduce the wasteful current for system
suspension. It is therefore appropriate for battery-driven portable devices.
1.2 Features
• Charge pump type DC/DC converter (negatively quadruple, triple, or double)
• Built-in voltage regulator (voltage stabilization output circuit)
• High-level conversion efficiency ･･････････ 96% (VI= -5V, Typ.)
• Low consumption current ････････････････ 100mA (VI= -5V, At quadruple boosting, Typ.)
• High output capability ･･･････････････････ 20mA (Max.)
• Input voltage range ･････････････････････ -2.4 to -5.5V (At quadruple boosting)
-2.4 to -7.3V (At 3rd boosting)
-2.4 to -11V (At double boosting)
• DC/DC converter output voltage ･･････････ Input voltage | × 4 (At quadruple boosting, Max.)
• Built-in for highly accurate regulator ･･･････ -1.5V±0.05V (At CT0)
standard voltage
• Regulator output voltage temperature ･･･････ -0.05, -0.15, -0.35, -0.55 (%/°C)
gradient function
• Standby current (At power-off) ････････････ 5µA (Max.)
• Adding external parts enables quintuple or more high-magnification booster and regulator.
• Power-off function by external signal
• Completely-self-contained oscillation circuit
• Compact and slim package product (SSOP2-16PIN)
• This IC is not designed for strong radiation activity proof.
S1F76540M0C Series Technical Manual EPSON 1
(Rev.1.1)
Page 5
2. BLOCK DIAGRAM
VO V
V
V
V
2. BLOCK DIAGRAM
V
DD
POFF1X
POFF2X
Power-off
control circuit
FC
Clock
generator
VI
C1P C1N C3N C2P C2N
3. PIN ASSIGNMENT
Soft start
circuit
Boost control
circuit
Voltage converter
Figure 2.1 Block Diagram
1
RI
2
REG
TC1
TC2
RV
DD
FC
3
4
5
6
7
8
Figure 3.1 Pin assignment
16
15
14
13
12
11
10
9
C2P
C2N
C3N
C1N
C1P
POFF1X
POFF2X
Reference
voltage circuit
Voltage
stabilizer
I
TC1
TC2
RV
V
REG
VRI
VO
2 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 6
4. PIN DESCRIPTION
Table 4.1 Pin Description
Pin Name Pin No. Function
VO 1 Quadruple boosting output pin
VRI 2 Regulator input pin
VREG 3 Regulator output pin
RV 4 Input pin for adjusting the regulator output voltage
VDD 5 Power supply pin (+)
FC 6
TC1 7 Input pin for specifying the regulator output temperature gradient (1)
TC2 8 Input pin for specifying the regulator output temperature gradient (2)
POFF2X 9 Power-off control input pin (2)
POFF1X 10 Power-off control input pin (1)
VI 11 Power supply voltage (-)
C1P 12 Positive connect pin for double and quadruple boosting capacitor
C1N 13 Negative connect pin for double boosting capacitor
C3N 14 Negative connect pin for quadruple boosting capacitor
C2N 15 Negative connect pin for 3rd boosting capacitor
C2P 16 Positive connect pin for 3rd boosting capacitor
Input pin for switching the internal clock frequency
Clock input pin at serial or parallel connection (Two-way pin)
4. PIN DESCRIPTION
S1F76540M0C Series Technical Manual EPSON 3
(Rev.1.1)
Page 7
5. FUNCTIONAL DESCRIPTION
µ
5. FUNCTIONAL DESCRIPTION
5.1 Clock Generator
S1F76540, which contains a clock generator for boosting control, requires no external parts.
The clock frequency varies depending on the FC pin level (see Table 5.1), and you can select either the low
output mode or high output mode. This results in you being able to select the clock frequency based on the load
current and value of the capacitor to be used because the boosting output impedance varies depending on the
clock frequency and the values of the external capacitors for boosting.
Table 5.1 FC pin settings
FC pin
H(VDD) Low output
L(VI) High output
Mode
name
Clock
frequency
4.0kHz
（Typ.）
16.0kHz
（Typ.）
Consumption
current
IOP (Note 1) VRP (Note 2) See Figure.5.1 See Figure.5.1
IOP (Note 1) VRP (Note 2) See Figure.5.1 See Figure.5.1
(Note 1) For the consumption current value, see 7.1 DC Characteristics Table.
(Note 2) For information about how to define and roughly estimate the output ripple value, see 9.4.
Selection judgment characteristics
Output ripple
Output
impedance
Capacitor
capacity
550
Quadruple boosting Ta =2 5°C Io=10mA
I=C1=C2=C3=CO
500
]
Ω
450
400
350
300
250
Boosting output impedance [
200
150
1 10 100
C
(Tantalum capacitor)
VI=-3V FC=Low
VI=-5V FC=Low
VI=-3V FC=High
C[
F]
VI=-5V FC=High
Figure 5.1 Capacitor capacity value - output impedance characteristics diagram
4 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 8
5. FUNCTIONAL DESCRIPTION
5.2 Voltage Converter
The voltage converter, which consists of boosting control circuit and voltage converter, boosts the input power
supply voltage VI to four times (triple or double) using clocks from the clock generator. However, the 3rd or
double boosting output cannot be obtained simultaneously with for the quadruple boosting. Figure 5.2 shows
the potential relations at quadruple (3rd or double) boosting.
In the parallel connection, the C2P pin is used as a clock output pin in the master side (see Figure 9.8).
DD (0V)
V
VI (-5V)
-10V
Double boosting
3rd boosting
-15V
Quadruple boosting
-20V
Figure 5.2 Boosting potential-relation diagram (At VI = -5V)
[Notes on connecting the capacitor for voltage conversion]
When connecting the capacitor to the C1P, C2P, C1N, C2N, C3N, and VO pins, place the capacitor near this IC
so that the cable is as short as possible.
S1F76540M0C Series Technical Manual EPSON 5
(Rev.1.1)
Page 9
5. FUNCTIONAL DESCRIPTION
|
(
)
|
|
5.3 Reference Voltage Circuit
S1F76540 contains a reference voltage circuit for a voltage stabilization circuit (regulator).
The stabilizing potential described in Section 5.4 is defined with the split ratio between the external resistance
and reference voltage values.
The reference voltage allows you to change the temperature coefficient using the TC1 and TC2 pins, and you
can select one of four modes shown in Table 5.2.
Table 5.2 Reference voltage temperature coefficient settings
Mode
name
CT0 H H -1.55 -1.5 -1.45 -0.07 -0.05 -0.03
CT1 H L -1.62 -1.5 -1.38 -0.19 -0.15 -0.11
CT2 L H -1.65 -1.5 -1.35 -0.42 -0.35 -0.28
CT3 L L -1.70 -1.5 -1.30 -0.65 -0.55 -0.45
TC1
(H=V
(L=VI)
DD)
(Note 1) The reference voltage is based on Ta = 25°C.
(Note 2) The temperature gradient CT is defined in the following expression: In Table 5.2, the negative sign
assigned to CT means that |V
CT = ×
(Note on switching the TC1 and TC2 pins)
When switching the TC1 and TC2 pins after power-on, be sure to turn the power off (POFF1X=POFF2X=VI).
TC2
(H=V
(L=VI)
DD)
V
REF
Reference voltage value VREF(V)
(Note 1)
Min. Typ. Max. Min. Typ. Max.
REF| reduces as the temperature rises.
(50°C) |-|V
REF
0°C
50°C - 0°C
Temperature coefficient CT (%/°C)
(Note 2)
100
V
(25°C) |
REF
6 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 10
5. FUNCTIONAL DESCRIPTION
+
1
234567819
11111
1
1
5.4 Voltage Stabilizer
The voltage stabilizer stabilizes the voltage input to the VRI pin and outputs any voltage. The output voltage
can be changed to any value based on the ratio between external split resistances R1 and R2 as shown in the
expression (see Section 5.1). In this case, the sum of these split resistances should be as small as possible to
limit influence of external noises; however, the current consumed for the split resistances will increase as shown
in the expression (see Section 5.2). Therefore, the sum of split resistance values should be approximately 100Ω
to 1MΩ.
The temperature coefficient of the stabilizing potential will become equal to that of the reference voltage
described in Section 5.3.
R2
R1
Figure 5.3 V
REG setting method and assembly consideration
[Setting method]
y Relational expression between V
REG and reference voltage
REG =
V
R1
R1
R2
× (Reference voltage) ･････Expression (5.1)
y Consumption current for split resistances
REG =
I
REG|
|V
R1+R2
[Setting example]
The following shows a setting example for outputting V
quadruple boosting.
Determine the total resistor value of split resistances R1 and R2. If the allowable consumption current of the
split resistances is 20µA, the following will be obtained from expression (5.2).
R1+R2 = 18V ÷ 20µA = 900kΩ
If the reference voltage is -1.5V, the following ratio of the split resistances will be obtained from expression
(5.1).
(R1+R2) ÷ R1 = (-18V) ÷ (-1.5V) = 12
VO
VRI
VREG
RV
V
DD
FC
TC1
TC2
C2P
C2N
C3N
C1N
C1P
VI
POFF1X
POFF2X
･････Expression (5.2)
REG = -18V when VI = -5V and VO = -20V at
S1F76540M0C Series Technical Manual EPSON 7
(Rev.1.1)
Page 11
5. FUNCTIONAL DESCRIPTION
×
×
Therefore R1 and R2 will be determined as follows.
R1 = 75kΩ
R2 = 825kΩ
[Changing the temperature coefficient]
The temperature coefficient of the stabilizing potential depends on that of the reference voltage described in
Section 5.3. (Case where the split ratio of resistance values for setting does not depend on the temperature)
When setting the temperature coefficient other than that specifiable in S1F76540 to the stabilizing potential,
change it using a thermistor resistor, etc. shown in Figure 9.15.
The following shows how to obtain the V
REG(T) = {1+ ×{1+(T－T0)
V
CTR2
CTR1×R1(T0)
R2(T0)
T0 : 25°C
CTR1 : Temperature coefficient of resistance R1 (Ratio between split resistance values at 25°C)
CTR2 : Temperature coefficient of resistance R2 (Ratio between split resistance values at 25°C)
CT : Temperature coefficient (%/°C) of internal reference voltage
R1(T0) : 25°R1 value (Ω) at 25°C
R2(T0) : 25°R2 value (Ω) at 25°C
REF(T0) : 25°Internal reference voltage value (V) at 25°C
V
If the temperature coefficient of R1 is equal to that of R2 in expression (5.3), V
temperature coefficient of the internal reference voltage.
[Notes on using the voltage stabilization circuit]
• To keep the S1F76540 absolute maximum rating, the setting resistor must be connected between V
REG of an S1F76540 that uses the regulator. Connecting R1 to VDD of an S1F76540 that does not use the
V
regulator when connecting the S1F76540 in series will result in deterioration or destruction in this IC.
• The stabilizing potential adjusting pin “RV” has the too high input impedance, which may result in the
regulator being destabilized due to noises. When using this pin, shield the wiring section between the split
resistor and RV pin, or shorten the wiring as much as possible (see Figure 5.3).
• When using the stabilizing power supply voltage pin “VRI”, short-circuit the VRI and VO pins with a shorter
cable (see Figure 5.3), exceeding at high-magnification boosting using an external diode shown in Section 9.8.
[Measures against oscillation]
Installing external parts enables you to take measures of oscillation.
The following shows the parts used and recommended values.
• Capacity between V
REG and RV : 220pF
• Serial equivalent resistance of output capacitor CO : 10Ω or more (Note 1)
(Note 1) Specify the minimum necessary value because the ripple value of the output voltage increases.
(See item 9.4.)
REG value at temperature T.
CT
} × VREF(T0)
100
･････Expression (5.3)
REG depends only on the
DD and
8 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 12
5. FUNCTIONAL DESCRIPTION
5.5 Power-off Control Circuit
S1F76540 provides the power-off function, which turns each function on and off by issuing the signals shown in
Table 5.3 from the external system (microprocessor, etc.) to the POFF1X and POFF2X pins.
Using the power-off function, reactive current can be reduced in the application circuit connected in parallel.
When using the power-off function only in two states (all ON and all OFF), connect the POFF2X pin to VI;
power-on and -off can be controlled using only one POFF1X pin.
Table 5.3 Combination of power-on and -off modes
IN)
POFF2X
(H=V
DD)
(L=V
IN)
Oscillation
circuit
Booster Regulator Use
OFF
(Note 1)
POFF1X
Mode name
PS1 H L ON ON ON All circuit ON state
PS2 L L OFF
PS3 H H OFF ON ON
PS4 L H ON ON
(H=VDD)
(L=V
(Note 1) When the booster is off, the voltage of approximately VI+0.6V is generated in the VO pin.
(Note 2) When the regulator is off, the V
REG pin is placed into the high impedance state.
[Notes on using the power-off function]
Before starting the power-off function with an external system signal, check that VI has been stabilized after
power-on. Turning the power on or off before the power is not stabilized will result in a permanent destruction
of this IC.
VI
POFF1X
POFF2X
Figure 5.4 Power-off control start timing
Function state
(Note 2)
(Note 2)
VI
POFF1X
POFF2X
OFF
OFF
All circuit OFF state
Slave side in parallel connection
(Booster + Regulator)
Master side in parallel connection
(Booster only)
S1F76540M0C Series Technical Manual EPSON 9
(Rev.1.1)
Page 13
5. FUNCTIONAL DESCRIPTION
5.6 Soft Start Circuit
The soft start circuit is used to minimize the peak value of the rush current at startup of the booster.
As shown in Figure 5.5, the maximum 200 ms (100mSec Typ.) after the input voltage VI has been input is set as
the soft start period. During the soft start period, the VO output may not reach the electric potential that was
boosted sufficiently.
In this case, the electric potential of the VO output is boosted smoothly up to the specified voltage after the soft
start period has been expired.
[Notes on connecting the capacitor for stabilizing the input voltage]
To stabilize the input voltage VI, the capacitor (CI) to be connected between the V
placed near the IC pin so that the wiring is as short as possible.
Input voltage VI
Booster voltage VO
Stabilization output
REG Regulator VI
V
Soft start time
Typ. 100mSec
Max. 200mSec
Figure 5.5 Soft start operation
DD and VI pins must be
10 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 14
6. ABSOLUTE MAXIMUM RATINGS
6. ABSOLUTE MAXIMUM RATINGS
Table 6.1 Absolute maximum ratings
DD reference
V
Item Symbol
Input power voltage VI − 26.0/N VDD + 0.3 V
Input pin voltage VI VI − 0.3 VDD + 0.3 V
Output pin voltage 1 VOC1 VI − 0.3 VDD + 0.3 V C1P, C2P pins
Output pin voltage 2 VOC2 2 × VI − 0.3 VI + 0.3 V C1N pin
Output pin voltage 3 VOC3 3 × VI − 0.3 2 × VI + 0.3 V C2N pin
Output pin voltage 4 VOC4 4 × VI − 0.3 3 × VI + 0.3 V C3N pin
Regulator input power
supply voltage
Regulator input pin voltage VRV N × VI − 0.3 VDD + 0.3 V
Output voltage VO N × VI − 0.3 VDD + 0.3 V
Input current IIN
Output Current IO
Allowable dissipation Pd
Operating temperature Topr − 40 85 °C
Storage temperature Tstg − 55 150 °C
Soldering temperature and
time
VRI N
Tsol
(Note 1) Using with a condition exceeding the above absolute maximum rating may result in malfunction or
unrecoverable damage. Moreover, normal function may be achieved temporarily but its reliability
may be significantly low.
(Note 2) Potential relation with external system
The S1F76540 common power supply is set to the highest-level electric potential (V
specifications, all the numeric values are represented based on V
potential relation when connecting to an external system.
CC(+5V)
V
System side
GND(0V)
Double boosting
Figure 6.1 Electric potential relation diagram
Rated value
Min. Max.
× VI − 0.3 VDD + 0.3 V
-
-
-
210 mW Ta ≤ 25°C
-
260･10 °C･S Lead part
80 mA VI pin
≤ 4：20
N
> 4：80/N
N
Unit Remarks
mA
DD=0V; therefore, be aware of the
S1F76540 side
3rd boosting
Quadruple boosting
N = Boosting magnification
VI pin
POFF1X, POFF2X
TC1, TC2, FC pins
N = Boosting magnification,
VRI pin
N = Boosting magnification,
RV pin
N = Boosting magnification
OUT, VREG pins
V
N = Boosting magnification
OUT, VREG pins
V
-
-
DD). In this
VDD(0V)
VI(−5V)
−10V
−15V
−20V
S1F76540M0C Series Technical Manual EPSON 11
(Rev.1.1)
Page 15
7. ELECTRICAL CHARACTERISTICS MEASUREMENT STANDARD
7. ELECTRICAL CHARACTERISTICS MEASUREMENT STANDARD
7.1 DC Characteristics
Table 7.1 DC characteristics (1)
Ta = −40°C to +85°C, V
Item Symbol Conditions Min Typ. Max. Unit
N: Boosting magnification for CT0 −22/N
Input power voltage VI
Boosting start input power
supply voltage
Boosting output voltage VO
Regulator input voltage VRI
Regulator output voltage VREG
Boosting output
impedance
Boosting power
conversion efficiency
Booster operation
consumption current 1
Booster operation
consumption current 2
Regulator operation
consumption current
Static current IQ POFF1X = VI、POFF2X = VI、FC = VDD
Input leak current ILKI
VSTA
RO
Peff
IOPR1
IOPR2
IOPVR
N: Boosting magnification for CT1 −22/N
N: Boosting magnification for CT2 −22/N
N: Boosting magnification for CT3
N: Boosting magnification,
FC = V
DD, at no-load
-
-
REG = 0, VRI = −22V
I
RRV = 1M
IO = 10mA (At quadruple boosting)
VI =
C1, C2, C3, C0 = 10
(Tantalum capacitor)
IO = 10mA (At quadruple boosting)
VI =
C1, C2, C3, C0 = 10
(Tantalum capacitor)
IO = 2mA (At quadruple boosting)
VI =
C1, C2, C3, C0 = 10
(Tantalum capacitor)
IO = 2mA (At quadruple boosting)
VI =
C1, C2, C3, C0 = 10
(Tantalum capacitor)
FC = VDD, POFF1X = VI
POFF2X = V
VIN =
C1, C2, C3, C0 = 1
(Tantalum capacitor)
FC = V
POFF2X = V
VI =
C1, C2, C3, C0 = 10
(Tantalum capacitor)
FC = VI, POFF1X = VI
POFF2X = V
VI =
C1, C2, C3, C0 = 10
(Tantalum capacitor)
FC = VI, POFF1X = VI
POFF2X = V
VIN =
C1, C2, C3, C0 = 10
(Tantalum capacitor)
VRI = −20V, at no-load
RRV = 1M
Applied pins: POFF1X, POFF2X, FC,
TC1, and TC2
Ω
−5.0V
µF
*
−3.0V
µF
*
−5.0V
µF
*
−3.0V
µF
*
DD
−5.0V, at no-load
µF
*
DD, POFF1X = VI
DD
−3.0V, at no-load
µF
*
DD
−5.0V, at no-load
µF
*
DD
−3.0V, at no-load
µF
*
Ω
DD=0V, VI=-5.0V unless otherwise specified.
−22/N
−22/N
−22
−22
- -
-
-
-
-
-
-
-
-
-
- -
- -
-
-
-
-
-
- -
-
180 270 Ω
230 350 Ω
96
95
100 170 µA
70 120 µA
260 440 µA
160 270 µA
7 15 µA
−2.4 V
−2.4 V
−2.4 V
−2.4 V
−2.4 V
V
−2.8 V
−2.8 V
-
-
5.0 µA
0.5 µA
%
%
12 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 16
7. ELECTRICAL CHARACTERISTICS MEASUREMENT STANDARD
−
|
|
Table 7.2 DC characteristics (2)
DD= 0V, VI= −5.0V
V
Item Symbol Conditions Min Typ. Max. Unit
Stabilization-output
saturated resistance
Stability of regulated
output voltage
Stabilization-output load
change
Reference voltage
（Ta=25°C）
Reference voltage
temperature coefficient
(Note 4)
Input voltage level
Capacity value of
boosting capacitor
* The characteristics vary depending on the external capacitor. Before determining constants, conduct the
evaluation of the characteristics.
(Note 1) RSAT ＝
(Note 2) ∆VR ＝
(Note 3) ∆VO ＝
(Note 4) CT ＝
RSAT
(Note 1)
∆VR
(Note 2)
∆VO
(Note 3)
VREF0 TC1 = VDD, TC2 = VDD -1.55 −1.50 -1.45 V
VREF1 TC1 = VDD, TC2 = VI −1.62 −1.50 −1.38 V
VREF2 TC1 = VI, TC2 = VDD −1.65 −1.50 −1.35 V
VREF3 TC1 = VI, TC2 = VI
CT0
CT1
CT2
CT3
VIH
VIL
CMAX
V
REG (IREG=20mA)
0 < IREG < 20mA
RV = V
DD, Ta = 25°C
−20V < VR < −10V
I
REG = 1mA, VREG = −9V setting
0 < IREG < 20mA
VRI =
−20V, VREG = −15V setting
TC1 = V
SSOP product
TC1 = V
SSOP product
TC1 = VI, TC2 = V
SSOP product
TC1 = VI, TC2 = VI
SSOP product
VI =
Applied pins: POFF1X, POFF2X, FC,
TC1, TC2
VI =
Applied pins: POFF1X, POFF2X, FC,
TC1, TC2
Applied capacitor
C1, C2, C3
DD, TC2 = VDD
DD, TC2 = VI
DD
−2.4V to −5.5V
−2.4V to −5.5V
VREG (IREG=0mA)
-
- -
-
−1.70 −1.50 −1.30 V
-0.07 -0.05 -0.03
−0.19 −0.15 −0.11 %/°C
−0.42 −0.35 −0.28 %/°C
−0.65 −0.55 −0.45 %/°C
0.2VI
-
-
6 10 Ω
0.2 %/V
15 50 mV
-
-
-
0.8VI V
-
47 µF
∆IREG
VREG (VRI=-20V) − VREG (VRI=10V)
∆VRI × V
REG (VRI=-10V)
VREG (IREG=20mA) − VREG (IREG=0mA)
VREG (Ta=50°C)| − |VREG (Ta=0°C)
50°C − 0°C
VREG (Ta=25°C) |
:
100
%/°C
V
S1F76540M0C Series Technical Manual EPSON 13
(Rev.1.1)
Page 17
7. ELECTRICAL CHARACTERISTICS MEASUREMENT STANDARD
7.2 AC Characteristics
Table 7.2 AC Characteristics
Unless otherwise noted: VDD=0V, VI=−5.0V
Item Symbol Conditions Min. Typ. Max. Unit
Ta=25°C 3.0 4.0 5.0 kHz
−40°C to +85°C 2.0 4.0 6.0 kHz
Ta=
Ta=25°C 12.0 16.0 20.0 kHz
−40°C to +85°C 8.0 16.0 24.0 kHz
Ta=
Internal clock frequency 1 fCL1
Internal clock frequency 2 fCL2
DD
FC = V
POFF1X= VI
POFF2X = V
Applied pin: C1P
FC = VI
POFF1X = VI
POFF2X= V
Applied pin: C1P
DD
DD
14 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 18
8. CHARACTERISTICS GRAPHS
8. CHARACTERISTICS GRAPHS
4.2
4.0
3.8
3.6
VI=-2.4V to -5V
fosc[kHz]
3.4
3.2
3.0
-40 -20 0 20 40 60 80 100
Ta[°C]
350
300
250
200
[uA]
150
OPR
I
100
50
0
Ta= 25°C
C1 to C3, CI, CO=10µF
FC=Low
VI [V]
FC=High
-6-5 -4 -3-2-10
(1) Internal clock frequency 1 - Temperature (2) Booster operation consumption current - Input Voltage
14
20
Quadruple boosting
12
Quadruple boosting
15
Vo[V ]
10
3rd boosting
5
Ta= 25°C
VI=-5V
C1 to C3, CI, CO=10µF
0
0 10 20 30
Double boosting
Io[mA]
10
8
Vo[V]
6
4
Ta= 25°C
2
V
C
0
0 5 10 15 20
3rd boosting
=-3V
I
to C3, CI, CO=10µF
1
Io[mA]
Double boosting
(3) Boosting output (Vo) - Output current <1> (4) Boosting voltage (Vo) - Output current <2>
S1F76540M0C Series Technical Manual EPSON 15
(Rev.1.1)
Page 19
8. CHARACTERISTICS GRAPHS
f
f
500
10
9
8
7
6
5
Vo[V]
4
3
Ta= 25°C
2
VI=-2.4V
C1 to C3, CI, CO=10µF
1
0
0 2 4 6 8 10
Quadruple boosting
Double boosting
3rd boosting
Io[mA]
]
Ω
Ro[
400
300
200
Double boosting
100
0
Quadruple boosting
3rd boosting
VI [V]
Ta= 25°C
Iｏ=10mA
(5) Output voltage (Vo) - Output current <3> (6) Boosting output impedance - Input voltage
-6 -5 -4 -3-2-10
100
90
80
Quadruple boosting
Peff
70
60
[%]
50
Pef
40
30
20
10
0
0 10 20 30
3rd boosting Peff
Quadruple boosting
I
IN
3rd boosting IIN
Double boosting
I
IN
Double boosting Peff
Ta= 25°C
V
=-5V
I
C1 to C3, CI, CO=10µF
Io [mA]
150
120
90
60
30
0
100
90
80
Quadruple boosting
70
Peff
60
[mA]
[%]
IN
I
50
Pef
3rd boosting IIN
40
Double boosting
30
IIN
20
10
0
0 5 10 15 20
3rd boosting Peff
Quadruple boosting
IIN
Double boosting Peff
Ta= 25°C
VI=-3V
C1 to C3, CI, CO=10µF
Io[mA]
(7) Boosting power conversion efficiency - (8) Boosting power conversion efficiency -
Output current <1> Output current <2>
Input current - Output current <1> Input current - Output current <2>
100
90
80
70
60
50
40
30
20
10
0
[mA]
IN
I
16 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 20
8. CHARACTERISTICS GRAPHS
100
90
80
Quadruple boosting Peff
70
60
Quadruple boosting IIN
50
Peff [%]
40
Double boosting IIN
30
20
10
0
0 1 2 3 4 5 6 7 8 9 10
3rd boosting Peff
3rd boosting IIN
Double boosting Peff
Ta= 25°C
=-2.4V
V
I
C1 to C3, CI, CO=10µF
Io[mA]
50
40
30
20
10
0
2.7
2.6
2.5
2.4
2.3
2.2
[V]
[mA]
2.1
IN
I
STA1
V
2.0
1.9
1.8
1.7
1.6
1.5
0.1 1.0 10.0 100.0
Ta= 25°C
VI=-5V
to C3, CI, CO=10µF
C
1
R
[kΩ]
L
(9) Boosting power conversion efficiency - (10) Boosting start input power supply voltage -
Output current <3> Load resistance
Input current - Output current <3>
0.3
VRI=-20V
0.2
| [V]
REG
- V
RI
0.1
| V
0.0
0 5 10 15 20 25 30
VRI=-8V
VRI=-12V
Ta= 25°C
C1 to C3, CI, CO=10µF
Io[mA]
(11) Output voltage lowering - Load current (12) Output voltage (VREG) - Output current <1>
8.00
7.99
7.98
7.97
7.96
[V]
7.95
REG
V
7.94
7.93
7.92
7.91
7.90
Ta= 25°C
=-20V
V
RI
0.1 1.0 10.0 100.0
[mA]
I
REG
S1F76540M0C Series Technical Manual EPSON 17
(Rev.1.1)
Page 21
8. CHARACTERISTICS GRAPHS
6.00
5.99
5.98
5.97
5.96
[V]
5.95
REG
V
5.94
5.93
5.92
Ta= 25°C
VRI=-12V
5.91
5.90
0.1 1.0 10.0 100.0
(13) Output voltage (V
I
[mA]
REG
REG) - Output current <2> (14) Output voltage (VREG) - Output current <3>
4.00
3.99
3.98
3.97
3.96
3.95
[V]
REG
V
3.94
3.93
3.92
3.91
3.90
Ta =2 5°C
V
=-8V
RI
0.1 1.0 10.0 100.0
[mA]
I
REG
60
50
(25°C) |
40
REG
30
(25°C) | / V
20
REG
10
[°C] | - | V
0
REG
-10
100 × | V
-20
-40 -20 0 20 40 60 80 100
Ta[°C]
× 100 [%]
(25°C)
REG
[Ta] - V
REG
V
40
C
T2
30
20
10
0
(25°C)
C
T1
-10
REG
V
-20
-30
-40
-40 -20 0 20 40 60 80 100
C
T3
C
T0
Ta[°C]
(15) Reference voltage - Temperature gradient (16) Regulator temperature coefficient - Temperature
18 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 22
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
1
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
9.1 Quadruple Boosting + Regulator
Figure 9.1 shows a “quadruple boosting + regulator” connection example that is standard in S1F76540. Perform
quadruple boosting in the negative direction for input voltage VI, and generate the stabilized voltage in the
REG pin.
V
V
REG
+
R1 R2
VDD
VI
Figure 9.1 Quadruple boosting + regulator connection example
Figure 9.1 Setting conditions
Internal clock : ON (Low output mode)
Booster : ON
Regulator : ON (Select CT0 = -0.05%/°C.)
Power-off method
Set the POFF1X pin to level LOW (VI); all circuits will be turned off.
About regulator
For information about the regulator setting method and notes, see Section 5.4.
Other setting conditions
(1) When using the high output mode
Connect the FC pin to VI.
(2) When changing the temperature coefficient CT
Change the TC1 and TC2 pins as shown in Table 5.3.
CO
+
CREG
+
CI
2
3
4
5
6
7
8
VO
VRI
VREG
RV
V
DD
FC
TC1
TC2
C2P
C2N
C3N
C1N
C1P
POFF1X
POFF2X
VI
161
15
14
13
12
11
10
+
C2
C3
C1
+
+
9
S1F76540M0C Series Technical Manual EPSON 19
(Rev.1.1)
Page 23
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
1
9.2 3rd Boosting + Regulator
Perform 3rd boosting in the negative direction for input voltage VI, and generate the stabilized voltage in the
VREG pin.
Figure 9.2 shows a connection example.
REG
V
+
R1 R2
VDD
VI
Figure 9.2 3rd boosting + regulator connection example
Figure 9.2 Setting conditions
Internal clock : ON (Low output mode)
Booster : ON
Regulator : ON (Select CT0 = -0.05%/°C.)
Power-off method
Set the POFF1X pin to level LOW (VI); all circuits will be turned off.
About regulator
For information about the regulator setting method and notes, see Section 5.4.
Other setting conditions
(1) When using the high output mode
Connect the FC pin to VI.
(2) When changing the temperature coefficient CT
Change the TC1 and TC2 pins as shown in Table 5.3.
CO
+
CREG
+
CI
2
3
4
5
6
7
8
VO
VRI
VREG
RV
V
DD
FC
TC1
TC2
C2P
C2N
X3N
C1N
C1P
VI
POFF1X
POFF2X
161
15
14
13
12
11
10
+
C2
C1
+
9
20 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 24
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
1
9.3 Double Boosting + Regulator
Perform double boosting in the negative direction for input voltage VI, and generate the stabilized voltage in the
REG pin.
V
Figure 9.3 shows a connection example.
REG
V
+
R1 R2
VDD
VI
Figure 9.3 Double boosting + regulator connection example
Figure 9.3 Setting conditions
Internal clock : ON (Low output mode)
Booster : ON
Regulator : ON (Select CT0 = -0.05%/°C.)
Power-off method
Set the POFF1X pin to level LOW (VI); all circuits will be turned off.
About regulator
For information about the regulator setting method and notes, see Section 5.4.
Other setting conditions
(1) When using the high output mode
Connect the FC pin to VI.
(2) When changing the temperature coefficient CT
Change the TC1 and TC2 pins as shown in Table 5.3.
CO
+
CREG
+
CI
2
3
4
5
6
7
8
VO
VRI
VREG
RV
V
DD
FC
TC1
TC2
C2P
C2N
C3N
C1N
C1P
VI
POFF1X
POFF2X
161
15
14
13
12
11
10
C1
+
9
S1F76540M0C Series Technical Manual EPSON 21
(Rev.1.1)
Page 25
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
1
9.4 Quadruple Boosting
Run only the booster, perform quadruple boosting in the negative direction for input voltage VI, and generate
the voltage in the VO pin.
In this case, the regulator is not used, so the voltage containing ripple components is generated in the VO pin.
Figure 9.4 shows a connection example.
VO
VDD
VI
Figure 9.4 Quadruple boosting connection example
Figure 9.4 Setting conditions
Internal clock : ON (Low output mode)
Booster : ON
Regulator : OFF
Power-off method
Set the POFF2X pin to level LOW (VI); all circuits will be turned off.
About ripple voltage
The output voltage to be generated in the VO pin is not stabilized; therefore, it contains the ripple
components shown in Figure 9.5. The ripple voltage VRP increases depending on the load current, and the
approximate value can be obtained in expression (9.1).
VO waveform
VRP＝
2・fCL・CO
IO : Load current (A)
fCL : Clock frequency (Hz)
RCO : Serial equivalent resistance (Ω) of output capacitor CO
Other setting conditions
(1) When using the high output mode
Connect the FC pin to VI.
CO
+
VO
2
VRI
VREG
3
RV
4
5
V
DD
6
+
CI
FC
7
TC1
8
TC2
POFF1X
POFF2X
Figure 9.5 Ripple waveform chart
IO
+ IO × RCO Expression (9.1)
C2P
C2N
C3N
C1N
C1P
VI
161
15
14
13
12
11
10
+
C2
C3
C1
+
+
9
VRP
22 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 26
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
1
9.5 3rd Boosting
Run only the booster, perform 3rd boosting in the negative direction for input voltage VI, and generate the
voltage in the VO pin.
In this case, the regulator is not used, so the voltage containing ripple components is generated in the VO pin.
Figure 9.6 shows a connection example.
VO
VDD
VI
Figure 9.6 3rd boosting connection example
Figure 9.6 Setting conditions
Internal clock : ON (Low output mode)
Booster : ON
Regulator : OFF
Power-off method
Set the POFF2X pin to level LOW (VI); all circuits will be turned off.
About ripple voltage
For ripple voltage, see Section 9.4.
Other setting conditions
(1) When using the high output mode
Connect the FC pin to VI.
+
+
CI
CO
2
3
4
5
6
7
8
VO
VRI
VREG
RV
V
DD
FC
TC1
TC2
C2P
C2N
C3N
C1N
C1P
VI
POFF1X
POFF2X
161
15
14
13
12
11
10
+
C2
C1
+
9
S1F76540M0C Series Technical Manual EPSON 23
(Rev.1.1)
Page 27
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
1
9.6 Double Boosting
Run only the booster, perform double boosting in the negative direction for input voltage VI, and generate the
voltage in the VO pin.
In this case, the regulator is not used, so the voltage containing ripple components is generated in the VO pin.
Figure 9.7 shows a connection example.
VO
VDD
VI
Figure 9.7 Double boosting connection example
Figure 9.7 Setting conditions
Internal clock : ON (Low output mode)
Booster : ON
Regulator : OFF
Power-off method
Set the POFF2X pin to level LOW (VI); all circuits will be turned off.
About ripple voltage
For ripple voltage, see Section 9.4.
Other setting conditions
(1) When using the high output mode
Connect the FC pin to VI.
+
+
CI
CO
2
3
4
5
6
7
8
VO
VRI
VREG
RV
V
DD
FC
TC1
TC2
C2P
C2N
C3N
C1N
C1P
VI
POFF1X
POFF2X
161
15
14
13
12
11
10
C1
+
9
24 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 28
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
X
X
X
X
9.7 Parallel Connection (Boosting Capacity Increase)
The parallel connection is effective when lowering the boosting output impedance or reducing the ripple voltage.
Connecting n S1F76540s in parallel sets the boosting output impedance to approximately 1/n. Only the
smoothing capacitor CO for boosting output can be shared even in parallel connection.
Using the regulator allows you to operate only one of n S1F76540s that are connected in parallel. (Running
multiple regulators in parallel will generate the reactive consumption current.)
Figure 9.8 shows a “quadruple boosting + regulator” connection example where two S1F76540s are connected
in parallel.
Master IC Slave IC
VDD
CO
+
1
VI
CI
VO
2
VRI
3
REG
V
4
RV
5
DD
V
+
6
FC
7
TC1
8
TC2
C2P
C2N
C3N
C1N
C1P
VI
POFF1
POFF2
16
15
14
13
12
11
10
9
+
C2
C3
+
C1
+
CREG
+
R1 R2
Figure 9.8 Parallel connection example
Figure 9.8 Setting conditions
Master IC Slave IC
Internal clock : ON (Low output mode) Internal clock : OFF (Clocks supplied from master IC)
Booster : ON Booster : ON
Regulator : OFF Regulator : ON (Select CT0 = -0.05%/°C.)
Power-off method
In the connection example shown in Figure 9.8, setting S1F76540 in the master IC to POFF2X = L (VI)
enables you to stop boosting the master and slave ICs; however, the regulator in the slave IC does not stop.
When |V
When placing the V
REG| is greater than |VI|, the voltage that is equivalent to VI is generated in the VREG pin.
REG pin into the high impedance state, set both the master and slave ICs to POFF1X = L
and POFF2X = L.
Other setting conditions
(1) When using the high output mode
Connect the FC pin in the master IC to VI.
(2) When changing the temperature coefficient CT
Change the TC1 and TC2 pins in the slave IC as shown in Table 5.3.
REG
V
VO
1
VRI
2
REG
V
3
RV
4
DD
V
5
6
FC
7
TC1
8
TC2
C2P
C2N
C3N
C1N
C1P
POFF1
POFF2
16
+
15
C2’
14
13
12
VI
11
10
9
C1’
C3’
+
+
S1F76540M0C Series Technical Manual EPSON 25
(Rev.1.1)
Page 29
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
1
9.8 High-Magnification Boosting Using a Diode
Loading an external diode in S1F76540 enables the “quintuple or more boosting + regulator” connection. Using
the forward voltage lowering VF in a diode raises the boosting output impedance; therefore, you should load a
diode with the lower VF value.
9.8.1 Quintuple Boosting + Regulator
Figure 9.9 shows a “quintuple boosting + regulator” connection example with one diode used. The cable from
VO to VRI must be as short as possible. Figure 9.10 shows the electric potential relation diagram.
REG
V
R1 R2
CREG
+
VDD
+
CI
VI
2
3
4
5
6
7
8
VO
VRI
VREG
RV
V
DD
FC
TC1
TC2
Figure 9.9 Quintuple boosting connection example using one diode
Figure 9.9 Setting conditions
Internal clock : ON (Low output mode)
Booster : ON
Regulator : ON (Select CT0 = -0.05%/°C.)
V
DD
VI
4VI
VO
5VI
VF
Figure 9.10 Quintuple-boosting potential relation using one diode
C2P
C2N
C3N
C1N
C1P
VI
POFF1X
POFF2X
161
15
14
13
12
11
10
9
5VI－VF
VO
C2
C1
D1
C4
+
C3
+
+
VO’
CO
+
26 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 30
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
Power-off method
Set the POFF1X pin to level LOW (VI); all circuits will be turned off.
Output voltage
When loading a diode for boosting, the diode characteristics directly affect the boosting characteristics.
Especially using the VF pin (forward voltage lowering) in a diode causes the boosting output voltage to be
reduced. In the connection example shown in Figure 9.9, one diode is used; therefore, be sure to drop the
voltage by VF as shown in Figure 9.10. The boosting output voltage is indicated in the following expression.
When increasing | VO’ |, use a diode with the lower VF value.
| VO’ | = 5× | VI | -VF ････････ Expression (9.2)
Precautions
(1) Input and output current conditions
To keep the input and output current ratings, multiply the entire boosting magnification by the output
load current value so that it does not exceed the input current rating when performing high-magnification
boosting using a diode.
In the example shown in Figure 9.9, “80mA ÷ 5 = 16mA” is used as the maximum load current.
(2) Input and output voltage conditions
To keep the input and output voltage ratings, be aware of the potential relation when performing
high-magnification boosting using a diode.
In the circuit shown in Figure 9.9, VI must satisfy input voltage conditions (see Table 7.1) at quintuple
boosting.
Other setting conditions
(1) When using the high output mode
Connect the FC pin to VI.
(2) When changing the temperature coefficient CT
Change the TC1 and TC2 pins as shown in Table 5.3.
S1F76540M0C Series Technical Manual EPSON 27
(Rev.1.1)
Page 31
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
1
9.8.2 Sextuple Boosting + Regulator
Figure 9.11 shows a “sextuple boosting + regulator” connection example with two diodes used. The cable from
VO to VRI must be as short as possible. Figure 9.12 shows the electric potential relation diagram.
2
3
4
5
6
7
8
VO
VRI
VREG
RV
V
DD
FC
TC1
TC2
REG
V
VDD
VI
CREG
+
R1 R2
+
CI
Figure 9.11 Sextuple boosting connection example using two diodes
Figure 9.11 Setting conditions
Internal clock : ON (Low output mode)
Booster : ON
Regulator : ON (Select CT0 = -0.05%/°C.)
VDD
VI
4VI
VO
6VI
Figure 9.12 Sextuple-boosting potential relation using two diodes
POFF1X
POFF2X
2×VF
C2P
C2N
C3N
C1N
C1P
VI
161
15
14
13
12
11
10
9
6VI −(2×VF)
+
C2
C1
+
+
VO’
C4
C3
+
D1
D2
C5
+
VO’
CO
+
28 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 32
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
Power-off method
Set the POFF1X pin to level LOW (VI); all circuits will be turned off.
Output voltage
When loading diodes for boosting, the diode characteristics directly affect the boosting characteristics.
Especially using the VF pin (forward voltage lowering) in a diode causes the boosting output voltage to be
reduced. In the example shown in Figure 9.11, two diodes are used; therefore, be sure to drop the voltage by
2 × VF as shown in Figure 9.12. The boosting power voltage is indicated in the following expression.
When increasing | VO’ | , use a diode with the lower VF value.
| VO’ | = 6× | VI | -2×VF ････････ Expression (9.3)
Precautions
(1) Input and output current conditions
To keep the input and output current ratings, multiply the entire boosting magnification by the output
load current value so that it does not exceed the input current rating when performing high-magnification
boosting using diodes.
In the example shown in Figure 9.11, “80mA ÷ 6 = 13.3mA” is used as the maximum load current.
(2) Input and output voltage conditions
To keep the input and output voltage ratings, be aware of the potential relation when performing
high-magnification boosting using a diode.
In the circuit shown in Figure 9.11, VI must satisfy input voltage conditions (see Table 7.1) at sextuple
boosting.
Other setting conditions
(1) When using the high output mode
Connect the FC pin to VI.
(2) When changing the temperature coefficient CT
Change the TC1 and TC2 pins as shown in Table 5.3.
S1F76540M0C Series Technical Manual EPSON 29
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Page 33
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
1
9.9 Positive Voltage Converter
S1F76540 boosts to the positive electric potential side using an external diode; however, it cannot use the
regulator function.
Figure 9.13 shows a “positive 3rd boosting” connection example, and Figure 9.14 shows the electric potential
relation diagram.
D2 D1
VDD
+
CI
VI
2
3
4
5
6
7
8
VO
VRI
VREG
RV
V
DD
FC
TC1
TC2
C2P
C2N
C3N
C1N
C1P
VI
POFF1X
POFF2X
161
15
14
13
12
11
10
9
+
C2
Figure 9.13 Positive voltage conversion connection example (3rd boosting)
Figure 9.14 Setting conditions
Internal clock : ON (Low output mode)
Booster : ON
Regulator : OFF
3VI
3×VF
VO’
VDD
3VI− (3×VF)
VI
Figure 9.14 Electric potential relation diagram of positive voltage conversion connection example
(3rd boosting)
C1
D3
VO’
CO
30 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 34
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
Power-off method
Set the POFF2X pin to level LOW (VI); all circuits will be turned off.
For double boosting:
When performing double boosting, delete C2 and D1 shown in Figure 9.13, and connect the D2 anode
(positive pole) side to V
Output voltage
In the positive voltage conversion, the diode characteristics directly affect the boosting characteristics.
Especially using the VF pin (forward voltage lowering) in a diode causes the boosting output voltage to be
reduced. In the example shown in Figure 9.11, three diodes are used; therefore, be sure to drop the voltage
by 3 × VF as shown in Figure 9.12. The boosting power voltage is indicated in the following expression.
| VO’ | When increasing | VO’ | , use a diode with the lower VF value.
| VO’ | = 3× | VI | -3×VF ････････ Expression (9.4)
Precautions
(1) Input and output current conditions
To keep the input and output current ratings, take care so that the input current does not exceed the
rating.
(2) Input voltage conditions
For positive voltage conversion, the input voltage rating is equal to for the negative double-boosting.
(See Table 7.1.)
Other setting conditions
(1) When using the high output mode
Connect the FC pin to VI.
DD.
S1F76540M0C Series Technical Manual EPSON 31
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Page 35
9. REFERENCE: EXTERNAL CONNECTION EXAMPLES
1
9.10 Connection Example when Changing the Regulator Temperature Coefficient
The temperature coefficient of the regulator is determined depending on that of the internal reference voltage as
described in Section 5.3.
When setting the other temperature coefficient, use a thermistor resistor, etc. as shown in Figure 9.15.
V
REG
+
R1 R2
VDD
+
CI
VI
Figure 9.15 Connection Example when Changing the Regulator Temperature Coefficient
Figure 9.15 Setting conditions
Internal clock : ON (Low output mode)
Booster : ON
Regulator : ON
Thermistor resistor : RT
Power-off method
Set the POFF1X pin to level LOW (VI); all circuits will be turned off.
Regulator temperature coefficient
For information about the basic regulator setting method and notes, see Section 5.4.
The temperature characteristics of the thermistor resistor RT indicate the nonlinearity. When
compensating the linear characteristics, insert the RP shown in Figure 9.15.
Other setting conditions
(1) When using the high output mode
Connect the FC pin to VI.
CO
+
CREG
RP
RT
2
3
4
5
6
7
8
VO
VRI
VREG
RV
V
DD
FC
TC1
TC2
C2P
C2N
C3N
C1N
C1P
POFF1X
POFF2X
VI
161
15
14
13
12
11
10
+
C2
C3
C1
+
+
9
32 EPSON S1F76540M0C Series Technical Manual
(Rev.1.1)
Page 36
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