Information in this document is subject to change without notice. You may download and use this document, but only for your own use in
evaluating Seiko Epson/EPSON products. You may not modify the document. Epson Research and Development, Inc. disclaims any
representation that the contents of this document are accurate or current. The Programs/Technologies described in this document may contain
material protected under U.S. and/or International Patent laws.
EPSON is a registered trademark of Seiko Epson Corporation. All other trademarks are the property of their respective owners.
Revision 1.0
Page 2Epson Research and Development
Vancouver Design Center
S1D13742S5U13742P00C100 Evaluation Board User Manual
X63A-G-002-01Issue Date: 2007/08/15
Revision 1.0
Epson Research and DevelopmentPage 3
Vancouver Design Center
S5U13742P00C100 Evaluation Board User ManualS1D13742
Issue Date: 2007/08/15 X63A-G-002-01
Revision 1.0
Page 4Epson Research and Development
Vancouver Design Center
S1D13742S5U13742P00C100 Evaluation Board User Manual
X63A-G-002-01Issue Date: 2007/08/15
Revision 1.0
Epson Research and DevelopmentPage 5
Vancouver Design Center
1 Introduction
This manual describes the setup and operation of the S5U13742P00C100 Evaluation
Board. The evaluation board is designed as an evaluation platform for the S1D13742
Mobile Graphics Engine.
The S5U13742P00C100 evaluation boar d can be used with many native platfor ms vi a the
host connector which provides the appropriate signals to support a variety of CPUs. The
S5U13742P00C100 evaluation board can also connect to the S5U13U00P00C100 USB
Adapter board so that it can be used with a laptop or desktop computer, via USB 2.0.
This user manual is updated as appropriate. Please check the Epson Research and Development Website at www.erd.epson.com for the latest revision of this document before
beginning any development.
We appreciate your comments on our documentation. Please contact us via email at
documentation@erd.epson.com.
S5U13742P00C100 Evaluation Board User ManualS1D13742
Issue Date: 2007/08/15 X63A-G-002-01
Revision 1.0
Page 6Epson Research and Development
Vancouver Design Center
2 Features
The S5U13742P00C100 Evaluation Board includes the following features:
• 121-pin FCBGA S1D13742 Mobile Graphics Engine
• Header with all S1D13742 Host Bus Interface signals
• Headers for connection to the S5U13U00P00C100 USB Adapter board
• Headers for connecting to LCD panels
• Header for S1D13742 GPIO pins (optional)
• On-board 4MHz oscillator
• 14-pin DIP socket (if a clock other than 4MHz must be used)
• 3.3V input power
• On-board voltage regulator with 1.5V output
• On-board voltage regulator with adjustable 6~24V output, 40mA max., to provide
power for LED backlight of LCD panels.
S1D13742S5U13742P00C100 Evaluation Board User Manual
X63A-G-002-01Issue Date: 2007/08/15
Revision 1.0
Epson Research and DevelopmentPage 7
Vancouver Design Center
3 Installation and Configuration
The S5U13742P00C100 evaluation board incorporates a DIP switch, jumpers, and 0 ohm
resistors which allow it to be used with a variety of different configurations.
3.1 Configuration DIP Switch
The S1D13742 has 3 configuration inputs (CNF[2:0]). A DIP switch (SW1) is used to
configure CNF[2:0] as described below.
Table 3-1: Summary of Power-On/Reset Options
SDU13742P00C100
SW1-[4:1] Config
SW1-[1]CNF0
SW1-[2]CNF1Host Data is 16-bitHost data is 8-bit
SW1-[3]CNF2PIOVDD output current = 6.5mAPIOVDD output current = 2.5mA
SW1-[4]-not used
S1D13742
CNF[2:0] Config
1 (ON)0 (OFF)
Host Data lines are normalHost data lines are swapped
Power-On/Reset State
DIP Switch
SW1
= Required settings when using S5U13U00P00C100 USB Adapter board
The following figure shows the location of DIP switch SW1 on the S5U13742P00C100
board.
= Required settings when using S5U13U00P00C100 USB Adapter board
3.3VDD—
3.3VDD—
COREVDD current
measurement
PLLVDD current
measurement
IOVDD current
measurement
PIOVDD current
measurement
S1D13742S5U13742P00C100 Evaluation Board User Manual
X63A-G-002-01Issue Date: 2007/08/15
Revision 1.0
Epson Research and DevelopmentPage 9
Vancouver Design Center
JP1, JP2, JP3, JP5 - Power Supplies for the S1D13742
JP1, JP2, JP3, JP5 can be used to measure the current consumption of each S1D13742
power supply.
When the jumper is at position 1-2, normal operation is selected.
When no jumper is installed, the current consumption for each power supply can be
measured by connecting an ammeter to pin 1 and 2 of the jumper.
The jumper associated with each power supply is as follows:
JP1 for COREVDD
JP2 for PLLVDD
JP3 for IOVDD
JP5 for PIOVDD