Epson S1D13700 User's & Technical Manual

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MF1542-01

LCD Controller ICs

S1D13700

Technical Manual

Page 2

No part of this material may be reproduced or duplicated in any form or by any means without the written permission of Seiko Epson. Seiko Epson reserves the right to make changes to this material without notice. Seiko Epson does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products under the control of the Foreign Exchange and Foreign Trade Law of Japan and may require an export license from the Ministry of International Trade and Industry or other approval from another government agency.

✽ In this manual, Zilog's Z80-CPU or its equivalent shall be called Z80, Intel's 8085A or its equivalent shall

be called 8085 and Motorola's MC6809 and MC6802 or their equivalents shall be called 6809 and 6802, respectively. ® stands for registered trade mark. All other product names mentioned herein are trademarks and/or registered trademarks of their respective owners.

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Configuration of product number

Devices

S1 D 13706 F 00A0 00

Evaluation Board

S5U 13705 P00C0 00

Packing specification Specification Package (B: CSP, F: QFP) Corresponding model number Model name (D: driver, digital products) Product classification (S1: semiconductor)

Packing specification Specification Corresponding model number (13705: for S1D13705) Product classification (S5U: development tool for semiconductor)

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CONTENTS

1 Overview...............................................................................................................................1

1.1 Features.......................................................................................................................................1

1.2 System Overview.........................................................................................................................2

1.3 List of Abbreviations.....................................................................................................................4

2 Pins .......................................................................................................................................5

2.1 Pin Connection.............................................................................................................................5

2.1.1 Pin Assignments.............................................................................................................5

2.1.2 Pin Description...............................................................................................................6

2.1.3 Package Dimensions......................................................................................................8

2.2 Pin Functions...............................................................................................................................9

2.2.1 Power Supply Pins .........................................................................................................9

2.2.2 Oscillator and Clock Input Pins ......................................................................................9

2.2.3 System Bus Connecting Pins.......................................................................................10

2.2.4 LCD Driver Control Pins...............................................................................................13

2.2.5 TEST Control Pins........................................................................................................13

3 Commands and Command Registers..............................................................................14

3.1 Types of Commands (when Indirectly Interfaced)......................................................................14

3.2 Command Register Map (when Directly Interfaced)..................................................................15

3.3 Command Description ...............................................................................................................17

3.3.1 Operation Control Commands......................................................................................17

3.3.2 Display Control Commands..........................................................................................25

3.3.3 Drawing Control Commands........................................................................................43

3.3.4 Memory Control Commands ........................................................................................44

4 Function Description.........................................................................................................45

4.1 Display Functions.......................................................................................................................45

4.1.1 Screen Management....................................................................................................45

4.1.2 Character Generator (CG)............................................................................................47

4.1.3 Screen Conﬁguration....................................................................................................50

4.1.4 Cursor...........................................................................................................................61

4.1.5 Relationship between Display Memory and Screens...................................................62

4.1.6 Determining Various Parameters..................................................................................64

4.1.7 Scrolling........................................................................................................................65

4.1.8 Attribute Display using the Layered Function...............................................................68

4.2 Oscillator Circuit.........................................................................................................................70

4.3 Example of Initial Settings..........................................................................................................71

4.4 Character Codes and Character Fonts......................................................................................81

4.4.1 Character Fonts (Internal CG)......................................................................................81

4.4.2 Character Codes..........................................................................................................82

5 Speciﬁcations.....................................................................................................................83

5.1 Absolute Maximum Ratings.......................................................................................................83

5.2 Recommended Operating Conditions........................................................................................83

5.3 Electrical Characteristics ...........................................................................................................84

5.4 Timing Characteristics ...............................................................................................................86

5.4.1 System Bus (Generic Bus/80-series MPU)..................................................................86

5.4.2 System Bus Read/write characteristics II (MC68K-series MPU)..................................89

5.4.3 External Clock Input Characteristics ............................................................................92

5.4.4 LCD Control Signal Timing Characteristics..................................................................93

6 MPU Interface.....................................................................................................................95

6.1 Connection to the System Bus...................................................................................................95

6.1.1 80-series MPU..............................................................................................................95

6.1.2 68-series MPU..............................................................................................................95

6.2 Interfaces with the MPU (Reference).........................................................................................96

S1D13700 Technical Manual

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CONTENTS

Table of Figures

Figure 1-1 Block diagram of the S1D13700 ............................................................................................ 2

Figure 3-1 Combination of IV and HDOT SCR...................................................................................... 20

Figure 3-2 Typical relationship between FX/FY and display addresses................................................ 21

Figure 3-3 Example of screen compositions ......................................................................................... 37

Figure 3-4 Prioritized overlay ................................................................................................................ 38

Figure 4-1 Character display ([FX] ≤ 8 dots) ......................................................................................... 45

Figure 4-2 Example of character generator definition ........................................................................... 45

Figure 4-3 Example of character configuration consisting of two or more memory addresses

(when [FX] = 9) ................................................................................................................... 46

Figure 4-4 Relationship between virtual and physical screens ............................................................. 50

Figure 4-5 Basic read cycle of display memory..................................................................................... 60

Figure 4-6 Relationship between TC/R and C/R................................................................................... 60

Figure 4-7 Relationship between display memory and screens............................................................ 62

Figure 4-8 Window and display memory settings.................................................................................. 63

Figure 4-9 Example of display memory mapping.................................................................................. 63

Figure 4-10 Example of using HDOT SCR ([FX] = 8).............................................................................. 67

List of Tables

Table 3-1 W/S Related Registers ......................................................................................................... 20

Table 4-1 Row Select Addresses ......................................................................................................... 48

Table 4-2 Example of Parameters for the LCD Unit ............................................................................. 64

Table 4-3 Character Codes .................................................................................................................. 82

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S1D13700 Technical Manual

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1: OVERVIEW

VERVIEW

The S1D13700 Controller displays text and graphics on a midsize, dot-matrix liquid crystal display (LCD). A very ﬂexible, low-power display system can be conﬁgured using the S1D13700 in combination with various LCD modules. The character code or bitmap display data from the microprocessor is temporarily stored in frame buffer memory, then periodically read out and converted into LCD module signals for output to the LCD. Its abundant command functions make it possible to overlay the text and graphic screens, scroll the screen in any direction (except in grayscale mode), and split the screen for multi-window display, as well as display pictures in grayscale mode. Moreover , the embedded-type 32-KB SRAM display buffer , built-in LCD module control circuit, and high-speed character generator allow you to build an LCD control block with only a few external circuits.

1.1 Features

●

Number of display dots:...........................Text display mode

●

Three display modes: ..............................Text display mode, graphic display mode, and text/

●

Grayscale display function: ....................1 bpp, 2 bpp, or 4 bpp selectable

●

Flexible scroll function: ..........................The text/graphics display screen can be easily moved

●

Frame buffer: ..........................................Up to 32 KB of SRAM, virtual screen conﬁguration

●

Internal character generator: ...................160 characters (Internal mask ROM dots 5 x 7 dots) +

●

Drive duty cycle: .....................................Can be set without any required increments from 1/2

●

MPU interface .........................................Generic, 6800 series or M68K series

●

Power supply voltage ..............................5 V/3.3 V (dual power supplies) with MPU interface

●

Package: ..................................................64-pin QFP13 (Pd-free)

80 columns x 30 rows (monochrome, 1 bpp) 40 columns x 30 rows (4 gray shades, 2 bpp) 30 columns x 20 rows (16 gray shades, 4 bpp) + graphic screen overlay

Graphic display mode 640 dots x 240 dots (monochrome, 1 bpp) 320 dots x 240 dots (4 gray shades, 2 bpp) 240 dots x 160 dots (16 gray shades, 4 bpp) x threescreen overlay

graphic overlay mode (Layered display functions)

and smoothly scrolled horizontally.

64 characters (internal CGRAM 8 dots x 16 dots) or 256 characters (internal CGRAM 8 dots x 16 dots)

up to 1/256 duty cycles.

Direct access or indirect access selectable

and LCD interface pins independently selectable or

3.3 V (single power supply)

S1D13700 Technical Manual

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1: OVERVIEW

1.2 System Overview

Positioned midway between the MPU and LCD panel, the S1D13700 enables the sending and receiving of control commands and data, and access of registers by the MPU for display, thus making it possible to control up to 32 Kbytes of internal display memory (VRAM).

Moreover, because the S1D13700 has a built-in a control circuit for LCD units, it is possible to take full advantage of the features of midsize, dot-matrix liquid crystal display units without using any external circuit.

EPDAT# to FFDAT0

FESHIFT

LCD

XECL

YSCL

FPLINE

EPFLAME

MOD

YDIS

Video RAM

Arbitrate

Display Address

Character

Generator RAM

Generator

Generator ROM

Cursor Address

Controller

Microprocessor Interface

Figure 1-1 Block diagram of the S1D13700

Character

Layered

Controller

LCD Controller

Layered

GrayScale

FRM Controller

AB0 to AB15

DB0 to DB7

CS#

RD#

WR#

AS#

WAIT#

Dot Clock Generator

Dot Counter

RESET#

CNF0 to CFN4

TSTEN

Internal Clock

Oscillator

CLK1

XCO1

XCD1

The S1D13700 divides the display memory space into the four areas shown below. When this conﬁguration is combined with the layered (overlaid) display and ﬂexible scroll functions of the S1D13700, it is possible to greatly reduce the MPU load when inverting or underlining text, displaying graphs with text, or creating simple animation.

The S1D13700 uses the display memory space by dividing it into the four areas shown below to realize the layered display functions using only a single controller.

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S1D13700 Technical Manual

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Example of display memory mapping by the S1D13700

(1)Character code table

• A memory area to store character code when displaying text

• 1 character = 8 bits

• Variable table mapping (by altering the scroll start address)

(2)Graphic data table

• A memory area to store bitmap data

• 1 word = 8 bits

• Variable table mapping

(3)CG RAM table (for external characters)

• A character generator whose character patterns can be altered by the MPU as desired

• Maximum 8 x 16 bits (16 bytes per character)

• Maximum 64 discrete characters, or 256 characters when not using CGROM

• Internal CG RAM used

• Variable table mapping

(4)CG ROM table

• Maximum 5 x 7 bits

• Maximum 160 characters

• Mapped to addresses 8030h–85AFh. Data cannot be read out by the MPU.

1: OVERVIEW

To make the most of the above-mentioned functions of the S1D13700, a high-speed interfacing method is used to enable pipelined command processing between the MPU and S1D13700. Most commands of the S1D13700 are processed so that the controller completes the processing of any input command before the next command is issued from the MPU. Therefore, the MPU does not need to frequently check the status of the S1D13700, and is not kept waiting by the S1D13700. Thus, the high-speed interfacing method adopted for the S1D13700 helps minimize possible reduction in the MPU’s processing capability.

Moreover, the MPU can access the above display space at any time irrespective of display mode (except in sleep mode).

S1D13700 Technical Manual

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1: OVERVIEW

1.3 List of Abbreviations

Abbreviation Meaning

............................ Address

•AB

•AP

............................ Address pitch

.............................. Text display mode (Denotes a command in command code descriptions.)

•C

............................ Cursor movement direction

•CD

•CG

............................ Character generator

• CGRAM ADR

........................... Cursor shape

•CM

• C/R

........................... Number of characters per line

......................... Cursor size in the X direction

• CRX

.......................... Cursor size in the Y direction

•CRY

• CSRDIR

• CSRFORM

• CSRR

• CSRW

•DM

•FC

•f

•FP

•FY

•G

• GLC

• HDOT SCR

•IV

•L

• L/F

• MREAD

•MX

• MWRITE

•OV

• OVRAY

•P

•R

• RAM

•ROM

• SAD

•SL

• TC/R

• VRAM

• MOD(WF)

• W/S

• XDr

• YDr

........................ Cursor address read

........................... Display mode

............................ Flashing cursor

............................ Frame frequency

.......................... Oscillation frequency

OSC

............................. Layer ﬂashing

............................ Character ﬁeld in the Y direction

.............................. Graphic display mode

.......................... Graphic liquid crystal unit controller

............................. Inverse

............................... Layer

............................ Number of lines per screen

........................... Screen composition method

............................ Screen overlay

............................... Parameter

.............................. Row

......................... Random access memory

......................... Read-only memory

.......................... Display start address

............................. Number of scanning lines

......................... Total number of characters per line

.......................... Double common/single common

.......................... X direction driver

.......................... Y direction driver

........... Character generator memory offset address

.................... Direction of cursor movement

................ Cursor shape

....................... Cursor address write

............... Smooth scrolling in horizontal direction

.................... Display memory readout

.................. Display memory write

..................... Screen overlay

...................... Display memory

................. AC drive waveform

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S1D13700 Technical Manual

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2: PINS

INS

2.1 Pin Connection

2.1.1 Pin Assignments

WAI T#

HIOV

CNF0 CNF1 CNF2 CNF3 CNF4

AB15 AB14 AB13

DB3 DB2 DB1 DB0

DD1

AS#

HIOVDD

DB4

DB5

DB6

DB7

CS#

WR#

S1D13700F00A

Index

RD#

COREVDD

CLKI

TESTEN

SCANEN

RESET#

XCG1

XCD1

16 1

NIOVDD YDIS FPFRAME YSCL V

MOD FPLI NE COREV XECL FPSHI FT NIOV FPDAT0 FPDAT1 FPDAT2 FPDAT3 V

S1D13700 Technical Manual

VSS

AB12

AB11

AB9

AB10

AB8

HIOVDD

EPSON

AB7

AB6

AB5

AB4

AB3

AB2

AB1

COREVDD

AB0

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2: PINS

2.1.2 Pin Description

Key :

I = O = IO = P = HIBC = HIBH = HIBCD1 = HOB2T = HBC2T = HTB2T =

Input Output Input/output Power supply CMOS input CMOS Schmitt input CMOS input with pulldown resistor (60 ohms typ. at 5.0 V) Normal buffer (8 mA/-8 mA at 5 V) LVTTL I/O buffer (6 mA/-6 mA at 3.3 V) Tri-state output (6 mA/-6 mA at 3.3 V)

HLIN = Transparent input HLOT = Transparent output ITST1 =

Pin Name Pin No.

HIOVDD(VDD) NIOVDD(V

COREVDD(V

XCG1(XG) 35 I HIOVDD HLOT — Gate input for oscillator XCD1(XD) 34 O HIOVDD HLIN — Drain output for oscillator

CNF0 – CNF4

(SEL0 – SEL4)

DB0 – DB7

(D0 – D7)

AB0 – AB15

(A0 – A15)

FPDAT0 –

FPDAT3(XD0 – XD3)

FPSHIFT(XSCL) 23 O NIOVDD HOB2T X Shift clock for X driver

FPLINE(LP) 26 O NIOVDD HOB2T X Latch pulse

MOD(WF) 27 O NIOVDD HOB2T X Frame signal

FPFRAME (YD) 30 O NIOVDD HOB2T X Scan start pulse

CLKI 39 I HIOVDD HIBH — Externally sourced system clock

RD# 41 I HIOVDD HIBH 1 Read strobe for MPU interface

WR# 42 I HIOVDD HIBH 1 Write strobe for MPU interface

CS# 43 I HIOVDD HIBH 1 Chip select for MPU interface

WAIT# 54 O HIOVDD HOB2T Hi-Z Wait output for MPU interface

AS# 61 I HIOVDD HIBC 1

XECL 24 O NIOVDD HOB2T X X driver enable chain clock

YSCL 29 O NIOVDD HOB2T X Scan shift clock

Test mode control input with pulldown resistor (50 ohms typ. at 3.3 V)

I/O

I/O Voltage I/O Cell

Type

7 • 48 • 55 P HIOVDD — — Power supply for host interface

)

22 • 32 P NIOVDD — — Power supply for LCD interface

)

12 • 25 • 40 P COREVDD — — Power supply for core logic 1 • 17 • 28 • 33 • 53 P

56-60 I HIOVDD HIBH 0 Input pin for S1D13700 settings

44-47 • 49-52 IO HIOVDD HBC2T Hi-Z Data bus for MPU interface

2-6 • 8-11 • 13-16 I HIOVDD HIBC 0 Address bus for MPU interface

18-21 O NIOVDD HOB2T X Data bus for X driver

RESET#

State

— — Ground

Address strobe for MPU interface

Description

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S1D13700 Technical Manual

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2: PINS

Pin Name Pin No.

YDIS 31 O NIOVDD HOB2T L LCD power-down output

RESET# (RES) 36 I HIOVDD HIBH 0 Reset input

TESTEN 38 I HIOVDD ITST1 0 Test mode setup input

SCANEN 37 I HIOVDD HIBCD1 0 Test mode setup input

I/O

I/O Voltage I/O Cell

Type

RESET#

State

Description

Note: The corresponding pin names of the earlier LCD controller (i.e., S1D13305) are enclosed in

parentheses.

S1D13700

Technical Manual EPSON 7

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2: PINS

2.1.3 Package Dimensions

49 PIN

64 PIN

48 PIN

1 PIN

33 PIN

32 PIN

17 PIN

ICL

16 PIN

Amax

A1 A2

Symbol

* *

E 10.1 10.2 10.3

D 10.1 10.2 10.3

Amax 1.2

AL 0.1 AP 0.9 1 1.1

e 0.5

ICL 0.17 0.2 0.27

CL 0.125 0.15 0.2 É∆ 0° 10°

L 0.3 0.5 0.7 L1 1 L2 0.5

HE 11.6 12 12.4

HD 11.6 12 12.4

É∆2 15° É∆3 15°

R 0.1 R1 0.1

Dimension in Milimeters

Min. Nom. Max.

E,D Excluding the tie bar cutting stub. ICL Lead width of basemetal. CL Lead thickness of basemetal.

1 = 1mm

8 EPSON S1D13700 Technical Manual

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2.2 Pin Functions

2.2.1 Power Supply Pins

Pin Name Function

HIOVDD

NIOVDD

COREVDD Power supply for internal logic. Connect a 3.3 V power supply to this pin. Note 1

Note 1: Because the spike power supply current in the S1D13700 could reach levels that are several

tens higher than the average amount of dynamically consumed current, measures must be taken to minimize the power supply impedance of the S1D13700. For example, use thick power supply wiring from the power supply to the S1D13700 or insert a capacitor of 0.47 mF or more (with good frequency characteristics) between V These measures will help to reduce power supply impedance.

2.2.2 Oscillator and Clock Input Pins

CLKI Generally used as the input clock source for the bus and memory clocks.

XCG1 XCD1

Power supply for host interface I/O drive. Connect a 5 V or 3.3 V power supply to this pin. (Shared with MPU power supply pin, VCC) Note 1

Power supply for LCD I/O drive other than host of interface I/O. Connect a 5 V or 3.3 V power supply to this pin. Note 1

Connects to 0 V earth ground (GND).

and VSS close to the S1D13700.

These pins are used to connect a crystal resonator for the internal clock-generating oscillator. For details, see Section 4.2 “Oscillator Circuit” on page 70. To use the external clock (fed in from the CLKI pin), ﬁx XCG1 for input with a pullup resistor and leave XCD1 open. Note 2

Input, active low Set the frequency divide ratio of the display clock (pixel clock) relativ e to CLKI or an internally gener ated system clock.

2: PINS

CNF0 CNF1

CNF3 CNF2 Clock Retio

0 0 1/4 0 1 1/8 1 0 1/16 1 1 Not USE

Note 2: Because the external clock fed in from the CLKI pin is needed to internally generate the

fundamental timing in the S1D13700, the oscillation characteristic requirements given in Section 5.4.3 “External Clock Input Characteristics” on page 92 must be met.

S1D13700 Technical Manual EPSON 9

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2: PINS

2.2.3 System Bus Connecting Pins

DB0 – DB7

CNF2 CNF3

Tristate input/output, active high These pins comprise an 8-bit bidirectional data bus, which is connected to the 8-bit or 16-bit MPU data bus.

Input, active high The S1D13700 allows the MPU interface format to be changed depending on how CNF2 and CNF3 are set, so that it can be connected directly to the 80-series MPU (e.g., Z80 or 6802), or the MC68K-series MPU (68000) bus.

CNF3 CNF2 Mode

0 0 80 series ↑↑↑↑↑↑ ↑– 01 * ****** ** 1 0 6800 ↑↑E R/W# ↑↑ –– 1 1 MC68K ↑↑LDS# R/W# ↑↑DTACK# ↑

Settings marked with * are inhibited.

AB15

– AB1

AB0 RD# WR# CS#

or GenericBus), 68-series MPU (6809

DB7

– DB0

WAIT# AS#

Note 3

Note 3: Normally, CNF2 and CNF3 should be corrected directly to power supply VDD or VSS to prevent

the mixture of noise. Should noise be mixed in, insert a capacitor between the CNF2 and

CNF3 lines and V

, as close to the IC pins as possible. This will help to effectively eliminate

noise.

AB15 – AB1

AB0

Input, active high Normally, the MPU address bus is connected to these pins. The data bus signal is discriminated by a combination of RD# and WR# signals, or R/W#, E, and LDS signals, as listed in the table below.

Input: CNF4 = 0 selects direct access; CNF4 = 1 selects indirect access. <Direct access for the 80-series interface>

CMF4

CNF4

*AB15–AB0 are used as register addresses.

CNF4

AB15

– AB1

0 0or1 0or1 0 1

0 0or1 0or1 1 0 Write to command/parameter registers

AB15

– AB1

1–001 –

1–101

1–010

1–110Command write (code only)

AB0 RD# WR# Function

Read from command/parameter registers

AB0 RD# WR# Function

Data (display data and cursor address) read

Data (display data and parameter) write

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Input: CNF4 = 0 selects direct access; CNF4 = 1 selects indirect access. <Direct access for the 68-series interface>

2: PINS

CMF4

RD# (E)

WR# (R/W#)

CS#

CNF4

AB15

– AB1

0 0or1 0or1 1 1

AB0

WR#

(R/W#)

RD#

(E)

Read from command/parameter registers

Function

0 0or1 0or1 0 1 Write to command/parameter registers

*A15–A0 are used as register addresses.

CNF4

AB15

– AB1

AB0

WR#

(R/W#)

RD#

(E)

Function

1–011 –

1–111

1–001

Data (display data and cursor address) read

Data (display data and parameter) write

1–101Command write (code only)

• When the 80-series MPU is connected Input, active low This is the strobe signal used by the MPU as it reads data or status ﬂags from the S1D13700. The data bus of the S1D13700 is in output mode while this signal remains low.

• When the 68-series MPU is connected Input, active high This is an enable clock input pin of the 68-series MPU.

• When the MC68K-series MPU is connected Input, active low Normally, this is an LDS# input pin of the MC68K-series MPU.

• When the 80-series MPU is connected Input, active low This is the strobe signal used by the 80-series MPU as it writes data or parameters to the S1D13700. The S1D13700 latches the data bus signal at the rising edge of WR#.

• When the 68-series MPU is connected Input This is a R/W# control signal input pin of the 68-series MPU. R/W# = HIGH : READ R/W# = LOW : WRITE

• When the MC68K-series MPU is connected Input This is a R/W# control signal input pin of the MC68K-series MPU. R/W# = HIGH : READ R/W# = LOW : WRITE

Input, active low This chip select signal is used by the MPU to activate the S1D13700 before accessing it, and is normally derived by decoding the address bus signal.

S1D13700 Technical Manual EPSON 11

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2: PINS

This signal forcibly inserts a wait state into the system during data transfer. When this signal is deasserted, data transfer is completed. After data transfer is complete, this signal is left free (placed in high-impedance state).

• When the 80-series MPU is connected Tri-state output, active low (wait state when asserted low)

WAIT#

AS#

RESET#

Connect this pin to WAIT# of the 80-series MPU.

• When the 68-series MPU is connected Unused. Therefore, leave this pin open.

• When the MC68K-series MPU is connected Tri-state output, active low (no wait state when asserted low) This pin serves as the DTACK# pin of the MC68K-series MPU.

• When the 80-series MPU is connected Unused. Therefore, ﬁx this pin low.

• When the 68-series MPU is connected Unused. Therefore, ﬁx this pin low.

• When the MC68K-series MPU is connected Input, active low Connect this pin to the address strobe AS# pin of the MC68K-series MPU.

Input, active low The RESET# input is used to initially reset the S1D13700 in hardware.

Note 4: Although this pin is a Schmitt trigger input to prevent the S1D13700 from being inavertently

reset by noise, care must be taken when intentionally lowering the power supply voltage.

Note 4

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Page 18

2.2.4 LCD Driver Control Pins

The S1D13700 can directly control both the X and Y drivers based on an enable chain, which is a method of effectively reducing the amount of current consumption needed to drive dot-matrix liquid crystal display elements.

2: PINS

FPDAT0 –

FPDAT3

FPSHIFT

XECL

FPLINE

MOD

YSCL

FPFRAME

YDIS

Output, active high This 4-bit dot data bus for the X driver (column driver) is connected to the data input pins of the X driver.

Output, falling edge triggered This signal causes the dot data bus signals (FPDAT0–FPDAT3) to be stored in the X driver at the signal’s falling edge, and thus functions as a shift clock for the internal shift register of the X driver. To reduce power consumption, this clock is turned off until the MPU starts sending data for the next display line after outputting the LP signal. (For details, see Section 5.4.4 “LCD Control Signal Timing Characteristics” on page 93.)

Output, falling edge triggered XECL is a dedicated clock signal for the X drivers cascaded by an enable chain. It causes the enable signal to be successively passed to the next X driver every 16 XSCL periods.

Output, falling edge triggered For the liquid crystal display elements to be successively driven, the X driver contains a circuit to latch each output bit of the internal shift register at the falling edge of LP. This signal is output for every display line.

Output This signal provides a one-frame interval for the X and Y drivers to determine the AC drive waveform for the LCD panel. Two types of cyclic signals are output depending on how the System Set command parameters are set.

Output, active high, rising edge triggered This signal is a clock for the Y driver, and is equivalent to XSCL for the X driver. The Y data signal (YD) is stored in the Y driver at the beginning of a frame, and YSCL is used as an internal shift clock.

Output, active high YD is data for the Y driver, and is a cyclic signal output at the first display line interval of a frame. The electrodes on the common side of liquid crystal display elements are sequentially scanned as the YD signal is sequentially shifted inside the Y driver synchronously with the YSCL signal.

Output, active high This signal is used to power down the LCD unit and is held high during the display period. Note 5

Note 5: The YDIS signal goes low at a time equivalent to one to two frames after the sleep command is

written. When the YDIS signal goes low, all Y driver outputs are forcibly brought to an intermediate level (unselected), thus causing display to turn off. Therefore, to power off the LCD unit, the liquid crystal drive power supply (with relatively large steady-state current) must be turned off at the same time display is turned off by using the YDIS signal.

2.2.5 TEST Control Pins

TESTEN

SCANEN

S1D13700 Technical Manual EPSON 13

Input, active high Test-enable input used only for production testing (with type-1 pulldown resistor, 50 ohms typ. at 3.3 V).

Page 19

3: COMMANDS AND COMMAND REGISTERS

3COMMANDS AND COMMAND REGISTERS

3.1 Types of Commands (when Indirectly Interfaced)

When indirect mode is selected for the system interface, use commands to set up the display. The table below lists the types of commands, including the code of each command.

Purpose Command

Operation

control

Display

control

Drawing

control

Memory

control

SYSTM SET 1 0 1 0 1 0 0 0 0 0 0 40 SLEEP IN 1 0 1 0 1 0 1 0 0 1 1 53 Sleep operation. 0 27 Note 1

DISPON/OFF 1 0 1 0 1 0 1 1 0 0 D

SCROLL 1 0 1 0 1 0 0 0 1 0 0 44

CSRFORM 1 0 1 0 1 0 1 1 1 0 1 5D

CSRDIR 1 0 1

OVLAY 1 0 1 0 1 0 1 1 0 1 1 5B

CGRAM ADR

HDOT SCR 1 0 1 0 1 0 1 1 0 1 0 5A

GRAY SCALE

CSRW 1 0 1 0 1 0 0 0 1 1 0 46

CSRR 1 0 1 0 1 0 0 0 1 1 1 47

MWRITE 1 0 1 0 1 0 0 0 0 1 0 42

MREAD 1 0 1 0 1 0 0 0 0 1 1 43

Code

WR# RD# AB0

1 0 1 0 1 0 1 1 1 0 0 5C

1 0 1 0 1 1 0 0 0 0 0 60 Sets grayscale mode. 0 45

DB BIN

7 6 5 4 3 2 1 0DBHEX

58 •

CD CD

01001110

4C – 4FSets the direction of

Command

description

Sets initial operation and window size.

Instructs to turn display on or off and make the screen flash on and off.

Sets the display start address and display area.

Sets the cursor shape, etc.

cursor movement. Instructs screen

overlay mode. Sets the start address

of CG RAM. Sets the horizontal

direction dot unit and scroll position.

Sets the cursor address.

Instructs to read the cursor address.

Instructs to write to display memory.

Instructs to read display memory data.

Parameters

following the

command

No. of

parameters

819

1 28 Note 1

10 29

237

038

139

243

144

2 45 Note 1

2 46 Note 1

— 47 Note 1

—47

Remarks

See

pages

Note 1: As a r ule, each command is executed every time a parameter for the command is input to the

S1D13700, and completed before the next parameter (P) or command (C) is input. Therefore, the MPU can stop sending parameters in the middle and send the next command. In this case, the parameters that have already been sent are effective and other parameters not input to the S1D13700 retain their original values. However, two-byte parameters are handled as described below.

Note 1:

1. CSRW and CSRR commands: The parameter is executed one byte at a time. Therefore, the MPU can only alter or check the low-order byte.

2. Commands other than CSRW and CSRR: The parameter is not executed until its second byte is input.

SYSTEM SET SCROLL CGRAM ADR

3. Two-byte parameters consist of two bytes of data (as in the case of APL and APH).

4. Because the value of each register after power-on is indeterminate, make sure all command parameters are set.

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3: COMMANDS AND COMMAND REGISTERS

3.2 Command Register Map (when Directly Interfaced)

When direct mode is selected for the system interface, directly access the registers to set up the display.

Address

0 x 8000 0 x 10

0 x 8001 0 x 00

0 x 8002 0 x 00

0 x 8003 0 x 00

0 x 8004 0 x 00

0 x 8005 0 x 00

0 x 8006 0 x 00

0 x 8007 0 x 00

0 x 8008 *

0 x 8009 0 x 00 r_DispOnOff 0000000

0 x 800A 0 x 00

0 x 800B 0 x 00 r_P1_Scroll

0 x 800C *

Hard

Reset

R_P1_ SystemSet

R_P2_ SystemSet

R_P3_ SystemSet

R_P4_ SystemSet

R_P5_ SystemSet

R_P6_ SystemSet

R_P7_ SystemSet

R_P8_ SystemSet

0 x 01 R_SleepIn 0000000

r_P1_ DispOnOff

0 0 IV 1 WSM2M1M0

WF 0 0 0 FX

0000 FY

TCR

APL

APH

FP5 FP4 FP3 FP2 FP1 FP0 FC1 FC0

SAD1L A7SAD1L A6SAD1L A5SAD1L A4SAD1L A3SAD1L A2SAD1L A1SAD1L

0 x 00 r_P2_Scroll

SAD1H

A15

SAD1H

A14

SAD1H

A13

SAD1H

A12

SAD1H

A11

SAD1H

A10

SAD1H A9SAD1H

Sleep

Disp

0 x 800D 0 x 00 r_P3_Scroll SL1L7 SL1L6 SL1L5 SL1L4 SL1L3 SL1L2 SL1L1 SL1L0

0 x 800E 0 x 00 r_P4_Scroll

0 x 800F *

0 x 00 r_P5_Scroll

SAD2L A7SAD2L A6SAD2L A5SAD2L A4SAD2L A3SAD2L A2SAD2L A1SAD2L

SAD2H

A15

SAD2H

A14

SAD2H

A13

SAD2H

A12

SAD2H

A11

SAD2H

A10

SAD2H A9SAD2H

0 x 8010 0 x 00 r_P6_Scroll SL2L7 SL2L6 SL2L5 SL2L4 SL2L3 SL2L2 SL2L1 SL2L0

0 x 8011 0 x 00 r_P7_Scroll

0 x 8012 *

0 x 00 r_P8_Scroll

0 x 8013 0 x 00 r_P9_Scroll

0 x 8014 *

0 x 8015 0 x 00

0 x 8016 0 x 00

0 x 00 r_P10_Scroll

r_P1_ CsrForm

r_P2_ CsrForm

SAD3L A7SAD3L A6SAD3L A5SAD3L A4SAD3L A3SAD3L A2SAD3L A1SAD3L

SAD3H

A15

SAD3H

A14

SAD3H

A13

SAD3H

A12

SAD3H

A11

SAD3H

A10

SAD3H A9SAD3H

SAD4L A7SAD4L A6SAD4L A5SAD4L A4SAD4L A3SAD4L A2SAD4L A1SAD4L

SAD4H

A15

SAD4H

A14

SAD4H

A13

SAD4H

A12

SAD4H

A11

SAD4H

A10

SAD4H A9SAD4H

0000CRX3 CRX2 CRX1 CRX0

CM 0 0 0 CRY3 CRY2 CRY1 CRY0

0 x 8017 0 x 00 r_P1_CsrDir 000000CD1CD2 0 x 8018 0 x 00 r_P1_OvLay 0 0 0 OV DM2 DM1 MX1 MX0

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3: COMMANDS AND COMMAND REGISTERS

Address

0 x 8019 0 x 00

0 x 801A *

0 x 801B 0 x 00 r_P1_HdotScr 00000D2D1D0

0 x 801C *

0 x 801D *

0 x 801E *

0 x 801F *

0 x 8020 0 x 00

*1 To ensure that two bytes are set at the same time, the low-order byte is ﬁxed when the high-order byte is written. *2 SLEEPIN = 0: Clock enable

*3 CSRW: Write only (00h when read), CSRR: read only (write invalid).

Other registers can be written to or read from (in units of bits).

Hard

Reset

r_P1_ CGRAMAdr

0 x 00

0 x 00 r_P1_CSRW

0 x 00 r_P2_CSRW

0 x 00 r_P1_CSRR

0 x 00 r_P2_CSRR

r_P2_ CGRAMAdr

r_P1_ GrayScale

Using the internal oscillator circuit causes the oscillator to start oscillating. Using an externally sourced clock causes the clock to propagate to the internal circuits. The internal timing circuit is released from reset status by writing to any register after setting SLEEPIN = 0. (Therefore, internal SRAM cannot be accessed until that time.)

SAGLA7SAGLA6SAGLA5SAGLA4SAGLA3SAGLA2SAGLA1SAGL

SAGH

A15

CSRLA7CSRLA6CSRLA5CSRLA4CSRLA3CSRLA2CSRLA1CSRL

CSRH

A15

CSRLA7CSRLA6CSRLA5CSRLA4CSRLA3CSRLA2CSRLA1CSRL

CSRH

A15

SAGH

A14

CSRH

A14

CSRH

A14

000000BPP1 BPP0

SAGH

A13

CSRH

A13

CSRH

A13

SAGH

A12

CSRH

A12

CSRH

A12

SAGH

A11

CSRH

A11

CSRH

A11

SAGH

A10

CSRH

A10

CSRH

A10

SAGH A9SAGH

CSRHA9CSRH

The following shows the relationship between memory and register maps in the S1D13700.

(MSB DB7 – LSB DB0)

0000h

Display RAM

Area

7FFFh

8000h

802Fh

0x8021 – 0x802F Reserve

8030h

(CGROM Area)

85AFh

85B0h

Not Use

FFFFh

S1D13700 Memory Mapping (AB15 – AB0)

* The S1D13700 ignores any attempt to access address space 8030h–FFFFh. This address space ma y be employed as

a user area, but because there is no negate output availab le for the WAIT# pin of the S1D13700, inhibit access to this address space when not in use.

16 EPSON S1D13700 Technical Manual

Page 22

3.3 Command Description

3.3.1 Operation Control Commands

SYSTEM SET

This command and the parameters that follow specify initial reset of the device, set the window size, and the method of connecting with the LCD unit. This command determines the fundamental operation of the S1D13700. Therefore, if this command is incorrectly set, the functions of other commands may not work normally.

3: COMMANDS AND COMMAND REGISTERS

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

0100

00IV1W/S M2 M1 M0

WF0000

0000

C/R

TC/R

L/F

000

Address

––

0x8000

0x8001

0x8002

0x8003

0x8004

0x8005

r_P1_SystemSet

bit5 : IV bit3 : WS bit2 : M2 bit1 : M1 bit0 : M0

r_P2_SystemSet

bit7 : WF bit2-0 : FX

r_P3_SystemSet

bit3-0 : FX

r_P4_SystemSet

bit7-0 : CR

r_P5_SystemSet

bit7-0 : TCR

r_P6_SystemSet

bit7-0 : LF

APL

APH

0x8006

0x8007

r_P7_SystemSet

bit7-0 : APL

r_P8_SystemSet

bit7-0 : APH

● C The command alone has the following initial reset functions:

• Resets the internal timing circuit.

• Turns display off.

• Deactivates sleep mode (internal operation stopped state) (thus starting the oscillator). To deactivate sleep mode, make sure the command and one parameter (P1) are input. In direct interface mode, clearing the SleepIn bit has the same effect.

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3: COMMANDS AND COMMAND REGISTERS

[Parameter P1]

●M0 Specify the CG ROM to be used for display. Although internal CG ROM can generate 160

discrete character fonts (each consisting of 5 x 7 dots as shown in Section 4.4.1 “Character Fonts (Internal CG)” on page 81), internal CG RAM may be used when different character fonts or more characters (up to 256) are needed.

M0 0: Internal CG ROM (160 characters) + internal CG RAM (64 characters)

1: Internal CG RAM (256 characters)

Note: When the CG area is mapped in the display memory space, the memory area

available to store display data is reduced by the amount of CG area mapped.

●M1 Selects the CG RAM deﬁnition area where the user can deﬁne any desired character pattern.

The CG RAM code may be selected from the 64 discrete codes assigned in Section 4.4.2 “Character Codes” on page 82.

M1 0: Without bit D6 correction The CG RAM1 and CG RAM2 areas are noncontiguous.

1: With bit D6 correction The CG RAM1 and CG RAM2 areas are contiguous.

●M2 Select the CG size in the Y direction for more economical use of internal CG RAM. CGs whose

sizes in the Y direction are 17 dots or more cannot be handled with the character codes of the S1D13700. In such case, characters may be decomposed into bit images and displayed in graphic display mode of the S1D13700.

Only CG RAM1 is handled as CG RAM, with CG RAM2 handled as CG ROM.

Both CG RAM1 and RAM2 are handled as CG RAM.

The table below summarizes bank conﬁgurations by M1, M2, and M3.

Bank conﬁgurations

M2 M1 M0

Internal

000

External

Internal

010

External

M2 0: 8 dots

ROM

RAM

ROM

RAM

1: 16 dots

10 – 1F 20 – 2F 30 – 3F 40 – 4F 50 – 5F

160 characters (5 x 7 x 160)

64 characters (8 x 6 x 64)

160 characters (5 x 7 x 160) Same as shown above.

64 characters (6 x 8 x 64)

60 – 6F 70 – 7F A0 – AF B0 – BF C0 – CF D0 – DF

SAG+ { [80 – 8F], Row [2 : 0]}

[90 – 9F] [E0 – EF] [F0 – FF]

SAG+ { [A0 – AF], Row [2 : 0]}

[B0 – BF] [C0 – CF] [D0 – DF]

Internal ROM used Without correction Y size = 8

Internal ROM used With correction Y size = 8

18 EPSON S1D13700 Technical Manual

Page 24

M2 M1 M0

100

110

001

011

101

111

Internal

ROM

External

RAM

Internal

ROM

External

RAM

External

RAM

External

RAM

External

RAM

External

RAM

3: COMMANDS AND COMMAND REGISTERS

160 characters (5 x 7 x 160) Same as shown above.

SAG+ { [80 – 8F], Row [3 : 0]}

64 characters (6 x 8 x 64)

160 characters (5 x 7 x 160) Same as shown above.

SAG+ { [A0 – AF], Row [3 : 0]}

64 characters (6 x 16 x 64)

256 characters (8 x 8 x 256) F000 – F7FF

256 characters (8 x 16 x 256) F000 – FFFF

[90 – 9F] [E0 – EF] [F0 – FF]

[B0 – BF] [C0 – CF] [D0 – DF]

Internal ROM used Without correction Y size = 16

Internal ROM used With correction Y size = 16

External RAM Without correction Y size = 8

External RAM With correction Y size = 8

External RAM Without correction Y size = 16

External RAM With correction Y size = 16

M1 = 0 M1 = 1 (code [6] converted)

00 – 0F 00000000 – 00001111 Blank 40 – 4F 00000000 – 00001111 ROM 10 – 1F 00010000 – 00011111 ROM 50 – 5F 01010000 – 01011111 ROM 20 – 2F 00100000 – 00101111 ROM 60 – 6F 01100000 – 01101111 ROM 30 – 3F 00110000 – 00111111 ROM 70 – 7F 01110000 – 01111111 ROM 40 – 4F 01000000 – 01001111 ROM 00 – 0F 00000000 – 00001111 Blank 50 – 5F 01010000 – 01011111 ROM 10 – 1F 00010000 – 00011111 ROM 60 – 6F 01100000 – 01101111 ROM 20 – 2F 00100000 – 00101111 ROM 70 – 7F 01110000 – 01111111 ROM 30 – 3F 00110000 – 00111111 ROM 80 – 8F 10000000 – 10001111 RAM C0 – CF 11000000 – 11001111 ROM 90 – 9F 10010000 – 10011111 RAM D0 – DF 11010000 – 11011111 ROM A0 – AF 10100000 – 10101111 ROM E0 – EF 11100000 – 11101111 RAM B0 – BF 10110000 – 10111111 ROM F0 – FF 11110000 – 11111111 RAM C0 – CF 11000000 – 11001111 ROM 80 – 8F 10000000 – 10001111 RAM D0 – DF 11010000 – 11011111 ROM 90 – 9F 10010000 – 10011111 RAM E0 – EF 11100000 – 11101111 RAM A0 – AF 10100000 – 10101111 ROM F0 – FF 11110000 – 11111111 RAM B0 – BF 10110000 – 10111111 ROM

*M1: The 6th bit of the character code is automatically converted by hardware.

The memory area accessed changes.

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3: COMMANDS AND COMMAND REGISTERS

●W/S Selects the LCD unit drive method.

W/S 0: Single-screen drive method

1: Dual-screen drive method

Table 3-1 W/S Related Registers

Parameter

C/R C/R C/R C/R C/R TC/R TC/R TC/R TC/R TC/R L/F L/F L/F L/F L/F SL1 00H – L/F 00H – L/F + 1 (L/F)/2 (L/F)/2 SL2 00H – L/F 00H – L/F + 1 (L/F)/2 (L/F)/2 SAD1 First screen block First screen block First screen block First screen block SAD2 Second screen block Second screen block Second screen block Second screen block SAD3 Third screen block Third screen block Third screen block Third screen block SAD4 Invalid Invalid Fourth screen block Fourth screen block

Cursor Successively movable on all screens

IV = 1 IV = 0 IV = 1 IV = 0

W/S = 0 W/S = 1

Upper/lower screen configuration: Successively

movable on all screens

Note: 1. For details on how to set C/R and TC/R when using the HDOT SCR command, see Section

4.1.6 “Determining Various Parameters” on page 64.

2. The SL value for IV = 0 is the SL value for IV = 1 plus 1.

●IV Corrects the screen origin during inverse display. Normally set IV = 1.

The most effective way to display characters in inverse video is to use a unique function of the S1D13700 that allows the text screen and graphics back-layered screen to be exclusive OR’d. However, because the character origin is at the upper-left corner of the screen when characters are mapped on the screen by the S1D13700, the uppermost line and leftmost column on the display screen do not have dots to draw the outline of characters, thus making the displayed characters illegible. Therefore, the S1D13700 uses the IV speciﬁcation and horizontal direction dot scroll function (HDOTSCR command) to shift the origin of the text screen for correction with respect to the graphics back-layered screen, allowing characters to be displayed in inverse video anywhere on the screen. For details, see Section 4.1.7 “Scrolling” on page 65.

IV 0: Uppermost line of screen corrected

1: Uppermost line of screen not corrected

Origin of the screen

Background layer

1 dot

HDOT SCR

Text

1 – 7 dots

Figure 3-1 Combination of IV and HDOT SCR

Note: If the leftmost column must also be corrected, shift dots in the horizontal direction.

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3: COMMANDS AND COMMAND REGISTERS

[Parameter P2]

●FX Deﬁnes the size of the character ﬁeld in the X direction (i.e., size of one character including a

space).

HEX

00 01

•

BIN

D4 D3 D2 D1 D0

00000 00001

•••••

00111

Number of dots

[FX]

1 2

•

• 8

Structure of the character ﬁeld

1. Because the S1D13700 processes the display data in 8-bit units, if the character font exceeds 8 bits, the text screen must conﬁgure one character with two or more display memory addresses as normally practiced. In this case, odd-numbered bits less than a unit of 8 bits are not displayed as shown below. Oddnumbered bits less than a unit of 8 bits are also not displayed on the back-layered screen as shown below.

2. In graphic display mode, the character ﬁeld must normally be 8 bits long. For other character ﬁelds, oddnumbered bits less than a unit of 8 bits are not displayed.

8 bits 8 bits 8 bits

Not displayed

Address A

Address B

Address C

Figure 3-2 Typical relationship between FX/FY and display addresses

In grayscale mode, FX must be ﬁxed to ‘00111’ (8 dots).

●WF Speciﬁes the AC drive method of the liquid crystal.

WF 0: Line inversion drive method

1: Two-frame AC drive method (method B)

The two-frame AC drive method is an AC drive method in which the half period of the WF signal constitutes a one-frame interval. Normally, set WF = 1.

The line inversion drive method is a modiﬁed AC drive method in which the WF signal has its waveform inverted every 16 Y lines.

Note: Although the LCD ma y look better when WF is set to 0, stripes in the X direction

will appear when the LCD drive voltage is high or viewing angle large.

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3: COMMANDS AND COMMAND REGISTERS

[Parameter P3]

●FY Deﬁnes the size of the character ﬁeld in the Y direction.

HEX

00 01

•

• 0E 0F

BIN

D3 D2 D1 D0

0000 0001

••••

0111

•••• 1110 1111

Number of dots

[FX]

1 2

•

• 8

• 15 16

[Parameter P4]

C/R Deﬁnes the display interval in the X direction by indicating the number of display characters

●

counted in address units, as described in the section on parameter FX. When [FX] = 10 dots, for example, two memory addresses are counted per character. For details on how to calculate the [C/R] value, see Section 4.1.6 “Determining Various Parameters” on page 64. The value set for this parameter cannot be greater than the calculated [C/R] value, but can be equal to or less than the calculated [C/R] value. In that case, excess display sections are left blank.

HEX

00 01

•

BIN

D7 D6 D5 D4 D3 D2 D1 D0

00000000 00000001

••••••••

•••••••• 01001111

••••••••

•••••••• 11101110 11101111

Characters per line

[C/R]

1 2

•

• 239 240

Note: 1.Make sure the number of dots in excess display sections is within 64.

2. For grayscale to be set to 2 Bpp or 4 Bpp, the set value of CR must be increased. CR (bytes) = [ (Panel Width) /8pixel character]*Bpp

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3: COMMANDS AND COMMAND REGISTERS

[Parameter P5]

●TC/R The condition [TC/R] ≥ [C/R] + 4 must always be met.

To minimize the amount of current consumed by the S1D13700 and LCD unit for a given display capacity, the S1D13700’s oscillation frequency (fosc) must be adjusted. Moreover, because the one-frame time (1/f according to the equation to calculate [TC/R] as described in Chapter 4 and adjust the S1D13700’s divide-by-n ratio.

) must be made constant to prevent ﬂicker, deﬁne [TC/R]

HEX

00 01

•

• FE FF

BIN

D7 D6 D5 D4 D3 D2 D1 D0

00000000 00000001

••••••••

•••••••• 01010010

••••••••

•••••••• 11111110 11111111

Characters per line

[TC/R]

1 2

•

• 255 256

[Parameter P6]

●L/F Deﬁnes the display interval in the Y direction by indicating the number of display lines per

screen.

HEX

00 01

•

• FE FF

BIN

D7 D6 D5 D4 D3 D2 D1 D0

00000000 00000001

••••••••

01111111

••••••••

•••••••• 11111110 11111111

Number of lines

per screen

1 2

•

128

•

• 255 256

Note: When W/S = 1, [L/F] must be deﬁned as an even number because dual-screen

display is assumed.

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3: COMMANDS AND COMMAND REGISTERS

[Parameters P7, P8]

●AP Deﬁnes the number of memory addresses in the X direction of a virtual screen.

MSB LSB

D0D1D2D3D4D5D6D7

APL AP7 AP6 AP5 AP4 AP3 AP2 AP1 AP0

APH AP15 AP14 AP13 AP12 AP11 AP10 AP9 AP8

HEX Number of memory

APH APL

0 0 0 0

• •

0 0

• •

• • F F F F

0 0 0 1

• •

5 0

• •

• • F E F F

addresses per line

[AP]

0 1

•

-2

216-1

Display screen

C/R

Defined area of display memory

SLEEP IN

●C When this command is input, the S1D13700 blanks the display for at least a one-frame period,

then stops all internal operations including clock oscillation before entering sleep mode. At this time, the LCD unit sends OFF data to the X driver while simultaneously sending the YDIS signal to the Y driver to turn the bias voltage off. Therefore, in no case will unexpected display remain on the screen when the liquid crystal is powered off by the YDIS signal.

In sleep mode, the S1D13700 registers retain the original state before entering sleep mode. Moreover, the display memory control pins are ﬁxed high or low to maintain the integrity of data stored in display memory.

To restore the S1D13700 from sleep mode, write the command and one parameter (P1) of the SYSTEM SET to the S1D13700 once to immediately wake up the S1D13700. In direct interface mode, the S1D13700 can be restored from sleep mode by clearing the SleepIn bit. However, display memory cannot be accessed immediately after exiting sleep mode. The display RAM space (0000h–7FFFh) can be accessed by ﬁrst accessing any other register once. To restore display, execute the DISP ON command immediately after exiting sleep mode.

Regardless of whether the S1D13700 is directly or indirectly interfaced, the entire screen must be set to the ON state before entering sleep mode. When in indirect interface mode, issue the DISP ON command. When in direct interface mode, set the DispOn bit to 1 before entering sleep mode.

MSB LSB

Address Register name

D7 D6 D5 D4 D3 D2 D1 D0

01010011

0x8008

r_SleepIn

bit0 : SleepIn

Note: 1. The YDIS signal goes low at a time equivalent to one to two fr ames after the sleep command

is written. When the YDIS signal goes low, all Y driver outputs are f orcibly brought to an inter-

24 EPSON S1D13700 Technical Manual

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3: COMMANDS AND COMMAND REGISTERS

mediate level (unselected), causing display to turn off. Therefore, for the LCD unit to be powered down, the liquid crystal drive power supply (with relatively large steady-state current) must be turned off at the same time display is turned off by using the YDIS signal.

2. If the drive power supply of the liquid crystal remains on in sleep mode, a DC component may be applied to the LCD panel because all internal operations of the S1D13700 have been stopped in that mode. When priority is placed on reliability, however, the liquid crystal drive power supply must be turned off before writing the sleep command to prevent DC components from being applied to the LCD panel.

3. Although the bus is placed in the high-impedance state during sleep mode, some voltage may be supplied to the bus line for a bus with pull-up/pull-down resistors.

3.3.2 Display Control Commands

DISP ON/OFF

This command turns display of the entire screen on or off. The parameters that follow this command turn the cursor and each layered screen on or off individually, and

select the cursor blink rate and screen ﬂashing rate. Setting a blink rate and ﬂashing rate makes area ﬂashing possible (i.e., ﬂashing one entire line) instead of ﬂashing just one character by means of cursor display.

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

01011000

FP5 FP4 FP3 FP2 FP1 FP0 FC1 FC0

●C

D 0: Disables entire screen display.

1: Restores entire screen display.

Note: Parameter D (to disable entire screen display) has priority over parameter FP. Note: When the entire screen display is disabled (D=0), po wer to the panel is off (YDIS

= 0 level) and the panel timing signal is off.

[Parameter P1]

●FC Selects turning the cursor on or off and deﬁnes a blink rate.

FC1, FC0 Cursor display

00 01 10 11

OFF (blank)

Blinking off

Blink at fFR/32 Hz (approx. 2 Hz) Blink at fFR/64 Hz (approx. 1 Hz)

Cusor blink on/off ratio

ON : OFF = 7 : 3

Address Register name

0x8009

0x800A

r_DispOnOff

bit0 : DispOn

r_P1_DispOnOff

bit7-2 : FP5-FP0 bit1-0 : FC1-FC0

Note: As the MWRITE command always enab les the cursor, the cursor position can be

checked, even when performing consecutive writes to display memory while the cursor is ﬂashing.

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3: COMMANDS AND COMMAND REGISTERS

Note: To display the cursor in direct interface mode, read or write data to the frame

buffer. This action causes the cursor to move automatically to that position.

●FP

FP1, FP0 FP3, FP2 FP5, FP4

00 01 10 11

First screen block (SAD1) Second screen block (SAD2, SAD4) Note Third screen block (SAD3)

Screen display off (blank)

Screen flashing off

Display on

Flash at fFR/32 Hz (approx. 2 Hz) Flash at fFR/4 Hz (approx. 15 Hz)

Screen ﬂashing on/off ratio

ON:OFF = 7:3

Note: Although SAD4 is assumed when W/S = 1, the screens speciﬁed by SAD2 and

SAD4 cannot be made to ﬂash independently of each other due to simultaneous control by parameters FP2 and FP3.

26 EPSON S1D13700 Technical Manual

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3: COMMANDS AND COMMAND REGISTERS

SCROLL

●C Deﬁnes the scroll start address (SAD) and number of lines per block to be scrolled (SL).

Parameters P1 through P10 can be omitted when not required. Howev er, the parameters must be set sequentially as shown below.

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

01000100

A7 A6 A5 A4 A3 A2 A1 A0

(SAD1L)

A15 A14 A13 A12 A11 A10 A9 A8

(SAD1H)

L7 L6 L5 L4 L3 L2 L1 L0

A7 A6 A5 A4 A3 A2 A1 A0

(SAD2L)

A15 A14 A13 A12 A11 A10 A9 A8

(SAD2H)

L7 L6 L5 L4 L3 L2 L1 L0

A7 A6 A5 A4 A3 A2 A1 A0

(SAD3L)

(SL1)

(SL2)

Address

––

0x800B

0x800C

0x800D

0x800E

0x800F

0x8010

0x8011

r_P1_Scroll

bit7-0 : A7-A0

r_P2_Scroll

bit7-0 : A15-A8

r_P3_Scroll

bit7-0 : L7-L0

r_P4_Scroll

bit7-0 : A7-A0

r_P5_Scroll

bit7-0 : A15-A8

r_P6_Scroll

bit7-0 : L7-L0

r_P7_Scroll

bit7-0 : A7-A0

A15 A14 A13 A12 A11 A10 A9 A8

A7 A6 A5 A4 A3 A2 A1 A0

A15 A14 A13 A12 A11 A10 A9 A8

P10

(SAD3H)

(SAD4L) Note

(SAD4H)

Note

0x8012

0x8013

0x8014

r_P8_Scroll

bit7-0 : A15-A8

r_P9_Scroll

bit7-0 : A7-A0

r_P10_Scroll

bit7-0 : A15-A8

Note: Parameters P9 and P10 must be set only when the dual-screen drive method (W/S = 1)

and two-layered conﬁguration are selected. SAD4 deﬁnes the four th screen block display start address.

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3: COMMANDS AND COMMAND REGISTERS

HEX

L7 L6 L5 L4 L3 L2 L1 L0

00000000

00000001

•

••••••••

•

••••••••

01111111

•

••••••••

•

••••••••

11111110

11111111

BIN

Number of lines

[SL]

1 2

•

128

•

• 255 256

The next page shows the relationship between display modes and SAD and SL.

28 EPSON S1D13700 Technical Manual

Page 34

[Display modes]

3: COMMANDS AND COMMAND REGISTERS

W/S

DM2, 1

0 0

W/S

DM2, 1

First layer Second layer

First screen block

Second screen block

Third screen block

(split)

SAD1

SL1

SAD3 Note 1

When not using split screens, set both SL1 and SL2 to L/F + 1.

<Example of screen conﬁguration> Note 3

SAD2

SAD1

SL1

SAD3

First layer Second layer

First screen block

Second screen block

Third screen block

(split)

SAD1

SL1

SAD3 Note 1

When not using split screens, set both SL1 and SL2 to L/F + 1.

Second screen block

(graphics)

First screen block

(text)

Third screen block

(text)

SAD2

SL2

SAD2

SL2

<Example of screen conﬁguration> Note 3

0 0

SAD2

SAD1

SL1

SAD3

S1D13700 Technical Manual EPSON 29

Second screen block

(graphics)

First screen block

(graphics)

Third screen block

(text)

SL2

Page 35

3: COMMANDS AND COMMAND REGISTERS

W/S

DM2, 1

0 0

W/S

DM2, 1

First layer Second layer

First screen block

Second screen block

Third screen block

(split)

SAD1

SL1

SAD3 Note 1

When not using split screens, set both SL1 and SL2 to L/F + 1.

<Example of screen conﬁguration> Note 3

SAD2

SAD1

SL1

SAD3

First layer Second layer

First screen block

Second screen block

Third screen block

(split)

SAD1

SL1

SAD3 Note 1

SL1 ≤ SL2

Second screen block

(graphics)

First screen block

(text)

Third screen block

(graphics)

SAD2

SL2

SAD2

SL2

<Example of screen conﬁguration> Note 3

0 0

SAD1

SAD3

SAD2

SL1

Second screen block

(graphics)

First screen block

(graphics)

Third screen block

(graphics)

SL2

30 EPSON S1D13700 Technical Manual

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3: COMMANDS AND COMMAND REGISTERS

W/S

DM2, 1

0 0

W/S

DM2, 1

1 0

First layer Second layer

First screen block

Second screen block

Third screen block

(split)

SAD1

SL1

SAD3 Note 1

SL1 > SL2

<Example of screen conﬁguration> Note 3

SAD2

SAD1

SL1

SAD3

Second screen block

(graphics)

First screen block

(graphics)

Blank

First layer Second layer

Upper screen

SAD1

SL1

Lower screen SAD3 Note 2 SAD4 Note 2

<Example of screen conﬁguration> Note 3

SAD2

SAD1

SL1

SAD3

Second screen block

(graphics)

First screen block

(text)

Third screen block

(text)

SAD2

SL2

Third screen block

(graphics)

SAD2

SL2

Fourth screen block

(graphics)

(SAD4)

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3: COMMANDS AND COMMAND REGISTERS

W/S

DM2, 1

1 0

W/S

DM2, 1

1 0

First layer Second layer

Upper screen

SAD1

SL1

Lower screen SAD3 Note 2 SAD4 Note 2

<Example of screen conﬁguration> Note 3

SAD2

SAD1

SL1

SAD3

Second screen block

(graphics)

First screen block

(graphics)

Third screen block

(text)

First layer Second layer

Upper screen

SAD1

SL1

Lower screen SAD3 Note 2 SAD4 Note 2

<Example of screen conﬁguration> Note 3

SAD2

SAD1

SL1

SAD3

Second screen block

(graphics)

First screen block

(text)

Third screen block

(graphics)

SAD2

SL2

Fourth screen block

(graphics)

(SAD4)

SAD2

SL2

Fourth screen block

(graphics)

(SAD4)

32 EPSON S1D13700 Technical Manual

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3: COMMANDS AND COMMAND REGISTERS

W/S

DM2, 1

1 0

W/S

DM2, 1

0 1

First layer Second layer

Upper screen

SAD1

SL1

Lower screen SAD3 Note 2 SAD4 Note 2

<Example of screen conﬁguration> Note 3

SAD2

SAD1

SL1

SAD3

Second screen block

(graphics)

First screen block

(graphics)

Third screen block

(graphics)

First layer Second layer Third layer

Three-layer composition

SAD1

SL1

SAD2

SL2

<Example of screen conﬁguration> Note 3

SAD1

SAD2

SL1

SAD3

First screen block

(graphics)

Second screen block (graphics)

Third screen block (graphics)

SAD2

SL2

Fourth screen block

(graphics)

(SAD4)

SAD3

SL2

Note 1: SAD3 is added to SL1 or SL2 (whichever has the fewest lines). Note 2: Parameters corresponding to SL3 and SL4 are determined by L/F, and thus

need not be set.

Note 3: When W/S = 1, the differences between SL1 and (L/F) / 2 and between SL2 and

(L/F) / 2 are blanked.

SL1

L/F

(L/F)/2

S1D13700 Technical Manual EPSON 33

Upper screen

Blanked

Lower screen

Page 39

3: COMMANDS AND COMMAND REGISTERS

No. WS OV DM2 DM1 Panel Layer (block3,block1)

10000Single 2 (char, char) 20001Single 2 (char, graph) 30010Single 2 (graph, char) 40011Single 2 (graph, graph) 50100Single 2 ↑No.1 60101Single 2 ↑No.2 70110Single 2 ↑No.3 80111Single 3 (graph, graph,graph)

91000Dual 2 (char, char) 101001Dual 2 (char, graph) 111010Dual 2 (graph, char) 121011Dual 2 (graph, graph) 131100Dual 2 ↑No.9 141101Dual 2 ↑No.10 151110Dual 2 ↑No.11 161111Dual 2 ↑No.12

CSRFORM

Deﬁnes the size and shape of the cursor displayed. Although the cursor is normally used in text display mode, the S1D13700 can also display the cursor in

graphic display mode to display kanji and other special characters.

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

01011101

0 0 0 0 X3 X2 X1 X0

CM0 0 0 Y3Y2Y1Y0

Address

––

0x8015

r_P1_CsrForm

bit3-0 : CRX3-CRX0

0x8016

r_P2_CsrForm

bit7 : CM bit3-0 : CRX3-CRX0

34 EPSON S1D13700 Technical Manual

Page 40

3: COMMANDS AND COMMAND REGISTERS

[Parameter P1]

CRX Deﬁnes the size of the cursor in the X direction by the number of dots counted from the

●

character origin. Always make sure that CRX ≤ FX.

HEX

0 1

• 4

•

BIN

X3 X2 X1 X0

0000 0001

••••

0100

•••• 1110 1111

Number of dots

[CRX]

1 2

• 5

• 15 16

[Parameter P2]

●

CRY Deﬁnes the display line position of an underscored cursor in a character ﬁeld by the number of

dots counted from the character origin, or the size of a block cursor in the Y direction by the number of dots counted from the character origin.

HEX

0 1

• 8

• E F

●

CM Deﬁnes the cursor shape.

BIN

Y3 Y2 Y1 Y0

0000 0001

••••

1000

•••• 1110 1111

Number of dots

[CRX]

Illegal

•

• 15 16

Character origin

S1D13700

Technical Manual

CM 0: Underscore cursor

1: Block cursor

The S1D13700 allows CM to be set to either 0 or 1 on the graphic display screen. If CRY < FY when CM is set to 1 on the text display screen, the set value of FY has priority.

EPSON

[CRX] = 5 dots [CRY] = 9 dots CM = 0

Page 41

3: COMMANDS AND COMMAND REGISTERS

CSRDIR

●C Speciﬁes the direction in which the cursor address counter is automatically shifted. When

horizontal screen movement is speciﬁed, the cursor address is shifted –1 or +1 by the S1D13700 internal arithmetic/logic circuit. When vertical screen movement is speciﬁed, the cursor address is made to jump as many as the number of memory addresses deﬁned by the address pitch (AP). Therefore, when accessing display memory successively in a given direction, it is only necessary to set the start address ﬁrst. Then the cursor address need not be set by the MPU from the next data on.

MSB LSB

Address Register name

D7 D6 D5 D4 D3 D2 D1 D0

0 1 0 0 1 1 CD1 CD2

0x8017

r_P1_CsrDir

bit1-0 : CD1-CD2

-AP

0001

+AP

HEX

4C 4D

4E 4F

BIN

CD1 CD2

00 01 10 11

Shift direction

Right

Left

Down

-1

Note: Because the cursor moves in address units even if FX ≥ 9, the cursor address must be

preset for movement in character units. (See Section 4.1.4 “Cursor” on page 61.

OVLAY

●C Speciﬁes the method of composing layered screens and text or graphic display mode for each

screen.

MSB LSB

Address

D7 D6 D5 D4 D3 D2 D1 D0

01011011

0 0 0 OV DM2 DM1 MX1 MX0

––

0x8018

r_P1_OvLay

bit4 : OV bit3-2 : DM2-DM1 bit4 : MX1-MX0

36 EPSON S1D13700 Technical Manual

Page 42

3: COMMANDS AND COMMAND REGISTERS

[Parameter P1]

●MX0 Speciﬁes the method of composing layered screens.

●MX1 Selects the method of screen composition from OR, AND, Exclusive OR, and Prioritized OR as

listed in the table below. Because screens are composed in units of layers, different composition methods cannot be used for individual screen blocks, even if a layer is divided into two screen blocks.

Prioritized OR is the same as simple OR unless the ﬂashing of individual screens is used in combination with it.

MX1 MX0 Composition method Application example

00L1 ∪ L2 ∪ L3 Simple overlay (OR)

01 1 0 (L1 ∩ L2) ∪ L3 Selective overlay (AND)

1 1 L1 > L2 > L3

(L1

⊕ L2) ∪ L3

Black & white reverse overlay (EOR)

Prioritized overlay (As in Figure 3-4)

Note: L1: First layer (text or graphics)

L2: Second layer (graphics only) L3: Third layer (graphics only)

Underlining, rules, mixed text, and graphic display

Characters in inverse video, area flashing, underlining

Simple animation, three-dimensional appearance

Note

Figure 3-3 Example of screen compositions

Note: L1: Not ﬂashing

L2: Flashing at 17 Hz (as speciﬁed by DISP ON/OFF command) L3: Flashing at 2 Hz

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3: COMMANDS AND COMMAND REGISTERS

The table below shows the relationship between L and FP when MX = 11b.

MX[1:0]=1

Prioritized OR

Flash = OFF Flash is ON for any screen.

FP1 FP3 FP5

yes

L1 is not blank. L1 is blank.

FP[1:0]=00

yes

FP[3:2]=00

L1 L2 L3 L1 L2 L3

(Same result as when MX = 00)

Figure 3-4 Prioritized overlay

yes

L2 is blank.

FP[5:4]=00

(All layers are blank.

L3 is blank.

yes

L1 L2 L3

Therefore, 00)

Layered

MX[1:0] FP[5:0] Flash Blank-off

3 11 000000 x – – – L1 | L2 | L3 2 11 000000 x – – – L1 | L2 3 000001 x – – L1 L1 | L2 | L3 2 000001 x – – L1 L1 | L2 3 000010 Ο – – L1 L1 2 000010 Ο – – L1 L1 3 000011 Ο – – L1 L1 2 000011 Ο – – L1 L1 3 000100 x – L2 – L1 | L2 | L3 2 000100 x – L2 – L1 | L2 3 000101 x – L2 L1 L1 | L2 | L3 2 000101 x – L2 L1 L1 | L2 3 000110 Ο – L2 L1 L1 2 000110 Ο –L2L1L1 3 000111 Ο – L2 L1 L1 2 000111 Ο –L2L1L1 3 001000 Ο – L2 – L2 2 001000 Ο –L2–L2 3 001001 Ο – L2 L1 L1 2 001001 Ο –L2L1L1 3 001010 Ο – L2 L1 L1 2 001010 Ο –L2L1L1 3 001011 Ο – L2 L1 L1 2 001011 Ο –L2L1L1 3 001100 Ο – L2 – L2 2 001100 Ο –L2–L2 3 001101 Ο – L2 L1 L1 2 001101 Ο –L2L1L1 3 001110 Ο – L2 L1 L1 2 001110 Ο –L2L1L1 3 001111 Ο – L2 L1 L1 2 001111 Ο –L2L1L1 3 010000 x L3 – – L1 | L2 | L3 2 010000 x – – – L1 | L2 3 010001 x L3 – L1 L1 | L2 | L3 2 010001 x – – L1 L1 | L2 3 010010 Ο L3 – L1 L1 2 010010 Ο – – L1 L1

38 EPSON S1D13700 Technical Manual

Layered

MX[1:0] FP[5:0] Flash Blank-off

Page 44

3: COMMANDS AND COMMAND REGISTERS

Layered

MX[1:0] FP[5:0] Flash Blank-off

Layered

MX[1:0] FP[5:0] Flash Blank-off

3 010011 Ο L3 – L1 L1 2 010011 Ο – – L1 L1 3 010100 x L3 L2 – L1 | L2 | L3 2 010100 x – L2 – L1 | L2 3 010101 x L3 L2 L1 L1 | L2 | L3 2 010101 x – L2 L1 L1 | L2 3 010110 Ο L3 L2 L1 L1 2 010110 Ο –L2L1L1 3 010111 Ο L3 L2 L1 L1 2 010111 Ο –L2L1L1 3 011000 Ο L3 L2 – L2 2 011000 Ο –L2–L2 3 011001 Ο L3 L2 L1 L1 2 011001 Ο –L2L1L1 3 011010 Ο L3 L2 L1 L1 2 011010 Ο –L2L1L1 3 011011 Ο L3 L2 L1 L1 2 011011 Ο –L2L1L1 3 011100 Ο L3 L2 – L2 2 011100 Ο –L2–L2 3 011101 Ο L3 L2 L1 L1 2 011101 Ο –L2L1L1 3 011110 Ο L3 L2 L1 L1 2 011110 Ο –L2L1L1 3 011111 Ο L3 L2 L1 L1 2 011111 Ο –L2L1L1 3 100000 Ο L3 – – L3 2 100000 Ο –––00 3 100001 Ο L3 – L1 L1 2 100001 Ο – – L1 L1 3 100010 Ο L3 – L1 L1 2 100010 Ο – – L1 L1 3 100011 Ο L3 – L1 L1 2 100011 Ο – – L1 L1 3 100100 Ο L3 L2 – L2 2 100100 Ο –L2–L2 3 100101 Ο L3 L2 L1 L1 2 100101 Ο –L2L1L1 3 100110 Ο L3 L2 L1 L1 2 100110 Ο –L2L1L1 3 100111 Ο L3 L2 L1 L1 2 100111 Ο –L2L1L1 3 101000 Ο L3 L2 – L2 2 101000 Ο –L2–L2 3 101001 Ο L3 L2 L1 L1 2 101001 Ο –L2L1L1 3 101010 Ο L3 L2 L1 L1 2 101010 Ο –L2L1L1 3 101011 Ο L3 L2 L1 L1 2 101011 Ο –L2L1L1 3 101100 Ο L3 L2 – L2 2 101100 Ο –L2–L2 3 101101 Ο L3 L2 L1 L1 2 101101 Ο –L2L1L1 3 101110 Ο L3 L2 L1 L1 2 101110 Ο –L2L1L1 3 101111 Ο L3 L2 L1 L1 2 101111 Ο –L2L1L1 3 110000 Ο L3 – – L3 2 110000 Ο –––00 3 110001 Ο L3 – L1 L1 2 110001 Ο – – L1 L1 3 110010 Ο L3 – L1 L1 2 110010 Ο – – L1 L1 3 110011 Ο L3 – L1 L1 2 110011 Ο – – L1 L1 3 110100 Ο L3 L2 – L2 2 110100 Ο –L2–L2 3 110101 Ο L3 L2 L1 L1 2 110101 Ο –L2L1L1 3 110110 Ο L3 L2 L1 L1 2 110110 Ο –L2L1L1 3 110111 Ο L3 L2 L1 L1 2 110111 Ο –L2L1L1 3 111000 Ο L3 L2 – L2 2 111000 Ο –L2–L2 3 111001 Ο L3 L2 L1 L1 2 111001 Ο –L2L1L1 3 111010 Ο L3 L2 L1 L1 2 111010 Ο –L2L1L1 3 111011 Ο L3 L2 L1 L1 2 111011 Ο –L2L1L1 3 111100 Ο L3 L2 – L2 2 111100 Ο –L2–L2 3 111101 Ο L3 L2 L1 L1 2 111101 Ο –L2L1L1 3 111110 Ο L3 L2 L1 L1 2 111110 Ο –L2L1L1 3 111111 Ο L3 L2 L1 L1 2 111111 Ο –L2L1L1

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3: COMMANDS AND COMMAND REGISTERS

●DM1 Speciﬁes the display mode of the ﬁrst screen block.

●DM2 Speciﬁes the display mode of the third screen block.

DM1 (block1) 0: Text mode

1: Graphic mode

DM2 (block3) 0: Text mode

1: Graphic mode

Note: The second and fourth screen blocks are limited to graphics mode.

●OV Speciﬁes a two-layer or three-layer composition in graphics mode.

OV 0: Tow-layer composition

1: Three-layer composition

Note: Set OV = 0 for mixed text and graphics mode. When three-layer composition is

speciﬁed, both the ﬁrst and third screen blocks should be set to the graphics mode. (OV, DM2, DM1) = (1, 1, 1)

CGRAM ADR

●C Deﬁnes the offset address of CG RAM in the display memory space.

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

01011100

A7 A6 A5 A4 A3 A2 A1 A0

(SAGL)

A14 A13 A12 A11 A10 A9 A8

(SAGH)

Note: For details on how to deﬁne CG RAM, see Section 4.1.2 “Character Generator

(CG)” on page 47.

Address

––

0x8019

0x801A

r_P1_CGRAMAdr

bit7-0 : A7-A0

r_P2_CGRAMAdr

bit7-0 : A15-A8

40 EPSON S1D13700 Technical Manual

Page 46

3: COMMANDS AND COMMAND REGISTERS

HDOT SCR

Although the screen can be scrolled left or right only in units of characters using the SCROLL command alone, the combined use of this command allows the screen to be scrolled in units of dots. The scrolling on individual layers, however, cannot be controlled.

This command deﬁnes the number of dots to be shifted from the character origin.

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

01011010

00000D2D1D0

Address

––

0x801B

r_P1_HDotScr

bit2-0 : D2-D0

[Parameter P1]

●D0 – D2 The C/R value must be set to one more than the number of display characters before using

HDOT SCR to scroll the screen in units of dots. Smooth scrolling (dotwise scrolling) is possible when the MPU resends the HDOT SCR command to the S1D13700 at given time intervals for setting the number of dots to be shifted from the character origin.

HEX

00 01 02

•

• 06 07

BIN

D2 D1 D0

000 001 010

•••

••• 110 111

Number of dots to

be shifted

0 1 2

•

• 6 7

: Shifted M dots to the left (M increment)

: Fixed position M = 0 dots N = 0 dots

Screen

: Shifted N dots to the right

(N decrement)

Note: See Section 4.1.7 “Scrolling” on page 65, for more information about this

function.

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3: COMMANDS AND COMMAND REGISTERS

GRAY SCALE

This command sets up grayscale display mode.

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

01100000

0 0 0 0 0 0 D1 D0

[Parameter P1]

●D0 – D1 Specify the depth of grayscale.

HEX

00 01 02 03

Note: For grayscale display, text and graphic mode overlays are inhibited.

BIN

D2 D1

00 01 10 11

Grayscale depth

1bpp 2bpp 4bpp

reserved

Address

––

0x8020

r_P1_GrayScale

bit1-0 : D1-D0

42 EPSON S1D13700 Technical Manual

Page 48

3.3.3 Drawing Control Commands

CSRW

●C This command is used to write the cursor address to the cursor register. Because the S1D13700

has only one address input bit, only two addresses in the address space of the MPU can be speciﬁed at a time. Therefore, the MPU cannot directly access display memory. To compensate for this inconvenience, the S1D13700 has a 16-bit cursor register that serves the purpose of MPU addresses.

3: COMMANDS AND COMMAND REGISTERS

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

01000110

A7 A6 A5 A4 A3 A2 A1 A0

(CSRL)

A15 A14 A13 A12 A11 A10 A9 A8

(CSRH)

Address

––

0x801C

0x801D

r_P1_CSRW

bit7-0 : A7-A0

r_P2_CSRW

bit7-0 : A15-A8

The cursor address is set in the S1D13700 before display memory (VRAM, CG RAM, or CG ROM) is automatically accessed. If this address is not set, display starts from the address set last or an automatically shifted address. (The cursor address register can only be modiﬁed by other than the CSRW command by executing a memory control command.)

The cursor address is not affected by scrolling display because it is managed by the absolute display memory addresses ﬁxed in hardware. Note also that the cursor address points to the absolute display memory address where data for the origin part of the character field is stored.

CSRR

●C This command is used to read a cursor address from the cursor register.When this command is

written to the S1D13700, the low-order byte of the cursor address (CSRL) is set in the output buffer. Therefore, the high-order byte of the cursor address (CSRH) also can be read out by entering the RD signal following this command.

MSB LSB

D7 D6 D5 D4 D3 D2 D1 D0

01000110

A7 A6 A5 A4 A3 A2 A1 A0

(CSRL) Note

A15 A14 A13 A12 A11 A10 A9 A8

(CSRH)

Note

Address

––

0x801E

0x801F

r_P1_CSRR

bit7-0 : A7-A0

r_P2_CSRR

bit7-0 : A15-A8

Note: This is the read data.

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3: COMMANDS AND COMMAND REGISTERS

3.3.4 Memory Control Commands

MWRITE

This command is used by the MPU to place the S1D13700 in the data input state before writing data to display memory. Each time the WR# signal is input following this command, the S1D13700 automatically modiﬁes the cursor address at which to write display memory according to the CSRDIR value. This allows the MPU to write two or more consecutive items of data to display memory.

MSB LSB

01000010

P1, P2, ..., Pn: Display data

n ≥ 1

MREAD

This command is used to place the S1D13700 in the data output state and store the contents of display memory (speciﬁed by the cursor address) in the data bus buffer before reading data from display memory. Each time the RD# signal is input following this command, the read cursor address of display memory is automatically modiﬁed according to the CSRDIR value, and read data is stored in the data bus buf fer. Because the command is executed in a manner similar to pipelined processing, high-speed readout limited only by the MPU cycle time is possible.

When the cursor is displayed, the read data and cursor positions do not match (with the cursor two positions ahead).

MSB LSB

01000011

Read data

44 EPSON S1D13700 Technical Manual

n ≥ 1

Page 50

4FUNCTION DESCRIPTION

4.1 Display Functions

4.1.1 Screen Management

(1) Character conﬁguration

The S1D13700 can display characters using a row-scanning type of character generator that deﬁnes character patterns in the fourth quadrant with respect to the character origin as shown below. Although the character generator used determines the size of the character font area, the size of the character ﬁeld can be varied in both the X and Y directions.

4: FUNCTION DESCRIPTION

Character origin

Figure 4-1 Character display ([FX] ≤ 8 dots) Figure 4-2 Example of character generator definition

font area

R0 01110000 R1 10001000 R2 10001000

Character font area

Space

SpaceCharacter

R3 10001000 R4 11111000 R5 10001000 R6 10001000 R7 00000000 R8 00000000 R9 00000000 R10 00000000 R11 00000000 R12 00000000 R13 00000000 R14 00000000 R15 00000000

D7 MSB

–

LSB

Space

data

Space

data

Character font area: An area in which the character pattern is drawn Character ﬁeld: Character font area + space T o alter the character ﬁeld, lea v e an y portions other than the character font area set to 0 and increase FX or

FY to enlarge the size of space as desired.

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4: FUNCTION DESCRIPTION

Even when one character requires two or more memory addresses, the character ﬁeld can be set to any desired size.

Note 1

Portion not displayed

on the screen

Character font area

16 dots

Space

Portion not displayed on the screen

8 dots 8 dots

SpaceCharacter font area

Figure 4-3 Example of character configuration consisting of two or more memory addresses (when [FX] = 9)

Note 1: The S1D13700 does not automatically insert character spaces. If the character ﬁeld is great-

er than or equal to 9 dots, two memory addresses are required to conﬁgure one character even when the character font area may be within 8 dots.

46 EPSON S1D13700 Technical Manual

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4.1.2 Character Generator (CG)

(1) Features of each character generator

1 Internal character generator

The internal character generator is effective for a minimum display system consisting of the S1D13700, display memory (data RAM), LCD unit, single-chip MPU, and a power supply. Moreover, because the internal character generator includes CMOS mask ROM, it is very adv antageous when lo w power consumption is desired.

●Character font

• 5 x 7 dots (See Section 4.4.1 “Character Fonts (Internal CG)” on page 81.)

●Number of characters

• JIS-compliant 160 characters

●Combined use with CG RAM possible (up to 64 characters)

●Processing of the character ﬁeld space part

The S1D13700 automatically sets spaces in the range of 8 x 16 dots maximum.

2 CG RAM

CG RAM as a graphic generator allows any desired character font to be deﬁned by the user. Moreover , because the MPU can alter address mapping in the display memory space can be altered as required, unused portions of display memory can be effectively utilized.

4: FUNCTION DESCRIPTION

●Character font

• 8 x 8 dots maximum <M2 = 0>

• 8 x 16 dots maximum <M2 = 1>

●Number of characters

• Up to 64 characters when used in combination with CG ROM

• Up to 256 characters when used only in F000H to FFFFH

●Deﬁned area of CG RAM in the display memory space

• CG RAM (maximum 64 characters) that can be used in combination with CG ROM can be allocated to any desired contiguous addresses.

• CG RAM (maximum 65 characters or more) that cannot be used in combination with CG ROM must be allocated to ﬁxed addresses F000H through FFFFH. When 193 characters or more must be deﬁned in this ﬁxed address area, set SAG = F000H and M1 = 0.

(2) Concept of how character generator banks are set

Because the character codes handled by the S1D13700 consist of 8 bits, the number of discrete characters that can be displayed simultaneously is limited to a maximum of 256. The CGRAM ADR command can be used to switch banks, however, thus extending the number of usable characters as shown below.

CG RAM n

CG RAM 3

CG RAM 2

CG RAM n

CG RAM 3

CG RAM 2

Basic CG space

(8 x 16 pixels x 256

characters max)

MO=0

MO=1

CG ROM

(5 x 7 pixels x 160

characters max)

CG RAM

(8 x 16 pixels x 64cha)

CG RAM

(8 x 16 pixels x 256

characters max)

SAG

CG RAM 1

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4: FUNCTION DESCRIPTION

Note: Up to 64 characters can be used in one bank when used in combination with CG ROM.

When using only CG RAM, up to 256 characters can be used in one bank. Also note that the relationship between CG patterns and character codes changes when banks are switched over.

(3) Method of determining the CG address

The addition shown below is performed to generate CG RAM addresses. Therefore, note that CG RAM data is not mapped from addresses set in the SAG register to the VRAM space, but are mapped based on the SAG + character code + row select address.

1When number of lines that comprise the character font is equal to or less than 8 (M2 = 0, M1 = 0)

SAG A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

Character code

+ row select address

CG RAM address

00000D7D6D5D4D3D2D1D0000 0000000000000R2R1R0

VA15 VA14 VA13 VA12 VA11 VA10 VA9 VA8 VA7 VA6 VA5 VA4 VA3 VA2 VA1 VA0

2When number of lines that comprise the character font is from 9 to 16, including both ends (M2 = 1, M1

= 0)

SAG

Character code

+ row select address

CG RAM address

Note: Only the addressing above is supported.

A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

0 0 00D7 D6 D5 D4 D3 D2 D1 D0 0 0 0 0 000000000000R3R2R1R0

VA15 VA14 VA13 VA12 VA11 VA10 VA9 VA8 VA7 VA6 VA5 VA4 VA3 VA2 VA1 VA0

Table 4-1 Row Select Addresses

R3 R2 R1 R0 ROW0 0 0 0 0 ROW1 0 0 0 1 ROW2 0 0 1 0

Line count 1

ROW7 0 1 1 1

ROW8 1 0 0 0

Line count 2

ROW14 1 1 1 0 ROW15 1 1 1 1

Note: 1.Line count l ... when character font consists of 8 lines or less

Line count 2 ... when character font consists of 9 lines or more

3When M1 = 1

For the character codes deﬁned in CG RAM2, the S1D13700 automatically changes the D6 bit in the character code from 1 to 0. This ensures that the data storage area in CG RAM corresponds to

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4: FUNCTION DESCRIPTION

contiguous addresses in the display memory space. Therefore, the CG RAM addresses to which to write data must be calculated as follows:

• Add addresses the same way as described above (M1 = 0).

• Change bit D6 in one character code from 1 to 0 when adding addresses. Example of CG RAM deﬁnition (method of storing data) (See Figure 4-9 “Example of display

memory mapping” on page 63.)

●Conditions

• The pattern to deﬁne: Pattern A (8 x 16 dots per font) shown in Figure 4-1 “Character display

([FX] ≤ 8 dots)” on page 45.

• Start address of the CG RAM table: 4800H

• Character code of deﬁned pattern: 80H (ﬁrst character code in CG RAM area)

●Setting list

CG RAM ADR 5CH

P1 00H P2 40H

CSRDIR 4CH CSRW 46H

P1 00H P2 48H

MWRITE 42H

P1 70H P2 88H P3 88H P4 88H P5 F8H P6 88H P7 88H P8 00H P9 00H

P16 00H

Set SAG after calculating it by performing the method of CG RAM address calculation in reverse.

Shift to the right

CG RAM area from 4800H

Write data for row 0 Write data for row 1 Write data for row 2 Write data for row 3 Write data for row 4 Write data for row 5 Write data for row 6 Write data for row 7 Write data for row 8

Write data for row 15

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4: FUNCTION DESCRIPTION

4.1.3 Screen Configuration

(1) Screen conﬁguration

The basic screen conﬁguration of the S1D13700 consists of a text or graphics screen and an overlapping graphics screen. The graphics screen uses at least eight times as much display memory as the text screen.

Figure 4-4 schematically shows the relationship between the virtual and physical screens.

0000H

A/P

C/R

Character table

0800H

07FFH

Graphics table

47FFH

(XM, 0)

(XW, YM)

(XM, YM)

(0, YM)

Display

screen

(X, Y)

(0, 0)

Figure 4-4 Relationship between virtual and physical screens

(2) Display address incrementation

The S1D13700 sequentially increments the display address in the X direction from the screen origin (home position) in the same way as a raster scan CRT. When the display address is incremented until the number of addresses equals C/R, one line of data is read from display memory. Next, to read the second line of data when in graphics mode, the S1D13700 starts from the address incremented by the distance equal to the address pitch (AP) from the address of the screen origin (SAD), then repeats the same operation as described above for the ﬁrst line.

Conversely, in text mode the S1D13700 repeats the same operation as described above for the ﬁrst line until the display address for one character is completed. (Character code is read from the same area, and data is read out in order of R0–R15 of the character generator.) (See Figure 4-2 “Example of character generator definition” on page 45.)

50 EPSON S1D13700 Technical Manual

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*ReadTurn

SAD2+CR

SAD2+AP+CR

SAD2+2AP+CR

SAD1+CR

SAD1+AP+CR

SAD1+2AP+CR

SAD2+3AP+CR

SAD2+4AP+CR

SAD2+5AP+CR

SAD1+3AP+CR

SAD1+4AP+CR

SAD1+5AP+CR

SAD2+6AP+CR

SAD2+7AP+CR

SAD2+8AP+CR

SAD1+6AP+CR

SAD1+7AP+CR

SAD1+8AP+CR

SAD2+9AP+CR

SAD2+10AP+CR

SAD2+11AP+CR

SAD1+9AP+CR

SAD1+10AP+CR

SAD1+11AP+CR

SAD2+12AP+CR

SAD2+13AP+CR

SAD2+14AP+CR

SAD1+12AP+CR

SAD1+13AP+CR

SAD1+14AP+CR

SAD2+15AP+CR

SAD1+15AP+CR

4: FUNCTION DESCRIPTION

SAD2+(LF-7)AP+CR

SAD2+(LF-6)AP+CR

SAD2+(SL1-7)AP+CR

SAD2+(SL1-6)AP+CR

SAD2+(SL1-5)AP+CR

SAD2+(SL1-4)AP+CR

SAD1+(SL1-7)AP+CR

SAD1+(SL1-6)AP+CR

SAD1+(SL1-5)AP+CR

SAD1+(SL1-4)AP+CR

SAD2+(SL1-3)AP+CR

SAD1+(SL1-3)AP+CR

SAD2+(SL1-2)AP+CR

SAD2+(SL1-1)AP+CR

SAD1+(SL1-2)AP+CR

SAD1+(SL1-1)AP+CR

SAD2+(SL1)AP+CR

SAD2+(SL1+1)AP+CR

SAD1+(SL1)AP+CR

SAD2+(SL1+2)AP+CR

SAD2+(SL1+3)AP+CR

SAD2+(SL1+4)AP+CR

SAD2+(SL1+5)AP+CR

SAD2+(SL1+6)AP+CR

SAD2+(SL1+7)AP+CR

SAD2+(SL1+8)AP+CR

SAD2+(SL1+9)AP+CR

SAD2+(SL1+10)AP+CR

SAD2+(SL1+11)AP+CR

SAD2+(SL1+12)AP+CR

SAD2+(SL1+13)AP+CR

SAD2+(SL1+14)AP+CR

SAD2+(SL1+15)AP+CR

SAD2+(SL1+16)AP+CR

SAD2+(LF-5)AP+CR

SAD2+(LF)AP+CR

SAD2+(LF-4)AP+CR

SAD2+(LF-3)AP+CR

SAD2+(LF-2)AP+CR

SAD2+(LF-1)AP+CR

SAD2+1

SAD2+AP+1

SAD2+2AP+1

SAD2+3AP+1

SAD2+4AP+1

SAD2+5AP+1

SAD2+6AP+1

SAD2+7AP+1

SAD2+8AP+1

SAD2+9AP+1

SAD2+10AP+1

SAD2+11AP+1

SAD2+12AP+1

SAD2+13AP+1

SAD2+14AP+1

SAD2+15AP+1

SAD1+1

SAD1+AP+1

SAD1+2AP+1

SAD1+3AP+1

SAD1+4AP+1

SAD1+5AP+1

SAD1+6AP+1

SAD1+7AP+1

SAD1+8AP+1

SAD1+9AP+1

SAD1+10AP+1

SAD1+11AP+1

SAD1+12AP+1

SAD1+13AP+1

SAD1+14AP+1

SAD1+15AP+1

SAD2

SAD2+AP

SAD2+2AP

SAD2+3AP

SAD2+4AP

SAD2+5AP

SAD2+6AP

SAD2+7AP

SAD2+8AP

SAD2+9AP

SAD2+10AP

SAD2+11AP

SAD2+12AP

SAD2+13AP

SAD2+14AP

SAD2+15AP

SAD1

SAD1+AP

SAD1+2AP

SAD1+3AP

SAD1+4AP

SAD1+5AP

SAD1+6AP

SAD1+7AP

SAD1+8AP

SAD1+9AP

SAD1+10AP

SAD1+11AP

SAD1+12AP

SAD1+13AP

SAD1+14AP

SAD1+15AP

2 (2)

3 . . . (3)

4 (4)

5 . . .67 . . .89 . . .

<< (W/S, OV, DM2, DM1, FY) = (0, 0, 0, 0, 8) >> (BK1, BK2, BK3, BK4) = (Character (Layer1), Graphic (Layer2), Character (Layer1), -)

LineNo 1 . . . (1)

11 . . .1213 . . .1415 . . .

SAD2+(SL1-7)AP+1

SAD1+(SL1-7)AP+1

SAD2+(SL1-7)AP

SAD1+(SL1-7)AP

SL1-7 . . .

SAD2+(SL1-6)AP+1

SAD1+(SL1-6)AP+1

SAD2+(SL1-6)AP

SAD1+(SL1-6)AP

SL1-6

SAD2+(SL1-5)AP+1

SAD1+(SL1-5)AP+1

SAD2+(SL1-5)AP

SAD1+(SL1-5)AP

SL1-5 . . .

SAD2+(SL1-4)AP+1

SAD1+(SL1-4)AP+1

SAD2+(SL1-4)AP

SAD1+(SL1-4)AP

SL1-4

SAD2+(SL1-3)AP+1

SAD1+(SL1-3)AP+1

SAD2+(SL1-3)AP

SAD1+(SL1-3)AP

SL1-3 . . .

SAD2+(SL1-2)AP+1

SAD1+(SL1-2)AP+1

SAD2+(SL1-2)AP

SAD1+(SL1-2)AP

SL1-2

SAD2+(SL1- 1)AP+ 1

SAD1+(SL1-1)AP+1

SAD2+(SL1- 1)AP

SAD1+(SL1-1)AP

SL1-1 . . .

SAD2+(SL1)AP+1

SAD1+(SL1)AP+1

SAD2+(SL1)AP

SAD1+(SL1)AP

SL1

SAD2+(SL1+1)AP+1

SAD2+(SL1+1)AP

SL1+1 . . .

SAD2+(LF-7)AP+1

SAD2+(LF-6)AP+1

SAD2+(LF-7)AP

LF-7 . . .

SAD2+(LF-6)AP

LF-6

SAD2+(LF-5)AP+1

SAD2+(LF-5)AP

LF-5 . . . (LF-5)

SAD2+(SL1+2)AP+1

SAD2+(SL1+3)AP+1

SAD2+(SL1+4)AP+1

SAD2+(SL1+5)AP+1

SAD2+(SL1+6)AP+1

SAD2+(SL1+7)AP+1

SAD2+(SL1+8)AP+1

SAD2+(SL1+9)AP+1

SAD2+(SL1+10)AP+1

SAD2+(SL1+11)AP+1

SAD2+(SL1+12)AP+1

SAD2+(SL1+13)AP+1

SAD2+(SL1+14)AP+1

SAD2+(SL1+15)AP+1

SAD2+(SL1+16)AP+1

SAD2+(SL1+2)AP

SAD2+(SL1+3)AP

SAD2+(SL1+4)AP

SAD2+(SL1+5)AP

SAD2+(SL1+6)AP

SAD2+(SL1+7)AP

SAD2+(SL1+8)AP

SAD2+(SL1+9)AP

SAD2+(SL1+10)AP

SAD2+(SL1+11)AP

SAD2+(SL1+12)AP

SAD2+(SL1+13)AP

SAD2+(SL1+14)AP

SAD2+(SL1+15)AP

SAD2+(SL1+16)AP

SAD3 CG3 SAD3+1 CG3 SAD3+CR CG3

SL1+2

SL1+3 . . .

SL1+4

SL1+5 . . .

SL1+6

SL1+7 . . .

SL1+8

SL1+9 . . .

SAD3+AP CG3 SAD3+AP+1 CG3 SAD3+AP+CR CG3

SL1+10

SL1+11 . . .

SL1+12

SL1+13 . . .

SL1+14

SL1+15 . . .

SL1+16

SAD2+(LF)AP+1

SAD2+(LF-4)AP+1

SAD2+(LF-3)AP+1

SAD2+(LF-2)AP+1

SAD2+(LF-1)AP+1

SAD2+(LF)AP

SAD2+(LF-4)AP

SAD2+(LF-3)AP

SAD2+(LF-2)AP

SAD2+(LF-1)AP

SAD3+(LD/8)AP CG3 SAD3+(LF/8)+1 CG3 SAD3+(LF/8)+CR CG3

LF-4 (LF-4)

LF (LF)

LF-3 . . . (LF-3)

LF-2 (LF-2)

LF-1 . . . (LF-1)

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4: FUNCTION DESCRIPTION

*ReadTurn

SAD2+CR

SAD2+AP+CR

SAD2+2AP+CR

SAD2+3AP+CR

SAD2+4AP+CR

SAD2+5AP+CR

SAD2+6AP+CR

SAD2+7AP+CR

SAD2+8AP+CR

SAD2+9AP+CR

SAD2+10AP+CR

SAD2+11AP+CR

SAD2+12AP+CR

SAD1+AP+CR CG 1

SAD2+13AP+CR

SAD2+14AP+CR

SAD2+15AP+CR

SAD2+(SL1-7)AP+CR

SAD2+(SL1-6)AP+CR

SAD2+(SL1-5)AP+CR

SAD2+(SL1-4)AP+CR

SAD2+(SL1-3)AP+CR

SAD2+(SL1-2)AP+CR

SAD2+(SL1)AP+CR

SAD2+(SL1-1)AP+CR

SAD2+(SL1+1)AP+CR

SAD3+CR

SAD2+(SL1+2)AP+CR

SAD2+(SL1+3)AP+CR

SAD2+(SL1+4)AP+CR

SAD2+(SL1+5)AP+CR

SAD2+(SL1+6)AP+CR

SAD3+AP+CR

SAD3+2AP+CR

SAD3+3AP+CR

SAD3+4AP+CR

SAD3+5AP+CR

SAD2+(SL1+7)AP+CR

SAD2+(SL1+8)AP+CR

SAD2+(SL1+9)AP+CR

SAD2+(SL1+10)AP+CR

SAD2+(SL1+11)AP+CR

SAD3+6AP+CR

SAD3+7AP+CR

SAD3+8AP+CR

SAD3+9AP+CR

SAD3+10AP+CR

SAD2+(SL1+12)AP+CR

SAD2+(SL1+13)AP+CR

SAD2+(SL1+14)AP+CR

SAD3+11AP+CR

SAD3+12AP+CR

SAD3+13AP+CR

SAD2+(SL1+15)AP+CR

SAD2+(SL1+16)AP+CR

SAD3+14AP+CR

SAD3+15AP+CR

SAD2+(LF-7)AP+CR

SAD2+(LF-6)AP+CR

SAD2+(LF-5)AP+CR

SAD2+(LF-4)AP+CR

SAD2+(LF-3)AP+CR

SAD2+(LF-2)AP+CR

SAD2+(LF-1)AP+CR

SAD3+(LF-SL1-1)AP+CR

SAD3+(LF-SL1-2)AP+CR

SAD3+(LF-SL1-3)AP+CR

SAD3+(LF-SL1-4)AP+CR

SAD3+(LF-SL1-5)AP+CR

SAD3+(LF-SL1-6)AP+CR

SAD3+(LF-SL1-7)AP+CR

SAD2+(LF)AP+CR

SAD3+(LF-SL1)AP+CR

SAD2+1

SAD2+AP+1

SAD2+2AP+1

SAD2+3AP+1

SAD2+4AP+1

SAD2+5AP+1

SAD2+6AP+1

SAD2+7AP+1

SAD2+8AP+1

SAD2+9AP+1

SAD2+10AP+1

SAD2+11AP+1

SAD2+12AP+1

SAD2+13AP+1

SAD2+14AP+1

SAD2+15AP+1

SAD2+(SL1-7)AP+1

SAD2+(SL1-6)AP+1

SAD2+(SL1-5)AP+1

SAD1+AP+1 CG1

SAD2

SAD2+AP

SAD2+2AP

SAD2+3AP

SAD2+4AP

SAD2+5AP

SAD2+6AP

SAD2+7AP

SAD2+8AP

SAD2+9AP

SAD2+10AP

SAD2+11AP

SAD2+12AP

SAD2+13AP

SAD2+14AP

SAD2+15AP

SAD2+(SL1-7)AP

SAD2+(SL1-6)AP

SAD2+(SL1-5)AP

SAD1 CG1 SAD1+1 CG1 SAD1+CR CG1

2 (2)

3 … (3)

4 (4)

5 …67 …89 …

<< (W/S, OV, DM2, DM1, FY) = (0, 0, 0, 0, 8) >> (BK1, BK2, BK3, BK4) = (Character (Layer1), Graphic (Layer2), Character (Layer1), -)

LineNo 1 … (1)

SAD1+AP CG1

11 …1213 …1415 …

SL1-7 …

SL1-6

SL1-5 …

SAD2+(SL1-4)AP+1

SAD1+(SL1/8)AP+1 CG1 SAD1+(SL1/8)AP+CR CG1

SAD2+(SL1-4)AP

SAD1+(SL1/8)AP CG1

SL1-4

SAD2+(SL1-3)AP+1

SAD2+(SL1-3)AP

SL1-3 …

SAD2+(SL1-2)AP+1

SAD2+(SL1-2)AP

SL1-2

SAD2+(SL1-1)AP+1

SAD2+(SL1-1)AP

SL1-1 …

SAD2+(SL1)AP+1

SAD2+(SL1)AP

SL1

SAD2+(SL1+1)AP+1

SAD2+(SL1+2)AP+1

SAD3+1

SAD3+AP+1

SAD2+(SL1+2)AP

SAD2+(SL1+1)AP

SAD3

SAD3+AP

SL1+1 …

SL1+2

SAD2+(SL1+3)AP+1

SAD2+(SL1+4)AP+1

SAD2+(SL1+5)AP+1

SAD2+(SL1+6)AP+1

SAD3+2AP+1

SAD3+3AP+1

SAD3+4AP+1

SAD3+5AP+1

SAD2+(SL1+3)AP

SAD2+(SL1+4)AP

SAD2+(SL1+5)AP

SAD2+(SL1+6)AP

SAD3+2AP

SAD3+3AP

SAD3+4AP

SAD3+5AP

SL1+3 …

SL1+4

SL1+5 …

SL1+6

SAD2+(SL1+7)AP+1

SAD2+(SL1+8)AP+1

SAD2+(SL1+9)AP+1

SAD2+(SL1+10)AP+1

SAD3+6AP+1

SAD3+7AP+1

SAD3+8AP+1

SAD3+9AP+1

SAD2+(SL1+7)AP

SAD2+(SL1+8)AP

SAD2+(SL1+9)AP

SAD2+(SL1+10)AP

SAD3+6AP

SAD3+7AP

SAD3+8AP

SAD3+9AP

SL1+7 …

SL1+8

SL1+9 …

SL1+10

SAD2+(SL1+11)AP+1

SAD3+10AP+1

SAD2+(SL1+11)AP

SAD3+10AP

SL1+11 …

SAD2+(SL1+12)AP+1

SAD2+(SL1+13)AP+1

SAD3+11AP+1

SAD3+12AP+1

SAD2+(SL1+12)AP

SAD2+(SL1+13)AP

SAD3+11AP

SAD3+12AP

SL1+12

SL1+13 …

SAD2+(SL1+14)AP+1

SAD2+(SL1+15)AP+1

SAD3+13AP+1

SAD3+14AP+1

SAD2+(SL1+14)AP

SAD2+(SL1+15)AP

SAD3+13AP

SAD3+14AP

SL1+14

SL1+15 …

SAD2+(SL1+16)AP+1

SAD3+15AP+1

SAD2+(SL1+16)AP

SAD3+15AP

SL1+16

SAD2+(LF-7)AP+1

SAD2+(LF-6)AP+1

SAD2+(LF-5)AP+1

SAD2+(LF-4)AP+1

SAD3+(LF-SL1-4)AP+1

SAD3+(LF-SL1-5)AP+1

SAD3+(LF-SL1-6)AP+1

SAD3+(LF-SL1-7)AP+1

SAD2+(LF-7)AP

SAD2+(LF-6)AP

SAD2+(LF-5)AP

SAD2+(LF-4)AP

SAD3+(LF-SL1-4)AP

SAD3+(LF-SL1-5)AP

SAD3+(LF-SL1-6)AP

SAD3+(LF-SL1-7)AP

LF-7 …

LF-6

LF-5 … (LF-5)

LF-4 (LF-4)

SAD2+(LF)AP+1

SAD2+(LF-3)AP+1

SAD2+(LF-2)AP+1

SAD2+(LF-1)AP+1

SAD3+(LF-SL1)AP+1

SAD3+(LF-SL1-1)AP+1

SAD3+(LF-SL1-2)AP+1

SAD3+(LF-SL1-3)AP+1

SAD2+(LF)AP

SAD2+(LF-3)AP

SAD2+(LF-2)AP

SAD2+(LF-1)AP

SAD3+(LF-SL1)AP

SAD3+(LF-SL1-1)AP

SAD3+(LF-SL1-2)AP

SAD3+(LF-SL1-3)AP

LF (LF)

LF-3 … (LF-3)

LF-2 (LF-2)

LF-1 … (LF-1)

52 EPSON S1D13700 Technical Manual

Page 58

*ReadTurn

SAD2+CR

SAD2+AP+CR

SAD2+2AP+CR

SAD2+3AP+CR

SAD2+4AP+CR

SAD2+5AP+CR

SAD2+6AP+CR

SAD2+7AP+CR

SAD2+8AP+CR

SAD2+9AP+CR

SAD2+10AP+CR

SAD2+11AP+CR

SAD2+12AP+CR

SAD1+AP+CR CG1

SAD2+13AP+CR

SAD2+14AP+CR

SAD2+15AP+CR

SAD2+(SL1-7)AP+CR

SAD2+(SL1-6)AP+CR

SAD2+(SL1-5)AP+CR

SAD2+(SL1-4)AP+CR

SAD2+(SL1-3)AP+CR

SAD2+(SL1-2)AP+CR

SAD2+(SL1)AP+CR

SAD2+(SL1-1)AP+CR

SAD2+(SL1+1)AP+CR

SAD2+(SL1+2)AP+CR

SAD2+(SL1+3)AP+CR

SAD2+(SL1+4)AP+CR

SAD2+(SL1+5)AP+CR

SAD2+(SL1+6)AP+CR

SAD2+(SL1+7)AP+CR

SAD2+(SL1+8)AP+CR

SAD2+(SL1+9)AP+CR

SAD2+(SL1+10)AP+CR

4: FUNCTION DESCRIPTION

SAD2+(LF-7)AP+CR

SAD2+(LF-6)AP+CR

SAD2+(SL1+11)AP+CR

SAD2+(SL1+12)AP+CR

SAD2+(SL1+13)AP+CR

SAD2+(SL1+14)AP+CR

SAD2+(SL1+15)AP+CR

SAD2+(SL1+16)AP+CR

SAD2+(LF-5)AP+CR

SAD2+(LF)AP+CR

SAD2+(LF-4)AP+CR

SAD2+(LF-3)AP+CR

SAD2+(LF-2)AP+CR

SAD2+(LF-1)AP+CR

<< (W/S, OV, DM2, DM1, FY) = (0, 0, 0, 0, 8) >> (BK1, BK2, BK3, BK4) = (Character (Layer1), Graphic (Layer2), Character (Layer1), -)

VA0-15(case1)

SAD2+1

SAD2+AP+1

SAD2

SAD2+AP

2 (2)

LineNo 1 … (1)

SAD2+2AP+1

SAD2+3AP+1

SAD2+4AP+1

SAD2+5AP+1

SAD2+2AP

SAD2+3AP

SAD2+4AP

SAD2+5AP

SAD1 CG1 SAD1+1 CG1 SAD1+CR CG1

3 … (3)

4 (4)

5 …67 …89 …

SAD2+6AP+1

SAD2+7AP+1

SAD2+8AP+1

SAD2+9AP+1

SAD2+6AP

SAD2+7AP

SAD2+8AP

SAD2+9AP

SAD2+10AP+1

SAD2+11AP+1

SAD2+12AP+1

SAD2+13AP+1

SAD1+AP+1 CG1

SAD2+10AP

SAD2+11AP

SAD2+12AP

SAD2+13AP

SAD1+AP CG1

11 …1213 …1415 …

SAD2+14AP+1

SAD2+14AP

SAD2+15AP+1

SAD2+15AP

SAD2+(SL1-7)AP+1

SAD2+(SL1-7)AP

SL1-7 …

SAD2+(SL1-6)AP+1

SAD2+(SL1-5)AP+1

SAD2+(SL1-6)AP

SAD2+(SL1-5)AP

SL1-6

SL1-5 …

SAD2+(SL1-4)AP+1

SAD2+(SL1-3)AP+1

SAD1+(SL1/8)AP+1 CG1 SAD1+(SL1/8)AP+CR CG1

SAD2+(SL1-4)AP

SAD2+(SL1-3)AP

SAD1+(SL1/8)AP CG1

SL1-4

SL1-3 …

SAD2+(SL1-2)AP+1

SAD2+(SL1-1)AP+1

SAD2+(SL1-2)AP

SAD2+(SL1-1)AP

SL1-2

SL1-1 …

SAD2+(SL1)AP+1

SAD2+(SL1)AP

SL1

SAD2+(SL1+1)AP+1

SAD2+(SL1+1)AP

SL1+1 …

SAD2+(SL1+2)AP+1

SAD2+(SL1+3)AP+1

SAD2+(SL1+2)AP

SAD2+(SL1+3)AP

SL1+2

SL1+3 …

SAD2+(SL1+4)AP+1

SAD2+(SL1+5)AP+1

SAD2+(SL1+4)AP

SAD2+(SL1+5)AP

SAD3 CG3 SAD3+1 CG3 SAD3+CR CG3

SL1+4

SL1+5 …

SAD2+(SL1+6)AP+1

SAD2+(SL1+7)AP+1

SAD2+(SL1+6)AP

SAD2+(SL1+7)AP

SL1+6

SL1+7 …

SAD2+(SL1+8)AP+1

SAD2+(SL1+9)AP+1

SAD2+(SL1+8)AP

SAD2+(SL1+9)AP

SL1+8

SL1+9 …

SAD2+(SL1+10)AP+1

SAD2+(SL1+10)AP

SL1+10

SAD2+(SL1+11)AP+1

SAD2+(SL1+11)AP

SL1+11 …

SAD2+(SL1+12)AP+1

SAD2+(SL1+12)AP

SAD3+AP CG3 SAD3+AP+1 CG3 SAD3+AP+CR CG3

SL1+12

SAD2+(SL1+13)AP+1

SAD2+(SL1+13)AP

SL1+13 …

SAD2+(SL1+14)AP+1

SAD2+(SL1+14)AP

SL1+14

SAD2+(SL1+15)AP+1

SAD2+(SL1+15)AP

SL1+15 …

SAD2+(SL1+16)AP+1

SAD2+(SL1+16)AP

SL1+16

SAD2+(LF-7)AP+1

SAD2+(LF-6)AP+1

SAD2+(LF-5)AP+1

SAD2+(LF-4)AP+1

SAD2+(LF-3)AP+1

SAD2+(LF-2)AP+1

SAD2+(LF-7)AP

SAD2+(LF-6)AP

SAD2+(LF-5)AP

SAD2+(LF-4)AP

SAD2+(LF-3)AP

SAD2+(LF-2)AP

SAD3+(LD/8)AP CG3 SAD3+(LF/8)+1 CG3 SAD3+(LF/8)+CR CG3

LF-7 …

LF-6

LF-5 … (LF-5)

LF-4 (LF-4)

LF-3 … (LF-3)

LF-2 (LF-2)

SAD2+(LF)AP+1

SAD2+(LF-1)AP+1

SAD2+(LF)AP

SAD2+(LF-1)AP

LF (LF)

LF-1 … (LF-1)

S1D13700 Technical Manual EPSON 53

Page 59

4: FUNCTION DESCRIPTION

*ReadTurn

SAD2+CR

SAD2+AP+CR

SAD2+2AP+CR

SAD2+3AP+CR

SAD2+4AP+CR

SAD2+5AP+CR

SAD2+6AP+CR

SAD2+7AP+CR

SAD2+8AP+CR

SAD2+9AP+CR

SAD2+10AP+CR

SAD2+11AP+CR

SAD2+12AP+CR

SAD2+13AP+CR

SAD2+14AP+CR

SAD2+15AP+CR

SAD2+(SL1-7)AP+CR

SAD2+(SL1-6)AP+CR

SAD2+(SL1-5)AP+CR

SAD2+(SL1-4)AP+CR

SAD2+(SL1-3)AP+CR

SAD2+(SL1-2)AP+CR

SAD2+(SL1)AP+CR

SAD2+(SL1-1)AP+CR

SAD2+(SL1+1)AP+CR

SAD2+(SL1+2)AP+CR

SAD2+(SL1+3)AP+CR

SAD2+(SL1+4)AP+CR

SAD2+(SL1+5)AP+CR

SAD2+(SL1+6)AP+CR

SAD2+(SL1+7)AP+CR

SAD2+(SL1+8)AP+CR

SAD2+(SL1+9)AP+CR

SAD2+(SL1+10)AP+CR

SAD2+(SL1+11)AP+CR

SAD2+(SL1+12)AP+CR

SAD2+(SL1+13)AP+CR

SAD2+(SL1+14)AP+CR

SAD2+(SL1+15)AP+CR

SAD2+(SL1+16)AP+CR

SAD2+(LF-7)AP+CR

SAD2+(LF-6)AP+CR

SAD2+(LF-5)AP+CR

SAD2+(LF-4)AP+CR

SAD2+(LF-3)AP+CR

SAD2+(LF-2)AP+CR

SAD2+(LF-1)AP+CR

SAD2+(LF)AP+CR

SAD1+CR

SAD1+AP+CR

SAD2+1

SAD2+AP+1

SAD1+1

SAD1+AP+1

SAD1+2AP+CR

SAD1+3AP+CR

SAD1+4AP+CR

SAD2+2AP+1

SAD2+3AP+1

SAD2+4AP+1

SAD1+2AP+1

SAD1+3AP+1

SAD1+4AP+1

SAD1+5AP+CR

SAD1+6AP+CR

SAD1+7AP+CR

SAD2+5AP+1

SAD2+6AP+1

SAD2+7AP+1

SAD1+5AP+1

SAD1+6AP+1

SAD1+7AP+1

SAD1+8AP+CR

SAD1+9AP+CR

SAD1+10AP+CR

SAD2+8AP+1

SAD2+9AP+1

SAD2+10AP+1

SAD1+8AP+1

SAD1+9AP+1

SAD1+10AP+1

SAD1+11AP+CR

SAD1+12AP+CR

SAD2+11AP+1

SAD2+12AP+1

SAD1+11AP+1

SAD1+12AP+1

SAD1+13AP+CR

SAD1+14AP+CR

SAD1+15AP+CR

SAD2+13AP+1

SAD2+14AP+1

SAD2+15AP+1

SAD1+13AP+1

SAD1+14AP+1

SAD1+15AP+1

SAD1+(SL1-7)AP+CR

SAD1+(SL1-6)AP+CR

SAD1+(SL1-5)AP+CR

SAD2+(SL1-7)AP+1

SAD2+(SL1-6)AP+1

SAD2+(SL1-5)AP+1

SAD1+(SL1-7)AP+1

SAD1+(SL1-6)AP+1

SAD1+(SL1-5)AP+1

SAD1+(SL1-4)AP+CR

SAD1+(SL1-3)AP+CR

SAD1+(SL1-2)AP+CR

SAD2+(SL1-4)AP+1

SAD2+(SL1-3)AP+1

SAD2+(SL1-2)AP+1

SAD1+(SL1-4)AP+1

SAD1+(SL1-3)AP+1

SAD1+(SL1-2)AP+1

SAD3+CR

SAD1+(SL1)AP+CR

SAD1+(SL1-1)AP+CR

SAD2+(SL1)AP+1

SAD2+(SL1-1)AP+1

SAD2+(SL1+1)AP+1

SAD3+1

SAD1+(SL1)AP+1

SAD1+(SL1-1)AP+1

SAD3+AP+CR

SAD3+2AP+CR

SAD3+3AP+CR

SAD3+4AP+CR

SAD3+5AP+CR

SAD2+(SL1+2)AP+1

SAD2+(SL1+3)AP+1

SAD2+(SL1+4)AP+1

SAD2+(SL1+5)AP+1

SAD2+(SL1+6)AP+1

SAD3+AP+1

SAD3+2AP+1

SAD3+3AP+1

SAD3+4AP+1

SAD3+5AP+1

SAD3+6AP+CR

SAD3+7AP+CR

SAD3+8AP+CR

SAD3+9AP+CR

SAD3+10AP+CR

SAD2+(SL1+7)AP+1

SAD2+(SL1+8)AP+1

SAD2+(SL1+9)AP+1

SAD2+(SL1+10)AP+1

SAD2+(SL1+11)AP+1

SAD3+6AP+1

SAD3+7AP+1

SAD3+8AP+1

SAD3+9AP+1

SAD3+10AP+1

SAD3+11AP+CR

SAD3+12AP+CR

SAD2+(SL1+12)AP+1

SAD2+(SL1+13)AP+1

SAD3+11AP+1

SAD3+12AP+1

SAD3+13AP+CR

SAD3+14AP+CR

SAD3+15AP+CR

SAD2+(SL1+14)AP+1

SAD2+(SL1+15)AP+1

SAD2+(SL1+16)AP+1

SAD3+13AP+1

SAD3+14AP+1

SAD3+15AP+1

SAD3+(LF-SL1-5)AP+CR

SAD3+(LF-SL1-6)AP+CR

SAD3+(LF-SL1-7)AP+CR

SAD2+(LF-7)AP+1

SAD2+(LF-6)AP+1

SAD2+(LF-5)AP+1

SAD3+(LF-SL1-5)AP+1

SAD3+(LF-SL1-6)AP+1

SAD3+(LF-SL1-7)AP+1

SAD3+(LF-SL1-2)AP+CR

SAD3+(LF-SL1-3)AP+CR

SAD3+(LF-SL1-4)AP+CR

SAD2+(LF-4)AP+1

SAD2+(LF-3)AP+1

SAD2+(LF-2)AP+1

SAD3+(LF-SL1-2)AP+1

SAD3+(LF-SL1-3)AP+1

SAD3+(LF-SL1-4)AP+1

SAD3+(LF-SL1)AP+CR

SAD3+(LF-SL1-1)AP+CR

SAD2+(LF)AP+1

SAD2+(LF-1)AP+1

SAD3+(LF-SL1)AP+1

SAD3+(LF-SL1-1)AP+1

SAD2

SAD2+AP

SAD2+2AP

SAD2+3AP

SAD2+4AP

SAD2+5AP

SAD2+6AP

SAD2+7AP

SAD2+8AP

SAD2+9AP

SAD2+10AP

SAD2+11AP

SAD2+12AP

SAD2+13AP

SAD2+14AP

SAD2+15AP

SAD2+(SL1-7)AP

SAD2+(SL1-6)AP

SAD2+(SL1-5)AP

SAD2+(SL1-4)AP

SAD2+(SL1-3)AP

SAD2+(SL1-2)AP

SAD2+(SL1-1)AP

SAD1

SAD1+AP

SAD1+2AP

SAD1+3AP

SAD1+4AP

SAD1+5AP

SAD1+6AP

SAD1+7AP

SAD1+8AP

SAD1+9AP

SAD1+10AP

SAD1+11AP

SAD1+12AP

SAD1+13AP

SAD1+14AP

SAD1+15AP

SAD1+(SL1-7)AP

SAD1+(SL1-6)AP

SAD1+(SL1-5)AP

SAD1+(SL1-4)AP

SAD1+(SL1-3)AP

SAD1+(SL1-2)AP

SAD1+(SL1-1)AP

2 (2)

3 … (3)

4 (4)

5 …67 …89 …

VA0-15(case2)

<< (W/S, OV, DM2, DM1, FY) = (0, 0, 1, 1, 8) >> (BK1, BK2, BK3, BK4) = Graphic (Layer1), Graphic (Layer2), Graphic (Layer1), -)

LineNo 1 … (1)

11 …1213 …1415 …

SL1-7 …

SL1-6

SL1-5 …

SL1-4

SL1-3 …

SL1-2

SL1-1 …

SAD2+(SL1)AP

SAD1+(SL1)AP

SL1

SAD2+(SL1+1)AP

SAD2+(SL1+2)AP

SAD3

SAD3+AP

SL1+1 …

SL1+2

SAD2+(SL1+3)AP

SAD2+(SL1+4)AP

SAD2+(SL1+5)AP

SAD2+(SL1+6)AP

SAD3+2AP

SAD3+3AP

SAD3+4AP

SAD3+5AP

SL1+3 …

SL1+4

SL1+5 …

SL1+6

SAD2+(SL1+7)AP

SAD2+(SL1+8)AP

SAD2+(SL1+9)AP

SAD2+(SL1+10)AP

SAD3+6AP

SAD3+7AP

SAD3+8AP

SAD3+9AP

SL1+7 …

SL1+8

SL1+9 …

SL1+10

SAD2+(SL1+11)AP

SAD3+10AP

SL1+11 …

SAD2+(SL1+12)AP

SAD3+11AP

SL1+12

SAD2+(SL1+13)AP

SAD3+12AP

SL1+13 …

SAD2+(SL1+14)AP

SAD3+13AP

SL1+14

SAD2+(SL1+15)AP

SAD3+14AP

SL1+15 …

SAD2+(SL1+16)AP

SAD3+15AP

SL1+16

SAD2+(LF-7)AP

SAD2+(LF-6)AP

SAD2+(LF-5)AP

SAD2+(LF-4)AP

SAD2+(LF-3)AP

SAD3+(LF-SL1-3)AP

SAD3+(LF-SL1-4)AP

SAD3+(LF-SL1-5)AP

SAD3+(LF-SL1-6)AP

SAD3+(LF-SL1-7)AP

LF-7 …

LF-6

LF-5 … (LF-5)

LF-4 (LF-4)

LF-3 … (LF-3)

SAD2+(LF-2)AP

SAD2+(LF-1)AP

SAD3+(LF-SL1-1)AP

SAD3+(LF-SL1-2)AP

LF-2 (LF-2)

LF-1 … (LF-1)

54 EPSON S1D13700 Technical Manual

SAD2+(LF)AP

SAD3+(LF-SL1)AP

LF (LF)

Page 60

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SAD3+CR

SAD3+AP+CR

SAD2+CR

SAD2+AP+CR

SAD1+CR

SAD1+AP+CR

SAD3+2AP+CR

SAD3+3AP+CR

SAD3+4AP+CR

SAD3+5AP+CR

SAD3+6AP+CR

SAD2+2AP+CR

SAD2+3AP+CR

SAD2+4AP+CR

SAD2+5AP+CR

SAD2+6AP+CR

SAD1+2AP+CR

SAD1+3AP+CR

SAD1+4AP+CR

SAD1+5AP+CR

SAD1+6AP+CR

SAD3+7AP+CR

SAD3+8AP+CR

SAD3+9AP+CR

SAD3+10AP+CR

SAD3+11AP+CR

SAD3+12AP+CR

SAD2+7AP+CR

SAD2+8AP+CR

SAD2+9AP+CR

SAD2+10AP+CR

SAD2+11AP+CR

SAD2+12AP+CR

SAD1+7AP+CR

SAD1+8AP+CR

SAD1+9AP+CR

SAD1+10AP+CR

SAD1+11AP+CR

SAD1+12AP+CR

SAD3+13AP+CR

SAD3+14AP+CR

SAD3+15AP+CR

SAD2+13AP+CR

SAD2+14AP+CR

SAD2+15AP+CR

SAD1+13AP+CR

SAD1+14AP+CR

SAD1+15AP+CR

SAD3+16AP+CR

SAD3+17AP+CR

SAD3+18AP+CR

SAD2+16AP+CR

SAD2+17AP+CR

SAD2+18AP+CR

SAD1+16AP+CR

SAD1+17AP+CR

SAD1+18AP+CR

SAD3+19AP+CR

SAD3+20AP+CR

SAD3+21AP+CR

SAD3+22AP+CR

SAD3+23AP+CR

SAD2+20AP+CR

SAD2+19AP+CR

SAD2+21AP+CR

SAD2+22AP+CR

SAD2+23AP+CR

SAD1+20AP+CR

SAD1+19AP+CR

SAD1+21AP+CR

SAD1+22AP+CR

SAD1+23AP+CR

4: FUNCTION DESCRIPTION

SAD3+(LF-7)AP+CR

SAD3+(LF-6)AP+CR

SAD3+(LF-5)AP+CR

SAD3+(LF-4)AP+CR

SAD3+(LF-15)AP+CR

SAD3+(LF-14)AP+CR

SAD3+(LF-13)AP+CR

SAD2+(LF-15)AP+CR

SAD2+(LF-14)AP+CR

SAD2+(LF-13)AP+CR

SAD1+(LF-15)AP+CR

SAD1+(LF-14)AP+CR

SAD1+(LF-13)AP+CR

SAD3+(LF-9)AP+CR

SAD3+(LF-12)AP+CR

SAD3+(LF-11)AP+CR

SAD3+(LF-10)AP+CR

SAD2+(LF-9)AP+CR

SAD2+(LF-12)AP+CR

SAD2+(LF-11)AP+CR

SAD2+(LF-10)AP+CR

SAD1+(LF-9)AP+CR

SAD1+(LF-12)AP+CR

SAD1+(LF-11)AP+CR

SAD1+(LF-10)AP+CR

SAD3+(LF-8)AP+CR

SAD2+(LF-8)AP+CR

SAD1+(LF-8)AP+CR

SAD3+(LF-3)AP+CR

SAD2+(LF-7)AP+CR

SAD2+(LF-6)AP+CR

SAD2+(LF-5)AP+CR

SAD2+(LF-4)AP+CR

SAD2+(LF-3)AP+CR

SAD1+(LF-7)AP+CR

SAD1+(LF-6)AP+CR

SAD1+(LF-5)AP+CR

SAD1+(LF-4)AP+CR

SAD1+(LF-3)AP+CR

SAD3+(LF)AP+CR

SAD3+(LF-2)AP+CR

SAD3+(LF-1)AP+CR

SAD2+(LF)AP+CR

SAD2+(LF-2)AP+CR

SAD2+(LF-1)AP+CR

SAD+(LF)AP+CR

SAD1+(LF-2)AP+CR

SAD1+(LF-1)AP+CR

SAD3+1

SAD3+AP+1

SAD2+1

SAD2+AP+1

SAD1+1

SAD1+AP+1

SAD3

SAD3+AP

SAD2

SAD2+AP

SAD3+2AP+1

SAD3+3AP+1

SAD3+4AP+1

SAD3+5AP+1

SAD2+2AP+1

SAD2+3AP+1

SAD2+4AP+1

SAD2+5AP+1

SAD1+2AP+1

SAD1+3AP+1

SAD1+4AP+1

SAD1+5AP+1

SAD3+2AP

SAD3+3AP

SAD3+4AP

SAD3+5AP

SAD2+2AP

SAD2+3AP

SAD2+4AP

SAD2+5AP

SAD3+6AP+1

SAD3+7AP+1

SAD3+8AP+1

SAD3+9AP+1

SAD2+6AP+1

SAD2+7AP+1

SAD2+8AP+1

SAD2+9AP+1

SAD1+6AP+1

SAD1+7AP+1

SAD1+8AP+1

SAD1+9AP+1

SAD3+6AP

SAD3+7AP

SAD3+8AP

SAD3+9AP

SAD2+6AP

SAD2+7AP

SAD2+8AP

SAD2+9AP

SAD3+10AP+1

SAD2+10AP+1

SAD1+10AP+1

SAD3+10AP

SAD2+10AP

SAD3+11AP+1

SAD2+11AP+1

SAD1+11AP+1

SAD3+11AP

SAD2+11AP

SAD3+12AP+1

SAD2+12AP+1

SAD1+12AP+1

SAD3+12AP

SAD2+12AP

SAD3+13AP+1

SAD2+13AP+1

SAD1+13AP+1

SAD3+13AP

SAD2+13AP

SAD3+14AP+1

SAD2+14AP+1

SAD1+14AP+1

SAD3+14AP

SAD2+14AP

SAD3+15AP+1

SAD2+15AP+1

SAD1+15AP+1

SAD3+15AP

SAD2+15AP

SAD3+16AP+1

SAD2+16AP+1

SAD1+16AP+1

SAD3+16AP

SAD2+16AP

SAD3+17AP+1

SAD2+17AP+1

SAD1+17AP+1

SAD3+17AP

SAD2+17AP

SAD3+18AP+1

SAD3+20AP+1

SAD3+19AP+1

SAD2+18AP+1

SAD2+20AP+1

SAD2+19AP+1

SAD1+18AP+1

SAD1+20AP+1

SAD1+19AP+1

SAD3+18AP

SAD3+20AP

SAD3+19AP

SAD2+18AP

SAD2+20AP

SAD2+19AP

SAD3+21AP+1

SAD3+22AP+1

SAD3+23AP+1

SAD2+21AP+1

SAD2+22AP+1

SAD2+23AP+1

SAD1+21AP+1

SAD1+22AP+1

SAD1+23AP+1

SAD3+21AP

SAD3+22AP

SAD3+23AP

SAD2+21AP

SAD2+22AP

SAD2+23AP

SAD3+(LF-15)AP+1

SAD2+(LF-15)AP+1

SAD1+(LF-15)AP+1

SAD3+(LF-15)AP

SAD2+(LF-15)AP

SAD3+(LF-14)AP+1

SAD2+(LF-14)AP+1

SAD1+(LF-14)AP+1

SAD3+(LF-14)AP

SAD2+(LF-14)AP

SAD3+(LF-13)AP+1

SAD2+(LF-13)AP+1

SAD1+(LF-13)AP+1

SAD3+(LF-13)AP

SAD2+(LF-13)AP

SAD3+(LF-12)AP+1

SAD2+(LF-12)AP+1

SAD1+(LF-12)AP+1

SAD3+(LF-12)AP

SAD2+(LF-12)AP

SAD3+(LF-11)AP+1

SAD2+(LF-11)AP+1

SAD1+(LF-11)AP+1

SAD3+(LF-11)AP

SAD2+(LF-11)AP

SAD3+(LF-10)AP+1

SAD2+(LF-10)AP+1

SAD1+(LF-10)AP+1

SAD3+(LF-10)AP

SAD2+(LF-10)AP

SAD3+(LF-7)AP+1

SAD3+(LF-6)AP+1

SAD3+(LF-5)AP+1

SAD3+(LF-9)AP+1

SAD2+(LF-9)AP+1

SAD1+(LF-9)AP+1

SAD3+(LF-9)AP

SAD2+(LF-9)AP

SAD3+(LF-4)AP+1

SAD3+(LF-8)AP+1

SAD2+(LF-7)AP+1

SAD2+(LF-6)AP+1

SAD2+(LF-5)AP+1

SAD2+(LF-4)AP+1

SAD2+(LF-8)AP+1

SAD1+(LF-7)AP+1

SAD1+(LF-6)AP+1

SAD1+(LF-5)AP+1

SAD1+(LF-4)AP+1

SAD1+(LF-8)AP+1

SAD3+(LF-7)AP

SAD3+(LF-6)AP

SAD3+(LF-5)AP

SAD3+(LF-4)AP

SAD3+(LF-8)AP

SAD2+(LF-7)AP

SAD2+(LF-6)AP

SAD2+(LF-5)AP

SAD2+(LF-4)AP

SAD2+(LF-8)AP

SAD3+(LF)AP+1

SAD3+(LF-3)AP+1

SAD3+(LF-2)AP+1

SAD3+(LF-1)AP+1

SAD2+(LF)AP+1

SAD2+(LF-3)AP+1

SAD2+(LF-2)AP+1

SAD2+(LF-1)AP+1

SAD+(LF)AP+1

SAD1+(LF-3)AP+1

SAD1+(LF-2)AP+1

SAD1+(LF-1)AP+1

SAD3+(LF)AP

SAD3+(LF-3)AP

SAD3+(LF-2)AP

SAD3+(LF-1)AP

SAD2+(LF)AP

SAD2+(LF-3)AP

SAD2+(LF-2)AP

SAD2+(LF-1)AP

SAD1

SAD1+AP

SAD1+2AP

SAD1+3AP

SAD1+4AP

SAD1+5AP

SAD1+6AP

SAD1+7AP

SAD1+8AP

SAD1+9AP

SAD1+10AP

SAD1+11AP

SAD1+12AP

SAD1+13AP

SAD1+14AP

SAD1+15AP

SAD1+16AP

SAD1+17AP

SAD1+18AP

SAD1+20AP

SAD1+19AP

SAD1+21AP

SAD1+22AP

SAD1+23AP

2 (2)

3 … (3)

4 (4)

5 …67 …89 …

VA0-15(case3)

<< (W/S, OV, DM2, DM1, FY) = (0, 1, 1, 1, 8) >> (BK1, BK2, BK3, BK4) = Graphic (Layer1), Graphic (Layer2), Graphic (Layer3), -)

LineNo 1 … (1)

11 …1213 …1415 …1617 …1819 …2021 …2223 …

SAD1+(LF-15)AP

LF-15 …

SAD1+(LF-14)AP

LF-14

SAD1+(LF-13)AP

LF-13 …

SAD1+(LF-12)AP

LF-12

SAD1+(LF-11)AP

LF-11 …

SAD1+(LF-9)AP

SAD1+(LF-10)AP

LF-9 …

LF-10

SAD1+(LF-7)AP

SAD1+(LF-6)AP

SAD1+(LF-8)AP

LF-8

LF-7 …

LF-6

SAD1+(LF-5)AP

SAD1+(LF-4)AP

SAD1+(LF-3)AP

LF-5 … (LF-5)

LF-4 (LF-4)

LF-3 … (LF-3)

SAD1+(LF-2)AP

SAD1+(LF-1)AP

LF-2 (LF-2)

LF-1 … (LF-1)

S1D13700 Technical Manual EPSON 55

SAD+(LF)AP

LF (LF)

Page 61

4: FUNCTION DESCRIPTION

*ReadTurn

SAD2+CR

SAD2+AP+CR

SAD2+2AP+CR

SAD2+3AP+CR

SAD2+1

SAD2+AP+1

SAD2+2AP+1

SAD2+3AP+1

SAD2+4AP+CR

SAD2+5AP+CR

SAD2+6AP+CR

SAD2+7AP+CR

SAD2+8AP+CR

SAD2+9AP+CR

SAD2+4AP+1

SAD2+5AP+1

SAD2+6AP+1

SAD2+7AP+1

SAD2+8AP+1

SAD2+9AP+1

SAD2+10AP+CR

SAD2+11AP+CR

SAD2+12AP+CR

SAD1+AP+CR CG1

SAD2+10AP+1

SAD2+11AP+1

SAD2+12AP+1

SAD1+AP+1 CG1

SAD2+13AP+CR

SAD2+14AP+CR

SAD2+15AP+CR

SAD2+13AP+1

SAD2+14AP+1

SAD2+15AP+1

SAD2+(SL1-7)AP+CR

SAD2+(SL1-6)AP+CR

SAD2+(SL1-5)AP+CR

SAD2+(SL1-7)AP+1

SAD2+(SL1-6)AP+1

SAD2+(SL1-5)AP+1

SAD2+(SL1-4)AP+CR

SAD2+(SL1-3)AP+CR

SAD2+(SL1-2)AP+CR

SAD2+(SL1-4)AP+1

SAD2+(SL1-3)AP+1

SAD2+(SL1-2)AP+1

SAD1+(SL1/8)AP+1 CG1 SAD1+(SL1/8)AP+CR CG 1

SAD2+(SL1)AP+CR

SAD2+(SL1-1)AP+CR

SAD2+(SL1)AP+1

SAD2+(SL1-1)AP+1

SAD4+CR

SAD4+AP+CR

SAD4+2AP+CR

SAD4+3AP+CR

SAD4+1

SAD4+AP+1

SAD4+2AP+1

SAD4+3AP+1

SAD4+4AP+CR

SAD4+5AP+CR

SAD4+6AP+CR

SAD4+7AP+CR

SAD4+8AP+CR

SAD4+4AP+1

SAD4+5AP+1

SAD4+6AP+1

SAD4+7AP+1

SAD4+8AP+1

SAD4+9AP+CR

SAD4+10AP+CR

SAD4+11AP+CR

SAD4+12AP+CR

SAD4+13AP+CR

SAD4+9AP+1

SAD4+10AP+1

SAD4+11AP+1

SAD4+12AP+1

SAD4+13AP+1

SAD4+14AP+CR

SAD4+15AP+CR

SAD4+14AP+1

SAD4+15AP+1

SAD4+(LF-SL2-7)AP+CR

SAD4+(LF-SL2-6)AP+CR

SAD4+(LF-SL2-5)AP+CR

SAD4+(LF-SL2-4)AP+CR

SAD4+(LF-SL2-7)AP+1

SAD4+(LF-SL2-6)AP+1

SAD4+(LF-SL2-5)AP+1

SAD4+(LF-SL2-4)AP+1

SAD4+(LF-SL2)AP+CR

SAD4+(LF-SL2-3)AP+CR

SAD4+(LF-SL2-2)AP+CR

SAD4+(LF-SL2-1)AP+CR

SAD4+(LF-SL2)AP+1

SAD4+(LF-SL2-3)AP+1

SAD4+(LF-SL2-2)AP+1

SAD4+(LF-SL2-1)AP+1

SAD2

SAD2+AP

2 (3)

LineNo 1 … (1)

VA0-15(case4)

<< (W/S, OV, DM2, DM1, FY) = (1, 0, 0, 0, 8) >> (BK1, BK2, BK3, BK4) = (Character (Layer1), Graphic (Layer2), Character (Layer1), Graphic (Layer2))

SAD2+2AP

SAD2+3AP

SAD2+4AP

SAD2+5AP

SAD1 CG1 SAD1+1 CG1 SAD1+CR CG1

3 … (5)

4 (7)

5 …67 …89 …

SAD2+6AP

SAD2+7AP

SAD2+8AP

SAD2+9AP

SAD2+10AP

SAD2+11AP

SAD2+12AP

SAD2+13AP

SAD1+AP CG1

11 …1213 …1415 …

SAD2+14AP

SAD2+15AP

SAD2+(SL1-7)AP

SL1-7 …

SAD2+(SL1-6)AP

SL1-6

SAD2+(SL1-5)AP

SL1-5 …

SAD2+(SL1-4)AP

SAD1+(SL1/8)AP CG1

SL1-4

SAD2+(SL1-3)AP

SL1-3 …

SAD2+(SL1-2)AP

SAD2+(SL1-1)AP

SL1-1 … (LF-3)

SL1-2 (LF-5)

SAD2+(SL1)AP

SL1 (LF-1)

SAD4

SAD4+AP

SL1+1 … (2)

SL1+2 (4)

SAD4+2AP

SAD4+3AP

SAD4+4AP

SAD4+5AP

SAD3 CG3 SAD3+1 CG3 SAD3+CR CG3

SL1+3 … (6)

SL1+4 (8)

SL1+5 …

SL1+6

SAD4+6AP

SAD4+7AP

SAD4+8AP

SAD4+9AP

SL1+7 …

SL1+8

SL1+9 …

SL1+10

SAD4+10AP

SL1+11 …

SAD4+11AP

SL1+12

SAD4+12AP

SAD3+AP CG3 SAD3+AP+1 CG3 SAD3+AP+CR CG3

SL1+13 …

SAD4+13AP

SL1+14

SAD4+14AP

SL1+15 …

SAD4+15AP

SL1+16

SAD4+(LF-SL2-7)AP

SAD4+(LF-SL2-6)AP

SAD4+(LF-SL2-5)AP

SAD4+(LF-SL2-4)AP

SAD4+(LF-SL2-3)AP

SAD4+(LF-SL2-2)AP

SAD4+(LF-SL2-1)AP

SAD3+(LD/8)AP CG3 SAD3+(LF/8)+1 CG3 SAD3+(LF/8)+CR CG3

LF-7 …

LF-6

LF-5 …

LF-4

LF-3 …

LF-2 (LF-4)

LF-1 … (LF-2)

56 EPSON S1D13700 Technical Manual

SAD4+(LF-SL2)AP

LF (LF)

Page 62

*ReadTurn

4: FUNCTION DESCRIPTION

SAD2+CR

SAD2+AP+CR

SAD2+2AP+CR

SAD2+3AP+CR

SAD1+CR

SAD1+AP+CR

SAD1+2AP+CR

SAD1+3AP+CR

SAD2+1

SAD2+AP+1

SAD2+2AP+1

SAD2+3AP+1

SAD1+1

SAD1+AP+1

SAD1+2AP+1

SAD1+3AP+1

SAD2+4AP+CR

SAD2+5AP+CR

SAD2+6AP+CR

SAD2+7AP+CR

SAD2+8AP+CR

SAD1+4AP+CR

SAD1+5AP+CR

SAD1+6AP+CR

SAD1+7AP+CR

SAD1+8AP+CR

SAD2+4AP+1

SAD2+5AP+1

SAD2+6AP+1

SAD2+7AP+1

SAD2+8AP+1

SAD1+4AP+1

SAD1+5AP+1

SAD1+6AP+1

SAD1+7AP+1

SAD1+8AP+1

SAD2+9AP+CR

SAD2+10AP+CR

SAD2+11AP+CR

SAD2+12AP+CR

SAD2+13AP+CR

SAD2+14AP+CR

SAD1+9AP+CR

SAD1+10AP+CR

SAD1+11AP+CR

SAD1+12AP+CR

SAD1+13AP+CR

SAD1+14AP+CR

SAD2+9AP+1

SAD2+10AP+1

SAD2+11AP+1

SAD2+12AP+1

SAD2+13AP+1

SAD2+14AP+1

SAD1+9AP+1

SAD1+10AP+1

SAD1+11AP+1

SAD1+12AP+1

SAD1+13AP+1

SAD1+14AP+1

SAD2+15AP+CR

SAD1+15AP+CR

SAD2+15AP+1

SAD1+15AP+1

SAD2+(SL1-7)AP+CR

SAD2+(SL1-6)AP+CR

SAD2+(SL1-5)AP+CR

SAD1+(SL1-7)AP+CR

SAD1+(SL1-6)AP+CR

SAD1+(SL1-5)AP+CR

SAD2+(SL1-7)AP+1

SAD2+(SL1-6)AP+1

SAD2+(SL1-5)AP+1

SAD1+(SL1-7)AP+1

SAD1+(SL1-6)AP+1

SAD1+(SL1-5)AP+1

SAD2+(SL1-4)AP+CR

SAD2+(SL1-3)AP+CR

SAD2+(SL1-2)AP+CR

SAD1+(SL1-4)AP+CR

SAD1+(SL1-3)AP+CR

SAD1+(SL1-2)AP+CR

SAD2+(SL1-4)AP+1

SAD2+(SL1-3)AP+1

SAD2+(SL1-2)AP+1

SAD1+(SL1-4)AP+1

SAD1+(SL1-3)AP+1

SAD1+(SL1-2)AP+1

SAD4+CR

SAD2+(SL1)AP+CR

SAD2+(SL1-1)AP+CR

SAD1+(SL1)AP+CR

SAD1+(SL1-1)AP+CR

SAD4+1

SAD2+(SL1)AP+1

SAD2+(SL1-1)AP+1

SAD1+(SL1)AP+1

SAD1+(SL1-1)AP+1

SAD4+AP+CR

SAD4+2AP+CR

SAD4+3AP+CR

SAD4+4AP+CR

SAD4+5AP+CR

CG3 SAD3+CR CG3

SAD4+AP+1

SAD4+2AP+1

SAD4+3AP+1

SAD4+4AP+1

SAD4+5AP+1

SAD4+6AP+CR

SAD4+7AP+CR

SAD4+8AP+CR

SAD4+9AP+CR

SAD4+10AP+CR

SAD4+6AP+1

SAD4+7AP+1

SAD4+8AP+1

SAD4+9AP+1

SAD4+10AP+1

SAD4+11AP+CR

SAD4+12AP+CR

SAD4+11AP+1

SAD4+12AP+1

SAD4+13AP+CR

SAD4+14AP+CR

SAD4+15AP+CR

SAD4+13AP+1

SAD4+14AP+1

SAD4+15AP+1

SAD4+(LF-SL2-7)AP+CR

SAD4+(LF-SL2-6)AP+CR

SAD4+(LF-SL2-5)AP+CR

SAD4+(LF-SL2-4)AP+CR

SAD4+(LF-SL2-7)AP+1

SAD4+(LF-SL2-6)AP+1

SAD4+(LF-SL2-5)AP+1

SAD4+(LF-SL2-4)AP+1

SAD4+(LF-SL2)AP+CR

SAD4+(LF-SL2-3)AP+CR

SAD4+(LF-SL2-2)AP+CR

SAD4+(LF-SL2-1)AP+CR

SAD4+(LF-SL2)AP+1

SAD4+(LF-SL2-3)AP+1

SAD4+(LF-SL2-2)AP+1

SAD4+(LF-SL2-1)AP+1

SAD2

SAD2+AP

SAD2+2AP

SAD2+3AP

SAD2+4AP

SAD1

SAD1+AP

SAD1+2AP

SAD1+3AP

SAD1+4AP

2 (3)

3 … (5)

4 (7)

5 …67 …89 …

<< (W/S, OV, DM2, DM1, FY) = (1, 0, 0, 0, 8) >> (BK1, BK2, BK3, BK4) = (Character (Layer1), Graphic (Layer2), Character (Layer1), Graphic (Layer2))

LineNo 1 … (1)

SAD2+5AP

SAD2+6AP

SAD2+7AP

SAD2+8AP

SAD1+5AP

SAD1+6AP

SAD1+7AP

SAD1+8AP

SAD2+9AP

SAD2+10AP

SAD2+11AP

SAD2+12AP

SAD1+9AP

SAD1+10AP

SAD1+11AP

SAD1+12AP

11 …1213 …1415 …

SAD2+13AP

SAD1+13AP

SAD2+14AP

SAD1+14AP

SAD2+15AP

SAD1+15AP

SAD2+(SL1-7)AP

SAD2+(SL1-6)AP

SAD1+(SL1-7)AP

SAD1+(SL1-6)AP

SL1-7 …

SL1-6

SAD2+(SL1-5)AP

SAD2+(SL1-4)AP

SAD1+(SL1-5)AP

SAD1+(SL1-4)AP

SL1-5 …

SL1-4

SAD2+(SL1-3)AP

SAD1+(SL1-3)AP

SL1-3 …

SAD2+(SL1-2)AP

SAD2+(SL1-1)AP

SAD1+(SL1-2)AP

SAD1+(SL1-1)AP

SL1-2 (LF-5)

SL1-1 … (LF-3)

SAD2+(SL1)AP

SAD1+(SL1)AP

SL1 (LF-1)

SAD4

SAD4+AP

SL1+1 … (2)

SL1+2 (4)

SAD4+2AP

SAD4+3AP

SAD4+4AP

SAD4+5AP

SAD3 CG3 SAD3+

SL1+4 (8)

SL1+5…SL1+6

SL1+3 … (6)

SAD4+6AP

SAD4+7AP

SAD4+8AP

SAD4+9AP

SL1+7 …

SL1+8

SL1+9 …

SL1+10

SAD4+10AP

SL1+11 …

SAD4+11AP

SL1+12

SAD4+12AP

SAD3+AP CG3 SAD3+AP+1 CG3 SAD3+AP+CR CG3

SL1+13 …

SAD4+13AP

SL1+14

SAD4+14AP

SL1+15 …

SAD4+15AP

SL1+16

SAD4+(LF-SL2-7)AP

SAD4+(LF-SL2-6)AP

SAD4+(LF-SL2-5)AP

SAD4+(LF-SL2-4)AP

SAD4+(LF-SL2-3)AP

SAD4+(LF-SL2-2)AP

SAD4+(LF-SL2-1)AP

SAD3+(LD/8)AP CG3 SAD3+(LF/8)+1 CG3 SAD3+(LF/8)+CR CG3

LF-7 …

LF-6

LF-5 …

LF-4

LF-3 …

LF-2 (LF-4)

LF-1 … (LF-2)

S1D13700 Technical Manual EPSON 57

SAD4+(LF-SL2)AP

LF (LF)

Page 63

4: FUNCTION DESCRIPTION

*ReadTurn

SAD2+CR

SAD2+AP+CR

SAD2+2AP+CR

SAD2+3AP+CR

SAD2+1

SAD2+AP+1

SAD2+2AP+1

SAD2+3AP+1

SAD2+4AP+CR

SAD2+5AP+CR

SAD2+6AP+CR

SAD2+7AP+CR

SAD2+8AP+CR

SAD2+4AP+1

SAD2+5AP+1

SAD2+6AP+1

SAD2+7AP+1

SAD2+8AP+1

SAD2+9AP+CR

SAD2+10AP+CR

SAD2+11AP+CR

SAD2+12AP+CR

SAD2+13AP+CR

SAD2+14AP+CR

SAD1+AP+CR CG1

SAD2+9AP+1

SAD2+10AP+1

SAD2+11AP+1

SAD2+12AP+1

SAD2+13AP+1

SAD2+14AP+1

SAD1+AP+1 CG1

SAD2+15AP+CR

SAD2+15AP+1

SAD2+(SL1-7)AP+CR

SAD2+(SL1-6)AP+CR

SAD2+(SL1-5)AP+CR

SAD2+(SL1-7)AP+1

SAD2+(SL1-6)AP+1

SAD2+(SL1-5)AP+1

SAD2+(SL1-4)AP+CR

SAD2+(SL1-3)AP+CR

SAD2+(SL1-2)AP+CR

SAD2+(SL1-4)AP+1

SAD2+(SL1-3)AP+1

SAD2+(SL1-2)AP+1

SAD1+(SL1/8)AP+1 CG1 SAD1+(SL1/8)AP+CR CG1

SAD2+(SL1)AP+CR

SAD2+(SL1-1)AP+CR

SAD2+(SL1)AP+1

SAD2+(SL1-1)AP+1

SAD4+CR

SAD4+AP+CR

SAD4+2AP+CR

SAD4+3AP+CR

SAD3+CR

SAD3+AP+CR

SAD3+2AP+CR

SAD3+3AP+CR

SAD4+1

SAD4+AP+1

SAD4+2AP+1

SAD4+3AP+1

SAD1+1

SAD3+AP+1

SAD3+2AP+1

SAD3+3AP+1

SAD4+4AP+CR

SAD4+5AP+CR

SAD4+6AP+CR

SAD4+7AP+CR

SAD4+8AP+CR

SAD3+4AP+CR

SAD3+5AP+CR

SAD3+6AP+CR

SAD3+7AP+CR

SAD3+8AP+CR

SAD4+4AP+1

SAD4+5AP+1

SAD4+6AP+1

SAD4+7AP+1

SAD4+8AP+1

SAD3+4AP+1

SAD3+5AP+1

SAD3+6AP+1

SAD3+7AP+1

SAD3+8AP+1

SAD4+9AP+CR

SAD4+10AP+CR

SAD4+11AP+CR

SAD4+12AP+CR

SAD4+13AP+CR

SAD3+9AP+CR

SAD3+10AP+CR

SAD3+11AP+CR

SAD3+12AP+CR

SAD3+13AP+CR

SAD4+9AP+1

SAD4+10AP+1

SAD4+11AP+1

SAD4+12AP+1

SAD4+13AP+1

SAD3+9AP+1

SAD3+10AP+1

SAD3+11AP+1

SAD3+12AP+1

SAD3+13AP+1

SAD4+14AP+CR

SAD4+15AP+CR

SAD3+14AP+CR

SAD3+15AP+CR

SAD4+14AP+1

SAD4+15AP+1

SAD3+14AP+1

SAD3+15AP+1

SAD4+(LF-SL2-7)AP+CR

SAD4+(LF-SL2-6)AP+CR

SAD4+(LF-SL2-5)AP+CR

SAD4+(LF-SL2-4)AP+CR

SAD3+(LF-SL1-4)AP+CR

SAD3+(LF-SL1-5)AP+CR

SAD3+(LF-SL1-6)AP+CR

SAD3+(LF-SL1-7)AP+CR

SAD4+(LF-SL2-7)AP+1

SAD4+(LF-SL2-6)AP+1

SAD4+(LF-SL2-5)AP+1

SAD4+(LF-SL2-4)AP+1

SAD3+(LF-SL1-4)AP+1

SAD3+(LF-SL1-5)AP+1

SAD3+(LF-SL1-6)AP+1

SAD3+(LF-SL1-7)AP+1

SAD4+(LF-SL2)AP+CR

SAD4+(LF-SL2-3)AP+CR

SAD4+(LF-SL2-2)AP+CR

SAD4+(LF-SL2-1)AP+CR

SAD3+(LF-SL1)AP+CR

SAD3+(LF-SL1-1)AP+CR

SAD3+(LF-SL1-2)AP+CR

SAD3+(LF-SL1-3)AP+CR

SAD4+(LF-SL2)AP+1

SAD4+(LF-SL2-3)AP+1

SAD4+(LF-SL2-2)AP+1

SAD4+(LF-SL2-1)AP+1

SAD3+(LF-SL1)AP+1

SAD3+(LF-SL1-1)AP+1

SAD3+(LF-SL1-2)AP+1

SAD3+(LF-SL1-3)AP+1

SAD2

SAD2+AP

SAD2+2AP

SAD2+3AP

SAD2+4AP

SAD1 CG1 SAD1+1 CG1 SAD1+CR CG1

2 (3)

3 … (5)

4 (7)

5 …67 …89 …

LineNo 1 … (1 )

<< (W/S, OV, DM2, DM1, FY) = (1, 0, 0, 0, 8) >> (BK1, BK2, BK3, BK4) = (Character (Layer1), Graphic (Layer2), Character (Layer1), Graphic (Layer2))

SAD2+5AP

SAD2+6AP

SAD2+7AP

SAD2+8AP

SAD2+9AP

SAD2+10AP

SAD2+11AP

SAD2+12AP

SAD1+AP CG1

11 …1213 …1415 …

SAD2+13AP

SAD2+14AP

SAD2+15AP

SAD2+(SL1-7)AP

SL1-7 …

SAD2+(SL1-6)AP

SL1-6

SAD2+(SL1-5)AP

SL1-5 …

SAD2+(SL1-4)AP

SAD1+(SL1/8)AP CG1

SL1-4

SAD2+(SL1-3)AP

SL1-3 …

SAD2+(SL1-2)AP

SAD2+(SL1-1)AP

SL1-2 (LF-5)

SL1-1 … (LF-3)

SAD2+(SL1)AP

SL1 (LF-1)

SAD4

SAD4+AP

SAD3

SAD3+AP

SL1+1 … (2)

SL1+2 (4)

SAD4+2AP

SAD4+3AP

SAD4+4AP

SAD4+5AP

SAD3+2AP

SAD3+3AP

SAD3+4AP

SAD3+5AP

SL1+4 (8)

SL1+5 …

SL1+6

SL1+3 … (6)

SAD4+6AP

SAD4+7AP

SAD4+8AP

SAD4+9AP

SAD3+6AP

SAD3+7AP

SAD3+8AP

SAD3+9AP

SL1+7 …

SL1+8

SL1+9 …

SL1+10

SAD4+10AP

SAD3+10AP

SL1+11 …

SAD4+11AP

SAD3+11AP

SL1+12

SAD4+12AP

SAD3+12AP

SL1+13 …

SAD4+13AP

SAD3+13AP

SL1+14

SAD4+14AP

SAD3+14AP

SL1+15 …

SAD4+15AP

SAD3+15AP

SL1+16

SAD4+(LF-SL2-7)AP

SAD4+(LF-SL2-6)AP

SAD4+(LF-SL2-5)AP

SAD4+(LF-SL2-4)AP

SAD4+(LF-SL2-3)AP

SAD4+(LF-SL2-2)AP

SAD4+(LF-SL2-1)AP

SAD3+(LF-SL1-1)AP

SAD3+(LF-SL1-2)AP

SAD3+(LF-SL1-3)AP

SAD3+(LF-SL1-4)AP

SAD3+(LF-SL1-5)AP

SAD3+(LF-SL1-6)AP

SAD3+(LF-SL1-7)AP

LF-7 …

LF-6

LF-5 …

LF-4

LF-3 …

LF-2 (LF-4)

LF-1 … (LF-2)

58 EPSON S1D13700 Technical Manual

SAD4+(LF-SL2)AP

SAD3+(LF-SL1)AP

LF (LF)

Page 64

*ReadTurn

4: FUNCTION DESCRIPTION

SAD2+CR

SAD2+AP+CR

SAD2+2AP+CR

SAD2+3AP+CR

SAD1+CR

SAD1+AP+CR

SAD1+2AP+CR

SAD1+3AP+CR

SAD2+1

SAD2+AP+1

SAD2+2AP+1

SAD2+3AP+1

SAD1+1

SAD1+AP+1

SAD1+2AP+1

SAD1+3AP+1

SAD2+4AP+CR

SAD2+5AP+CR

SAD2+6AP+CR

SAD2+7AP+CR

SAD2+8AP+CR

SAD1+4AP+CR

SAD1+5AP+CR

SAD1+6AP+CR

SAD1+7AP+CR

SAD1+8AP+CR

SAD2+4AP+1

SAD2+5AP+1

SAD2+6AP+1

SAD2+7AP+1

SAD2+8AP+1

SAD1+4AP+1

SAD1+5AP+1

SAD1+6AP+1

SAD1+7AP+1

SAD1+8AP+1

SAD2+9AP+CR

SAD2+10AP+CR

SAD2+11AP+CR

SAD2+12AP+CR

SAD2+13AP+CR

SAD2+14AP+CR

SAD1+9AP+CR

SAD1+10AP+CR

SAD1+11AP+CR

SAD1+12AP+CR

SAD1+13AP+CR

SAD1+14AP+CR

SAD2+9AP+1

SAD2+10AP+1

SAD2+11AP+1

SAD2+12AP+1

SAD2+13AP+1

SAD2+14AP+1

SAD1+9AP+1

SAD1+10AP+1

SAD1+11AP+1

SAD1+12AP+1

SAD1+13AP+1

SAD1+14AP+1

SAD2+15AP+CR

SAD1+15AP+CR

SAD2+15AP+1

SAD1+15AP+1

SAD2+(SL1-7)AP+CR

SAD2+(SL1-6)AP+CR

SAD2+(SL1-5)AP+CR

SAD1+(SL1-7)AP+CR

SAD1+(SL1-6)AP+CR

SAD1+(SL1-5)AP+CR

SAD2+(SL1-7)AP+1

SAD2+(SL1-6)AP+1

SAD2+(SL1-5)AP+1

SAD1+(SL1-7)AP+1

SAD1+(SL1-6)AP+1

SAD1+(SL1-5)AP+1

SAD2+(SL1-4)AP+CR

SAD2+(SL1-3)AP+CR

SAD2+(SL1-2)AP+CR

SAD1+(SL1-4)AP+CR

SAD1+(SL1-3)AP+CR

SAD1+(SL1-2)AP+CR

SAD2+(SL1-4)AP+1

SAD2+(SL1-3)AP+1

SAD2+(SL1-2)AP+1

SAD1+(SL1-4)AP+1

SAD1+(SL1-3)AP+1

SAD1+(SL1-2)AP+1

SAD4+CR

SAD2+(SL1)AP+CR

SAD2+(SL1-1)AP+CR

SAD3+CR

SAD1+(SL1)AP+CR

SAD1+(SL1-1)AP+CR

SAD4+1

SAD2+(SL1)AP+1

SAD2+(SL1-1)AP+1

SAD1+1

SAD1+(SL1)AP+1

SAD1+(SL1-1)AP+1

SAD4+AP+CR

SAD4+2AP+CR

SAD4+3AP+CR

SAD4+4AP+CR

SAD4+5AP+CR

SAD3+AP+CR

SAD3+2AP+CR

SAD3+3AP+CR

SAD3+4AP+CR

SAD3+5AP+CR

SAD4+AP+1

SAD4+2AP+1

SAD4+3AP+1

SAD4+4AP+1

SAD4+5AP+1

SAD3+AP+1

SAD3+2AP+1

SAD3+3AP+1

SAD3+4AP+1

SAD3+5AP+1

SAD4+6AP+CR

SAD4+7AP+CR

SAD4+8AP+CR

SAD4+9AP+CR

SAD4+10AP+CR

SAD3+6AP+CR

SAD3+7AP+CR

SAD3+8AP+CR

SAD3+9AP+CR

SAD3+10AP+CR

SAD4+6AP+1

SAD4+7AP+1

SAD4+8AP+1

SAD4+9AP+1

SAD4+10AP+1

SAD3+6AP+1

SAD3+7AP+1

SAD3+8AP+1

SAD3+9AP+1

SAD3+10AP+1

SAD4+11AP+CR

SAD4+12AP+CR

SAD3+11AP+CR

SAD3+12AP+CR

SAD4+11AP+1

SAD4+12AP+1

SAD3+11AP+1

SAD3+12AP+1

SAD4+13AP+CR

SAD4+14AP+CR

SAD4+15AP+CR

SAD3+13AP+CR

SAD3+14AP+CR

SAD3+15AP+CR

SAD4+13AP+1

SAD4+14AP+1

SAD4+15AP+1

SAD3+13AP+1

SAD3+14AP+1

SAD3+15AP+1

SAD4+(LF-SL2)AP+CR

SAD4+(LF-SL2-1)AP+CR

SAD4+(LF-SL2-2)AP+CR

SAD4+(LF-SL2-3)AP+CR

SAD4+(LF-SL2-4)AP+CR

SAD4+(LF-SL2-5)AP+CR

SAD4+(LF-SL2-6)AP+CR

SAD4+(LF-SL2-7)AP+CR

SAD3+(LF-SL1)AP+CR

SAD3+(LF-SL1-1)AP+CR

SAD3+(LF-SL1-2)AP+CR

SAD3+(LF-SL1-3)AP+CR

SAD3+(LF-SL1-4)AP+CR

SAD3+(LF-SL1-5)AP+CR

SAD3+(LF-SL1-6)AP+CR

SAD3+(LF-SL1-7)AP+CR

SAD4+(LF-SL2)AP+1

SAD4+(LF-SL2-1)AP+1

SAD4+(LF-SL2-2)AP+1

SAD4+(LF-SL2-3)AP+1

SAD4+(LF-SL2-4)AP+1

SAD4+(LF-SL2-5)AP+1

SAD4+(LF-SL2-6)AP+1

SAD4+(LF-SL2-7)AP+1

SAD3+(LF-SL1)AP+1

SAD3+(LF-SL1-1)AP+1

SAD3+(LF-SL1-2)AP+1

SAD3+(LF-SL1-3)AP+1

SAD3+(LF-SL1-4)AP+1

SAD3+(LF-SL1-5)AP+1

SAD3+(LF-SL1-6)AP+1

SAD3+(LF-SL1-7)AP+1

VA0-15(case5)

<< (W/S, OV, DM2, DM1, FY) = (1, 0, 1, 1, 8) >> (BK1, BK2, BK3, BK4) = (Graphic (Layer1), Graphic (Layer2), Graphic (Layer1), Graphic (Layer2))

SAD2

SAD2+AP

SAD1

SAD1+AP

2 (3)

LineNo 1 … (1)

SAD2+2AP

SAD2+3AP

SAD2+4AP

SAD2+5AP

SAD1+2AP

SAD1+3AP

SAD1+4AP

SAD1+5AP

3 … (5)

4 (7)

5 …67 …89 …

SAD2+6AP

SAD2+7AP

SAD2+8AP

SAD2+9AP

SAD1+6AP

SAD1+7AP

SAD1+8AP

SAD1+9AP

SAD2+10AP

SAD2+11AP

SAD2+12AP

SAD2+13AP

SAD1+10AP

SAD1+11AP

SAD1+12AP

SAD1+13AP

11 …1213 …1415 …

SAD2+14AP

SAD1+14AP

SAD2+15AP

SAD1+15AP

SAD2+(SL1-7)AP

SAD2+(SL1-6)AP

SAD1+(SL1-7)AP

SAD1+(SL1-6)AP

SL1-7 …

SL1-6

SAD2+(SL1-5)AP

SAD1+(SL1-5)AP

SL1-5 …

SAD2+(SL1-4)AP

SAD1+(SL1-4)AP

SL1-4

SAD2+(SL1-3)AP

SAD1+(SL1-3)AP

SL1-3 …

SAD2+(SL1-2)AP

SAD2+(SL1-1)AP

SAD1+(SL1-2)AP

SAD1+(SL1-1)AP

SL1-2 (LF-5)

SL1-1 … (LF-3)

SAD2+(SL1)AP

SAD1+(SL1)AP

SL1 (LF-1)

SAD4

SAD4+AP

SAD3

SAD3+AP

SL1+1 … (2)

SL1+2 (4)

SAD4+2AP

SAD4+3AP

SAD4+4AP

SAD4+5AP

SAD3+2AP

SAD3+3AP

SAD3+4AP

SAD3+5AP

SL1+4 (8)

SL1+3 … (6)

SL1+5 …

SL1+6

SAD4+6AP

SAD4+7AP

SAD4+8AP

SAD4+9AP

SAD3+6AP

SAD3+7AP

SAD3+8AP

SAD3+9AP

SL1+7 …

SL1+8

SL1+9 …

SL1+10

SAD4+10AP

SAD3+10AP

SL1+11 …

SAD4+11AP

SAD3+11AP

SL1+12

SAD4+12AP

SAD3+12AP

SL1+13 …

SAD4+13AP

SAD3+13AP

SL1+14

SAD4+14AP

SAD3+14AP

SL1+15 …

SAD4+15AP

SAD3+15AP

SL1+16

SAD4+(LF-SL2-1)AP

SAD4+(LF-SL2-2)AP

SAD4+(LF-SL2-3)AP

SAD4+(LF-SL2-4)AP

SAD4+(LF-SL2-5)AP

SAD4+(LF-SL2-6)AP

SAD4+(LF-SL2-7)AP

SAD3+(LF-SL1-1)AP

SAD3+(LF-SL1-2)AP

SAD3+(LF-SL1-3)AP

SAD3+(LF-SL1-4)AP

SAD3+(LF-SL1-5)AP

SAD3+(LF-SL1-6)AP

SAD3+(LF-SL1-7)AP

LF-7 …

LF-6

LF-5 …

LF-4

LF-3 …

LF-2 (LF-4)

LF-1 … (LF-2)

S1D13700 Technical Manual EPSON 59

SAD4+(LF-SL2)AP

SAD3+(LF-SL1)AP

LF (LF)

Page 65

4: FUNCTION DESCRIPTION

(3) Basic timing

The basic read cycle of display memory in the S1D13700 varies with the clock divide ratios set, as shown below.

When the display clock frequency divide ratio = 1/4, display data is output every 8 system clock periods. When the display clock frequency divide ratio = 1/8, display data is output every 16 system clock periods. When the display clock frequency divide ratio = 1/16, display data is output every 32 system clock

periods.

1-frame period

Display Data

Figure 4-5 Basic read cycle of display memory

Display period

TC/R

C/R

Line

1 2

[L/F]

0 0 0

Frequency division

adjustment period

R R R

Figure 4-6 Relationship between TC/R and C/R

60 EPSON S1D13700 Technical Manual

Page 66

4.1.4 Cursor

(1) Cursor register function

The cursor register in the S1D13700 serves dual purposes as a cursor address register required to display the cursor on the screen, and as an address pointer to be referenced when accessing display memory.

Cursor register

To access any display memory area other than the screen while displaying the cursor, the cursor address must be preset before attempting such access and restored to the previous value after access is completed.

Note: The cursor will disappear if the cursor address is moved to any area other than the screen

(2) Direction of cursor movement

The cursor address is automatically shifted in the speciﬁed direction from the value preset by a memory control command.

(3) Cursor display layer

Although the S1D13700 can display up to three overlaid layers, the cursor can be displayed in only one of those layers. In other words, the cursor-attribute layer (or layer in which the cursor can be displayed) is:

4: FUNCTION DESCRIPTION

Cursor display address register

Address pointer

for more than several 100 ms.

First layer (L1) during two-layer composition, or Third layer (L3) during three-layer composition.

The cursor will not appear if moved to other than those cursor-attribute layers. If the cursor must be displayed, change the layers or move the cursor-attribute layer to the cursor address location.

Although the cursor is generally displayed in text mode, the S1D13700 can also display a dummy cursor in graphics mode. This is accomplished by using the graphics screen as a display plane while not displaying the text screen, but using it to only generate addresses for cursor control.

Example: DISP ON/OFF

D =1 FC1 = 0 FC0 = 1

Cursor ON

FP1 = 0 FP0 = 0

First screen block (text screen) OFF

FP3 = 0 FP2 = 1

Second screen block (graphics screen) ON

S1D13700 Technical Manual EPSON 61

Page 67

4: FUNCTION DESCRIPTION

4.1.5 Relationship between Display Memory and Screens

The display memory of the S1D13700 may be used as a virtual screen of greater width than the physical size of the LCD panel address range (C/R). One layer of the S1D13700 may be considered a window through which to look at the part of display memory that comprises a virtual screen. This window can be divided into two blocks that may correspond to independent areas on the virtual screen. Therefore, it is possible to use one block as a dynamically scrollable data area and the other as a stationary message area. (See Figures 4-7 and 4-

8.)

Screen

SAD1

First screen

SAD2

Second screen

SAD1

First screen block

SAD3

Third screen block

SAD2

Second screen

SAD2

SAD1

Third screen block

[W/S = 0]

block

SAD3

Third screen block

Second screen block

L2 L3

SAD1 SAD3

SAD3

SAD1

SAD2

C/R C1

SAD2

SAD4

SAD2

C/R

SAD1

C/R

G2 G4

C/R

CG RAM

C/R

Screen

SAD1

First screen block

SAD3

Third screen block

SAD2

Second screen block

SAD4

Fourth screen block

[W/S = 1]

Figure 4-7 Relationship between display memory and screens

62 EPSON S1D13700 Technical Manual

Page 68

0000H

4: FUNCTION DESCRIPTION

SAD1

L/F

SAD1

code

Character

SAD2

Back layer

SAG

CSRA

(MSB) (LSB)

D7 D0

0000

SL1

0300 0400

0800

SL2

2000

2800

4440 4800

4A00

F000

CRY

CRX

Window (display area)

C/R

Figure 4-8 Window and display memory settings

(MSB) (LSB)

–

Page 1

Page 2

Page 1

Page 2

CG RAM

Unused

CG ROM

D7 D0–

(code)

A B C

X Y

(code)

a b g

(MSB) (LSB)

–

D7 D0

HEX

70 01110000 88 10001000 88 10001000 88 10001000

Characters

F8 11111000 88 10001000 88 10001000 00 00000000

0000

02FF

0800

1FFF

#4800

#4807

ABC 1 2

(MSB) (LSB)

1 2 3 4 5 6

Example of

character A

Display memory space (VRAM virtual screen)

[FX] ≤ 8 Dots [FY] ≤ 16 Dots [CRX] ≤ 8 Dots [CRY] ≤ 16 Dots [C/R] ≤ 240 Bytes [L/F] ≤ 256 Lines [AP] ≤ 64K Byte

FFFFH

(MSB) (LSB)

D0 D7 D0

Figure 4-9 Example of display memory mapping

S1D13700 Technical Manual EPSON 63

Page 69

4: FUNCTION DESCRIPTION

4.1.6 Determining Various Parameters

(1) Determining FX

Determine the character ﬁeld size in the X direction [FX] from the number of dots in the X direction of display [VD] and the number of characters in the X direction [VC].

[VD] / [VC] ≤ [FX]

The brackets [ ] denote an integral value beginning with 1, and [FX] indicates the number of dots.

(2) Determining C/R

Next, determine a value for [C/R] from the values of [VC] and [FX].

[C/R] = | [FX] / 8 | rounded up x [VC]

Note: [C/R] indicates the number of characters obtained in units of addresses.

(3) Determining TC/R

TC/R must maintain the relationship [TC/R] ≥ [C/R] + 4.

(4) Relationship between f

OSC

and f

Once TC/R has been determined, the lower-limit value of the oscillation frequency (f from the equation below because the frame frequency (f predetermined.

≥ {[TC/R] x 9 + 1} x [L/F] x f

OSC

Note: 1. If standard crystals close to f

ate f

value for crystals with higher oscillation frequencies than the obtained value. To

OSC

do so, reverse the calculation of the [TC/R] value in the equation above.

2. For the f

value of Epson LCD units, refer to the LCD unit specifications.

(5) Symptoms observed when TC/R is set incorrectly

• Scanning of display in the Y direction stops, with horizontal lines displayed in high contrast.

• All pixels go on or go off.

• The LP pin output signal is incomplete or inactive.

• The display of graphics or text becomes unstable.

Should any of the symptoms above be observed, even though the S1D13700’s other signals connected to the LCD unit are normal, check whether the TC/R value is correct. If the TC/R value is the cause of the problem, simply set a larger TC/R value to restore normal operation.

Table 4-2 Example of Parameters for the LCD Unit

Number of pixels

x Y)

x 240

320

[FX] [FY] [C/R] TC/R

e.g., [FX] = 8 dots 320 ÷ 8 = 40...0 No blank dots

e.g., [FX] = 6 dots 320 ÷ 6 = 53...2 Two blank dots

From a practical point of view , 8, 16, etc. are suitable.

) can be obtained

OSC

) and number of display lines [L/F] are

thus obtained are unavailable , determine the appropri-

OSC

X'tal

(MHz)

[CR] = 40 = address → 27H During HDOT SCR, [C/R] = 41 addresses

↑

[CR] = 53 = address → 34H During HDOT SCR, [C/R] = 54 addresses

2BH 5.72

38H 7.40

Note: 1. Because the number of display dots varies with each LCD unit, there will be some frac-

tional display dots depending on the value set f or FX. In such case, the S1D13700 automatically blanks fractional parts at the right edge of the panel, and thus eliminates the need to manipulate display memory for adjustment.

2. Calculations are made assuming f

64 EPSON S1D13700 Technical Manual

= 60 Hz.

Page 70

4.1.7 Scrolling

The MPU dynamically rewrites the scroll address registers (SAD1–SAD4) that provide the read start address in the S1D13700’s display memory, thereby allowing various scroll modes to be set. In this case, the MPU manages all operations to execute scrolling, select scroll mode, and set a scroll rate.

(1) Intra-page scrolling

This refers to a mode of scroll operation whereby scrolling is performed within display memory space equivalent to one screen.

All lines are scrolled one line up and the bottom line is deleted as shown below. Since the S1D13700 does not automatically delete the bottom line, the MPU must rewrite the scroll address registers and simultaneously write blank data to the S1D13700.

4: FUNCTION DESCRIPTION

Before scrolling

After scrolling

ABC WXYZ 789

WXYZ 789

Blank

SAD1

SAD3 SAD1

AP C/R

ABC WXYZ 789

Cleared

WXYZ 789

(2) Inter-page scrolling and page switching

Scrolling between pages and page switching can be performed only when display memory has more than one-screen equivalent capacity.

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4: FUNCTION DESCRIPTION

(3) Scrolling in the X direction

This refers to scrolling display in the X direction one character at a time, regardless of display memory size.

Before scrolling

ABC

123

XYZ

SAD1

ABC 123

XYZ

C/R

After scrolling

XYZ1

SAD1

ABC 123

XYZ

(4) Omnidirectional scrolling

This mode of scrolling is available when display memory has ample capacity larger than one screen in both the X and Y directions. Although display is normally scrolled one character at a time, the HDO T SCR command can be used to scroll display in the X direction one dot at a time.

Note 1

Before scrolling

EFG

TUV

ABC

EFG

TUV

1234

C/R

567

After scrolling

TUV

1234

ABC

EFG

TUV

1234

567

(5) Scroll units

Y direction X direction Text mode Characters Dots or characters Graphics mode Dots Dots

Note 2

Note 1: Omnidirectional scrolling in units of dots is possible by using the SCROLL and HDOT

SCR commands in combination.

Note 2: On a split screen, individual screen blocks cannot be independently scrolled in the X

direction in dot units.

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4: FUNCTION DESCRIPTION

(6) Dotwise scrolling in the X direction (HDOT SCR)

Figure 4-10 shows the relationship between commands and display when a display pattern is smoothly scrolled to the left. In this case, the screen (window) moves to the right on a virtual screen. Therefore, the MPU only needs to sequentially increment the value of the HDOT SCR command parameter (number of dots to be shifted) without modifying the display start address (SAD) in the S1D13700 to shift display leftward one dot at a time. Then when display has been dot-shifted a distance equal to the character ﬁeld, the MPU should reset the value of the HDOT SCR command parameter to 00H and simultaneously increment SAD by one address. Thus, smooth scrolling in the X direction is possible by performing this series of operations at appropriate time intervals.

To scroll the display pattern to the right, change the display dot address by reversing the order above. Should the window reach either edge of the virtual screen, use the MPU to manage the screen. Note that when smooth scrolling continues, the screen is not affected.

Also note that when scrolling display dotwise in the X direction using the HDOT SCR command, scrolling cannot be controlled separately in each layer because all layers are scrolled at the same time.

SAD = SAD

SAD = SAD + 1

HDOT SCR

parameter value

P1 = 00H

P1 = 01H

P1 = 02H

P1 = 03H

P1 = 07H

P1 = 00H

Off the screen Screen

Figure 4-10 Example of using HDOT SCR ([FX] = 8)

SAD SAD+1 SAD+2

Enlarged view

Screen

C/R

Virtual screen

Note: Because the speed at which the LCD responds to instructions varies with temperature,

smooth scrolling at low temperatures in particular may not easily be recognized.

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Error

4.1.8 Attribute Display using the Layered Function

The S1D13700 provides a means of increasing the ability of expression on a monochrome liquid crystal display. More speciﬁcally, it uses the OVLAY and DISP ON/OFF commands to display characters in inverse video, produce halftone menu pads, and ﬂash a given screen area for various highlighting effects as shown below.

Highlighting effects MX1 MX0 Screen

Inverse

Halftone display

Area flashing display

Rules and underlining00

011

010

000

IV IV EPSON

1 0

11RL RL

EPSON

ME ME Yes, No

Yes, No

BL BL

LINE LINE

First layer,

single screen

Error

LINE LINE

Second layer, single screen

Use of the S1D13700’s layered function will efﬁciently accomplish the highlighting effects above. The following describes a few examples of using this function to realize highlighting effects. Not all such effects can be used within the same screen block, however.

(1) Inverse

1 Using the layered function

[Exclusive OR’ing of ﬁrst layer (text) and second layer (graphics)] 1-1 CSRW Write turn-on data “1” to the entire graphic area where characters are

CSDIR to be displayed in inverse video. MWRITE

1-2 OVLAY Specify an overlay method using the OVALY command so that the ﬁrst

MX0 = “1” and second layers will be exclusive OR’d. MX1 = “0”

1-3 DISP ON/OFF Turn display of the ﬁrst and second layers on using the DISP ON/OFF

FP0= FP2 command. → Characters are displayed in inverse video.

= “1”

FP1= FP3

= “0”

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(2) Halftone display

The S1D13700 uses the DISP ON/OFF command’s FP parameter to produce halftone display. This is accomplished by ﬂashing the screen at 15 Hz. However, because this method of display may cause display to ﬂicker, characteristics of the LCD module used must be carefully considered.

1 Menu pad display

[OR’ing by the layered function]

OVLAY

P1 = 00H Disable ﬂashing of the ﬁrst layer and enable ﬂashing of the second

DISP ON/OFF layer at 17 Hz, then overlay the ﬁrst and second layers by OR’ing.

P1 = 34H

SAD1 SAD2

AB AB

First layer Second layer Screen

Halftone

2 Graph display

[OR’ing by the layered function]

OVLAY

P1 = 00H Disable ﬂashing of the ﬁrst layer and enable ﬂashing of the second

DISP ON/OFF layer at 15 Hz, then overlay the ﬁrst and second layers by OR’ing.

P1 = 34H

When displaying various data in the form of a graph for comparison purposes, this method of display is very effective because two types of diagrams distinguishable by differences in contrast can be displayed.

(3) Area ﬂashing

1 For flashing a few characters

Because the S1D13700 has a high-speed interface circuit, alternately rewriting the character and blank codes from the MPU to ﬂash characters is an appropriate method. In this case, the MPU rewrites display data at intervals of 0.5 to 1.0 second as regulated by its internal timer.

2 For flashing a large area

Divide the ﬁrst or second layer into halves with only the area required made to ﬂash at 2 Hz, and overlay the halved layer blocks by OR’ing.

Scroll DISP ON/OFF OVLAY

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4: FUNCTION DESCRIPTION

4.2 Oscillator Circuit

The S1D13700 features a built-in oscillator circuit, with a resonator connected to the XG and XD pins to generate oscillation. In addition to the crystal resonator, the feedback resistor Rf, drain resistor Rd, and oscillation capacitors CG and CD must be externally connected to the chip. The RC time constant needed to produce stable oscillation varies with the crystal resonator used and condition of the board. Determine the appropriate RC value through careful evaluation.

S1D13700

XCG1

XCD1

X’tal

Note: Note that the higher the oscillation frequency, the smaller the CG and CD values.

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4.3 Example of Initial Settings

No Command Operation

1 Power on

Waits until power supply

stabilizes.

3 SYSTEM SET

C = 40H P1 = 38H

Waits at least 3 ms after V

Initializes the S1D13700. M0 : Internal CG ROM M1 : CG RAM (up to 32 characters) M2 : Y-direction character field range (8 lines) W/S : Dual-screen drive method IV : Uppermost line not corrected

≥ 4.5 V and external reset are deasserted.

4: FUNCTION DESCRIPTION

8-bit bus interface

LCD unit 320

x 240 dot

P2 = 87H

P3 = 07H

P4 = 27FH

P5 = 2DH

P6 = EFH

P7 = 28H

P8 = 00H

4 SCROLL

C = 44H P1 = 00H P2 = 00H

P3 = 7FH

P4 = 00H P5 = 10H

P6 = 7FH

P7 = 00H P8 = 04H P9 = 00H P10 = 30H

FX : X-direction character field (8 dots) WF : Two-frame AC drive

FY : Y-direction character field (8 dots)

C/R : Display address range (40 columns per line)

TC/R : Total display address time in X direction (46 addresses per line)

L/F : Number of display lines (240)

AP : Virtual screen size in X direction (41 addresses)

Sets start address of the first screen block to 0000H.

Sets number of display lines in the first screen block to 120.

Sets start address of the second screen block to 1000H.

Sets number of display lines in the second screen block to 120.

Sets start address of the third screen block to 0400H.

Sets start address of the fourth screen block to 3000H.

= 6.0MHz,

OSC

fFR = 60Hz

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No Command Operation

Display

(SAD1)0000H

0257H

(SAD3)0400H

0657H

memory

First-screen block memory Third-screen block memory

(SAD2)1000H

Second-screen block memory

22BFH

(SAD4)3000H

Fourth-screen block memory

42BFH

5 HDOT SCR

C = 5AH P1 = 00H Sets number of dots to be shifted in the X direction to 0.

6 OVLAY

C = 5BH P1 = 01H

7 DISP ON/OFF

C = 58H P1 = 56H

8 CSRW

C = 46H P1 = 00H P2 = 00H

9 Clears the first layer

display data.

10 Clears the second layer

display data.

11 CSR FORM

C = 5DH P1 = 04H P2 = 86H

12 DISP ON/OFF

C = 59H

MX1, MX0 : Overlaid for inverse display DM1 : First screen block in text mode DM2 : Third screen block in text mode

D : Entire screen display disabled FC1, FC0 : Cursor made to blink at 2 Hz FP1, FP0 : Display of first screen block turned on FC3, FP2 : Display of second and fourth screen blocks turned on FP5, FP4 : Display of third screen block turned on

Sets cursor address to the first screen block’s start address (home position).

Writes 20H (space character code) to memory location corresponding to the first layer (text screen).

Writes 00H (dot turn-off data) to memory location corresponding to the second layer (graphics screen).

CRX : Cursor size in X direction (5 dots) CRY : Cursor size in Y direction (7 dots) CM : Block cursor

Restores entire screen display.

screen

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No Command Operation

13 CSR DIR

C = 4CH Sets direction of cursor movement so that the cursor shifts to the right.

14 MWRITE

C = 42H P1 = 20H P2 = 45H P3 = 50H P4 = 53H P5 = 4FH P6 = 4EH

Sets space code. Sets character code for the letter “E.” Sets character code for the letter “P.” Sets character code for the letter “S.” Sets character code for the letter “O.” Sets character code for the letter “N.”

4: FUNCTION DESCRIPTION

15 CSRW

C = 46H P1 = 00H P2 = 10H

16 CSR DIR

C = 4FH

17 MWRITE

C = 42H P1 = FFH

– –

P9 = FFH

18 CSRW

C = 46H P1 = 01H P2 = 10H

19 MWRITE

C = 42H P1 = FFH

P9 = FFH

Presets cursor address to the second screen block’s start address.

Sets direction of cursor movement so that the cursor shifts downward.

Fills the left side of displayed letter E with dots by entering character code to 9 lines of the second screen block that corresponds to the first column on the first line.

Presets the cursor address to address 10001H.

Fills the second screen block that corresponds to the second column on the first line with dots.

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4: FUNCTION DESCRIPTION

No Command Operation

20 CSRW Repeats steps 18 and 19 until the background screen of the EPSON character string is filled

with dots as shown below.

29 MWRITE

Inverse display

30 CSRW

C = 46H

Presets the cursor address to the first column on the first line of the third screen block. P1 = 00H P2 = 04H

31 CSR DIR

C = 4CH Sets direction of cursor movement so that the cursor shifts to the right.

32 MWRITE

C = 42H P1 = 44H P2 = 6FH P3 = 74H P4 = 20H P5 = 4DH P6 = 61H P7 = 74H P8 = 72H P9 = 69H P10 = 78H P11 = 20H P12 = 4CH P13 = 43H P14 = 44H

Sets character code for the letter “D.”

Sets character code for the letter “o.”

Sets character code for the letter “t.”

Sets character code for the letter “ ”

Sets character code for the letter “M.”

Sets character code for the letter “a.”

Sets character code for the letter “t.”

Sets character code for the letter “r.”

Sets character code for the letter “i.”

Sets character code for the letter “x.”

Sets character code for the letter “ ”

Sets character code for the letter “L.”

Sets character code for the letter “C.”

Sets character code for the letter “D.”

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Example of display mode settings [1]

[1] For overlaying text and graphics

1. Conditions (1) 320 x 240 dots: Single-screen drive method (1/240 duty cycle) (2) First layer: Text display (3) Second layer: Graphic display (4) Character font: 8 x 8 dots (5) CG RAM unused

2. Display memory allocation (1) First layer (text display)

Number of characters in horizontal direction = 320 / 8 = 40 Number of characters in vertical direction = 240 / 8 = 30

Therefore, the required size of memory is 40 x 30 = 1,200 bytes.

(2) Second layer (graphic display)

Number of characters in horizontal direction = 320 / 8 = 40 Number of characters in vertical direction = 240 / 1 = 240

Therefore, the required size of memory is 40 x 240 = 9,600 bytes.

4: FUNCTION DESCRIPTION

0000h

First layer (text)

(1,200 bytes)

[Relationship between display and memory]

04B0h

Second layer (graphics)

(9,600 bytes)

2A2Fh

04AFh

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4: FUNCTION DESCRIPTION

3. Example of basic register settings SYSTEM SET Determination of TC/R

C = 40H P1 = 30H Assuming f P2 = 87H when f P3 = 07H P4 = 27H 6 MHz = {[TC/R] x 9 + 1} x 240 x 60 P5 = 2DH Therefore, [TC/R] = 46 P6 = EFH TC/R = 2DH P7 = 28H P8 = 00H

SCROLL

C = 44H P1 = 00H P2 = 00H P3 = F0H P4 = B0H P5 = 04H P6 = F0H P7 = *H P8 = *H P9 = *H P10 = *H * : don't care

= 6 MHz,

OSC

= 60 Hz

CSRFORM

C = 5DH P1 = 04H P2 = 86H

HDOT SCR

C = 5AH P1 = 00H

OVLAY

C = 5BH P1 = 00H

DISP ON/OFF

C = 59H P1 = 16H

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Example of display mode settings [2]

[2] For overlaying two graphic screens

1. Conditions (1) 320 x 240 dots: Single-screen drive method (1/240 duty cycle) (2) First layer: Graphic display (3) Second layer: Graphic display

2. Display memory allocation (1) First layer (graphic display)

Number of characters in horizontal direction = 320 / 8 = 40 Number of characters in vertical direction = 240 / 1 = 240

Therefore, the required size of memory is 40 x 240 = 9,600 bytes.

(2) Second layer (graphic display)

For the ﬁrst layer, the required size of memory is 40 x 240 = 9,600 bytes.

[Relationship between display and memory]

2580h

Second layer (graphics) (9,600 bytes)

4: FUNCTION DESCRIPTION

0000h

First layer (graphics) (9,600 bytes)

4AFFh

257Fh

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4: FUNCTION DESCRIPTION

3. Example of basic register settings SYSTEM SET Determination of TC/R

C = 40H P1 = 30H Assuming f P2 = 87H when f P3 = 00H P4 = 27H 6 MHz = {[TC/R] x 9 + 1} x 240 x 60 P5 = 2DH Therefore, [TC/R] = 46 P6 = EFH TC/R = 2DH P7 = 28H P8 = 00H

SCROLL

C = 44H P1 = 00H P2 = 00H P3 = F0H P4 = 80H P5 = 25H P6 = F0H P7 = *H P8 = *H P9 = *H P10 = *H * : don't care

= 6 MHz,

OSC

= 60 Hz

CSRFORM

C = 5DH P1 = 04H P2 = 86H

HDOT SCR

C = 5AH P1 = 00H

OVLAY

C = 5BH P1 = 00H

DISP ON/OFF

C = 59H P1 = 16H

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Example of display mode settings [3]

[3] For overlaying three graphic screens

1. Conditions (1) 320 x 240 dots: Single-screen drive method (1/240 duty cycle) (2) First layer: Graphic display (3) Second layer: Graphic display (4) Third layer: Graphic display

2. Display memory allocation (1) First layer (graphic display)

Number of characters in horizontal direction = 320 / 8 = 40 Number of characters in vertical direction = 240 / 1 = 240

Therefore, the required size of memory is 40 x 240 = 9,600 bytes.

(2) Second and third layers (graphic display)

For the ﬁrst layer, the required size of memory is 40 x 240 = 9,600 bytes each.

[Relationship between display and memory]

4B00h

Third layer (graphics) (9,600 bytes)

4: FUNCTION DESCRIPTION

0000h

First layer (graphics) (9,600 bytes)

2580h

Second layer (graphics) (9,600 bytes)

707Fh

4AFFh

257Fh

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4: FUNCTION DESCRIPTION

3. Example of basic register settings SYSTEM SET Determination of TC/R

C = 40H P1 = 30H Assuming f P2 = 87H when f P3 = 00H P4 = 27H 6 MHz = {[TC/R] x 9 + 1} x 240 x 60 P5 = 2DH Therefore, [TC/R] = 46 P6 = EFH TC/R = 2DH P7 = 28H P8 = 00H

SCROLL

C = 44H P1 = 00H P2 = 00H P3 = F0H P4 = 80H P5 = 25H P6 = F0H P7 = 00H P8 = 4BH P9 = *H P10 = *H * : don't care

= 6 MHz,

OSC

= 60 Hz

CSRFORM

C = 5DH P1 = 04H P2 = 86H

HDOT SCR

C = 5AH P1 = 00H

OVLAY

C = 5BH P1 = 00H

DISP ON/OFF

C = 59H P1 = 16H

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4: FUNCTION DESCRIPTION

4.4 Character Fonts and Character Codes

4.4.1 Character Fonts (Internal CG)

Lower 4bit (D0 to D3) or Character Code (Hexadeclmal)

0123456789ABCDEF

) or Character Code (Hexadeclmal)

to D

Hloner 4bit (D

Note: The character size is 5 x 7 dots.

represents a 6 x 8-dot entirely black pattern.

■

S1D13700

Technical Manual

EPSON

Page 87

4: FUNCTION DESCRIPTION

4.4.2 Character Codes

Relationship between Character Codes and Those Usable as CG RAM (for combined use with internal CG ROM)

Table 4-3 Character Codes

8-bit series

0000000011111111 0000111100001111 0011001100110011 0101010101010101

YS3 LS3

D7 D6 D5 D4 D3 D2 D1 D0 0123456789ABCDEF

0000 0 0001 1 0010 2 0011 3 0100 4 0101 5 0110 6 0111 7 1000 8 1001 9 1010 A 10 1011 B 11 1100 C 12 1101 D 13 1110 E 14 1111 F 15

4 loworder bits

4 high-

order

bits

“

‘

CG RAM1 CG RAM2

M1= 0

M1=1

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5: SPECIFICATIONS

5SPECIFICATIONS

5.1 Absolute Maximum Ratings

Parameter Symbol Rating Unit Remark

Power Supply Voltage

Input Voltage

Output Voltage

Output Current per Pin I Operating Temperature T

Storage Temperature T

Soldering Temperature and Time T

HV LV

OUT

solder

OUT

opr

stg

Note: 1. When using a power supply with high impedance, a large potential difference between the

chip’s internal power supply voltage and the input voltage may occur, thus making the power supply susceptible to latch-up. Therefore, pay particular attention to the power supply and its wiring.

2. All voltage are based on V

= 0V

3. The symbol H*** indicates 5 V-block pins; L*** indicates 3.3 V-block pins.

-0.3 – 7.0 V

-0.3 – 4.0 V

-0.3 – HVDD + 0.5 V

-0.3 – LVDD + 0.5 V

-0.3 – HVDD + 0.5 V

-0.3 – LVDD + 0.5 V ±30 mA

-40 – 85 °C

-65 – 150 °C

Heat resistance rank SE2 —

5.2 Recommended Operating Conditions

Rated Value

— HIOVDD V — NIOVDD V

Parameter Symbol

Power Supply Voltage

(High Voltage)

Power Supply Voltage

(Low Voltage)

Core Power Supply

Voltage Input Voltage HIOVIN — V Input Voltage NIOVIN — V

Operating Temperature TOPR — -20 25 70 °C

HIOVDD V

NIOVDD VSS = 0V

COREVDD VSS = 0V 3.0 3.3 3.6 V COREVDD

Test

Condition

= 0V

Min. Typ. Max.

4.5 5.0 5.5

3.0 3.3 3.6

4.5 5.0 5.5

3.0 3.3 3.6

Unit

V HIOVDD

V NIOVDD

Applicable

Pins

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5: SPECIFICATIONS

5.3 Electrical Characteristics

Parameter Symbol Test Condition

Input Leakage Current OFF-state Leakage Current

High Level Output Voltage V

Low Level Output Voltage V

High Level Input Voltage V

Low Level Input Voltage V

Positive Trigger Voltage V Negative Trigger Voltage V Hysteresis Voltage V

High Level Input Voltage V

Low Level Input Voltage V

Pulldown Resistance R

Operating Supply Current I

Quiescent Supply Current (between HV

and VSS)

Quiescent Supply Current (between LV

and VSS)

IOH = -8.0mA

=Min

IOL = 8.0m

=Min

CMOS level

IH1

HVDD = Max CMOS level

IL1

HVDD = Min CMOS Schmitt 2.0 — 4.0 V

T1+

CMOS Schmitt 0.8 — 3.1 V

T1-

CMOS Schmitt 0.3 —— V

TTL level

IH2

HVDD = Max TTL level

IL2

HVDD = Min VI = HV f

=10 MHz

OSC

Nonloaded

opr

256 x 200dot Sleep mode

XCG1, CS#, RD# = V Sleep mode

XCG1, CS#, RD# = V

—

—Note 2)

[VSS = 0V, HVDD = 4.5 – 5.5V, Ta = -40 – 85°C]

Rated Value

Min. Typ . Max.

-1

— —

1 1

Unit

HVDD-0.4 —— V

——0.4 V

3.5 ——V

——1.0 V

2.0 ——V

——0.8 V

30 60 144 kΩ

— TBD TBD mA

——30 uA

——35 uA

uA uA

Note: 1. The pulse applied to the RESET# pin must be held low for 200 µs or more to be effective.

However, avoid keeping the input pulse active for more than several seconds because the LCD’s d.c. drive capability may be adversely affected.

2. The VB0–DB7 pins come with a feedback circuit, so that even when input becomes high impedance, the pins retain the state held immediately before. Therefore, input voltage of an intermediate level allows input current to ﬂow to the pin.

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Parameter Symbol Test Condition

Input Leakage Current OFF-state Leakage Current

High Level Output Voltage V

Low Level Output Voltage V

High Level Input Voltage V

Low Level Input Voltage V

Positive Trigger Voltage V Negative Trigger Voltage V Hysteresis Voltage V Pulldown Resistance R

Operating Supply Current I

IOH = -6.0mA

IOL = 6.0m

LVTTL level

IH1

VDD = Max LVTTL level

IL1

VDD = Min LVTTL Schmitt 1.1 — 2.4 V

T1+

LVTTL Schmitt 0.6 — 1.8 V

T1-

LVTTL Schmitt 0.1 ——V

VI = V

OSC

Nonloaded

opr

256 x 200dot

Quiescent Supply Current (between LV

and VSS)

Sleep mode

XCG1, CS#, RD# = V

5: SPECIFICATIONS

[VSS = 0V, VDD = LVDD = 3.3 – 0.3V, Ta = -40 – 85°C]

Rated Value

Min. Typ . Max.

— -1 — 1uA

— Note 2) -1 — 1uA

=Min

HVDD-0.4 —— V

——0.4 V

2.0 ——V

——0.8 V

20 50 120 kΩ

=10 MHz

— TBD TBD mA

——35 uA

Unit

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5: SPECIFICATIONS

5.4 Timing Characteristics

5.4.1 System Bus (Generic Bus/80-series MPU)

CLK

MCLK

AB [16:0]

CS#

WR#, RD#

WAIT#

DB [15:0] (write)

t2 t8

t14

t9 t

valid

t10

t1 1

t12 t6

t13 t5

DB [15:0] (read)

valid

* MCLK denotes CLKI or the internally generated system clock.

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5: SPECIFICATIONS

Gemeric Bus Interface Timing

[VSS = 0V, VDD = 4.5 – 5.5V, Ta = -40 – 85°C]

Symbol Parameter

CLK

BUS clock frequency — 64 MHz BUS clock period 1/f AB [16 : 0] setrup to first CLK rising edge where CS# = 0 and either

RD# = 0 or WR# = 0 t2 CS# setup to CLK rising edge 9 — ns t3 RD#, WR# setup to CLK rising edge 9 — ns t4 RD#, WR# state change to WAIT# driven low 1 5 ns t5 RD# falling edge to DB [15 : 0] driven (ead cycle) 3Tc+9ns — Tclk t6 DB [15 : 0] setup to 4th rising CLK edge after CS# = 0 and WR# = 0 1 — T t7 AB [16 : 0], CS# hold from RD#, WR# rising edge 8 — ns

CS# deasserted to reasserted t8

- When read

- when Write (next cycle = write cycle)

- when Write (next cycle = read cycle)

2Tclk+8ns 5Tclk+8ns

t9 WAIT# rising edge to RD#, WR# rising edge 0 — ns

WR#, RD# deasserted to reasserted

t10

t11

- When read

- when Write (next cycle = write cycle)

- when Write (next cycle = read cycle)

Rising edge of either RD# or WR# to WAIT# high impedance 0.5

TCLK

2Tclk+8ns 5Tclk+8ns

t12 D [15 : 0] hold from WR# rising edge (write cycle) 1 — ns t13 D [15 : 0] hold from RD# rising edge (read cycle) 1 — ns

Cycle Length Read

t14

Write (next write cycle) Write (next read cycle)

Spec

Min. Max.

CLK

— ns

11 — ns

1Tclk

—

1Tclk

—

— 0.5 T

6 7

— T

Unit

CLK

ns ns ns

CLK

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5: SPECIFICATIONS

Gemeric Bus Interface Timing

[VSS = 0V, VDD = 3.0 – 3.6V, Ta = -40 – 85°C]

Symbol Parameter

CLK

BUS clock frequency — 64 MHz BUS clock period 1/f AB [16 : 0] setrup to first CLK rising edge where CS# = 0 and either

RD# = 0 or WR# = 0 t2 CS# setup to CLK rising edge 11 — ns t3 RD#, WR# setup to CLK rising edge 11 — ns t4 RD#, WR# state change to WAIT# driven low 1 7 ns t5 RD# falling edge to DB [15 : 0] driven (ead cycle) 3Tc+11ns — Tclk t6 DB [15 : 0] setup to 4th rising CLK edge after CS# = 0 and WR# = 0 1 — T t7 AB [16 : 0], CS# hold from RD#, WR# rising edge 10 — ns

CS# deasserted to reasserted t8

- When read

- when Write (next cycle = write cycle)

- when Write (next cycle = read cycle)

2Tclk+10ns 5Tclk+10ns

t9 WAIT# rising edge to RD#, WR# rising edge 0 — ns

WR#, RD# deasserted to reasserted

t10

t11

- When read

- when Write (next cycle = write cycle)

- when Write (next cycle = read cycle)

Rising edge of either RD# or WR# to WAIT# high impedance 0.5

TCLK

2Tclk+10ns 5Tclk+10ns

t12 D [15 : 0] hold from WR# rising edge (write cycle) 1 — ns t13 D [15 : 0] hold from RD# rising edge (read cycle) 1 — ns

Cycle Length Read

t14

Write (next write cycle) Write (next read cycle)

Spec

Min. Max.

CLK

— ns

12 — ns

1Tclk

—

1Tclk

—

— 0.5 T

6 7

— T

Unit

CLK

ns ns ns

CLK

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5.4.2 System Bus Read/write characteristics II (MC68K-series MPU)

CLK

MCLK

5: SPECIFICATIONS

AB[16:0], WR

CS#

AS#

RD#

(UDS, LDS)

WAIT#

(DTACK#)

t13

t5 t6

(RD# m6800)

t10 t9

DB[15:0](write)

valid

t12 t3

t1 1

DB[15:0](read) valid

* MCLK denotes CLKI or the internally generated system clock.

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5: SPECIFICATIONS

Motorola M68K#1 Interface Timing

[VSS = 0V, VDD = 4.5 – 5.5V, Ta = -40 – 85°C]

Symbol Parameter

CLK

BUS clock frequency — 64 MHz

BUS clock period 1/f

AB [16 : 0], WR# (R/W#) and CS# and AS# and RD# (UDS#, LDS#) t1

setup to first CLK rising edge t2 CS# and AS# asserted to WAIT# (DTACK#) driven 1 7 ns t3 RD# = 0 (UDS# = 0 or LDS# = 0) to DB [15 : 0] driven (read cycle) 3Tclk+9ns — ns t4 AB [16 : 0], WR# (R/W#) and CS# hold from AS# rising edge 0 — ns t5 WAIT# (DTACK#) falling edge to RD# (UDS#, LDS#) rising edge 1 — T

RD# (USD#, LDS#) deasserted high to reasserted low t6

- When read

- when Write (next cycle = write cycle)

- when Write (next cycle = read cycle)

2Tclk+8ns

5Tclk+8ns t7 CLK rising edge to WAIT# (DTACK#) high impedance — 1T t8 AS# rising edge to WAIT# (DTACK#) rising edge 3 12 ns

DB [15 : 0] valid to 4th CLK rising edge where CS# = 0, AS# = 0 and

either RD# = 0 (UDS# = 0 or LDS# = 0) (wirte cycle)

t10 DB [15 : 0] hold from RD# (UDS#, LDS#) falling edge (wirte cycle) 4 — ns

t11

t12

RD# (UDS#, LDS#) rising edge to DB [15 : 0] high impedance (read cycle)

DB [15 : 0] valid setup time to 2nd CLK falling edge after WAIT# (DTACK#) goes low (read cycle)

t13 Cycle Length Read

t13

Write (next write cycle) Write (next read cycle)

Spec

Min. Max.

CLK

— ns

9 — ns

1Tclk

—

CLK

1 — T

6 — ns

7 8

— T

Unit

CLK

ns ns ns

-2 ns

CLK

90 EPSON S1D13700 Technical Manual

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5: SPECIFICATIONS

Motorola M68K#1 Interface Timing

[VSS = 0V, VDD = 3.0 – 3.6V, Ta = -40 – 85°C]

Symbol Parameter

CLK

BUS clock frequency — 64 MHz BUS clock period 1/f AB [16 : 0], WR# (R/W#) and CS# and AS# and RD# (UDS#, LDS#)

setup to first CLK rising edge t2 CS# and AS# asserted to WAIT# (DTACK#) driven 1 10 ns t3 RD# = 0 (UDS# = 0 or LDS# = 0) to DB [15 : 0] driven (read cycle) 3Tclk+9ns — ns t4 AB [16 : 0], WR# (R/W#) and CS# hold from AS# rising edge 0 — ns t5 WAIT# (DTACK#) falling edge to RD# (UDS#, LDS#) rising edge 1 — T

RD# (UDS#, LDS#) deasserted high to reasserted low t6

- When read

- when Write (next cycle = write cycle)

- when Write (next cycle = read cycle)

2Tclk+8ns

5Tclk+8ns t7 CLK rising edge to WAIT# (DTACK#) high impedance — 1T t8 AS# rising edge to WAIT# (DTACK#) rising edge 3 15 ns

DB [15 : 0] valid to 4th CLK rising edge where CS# = 0, AS# = 0 and either RD# = 0 (UDS# = 0 or LDS# = 0) (wirte cycle)

t10 DB [15 : 0] hold from RD# (UDS#, LDS#) falling edge (wirte cycle) 4 — ns

t11

t12

RD# (UDS#, LDS#) rising edge to DB [15 : 0] high impedance (read cycle)

DB [15 : 0] valid setup time to 2nd CLK falling edge after WAIT# (DTACK#) goes low (read cycle)

Cycle Length Read

t13

Write (next write cycle) Write (next read cycle)

Spec

Min. Max.

CLK

— ns

9 — ns

1Tclk

—

-2 ns

CLK

1 — T

8 — ns

7 8

— T

Unit

CLK

ns ns ns

CLK

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5: SPECIFICATIONS

5.4.3 External Clock Input Characteristics

CLKI

tRCL

tWL

tFCL

tCL

[VSS = 0V, VDD = 4.5 – 5.5V, Ta = -40 – 85°C]

Symbol Parameter Unit

t t

RCL

FCL

External input clock rise time — 2ns External input clock fall time — 2ns High-level pulse width of external input clock 7 — ns Low-level pulse width of external input clock 7 — ns External input clock period 16.4 — ns

Min. Max.

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5.4.4 LCD Control Signal Timing Characteristics

(When driven at 1/64 duty cycle)

ROW NO

5: SPECIFICATIONS

164636261325416463

FPLINE (LP)

FPFRAME (YD)

MOD (WF)

YSCL

MOD (WF)

YSCL

FPLINE (LP)

FPSHIFT (XSCL)

0 – FPDAT3

FPDAT

XECL

FPSHIFT (XSCL)

FPDAT0 – FPDAT3

FPLINE (LP)

XECL

MOD (WF(B))

FPFRAME (YD)

ROW 1

1 Frame time

1 Line time

ROW 2

tf t

WXE

DHY

ROW 3

YSCL

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5: SPECIFICATIONS

Signal Symbol Parameter

FPSHIFT

(XSCL)

FPDAT0

–

FPDAT3

FPLINE

ÅiLPÅj

MOD (WF)

FPFRAME

(YD)

YSCL t

t t t

DHY

Shift Clock cycle time *1 XSCL Clock Pulse tCX/2-6 XD [3 : 0] hold from XSCL falling edge 2t

XD [3 : 0] setup to XSCL falling edge 2t Latch data setup time 2t

Latch pulse setup time 4t XSCL rising edge to LP falling edge delay time 0

WF delay time 6 ns

YSCL falling edge to YD falling edge 2t

YSCL clock pulse width 4t

CNF [3 : 2] XSCL Cycle Time

00 4Tc ( = MCLK) 01 8Tc 10 16Tc 11 No Support

Spec

Min. Max.

Unit

nst

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6 MPU INTERFACE

6.1 Connection to the System Bus

The S1D13700 uses a combination of CNF2/3/4, AB15–0, RD#, WR#, and CS# to discriminate information supplied to it via the system data bus as described in Section 2.2 “Pin Functions” on page 9.

In indirect interface mode, AB0 generally is connected to the least signiﬁcant bit of the system address bus. CNF2 and CNF3 are provided for changing the functions of S1D13700 pins 58 and 59 to enable the chip to be connected directly to the 80 or 68-series MPU bus, and are pulled high or low through a resistor when in use. For the 80-series MPU, the S1D13700 should normally be mapped in I/O space.

6.1.1 80-series MPU

AB15

CNF4

– AB1

0 0or1 0or1 0 1 Read from command/parameter registers 0 0or1 0or1 1 1 Write to command/parameter registers

AB0 RD# WR# Function

6: MPU INTERFACE

AB15

CNF4

– AB1

1 — 001 — 1 — 1 0 1 Data (display data and cursor address) read 1 — 0 1 0 Data (display data and parameter) write 1 — 1 1 0 Command write (code only)

AB0 RD# WR# Function

6.1.2 68-series MPU

AB15

CNF4

– AB1

0 0or1 0or1 1 1 Read from command/parameter registers 0 0or1 0or1 0 1 Write to command/parameter registers

CNF4

– AB1

1 — 011 — 1 — 1 1 1 Data (display data and cursor address) read 1 — 0 0 1 Data (display data and parameter) write 1 — 1 0 1 Command write (code only)

AB15

AB0

WR#

(R/W#)

WR#

(R/W#)

RD#

(E)

RD#

(E)

Function

S1D13700 Technical Manual EPSON 95

Epson S1D13700 User's & Technical Manual

Table of Contents

1: OVERVIEW

1.1 Features

1.2 System Overview

1.3 List of Abbreviations

2: PINS

2.1 Pin Connection

2.1.1 Pin Assignments

2.1.2 Pin Description

2.1.3 Package Dimensions

2.2 Pin Functions

2.2.1 Power Supply Pins

2.2.2 Oscillator and Clock Input Pins

2.2.3 System Bus Connecting Pins

2.2.4 LCD Driver Control Pins

2.2.5 TEST Control Pins

3COMMANDS AND COMMAND REGISTERS

3.1 Types of Commands (when Indirectly Interfaced)

3.2 Command Register Map (when Directly Interfaced)

3.3 Command Description

3.3.1 Operation Control Commands

3.3.2 Display Control Commands

3.3.3 Drawing Control Commands

3.3.4 Memory Control Commands

4FUNCTION DESCRIPTION

4.1 Display Functions

4.1.1 Screen Management

4.1.2 Character Generator (CG)

4.1.3 Screen Configuration

4.1.4 Cursor

4.1.5 Relationship between Display Memory and Screens

4.1.6 Determining Various Parameters

4.1.7 Scrolling

4.1.8 Attribute Display using the Layered Function

4.2 Oscillator Circuit

4.3 Example of Initial Settings

4.4 Character Fonts and Character Codes

4.4.1 Character Fonts (Internal CG)

4.4.2 Character Codes

5SPECIFICATIONS

5.1 Absolute Maximum Ratings

5.2 Recommended Operating Conditions

5.3 Electrical Characteristics

5.4 Timing Characteristics

5.4.1 System Bus (Generic Bus/80-series MPU)

5.4.2 System Bus Read/write characteristics II (MC68K-series MPU)

5.4.3 External Clock Input Characteristics

5.4.4 LCD Control Signal Timing Characteristics

6 MPU INTERFACE

6.1 Connection to the System Bus

6.1.1 80-series MPU

6.1.2 68-series MPU