EPSON S1D13506 service manual

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S1D13506 Color LCD/CRT/TV Controller
Power Consumption
Document Number: X25B-G-006-02
Copyright © 2001 Epson Research and Development, Inc. All Rights Reserved.
Information in this document is subject to change without notice. You may download and use this document, but only for your own use in evaluating Seiko Epson/EPSON products. You may not modify the document. Epson Research and Development, Inc. disclaims any representation that the contents of this document are accurate or current. The Programs/Technologies described in this document may contain material protected under U.S. and/or International Patent laws.
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Epson Research and Development
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S1D13506 Power Consumption X25B-G-006-02 Issue Date: 01/02/08
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Epson Research and Development
Vancouver Design Center
1 S1D13506 Power Consumption
S1D13506 power consumption is affected by many system design variables.
• Input clock frequency (CLKI/CLKI2): the CLKI/CLKI2 frequency determines the LCD/CRT frame-rate, CPU performance to memory, and other functions – the higher the input clock frequency, the higher the frame-rate, performance and power consumption.
• CPU interface: the S 1D13506 current c onsumption depen ds on the BUSCLK freque ncy, data width, number of toggling pins, and other factors – the higher the BUSCLK, the higher the CPU performance and power consumption.
voltage level: t he volt age leve l affects power co nsumption – the highe r the vol tage,
•V
DD
the higher the consumption.
• Display mode: the resolution and colo r depth affect power consumption – the higher the resolution/color depth, the higher the consumption.
• Internal CLK divide: internal registers allow the input clock to be divided before going to the internal logic blocks – the higher the divide, the lower the power consumption.
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There is a power save mode in the S1D13506. The power consumption is affected by various system design variables.
• DRAM refresh mode (CBR or self-refresh): self-refresh capable DRAM allows the S1D13506 to disable the internal memory clock thereby saving power.
• Clock states during the power save mode: disabling the clocks during power save mode has substantial power savings.
Power Consumption S1D13506 Issue Date: 01/02/08 X25B-G-006-02
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1.1 Conditions
Epson Research and Development
Vancouver Design Center
Table 1-1: “S1D13506 Power Consumption” gives an example of a specific environment and its effects on power consumption.
Table 1-1: S1D13506 Power Consumption
Test Condition
VDD = 3.3V, BUSCLK = 8MHz
CLKI = 6MHz
1
LCD Panel = 60Hz 320x240 4-bit Single Monochrome
CLKI = 6 MHz
2
LCD Panel = 60Hz 320x240 8-bit Single Color
CLKI = 25MHz
3
LCD Panel = 60Hz 640x480 8-bit Dual Monochrome
CLKI = 25MHz
4
LCD Panel = 60Hz 640x480 16-bit Dual Color
CLKI = 33.333MHz, CLKI2 = 25.175MHz
5
CRT = 60Hz 640x480 Color
CLKI = 33.333MHz, CLKI2 = 14.31818MHz
6
NTSC TV = 640x480 Color, S-Video output, no filter
CLKI = 33.333MHz, CLKI2 = 17.734475MHz
7
PAL TV = 640x480 Color, S-Video output, no filter
Color
Depth
4 bpp 21.22 3.14 .13 4 bpp 23.30
16 bpp 26.73
4 bpp 70.75 10.36 .13 4 bpp 91.74
16 bpp 99.03
4 bpp 224.86
16 bpp 242.68
4 bpp 359.83
16 bpp 372.04
4 bpp 364.78
16 bpp 374.02
S1D13506
Active
(mW)
Power Save Mode
Clocks
Active
(mW)
3.14 .138 bpp 24.98
10.40 .138 bpp 96.89
11.72 .138 bpp 233.44
10.00 .138 bpp 365.11
10.53 .138 bpp 369.07
1
Clocks
Removed
(mW)
2
Note
1. Conditions for software suspend with Clocks active:
• CPU interface inactive
• CLKI, CLKI2, BUSCLK active
• Self-Refresh DRAM
2. Conditions for software suspend with Clocks inactive:
• CPU interface inactive
• CLKI, CLKI2, BUSCLK stopped
• Self-Refresh DRAM
S1D13506 Power Consumption X25B-G-006-02 Issue Date: 01/02/08
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Epson Research and Development
Vancouver Design Center
Summary
The system design variables in Section 1, “S1D13506 Power Consumption” and in Table 1-1: “S1D13506 Power Consumption” show that S1D13506 power consumption depends on the specific implementation. Active Mode power consumption depends on the desired CPU performance and LCD/CRT frame-rate, whereas power save mode consumption depends on the CPU Interface and Input Clock state.
In a typical design environment, the S1D13506 can be configured to be an extremely power-efficient LCD/CRT/TV Controller with high performance and flexibility.
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Power Consumption S1D13506 Issue Date: 01/02/08 X25B-G-006-02
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S1D13506 Power Consumption X25B-G-006-02 Issue Date: 01/02/08
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