MP04TT500
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FEATURES
■ Dual Device Module
■ Electrically Isolated Package
■ Pressure Contact Construction
■ International Standard Footprint
■ Alumina (Non Toxic) Isolation Medium
■ Integral Water Cooled Heatsink
APPLICATIONS
■ Motor Control
■ Controlled Rectifier Bridges
■ Heater Control
■ AC Phase Control
VOLTAGE RATINGS
ORDERING INFORMATION
Order As:
MP04TT500-XX-W2 1/4 - 18 NPT connection
MP04TT500-XX-W3 1/4 - 18 NPT connection
MP04TT500-XX-W3A 1/4 - 18 NPT water connection
thread
XX shown in the part number about represents V
DRM
/100
selection required, eg. MP04TT500-27-W2
Note: When ordering, please use the complete part number.
KEY PARAMETERS
V
DRM
2800V
I
T(AV)(per arm)
480A
I
TSM(per arm)
11200A
I
T(RMS)(per arm)
753A
V
isol
3000V
MP04TT500
Dual Thyristor Water Cooled Module
Advance Information
DS5446-1.2 May 2001
Fig. 1 TT Circuit diagram
Fig. 2 Module package variants - (not to scale)
Module outline type code: MP04-W2
(See Package Details for further information)
2800
2700
2600
2500
MP04TT500-28
MP04TT500-27
MP04TT500-26
MP04TT500-25
Conditions
T
vj
= 0˚ to 125˚C,
I
DRM
= I
RRM
= 50mA
V
DSM
= V
RSM
=
V
DRM
= V
RRM
+ 100V
respectively
Lower voltage grades available
Type Number Repetitive Peak
Voltages
V
DRM VRRM
V
5 (G1)
6 (G2)
4 (K1)
7 (K2)
3 (A)
2 (A)
1 (AK)
Module outline type code:
MP04-W3
Module outline type code:
MP04-W3A
MP04TT500
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Parameter
Mean on-state current
RMS value
Surge (non-repetitive) on-current
I
2
t for fusing
Surge (non-repetitive) on-current
I
2
t for fusing
Isolation voltage
Test Conditions
Half wave resistive load, T
water (in)
= 25˚C
4.5 Ltr/min T
water (in)
= 40˚C
T
water (in)
= 25˚C @ 4.5 Ltr/min
T
water (in)
= 40˚C @ 4.5 Ltr/min
10ms half sine, T
j
= 125˚C
V
R
= 0
10ms half sine, T
j
= 125˚C
V
R
= 50% V
DRM
Commoned terminals to base plate.
AC RMS, 1 min, 50Hz
Symbol
I
T(AV)
I
T(RMS
I
TSM
I2t
I
TSM
I2t
V
isol
Units
A
A
A
A
kA
A
2
s
kA
A
2
s
V
Max.
540
480
845
753
11.25
633 x 10
3
9
506 x 10
3
3000
Test Conditions
dc, 4.5 Ltr/min
Half wave, 4.5 Ltr/min
3 Phase, 4.5 Ltr/min
Reverse (blocking)
-
Mounting - M6
Electrical connections - M10
Parameter
Thermal resistance - junction to water
(per thyristor)
Virtual junction temperature
Storage temperature range
Screw torque
THERMAL AND MECHANICAL RATINGS
ABSOLUTE MAXIMUM RATINGS - PER ARM
Stresses above those listed under 'Absolute Maximum Ratings' may cause permanent damage to the device. In extreme
conditions, as with all semiconductors, this may include potentially hazardous rupture of the package. Appropriate safety
precautions should always be followed. Exposure to Absolute Maximum Ratings may affect device reliability.
Symbol
R
th(j-w)
T
vj
T
stg
-
Units
˚C/kW
˚C/kW
˚C/kW
˚C
˚C
Nm (lb.ins)
Nm (lb.ins)
Max.
0.102
0.106
0.112
125
125
-
12 (106)
Min.
-
-
-
-
–40
6 (53)
-
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Units
mA
V/µs
A/µs
V
mΩ
Test Conditions
t V
RRM/VDRM
, Tj = 125˚C
To 67% V
DRM
, Tj = 125˚C
From 67% V
DRM
to 500A, gate source 10V, 5Ω
t
r
= 0.5µs, Tj = 125˚C
At T
vj
= 125˚C
At T
vj
= 125˚C
Parameter
Peak reverse and off-state current
Linear rate of rise of off-state voltage
Rate of rise of on-state current
Threshold voltage. (See note 1)
On-state slope resistance. (See note 1)
DYNAMIC CHARACTERISTICS
Symbol
I
RRM/IDRM
dV/dt
dI/dt
V
T(TO)
r
T
Max.
50
1000
500
0.91
0.65
Min.
-
-
-
-
-
Parameter
Gate trigger voltage
Gate trigger current
Gate non-trigger voltage
Peak forward gate voltage
Peak forward gate voltage
Peak reverse gate voltage
Peak forward gate current
Peak gate power
Mean gate power
Test Conditions
V
DRM
= 5V, T
case
= 25oC
V
DRM
= 5V, T
case
= 25oC
At V
DRM Tcase
= 125oC
Anode positive with respect to cathode
Anode negative with respect to cathode
-
Anode positive with respect to cathode
See table fig. 5
-
Symbol
V
GT
I
GT
V
GD
V
FGM
V
FGN
V
RGM
I
FGM
P
GM
P
G(AV)
GATE TRIGGER CHARACTERISTICS AND RATINGS
Max.
3.5
200
0.25
30
0.25
5
10
150
10
Units
V
mA
V
V
V
V
A
W
W
Note 1: The data given in this datasheet with regard to forward voltage drop is for calculation of the power dissipation in the
semiconductor elements only. Forward voltage drops measured at the power terminals of the module will be in excess of these
figures due to the impedance of the busbar from the terminal to the semiconductor.