Diodes AP7362 User Manual

A

Description

The AP7362 is a 1.5A adjustable output voltage linear regulator with

ultra-low dropout. The device includes pass element, error amplifier,

band-gap, current limit and thermal shutdown circuitry. The integrated

Enable block allows the part to be turned on and off via a logic signal.

A logic high level on EN turns the device on and a logic low turns the

part off.

The low dropout voltage characteristics and fast transient response to

step changes in load make it suitable for low voltage microprocessor

applications. The typical quiescent current is approximately 0.5mA

and changes little with load current. The built-in current-limit and

thermal-shutdown functions prevent damage to the IC in fault

conditions.

This device is available in U-DFN2030-8 and SO-8EP packages.

Features

 1.5A Ultra-Low Dropout Linear Regulator with EN  Ultra-Low Dropout: 190mV at 1.5A  Stable with 10µF Input/Output Capacitor, any type  Wide Input Voltage Range: 2.2V to 5.5V  Adjustable Output Voltage: 0.6V to 5.0V  Fixed Output Options: 1V, 1.2V, 1.5V, 1.8V, 2.5V, 3.3V  Low Ground Pin Current  25nA Quiescent Current in Shutdown Mode  V  V  Excellent Load/Line Transient Response  Current Limit and Thermal Shutdown Protection  Ambient Temperature Range: -40°C to +85°C  U-DFN2030-8, SO-8EP: Available in Lead free “Green” Molding

Accuracy of ±1.5% @ +25°C

ADJ

Accuracy of ±3% Over Line, Load and Temperature

ADJ

Compound (No Br, Sb)

 Totally Lead-Free & Fully RoHS Compliant (Notes 1 & 2)

 Halogen and Antimony Free. “Green” Device (Note 3)

P7362

1.5A, LOW QUIESCENT CURREENT, FAST TRANSIENT ULTRA-LOW DROPOUT LINEAR REGULATOR

Pin Assignments

GND

EN

IN

ADJ/

NC

U-DFN2030-8

1

2

3

4

(Top View)

6785

3214

IN INENGND

(Top View)

SO-8EP

OUTOUTOUT

8

ADJ/NC

OUT

7

OUT

6

OUT

5

Typical Application Circuit

V

IN

10µF

Enable

IN

EN

OUT

AP7362

GND

Fixed Output

V

OUT

10µF

V

IN

OUT

V

OUT

EN

AP7362

GND

R1

10µF

ADJ

R2

Applications

 ASIC Power Supplies in Printers, Graphics Cards, DVD Players,

STBs, Routers, etc

 FPGA and DSP Core or I/O Power Supplies

10µF

Enable

 SMPS Regulator  Conversion from 3.3V or 5V Rail

V 

OUT

Notes: 1. No purposely added lead. Fully EU Directive 2002/95/EC (RoHS) & 2011/65/EU (RoHS 2) compliant.

2. See http://www.diodes.com for more information about Diodes Incorporated’s definitions of Halogen- and Antimony-free, "Green" and Lead-free.

3. Halogen- and Antimony-free "Green” products are defined as those which contain <900ppm bromine, <900ppm chlorine (<1500ppm total Br + Cl) and <1000ppm antimony compounds.

Adjustable Output



R



1

V



REF



R





1

 

2



Rwhere

Ωk10

2

AP7362

Document number: DS35058 Rev. 6 - 2

1 of 15

www.diodes.com

August 2013

A

Pin Descriptions

Pin Name Pin Number Function

GND 1 Ground.

EN 2 Enable input, active high.

IN 3, 4 Voltage input pin.

OUT 5, 6, 7 Voltage output pin.

ADJ 8

NC 8 No connection for fixed output version.

EP EP

Output feedback pin for adjustable version only – a resistor divider from this pin to the OUT pin and ground sets the output voltage.

The exposed pad (EP) is used to remove heat from the package and it is recommended that it is connected to a copper area. The die is electrically connected to the exposed pad. It is recommended to connect it externally to GND, but should not be the only ground connection.

Functional Block Diagram

P7362

IN

EN

Gate

Dri ver

Current Limit and Thermal

Shutdown

0.605V

OUT

R

IN

EN

Gate

Dri ver

Current Limit

and Thermal

Shutdown

0.605V

GND

Fixed Version

Absolute Maximum Ratings (Note 4) (@T

Symbol Parameter Ratings Unit

ESD HBM Human Body Model ESD Protection 2000 V

ESD MM Machine Model ESD Protection 200 V

VIN Input Voltage -0.3 to +6.0 V

V

, VEN OUT, EN Voltage -0.3V to VIN +0.3 V

OUT

I

Continuous Load Current Internal Limited

OUT

TST Storage Temperature Range -65 to +150 °C

TJ Maximum Junction Temperature 150 °C

Note: 4. Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress

AP7362

Document number: DS35058 Rev. 6 - 2

Ratings only, and functional operation of the device at these or any other conditions beyond those indicated is not implied. Exposure to absolute-maximum rated conditions for extended periods may affect device reliability.

= +25°C, unless otherwise specified.)

A

2 of 15

www.diodes.com

Adjustable Version

OUT

ADJ

GND

August 2013

A

P7362

Recommended Operating Conditions (@T

= +25°C, unless otherwise specified.)

A

Symbol Parameter Min Max Unit

V

IN

I

OUT

T

A

TJ

Note: 5. Operating junction temperature must be evaluated and derated as needed, based on ambient temperature (TA), power dissipation (PD), maximum allowable operating junction temperature (T

Input voltage 2.2 5.5 V

Output Current 0 1.5 A

Operating Ambient Temperature -40 +85

Operating Junction Temperature (Note 5) -40 +125

), and package thermal resistance (θJA).

J-MAX

C C

Electrical Characteristics

(@TA = +25°C, V

= 3.3V, V

IN

OUT

=1.8V, I

= 10mA, VEN = VIN, C

OUT

= 10μF, C

IN

OUT

= 10μF, V

= 2V, unless otherwise stated.)

EN

Minimum and maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at T

= +25°C, and are provided for reference purposes only.

A

Symbol Parameter Test Conditions Min Typ Max Unit

T

V

= V

V

ADJ

V

ADJ

I

ADJ

V

DROPOUT

V

OUT

V

OUT

I

GND

I

SHDN

I

OUT-PK

ISC

VIH

VIL

I

IH

I

IL

t

d(OFF)

t

d(ON)

Notes: 6. Dropout voltage is the minimum voltage difference between the input and the output at which the output voltage drops 2% below its nominal value. For any output voltage less than 2.5V, the minimum V

7. The line and load regulation specification contains only the typical number. However, the limits for line and load regulation are included in the adjust voltage tolerance specification.

ADJ Pin Voltage

ADJ Pin Voltage (A Grade)

ADJ Pin Bias Current

Dropout Voltage (Note 6)

Line Regulation (Note 7)

/VIN

Load Regulation (Note 7)

/I

OUT

Ground Pin Current in Normal Operation Mode

Ground Pin Current

Peak Output Current

Short Circuit Current OUT grounded

Enable Logic High

Enable Logic Low

Enable Pin High Current

Enable Pin Low Current

Turn-Off Delay

Turn-On Delay

IN

I

OUT

V

= V

IN

I

OUT

VIN = V

I

OUT

VIN = V

I

OUT

I

OUT

V

EN

V

OUT

VIN = V

V

= VIN

EN

V

= 0V

EN

From V I

OUT

From V I

OUT

operating voltage is the limiting factor.

IN

to V

IN-MIN

IN-MAX

= 10mA to 1.5A

to V

IN-MIN

IN-MAX

= 10mA to 1.5A

to V

IN-MIN

= 1.5A, V

IN-MIN

OUT

to V

IN-MAX

= 10mA to 1.5A

< VIL

 V

IN-MIN

EN

OUT-NOM

to V

< VIL to V

-5%

IN-MAX

= 1.5A

> VIH to V

EN

= 1.5A

,

= 2.5V

= OFF,

OUT

= ON,

= +25°C

A

Over temp 0.575 0.635

T

= +25°C

A

Over temp 0.587 0.623

T

= +25°C

A

Over temp 750

T

= +25°C

A

Over temp 280

T

= +25°C

A

Over temp 0.05

T

= +25°C

A

Over temp 0.33

T

= +25°C

A

Over temp 1.3

T

= +25°C

A

Over temp 15

= +25°C

T

A

Over temp 2

Over temp 1.4

Over temp 0.65

0.584 0.605 0.626

0.596 0.605 0.614

50

190 240

- 0.04 -

- 0.18 -

1 1.2

0.025 0.125

3.6

3.7

1

0.1

25 μs

V

nA

mV

%/V

%/A

mA

μA

A

V

nA

AP7362

Document number: DS35058 Rev. 6 - 2

3 of 15

www.diodes.com

August 2013

A

P7362

Electrical Characteristics (cont.)

(@TA = +25°C, V

= 3.3V, V

IN

OUT

=1.8V, I

= 10mA, VEN = VIN, C

OUT

= 10μF, C

IN

OUT

= 10μF, V

= 2V, unless otherwise stated.)

EN

Minimum and maximum limits are guaranteed through test, design, or statistical correlation. Typical values represent the most likely parametric norm at T

= +25°C, and are provided for reference purposes only.

A

Symbol

PSRR Ripple Rejection



n(l/f)

en

T

SHDN

T

HYS

θJA

θJC

Note: 8. Device mounted on 2” x 2” FR-4 substrate PCB, 2oz copper with minimum recommended pad layout.

Output Noise Density

Output Noise Voltage

Thermal shutdown threshold

Thermal shutdown hysteresis

Thermal Resistance Junction-to-Ambient

Thermal Resistance Junction-to-Case

Parameter Test Conditions Min Typ Max Unit

= 3.0V, I

V

IN

VIN = 3.0V, I

f = 120Hz, C

= 1.5A, f = 120Hz

OUT

= 1.5A, f = 1kHz

OUT

= 10μF ceramic

OUT

BW = 100Hz – 100kHz, C

= 10μF ceramic

OUT

T

rising

J

T

falling from T

J

SHDN

U-DFN2030-8 (Note 8) 85.0

SO-8EP (Note 8) 52.8

U-DFN2030-8 (Note 8) 17.0

SO-8EP (Note 8) 10.0

65

61

1.0

dB

μV/Hz

90 μV(rms)

170

10

C

°C/W

AP7362

Document number: DS35058 Rev. 6 - 2

4 of 15

www.diodes.com

August 2013

A

k

Typical Performance Characteristics

(@TA = +25°C, V

10k

= 2.7V, V

IN

C = 10µF CER

OUT

EN

= VIN, C

= 10μF, C

IN

OUT

= 10μF, I

= 10mA, V

OUT

= 1.8V, unless otherwise stated.)

OUT

10

P7362

1k



100

NOISE (nV/ Hz)

10

100 1000 10k 100k

FREQUENCY (Hz)

Noise Density

3

2.5

2

1.5

GND

I (mA)

1

1k



100

NOISE (nV/ Hz)

10

100 1000 10k 100k

FREQUENCY (Hz)

Noise Density

1k

V = 0.65V

EN

100

GND

I (nA)

10

0.5

0

0.5 1 1.5

I (A)

LOAD

I vs. Load Current

GND

0

-50 -25 75 12502550 100

TEMPERATURE (°C)

I vs. Temperature

GND(OF F)

AP7362

Document number: DS35058 Rev. 6 - 2

5 of 15

www.diodes.com

August 2013

A

5

ROPOU

T VOLTAG

)

2

Typical Performance Characteristics (cont.)

(@TA = +25°C, V

0.61

= 2.7V, V

IN

EN

= VIN, C

= 10μF, C

IN

OUT

= 10μF, I

= 10mA, V

OUT

= 1.8V, unless otherwise stated.)

OUT

0.3

P7362

0.610

0.605

ADJ

V (V)

0.600

0.595

0.590

-50 -25 75 12502550 100

TEMPERATURE (°C) V vs. Temperature

ADJ

1.3

I = 0A

L

1.2

1.1

EN

V (V)

1

125°C

E (V)

0.2

25°C

-40°C

0.1

D

0

00.5

11.5

LOAD CURRENT (A)

1

OUT

V (V

Dropout Voltage vs. Load Current

25°C

125°C

0.9

0.8

-50 -25 75 12502550 100

TEMPERATURE (°C) V vs. Temperature

ADJ

0

0123

Turn-On Characteristics

-40°C

V (V)

IN

AP7362

Document number: DS35058 Rev. 6 - 2

6 of 15

www.diodes.com

August 2013

A

R

C

TIO

N RATIO

Typical Performance Characteristics (cont.)

(@TA = +25°C, V

= 2.7V, V

IN

= VIN, C

EN

Turn-On Time

V

OUT

I

= 0A, C

L

= 10μF, C

IN

OUT

= 1.2V (500mV/div)

= 10μF CER

OUT

V

= 3.0V (2V/div)

IN

= 10μF, I

= 10mA, V

OUT

= 1.8V, unless otherwise stated.)

OUT

Turn-On Time

V

OUT

= 1.5A, C

I

L

= 1.2V (500mV/div)

= 10μF CER

OUT

V

= 3.0V (2V/div)

IN

P7362

Time (10μs/div)

Load Transient Response

90

V

= V

= 3.3V

IN

C

OUT

EN

= 10μF CER

80

70

(dB)

60

V

=1.8V (50mV/div)

OUT

50

40

30

V = 3.3V

IN

V = 1.8V

OUT

20

I = 1A

OUT

C = 1µF CER

IN

10

C = 1µF CER

OUT

0

I

=100mA to 1.5A (1A/div)

LOAD

EJE

0.1 1 10 1000100 FREQUENCY (kHz)

PSRR

Time (40μs/div)

AP7362

Document number: DS35058 Rev. 6 - 2

7 of 15

www.diodes.com

August 2013

A

P7362

Application Information

Input Capacitor

A minimum 2.2μF ceramic capacitor is recommended between IN and GND pins to decouple input power supply glitch and noise. The amount of the capacitance may be increased without limit. Larger input capacitor like 10μF will provide better load transient response. This input capacitor

must be located as close as possible to the device to assure input stability and reduce noise. For PCB layout, a wide copper trace is required for

both IN and GND pins. A lower ESR capacitor type allows the use of less capacitance, while higher ESR type requires more capacitance.

Output Capacitor

The output capacitor is required to stabilize and help the transient response of the LDO. The AP7362 is stable with any type of capacitor, with no

limitations on minimum or maximum ESR. The device is designed to have excellent transient response for most applications with a small amount

of output capacitance. The device is also stable with multiple capacitors in parallel, which can be of any type of value. Additional capacitance

helps to reduce undershoot and overshoot during transient loads. This capacitor should be placed as close as possible to OUT and GND pins for

optimum performance.

Adjustable Operation

The AP7362 provides output voltage from 0.6V to 5.0V through external resistor divider as shown below.

V

IN

OUT

V

OUT

10µF

Enable

AP7362

EN

GND

R1

10µF

ADJ

R2

Adjustable Output

The output voltage is calculated by:

 

V

OUT

Where V

Rearranging the equation will give the following that is used for adjusting the output to a particular voltage:

To maintain the stability of the internal reference voltage, R

= 0.6V (the internal reference voltage)

REF

need to be kept smaller than 10k.

2

V

REF

 



V

OUT



R

2

1



V

REF





R

1





1



R

2



 

 1

 

No Load Stability

Other than external resistor divider, no minimum load is required to keep the device stable. The device will remain stable and regulated in no

load condition.

AP7362

Document number: DS35058 Rev. 6 - 2

8 of 15

www.diodes.com

August 2013

A

OOP G

O

P G

N

P7362

Application Information (cont.)

Stability and Phase Margin

Any regulator which operates using a feedback loop must be compensated in such a way as to ensure adequate phase margin, which is defined

as the difference between the phase shift and -180 degrees at the frequency where the loop gain crosses unity (0 dB). For most LDO regulators,

the ESR of the output capacitor is required to create a zero to add enough phase lead to ensure stable operation. The AP7362 has an internal

compensation circuit which maintains phase margin regardless of the ESR of the output capacitor, any type of capacitor can be used.

Below two charts show the gain/phase plot of the AP7362 with an output of 1.2V, 10μF ceramic output capacitor, delivering 1.5A load current

and no load. It can be seen the phase margin is about 90° (which is very stable).

Below two charts show the gain/phase plot of the AP7362 with an output of 1.2V, 10 μF ceramic output capacitor, delivering 1.5A load current and no load. It can be seen the phase margin is about 90° (which is very stable).

120

PHASE

100

80

60

GAIN

40

20

AIN (dB)

0

-20

L

-40

V = 2.7V

IN

-60

V = 1.2V

OUT

I = 1.5A

-80

L

C = 10µF CER

100

OUT

1k 10k 100k 1M

-100

-120

FREQUENCY(Hz)

Gain-Bandwidth Plot for 1.5A Load

120

100

PHASE

80

60

40

(dB)

AI

GAIN

20

0

-20

L

-40

V = 2.7V

IN

-60

V = 1.2V

OUT

I = 0A

-80

L

C = 10µF CER

-100

OUT

-120 100 1k 10k 100k 1M

FREQUENCY(Hz)

Gain-Bandwidth Plot for no Load

ON/OFF Input Operation

The AP7362 is turned on by setting the EN pin high, and is turned off by pulling it low. If this feature is not used, the EN pin should be tied to IN

pin to keep the regulator output on at all time. To ensure proper operation, the signal source used to drive the EN pin must be able to swing

above and below the specified turn-on/off voltage thresholds listed in the Electrical Characteristics section under V

140

120

100

80

60

40

20

0

-20

-40

-60

-80

140

120

100

80

60

40

20

0

-20

-40

-60

-80

PHASE MARGIN (°)

and VIH.

IL

AP7362

Document number: DS35058 Rev. 6 - 2

9 of 15

www.diodes.com

August 2013

A

P7362

Application Information (cont.)

Short Circuit Protection

When output current at OUT pin is higher than current limit threshold, the current limit protection will be triggered and clamp the output current to

prevent over-current and to protect the regulator from damage due to overheating.

Thermal Shutdown Protection

Thermal protection disables the output when the junction temperature rises to approximately +170°C, allowing the device to cool down. When

the junction temperature reduces to approximately +160°C the output circuitry is enabled again. Depending on power dissipation, thermal

resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This cycling limits

the heat dissipation of the regulator, protecting it from damage due to overheating.

Low Quiescent Current

The AP7362, consumes only around 0.5mA for all input voltage range and load currents, this provides great power saving in portable and low

power applications.

Output Noise

This is the integrated value of the output noise over a specified frequency range. Input voltage and output load current are kept constant during the measurement. Results are expressed in μVrms or μV √Hz. The AP7362 is a low noise regulator and needs no external noise reduction capacitor. Output voltage noise is typically 100μVrms overall noise

level between 100 Hz and 100 kHz

Noise is specified in two ways:

Output noise density is the RMS sum of all noise sources, measured at the regulator output, at a specific frequency (measured with a 1Hz

bandwidth). This type of noise is usually plotted on a curve as a function of frequency.

Output noise voltage is the RMS sum of spot noise over a specified bandwidth. Spot noise is measured in units μV/√Hz or nV/√Hz and total

output noise is measured in μV(RMS). The primary source of noise in low-dropout regulators is the internal reference.

Power Dissipation

The device power dissipation and proper sizing of the thermal plane that is connected to the thermal pad is critical to avoid thermal shutdown and

ensure reliable operation. Power dissipation of the device depends on input voltage and load conditions and can be calculated by:

= (V

- V

P

D

The maximum power dissipation, handled by the device, depends on the junction to ambient thermal resistance, and maximum ambient

temperature, which can be calculated by the equation in the following:

IN

P

MAX_D

) X I

OUT

)AT-C150(





R



JA

AP7362

Document number: DS35058 Rev. 6 - 2

10 of 15

www.diodes.com

August 2013

A

Ordering Information

Part Number Package Code Packaging

AP7362-XXHA-7 HA U-DFN2030-8 3000/Tape & Reel -7

AP7362A-XXHA-7 HA U-DFN2030-8 3000/Tape & Reel -7

AP7362-XXSP-13 SP SO-8EP 2500/Tape & Reel -13

AP7362A-XXSP-13 SP SO-8EP 2500/Tape & Reel -13

Quantity Part Number Suffix

AP7362

Document number: DS35058 Rev. 6 - 2

11 of 15

www.diodes.com

7”/13” Tape and Reel

P7362

August 2013

A

Marking Information

(1) U-DFN2030-8

P7362

(2) SO-8EP

Part Number

X: V

ADJ

Blank= +/-3.5% A= +/-1.5%

AP7362X for ADJ AP7362X AP7362X AP7362X AP7362X AP7362X AP7362X

AP7362

Document number: DS35058 Rev. 6 - 2

Device Package Identification Code

AP7362 (ADJ) U-DFN2030-8 RA

AP7362-10 U-DFN2030-8 RB

AP7362-12 U-DFN2030-8 RC

AP7362-15 U-DFN2030-8 RD

AP7362-18 U-DFN2030-8 RE

AP7362-25 U-DFN2030-8 RF

AP7362-33 U-DFN2030-8 RG

AP7362A (ADJ) U-DFN2030-8 QA

AP7362A-10 U-DFN2030-8 QB

AP7362A-12 U-DFN2030-8 QC

AP7362A-15 U-DFN2030-8 QD

AP7362A-18 U-DFN2030-8 QE

AP7362A-25 U-DFN2030-8 QF

AP7362A-33 U-DFN2030-8 QG

( Top View )

5

: Year : 08, 09,10~

YY WW : Week : 01~52; 52

represents 52 and 53 week

X : Internal code

X

Logo

Tolerance:

8

AP7362X-VV YY WW X X E

SO-8-EP

41

-10 for 1.0V

-12 for 1.2V

-15 for 1.5V

-18 for 1.8V

-25 for 2.5V

-33 for 3.3V

12 of 15

www.diodes.com

August 2013

A

Package Outline Dimensions (All dimensions in mm.)

Please see AP02002 at http://www.diodes.com/datasheets/ap02002.pdf for latest version.

(1) U-DFN2030-8

(2) SO-8EP

85

E

︵

Z

A

Pin #1 ID

A

1

A

3

Seating Plane

D

e

︶

C'0.25*45

°

D

2

E

2

L

b

Exposed Pad

14

E1

H

F

9° (All si des)

b

e

A1

D

4° ± 3°

A

7

°

Bottom View

N

E

45

°

E0

Q

C

L

Gauge Plane Seating Plane

AP7362

Document number: DS35058 Rev. 6 - 2

13 of 15

www.diodes.com

U-DFN2030-8

Dim Min Max Typ

A 0.57 0.63 0.60 A1 0 0.05 0.02 A3 - - 0.15

b 0.20 0.30 0.25

D 1.95 2.05 2.00 D2 1.40 1.60 1.50

e - - 0.50

E 2.95 3.05 3.00 E2 1.50 1.70 1.60

L 0.35 0.45 0.40

Z - - 0.125

All Dimensions in mm

SO-8EP (SOP-8L-EP)

Dim Min Max Typ

A 1.40 1.50 1.45

A1 0.00 0.13 -

b 0.30 0.50 0.40 C 0.15 0.25 0.20 D 4.85 4.95 4.90 E 3.80 3.90 3.85

E0 3.85 3.95 3.90 E1 5.90 6.10 6.00

e - - 1.27

F 2.75 3.35 3.05 H 2.11 2.71 2.41

L 0.62 0.82 0.72 N - - 0.35 Q 0.60 0.70 0.65

All Dimensions in mm

P7362

August 2013

A

Suggested Pad Layout

Please see AP02001 at http://www.diodes.com/datasheets/ap02001.pdf for the latest version.

(1) U-DFN2030-8

X

2

C

Y

Dimensions Value (in mm)

Y

2

X

1

Y

1

G 0.250

X 0.350 X1 1.500 X2 1.850

Y 0.600 Y1 1.600 Y2 3.300

1

X

G

(2) SO-8EP

X2

Y2

AP7362

Document number: DS35058 Rev. 6 - 2

Y1

X1

Y

C

X

14 of 15

www.diodes.com

Dimensions

C 0.500

Value

(in mm)

C 1.270

X 0.802 X1 3.502 X2 4.612

Y 1.505 Y1 2.613 Y2 6.500

P7362

August 2013

A

P7362

DIODES INCORPORATED MAKES NO WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, WITH REGARDS TO THIS DOCUMENT, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS OF ANY JURISDICTION).

Diodes Incorporated and its subsidiaries reserve the right to make modifications, enhancements, improvements, corrections or other changes without further notice to this document and any product described herein. Diodes Incorporated does not assume any liability arising out of the application or use of this document or any product described herein; neither does Diodes Incorporated convey any license under its patent or trademark rights, nor the rights of others. Any Customer or user of this document or products described herein in such applications shall assume all risks of such use and will agree to hold Diodes Incorporated and all the companies whose products are represented on Diodes Incorporated website, harmless against all damages.

Diodes Incorporated does not warrant or accept any liability whatsoever in respect of any products purchased through unauthorized sales channel. Should Customers purchase or use Diodes Incorporated products for any unintended or unauthorized application, Customers shall indemnify and hold Diodes Incorporated and its representatives harmless against all claims, damages, expenses, and attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized application.

Products described herein may be covered by one or more United States, international or foreign patents pending. Product names and markings noted herein may also be covered by one or more United States, international or foreign trademarks.

This document is written in English but may be translated into multiple languages for reference. Only the English version of this document is the final and determinative format released by Diodes Incorporated.

Diodes Incorporated products are specifically not authorized for use as critical components in life support devices or systems without the express written approval of the Chief Executive Officer of Diodes Incorporated. As used herein:

A. Life support devices or systems are devices or systems which:

1. are intended to implant into the body, or

2. support or sustain life and whose failure to perform when properly used in accordance with instructions for use provided in the

labeling can be reasonably expected to result in significant injury to the user.

B. A critical component is any component in a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or to affect its safety or effectiveness.

Customers represent that they have all necessary expertise in the safety and regulatory ramifications of their life support devices or systems, and acknowledge and agree that they are solely responsible for all legal, regulatory and safety-related requirements concerning their products and any use of Diodes Incorporated products in such safety-critical, life support devices or systems, notwithstanding any devices- or systems-related information or support that may be provided by Diodes Incorporated. Further, Customers must fully indemnify Diodes Incorporated and its representatives against any damages arising out of the use of Diodes Incorporated products in such safety-critical, life support devices or systems.

www.diodes.com

IMPORTANT NOTICE

LIFE SUPPORT

AP7362

Document number: DS35058 Rev. 6 - 2

15 of 15

www.diodes.com

August 2013