The AP7332 is 300mA, dual fixed output voltage, lo w dropout
linear regulator. The AP7332 includes the pass element,
error amplifier, band-gap, current limit and thermal shutdown
circuitry which protect the IC from damage in fault conditions.
The AP7332 has two enable pins (EN1 and EN2) to
independently turn the respective channel on when a logic
high level is applied.
The characteristics of low dropout voltage and low quiescent
current make it suitable for low power applications. The
typical quiescent current is approximately 60μA.
This device is available with fixed output options of
1.8V/3.3V, 2.5V/3.0V, 2.8V/3.3V and 3.3V/3.3V.
For other output options please contact our local sales
representative directly or through our distributor located in
NEW PRODUCT
your area.
The AP7332 is available in SOT26 and DFN2018-6
packages.
Pin Assignments
(Top View)
EN2
1
2
3
OUT2
GND
(Top View)
1
IN
2
EN1
EN2
3
SOT26
6
OUT1
5
IN
4
EN1
6
OUT1
OUT2
5
4
GND
Features
• 300mA Low Dropout Regulator with EN
• Very low IQ: 60µA
• Wide input voltage range: 2V to 6V
• Fixed output options: 1.0V to 3.3V
• High PSRR: 65dB at 1kHz
• Fast start-up time: 60µs
• Stable with low ESR, 1µF ceramic output capacitor
• Excellent Load/Line Transient Response
• Low dropout: 300mV at 300mA
• Current limit protection
• Short circuit protection
• Thermal shutdown protection
• Ambient temperature range: -40ºC to 85°C
• SOT26 and DFN2018-6: Available in “Green” Molding
Compound (No Br, Sb)
• Lead Free Finish/RoHS Compliant (Note 1)
Note: 1. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied. Please visit our website at
http://www.diodes.com/products/lead_free.html.
Symbol Parameter Test Conditions Min Typ. Max Unit
V
REF
I
ADJ
V
OUT
ΔV
/ΔVIN/V
OUT
ΔV
OUT
V
Dropout
I
Q
I
SHDN
I
LEAK
tST
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PSRR
I
SHORT
I
LIMIT
V
V
I
EN
T
SHDN
T
HYS
θ
JA
Notes: 4. Dropout voltage is the voltage difference between the input and the output at which the output voltage drops 2% below its nominal value.
5. This specification is guaranteed by design.
6. Test condition for SOT26: Device mounted on FR-4 substrate PC board, with minimum recommended pad layout
7. Test condition for DFN2018-6: Device mounted on FR-4 2-layer board,2oz copper, with minimum recommended pad on top layer and 3 vias to bottom layer.
/V
IL
IH
= V
IN
+1V, C
OUT
ADJ Reference Voltage
(Adjustable version)
= 1uF, C
IN
OUT
= 1uF, V
ADJ Leakage (Adjustable version) 0.1 1 μA
Output Voltage Accuracy
Line Regulation
Load Regulation
OUT
Dropout Voltage (Note 4)
Input Quiescent Current (2 channels) V
Input Shutdown Current VEN = 0V, I
Input Leakage Current VEN = 0V, OUT grounded 0.1 1
Start-up Time
PSRR (Note 5)
Short-circuit Current
Current limit
EN Input Logic Low Voltage VIN = V
EN Input Logic High Voltage VIN = V
EN Input Current VIN = 0V or V
Thermal shutdown threshold 165
Thermal shutdown hysteresis 30
A 1μF ceramic capacitor is recommended between IN and GND pins to decouple input power supply glitch and noise. T he
amount of the capacitance may be increased without limit. This input capacitor must be located as close as possible to the
device to assure input stability and reduce noise. For PCB layout, a wide copper trace is required for both IN and GND pins.
A lower ESR capacitor type allows the use of less capacitance, while higher ESR type requires more capacitance.
Output Capacitor
The output capacitor is required to stabilize and improve the transient res ponse of the LDO. The AP7332 is stable with ver y
small ceramic output capacitors. Using a ceramic capacitor value that is at least 1μF with ESR≧10mΩ on the output ensures
stability. Higher capacitance values help to improve line and load transient response. The output capacitance may be
increased to keep low undershoot and overshoot. Output capac itor must be placed as close as possible to OUT and GND
pins.
DUAL 300mA LOW QUIESCENT CURRENT FAST
TRANSIENT LOW DROPOUT LINEAR REGULATOR
Region of Stabl e C
ESR vs. Load Current
OUT
100
Unstable Range
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10
1
Stable Range
ESR (Ω)
CIN=C
OUT1
OUT
C
= C
0.1
OUT2
=1μF
0.01
Unstable Range
0.001
02050100150200250300
Load Current (mA)
No Load Stability
Other than external resistor divider, no minimum load is required to keep the device stable. The device will remain stable and
regulated in no load condition.
ON/OFF Input Operation
The AP7332 is turned on by setting the EN pin high, and is turned off by pulling it low. If this feature is not used, the EN pin
should be tied to IN pin to keep the regulator output on at all time. To ensure proper operation, the signal source used to drive
the EN pin must be able to swing above and below the specified turn-on/off voltage thresholds listed in the Electrical
Characteristics section under V
When output current at OUT pin is higher than current limit threshold, the current lim it protection will be triggered and clamp
the output current to approximately 600mA to prevent over-current and to protect the regulator from damage due to
overheating.
Short Circuit Protection
When OUT pin is short-circuit to GND, short circuit protection will be triggered and clamp the output current to approximately
120mA. This feature protects the regulator from over-current and damage due to overheating.
Thermal Shutdown Protection
Thermal protection disables the output when the junction temperature rises to appr oximately +165°C, allowing the device to
cool down. When the junction temperature reduces to appr oximate ly +135 °C the output c ircuitr y is ena bled aga in. Depe nding
on power dissipation, thermal resistance, and ambient temperature, the thermal protection circuit may cycle on and off. This
cycling limits the heat dissipation of the regulator, protecting it from damage due to overheating.
Ultra Fast Start-up
After enabled, the AP7332 is able to provide full power in as little as tens of microseco nds, typically 150µs, without sacrific ing
low ground current. This feature will help load circuitry move in and out of standby mode in real time, eventually extend
battery life for mobile phones and other portable devices.
NEW PRODUCT
Fast Transient Response
Fast transient response LDO can extend battery life. TDMA-based cell phone protocols such as Global System for Mobile
Communications (GSM) have a transmit/receive duty factor of only 12.5 percent, enabling power savings by putting much of
the baseband circuitry into standby mode in between transmit cycles. In baseband circuit s, the load often transitions virtually
instantaneously from 100µA to 100mA. To meet this load requirement, the LDO must react very quickly without a large
voltage drop or overshoot — a requirement that cannot be met with conventional, general-purpose LDO.
The AP7332’s fast transient response from 0 to 300mA provides stable voltag e supply for fast DSP and GSM chipset with
fast changing load.
Low Quiescent Current
The AP7332, consuming only around 60µA for all input range, provides great power saving in portable and low power
applications.
Power Dissipation
The device power dissipation and proper sizing of the thermal plane that is connected to the thermal pad is critical to avoid
thermal shutdown and ensure reliable operation. Power dissipation of the device depends on input voltage and load
conditions and can be calculated by:
The maximum power dissipation, handled by the device, depends on the maximum junction to ambient thermal resistance,
maximum ambient temperature, and maximum device junction temperature, which can be calculated by the equation in the
following:
Note: 8. Pad layout as shown on Diodes Inc. suggested pad layout document AP02001, which can be found on our website at
http://www.diodes.com/datasheets/ap02001.pdf.
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