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UMAC-CPCI Turbo CPU Board Hardware Reference Manual
Option 9: Serial Port Configuration .........................................................................................................................4
DPRAM IC Select Jumper ........................................................................................................................................6
Flash IC Firmware Bank Select Jumpers ..................................................................................................................6
Flash IC Power Supply Select Jumper ......................................................................................................................6
Rear Field Wiring Connector ....................................................................................................................................7
E0: Reset-Lock Enable (Factory Use Only)...........................................................................................................11
E1A: Servo and Phase Clock Direction Control.....................................................................................................11
E1B: Servo/Phase Clock Source Control ...............................................................................................................11
E2: (Reserved for Future Use)................................................................................................................................11
E3: Re-Initialization on Reset Control ...................................................................................................................12
E4: (Reserved for Future Use).................................................................................................................................12
E5: USB/Ethernet Communication Jumper............................................................................................................12
E11: Power Supply Check Control.........................................................................................................................12
E17 – E18: Serial Port Select .................................................................................................................................12
E18A, B, C, D: Ethernet Communication Control.................................................................................................13
Compact UMAC Turbo CPU Board J2 Connector .................................................................................................18
J4: RS-232 Serial Port Connector...........................................................................................................................19
Acc-8CR Test Breakout Board................................................................................................................................21
Acc-24C2A Analog Axis Board..............................................................................................................................22
Acc-51C Analog Encoder Interpolator Board.........................................................................................................22
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
INTRODUCTION
Delta Tau’s Compact UMAC systems provide a compact and clean integration of motion and I/O control
for sophisticated automation equipment. The Compact UMAC CPU was previously called the UMACCPCI in previous revisions of this manual. The system consists of a modular set of 3U-size (100mm x
160mm) boards in the Compact PCI format, implementing Turbo PMAC software and hardware
functions, communicating with each other over a common backplane (the “Compact UBUS”). All field
wiring is available on rear connectors, suitable for a user-designed distribution system to the machine.
Compact UMAC (Universal Motion and Automation Controller) -CPCI systems provide integrated
connectivity as well as ease of assembly, diagnostics, and repair. Compact UMAC systems differ from
standard UMAC systems in that all field wiring comes to the back of the rack, behind the backplane,
instead of direct top and bottom access.
The Compact UMAC Turbo CPU board (Part number 3A0-603625-10x) implements a Turbo PMAC2
CPU in the 3U CPCI form factor. Its software operation is completely identical to other Turbo PMAC2
controllers.
The 603625 Compact UMAC Turbo CPU has two hardware versions that will be covered in this manual.
The difference between the two is the Flex CPU design upgrade on all new revisions released after the
spring of 2005. The Flex CPU allows the board to use an 80 MHz CPU, 160 MHz CPU, or 240 MHz
CPU. The old design allowed a maximum CPU speed of 100 MHz. The revision number is designated
by the last three numbers of the part number. For example, the part number for the current revision
release is the 603625-104 and we would call the board a revision 104 release. The legacy model CPU was
the 603625-102 and it would be designated as a revision 102.
Note that a Compact PCI interface does not come with a Compact UMAC system automatically, nor is
one necessary to communicate to the system, given the other possible communications ports: RS-232,
RS-422, USB, and Ethernet.
This picture shows the Compact UMAC Turbo CPU
board. The connectors on the right side plug into the
Compact UBUS backplane board, with the bottom
right connector being the bus connector, and the top
right connector containing the external field wiring
signals, which typically pass through the backplane
board. The connector at lower left is an RS-232 port
intended for setup and diagnostics; the stack
connectors top and bottom provide the link to a CPCI
bridge board.
Introduction 1
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
This picture shows a sample configuration of a
Compact UMAC system, not installed in its rack. It
consists of the following components:
1. Rack power supply (not a Delta Tau product)
2. Compact UMAC CPU board
3. Acc-11C Sinking I/O board
4. Acc-24C2A analog axis interface board
5. Acc-C8 8-slot Compact UBUS backplane.
Note the pass-through connector on the back
for field-wiring distribution. In this picture,
alternate slots in the backplane have been left
open to make each board more visible. This
does not have to be done in actual use.
2 Introduction
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
Associated Manuals
This document is the Hardware Reference Manual for the Compact UMAC Turbo CPU board for an
Compact UMAC system. It describes the hardware features and provides setup instructions.
Other manuals are needed as well to use the Compact UMAC system. Each accessory to the Compact
UMAC Turbo CPU board has its own manual, describing its operation and any required software setup of
the Turbo CPU.
The Software Reference Manual for the Turbo PMAC family and the User Guide for the PMAC or Turbo
PMAC families are also needed.
Introduction 1
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
BOARD CONFIGURATION
The base version of the Compact UMAC Turbo CPU board provides a 1-slot 3U-format Eurocard board
with:
80 MHz DSP56303 CPU (120 MHz PMAC equivalent) •
•
128k x 24 SRAM compiled/assembled program memory (Opt. 5C0)
•
128k x 24 SRAM user data memory (Opt. 5C0)
•
1M x 8 flash memory for user backup & firmware (Opt. 5C0)
•
Latest released firmware version
•
RS-232/422 serial interface, available both on front-panel DB-9 connector and on backside fieldwiring connector
•
Backplane Compact UBUS expansion connector for communication to servo and I/O accessory
boards
•
Backside field-wiring connector
Option 1: Communications Interfaces
The Compact UMAC Turbo CPU board comes standard only with an RS-232/422 serial interface. The
Option 1 family provides faster interfaces for high-speed communications – Universal Serial Bus (USB),
Ethernet, or the link to the CPCI bus through a bridge daughter board.
Current Revision Communication Options (rev 103 and above)
Option 1B: Solder-side stack connectors to CPCI-bridge daughter board. This option should be ordered
only when the bridge board is to be installed on the left side of the CPU board, so the CPU board is in the
leftmost slot of the Compact UBUS backplane, and the bridge board is in the rightmost slot of the
Compact PCI bus backplane.
Legacy Revision Communication Options (rev 102 and below)
•
Option 1: On-board 10-Base-T TCP/IP Ethernet interface. The key added components are U67 and U32.
•
Option 1A: On-board 12 Mbit/sec USB interface. The key added component is U67.
•
Option 1B: Solder-side stack connectors to CPCI-bridge daughter board. This option should be
ordered only when the bridge board is to be installed on the left side of the CPU board, so the CPU
board is in the leftmost slot of the Compact UBUS backplane, and the bridge board is in the rightmost
slot of the Compact PCI bus backplane.
Option 2: Dual-Ported RAM
With either the Option 1 Ethernet interface, or the Option 1A USB interface, communications throughput
can be increased through the use of dual-ported RAM, which provides a bank of memory that can be
directly accessed by both the Compact UMAC Turbo CPU and the communications microcontroller.
Option 2: 32k x 16 bank of on-board dual-ported RAM (requires Option 1 or 1A) in component U56. •
Option 5: CPU and Memory Configurations
The various versions of Option 5 provide different CPU speeds and main memory sizes on the piggyback
CPU board. Only one Option 5xx may be selected for the board.
2 Board Configuration
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
The CPU is a DSP563xx IC as component U1. It is currently available only as an 80 MHz, 160 MHz or
240 MHz device.
The compiled/assembled-program (P) memory SRAM ICs are located in U14, U15, and U16. These ICs
form the active memory for the firmware, compiled PLCs, and user-written phase/servo algorithms.
These can be 128k x 8 ICs (for a 128k x 24 bank), fitting in the smaller footprint, or they can be the larger
512k x 8 ICs (for a 512k x 24 bank), fitting in the full footprint.
The user-data memory (X/Y) SRAM ICs are located in U11, U12, and U13. These ICs form the active
memory for user motion programs, uncompiled PLC programs, and user tables and buffers. These can be
128k x 8 ICs (for a 128k x 24 bank), fitting in the smaller footprint, or they can be the larger 512k x 8 ICs
(for a 512k x 24 bank), fitting in the full footprint.
The flash memory IC is located in U10. This IC forms the non-volatile memory for the board’s firmware,
the user setup variables, and for user programs, tables, and buffers. It can be 1M x 8, 2M x 8, or 4M x 8
in capacity
Current Revision Memory Options (Rev 103 and above)
The various versions of Option 5 provide different CPU speeds and main memory sizes. Only one Option
5xx may be selected for the board.
Option 5C0 is the standard CPU and memory configuration. It is provided automatically if no Option
•
5xx is specified. It provides an 80 MHz DSP56303 CPU w/8Kx24 internal memory, 128Kx24
SRAM compiled/ assembled program memory, 128Kx24 SRAM user data memory, 1Mx8 flash
memory.
•
Option 5C3 provides an 80 MHz DSP56303 CPU w/8Kx24 internal memory, expanded 512Kx24
SRAM compiled/assembled program memory, expanded 512Kx24 SRAM user data memory, 4Mx8
flash memory.
•
Option 5E0 provides a 160 MHz DSP56311 CPU w/128Kx24 internal memory, 128Kx24 SRAM
compiled/ assembled program memory, 128Kx24 SRAM user data memory, and 1Mx8 flash
memory. Requires V1.939 or newer firmware.
•
Option 5E3 provides a 160 MHz DSP56311 CPU w/128Kx24 internal memory, expanded 512Kx24
SRAM compiled/assembled program memory, expanded 512Kx24 SRAM user data memory, and
4Mx8 flash memory. Requires V1.939 or newer firmware.
•
Option 5F0 provides a 240 MHz DSP56321 CPU w/192Kx24 internal memory, 128Kx24 SRAM
compiled/ assembled program memory, 128Kx24 SRAM user data memory, and 1Mx8 flash
memory. Requires V1.940 or newer firmware.
•
Option 5F3 provides a 240MHz DSP56321 CPU w/192Kx24 internal memory, expanded 512Kx24
SRAM compiled/assembled program memory, expanded 512Kx24 SRAM user data memory, and
4Mx8 flash memory. Requires V1.940 or newer firmware.
Board Configuration 3
UMAC-CPCI Turbo CPU Board Hardware Reference Manual
Legacy Revision Memory Options (Rev 102 and below)
Option 5C0 is the standard CPU and memory configuration. It is provided automatically if no Option
•
5xx is specified. It provides an 80 MHz DSP56303 CPU (120 MHz PMAC equivalent) with 8k x 24
of internal memory, an external 128k x 24 of compiled/assembled program memory, an external 128k
x 24 of user data memory; and a 1M x 8 flash memory. Setup variable I52 should be set and saved at
7 for 80 MHz operation.
•
Option 5C3 provides an 80 MHz DSP56303 CPU (120 MHz PMAC equivalent) with 8k x 24 of
internal memory, an expanded external 512k x 24 of compiled/assembled program memory, an
expanded external 512k x 24 of user data memory, and a 4M x 8 flash memory. Setup variable I52
should be set and saved at 7 for 80 MHz operation.
•
Option 5D0 provides a 100 MHz DSP56309 CPU (150 MHz PMAC equivalent) with 34k x 24 of
internal memory, an external 128k x24 of compiled/assembled program memory, an external 128k x
24 of user data memory; and a 1M x 8 flash memory. Setup variable I52 should be set and saved at 9
for 100 MHz operation.
•
Option 5D3 provides a 100 MHz DSP56309 CPU (150 MHz PMAC equivalent) with 34k x 24 of
internal memory, an expanded external 512k x 24 of compiled/assembled program memory, an
expanded external 512k x 24 of user data memory, and a 4M x 8 flash memory. Setup variable I52
should be set and saved at 9 for 100 MHz operation.
Option 8: High-Accuracy Clock Crystal
The Compact UMAC Turbo CPU board has a clock crystal (component Y1) of nominal frequency
19.6608 MHz (~20 MHz). The standard crystal’s accuracy specification is +/-100 ppm.
Option 8A provides a nominal 19.6608 MHz crystal with a +/-15 ppm accuracy specification. •
Option 9: Serial Port Configuration
The Compact UMAC Turbo CPU board comes standard with a single RS-232/422 serial port; a second
serial port can be added.
Option 9T adds an auxiliary RS-232 port on the CPU board. The key components added are ICs U28
•
and U43.
Option 10: Firmware Revision Specification
Normally the Compact UMAC Turbo CPU board is provided with the newest released firmware revision.
Some users may wish to freeze the designs on an older revision. A label on the U10 flash memory IC
shows the firmware revision loaded at the factory. The VERSION command can be used to report what
firmware revision is currently installed.
Option 10 provides for a user-specified firmware version. •
Option 16: Battery-Backed Parameter Memory
The contents of the standard memory are not retained through a power-down or reset unless they have
been saved to flash memory first. Option 16 provides supplemental battery-backed RAM for real-time
parameter storage that is ideal for holding machine state parameters in case of an unexpected powerdown.
Option 16A provides a 32k x 24 bank of battery-backed parameter RAM in components U17, U18,
•
and U19 and a can-stack lithium battery in component BT1. While the average expected battery life
is over five years, a yearly replacement schedule is recommended. Replacement batteries can be
ordered from Delta Tau as Acc-1LS (Part # 100-0QTC85-000).
4 Board Configuration
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