unauthorized without written permission of Delta Tau Data Systems, Inc. Information contained
in this manual may be updated from time-to-time due to product improvements, etc., and may not
conform in every respect to former issues.
To report errors or inconsistencies, call or email:
All Delta Tau Data Systems, Inc. motion controller products, accessories, and amplifiers contain
static sensitive components that can be damaged by incorrect handling. When installing or
handling Delta Tau Data Systems, Inc. products, avoid contact with highly insulated materials.
Only qualified personnel should be allowed to handle this equipment.
In the case of industrial applications, we expect our products to be protected from hazardous or
conductive materials and/or environments that could cause harm to the controller by damaging
components or causing electrical shorts. When our products are used in an industrial
environment, install them into an industrial electrical cabinet or industrial PC to protect them
from excessive or corrosive moisture, abnormal ambient temperatures, and conductive materials.
If Delta Tau Data Systems, Inc. products are exposed to hazardous or conductive materials and/or
environments, we cannot guarantee their operation.
Features .....................................................................................................................................................................1
Related Technical Documentation.............................................................................................................................5
CONNECTORS AND JUMPERS..........................................................................................................................7
PMAC2-PC AND PMAC2-Lite Connector Summary..............................................................................................7
J1 (JANA) Analog Input Port Connector....................................................................................................8
J2 (JTHW) Multiplexer Port Connector......................................................................................................9
J3 (JI/O) General I/O Connector..............................................................................................................10
The PMAC2-PC and PMAC2-Lite provide state-of-the-art motion control for a wide variety of
applications, including machine tools, robotics, semiconductor manufacturing, packaging equipment, and
general-purpose automation. They utilize the latest developments in electronics, software, and modern
control theory to bring motion control capabilities to a whole new level.
The PMAC2-PC and PMAC2-Lite are designed as ISAbus expansion cards, but are capable of standalone
operation. The configurations are:
PMAC2-PC and PMAC2-Lite support a wide variety of servo and stepper interfaces:
• Analog +/-10V velocity command (requires ACC-8E or equivalent)
• Analog +/-10V torque command (requires ACC-8E or equivalent)
• Sinusoidal analog +/-10V phase current commands (requires ACC-8E or equivalent)
• Direct digital pulse-width modulated (PWM) phase voltage commands (requires ACC-8F, -8K or
equivalent)
• Pulse-and-direction commands (requires ACC-8S or equivalent)
• MACRO
TM
ring network commands (requires ACC-42)
PMAC2-PC and PMAC2-Lite also provide unparalleled speeds and resolutions:
• 40 MHz encoder count rate
• 18-bit analog outputs
• 18 microsecond per axis servo update time (60 MHz)
• 120 MHz PWM clock frequency (10-bit resolution at 120 kHz, 12-bit and 30 kHz, 14-bit at 7.5 kHz)
• 120 MHz MLDT (e.g. Temposonics
TM
) timer frequency (0.024mm, 0.9mil resolution)
• 10 MHz maximum pulse-and-direction output frequency
• 10 MHz maximum position-compare output update rate
• 125 Mbit/sec optical ring network data rate
PMAC2 ASICs
Delta Tau has designed its own custom application-specific integrated circuits (ASICs) for the PMAC2PC and PMAC2-Lite using the latest sub-micron gate-array technology. Each ASIC contains 45,000
active logic gates. These ASICs contain all of the digital interface circuitry to tie the DSP to the machine;
the rest of the circuitry on the board is buffer circuitry.
DSPGATE1 Servo ASIC
The “DSPGATE1” ASIC contains the digital servo interface circuitry for 4 channels, usually sufficient
for four axes of control. Each channel contains:
Three command output sets:
1. Top-and-bottom PWM or serial DAC data with clock
2. Top-and-bottom PWM or serial DAC data with strobe
3. Top-and-bottom PWM or PFM pulse-and-direction
• Encoder quadrature or pulse-and-direction decode and count
• Index channel input internally gated to 1 quadrature state wide
• 4 flags with capability to perform hardware latching of encoder position
• HOME, PLIM, MLIM, USER
• Double-sided position-compare output with auto-increment capability
• Amplifier enable output
• Amplifier fault input
• 4 supplementary flag inputs (T, U, V, W)
• 2 inputs from serial analog-to-digital converters (ADCs)
• ADC clock and strobe signal outputs
The DSPGATE1 ASIC also generates several clock frequencies necessary for hardware and software
operation, under the user’s software control:
• PWM output frequency
• DAC clock frequency
Phase interrupt clock frequency and Servo interrupt clock frequency are generated from the first
DSPGATE1 only.
• ADC clock frequency
• Encoder sample clock frequency
• Pulse-frequency modulation (PFM) clock frequency
• Phase interrupt clock frequency
• Servo interrupt clock frequency
DSPGATE2 I/O ASIC
There is also a “DSPGATE2” ASIC on PMAC2-PC and PMAC2-Lite, which is used for interface to other
I/O. The DSPGATE2 ASIC has 3 parts:
• General-purpose digital I/O: 56 I/O points for JIO, JTHW, and JDISP ports
• Servo interface circuitry for 2 supplemental channels with clock generation
• MACRO ring interface circuitry
The general-purpose I/O and the servo interface circuitry on the DSPGATE2 generally share pins, except
for two 2-channel encoder inputs and 2 PWM/PFM output sub-channels. The shared pins are almost
always used for general-purpose I/O instead of extra servo interface circuitry, but this is up to the
individual user.
PMAC2-PC Configuration
A PMAC2-PC can have 1 or 2 DSPGATE1 ASICs; the first one is standard, and the second one comes if
Option 1 is ordered. Each also has a DSPGATE2 ASIC supporting the non-servo I/O.
PMAC2-Lite Configuration
A PMAC2-Lite board (PC bus only) has a single DSPGATE1 ASIC on-board, supporting up to 4 axes of
servo interfaces. It also has a DSPGATE2 ASIC supporting the non-servo I/O. It cannot be expanded
on-board to add a second DSPGATE1 ASIC to support a full 8 axes.
PMAC2-PC Board Configuration
Jumpers on the PMAC2-PC determine the frequency at which the DSP on the PV CPU board will
operate. The 56002 DSP has a “phased-locked loop” (PLL) that allows it to multiply the crystal
frequency by a programmable integer value, permitting very high CPU frequencies with a moderate
crystal frequency. The crystal frequency on the PV CPU board is always 19.6608 MHz, commonly called
“20 MHz”.
The component rating of the DSP IC specifies the highest frequency at which it safely can run, but it is
the multiplication factor typically set by jumpers that specifies the frequency at which it actually runs.
Usually this is a frequency at or near the maximum for the component.
It is safe to run a DSP at a frequency below the maximum. It may be possible to run a DSP at a frequency
higher than its maximum frequency, particularly at low ambient temperatures, but safe operation cannot be guaranteed. Unpredictable and possibly dangerous operation may result.
On power-up/reset, the DSP, operating at the crystal frequency of 20 MHz, reads the frequency jumpers
(E2 and E4) and writes into its own PLL multiplier register at X:$FFFD. Bits 0-3 of this word contain a
value one less than the multiplier value (if the frequency is being multiplied by 3, these bits contain a
value of 2).
If you wish to check the value of your multiplier, you can use the on-line command RHX:$FFFD and
look at the last hexadecimal digit. The actual multiplier is one greater than the value in this last digit.
Alternately, you can define an M-variable such as M99->X:$FFFD,0,4 and then read from or write to
these bits with the M-variable.
PMAC2-PC Setup
On PMAC2-PC, jumpers E2 and E4 control the frequency of operation of the DSP according to Table 1-
2.
E2 E4 X:$FFFD; 0-3 True Multiplier DSP Frequency
OFF OFF 1 x2 40 MHz
ON OFF 2 x3 60 MHz
OFF ON 3 x4 80 MHz
On the PMAC2-PC, I54 is read at power-up to set the baud rate clock. Because this clock is derived from
the CPU clock frequency, the proper setting of I54 is dependent on the CPU clock frequency as set by E2
and E4. Table 1-3 shows the settings of I54 for 40, 60, and 80 MHz CPU operation.
The PMAC2-PC CPU communicates with the axes through specially designed custom gate array ICs,
referred to as "DSPGATES". Each of these ICs can handle four analog output channels, four encoders as
input, and four analog-derived inputs from accessory boards. One PMAC2-PC can utilize from one to
four of these gate array ICs, so specifying the hardware configuration amounts to counting the numbers
and types of inputs and outputs. Up to 16 PMAC2-PCs may be ganged together with complete
synchronization, for a total of 128 axes. A PMAC2-PC may have one of three available CPU
configurations. These configurations are described in the following paragraphs.
Note:
The CPUs are only installed on the PMAC2-PC.
P/N 602398
This is the original standard CPU board for the PMAC2-PC. It has a 20MHz clock and a battery backup
RAM.
P/N 602405
This is a flash memory CPU board with no battery backup. This board provides either a 40MHz or
60MHz clock.
P/N 602705
The PMAC2-PC PV CPU piggyback board provides 80 MHz CPU operation and supplemental batterybacked RAM for the PMAC2-
The PV CPU board gets its name from the PV package style of the Motorola 56002 DSP IC on the board.
The board is also called the Universal CPU because it can support all speeds and configurations of the
CPU section.
The PV CPU has operational differences from earlier CPU configurations to support the new features.
The following paragraphs explain these differences and are only relevant if you have the 602705 CPU
piggyback board on your controller.
Configurations
The PV CPU board is configured at the factory to the customer’s specifications. The JEXP expansion port
is buffered, providing the capability to connect many boards on the expansion port.
The following table shows the configuration of the key components on the PV CPU board for the
PMAC2-PC.
Version Main Memory
Backup
Standard Flash Empty 32-pin RAM Flash ROM Empty
Opt 5B Flash Empty 32-pin RAM Flash ROM Empty
Opt 5C Flash Empty 32-pin RAM Flash ROM Empty
+Opt 16 Flash 28-pin RAM 32-pin RAM Flash ROM Battery
U6, U9, U15
Components
U7, U10, U16
Components
U5
Components
BT1
Component
Firmware
The PV CPU board does not support firmware versions before V1.16 of August 1996 without changes in
programming of the on-board logic (GALs). If the firmware must be changed between a version previous
to V1.16 and a version V1.16 or newer, the on-board logic must be re-programmed.
When loading new firmware into the flash configurations of the PV CPU, E4 on the CPU board must be
ON in addition to having the PMAC2-PC reinitialization jumper E3 ON.
If the Option 16 supplemental battery-backed parameter memory is ordered, an extra bank of memory
with battery backup circuitry is provided. This option can only be ordered if the main memory is flash
backed (Option 4A, 5A, 5B, or 5C). This memory is for user parameter storage only. From PMAC
programs it can be accessed with M-variables only (L-variables also in compiled PLCs). The on-line
direct-memory read and write commands can be used from the host computer as well.
With M-variable access, arrays can be created with indirect addressing techniques by pointing a second
M-variable to the definition of a first M-variable that points into this memory area. For example, with the
M-variable definitions:
M0->L:$A000; 1st long word of Opt. 16 RAM; floating point
M10->Y:$BC000,0,16 ; Low 16 bits of M0 def., with pointer address
The following code segment could load a sine table into the first 360 words of the Option 16 RAM:
P1=0
WHILE (P1<360)
M10=$A000+P1 ; Sets address that M0 points to
M0=SIN(P1) ; Puts value in register that M0 points to
P1=P1+1
ENDWHILE
Note:
This technique is not possible with L-variables in compiled PLCs.
Physically, the Option 16 memory is a 16k x 24 bank of battery-backed static RAM. It maps into the
PMAC2-PC at addresses $A000 to $BFFF, on both the X and Y data buses, an 8k x 48 block of address
space. Addresses Y:$BC00 to Y:$BFFF are “double-mapped” with the main flash-backed RAM for the
M-variable definitions, and should not be used for user parameter storage.
Any value written into the Option 16 memory will automatically be retained through a power-down or
reset; no SAVE operation is required. The power draw on the battery is low enough that battery life will
typically be limited only by the quoted 10-year life of the battery.
The following paragraphs provide a brief description of each connector on the PMAC2-PC and PMAC2Lite, its use, and individual pinout information (see Figure 2-1).