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REVISION HISTORY
REV. DESCRIPTION DATE CHG APPVD
1 REVISIONS TO FLEX CPU BAUD RATE, PPS. 6 &21 05/09/06 CP S. SATTARI
Features ...................................................................................................................................................................1
Base Version .......................................................................................................................................................3
Option 10: Firmware Version Specification.......................................................................................................4
Option 15: V-to-F Converter for Analog Input ..................................................................................................4
General Purpose Digital Inputs and Outputs (JOPTO Port) .............................................................................4
Power Supply Configuration Jumpers.....................................................................................................................5
Communication Jumpers.........................................................................................................................................7
The Optional Dual-Ported RAM .............................................................................................................................9
LED Indicators ........................................................................................................................................................9
Input and Output Mapping ......................................................................................................................................9
General Purpose Inputs and Outputs.....................................................................................................................16
Thumbwheel Port Bits (Can be Used as General Purpose I/O).............................................................................16
E0: Reserved for Future Use .................................................................................................................................18
E1 - E2: Machine Output Supply Voltage Configure ...........................................................................................18
E3 - E6: Servo Clock Frequency Control.............................................................................................................19
E48: Reserved for future use.................................................................................................................................23
E49: Serial Communications Parity Control ........................................................................................................24
E50: EAROM Save Enable/Disable.....................................................................................................................24
The PMAC Mini PCI is an inexpensive, compact 2-axis version of the PMAC family.
It can be used in a PC’s PCI slot as a half-sized board (230 mm, 9” long) or it can be used as a standalone
using serial communications for setup and/or application control.
Programs for the PMAC Mini PCI, both motion and PLC, are 100% compatible with other versions of
PMAC. However, there are several features unique to the PMAC Mini PCI:
1. There are only two output digital-to-analog converters: DAC1 and DAC2 (DAC3 and DAC4 do not
exist). Both have differential outputs. The two analog outputs on the PMAC Mini PCI can be used
as velocity or torque commands for separate axes, or as phase current commands for a single axis
commutated by the card. However, there are four incremental encoder interfaces that can be used for
feedback or master positions. Two of these may alternately be used to process analog voltages
through optional on-board V/F converters.
2. There is no JPAN control panel port. There are no digital inputs dedicated to the functions of this
port on other PMACs. To obtain equivalent functions, general-purpose inputs must be used along
with a PLC program reading these inputs. Handwheel encoders may be brought in through the
JMACH port. Wiper inputs may be brought in through the JAUX port if Option 15 is purchased.
3. The memory mapping of the general-purpose digital I/O is different from other versions of the
PMAC. Different M-Variable definitions are required for these I/Os on the PMAC Mini PCI (see
below).
4. The serial port is RS-232 only. There is no on-board or optional capability to use RS-422 format.
5. Dual-ported RAM (Option 2) is an on-board option that must be factory-installed. The PMAC Mini
PCI cannot use the separate Option 2 DPRAM board.
6. The JTHW multiplexer port outputs are not as powerful as on other PMACs. There should be no
more than one meter (three feet) of cable to any device on the port, instead of the three meters (ten
feet) on other PMACs. Anything longer should use the Acc-35A driver board.
7. There are no jumpers to control the open-circuit voltage of the complementary inputs. Instead, there
are removable socketed SIP resistor packs. At the factory, these are configured to tie the
complementary lines to 2.5V. Removed, they will tie the complementary lines to 5V.
8. There is no JXIO connector to provide clock signals to mating connectors on Acc-24P or Acc-8D
Option 8 boards. If either of these boards is used with the PMAC Mini PCI, a custom cable should be
made to connect the DCLK signal on the PMAC Mini PCI J7 port to both the DCLK and SCLK
inputs on the Acc-24P JXIO port, or the SCLK input on the Acc-8D Option 8 JXIO port.
9. The HMFLn, PLIMn, and MLIMn flag inputs on the PMAC Mini PCI can accept signals from both
sourcing and sinking drivers. If the A+15V on JMACH is used to supply the flag isolators through
E89 and E90, only sinking drivers can be used. But, if pin 13 on J8 (JAUX) is used to supply the
isolators, a +12V to +24V supply can be used for sinking drivers, or a 0V supply can be used for
sourcing drivers.
10. The PMAC Mini PCI has an interlock circuit that drops out the +/-15V supplies to the analog outputs
through a fail-safe relay if any supply on PMAC is lost.
11. If Option 15 is purchased, the PMAC Mini PCI has the capability for two on-board voltage-tofrequency (V/F) converters. These may be used for two Wiper analog inputs, or to convert the two
analog outputs to pulse trains for stepper-type drives. The V/F converters can each take an input of 010V referenced to AGND. The pulse trains can be tied into encoder channels 3 or 4 for counting. (It
is also possible, but more expensive, to use the first two channels of the off-board Acc-8D Option 2
board.)
The PMAC contains a number of jumpers (pairs of metal prongs) called E-points. These jumpers
customize the hardware features of the board for a given application and must be set up appropriately.
The following is an overview of the several PMAC jumpers grouped in appropriate categories. For a
complete description of the jumper setup configuration, refer to the E-Point Descriptions section of this
manual.
Board Configuration
Base Version
The base version of the PMAC Mini PCI provides a half sized board with:
• 40 MHz DSP563xx CPU
• 128k x 24 zero-wait-state flash-backed SRAM
• 512k x 8 flash memory for firmware and user backup
• Latest released firmware version
• RS232 serial interface, 33Mhz PCI bus interface
• Two channels axis interface circuitry, each including:
• 16-bit +/-10V analog output
• 3-channel (AB quad with index) differential/single-ended encoder input
• Four input flags, two output flags
• Interface to four external 16-bit serial ADC
• Display, muxed I/O, direct I/O interface ports
• Buffered expansion port
• Clock crystal with +/-100 ppm accuracy
• PID/notch/feedforward servo algorithms
• 1-year warranty from date of shipment
• One manuals CD per set of one to four PMACs in shipment (cables, mounting plates, mating
connectors not included)
Option 2: Dual-Ported RAM
Dual-ported RAM provides a high-speed communications path for bus communications with the host
computer through a bank of shared memory. DPRAM is advised if more than 100 data items per second
are to be passed between the controller and the host computer in either direction.
• Option 2 provides an 8k x 16 bank of on-board dual-ported RAM. The key component on the board
is U20 (located at the back of the board).
Part number: 302-603712-OPT
Option 5xF: CPU Speed Options
The base PMAC Mini PCI has a 40 MHz DSP563xx CPU. This is Option 5AF that is provided
automatically if no CPU speed option is specified.
• Option 5AF: 40 MHz DSP563xx CPU (80 MHz 56002 equivalent). This is the default CPU speed.
• Option 6 provides an Extended (Pole-Placement) Servo Algorithm firmware instead of the regular
servo algorithm firmware. This is required only in difficult-to-control systems (resonances, backlash,
friction, disturbances, changing dynamics).
Part number: 306-00PMAC-OPT
Option 6L: Special Lookahead Firmware
• Option 6L provides a special lookahead firmware for sophisticated acceleration and cornering profile
execution. With the lookahead firmware, PMAC controls the speed along the path automatically (but
without changing the path) to ensure that axis limits are not violated.
Part number: 3L6-00PMAC-OPT
Option 8A: High-Accuracy Clock Crystal
The PMAC Mini PCI has a clock crystal of nominal frequency 19.6608 MHz (~20 MHz). The standard
crystal’s accuracy specification is +/-100 ppm.
• Option 8A provides a nominal 19.6608 MHz crystal with a +/-15 ppm accuracy specification.
Part number: 3A8-603712-OPT
Option 10: Firmware Version Specification
Normally the PMAC Mini PCI is provided with the newest released firmware version. A label on the
memory IC (U13) shows the firmware version loaded at the factory.
• Option 10 provides for a user-specified firmware version. (1.17 or newer)
Part number: 310-00PMAC-OPT
Option 15: V-to-F Converter for Analog Input
The Mini PMAC PCI has an optional analog input called Wiper (because it is often tied to a
potentiometer’s wiper pin). Mini PMAC PCI can digitize this signal by passing it through an optional
voltage-to-frequency converter. The key component on the board is U27 and U30.
• Option 15 provides a voltage-to-frequency converter that permits the use of the Wiper input on the
auxiliary port J8 (JAUX).
Part number: 315-603712-OPT
General Purpose Digital Inputs and Outputs (JOPTO Port)
PMAC Mini PCI’s J5 or JOPTO connector provides eight general-purpose digital inputs and eight
general-purpose digital outputs. Each input and each output has its own corresponding ground pin in the
opposite row. The 34-pin connector was designed for easy interface to OPTO-22 or equivalent optically
isolated I/O modules. Acc-21F is a six-foot cable for this purpose. Characteristics of the JOPTO port on
the PMAC:
• 16 I/O points. 100mA per channel, up to 24V
• Hardware selectable between sinking and sourcing in groups of eight; default is all sinking (inputs
can be changed simply by moving a jumper; sourcing outputs must be special-ordered or fieldconfigured)
• Eight inputs, eight outputs only; no changes. Parallel (fast) communications to PMAC CPU
• Not opto-isolated; easily connected to Opto-22 (PB16) or similar modules through Acc-21F cable
Jumper E7 controls the configuration of the eight inputs. If it connects pins 1 and 2 (the default setting),
the inputs are biased to +5V for the OFF state, and they must be pulled low for the ON state. If E7
connects pins 2 and 3, the inputs are biased to ground for the OFF state, and must be pulled high for the
ON state. In either case, a high voltage is interpreted as a 0 by the PMAC software, and a low voltage is
interpreted as a 1.
4 Hardware Setup
PMAC-Mini PCI Hardware Reference Manual
Power Supply Configuration Jumpers
(12-24V)A+V (pin 9)
J9 (JEQU)
E89
+12V
+5V
GND
-12V
P1 (Bus) / TB1
E90
3
V/FDACs
Input
Flags
E85
E100
1
1
E88
AENAs
(EQUs)
3
AGND
E87
JMACH1
A+15V
+5V
AGND
GND
A-15V
E85, E87, E88: Analog Circuit Isolation Control – These jumpers control whether the analog circuitry
on the PMAC is isolated from the digital circuitry, or electrically tied to it. In the default configuration,
these jumpers are off, keeping the circuits isolated from each other (provided separate isolated supplies
are used).
E89-E90: Input Flag Supply Control – If E90 connects pins 1 and 2 and E89 is on, the input flags
(+LIMn, -LIMn, HMFLn, and FAULTn) are supplied from the analog A+15V supply, which can be
isolated from the digital circuitry. If E90 connects pins 1 and 2 and E89 is off, the input flags are
supplied from a separate A+V supply brought in on pin 13 of the J8 JAUX connector. This supply can be
in the +12V to +24V range and can be kept isolated from the digital circuitry. If E90 connects pins 2 and
3, the input flags are supplied from the digital +12V supply and isolation from the digital circuitry is
defeated.
E100: AENA/EQU Supply Control – If E100 connects pins 1 and 2, the circuits related to the AENAn,
EQUn and FAULTn signals will be supplied from the analog A+15V supply which can be isolated from
the digital circuitry. If E100 connects pins 2 and 3, the circuits will be supplied from a separate A+V
supply brought in on pin 13 of the J8 JAUX connector. This supply can be in the +12V to +24V range
and can be kept isolated from the digital circuitry.
Clock Configuration Jumpers
E3-E6: Servo Clock Frequency Control – The jumpers E3 – E6 determine the servo-clock frequency
by controlling how many times it is divided down from the phase-frequency. The default setting of E3
and E4 off, E5 and E6 on divides the phase-clock frequency by 4, creating a 2.25 kHz servo-clock
frequency. This setting is seldom changed.
E29-E33A: Phase Clock Frequency Control – Only one of the jumpers E29 – E33A which select the
phase-clock frequency may be on in any configuration. The default setting of E31 on which selects a 9
kHz phase-clock frequency, is seldom changed.
Hardware Setup 5
PMAC Mini PCI Hardware Reference Manual
E34A-E37: Encoder Sample Clock – Only one of the jumpers E34A – E37 which select the encoder
sample clock frequency, may be on in any configuration. The frequency must be high enough to accept
the maximum true count rate (no more than one count in any clock period), but a lower frequency can
filter out longer noise spikes. The anti-noise digital delay filter can eliminate noise spikes up to one
sample-clock cycle wide.
E98: DAC/ADC Clock Frequency Control – Leave E98 in its default setting of 1-2 which creates a
2.45 MHz DCLK signal, unless connecting an Acc-28 A/D-converter board. In this case, move the
jumper to connect pins 2 and 3 which creates a 1.22 MHz DCLK signal.
Encoder Configuration Jumpers
Encoder Complementary Line Control – PMAC has differential line receivers for each encoder
channel, but can accept either single-ended (one signal line per channel) or differential (two signal lines,
main and complementary, per channel).
REV 102 and below:
made through resistor packs configurations and not through jumper configurations: RP13, RP14, RP20
and RP21.
REV 103 and above:
made through jumper configurations: E11, E12, E13 and E14.
The selection of the type of encoder used, either single ended or differential, is
The selection of the type of encoder used, either single ended or differential, is
Single-Ended Encoders
With the jumper for an encoder set for single-ended, the differential input lines for that encoder are tied to
2.5V; the single signal line for each channel is then compared to this reference as it changes between 0
and 5V.
When using single-ended TTL-level digital encoders, the differential line input should be left open, not
grounded or tied high; this is required for The PMAC differential line receivers to work properly.
Differential Encoders
Differential encoder signals can enhance noise immunity by providing common-mode noise rejection.
Modern design standards virtually mandate their use for industrial systems, especially in the presence of
PWM power amplifiers, which generate a great deal of electromagnetic interference.
Connect pin 1 to 2 to tie differential line to +2.5V
• Tie to +2.5V when no connection
• Tie to +2.5V for single-ended encoders
Connect pin 2 to 3 to tie differential line to +5V
• Don’t care for differential line driver encoders
Tie to +5V for complementary open-collector encoders (obsolete)
E117, E118: Wiper to Encoder Input Enable – Putting these jumpers on ties the output of the Option
10 voltage-to-frequency converter that can process the Wiper analog input on the JAUX port to the
Channel 3 (E117) or 4 (E118) encoder circuitry. If the frequency signal is connected to one of these
channels, no encoder should be connected through the JMACH1 connector.
6 Hardware Setup
PMAC-Mini PCI Hardware Reference Manual
Board Reset/Save Jumpers
E50: Flash-Save Enable/Disable Control – If E50 is on (default), the active software configuration of
the PMAC can be stored to non-volatile flash memory with the SAVE command. If the jumper on E50 is
removed, this SAVE function is disabled and the contents of the flash memory cannot be changed.
E51: Re-Initialization on Reset Control – If E51 is off (default), PMAC executes a normal reset,
loading active memory from the last saved configuration in non-volatile flash memory. If E51 is on,
PMAC re-initializes on reset, loading active memory with the factory default values.
Communication Jumpers
PCI Bus Base Address Control – The selection of the base address of the card in the I/O space of the
host PC’s expansion bus is assigned automatically by the operating system and it is not selected through a
jumper configuration.
E44-E47: Serial Baud Rate Selection – The serial baud rate is determined by a combination of the
setting of jumpers E44-E47 and the CPU frequency on a PMAC board. If the CPU’s operational
frequency has been determined by a non-zero setting of I46, the serial communications baud rate is
determined at power-up/reset by variable I54 alone. Currently, the Flex CPU’s serial baud rate is
determined at power-up/reset by variable I54 alone.
E49: Serial Communications Parity Control – Jump pin 1 to 2 for no serial parity. Remove jumper for
odd serial parity.
Reserved Configuration Jumpers
E0: Reserved for future use.
E48: Reserved for future use.
I/O Configuration Jumpers
Warning:
A wrong setting of these jumpers will damage the associated output IC.
E1-E2: Machine Output Supply Configure – With the default sinking output driver IC (ULN2803A or
equivalent) in U55 for the J5 JOPTO port outputs, these jumpers must connect pins 1 and 2 to supply the
IC correctly. If this IC is replaced with a sourcing output driver IC (UDN2981A or equivalent), these
jumpers must be changed to connect pins 2 and 3 to supply the new IC correctly.
E7: Machine Input Source/Sink Control – With this jumper connecting pins 1 and 2 (default), the
machine input lines on the J5 JOPTO port are pulled up to +5V or the externally provided supply voltage
for the port. This configuration is suitable for sinking drivers. If the jumper is changed to connect pins 2
and 3, these lines are pulled down to GND. This configuration is suitable for sourcing drivers.
E17A - E17D: Motors 1-4 Amplifier-Enable Polarity Control – Jumpers E17A through E17D control
the polarity of the amplifier enable signal for the corresponding motor 1 to 4. When the jumper is on
(default), the amplifier-enable line for the corresponding motor is low true so the enable state is lowvoltage output and sinking current and the disable state is not conducting current. With the default
ULN2803A sinking driver used by the PMAC on U44, this is the fail-safe option, allowing the circuit to
fail in the disable state. With this jumper off, the amplifier-enable line is high true so the enable state is
not conducting current and the disable state is low-voltage output and sinking current. This setting is not
recommended.
Hardware Setup 7
Warning:
PMAC Mini PCI Hardware Reference Manual
A wrong setting of these jumpers will damage the associated output IC.
E101-E102: Motors 1-4 AENA/EQU Voltage Configure – The U37 driver IC controls the AENA and
EQU signals of motors 1-4. With the default sinking output driver IC (ULN2803A or equivalent) in U44,
these jumpers must connect pins 1 and 2 to supply the IC correctly. If this IC is replaced with a sourcing
output driver IC (UDN2981A or equivalent), these jumpers must be changed to connect pins 2 and 3 to
supply the new IC correctly.
The PMAC provides sockets for termination resistors on differential input pairs coming into the board. If
these signals are brought long distances into the PMAC board and ringing at signal transitions is a
problem, SIP resistor packs may be mounted in these sockets to reduce or eliminate the ringing.
All termination resistor packs have independent resistors (no common connection) with each resistor
using two adjacent pins. The following table shows which packs are used to terminate each input device:
When the PMAC Mini PCI Option 2 is ordered, U20 is installed on-board at the factory. The DPRAM is
located on the back of the board.
See the PMAC User Manual for more information.
LED Indicators
The PMAC Mini PCI has two sets (front side and back) of three LED indicators.
D9 and D9A
(green)
D10 and
D10A (red)
D19 and
D19A
(yellow)
When the green LED is lit, this indicates that power is applied to the +5V input and it is good.
When the red LED is lit, this indicates that the watchdog timer has tripped and shut down the
PMAC.
The PMAC Mini PCI has an interlock circuit that drops out the +/-15V supplies to the analog
outputs through a fail-safe relay if any supply on PMAC is lost. In this case, the LED will be
off.
Input and Output Mapping
Y:$FFC0 J1 (JDISP) Outputs
0 DB0 Display Data 0 (J1-8)
1 DB1 Display Data 1 (J1-7)
2 DB2 Display Data 2 (J1-10)
3 DB3 Display Data 3 (J1-9)
4 DB4 Display Data 4 (J1-12)
5 DB5 Display Data 5 (J1-11)
6 DB6 Display Data 6 (J1-14)
7 DB7 Display Data 7 (J1-13)
Y:$FFC1 J3 (JTHW) Inputs
0 DAT0 THW Data 0 (J3-3)
1 DAT1 THW Data 1 (J3-5)
2 DAT2 THW Data 2 (J3-7)
3 DAT3 THW Data 3 (J3-9)
4 DAT4 THW Data 4 (J3-11)
5 DAT5 THW Data 5 (J3-13)
6 DAT6 THW Data 6 (J3-15)
7 DAT7 THW Data 7 (J3-17)