All Delta Tau Data Systems, Inc. motion controller products, accessories, and amplifiers
contain static sensitive components that can be damaged by incorrect handling. When
installing or handling Delta Tau Data Systems, Inc. products, avoid contact with highly
insulated materials. Only qualified personnel should be allowed to handle this
equipment.
In the case of industrial applications, we expect our products to be protected from
hazardous or conductive materials and/or environments that could cause harm to the
controller by damaging components or causing electrical shorts. When our products are
used in an industrial environment, install them into an industrial electrical cabinet or
industrial PC to protect them from excessive or corrosive moisture, abnormal ambient
temperatures, and conductive materials. If Delta Tau Data Systems, Inc. products are
directly exposed to hazardous or conductive materials and/or environments, we cannot
guarantee their operation.
The accessory 65M (ACC-65M) is a boxed MACRO peripheral I/O module with 24
isolated, self-protected, digital inputs and 24 isolated, self-protected, digital outputs. The
ACC-65M is typically configured as a slave in a MACRO ring via either fiber optic or RJ45 connection.
The inputs can be either sinking or sourcing depending on the user’s wiring.
The outputs are strictly sourcing up to 600 mA per channel.
Optional sets of two analog inputs, two analog outputs and two general purpose relay
contacts are available.
INTRODUCTION
The ACC-65M is compatible with the following Delta Tau controllers:
All Turbo PMAC2 board-level MACRO cards
Turbo PMAC2 Ethernet Ultralite
Power or Turbo UMAC with ACC-5E
Power or Turbo Brick family (equipped with the MACRO option)
Power UMAC with ACC-5E3
Power PMAC EtherLite
Introduction 6
Accessory 65M
4-3740-00-00-000
ACC-65M
MACRO Communication Options
G
0 - No Option
2 - Two relay contact outputs
Two 12-bit bipolar DAC outputs (±10 Volts)
Two 16-bit bipolar ADC inputs (± 32767 Counts)
MACRO Node Options
G
A - Fiber-Optic MACRO Transceiver
C - RJ-45 MACRO Connector
D
KL
H
00 - No Additional* Options
xx - Factory assigned digitsfor Additional* Options
KL
Factory Assigned Options
D
Options
Part Number
Fiber optic connectors
4-3740-00-A000-00000
RJ-45 connectors
4-3740-00-C000-00000
Fiber optic connectors
2 x 16-bit bipolar ADC analog inputs (±10 VDC)
2 x 12-bit bipolar DAC analog outputs (±10 VDC)
2 x general purpose relay contacts
4-3740-00-A002-00000
RJ-45 connectors
2 x 16-bit bipolar ADC analog inputs (±10 VDC)
2 x 12-bit bipolar DAC analog outputs (±10 VDC)
2 x general purpose relay contacts
4-3740-00-C002-00000
Note
Revisions 101 and older of the ACC-65M could only support the 12bit ADC inputs which allowed the user to have ± 2047 counts of
resolution. The 16-bit ADCs provide ± 32767 counts.
SPECIFICATIONS
Part Number
The possible part number configurations are:
Specifications 7
Accessory 65M
Description
Specification
Notes
Operating Temperature
0 °C to 50 °C
Storage Temperature
-25 °C to 70 °C
Humidity
5% to 95%
Non-Condensing Relative Humidity
Logic Power
Required Voltage
24 VDC
Current Requirements
1.5 A
Permitted Time at Peak Current
2 seconds
Digital Inputs
Voltage Range
12 – 24 V
DC
Continuous Current Rating
1 Amp per channel
Peak Current Rating
2 Amps per channel
Permitted Time at Peak Current
2 seconds
Direction
Sourcing or Sinking (see wiring samples)
Digital Outputs
Voltage Range
0 – 24 V
DC
Continuous Current Rating
600 mA per channel
Peak Current Rating
1.2 Amps per channel
Permitted Time at Peak Current
2 seconds
Analog Inputs
Maximum Input Voltage Range
± 10 V
Resolution
16 bits
16-bit ADC Chip
Burr Brown ADS8361E
12-bit ADC Chip (Rev 1 and older)
Burr Brown ADS7861E
Analog Outputs
Maximum Output Voltage Range
± 10 V
Output Polarity
Bipolar
Resolution
12 bits
DAC Type
Filtered PWM
Environmental Specifications
Electrical Specifications
Specifications 8
Accessory 65M
6.50"
(165.1 mm)
6.25"
(158.75)
9.75"
(247.65 mm)
0.5"
(12.7)
8.625"
(219.075 mm)
1.25"
(31.75)
0.188"
(4.760)
2.00"
(50.8)
1.00"
(25.4)
9.375"
(238.13 mm)
Physical layout, Mounting
Specifications 9
Accessory 65M
IN
OUT
IN
OUT
OUT
IN
IN
OUT
STN = 1STN = 3
STN = 2
Ring Controller
Note
The MACRO link LED must be green on all the devices in the
MACRO ring for the software setup to work properly.
USING THE ACC-65M WITH POWER PMAC3
A Power PMAC3 Style MACRO Ring Controller can be one of the following hardware:
Power UMAC with ACC-5E3
Power EtherLite
Power Brick (equipped with MACRO)
Power Brick AC, Power Brick LV, Power Brick Controller
The first step into setting up the ACC-65M is to make sure that the MACRO cables are plugged-in in the
correct manner. The OUT from the Ring Controller or previous device goes into the IN of the ACC-65M.
The IN of the ACC-65M goes into the OUT of the ring controller or the next device on the ring.
For example, the illustration below shows how a MACRO ring with three ACC-65Ms is typically
connected:
The Power PMAC can interface to up to 16 PMAC3 Style MACRO
ICs.
Note
These settings require a SAVE followed by a reset $$$ to take effect.
Once implemented, these settings should ensure that the
Power PMAC is now a MACRO ring Controller. And the
MACRO Status window in the Power PMAC IDE
software should look like:
Step 1: Preparing the Ring Controller
The Power PMAC used to control a MACRO ring must be configured as a ring controller in order to
establish communication and transfer data over the ring.
Following, is a summary list of the relevant parameters which need to be set properly on the Ring
Controller side to allow proper functionality of the MACRO ring, and configuration of the ACC-65M.
Detailed description of these parameters can be found in the pertaining Ring Controller Hardware
Reference/User manual or in the Power SRM (Software Reference Manual).
Using the ACC-65M with Power PMAC3 11
Accessory 65M
Using the ACC-65M with Power PMAC3 12
Accessory 65M
Note
Make sure that the watch window does not contain any MS{}
commands prior to establishing Master Slave communication. This will
latch a MACRO communication error (MACRO Status window).
Note
If the ACC-65M is to be inserted into an existing MACRO ring system.
It may be more practical to place it in a MACRO ring all by itself with
the ring controller. Set up and save all the necessary parameters, and
then place it back into the system with the other devices.
Note
If the ACC-65M has been initialized and set up previously then it may
have a station number saved to it. If you know that number (e.g. I11=1),
then you would address it with the command MacroStation1.
Step 2: MACRO ASCII Communication
There are two possible MACRO communication methods between the ring controller and the ACC-65M:
MACRO ASCII communication
Direct communication to the ACC-65M; it is useful for initial setup, troubleshooting, and allows to
eventually establish Master Slave (MS) communication.
Master Slave (MS) communication
Establishing MS commands (through an I/O node) is ultimately what we want.
If the ACC65M is at factory default settings then the user needs to issue a MacroStation255. This
command searches the MACRO ring for new and unassigned devices. If successful, the AsciiCom status bit
is highlighted in the MACRO status window:
Now, you are talking directly to the ACC-65M. You should be able to issue commands such as type TYPE,
version VERSetc…
Using the ACC-65M with Power PMAC3 13
Accessory 65M
Note
One I/O node is sufficient for transferring all the data available on the
ACC-65M.
The goal of MACRO ASCII communication is to enable a selected I/O node over which Master Slave
communication can then be used to set up the rest of the necessary parameters of the ACC-65M.
Choosing I/O node #2 as an example, enabling it is done through I996:
Issue a MacroStationClose to terminate MACRO ASCII communication:
Using the ACC-65M with Power PMAC3 14
Accessory 65M
23
q].PhaseFreGate3[
1000117964.8
CeilI992MS2,
i
ckDiv].PhaseCloGate3[I997MS2,i
1
3)I992MS2,(2
1)I997(MS2,117964.8)Period(Ringcheck
INTI8MS2,
1
100
rcent)MaxErrorPeI8(MS2,
INTI9MS2,
I9MS2,I8MS2,I10MS2,
Note
These equations must be computed ahead of time, expressions cannot
be written directly into MS{} variables.
These settings must be retained on the ACC65M. This is done by issuing a save (e.g.
MSSAVE2), followed by a reset (e.g. MS$$$2)
to take effect:
Step 3: Finishing up the ACC-65M Setup
Having enabled a selected I/O node on ACC-65M (i.e. node 2), the corresponding I/O node should be
enabled on the ring controller side. For example, at MACRO IC 0, Bank A, node 2:
Master Slave communication should be now available over I/O node 2. And the following parameters can
be downloaded from the project editor. For example, station number 1 and I/O node 2:
MS2,I11=1 // Station number assignment (user configurable) for future // MACRO ASCII communication (e.g. MACSTA1)
MS2,I992=6527 // See euqation below
MS2,I997=0 // See equation below
MS2,I995=$4080 // Typical setting for MACRO slave device
MS2,I996=$0F8004 // Nodes enabling, e.g. I/O node #2
MS2,I8=181 // Ring check period (see equation below)
MS2,I9=28 // Maximum ring error count (see equation below)
MS2,I10=153 // Minimum synch packet count (see equation below)
MS{}, I992, and I997 are set so that the phase frequency is the same as the ring controller:
// Where ceil is rounding to the higher integer
If the clock settings are not at default, MS{},I8, I9, and I10 can be calculated using the following equations.
Assuming a typical ring check period (RingCheckPeriod) of 20 milliseconds and a fatal packet error
(MaxErrorPercent) of 15 percent:
Using the ACC-65M with Power PMAC3 15
Accessory 65M
15 14 13 12 11 109876543210
Auxiliary
Nodes
I/O Nodes
Servo Nodes
15 14 13 12 11 109876543210Node
Auxiliary
Nodes
Servo Nodes
I/O Nodes
Bank BBank A
PMAC3 Style I/O Node
71531230
24-bit Register
16-bit Register 1
16-bit Register 2
16-bit Register 3
Note
The Power PMAC can interface with up to 16 PMAC3 Style MACRO
ICs. ICs present are reported by the variable Macro.IC3s.
Step 4: I/O Data Registers
A single I/O node is sufficient for transferring the data to/from the ACC-65M. This is handled automatically
in the firmware. The user’s responsibility is choosing an available I/O node, enabling it per the example
above, and finding the corresponding register or data element structure (listed in the tables below) for
reading/writing to the data.
A MACRO IC consists of a number of auxiliary, servo, and I/O nodes:
Auxiliary nodes are Master/Control registers and for internal firmware use.
Servo nodes carry information such as feedback, commands, and flags for motor control.
I/O nodes are by default unoccupied and are configurable for transferring miscellaneous data.
Each PMAC3 style MACRO IC consists of 32 nodes: 4 auxiliary, 16 servo, and 12 I/O nodes:
Each I/O node consists of 1 x 24-bit and 3 x 16-bit data registers residing in the following fields:
Using the ACC-65M with Power PMAC3 16
Accessory 65M
PMAC3 Style I/O Node
71531230
24-bit Register
16-bit Register 1
16-bit Register 2
16-bit Register 3
Digital I/O
Analog I/O
GP Relays
Bank B
Bank A
Data
Register
Inputs
Outputs
Inputs
Outputs
Gate3[i].MacroInB[j][0]
Gate3[i].MacroOutB[j][0]
Gate3[i].MacroInA[j][0]
Gate3[i].MacroOutA[j][0]
24-bit
Gate3[i].MacroInB[j][1]
Gate3[i].MacroOutB[j][1]
Gate3[i].MacroInA[j][1]
Gate3[i].MacroOutA[j][1]
1st 16-bit
Gate3[i].MacroInB[j][2]
Gate3[i].MacroOutB[j][2]
Gate3[i].MacroInA[j][2]
Gate3[i].MacroOutA[j][2]
2nd 16-bit
Gate3[i].MacroInB[j][3]
Gate3[i].MacroOutB[j][3]
Gate3[i].MacroInA[j][3]
Gate3[i].MacroOutA[j][3]
3rd 16-bit
Where:
i is the PMAC3 Style MACRO IC index
jis the I/O node number.
Note
Bitwise mapping, and signed assignments into the PMAC3 Style
MACRO structure elements require Power PMAC firmware version
1.5.8.305 or newer.
Step 5: Using the ACC-65M Data
Having configured the following:
Set up the MACRO ring controller
Set up the phase clock to be the same across the ring
Enabled a selected I/O node on the ACC-65M
Enabled the corresponding I/O node on the ring controller side
Saved and reset both the ACC-65M and the ring controller
The ACC-65M data should now be available to access from the ring controller side. The ACC-65M
firmware places the data automatically in the following data registers of a selected I/O node:
And each I/O node possesses data structure elements for inputs and outputs separately for either bank:
Using the ACC-65M with Power PMAC3 17
Accessory 65M
Note
Power PMAC firmware versions older than 1.5.8.305 must use explicit
address offsets found in the memory map appendix section.
Gate3[0]
Bank A
Bank B
ACC-65M I/O Node#
2 3 6 7 10
11 2 3 6 7
11
12
Ring Controller I/O Node [j]
2 3 6 7 10
11
18
19
22
23
26
27
Gate3[1]
Bank A
Bank B
ACC-65M I/O Node#
2 3 6 7 10
11 2 3 6 7
11
12
Ring Controller I/O Node [j]
34
35
38
39
42
43
50
51
54
55
58
59
Gate3[2]
Bank A
Bank B
ACC-65M I/O Node#
2 3 6 7 10
11 2 3 6 7
11
12
Ring Controller I/O Node [j]
66
67
70
71
74
75
82
83
86
87
90
91
Gate3[3]
Bank A
Bank B
ACC-65M I/O Node#
2 3 6 7 10
11 2 3 6 7
11
12
Ring Controller I/O Node [j]
98
99
102
103
106
107
114
115
118
119
122
123
Below, are example tables showing I/O Node numbers of the first 4 PMAC3 Style MACRO ICs:
Using the ACC-65M with Power PMAC3 18
Accessory 65M
The ACC-65M firmware transfers
automatically the digitals inputs and
outputs into/from the upper 24 bits of
the 24-bit data register of the chosen
I/O node.
Where: i is the card index, and j is the I/O node number
Example: Digital I/O mapping at MACRO IC 0, Bank A, I/O node 2
Using the ACC-65M with Power PMAC3 19
Accessory 65M
The ACC-65M firmware transfers
automatically the analog inputs and
outputs from/to upper 16 bits of the
1st and 2nd 16-bit data registers of
the chosen I/O node.
PMAC3 Style I/O Node
71531230
24-bit Register
ACC-65M ADC 1 / DAC 1
ACC-65M ADC 2 / DAC 2
16-bit Register 3
Bank B
Bank A
Data
Register
Inputs
Outputs
Inputs
Outputs
Gate3[i].MacroInB[j][1]
Gate3[i].MacroOutB[j][1]
Gate3[i].MacroInA[j][1]
Gate3[i].MacroOutA[j][1]
1st 16-bit
Gate3[i].MacroInB[j][2]
Gate3[i].MacroOutB[j][2]
Gate3[i].MacroInA[j][2]
Gate3[i].MacroOutA[j][2]
2nd 16-bit
Note
The ADCs on older revisions of the ACC-65M (2-pin Molex logic
connector) are 12 bits. The suffix of the address mapping should be
.12.12S
Note
Typically, the ACC-65M is configured (by the factory) for unsigned
data. Occasionally, it is ordered in the unsigned data format. Remove
the S in the suffix for proper “unsigned” addressing.
Analog Inputs (ADCs) and Outputs (DACs)
Where: i is the card index, and j is the I/O node number
Example: Analog Input ADCs and output DACs mapping at MACRO IC 0, Bank A, I/O node 2
For example, with the default clock setting (e.g.
MS2,I992=6527) and by writing to the analog output data
register or suggested pointer, the user should see:
Pointer
Single Ended
[VDC]
Differential
[VDC]
-6527
-10
-20
-3264
-5
-10 0 0
0
3264
+5
+10
6527
+10
+20
Testing the Analog Inputs
Applying a voltage into the physical input pins, and reading the above referenced pointers for unsigned
(unipolar) or signed (bipolar) data, the user should see the following.
With the 16-bit ADCs:
With the 12-bit ADCs:
Testing the Analog Outputs
These are ±10V outputs, where 10 volts corresponds to the value of MS2,I992. Remember that this is
dictated by the ring phase clock, do not attempt to change it in this section.
Using the ACC-65M with Power PMAC3 21
Accessory 65M
Using the ADCs for Servo Feedback
Using an analog ADC input for servo requires bringing it into the encoder conversion table (ECT). Using
the automatic ECT utility in the IDE software:
Type: Single 32-bit register read
Source Address: I/O node structure element address (i.e. Gate3[i].MacroInA[j][1])
LSB Bit#: starting bit of ADC data (typically 16)
#of Bits Used: ADC data number of bits (16 or 12)
Result Units: set to 1 to shift data 16 bits for proper scaling
The ADC data is now processed in the encoder conversion table.
A motor element structure can point to it.
Example: Motor[1].pMasterEnc = EncTable[1].a
Or it can be accessed manually using a pointer. Note that you would need to multiply by the scale factor (or
divide by 2^16 in this example) for proper scaling.
Example:PTR ECT1Result->EncTable[1].PrevEnc
Using the ACC-65M with Power PMAC3 22
Accessory 65M
The ACC-65M firmware transfers
automatically the general purpose
relay outputs 1 and 2 into bits 27
and 28 respectively of the 3rd 16-bit
I/O data register.
PMAC3 Style I/O Node
71531230
24-bit Register
16-bit Register 1
16-bit Register 2
GP Relays Bits 27, and 28
Bank B
Bank A
Data
Register
Inputs
Outputs
Inputs
Outputs
Gate3[i].MacroInB[j][3]
Gate3[i].MacroOutB[j][3]
Gate3[i].MacroInA[j][3]
Gate3[i].MacroOutA[j][3]
3rd 16-bit
I/O
GP Relay #1
GP Relay #2
Bank A
2
PTR GpRelay1->Gate3[0].MacroOutA[2][3].27.1
PTR GpRelay2->Gate3[0].MacroOutA[2][3].28.1
3
PTR GpRelay1->Gate3[0].MacroOutA[3][3].27.1
PTR GpRelay2->Gate3[0].MacroOutA[3][3].28.1
6
PTR GpRelay1->Gate3[0].MacroOutA[6][3].27.1
PTR GpRelay2->Gate3[0].MacroOutA[6][3].28.1
7
PTR GpRelay1->Gate3[0].MacroOutA[7][3].27.1
PTR GpRelay2->Gate3[0].MacroOutA[7][3].28.1
10
PTR GpRelay1->Gate3[0].MacroOutA[10][3].27.1
PTR GpRelay2->Gate3[0].MacroOutA[10][3].28.1
11
PTR GpRelay1->Gate3[0].MacroOutA[11][3].27.1
PTR GpRelay2->Gate3[0].MacroOutA[11][3].28.1
Bank B
2
PTR GpRelay1->Gate3[0].MacroOutB[2][3].27.1
PTR GpRelay2->Gate3[0].MacroOutB[2][3].28.1
3
PTR GpRelay1->Gate3[0].MacroOutB[3][3].27.1
PTR GpRelay2->Gate3[0].MacroOutB[3][3].28.1
6
PTR GpRelay1->Gate3[0].MacroOutB[6][3].27.1
PTR GpRelay2->Gate3[0].MacroOutB[6][3].28.1
7
PTR GpRelay1->Gate3[0].MacroOutB[7][3].27.1
PTR GpRelay2->Gate3[0].MacroOutb[7][3].28.1
10
PTR GpRelay1->Gate3[0].MacroOutB[10][3].27.1
PTR GpRelay2->Gate3[0].MacroOutB[10][3].28.1
11
PTR GpRelay1->Gate3[0].MacroOutB[11][3].27.1
PTR GpRelay2->Gate3[0].MacroOutB[11][3].28.1
General Purpose Relay Outputs
Example: General purpose relay outputs mapping at MACRO IC 0, both banks, and all nodes:
Using the ACC-65M with Power PMAC3 23
Accessory 65M
GP Relay 1
Connection between
pins #13 (COM) and #14 (NO)
Connection between
pins #13 (COM) and #6 (NC)
Software bit = 0
Open
Closed
Software bit = 1
Closed
Open
GP Relay 2
Connection between
pins #7 (COM) and #8 (NO)
Connection between
pins #7 (COM) and #15 (NC)
Software bit = 0
Open
Closed
Software bit = 1
Closed
Open
Testing the General Purpose Relays
The following table summarizes the relay functions. That is the relationship between the common line and
the normally open / normally closed lines:
Using the ACC-65M with Power PMAC3 24
Accessory 65M
IN
OUT
IN
OUT
OUT
IN
IN
OUT
STN = 1STN = 3
STN = 2
Ring Controller
Note
The MACRO link LED must be green on all the devices in the
MACRO ring for the software setup to work properly.
Note
The Power UMAC with ACC-5E is the only configuration in which a
Power PMAC interfaces to a PMAC2 Style MACRO IC.
USING THE ACC-65M WITH POWER PMAC2
A Power PMAC2 Style MACRO Ring Controller is comprised of a Power UMAC with one or more ACC5Es in the rack.
The first step into setting up the ACC-65M is to make sure that the MACRO cables are plugged-in in the
correct manner. The OUT from the Ring Controller or previous device goes into the IN of the ACC-65M.
The IN of the ACC-65M goes into the OUT of the ring controller or the next device on the ring.
For example, the illustration below shows how a MACRO ring with three ACC-65Ms is typically
connected:
Using the ACC-65M with Power PMAC2 25
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