Dell Vostro 3252 Schematics

5

www.teknisi-indonesia.com

PCB Number: 14085-1
ECO# number: 825661

PAGE

D D

C C

B B

54

A A

55
56
57

58

TITLE

01

Cover Page

02

Block Diagram

03 Reserved

Reserved

04

CPU_(DDR)

05
06

Reserved
CPU_(VCC_CORE)

07
08

CPU_(DDI/EDP)

09

CPU_(VSS)
CPU_(POWER CAP1)

10
11

CPU_(POWER CAP2)

12

DDR3_SODIMM1

13

Reserved
14 Reserved
15

CPU_(STRAP)
16

CPU_(USB/UART/GPIO)
17

CPU (GPIO/STRAP/I2C/SMB)

CPU_(LPC/SIDEBAND/JTAG)

18
19

CPU_(CLK/SATA/PCIE/SPI/HDA)
20

Reserved
21

CPU_(POWER1)

Reserved

22

Reserved

23
24

SIO_IT8617E
25

FLASH ROM/RTC
26

FAN CIRCURTS/HOLE
27

AUDIO ALC3600
28

Reserved
29

AUDIO JACK
30

Reserved
31

LAN_RTL8111H
32

RJ45+USB2.0
33

RTS5170+CARD READER
34

USB2.0 CONN(REAR)
35

USB3.0 CONN(FRONT)
36

Reserved
37

USB HUB
38

Reserved
39

PWROK
40

RUN PWR
41

DSW_POWER_CTL
42

DCIN JACK
43

PWR_12V_(NCP1589A)
44

3D3V/5V_(RT8243A)
45

VCC0/VCC1_(NCP81201)
46

VGG_(NCP81201)
47

0D95V_S5_(RT6220A)
48

V_SM/ V_SMVTT_(RT8207M)
49

1P05V_S5_(RT8237C)
50

1P15V_S5_(RT8068A)
51

1D24V_S5_(APL5930)

1D8V_S5_(RT8068A)

52

1D5V_S0_(APL5930)

53

SVID

DP TO VGA_(RTD2168)

HDMI CONN

Reserved

Reserved

5

4

Quantity

4

BOM Configuration
(R):Unmount
(G):GPU
(U):UMA
(D):Debug used

59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85

86
87
88
89

90

91 Reserved

92

93
94
95 Reserved
96
97

98
99
100

101
102

103
104
105

3

2

PCB BOARD SIZE
6 Layers

155mm x 285.7mm

A00 BUILD

INTEL Braswell Platform

LAN: RTL8111H

AUDIO: ALC3600

SIO: IT8617E

TITLEPAGE Quantity
Reserved
HDD/ODD
NGFF CONN
Reserved
Reserved
LED/POWER BUTTON
Reserved
Reserved
Reserved
DEBUG CONNECTOR
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
GPU_MARS_PCIE
GPU_MARS_I/O
GPU_MARS_MEMORY
GPU_MARS_STRAP
GPU_MARS_PWR/GND
VRAM1,2(1/2)
VRAM3,4(2/2)
Reserved
Reserved
GPU_POWER CORE_(ISL62882C)
GPU_POWER 0D95V/1D8V
GPU_POWER 3D3V/1D35V
Reserved
Reserved
Reserved

LEVEL SHIFT
Reserved
Reserved

Reserved
Reserved
Reserved
CPU_XDP
Reserved
Reserved
Power Sequence
Power Block Diagram
Power Good & Reset Diagram
Clock Diagram

3

2

1

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Cover Page

Cover Page

Cover Page

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

1 105Tuesday, June 23, 2015

1 105Tuesday, June 23, 2015

1 105Tuesday, June 23, 2015

1

-1

-1

-1

5

www.teknisi-indonesia.com

4

3

2

1

Project Name: Tahoe SOC SFF/Lily SFF
Project Code: 3PD03C010001/3PD03D010001
PCB Version: -1
PCB Number: 14085
PCB certificaion number: LT1119

D D

PCB BOARD SIZE

6 Layer

Internal Slot/Header

Front/Rear IO

Chipset

(Rear)

HDMI CONN

HDMI(UMA) DDI0

HDMI(GPU)

PS8407

DPA(GPU)

AMD GPU 25W
Mars LE (S3)

DPB(GPU)

C C

(Rear)

VGA CONN

RGB

HDD

ODD

8MB SPI ROM

B B

Level
Shift

RTD2168

PCIEx2

DDI1(UMA)

SATA3.0

SATA3.0

SPI

Intel CPU

Braswell

FCBGA1170

TDP: 6W

Package
27*25*1.4

ETHERNET (10/100/1000Mb)

USB 3.0/2.0 ports (4/5)

High Definition Audio

SATA ports (2)

PCIe ports (4)

LPC I/F

1.35V
DDR3L

PCIEx1

USB2.0

USB3.0

USB2.0

USB3.0

USB2.0

USB2.0

CHA

DDR3 SODIMM 204 PIN

LAN RTL8111H

Port2,3

Port0

Port0

Port1

Port1

TPS2546

Port4

RJ45 w/ USBx2 CONN

USB3F1

Resisters

USB
CHARGER

USB HUB GL850G

U2x1

U2X1

USB3F2

U2x2

RTS5170

NGFF CONN

(Front)

(Front)

SD 3.0

(Rear)

USB2.0x2 CONN

SD Card CONN

(Rear)

(Front)

PCIEx1

PCB DELL P/N:
1R2V6$EA VICTORYGIA
1R2V6$FA GECS

SIO IT8617E

LPC

Azalia

1R2V6$HA GLOBALBRAN

ALC3600

1R2V6$IA WUZHU
N3700 DELL P/N: 63DMW

A A

CPU FAN

CTIA (Apple)

N3150 DELL P/N: C12KP
N3050 DELL P/N: 63DMW

Standard Headset

(Front)

Line in

(Rear)

5

4

Line out

(Rear)

Mic in

(Rear)

3

2

GPU DELL P/N: 3PK94
Micron VRAM DELL P/N: PP8TP
Samsung VRAM DELL P/N: 53DCX
SKhynix VRAM DELL P/N: W5PXV

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Block Diagram

Block Diagram

Block Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
C

C

C

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

2 105Tuesday, June 23, 2015

2 105Tuesday, June 23, 2015

2 105Tuesday, June 23, 2015

-1

-1

-1

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

Blanking

B B

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

A A

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

3 105Tuesday, June 23, 2015

3 105Tuesday, June 23, 2015

3 105Tuesday, June 23, 2015

1

-1A

-1A

-1A

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

Blanking

B B

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

A A

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

4 105Tuesday, June 23, 2015

4 105Tuesday, June 23, 2015

4 105Tuesday, June 23, 2015

1

-1A

-1A

-1A

5

www.teknisi-indonesia.com

4

3

2

1

M_DQS_A_DP[0..7][12]

M_DQS_A_DN[0..7][12]

D D

C C

C576

(R_)

1 2

SCD1U16V2KX-3GP
C574

(R_)

1 2

SCD1U16V2KX-3GP
C575

(R_)

1 2

SCD1U16V2KX-3GP

DRAM_RCOMP_0

1 2

R527
182R2F-GP

R1217
182R2F-GP

1 2

SM_RCOMP_1

M_DQS_A_DP7
M_DQS_A_DP6
M_DQS_A_DP5
M_DQS_A_DP4
M_DQS_A_DP3
M_DQS_A_DP2
M_DQS_A_DP1
M_DQS_A_DP0

M_DQS_A_DN7
M_DQS_A_DN6
M_DQS_A_DN5
M_DQS_A_DN4
M_DQS_A_DN3
M_DQS_A_DN2
M_DQS_A_DN1
M_DQS_A_DN0

DDR3_DRAM_PWROK[39]

DDR3_DRAMRST_N

DDR3_VCCA_PWRGD

DDR3_DRAM_PWROK

M_MAA_A[0..15][12]

DDR3_VREF_CA
DDR3_VREF_DQ

M_MA_DM[7..0][12]

M_MAA_A15
M_MAA_A14
M_MAA_A13
M_MAA_A12
M_MAA_A11
M_MAA_A10
M_MAA_A9
M_MAA_A8
M_MAA_A7
M_MAA_A6
M_MAA_A5
M_MAA_A4
M_MAA_A3
M_MAA_A2
M_MAA_A1
M_MAA_A0

M_CAS_A_N[12]
M_RAS_A_N[12]
M_WE_A_N[12]

CK_M_DDR1_A_DP[12]
CK_M_DDR1_A_DN[12]

M_SCKE_A1[12]

CK_M_DDR0_A_DP[12]
CK_M_DDR0_A_DN[12]

M_SCKE_A0[12]

M_ODT_A0[12]
M_ODT_A1[12]

DDR3_DRAMRST_N[12]

DRAM_RCOMP_0

M_SBS_A2[12]
M_SBS_A1[12]
M_SBS_A0[12]

M_SCS_A_N1[12]
M_SCS_A_N0[12]

DDR3_VREF_CA
DDR3_VREF_DQ

M_MA_DM7
M_MA_DM6
M_MA_DM5
M_MA_DM4
M_MA_DM3
M_MA_DM2
M_MA_DM1
M_MA_DM0

M_DQS_A_DP7
M_DQS_A_DN7
M_DQS_A_DP6
M_DQS_A_DN6
M_DQS_A_DP5
M_DQS_A_DN5
M_DQS_A_DP4
M_DQS_A_DN4
M_DQS_A_DP3
M_DQS_A_DN3
M_DQS_A_DP2
M_DQS_A_DN2
M_DQS_A_DP1
M_DQS_A_DN1
M_DQS_A_DP0
M_DQS_A_DN0

CPU1A

BD49

DDR3_M0_MA_15

BD47

DDR3_M0_MA_14

BF44

DDR3_M0_MA_13

BF48

DDR3_M0_MA_12

BB49

DDR3_M0_MA_11

BJ45

DDR3_M0_MA_10

BE52

DDR3_M0_MA_9

BD44

DDR3_M0_MA_8

BE46

DDR3_M0_MA_7

BB46

DDR3_M0_MA_6

BH48

DDR3_M0_MA_5

BD42

DDR3_M0_MA_4

BH47

DDR3_M0_MA_3

BJ48

DDR3_M0_MA_2

BC42

DDR3_M0_MA_1

BB47

DDR3_M0_MA_0

BF52

DDR3_M0_BS_2

AY40

DDR3_M0_BS_1

BH46

DDR3_M0_BS_0

BG45

DDR3_M0_CAS#

BA40

DDR3_M0_RAS#

BH44

DDR3_M0_WE#

AU38

DDR3_M0_CS1#

AY38

DDR3_M0_CS0#

BD38

DDR3_M0_CK_1

BF38

DDR3_M0_CK_1#

AY42

DDR3_M0_CKE_1

BD40

DDR3_M0_CK_0

BF40

DDR3_M0_CK_0#

BB44

DDR3_M0_CKE_0

AT30

RSVD#AT30

AU30

RSVD#AU30

AV36

DDR3_M0_ODT_0

BA38

DDR3_M0_ODT_1

AT28

DDR3_M0_OCAVREF

AU28

DDR3_M0_ODQVREF

BA42

DDR3_M0_DRAMRST#

AV28

DDR3_DRAM_PWROK

BA28

DDR3_M0_RCOMPPD

BH30

DDR3_M0_DM_7

BD32

DDR3_M0_DM_6

AY36

DDR3_M0_DM_5

BG41

DDR3_M0_DM_4

BA53

DDR3_M0_DM_3

AP44

DDR3_M0_DM_2

AT48

DDR3_M0_DM_1

AP52

DDR3_M0_DM_0

BH32

DDR3_M0_DQS_7

BG31

DDR3_M0_DQSB_7

BC30

DDR3_M0_DQS_6

BC32

DDR3_M0_DQSB_6

AT32

DDR3_M0_DQS_5

AT34

DDR3_M0_DQSB_5

BH40

DDR3_M0_DQS_4

BG39

DDR3_M0_DQSB_4

AY52

DDR3_M0_DQS_3

BA51

DDR3_M0_DQSB_3

AT42

DDR3_M0_DQS_2

AT41

DDR3_M0_DQSB_2

AV47

DDR3_M0_DQS_1

AV48

DDR3_M0_DQSB_1

AM52

DDR3_M0_DQS_0

AM51

DDR3_M0_DQSB_0

BRASWELL-GP

(071.00BSW.0B0U)

BRASWELL

DDR0

1 OF 13

DDR3_M0_DQ_63
DDR3_M0_DQ_62
DDR3_M0_DQ_61
DDR3_M0_DQ_60
DDR3_M0_DQ_59
DDR3_M0_DQ_58
DDR3_M0_DQ_57
DDR3_M0_DQ_56

DDR3_M0_DQ_55
DDR3_M0_DQ_54
DDR3_M0_DQ_53
DDR3_M0_DQ_52
DDR3_M0_DQ_51
DDR3_M0_DQ_50
DDR3_M0_DQ_49
DDR3_M0_DQ_48

DDR3_M0_DQ_47
DDR3_M0_DQ_46
DDR3_M0_DQ_45
DDR3_M0_DQ_44
DDR3_M0_DQ_43
DDR3_M0_DQ_42
DDR3_M0_DQ_41
DDR3_M0_DQ_40

DDR3_M0_DQ_39
DDR3_M0_DQ_38
DDR3_M0_DQ_37
DDR3_M0_DQ_36
DDR3_M0_DQ_35
DDR3_M0_DQ_34
DDR3_M0_DQ_33
DDR3_M0_DQ_32

DDR3_M0_DQ_31
DDR3_M0_DQ_30
DDR3_M0_DQ_29
DDR3_M0_DQ_28
DDR3_M0_DQ_27
DDR3_M0_DQ_26
DDR3_M0_DQ_25
DDR3_M0_DQ_24

DDR3_M0_DQ_23
DDR3_M0_DQ_22
DDR3_M0_DQ_21
DDR3_M0_DQ_20
DDR3_M0_DQ_19
DDR3_M0_DQ_18
DDR3_M0_DQ_17
DDR3_M0_DQ_16

DDR3_M0_DQ_15
DDR3_M0_DQ_14
DDR3_M0_DQ_13
DDR3_M0_DQ_12
DDR3_M0_DQ_11
DDR3_M0_DQ_10

DDR3_M0_DQ_9
DDR3_M0_DQ_8

DDR3_M0_DQ_7
DDR3_M0_DQ_6
DDR3_M0_DQ_5
DDR3_M0_DQ_4
DDR3_M0_DQ_3
DDR3_M0_DQ_2
DDR3_M0_DQ_1
DDR3_M0_DQ_0

BG33
BH28
BJ29
BG28
BG32
BH34
BG29
BJ33

BD28
BF30
BA34
BD34
BD30
BA32
BC34
BF34

AV32
AV34
BD36
BF36
AU32
AU34
BA36
BC36

BH38
BH36
BJ41
BH42
BJ37
BG37
BG43
BG42

BB51
AW53
BC52
AW51
AV51
BC53
AV52
BD52

AV42
AP41
AV41
AT44
AP40
AT38
AP42
AT40

AV45
AY50
AT50
AP47
AV50
AY48
AT47
AP48

AP51
AR53
AK52
AL53
AR51
AT52
AL51
AK51

M_DATA_A63
M_DATA_A62
M_DATA_A61
M_DATA_A60
M_DATA_A59
M_DATA_A58
M_DATA_A57
M_DATA_A56

M_DATA_A55
M_DATA_A54
M_DATA_A53
M_DATA_A52
M_DATA_A51
M_DATA_A50
M_DATA_A49
M_DATA_A48

M_DATA_A47
M_DATA_A46
M_DATA_A45
M_DATA_A44
M_DATA_A43
M_DATA_A42
M_DATA_A41
M_DATA_A40

M_DATA_A39
M_DATA_A38
M_DATA_A37
M_DATA_A36
M_DATA_A35
M_DATA_A34
M_DATA_A33
M_DATA_A32

M_DATA_A31
M_DATA_A30
M_DATA_A29
M_DATA_A28
M_DATA_A27
M_DATA_A26
M_DATA_A25
M_DATA_A24

M_DATA_A23
M_DATA_A22
M_DATA_A21
M_DATA_A20
M_DATA_A19
M_DATA_A18
M_DATA_A17
M_DATA_A16

M_DATA_A15
M_DATA_A14
M_DATA_A13
M_DATA_A12
M_DATA_A11
M_DATA_A10
M_DATA_A9
M_DATA_A8

M_DATA_A7
M_DATA_A6
M_DATA_A5
M_DATA_A4
M_DATA_A3
M_DATA_A2
M_DATA_A1
M_DATA_A0

M_DATA_A[0..63] [12]

DDR3_VCCA_PWRGD[39]

SM_RCOMP_1

CPU1B

BD5

DDR3_M1_MA_15

BD7

DDR3_M1_MA_14

BF10

DDR3_M1_MA_13

BF6

DDR3_M1_MA_12

BB5

DDR3_M1_MA_11

BJ9

DDR3_M1_MA_10

BE2

DDR3_M1_MA_9

BD10

DDR3_M1_MA_8

BE8

DDR3_M1_MA_7

BB8

DDR3_M1_MA_6

BH6

DDR3_M1_MA_5

BD12

DDR3_M1_MA_4

BH7

DDR3_M1_MA_3

BJ6

DDR3_M1_MA_2

BC12

DDR3_M1_MA_1

BB7

DDR3_M1_MA_0

BF2

DDR3_M1_BS_2

AY14

DDR3_M1_BS_1

BH8

DDR3_M1_BS_0

BG9

DDR3_M1_CAS#

BA14

DDR3_M1_RAS#

BH10

DDR3_M1_WE#

AU16

DDR3_M1_CS1#

AY16

DDR3_M1_CS0#

BD16

DDR3_M1_CK_1

BF16

DDR3_M1_CK_1#

AY12

DDR3_M1_CKE_1

BD14

DDR3_M1_CK_0

BF14

DDR3_M1_CK_0#

BB10

DDR3_M1_CKE_0

AT24

RSVD#AT24

AU24

RSVD#AU24

AV18

DDR3_M1_ODT_0

BA16

DDR3_M1_ODT_1

AT26

DDR3_M1_OCAVREF

AU26

DDR3_M1_ODQVREF

BA12

DDR3_M1_DRAMRST#

AV26

DDR3_VCCA_PWROK

BA26

DDR3_M1_RCOMPPD

BH24

DDR3_M1_DM_7

BD22

DDR3_M1_DM_6

AY18

DDR3_M1_DM_5

BG13

DDR3_M1_DM_4

BA1

DDR3_M1_DM_3

AP10

DDR3_M1_DM_2

AT6

DDR3_M1_DM_1

AP2

DDR3_M1_DM_0

BH22

DDR3_M1_DQS_7

BG23

DDR3_M1_DQSB_7

BC24

DDR3_M1_DQS_6

BC22

DDR3_M1_DQSB_6

AT22

DDR3_M1_DQS_5

AT20

DDR3_M1_DQSB_5

BH14

DDR3_M1_DQS_4

BG15

DDR3_M1_DQSB_4

AY2

DDR3_M1_DQS_3

BA3

DDR3_M1_DQSB_3

AT12

DDR3_M1_DQS_2

AT13

DDR3_M1_DQSB_2

AV7

DDR3_M1_DQS_1

AV6

DDR3_M1_DQSB_1

AM2

DDR3_M1_DQS_0

AM3

DDR3_M1_DQSB_0

BRASWELL-GP

(071.00BSW.0B0U)

DDR1

BRASWELL

2 OF 13

DDR3_M1_DQ_63
DDR3_M1_DQ_62
DDR3_M1_DQ_61
DDR3_M1_DQ_60
DDR3_M1_DQ_59
DDR3_M1_DQ_58
DDR3_M1_DQ_57
DDR3_M1_DQ_56

DDR3_M1_DQ_55
DDR3_M1_DQ_54
DDR3_M1_DQ_53
DDR3_M1_DQ_52
DDR3_M1_DQ_51
DDR3_M1_DQ_50
DDR3_M1_DQ_49
DDR3_M1_DQ_48

DDR3_M1_DQ_47
DDR3_M1_DQ_46
DDR3_M1_DQ_45
DDR3_M1_DQ_44
DDR3_M1_DQ_43
DDR3_M1_DQ_42
DDR3_M1_DQ_41
DDR3_M1_DQ_40

DDR3_M1_DQ_39
DDR3_M1_DQ_38
DDR3_M1_DQ_37
DDR3_M1_DQ_36
DDR3_M1_DQ_35
DDR3_M1_DQ_34
DDR3_M1_DQ_33
DDR3_M1_DQ_32

DDR3_M1_DQ_31
DDR3_M1_DQ_30
DDR3_M1_DQ_29
DDR3_M1_DQ_28
DDR3_M1_DQ_27
DDR3_M1_DQ_26
DDR3_M1_DQ_25
DDR3_M1_DQ_24

DDR3_M1_DQ_23
DDR3_M1_DQ_22
DDR3_M1_DQ_21
DDR3_M1_DQ_20
DDR3_M1_DQ_19
DDR3_M1_DQ_18
DDR3_M1_DQ_17
DDR3_M1_DQ_16

DDR3_M1_DQ_15
DDR3_M1_DQ_14
DDR3_M1_DQ_13
DDR3_M1_DQ_12
DDR3_M1_DQ_11
DDR3_M1_DQ_10

DDR3_M1_DQ_9
DDR3_M1_DQ_8

DDR3_M1_DQ_7
DDR3_M1_DQ_6
DDR3_M1_DQ_5
DDR3_M1_DQ_4
DDR3_M1_DQ_3
DDR3_M1_DQ_2
DDR3_M1_DQ_1
DDR3_M1_DQ_0

BG21
BH26
BJ25
BG26
BG22
BH20
BG25
BJ21

BD26
BF24
BA20
BD20
BD24
BA22
BC20
BF20

AV22
AV20
BD18
BF18
AU22
AU20
BA18
BC18

BH16
BH18
BJ13
BH12
BJ17
BG17
BG11
BG12

BB3
AW1
BC2
AW3
AV3
BC1
AV2
BD2

AV12
AP13
AV13
AT10
AP14
AT16
AP12
AT14

AV9
AY4
AT4
AP7
AV4
AY6
AT7
AP6

AP3
AR1
AK2
AL1
AR3
AT2
AL3
AK3

B B

A A

DDR_VDDQ

12

R1215
4K7R2F-GP

DDR3_VREF_DQ_R DDR3_VREF_CA_R

12

R1216
4K7R2F-GP

5

1A001 1A001

R1214
0R0402-PAD-2-GP

1 2

1 2

C573

SCD1U16V2KX-3DLGP

DDR3_VREF_DQ

12

C572
SCD1U16V2KX-3GP

(R_)

4

DDR_VDDQ

12

12

R545
4K7R2F-GP

R542
4K7R2F-GP

R539
0R0402-PAD-2-GP

1 2

C372

1 2

SCD1U16V2KX-3DLGP

DDR3_VREF_CA

3

12

C385
SCD1U16V2KX-3GP

(R_)

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

CPU_(DDR)

CPU_(DDR)

CPU_(DDR)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

5 105Tuesday, June 23, 2015

5 105Tuesday, June 23, 2015

5 105Tuesday, June 23, 2015

-1

-1

-1

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

Blanking

B B

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

A A

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

6 105Tuesday, June 23, 2015

6 105Tuesday, June 23, 2015

6 105Tuesday, June 23, 2015

1

-1A

-1A

-1A

5

www.teknisi-indonesia.com

D D

4

3

2

1

CPU1H

PWR_VCORE_VCC0

PWR_VCORE_VCC0

C C

PWR_VCORE_VGG

B B

1P15V_S5 VCCRAM0CPU0SI1_1P15

1P15V_S5 VCCFHVCPU0SI0_1P15

1P15V_S5

-1010

1 2

R1225
0R0805-PAD

1 2

R1224
0R0805-PAD

1 2

R1223
0R0805-PAD

VCCSRAMGEN_1P15

AF36

CORE_VCC1_S0IX3

AG33

CORE_VCC1_S0IX7

AG35

CORE_VCC1_S0IX8

AG36

CORE_VCC1_S0IX9

AG38

CORE_VCC1_S0IX10

AJ33

CORE_VCC1_S0IX14

AJ36

CORE_VCC1_S0IX15

AJ38

CORE_VCC1_S0IX16

AF30

CORE_VCC1_S0IX2

AG27

CORE_VCC1_S0IX4

AG29

CORE_VCC1_S0IX5

AG30

CORE_VCC1_S0IX6

AJ27

CORE_VCC1_S0IX11

AJ29

CORE_VCC1_S0IX12

AJ30

CORE_VCC1_S0IX13

AF29

CORE_VCC1_S0IX1

AD16

DDI_VGG_S0IX1

AD18

DDI_VGG_S0IX2

AD19

DDI_VGG_S0IX3

AF16

DDI_VGG_S0IX4

AF18

DDI_VGG_S0IX5

AF19

DDI_VGG_S0IX6

AF21

DDI_VGG_S0IX7

AF22

DDI_VGG_S0IX8

AJ19

DDI_VGG_S0IX15

AG16

DDI_VGG_S0IX9

AG18

DDI_VGG_S0IX10

AG19

DDI_VGG_S0IX11

AG21

DDI_VGG_S0IX12

AG22

DDI_VGG_S0IX13

AG24

DDI_VGG_S0IX14

AJ21

DDI_VGG_S0IX16

AJ22

DDI_VGG_S0IX17

AJ24

DDI_VGG_S0IX18

AK24

DDI_VGG_S0IX19

AK30

CORE_V1P15_S0IX1

AK35

CORE_V1P15_S0IX2

AK36

CORE_V1P15_S0IX3

AM29

CORE_V1P15_S0IX4

AK33

FUSE_V1P15_S0IX2

AJ35

FUSE_V1P15_S0IX1

AM19

DDI_V1P15_S0IX2

AK21

DDI_V1P15_S0IX1

BRASWELL-GP

(071.00BSW.0B0U)

BRASWELL

UNCORE_VNN_S410
UNCORE_VNN_S411
UNCORE_VNN_S412
UNCORE_VNN_S413
UNCORE_VNN_S414

UNCORE_V1P15_S0IX6
UNCORE_V1P15_S0IX1
UNCORE_V1P15_S0IX2
UNCORE_V1P15_S0IX3
UNCORE_V1P15_S0IX4
UNCORE_V1P15_S0IX5
UNCORE_V1P15_S0IX7
UNCORE_V1P15_S0IX8
UNCORE_V1P15_S0IX9

UNCORE_V1P15_S0IX10

iCLKDDRPCIeSATA

PCIE_V1P05A_G31#V22

USBSSIC_V1P05A_G3

USB

FUSE

8 OF 13

UNCORE_VNN_S41
UNCORE_VNN_S42
UNCORE_VNN_S43
UNCORE_VNN_S44
UNCORE_VNN_S45
UNCORE_VNN_S46
UNCORE_VNN_S47
UNCORE_VNN_S48
UNCORE_VNN_S49

RSVD#AA30

ICLK_GND_OFF2
ICLK_GND_OFF1

DDR_V1P05A_G31
DDR_V1P05A_G34
DDR_V1P05A_G32
DDR_V1P05A_G35
DDR_V1P05A_G36
DDR_V1P05A_G33

PCIE_V1P05A_G32

SATA_V1P05A_G32
SATA_V1P05A_G31

USB3_V1P05A_G32
USB3_V1P05A_G31

FUSE3_V1P05A_G5

FUSE_V1P05A_G3

AA18
AA19
AA21
AA22
AA24
AA25
AC18
AC19
AC21
AC22
AC24
AC25
AD25
AD27

AA30
V33
AA32
AA33
AA35
AA36
AC32
Y30
Y32
Y33
Y35

V19
V18

AM21
AM33
AM22
AN22
AN32
AM32

V22
V24

U24
U22

V27
U27
V29

N18
U19

1P05V_S5

-1010

1 2

R1220
0R0805-PAD

1 2

R1221
0R1206-PAD

1 2

R1222
0R0603-PAD

PWR_VCORE_VNN

1P05V_S5

1P05V_S5VCCDIGICKSI0_1P05

1P05V_S5VCCADDR_1P05

1P05V_S5VCCBMPD_MPHY_1P05

A A

Title

Title

Title

CPU (VCC_CORE)

CPU (VCC_CORE)

CPU (VCC_CORE)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

7 105Tuesday, June 23, 2015

7 105Tuesday, June 23, 2015

7 105Tuesday, June 23, 2015

1

-1

-1

-1

5

www.teknisi-indonesia.com

D D

4

3

2

1

8/12 Richard
Base on Brain's issue to swap port 0 2

12

R80127
100KR2J-1-GP

12

R80128
100KR2J-1-GP

(R_)

1D8V_S5

1A016

R1910
10KR2J-3-GP

(R_)

1 2

Q1246
2N7002A-7-GP

G

(84.2N702.J31)

S D

1D8V_S5

1A016

R498
10KR2J-3-GP

(R_)

1 2

CPU_HPD

Q6703
2N7002A-7-GP

G

(84.2N702.J31)

S D

HDMI_CTRL_CLK[56]
HDMI_CTRL_DATA[56]

1 2

R1228 402R2F-GP

1 2

R1227 402R2F-GP

HDMI

DDSP_C_HPD_CONN[56]

HPD
H: Detect

C C

B B

L: No detect

DP to RTD2168

09/17 change DP to VGA

HPD
H: Detect
L: No detect

DP1_HPD[55]

TP4166

TP4167
TP4168

HDMI_DATA_CPU_P0[56]
HDMI_DATA_CPU_N0[56]

HDMI_DATA_CPU_P1[56]
HDMI_DATA_CPU_N1[56]

HDMI_DATA_CPU_P2[56]
HDMI_DATA_CPU_N2[56]

HDMI_DATA_CPU_P3[56]
HDMI_DATA_CPU_N3[56]

HDMI CLK

HDMI_CPU_HPD

HDMI_CTRL_CLK
HDMI_CTRL_DATA

1

1
1

DP_CPU_TXP0[55]
DP_CPU_TXN0[55]

DP_CPU_TXP1[55]
DP_CPU_TXN1[55]

DP_CPU_AUXP[55]
DP_CPU_AUXN[55]

DDI0_RCOMP_P
DDI0_RCOMP_N

DDI1_RCOMP_P
DDI1_RCOMP_N

DDI0_HPD

DDI0_DDCCLK
DDI0_DDCDATA

CPU1C

D50

DDI0_TXP_0

C51

DDI0_TXN_0

H49

DDI0_TXP_1

H50

DDI0_TXN_1

F53

DDI0_TXP_2

F52

DDI0_TXN_2

G53

DDI0_TXP_3

G52

DDI0_TXN_3

H47

DDI0_AUXP

H46

DDI0_AUXN

W51

HV_DDI0_HPD

Y51

HV_DDI0_DDC_SCL

Y52

HV_DDI0_DDC_SDA

V52

PANEL0_BKLTEN

V51

PANEL0_BKLTCTL

W53

PANEL0_VDDEN

F38

DDI0_PLLOBS_P

G38

DDI0_PLLOBS_N

J51

DDI1_TXP_0

H51

DDI1_TXN_0

K51

DDI1_TXP_1

K52

DDI1_TXN_1

L53

DDI1_TXP_2

L51

DDI1_TXN_2

M52

DDI1_TXP_3

M51

DDI1_TXN_3

M42

DDI1_AUXP

K42

DDI1_AUXN

R51

HV_DDI1_HPD

P51

PANEL1_BKLTEN

P52

PANEL1_BKLTCTL

R53

PANEL1_VDDEN

F47

DDI1_PLLOBS_P

F49

DDI1_PLLOBS_N

F40

DDI2_TXP_0

G40

DDI2_TXN_0

J40

DDI2_TXP_1

K40

DDI2_TXN_1

F42

DDI2_TXP_2

G42

DDI2_TXN_2

D44

DDI2_TXP_3

F44

DDI2_TXN_3

D48

DDI2_AUXP

C49

DDI2_AUXN

U51

HV_DDI2_HPD

T51

HV_DDI2_DDC_SCL

T52

HV_DDI2_DDC_SDA

B53

RSVD#B53

A52

RSVD#A52

E52

RSVD#E52

D52

RSVD#D52

B50

RSVD#B50

B49

RSVD#B49

E53

RSVD#E53

C53

RSVD#C53

A51

RSVD#A51

A49

RSVD#A49

G44

RSVD#G44

BRASWELL-GP

(071.00BSW.0B0U)

BRASWELL

DDI0

DDI1

SDMMC1

DDI2

SDMMC2

NC's

SDMMC3

3 OF 13

RSVD#M44
RSVD#K44

RSVD#K48
RSVD#K47

MCSI_1_CLKP
MCSI_1_CLKN

MCSI_1_DP_0
MCSI_1_DN_0
MCSI_1_DP_1
MCSI_1_DN_1
MCSI_1_DP_2
MCSI_1_DN_2
MCSI_1_DP_3
MCSI_1_DN_3

MCSI and Camera interface

MCSI_2_CLKP
MCSI_2_CLKN

MCSI_2_DP_0
MCSI_2_DN_0
MCSI_2_DP_1
MCSI_2_DN_1

RSVD#T50
RSVD#T48

MCSI_COMP

GP_CAMERASB00
GP_CAMERASB01
GP_CAMERASB02
GP_CAMERASB03
GP_CAMERASB04
GP_CAMERASB05
GP_CAMERASB06
GP_CAMERASB07
GP_CAMERASB08

GP_CAMERASB09
GP_CAMERASB10
GP_CAMERASB11

SDMMC1_CLK

SDMMC1_CMD

SDMMC1_D0
SDMMC1_D1
SDMMC1_D2

SDMMC1_D3_CD#

MMC1_D4_SD_WE

MMC1_D5
MMC1_D6
MMC1_D7

MMC1_RCLK

SDMMC1_RCOMP

SDMMC2_CLK

SDMMC2_CMD

SDMMC2_D0
SDMMC2_D1
SDMMC2_D2

SDMMC2_D3_CD#

SDMMC3_CLK

SDMMC3_CMD

SDMMC3_CD#

SDMMC3_D0
SDMMC3_D1
SDMMC3_D2
SDMMC3_D3

SDMMC3_1P8_EN

SDMMC3_PWR_EN#

SDMMC3_RCOMP

M44
K44

K48
K47

T44
T45

Y47
Y48
V45
V47
V50
V48
T41
T42

P50
P48

P47
P45
M48
M47

T50
T48

P44

AB41
AB45
AB44
AC53
AB51
AB52
AA51
AB40
Y44

Y42
Y41
V40

M7

P6

M6
M4
P9
P7
T6
T7
T10
T12
T13
P13

K10
K9

M12
M10
K7
K6

F2
D2
K3

J1
J3
H3
G2

K2
L3
P12

MCSI_COMP

GP_CAMERASB09 [15]

GP_CAMERASB11 [15]

NGFF_DETECT_USB
NGFF_DETECT_PCIE
F_LED_DET_N

SDMMC1_RCOMP

SD_RCOMP

12

R80130
80D6R2F-L-GP

1 2

R1230 150R2F-1-GP

DBG8 [99]

DBG9 [99]
DBG10 [99]
DBG11 [99]
DBG12 [99]
DBG13 [99]
DBG14 [99]
DBG15 [99]
OBSFN_C0 [15,99]

R802 100R2F-L1-GP-U

11/05

NGFF_DETECT_USB
NGFF_DETECT_PCIE
F_LED_DET_N

1 2

R:Check PIN

1 2

R80245 10KR2J-3-GP

1 2

R80246 10KR2J-3-GP

1 2

R530 10KR2J-3-GP

NGFF_DETECT_USB [61]
NGFF_DETECT_PCIE [61]
F_LED_DET_N [64]

XDP

SB002

SC001

1D8V_S5

SC002

Change NET name from
PWRCN_DET_N_C to F_LED_DET_N

A A

<Variant Name>

<Variant Name>

5

4

<Variant Name>

Title

Title

Title

CPU_(DDI/EDP)

CPU_(DDI/EDP)

CPU_(DDI/EDP)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

8 105Tuesday, June 23, 2015

8 105Tuesday, June 23, 2015

8 105Tuesday, June 23, 2015

-1

-1

-1

5

www.teknisi-indonesia.com

Power-VSS

BRASWELL

5

10 OF 13

VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS30
VSS23
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10

VSS9
VSS8
VSS7
VSS6
VSS5
VSS4
VSS3
VSS2
VSS1

AF38
AF32
AF25
AF10
AE9
AE8
AE6
AE53
AE50
AE48
AE46
AE45
AE43
AE42
AE40
AE14
AE12
AE11
AE1
AD44
AD36
AC29
AD32
AD30
AD21
AC38
AC35
AC33
AC16
AB6
AB50
AB47
AB42
AB4
AB14
AB13
AB12
AB10
AA53
AA38
AA27
AA16
A47
A43
A39
A31
A23
A19
A15
A11

CPU1J

AN3

VSS98

AN29

VSS97

AN25

VSS96

D D

C C

B B

A A

AN24

VSS95

AN16

VSS94

AN14

VSS93

AN12

VSS92

AN11

VSS91

AN1

VSS90

AM50

VSS89

AM42

VSS88

AM4

VSS87

AM38

VSS86

AM35

VSS85

AH44

VSS60

AM30

VSS84

AM27

VSS83

U25

VSS100

P10

VSS99

AM16

VSS81

AD4

VSS31

AK7

VSS80

AK50

VSS79

AK47

VSS78

AK45

VSS77

AK44

VSS76

AK40

VSS75

AK4

VSS74

AK38

VSS73

AK32

VSS72

AK27

VSS71

AK25

VSS70

AM24

VSS82

AK16

VSS69

AJ53

VSS68

AJ51

VSS67

AJ3

VSS66

AJ25

VSS65

AJ16

VSS64

AJ1

VSS63

AH9

VSS62

AH47

VSS61

AH42

VSS59

AH41

VSS58

AH14

VSS57

AH13

VSS56

AH12

VSS55

AH10

VSS54

AG25

VSS53

AF47

VSS52

BRASWELL-GP

(071.00BSW.0B0U)

CPU1K

AN21

VSS5

BG30

VSS101

BG27

VSS100

BG24

VSS99

BG20

VSS98

BG19

VSS97

BG18

VSS96

BG16

VSS95

BG14

VSS94

BF42

VSS93

BF32

VSS92

BF28

VSS91

BF27

VSS90

BF26

VSS89

BF22

VSS88

BF12

VSS87

BE35

VSS86

BE19

VSS85

C20

VSS103

BD53

VSS84

BG7

VSS102

BD35

VSS83

BD27

VSS82

BD19

VSS81

BD1

VSS80

BC44

VSS79

BC40

VSS78

BC38

VSS77

BC28

VSS76

BC26

VSS75

BC16

VSS74

BC14

VSS73

BC10

VSS72

BB35

VSS71

BB27

VSS70

BB19

VSS69

BA35

VSS68

BA30

VSS67

BA27

VSS66

BA24

VSS65

BA19

VSS64

B36

VSS63

B28

VSS62

AY7

VSS60

AY51

VSS59

AY47

VSS58

AY34

VSS56

AY32

VSS55

AY30

VSS54

AY3

VSS53

AN30

VSS6

AY45

VSS57

BRASWELL-GP

(071.00BSW.0B0U)

Power-VSS

BRASWELL

4

11 OF 13

VSS61
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45

VSS44
VSS43
VSS42
VSS41
VSS40
VSS39
VSS38

VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10

4

VSS4
VSS3
VSS2

VSS1

VSS9
VSS8
VSS7

AY9
AY28
AY26
AY24
AY22
AY20
AW35
AW27
AW19
AM13
AK29
AK22
AV40
AV35
AV30
AV27
AV24
AV19
AV14
AJ18
AU53
AU51
AU3
AU1
AT9
AT51
AT45
AT36
AT35
AT3
AT27
AT19
AT18
AP9
AP50
AP45
AP4
AN9
AN8
AN6
AN53
AN51
AN5
AN49
AN48
AN46
AN45
AN43
AN42
AN40
AN38

CPU1L

AN33

P32
P27
P22
P19

AF24

N53
N51
N32
N24
N22

M9

K45
M40
M35
M27

AW13

M19
M14

L35

L27

L19

L1
K50
T47

K4
K36
K34
K32
K30
K24
K22
K16
K14
K12

J53

M45

J38
J35
J30
J27
J22
J19
J18

H8
E46
H35
H27
H19

M50

V25

BRASWELL-GP

(071.00BSW.0B0U)

VSS2
VSS99
VSS98
VSS97
VSS96
VSS1
VSS95
VSS94
VSS93
VSS92
VSS91
VSS90

VSS77
VSS87
VSS86
VSS85
VSS3
VSS84
VSS83
VSS82
VSS81
VSS80
VSS79
VSS78
VSS100
VSS76
VSS75
VSS74
VSS73
VSS72
VSS71
VSS70
VSS69
VSS68
VSS67
VSS66
VSS88
VSS64
VSS63
VSS62
VSS61
VSS60
VSS59
VSS58
VSS57
VSS40
VSS56
VSS55
VSS54
VSS89
VSS101

Power-VSS

BRASWELL

3

12 OF 13

VSS102

VSS53
VSS52
VSS51
VSS50
VSS49
VSS48
VSS47
VSS46
VSS45
VSS44
VSS43
VSS42
VSS41
VSS39
VSS38
VSS37
VSS36
VSS35
VSS34
VSS33
VSS32
VSS31
VSS30
VSS65
VSS29
VSS28
VSS27
VSS26
VSS25
VSS24
VSS23

VSS4
VSS22
VSS21
VSS20
VSS19
VSS18
VSS17
VSS16
VSS15
VSS14
VSS13
VSS12
VSS11
VSS10

VSS9

VSS8

VSS7

VSS6

VSS5

3

Y24
G30
G28
G26
G22
G14
G12
F5
F35
F32
F27
F24
F19
E51
E35
E19
D42
D40
D38
D32
D27
D24
D16
D10
J42
C47
C39
C36
C30
C3
C28
C22
AW41
BJ7
BJ47
BJ43
BJ39
BJ35
BJ31
BJ27
BJ23
BJ19
BJ15
BJ11
BG5
BG49
BG40
BG38
BG36
BG35
BG34

11/11
Pin B52 can not break out

check with Intel

1 2

(R_)

R1684
0R2J-2-GP

2014.03.12 CRB NC
check with Intel

1 2

(R_)

R1685
0R2J-2-GP

SC029

Change to NC

CPU1M

F1

VSS18

C1

VSS17

BH53

VSS16

BH52

VSS15

BH2

VSS14

BH1

VSS13

BG53

VSS12

BG1

VSS10

B52

VSS5

B2

VSS4

A6

VSS2

A5

VSS1

M24

VSSA

A7

VSS3

BF50

VSS9

BF4

VSS8

BB50

VSS7

BB4

VSS6

BG47

VSS11

Y9

VSS70

Y50

VSS69

Y45

VSS68

Y40

VSS67

Y4

VSS66

Y38

VSS65

Y29

VSS64

Y22

VSS63

Y21

VSS62

Y19

VSS61

Y16

VSS60

Y14

VSS59

Y10

VSS58

P4

VSS22

L41

VSS19

P36

VSS21

BRASWELL-GP

(071.00BSW.0B0U)

2

2

1

13 OF 13

Power-VSS

BRASWELL

W1

VSS57

V44

VSS56

V42

VSS55

V41

VSS54

V38

VSS53

V32

VSS52

V21

VSS51

V16

VSS50

U9

VSS49

U8

VSS48

U6

VSS47

U53

VSS46

U5

VSS45

U49

VSS44

U48

VSS43

U46

VSS42

U45

VSS41

U43

VSS40

U42

VSS39

U40

VSS38

U38

VSS37

U33

VSS35

U32

VSS34

U30

VSS33

U29

VSS32

U21

VSS31

U18

VSS30

U36

VSS36

U14

VSS29

U12

VSS28

U11

VSS27

T9

VSS26

P42

VSS23

T14

VSS25

R1

VSS24

P35

VSS20

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Title

Title

Title

CPU_(VSS)

CPU_(VSS)

CPU_(VSS)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

Hsichih, Taipei

1

9 105Tuesday, June 23, 2015

9 105Tuesday, June 23, 2015

9 105Tuesday, June 23, 2015

-1

-1

-1

5

www.teknisi-indonesia.com

0812 Jeffrey add 22u 0603 *3 0812 Jeffrey add 22u 0603 *3(reserve)

D D

0808 Jeffrey delete 0805

VCORE0

PWR_VCORE_VCC0

12

C305

SC22U6D3V3MX-1-DL-GP

CRB 3*4.7U 0402, 2*22U 0603
Our 3*4.7U 0402

VCCRAM0CPU0SI1_1P15

PLACE ALL THE CAPS
UNDER THE PKG SHADOW

AF36, AG33, AG35, AG36, AG38, AJ33, AJ36, AJ38

12

12

12

C304

C1620

SC22U6D3V3MX-1-DL-GP

SC4D7U6D3V2MX-1-GP

C1621

12

12

C6726

C1622

SC4D7U6D3V2MX-1-GP

SC4D7U6D3V2MX-1-GP

1*22U 0805(remove)5*22U 0603

12

C6727

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

0811 change power rail PWR_VCORE_VCC1 to VCC0
0808 Jeffrey delete 0805

12

C6728

SC22U6D3V3MX-1-DL-GP

VCCSRAMGEN_1P15

4

VCORE0

PWR_VCORE_VCC0

AF30, AG27, AG29, AG30, AJ27, AJ29, AJ30, AF29 AA18, AA19, AA21, AA22, AA24, AA25, AC18, AC19, AC21, AC22, AC24, AC25, AD25, AD27

12

C582

SC22U6D3V3MX-1-DL-GP

CRB 3*4.7U 0402, 2*22U 0603
Our 3*4.7U 0402,

PLACE ALL THE CAPS
UNDER THE PKG SHADOW

12

12

C583

C1623

SC22U6D3V3MX-1-DL-GP

12

12

C1625

C1624

SC4D7U6D3V2MX-1-GP

2*22U 0603

SC4D7U6D3V2MX-1-GP

SC4D7U6D3V2MX-1-GP

(R_)

12

C6729

3*22U 0603(reserve)

1*22U 0805(remove)

(R_)

(R_)

12

12

C6731

C6730

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

3

0808 Jeffrey delete 0805

PWR_VCORE_VNN

12

12

C598

C597

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

1P05V_S5

V33, AA32, AA33, AA35, AA36, AC32, Y30, Y32, Y33, Y35

12

12

C606

C605

12

12

C600

C599

SC1U10V2KX-1DLGP

12

C607

2

12

12

C6716

C6717

SC1U10V2KX-1DLGP

SC22U6D3V3MX-1-DL-GP

12

12

C608

C609

12

C6718

CRB 4*1U 0402, 3*22U 0603
Our 4*1U 0402, 3*22U 0603

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

0808 Jeffrey modify CAP 7pcs to 5pcs

CRB 5*1U 0402
Our 5*1U 0402

1

3*22U 0805(remove)

12

12

C626

VNN_GFX

12

C12377

SC4D7U6D3V2MX-1-GP

C625

SC1U10V2KX-1DLGP

PWR_VCORE_VGG

12

C12378

SC22U6D3V3MX-1-DL-GP

SC1U10V2KX-1DLGP

CRB 6*1U 0402
Our 6*1U 0402

12

12

C590

SC22U6D3V3MX-1-DL-GP

C C

B B

12

12

C631

C627

SC1U10V2KX-1DLGP

12

C592

C591

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

12

C629

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

12

C630

SC1U10V2KX-1DLGP

12

12

C632

C633

SC1U10V2KX-1DLGP

12

SC1U10V2KX-1DLGP

CRB 3*1U 0402

CRB 5*10U 0402, 2*270U POSCAP
Our 5*10U 0402

4*22U 0805(remove)

C634

SC1U10V2KX-1DLGP

0808 Jeffrey modify CAP 2pcs to 1pcs

VCCBMPD_MPHY_1P05 1P05V_S5 1P05V_S5

SC1U10V2KX-1DLGP

VCCDIGICKSI0_1P05 VCCADDR_1P05 1P05V_S5

V18, V19

12

C612

SC1U10V2KX-1DLGP

CRB 1*1U 0402

12

C614

SC1U10V2KX-1DLGP

0808 Jeffrey add 22U 0603

CRB 1*1U 0402, 2*22U 0603
Our 1*1U 0402, 2*22U 0603

SC1U10V2KX-1DLGP

AM21, AM33, AM22, AN22, AN32, AM32 N18

12

12

C6719

C6720

SC22U6D3V3MX-1-DL-GP

SC22U6D3V3MX-1-DL-GP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

V22, V24, U24, U22, V27, U27 V29 U19

12

12

C619

C618

SC1U10V2KX-1DLGP

12

C620

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

12

C621

SC1U10V2KX-1DLGP

CRB 2*1U 0402CRB 3*1U 0402

12

C622

SC1U10V2KX-1DLGP

12

12

C624

C623

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

CRB 2*1U 0402

12

C617

SC1U10V2KX-1DLGP

CRB 1*1U 0402

A A

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

10 105Tuesday, June 23, 2015

10 105Tuesday, June 23, 2015

1

10 105Tuesday, June 23, 2015

5

4

Title

Title

Title

CPU (Power CAP1)

CPU (Power CAP1)

CPU (Power CAP1)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

-1

-1

-1

5

www.teknisi-indonesia.com

D D

4

0808 Jeffrey delete 0805 0808 Jeffrey delete 0805

VCCSFRPLLDDR_1P24_1P35 VCCCLKDDR_1P24_1P35

3

2

1

Close to CPU Close to CPU

12

C1633

12

C6721

12

C1634

12

C6722

CRB 1*1U 0402, 1*22U 0603

SC1U10V2KX-1DLGP

SC22U6D3V3MX-1-DL-GP

SC1U10V2KX-1DLGP

SC22U6D3V3MX-1-DL-GP

CRB 1*1U 0402, 1*22U 0603,

0808 Jeffrey modify cap
2pcs to 1 pcs

DDR_VDDQ 1D24V_S5 1D24V_S5 1D24V_S5 1D24V_S5 1D24V_S5 1D24V_S5 1D24V_S5

C C

12

12

12

12

C642

C641

SC22U6D3V5MX-2DLGP

SC22U6D3V5MX-2DLGP

C643

C644

SC22U6D3V5MX-2DLGP

SC22U6D3V5MX-2DLGP

V36, Y36

12

C1635

CRB 4*22U 0603

Place close to CPU

SC1U10V2KX-1DLGP

T40, P40

12

C1636

SC1U10V2KX-1DLGP

CRB 1*1U 0402

M41 U35, V35 Y27, Y25 P38, V30, AC30 AF35, AD35, AD38, AC36

12

C1638

SC1U10V2KX-1DLGP

CRB 1*1U 0402

12

12

C1639

SC1U10V2KX-1DLGP

CRB 2*1U 0402

0808 Jeffrey delete 0402 1cap

1D24V_S5 1D24V_S5 VCCPADCF2SI0_E_1P80 VCCPADCF1SI0_1P80 VCCCFIOAZA_1P80 VCCPADCF1SI0_1P8_3P3 VCCPADCF3SI0_1P8_3P3 VCCUSB2_1P8 VCCUSB2_3P3 V1P8_FUSE

H44

P41

12

C1646

B B

12

C1647

12

C1648

12

C1649

12

C1650

12

C1651

12

C1652

0808 Jeffrey delete 0603 cap size 0808 Jeffrey delete 0603 cap size

C1640

12

C1641

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

12

C1643

12

C1644

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

12

C1645

SC1U10V2KX-1DLGP

CRB 1*1U 0402,CRB 2*1U 0402CRB 1*1U 0402, 1*1U 0603CRB 1*1U 0402

12

C1656

12

C1655

12

C1654

12

C1653

12

C1657

12

C1658

12

C1659

12

C1660

SC1U10V2KX-1DLGP

1P05V_S5 VCCRTC_3P3 VCCRTCSUS_3P3

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

H10, G10

12

C1661

A A

SC1U10V2KX-1DLGP

12

C1663

CRB 1*1U 0402 CRB 1*1U 0402

5

12

C1662

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

CRB 1*1U 0402

4

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

SC1U10V2KX-1DLGP

CRB 2*1U 0402CRB 1*1U 0402CRB 1*1U 0402CRB 3*1U 0402 CRB 2*1U 0402

Title

Title

Title

CPU (Power CAP2)

CPU (Power CAP2)

CPU (Power CAP2)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

SC1U10V2KX-1DLGP

CRB 1*1U 0402CRB 1*1U 0402CRB 2*1U 0402CRB 1*1U 0402CRB 1*1U 0402

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

11 105Tuesday, June 23, 2015

11 105Tuesday, June 23, 2015

11 105Tuesday, June 23, 2015

-1

-1

-1

5

www.teknisi-indonesia.com

4

3

2

1

M_MAA_A0
M_MAA_A1
M_MAA_A2
M_MAA_A3
M_MAA_A4
M_MAA_A5
M_MAA_A6
M_MAA_A7
M_MAA_A8
M_MAA_A9
M_MAA_A10

D D

DDR DATA

DDR CMD/ADD

DDR CTRL

C C

DDR CLOCK

M_DATA_A[0..63][5]

M_DQS_A_DP[0..7][5]
M_DQS_A_DN[0..7][5]

M_MA_DM[7..0][5]

M_MAA_A[0..15][5]

M_WE_A_N[5]
M_CAS_A_N[5]
M_RAS_A_N[5]

M_SBS_A0[5]
M_SBS_A1[5]
M_SBS_A2[5]

M_SCS_A_N0[5]
M_SCS_A_N1[5]
M_SCKE_A0[5]
M_SCKE_A1[5]
M_ODT_A0[5]
M_ODT_A1[5]

CK_M_DDR0_A_DP[5]
CK_M_DDR0_A_DN[5]
CK_M_DDR1_A_DP[5]
CK_M_DDR1_A_DN[5]

0826 Richard
Refer to CRB to swap data for routing.

DDR OTHERS

DDR3_DRAMRST_N[5]

SMB0_CLK_MAIN[17,37,55,77]
SMB0_DATA_MAIN[17,37,55,77]

SIO_MEM_EVENT_L[24]

B B

VREF_CA_DIMM1

DDR3_DRAMRST_N

A A

5

VREF_DQ_DIMM1

1 2

R1672
0R0402-PAD-2-GP

M_MAA_A11
M_MAA_A12
M_MAA_A13
M_MAA_A14
M_MAA_A15
M_SBS_A2

M_SBS_A0
M_SBS_A1

M_DATA_A1
M_DATA_A4

M_DATA_A2
M_DATA_A3

M_DATA_A0

M_DATA_A5
M_DATA_A6
M_DATA_A7

M_DATA_A13

M_DATA_A9
M_DATA_A10

M_DATA_A14
M_DATA_A8
M_DATA_A12
M_DATA_A11

M_DATA_A15

M_DATA_A22

M_DATA_A17
M_DATA_A18

M_DATA_A23
M_DATA_A19
M_DATA_A16
M_DATA_A20
M_DATA_A21
M_DATA_A28
M_DATA_A30
M_DATA_A24
M_DATA_A26
M_DATA_A27
M_DATA_A25
M_DATA_A31
M_DATA_A29

M_DATA_A32

M_DATA_A37

M_DATA_A34

M_DATA_A38

M_DATA_A36

M_DATA_A33
M_DATA_A35

M_DATA_A39
M_DATA_A40
M_DATA_A41
M_DATA_A42

M_DATA_A46

M_DATA_A44
M_DATA_A45

M_DATA_A43

M_DATA_A47
M_DATA_A48

M_DATA_A52
M_DATA_A55

M_DATA_A51

M_DATA_A53
M_DATA_A49

M_DATA_A54

M_DATA_A50

M_DATA_A56

M_DATA_A59
M_DATA_A62
M_DATA_A60
M_DATA_A58
M_DATA_A63
M_DATA_A61
M_DATA_A57

M_DQS_A_DN0
M_DQS_A_DN1
M_DQS_A_DN2
M_DQS_A_DN3
M_DQS_A_DN4
M_DQS_A_DN5
M_DQS_A_DN6
M_DQS_A_DN7

M_DQS_A_DP0
M_DQS_A_DP1
M_DQS_A_DP2
M_DQS_A_DP3
M_DQS_A_DP4
M_DQS_A_DP5
M_DQS_A_DP6
M_DQS_A_DP7

M_ODT_A0
M_ODT_A1

DDR3_DRAMRST_N_A_1

MEM_VTT

12

(R_)

C47

SCD1U10V2KX-5GP

SB 0730 Eric modify

4

DIMM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P-252-GP-U

62.10017.I31

1A014

2015/4/13 follow EMN to modify DIMM1 symbol

RAS#

CAS#

CS0#
CS1#

CKE0
CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#1
NC#2

NC#/TEST

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8

VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

NP1
NP2

WE#

CK0

CK1

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

SDA
SCL

SA0
SA1

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

NP1
NP2

110
113
115

114
121

73
74

101
103

102
104

11
28
46
63
136
153
170
187

200
202

198

199

197
201

77
122
125

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

2
3
8
9
13
14
19
20
25
26
31
32
37
38
43
44
48
49
54
55
60
61
65
66
71
72
127
128
133
134
138
139
144
145
150
151
155
156
161
162
167
168
172
173
178
179
184
185
189
190
195
196
205
206

M_RAS_A_N
M_WE_A_N
M_CAS_A_N

M_SCS_A_N0
M_SCS_A_N1

M_SCKE_A0
M_SCKE_A1

CK_M_DDR0_A_DP
CK_M_DDR0_A_DN

CK_M_DDR1_A_DP
CK_M_DDR1_A_DN

M_MA_DM0
M_MA_DM1
M_MA_DM2
M_MA_DM3
M_MA_DM4
M_MA_DM5
M_MA_DM6
M_MA_DM7

SMB0_DATA_MAIN
SMB0_CLK_MAIN

MEM_MA_EVENT_L

DIMM1_SA0
DIMM1_SA1

VCC3

DDR_VDDQ

DDR_VDDQ

SC10U6D3V3MX-DL-GP

SCD1U16V2KX-3DLGP

SCD1U16V2KX-3DLGP

Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30

If SA0 DIM0 = 0, SA1_DIM0 = 1
SO-DIMMA SPD Address is 0xA4
SO-DIMMA TS Address is 0x34

3

C68

1 2

DDR_VDDQ

C62

1 2

SCD1U16V2KX-3DLGP

VCC3

C398

1 2

DIMM1_SA0

DIMM1_SA1

SIO_MEM_EVENT_L SIO_MEM_EVENT_L_C

C77

SC10U6D3V3MX-DL-GP

1 2

C66

SCD1U16V2KX-3DLGP

1 2

12

C399
SCD1U16V2KX-3GP

(R_)

1 2

R579 10KR2J-3-GP

1 2

R581 10KR2J-3-GP

DDR_VDDQ

1 2

(R_)

R565
0R2J-2-GP

12

C81

SCD1U16V2KX-3DLGP

12

SC2D2U10V3KX-1DLGP-U

12

C12413

SC045

C82
SCD1U16V2KX-3DLGP

1 2

close to DIMM slot pin 126 close to DIMM slot pin 1

1 2

R572
1KR2J-1-GP

VREF_DQ_DIMM1VREF_CA_DIMM1

C302

SCD1U16V2KX-3DLGP

1A001 1A0011A001

R1671

1 2

0R0402-PAD-2-GP

C78

1 2

SCD1U16V2KX-3DLGP

VCC3

R576
10KR2J-3-GP

1 2

R117
4K7R2F-GP

R122
4K7R2F-GP

C64

SC10U6D3V3MX-DL-GP

1 2

MEM_MA_EVENT_L

C71

SC10U6D3V3MX-DL-GP

1 2

(R_)

C67

SC10U6D3V3MX-DL-GP

1 2

C70

1 2

SCD1U16V2KX-3DLGP

SIO_MEM_EVENT_L_B

(R_)

CBE

Q51

MMBT3904-4-GP

DDR_VDDQ DDR_VDDQ

12

VREF_CA_0VREF_CA_DIMM1 VREF_DQ_0VREF_DQ_DIMM1

12

2

C61

1 2

For Intel Recommend Close to DIMM1 (Bay Trail)For Intel Recommend Close to DIMM1 (Bay Trail)

C60

SC10U6D3V3MX-DL-GP

1 2

1 2

SCD1U16V2KX-3DLGP

MEM_VTT

12

C407

C63

SC10U6D3V3MX-DL-GP

1 2

C79

SC1U10V2KX-1DLGP

C303
SCD1U16V2KX-3DLGP

1 2

C76

SC10U6D3V3MX-DL-GP

1 2

C69

1 2

SCD1U16V2KX-3DLGP

Place these caps
close to VTT1 and
VTT2.

12

12

12

C408

SC1U10V2KX-1DLGP

1 2

0R0402-PAD-2-GP

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

C404

SC1U10V2KX-1DLGP

R1670

DDR3_SODIMM1

DDR3_SODIMM1

DDR3_SODIMM1

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

C403

C65

1 2

SCD1U16V2KX-3DLGP

C406

SC10U6D3V3MX-DL-GP

1 2

SC1U10V2KX-1DLGP

12

R484
4K7R2F-GP

12

R483
4K7R2F-GP

1

C405

SC10U6D3V3MX-DL-GP

1 2

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

12 105Tuesday, June 23, 2015

12 105Tuesday, June 23, 2015

12 105Tuesday, June 23, 2015

-1

-1

-1

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

Blanking

B B

Wistron Incorporated

Wistron Incorporated

A A

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

13 105Tuesday, June 23, 2015

13 105Tuesday, June 23, 2015

13 105Tuesday, June 23, 2015

1

-1A4

-1A4

-1A4

5

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D D

C C

4

3

2

1

Blanking

B B

Wistron Incorporated

Wistron Incorporated

A A

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

14 105Tuesday, June 23, 2015

14 105Tuesday, June 23, 2015

14 105Tuesday, June 23, 2015

1

-1A4

-1A4

-1A4

5

www.teknisi-indonesia.com

SSID = STRAP

STRAP RESISTORS SHOULD BE PLACED CLOSE TO SOC
SHOULD BE PLACED OUTSIDE KOZ AREA

DDI0_Detected DDI1_DetectedDescription

GPIO

1D8V_S5

12

R1562

D D

Schematic

High

Low

C C

4K7R2F-GP

GPIO_SUS0

12

R1801
10KR2F-2-GP

(R_)

DDI0 Detect

Disable

GPIO_SUS0 [17]

All the straps are sampled on the rising edge of the
PMC_RSMRST_N signal (check list)

A16 Swap
Override

GPIO_SUS1 GPIO_SUS2

12

R1570
4K7R2F-GP

12

(R_)

R1802
10KR2F-2-GP

6/9 Allen modify precision

DDI1 Detect

Disable

12

R1804
10KR2F-2-GP

12

(R_)

R1803
10KR2F-2-GP

Normal Operation

Change Boot
Loader address
(A16 Override)

4

DSI Display Detected Boot BIOS Strap BBS

GPIO_SUS3 GPIO_SUS4GPIO_SUS0

6/9 Allen modify precision 6/9 Allen modify precision

12

12

(R_)

R1805
10KR2F-2-GP

(R_)

R1806
10KR2F-2-GP

DSI Detect

Disable

Weak internal pull-down

P23

3

Flash Descriptor
Security Override

DFX Boot Halt Strap
& VISA Early POSM Debug Enable

GPIO_SUS5 GPIO_SUS6 GPIO_SUS7

1D8V_S5 1D8V_S51D8V_S51D8V_S5 1D8V_S5 1D8V_S51D8V_S5

12

R1561
100KR2F-L1-GP

INT_TP# [17] ME_FWP_SOC [17]GPIO_SUS3 [17]GPIO_SUS1 [17] GPIO_SUS2 [17] SOC_RUNTIME_SCI# [17,99] SOC_EXTSMI_N [17]

12

(R_)

R1807
10KR2F-2-GP

6/9 Allen modify precision

Boot from SPI

Boot from LPC

12

1 2

LPE_I2S2_DATAOUT_1

Weak internal pull-up

Normal Operation

1 2

SFD_GPIO[24]



(R_)

R1560
100KR2F-L1-GP

R544
4K7R2F-GP

Override

R80267
0R2J-2-GP

G

SC030

Change from 1K to 4K7

TXE1

1
2

JOWLE-CON2-5-GP

(D_21.62874.102)

LPE_I2S2_DATAOUT_1

Q1205
2N7002H-GP

(R_84.2N702.J31)

S D

1A015

Halt boot enable

12

12

Normal

6/9 Allen modify precision

R1809
10KR2F-2-GP

(R_)

R1808
10KR2F-2-GP

DFX Sus Debug Strap

SC029

Change to stuff

12

R1810
10KR2F-2-GP

12

(R_)

R1811
10KR2F-2-GP

Weak internal pull-up

Normal

Sus Debug enable

2

ICLK, USB2, DDI SFR
Supply Select

SEC_GPIO_SUS8

6/9 Allen modify precision

1D8V_S5 1D8V_S5 1D8V_S5 1D8V_S5 1D8V_S5

12

(R_)

R1812
10KR2F-2-GP

12

R1565
4K7R2F-GP

1.35V

1.25V

ICLK SFR
Bypass

POSM Select

ICLK Xtal OSC
Bypass

SEC_GPIO_SUS9 SEC_GPIO_SU10 GP_CAMERASB09GP_CAMERASB08 GP_CAMERASB11

6/9 Allen modify precision

12

(R_)

R1813

SEC_GPIO_SUS8 [17] SEC_GPIO_SUS9 [17] SEC_GPIO_SUS10 [17] OBSFN_C0 [8,99] GP_CAMERASB09 [8]

10KR2F-2-GP

12

(R_)

R1814
10KR2F-2-GP

Weak internal pull-up

Bypass
with 1.05V

No bypass

6/9 Allen modify precision

12

(R_)

R1815
10KR2F-2-GP

12

(R_)

R1816
10KR2F-2-GP

PMC

Fuse controller

Weak internal pull-down

6/9 Allen modify precision 6/9 Allen modify precision

12

(R_)

R1817
10KR2F-2-GP

12

R1559
100KR2F-L1-GP

Bypass

No bypass

1

CCU SUS RO
Bypass

12

(R_)

R1819
10KR2F-2-GP

12

R1558
100KR2F-L1-GP

Bypass

No bypass

RTC OSC
bypass

6/9 Allen modify precision

1D8V_S5

12

(R_)

R1818
10KR2F-2-GP

GP_CAMERASB11 [8]

12

R1557
100KR2F-L1-GP

Bypass

No bypass

B B

A A

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

15 105Tuesday, June 23, 2015

15 105Tuesday, June 23, 2015

15 105Tuesday, June 23, 2015

5

4

Title

Title

Title

CPU_(STRAP)

CPU_(STRAP)

CPU_(STRAP)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A1

A1

A1

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

1

-1

-1

-1

5

www.teknisi-indonesia.com

Side IO

D D

C C

USB30_TX_CPU_P0[35]
USB30_TX_CPU_N0[35]
USB30_RX_CPU_P0[35]
USB30_RX_CPU_N0[35]

USB30_TX_CPU_P1[35]
USB30_TX_CPU_N1[35]
USB30_RX_CPU_P1[35]
USB30_RX_CPU_N1[35]

R1236
402R2F-GP

1 2

USB3_OBSP
USB3_OBSN

Change from 1K to 10K

IO_SMI_N[24]

SC035

4

CPU1F

B32

USB3_TXP0

C32

USB3_TXN0

F28

USB3_RXP0

D28

USB3_RXN0

A33

USB3_TXP1

C33

USB3_TXN1

F30

USB3_RXP1

D30

USB3_RXN1

C34

USB3_TXP2

B34

USB3_TXN2

G32

USB3_RXP2

J32

USB3_RXN2

C35

USB3_TXP3

A35

USB3_TXN3

G34

USB3_RXP3

J34

USB3_RXN3

D34

USB3_OBSP

F34

USB3_OBSN

C37

RSVD#C37

A37

RSVD#A37

F36

RSVD#F36

D36

RSVD#D36

M34

RSVD#M34

M32

RSVD#M32

C38

RSVD#C38

B38

RSVD#B38

G36

RSVD#G36

J36

RSVD#J36

N34

RSVD#N34

P34

RSVD#P34

BRASWELL-GP

(071.00BSW.0B0U)

12

R80146
10KR2F-2-GP

BRASWELL

USB3.0

USB_HSIC_0_STROBE

USB_HSIC_0_DATA

USB_HSIC_1_STROBE

USB_HSIC_1_DATA

HSIC

USB_HSIC_RCOMP

RESERVED

UART

1.8V

Q9637
DMN5L06K-7-GP

6 OF 13

USB_OTG_ID

USB_DP0

USB_DN0

USB_DP1

USB_DN1

USB_DP2

USB_DN2

USB_DP3

USB_DN3

USB_DP4

USB_DN4

USB2.0

USB_OC1#
USB_OC0#

RSVD#B46

USB_VBUSSNS

USB_RCOMP

UART1_TXD

UART1_RXD
UART1_CTS#
UART1_RTS#

UART2_TXD

UART2_RXD
UART2_CTS#
UART2_RTS#

1D8V_S5 1D8V_S5SB3V

G

D S

Change to NC

SC032

0R2J-2-GP

CPU_B46_R
USB_VBUSSNS
USB_RCOMP

TP_M36
TP_N36

TP_K38
TP_M38

UART1_TX
UART1_RX
TP_AD13
TP_AD14

IO_SMI_N_C

R1791

1 2

(R_)

1

TP56 TPAD30

1

TP55 TPAD30

1

TP53 TPAD30

1

TP54 TPAD30

1

TP49 TPAD30

1

TP50 TPAD30

USB_HSIC_RCOMP

B48
C42
B42

C43
B44

C41
A41

C45
A45

B40
C40

P16
P14

B46
B47
A48

M36
N36

K38
M38
N38

AD10
AD12
AD13
AD14

Y6
Y7
V9
V10

USB_OTG_ID

For Resume SMBus

12

R80145
2KR2F-3-GP

3

8/12 Richard
SWap USB for Length

F_USB0P [35]
F_USB0N [35]

Front USB(with 3.0)

F_USB1P [35]
F_USB1N [35]

USB_DP2 [32]
USB_DN2 [32]

USB_DP3 [32]
USB_DN3 [32]

USB_CPU_PP4 [37]
USB_CPU_PN4 [37]

USBOC02 [32]
USBOC01 [35]

1 2

R1607 49D9R2F-GP(R_)

1 2

R1603 113R2F-GP

05/27
EDS 0.91 from 49.9 modify to 45.3 5%, but PGD is 50.

R1779 45D3R2F-L-GP

PW_CLEAR

SC034

Change from 1K to 2K2

IO_SMI_N_CIO_SMI_N

Rear USB(with RJ45)

USB2.0 HUB

OC for Rear USB(with RJ45)
OC for Front USB(with 3.0)

1 2

UART1_TX
UART1_RX

SC033

Change to NC

SB5V

11/05 CHANGE TP 3PIN 21.61445.103

PASSWORD CLEAR

PW_CLEAR PW_CLEAR_H

0R0402-PAD

USB_VBUSSNS

12

R1605

0R2J-2-GP

10/30 PD 0R as CRB

56

CN2
ACES-CON4-37-GP

1

(D_)

2
3
4

1-2

2-3

R88

12

SC031

USB_VBUSSNS_R

1 2

(R_)

R1846 0R2J-2-GP

2

1D8V_S5

1 2

Change to NC

R89
10KR2J-3-GP

CLR PASSWORD

NORMAL(DEFAULT)

PSWD1

3
2

1

PIN-CON3-S-GP

1D8V_S5

12

R1845
20KR2J-L2-GP

(R_)

1

B B

A A

<Variant Name>

<Variant Name>

5

4

<Variant Name>

Title

Title

Title

CPU_(USB/UART/GPIO)

CPU_(USB/UART/GPIO)

CPU_(USB/UART/GPIO)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

16 105Tuesday, June 23, 2015

16 105Tuesday, June 23, 2015

16 105Tuesday, June 23, 2015

-1

-1

-1

5

www.teknisi-indonesia.com

XTAL19D2M_IN

D D

SC003

C1601

1 2

SC3D3P50V2CN-DL-GP

12

R1239

200KR2F-L-GP

C1602

1 2

SC3D3P50V2CN-DL-GP

SC003

Change from 8pF to 3.3pF

XTAL-19D2MHZ-3-GP

(82.30071.131)

4 1

X6

XTAL19D2M_IN

23

XTAL19D2M_OUT

XTAL19D2M_OUT

1A001

1 2

R1240 0R0402-PAD-2-GP

1 2

R1241 0R0402-PAD-2-GP

R1242 2K49R2F-GP
R524 49D9R2F-GP

XDP

1 2
1 2

STRAP PIN

C C

1D8V_S5

1 2

R80247 10KR2J-3-GP

FP_CBL_DET

For Resume SMBus

FP_CBL_DET[64]

SB001

SMBus Isolation

B B

PWRGD_3V

PWRGD_3V[18,24]

SB5V VCC

12

R1687
8K2R2J-3-GP

PWRGD_3V_B

Q1214
2N7002H-GP

G

(84.2N702.J31)

S D

B

12

R1688
8K2R2J-3-GP

PWRGD_3V_C

C

Q6714
LMBT3904LT1G-GP

E

6/10 Allen modify

G

G

12

PC5243
SCD1U10V2KX-4DLGP

(R_)

GPIO_SUS0[15]
GPIO_SUS1[15]
GPIO_SUS2[15]
GPIO_SUS3[15]
INT_TP#[15]
ME_FWP_SOC[15]
SOC_RUNTIME_SCI#[15,99]
SOC_EXTSMI_N[15]
SEC_GPIO_SUS9[15]
SEC_GPIO_SUS8[15]
SEC_GPIO_SUS10[15]

TP4127
TPAD30

12

R80152
100R2F-L1-GP-U

SMB0_DATA_RESUME

DS

Q1213
DMN5L06K-7-GP

SMB0_CLK_RESUME

DS

Q1212
DMN5L06K-7-GP

4

XTAL19D2M_IN_R
XTAL19D2M_OUT_R

DBG0[99]
DBG1[99]
DBG2[99]
DBG3[99]
DBG4[99]
DBG5[99]
DBG6[99]
DBG7[99]
DBG16[99]

GPIO0_RCOMP

1

SMB0_DATA_MAIN

SMB0_CLK_MAIN

ICLKICOMP
ICLKRCOMP

(071.00BSW.0B0U)

CPU1E

P24

OSCIN

M22

OSCOUT

J26

RSVD#J26

N26

RSVD#N26

P20

ICLKICOMP

N20

ICLKRCOMP

P26

RSVD#P26

K26

RSVD#K26

M26

RSVD#M26

AH45

RSVD#AH45

A9

MF_PLT_CLK0

C9

MF_PLT_CLK1

B8

MF_PLT_CLK2

B7

MF_PLT_CLK3

B5

MF_PLT_CLK4

B4

MF_PLT_CLK5

AM40

GPIO_DFX0

AM41

GPIO_DFX1

AM44

GPIO_DFX2

AM45

GPIO_DFX3

AM47

GPIO_DFX4

AK48

GPIO_DFX5

AM48

GPIO_DFX6

AK41

GPIO_DFX7

AK42

GPIO_DFX8

AD51

GPIO_SUS0

AD52

GPIO_SUS1

AH50

GPIO_SUS2

AH48

GPIO_SUS3

AH51

GPIO_SUS4

AH52

GPIO_SUS5

AG51

GPIO_SUS6

AG53

GPIO_SUS7

AF52

SEC_GPIO_SUS9

AF51

SEC_GPIO_SUS8

AE51

SEC_GPIO_SUS10

AC51

SEC_GPIO_SUS11

AH40

GPIO0_RCOMP

Y3

GPIO_ALERT

BRASWELL-GP

VCC3

PC5255

SCD1U10V2KX-4DLGP

VCC3

PC5256

SCD1U10V2KX-4DLGP

12

12

R1745
1KR2J-1-GP

12

R1744
1KR2J-1-GP

12

3

12

R561
10KR2J-3-GP

12

R557
10KR2J-3-GP

(R_)

12

R567
10KR2J-3-GP

(R_)

12

R562
10KR2J-3-GP

SB3V

12

R80143
1KR2J-1-GP

(R_)

CHAR_EN_CPU_BGPIO_ALERT_Y3

(R_)

6

Q9636A

2

MMBT3904DW-1-GP

1

CHAR_EN_CPU [55]

-1001

For Resume SMBus

Q1210
DMN5L06K-7-GP

1D8V_S51D8V_S5SB3V

I2C

MF_SMB_DATA

MF_SMB_ALERT#

5 OF 13

RSVD#C11
RSVD#B10
RSVD#F12
RSVD#F10

RSVD#D12

RSVD#E8
RSVD#C7
RSVD#D6

RSVD#J12

RSVD#F7
RSVD#J14
RSVD#L13

I2C0_SCL

I2C0_SDA

I2C1_SCL

I2C1_SDA

I2C2_SCL

I2C2_SDA

I2C3_SCL

I2C3_SDA

I2C4_SCL

I2C4_SDA

I2C5_SCL

I2C5_SDA

I2C6_SCL

I2C6_SDA

I2C_NFC_SCL

I2C_NFC_SDA

MF_SMB_CLK

SMB0_DATA_RESUME[61,77]
SMB0_CLK_RESUME[61,77]
SMB0_ALERT#[61]

SMB0_CLK_MAIN[12,37,55,77]
SMB0_DATA_MAIN[12,37,55,77]

C11
B10
F12
F10

D12
E8
C7
D6

J12
F7
J14
L13

AK6
AH7

AF6
AH6

AF9
AF7

AE4
AD2

AC1
AD3

AB2
AC3

AA1
AB3

AA3
Y2

SMB0_CLK_C

AM6

SMB0_DATA_C

AM7

SMB0_ALERT#_C

AM9

SMBUS

12

R1743
1KR2J-1-GP

(R_)

12

PC5254
SCD1U10V2KX-4DLGP

I2C0_SCL
BOARD1

I2C1_SCL
BOARD2

I2C2_SCL
BOARD3

CHAR_EN_CPU

LPC_PME_N [24]

I2C4_SCL
SKEW1

I2C5_SCL
SKEW2

I2C6_SCL
SKEW3

NFC_SCL
NFC_SDA

G

D S

BRASWELL

iCLK

PLTFM CLK's

GPIO_DFX

GPIO_SUS

(R_)

(R_)

RESERVED

1.8V

SMBUS

12

R554
10KR2J-3-GP

(R_)

12

R552
10KR2J-3-GP

12

R563
10KR2J-3-GP

(G_)

12

R560
10KR2J-3-GP

(U_)

5

12

R1742
1KR2J-1-GP

SMB0_ALERT#_CSMB0_ALERT#

(R_)

12

PC5251
SCD1U10V2KX-4DLGP

2

1D8V_S51D8V_S5 1D8V_S5

12

R556
10KR2J-3-GP

(R_)

12

R553
10KR2J-3-GP

1D8V_S51D8V_S5 1D8V_S5

12

R558
10KR2J-3-GP

12

R555
10KR2J-3-GP

(R_)

CHAR_EN [35]

(R_)

3

Q9636B
MMBT3904DW-1-GP

4

1

Board ID Settings

MB Version Board1

BOARD3BOARD1 BOARD2

SA(X00) 0

SB(pre-X01) 0

SC(X01) 1

-1A(X02) 0

-1(A00) 1 0 0

Board2

Board3

0

0

1

0

0

0

1

1

Skew ID Settings

MB Version SKEW1

SKEW3SKEW1 SKEW2

GPU 0

UMA 0

SMBus Level Shift

SB3V 1D8V_S5

SMB0_CLK_RESUME SMB0_CLK_C

12

R1741
1KR2J-1-GP

Q1204

DMN5L06K-7-GP

12

R1740
1KR2J-1-GP

Q1203

DMN5L06K-7-GP

6/3 Allen modify

I2C0_SCL
I2C1_SCL
I2C2_SCL
CHAR_EN_CPU
I2C4_SCL
I2C5_SCL
I2C6_SCL
NFC_SCL
NFC_SDA

SKEW2

SLEW3

1

1

1

0

10/08 Change to 1D8V_S5

1D8V_S5

G

D S

1D8V_S5

G

D S

1 2

R1792 1KR2J-1-GP(R_)

1 2

R1793 1KR2J-1-GP(R_)

1 2

R1794 1KR2J-1-GP(R_)

1 2

R1795 1KR2J-1-GP

1 2

R1796 1KR2J-1-GP(R_)

1 2

R1797 1KR2J-1-GP(R_)

1 2

R1798 1KR2J-1-GP(R_)

1 2

R1799 1KR2J-1-GP(R_)

1 2

R1800 1KR2J-1-GP(R_)

12

R1739
1KR2J-1-GP

1D8V_S5SB3V

12

R1738
1KR2J-1-GP

SMB0_DATA_CSMB0_DATA_RESUME

1D8V_S5

-1001

A A

<Variant Name>

<Variant Name>

5

4

<Variant Name>

Title

Title

Title

CPU_(GPIO/STRAP/I2C/SMB)

CPU_(GPIO/STRAP/I2C/SMB)

CPU_(GPIO/STRAP/I2C/SMB)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

17 105Tuesday, June 23, 2015

17 105Tuesday, June 23, 2015

17 105Tuesday, June 23, 2015

-1

-1

-1

5

www.teknisi-indonesia.com

4

3

2

1

Clock 32.768k

1D8V_S5

D D

C C

B B

1 2

R457 51R2J-2-GP

1 2

R473 51R2J-2-GP

1 2

R458 51R2J-2-GP

1 2

R1746 51R2J-2-GP

1 2

R466 51R2J-2-GP

1 2

R456 51R2J-2-GP

1 2

(R_)

R1257 10KR2J-3-GP

0814 Richard

VCC3

1 2

R79662 10KR2J-3-GP

1 2

R1259 100R2F-L1-GP-U

SLP_S3_N[24,35,40,46,48,53,92,99]

PWRGD_3V[17,24]

SC036

Change to stuff

XDP_H_TDI
XDP_H_TDO
XDP_H_TMS
TAP_PREQ#

XDP_H_TCK
XDP_H_TRST_N

EDM_SOC

LPC_CLKRUN#

RCOMP_LPC_HVT

1 2

R1669
0R0402-PAD-2-GP

1A001

1 2

R1668
0R0402-PAD-2-GP

1A001

LPC

SLP_S3_N_G

PWRGD_3V_G

CK_25M_SIO[24]

SC100P50V2JN-3GP

LPC_CLK1[68]

G

G

SB3V

12

R717
10KR2J-3-GP

S D

PWRGD_3V_D

S D

12

C80

12

APU_PROCHOT#[45,46]

SYS_PWRGD_G

Q78
2N7002H-GP

(84.2N702.J31)

Q77
2N7002H-GP

(84.2N702.J31)

XDP

1 2

R664 0R0402-PAD-2-GP

1 2

R1571 0R0402-PAD-2-GP

(R_)

-1010

C84

SC100P50V2JN-3GP

(R_)

Q79

G

2N7002H-GP

(84.2N702.J31)

S D

SYS_PWRGD

R178
0R0402-PAD-2-GP

INT_SERIRQ_CPU[24]

-1010

1 2

0R0402-PAD-2-GP

12

C313
SC47P50V2JN-3GP

(R_)

SYS_PWRGD [39,79]

LAD0_FWH0[24,68]
LAD1_FWH1[24,68]
LAD2_FWH2[24,68]
LAD3_FWH3[24,68]

R1258

XDP_H_TCK[99]
XDP_H_TDI[99]
XDP_H_TDO[99]
XDP_H_TMS[99]
XDP_H_TRST_N[99]

TAP_PRDY#[99]
TAP_PREQ#[99]

LFRAMEJ_FW4[24,68]

VCC3

12

LPC_CLK0_R
LPC_CLK1_R

12

R184

10KR2J-3-GP

COREPWROK

C111
SCD1U16V2KX-3GP

(R_)

1 2

EDM_SOC

LPC_CLKRUN#

RCOMP_LPC_HVT

1

TP131TPAD30

1

TP132TPAD30

APU_PROCHOT#_R

PWM0
PWM1

AF42
AD47
AF40
AD48
AB48

AD45
AF41

AF50
AF48
AF44
AF45
AD50

M13

P2

R3

T3
P3

M3
M2
N3
N1

T4
T2

H5
H7

P28
P30

(071.00BSW.0B0U)

CPU1G

TCK
TDI
TDO

JTAG/ITP

TMS
TRST#

CX_PRDY#
CX_PREQ#
RSVD#M13

MF_LPC_CLKOUT0
MF_LPC_CLKOUT1
LPC_CLKRUN#
LPC_FRAME#

MF_LPC_AD0
MF_LPC_AD1
MF_LPC_AD2
MF_LPC_AD3

LPC_HVT_RCOMP
ILB_SERIRQ

PWM0
PWM1

RSVD#P28
RSVD#P30
RSVD#AF50
RSVD#AF48
RSVD#AF44
RSVD#AF45
PROCHOT#

BRASWELL-GP

SUS_PWR_ACK_CPU_R
AC_PRESENT_CPU
PMC_BATLOW#
PSTBTN_N

BRASWELL

LPC

PWM

Reserved

7 OF 13

BRTCX1_PAD
BRTCX2_PAD

BVCCRTC_EXTPAD

SRTCRST#

RTC

COREPWROK

RSMRST#

RTEST#

RSVD_VSS#G18

SUSPWRDNACK

SUS_STAT#
PMU_SUSCLK
PMU_SLP_S4#
PMU_SLP_S3#

PMU_RESETBUTTON#

PMU_PLTRST#

PMU_BATLOW#

PMU

PMU_AC_PRESENT

PMU_SLP_S0IX#

PMU_SLP_LAN#

PMU_WAKE#

PMU_PWRBTN#

PMU_WAKE_LAN#

SVID0_CLK

SVID

SVID0_DATA

SVID0_ALERT#

CORE_VCC0_SENSE

CORE_VSS0_SENSE

CORE_VCC1_SENSE

Voltage sense

CORE_VSS1_SENSE

DDI_VGG_SENSE
UNCORE_VSS_SENSE2
UNCORE_VSS_SENSE1

R499 10KR2J-3-GP
R1262 10KR2J-3-GP
R492 20KR2J-L2-GP
R1208 2KR2F-3-GP

PSTBTN_N

1 2

R94

1 2

R181

R1265

(R_)

M18
K18
F16

D18
G16
F18
J16
G18

AE3
D14
C15
C12
B14
AF2
F14
C14
C13
A13
B12
N16
M16
P18

AD42
AD41
AD40

AG32
AJ32
AD29
AF27
AD24
AD22
AC27

1 2

SC038

PDG r1p2 write pull-up 150~3K

R1266
10KR2J-3-GP

PGD write S0 power

100KR2J-1-GP

100KR2J-1-GP

12

10KR2J-3-GP

Jeffrey 0703

PCH_RTCX1
PCH_RTCX2

BVCCRTC_EXTPAD

PCH_SRTCRSTB_PULLUP

PCH_RTCRST_PULLUP

RTC_INTRUDER

SUS_PWR_ACK_CPU_R
PMC_SUS_STAT
SUSCLK_SIO_C

PLT_RST#_CPU
PMC_BATLOW#
AC_PRESENT_CPU
SLP_SLP_S0#_CPU
PMU_SLP_LAN_N
WAKE_N_APU

PMU_WAKE_LAN_N

VCC0_SENSEN_CPU_P
VCC0_SENSEN_CPU_N
VCC1_SENSEN_CPU_P
VCC1_SENSEN_CPU_N
VGG_SENSEN_CPU_P
VGG_SENSEN_CPU_N
VNN_SENSEN_CPU

8/14 Richard modify 10mil trace

Jeffrey 0703

12
12

12

(R_)

RSMRST_N

COREPWROK

AC_PRESENT_CPU

1 2

C49 SCD1U16V2KX-3DLGP

PCH_SRTCRSTB_PULLUP [99]
COREPWROK [99]
RSMRST_N [24,99]

1 2

R1851 10KR2J-3-GP

1 2

R1697 0R2J-2-GP(R_)

1

TP35

1

TP100

PM_SLP_S4#_CPU [24,92]
PM_SLP_S3#_CPU [24,92]
PSTBTN_N [79,99]

1 2

R1263 0R0402-PAD-2-GP

1 2

R1264 0R0402-PAD-2-GP

APU_PWNBTN_N [99]
VR_SVID_CLK [54]
VR_SVID_DATA [54]
VR_SVID_ALERT# [54]

1A001

1 2

R1584 0R0402-PAD-2-GP

1 2

R1585 0R0402-PAD-2-GP

1 2

R1586 0R0402-PAD-2-GP

1 2

R1587 0R0402-PAD-2-GP

1 2

R1588 0R0402-PAD-2-GP

1 2

R1589 0R0402-PAD-2-GP

1 2

PR9766 100R2J-2-GP

1D8V_S5

1D8V_S0

12

(64.10005.6DL)

1A001

5/26 Allen modify
Checklist PU 20K.
PDG & CRB 200, 60.

V_3P0_BAT_VREG

Debug Only

V_3P0_BAT_VREG

APU_PWNBTN_N_R

8/14 Richard Follow EDS

SUS_PWR_ACK_CPU [24]

5/13 Allen modify

SLP_SLP_S0#_CPU [92]

1

TP129

APU_PWNBTN_N_RAPU_PWNBTN_N

VCC0_SENSEN_P [18,45]
VCC0_SENSEN_N [18,45]
VCC0_SENSEN_P [18,45]
VCC0_SENSEN_N [18,45]
VGG_SENSEN_P [46]
VGG_SENSEN_N [46]

1P05V_A

1-2

2-3

10KR2J-3-GP

PCIE_WAKE#_CPU [92]

1

TP130

CLEAR CMOS

NORMAL MODE

1 2

R87 20KR2F-L-GP

SC1U10V2KX-1DLGP

1 2

R91 20KR2F-L-GP

SC1U10V2KX-1DLGP

1D8V_S51D8V_S5

R56

1 2

CBE

Q18
MMBT3904-4-GP

(84.T3904.H11)

C50

C52

12

SIO_PWNBTN_B

PCH_RTCX2

RTCX_L PCH_RTCX1

1 2

R1261
0R0402-PAD-2-GP

1A001

R81 10MR3F-GP

12

C1618
SC4P50V2CC-1-DL-GP

5/13 Allen modify

11/05 CHANGE TP 3PIN 21.61445.103

CLEAR CMOS

PCH_RTCRST_PULLUP

12

PCH_SRTCRSTB_PULLUP

12

V_3P3_A

R55
2K2R2J-2-GP

R57
10KR2J-3-GP

(R_)

1 2

1 2

R1260 0R2J-2-GP(R_)

X7

4 1

23

XTAL-32D768KHZ-67-GP

12

Change from 6pF to 4pF

1 2

R85 0R2J-2-GP

1 2

R86 0R2J-2-GP(R_)

12

R92
0R0402-PAD-2-GP

SIO_PWNBTN_N [24,99]

PWRBTN_N [24,64]

SC037

CMCLR_P1

C1619

12

SC4P50V2CC-1-DL-GP

SC004SC004

CMCLR_P2

CMCLR1

3
2

1

PIN-CON3-S-GP

CLEAR CMOS JP

5

VCC3

12

R64
1KR2J-1-GP

For x1 / NGFF / debug card / SIO

3

Q20B
MMBT3904DW-GP

4

PLTRST_N [24,68]

(75.03904.07C)

2

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

CPU_(LPC/SIDEBAND/JTAG)

CPU_(LPC/SIDEBAND/JTAG)

CPU_(LPC/SIDEBAND/JTAG)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
C

C

C

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

18 105Tuesday, June 23, 2015

18 105Tuesday, June 23, 2015

18 105Tuesday, June 23, 2015

V_3P3_A

12

1D8V_S5

-1011

1A018

12

R72
2K2R2J-2-GP

(R_)

A A

5

4

PLT_RST#_CPU[99]

SCD01U25V2KX-3GP

PLT_RST#_CPU PLT_RST#_CPU_G

12

(R_)

C42

R75

10KR2J-3-GP

(R_)

C44
SC150P50V2KX-1-GP

1 2

12

3

R65
10KR2J-3-GP

PLT_RST#_D

6

2

Q20A
MMBT3904DW-GP

(75.03904.07C)

1

-1

-1

-1

5

www.teknisi-indonesia.com

PCIEX2

PEG_TXP[0..1][76]
PEG_TXN[0..1][76]

D D

C C

B B

PEG_RXP[0..1][76]
PEG_RXN[0..1][76]

1D8V_S5

R510 10KR2J-3-GP

R1782 10KR2J-3-GP

GPU

WLAN

GLAN

1 2

HSO_C_LAN_DP3[31]
HSO_C_LAN_DN3[31]

12

4

PEG_TXP0[76]
PEG_TXN0[76]

PEG_RXP0[76]

PEG_RXN0[76]

PEG_TXP1[76]
PEG_TXN1[76]

PEG_RXP1[76]
PEG_RXN1[76]

HSO_C_DP2[61]
HSO_C_DN2[61]

HSI_C_DP2[61]
HSI_C_DN2[61]

HSI_LAN_DP3[31]
HSI_LAN_DN3[31]

PCIE_CLKREQ_0

PCH_PCIECLKRQ2_N

1 2

R1267 0R2J-2-GP(R_)

X2 GPU

GPU

WLAN

12
12

12
12

12
12

12
12

CK_PE_100M_16PORT_DP[76]
CK_PE_100M_16PORT_DN[76]

GLAN

CLK_DIFF_P4
CLK_DIFF_N4

12

PCH_PCIECLKRQ2_N[61]

LANCLK_REQ_N[31]

CK_PCIEX1_WLAN_DP[61]
CK_PCIEX1_WLAN_DN[61]

C325 SCD1U16V2KX-3DLGP(G_)
C322 SCD1U16V2KX-3DLGP(G_)

C324 SCD1U16V2KX-3DLGP(G_)
C328 SCD1U16V2KX-3DLGP(G_)

C54 SCD1U16V2KX-3DLGP
C56 SCD1U16V2KX-3DLGP

C315 SCD1U16V2KX-3DLGP
C316 SCD1U16V2KX-3DLGP

R513 402R2F-GP

P_GFX_TXP0
P_GFX_TXN0

P_GFX_TXP1
P_GFX_TXN1

C_GPP_TXP2
C_GPP_TXN2

HSO_LAN_DP3
HSO_LAN_DN3

PCIE_CLKREQ_0

CK_GLAN_DP[31]
CK_GLAN_DN[31]

PCIE_OBS_DP
PCIE_OBS_DN

3

C24
B24
G20

A25
C25
D20

B26
C26
D22

A27
C27
G24

AM10
AM12

AK14

AM14

A21
C21
C19
B20
C18
B18
C17
A17
C16
B16

D26

V14

V13
V12

J20

F20

F22

J24

F26

Y13
Y12

CPU1D

PCIE_TXP0
PCIE_TXN0
PCIE_RXP0
PCIE_RXN0

PCIE_TXP1
PCIE_TXN1
PCIE_RXP1
PCIE_RXN1

PCIE_TXP2
PCIE_TXN2
PCIE_RXP2
PCIE_RXN2

PCIE_TXP3
PCIE_TXN3
PCIE_RXP3
PCIE_RXN3

PCIE_CLKREQ0#
PCIE_CLKREQ1#
PCIE_CLKREQ2#
PCIE_CLKREQ3#

CLK_DIFF_P_0
CLK_DIFF_N_0
CLK_DIFF_P_1
CLK_DIFF_N_1
CLK_DIFF_P_2
CLK_DIFF_N_2
CLK_DIFF_P_3
CLK_DIFF_N_3
CLK_DIFF_P_4
CLK_DIFF_N_4

PCIE_OBSP
PCIE_OBSN

SPI1_CLK
SPI1_CS0#
SPI1_CS1#
SPI1_MISO
SPI1_MOSI

BRASWELL-GP

(071.00BSW.0B0U)

PCIe

2

4 OF 13

BRASWELL

SPI

SATA_TXP0
SATA_TXN0
SATA_RXP0
SATA_RXN0

SATA_TXP1
SATA_TXN1
SATA_RXP1
SATA_RXN1

SATA_LED#

SATA_GP0

SATA

SATA_GP1
SATA_GP2
SATA_GP3

SATA_OBSP
SATA_OBSN

FST_SPI_CLK

FST_SPI_CS0#
FST_SPI_CS1#
FST_SPI_CS2#

FST_SPI_D0

FAST SPI

FST_SPI_D1
FST_SPI_D2
FST_SPI_D3

MF_HDA_RST#

MF_HDA_SDI1
MF_HDA_CLK
MF_HDA_SDI0

MF_HDA_SYNC

MF_HDA_SDO

MF_HDA_DOCKEN#

MF_HDA_DOCKRST#

AUDIO

GP_SSP_2_CLK

GP_SSP_2_FS
GP_SSP_2_TXD
GP_SSP_2_RXD

SPKR

C31
B30
N28
M28
C29
A29
J28
K28

AH3
AH2
AG3
AG1
AF3

N30
M30

W3

V4
V6
V7

V2
V3
U1
U3

AF13
AD6
AD9
AD7
AF12
AF14
AB9
AB7

H4

AK9
AK10
AK12
AK13

SATAHDR_TX_DP0 [60]
SATAHDR_TX_DN0 [60]
SATAHDR_RX_DP0 [60]
SATAHDR_RX_DN0 [60]
SATAHDR_TX_DP1 [60]
SATAHDR_TX_DN1 [60]
SATAHDR_RX_DP1 [60]
SATAHDR_RX_DN1 [60]

CPU_SATA_LED_N

GPIO

GPIO
GPIO

SATA_RCOMP_DP
SATA_RCOMP_DN

SPI_CLK [25]

SPI_CS0_N [25]

SPI_DATAOUT [25]
SPI_DATAIN [25]
SPI_IO2 [25]
SPI_IO3 [25]

AZ_RST_N_M

AZ_BCLK_M
AUD_LINK_SDIN
AZ_SYNC_M
AZ_SDOUT_M

APU_SPKR [27]

HDD

ODD

R519 402R2F-GP

12

SPI

AUD_LINK_SDIN [27]

1

CPU_SATA_LED_N [64]
CPU_CHAR_CTL3 [35]

CHASSIS_ID_0 [64]
CHASSIS_ID_1 [64]

HDA

0819 modify Jeffrey SWAP

RN10

AUD_LINK_SYNC[27]

AUD_LINK_RST_N[27]

AUD_LINK_SDO[27]

AUD_LINK_BCLK[27]

1
2
3
4 5

SRN75J-3-GP

8
7
6

5/13 Allen modify

AZ_SYNC_M
AZ_RST_N_M
AZ_SDOUT_M
AZ_BCLK_M

12

(R_)

C86
SCD01U25V2KX-3GP

Cap location is same as CRB

SPI

<Variant Name>

<Variant Name>

A A

5

4

3

2

<Variant Name>

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Title

Title

Title

CPU_(CLK/SATA/PCIE/SPI/HDA)

CPU_(CLK/SATA/PCIE/SPI/HDA)

CPU_(CLK/SATA/PCIE/SPI/HDA)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

Hsichih, Taipei

19 105Tuesday, June 23, 2015

19 105Tuesday, June 23, 2015

19 105Tuesday, June 23, 2015

1

-1

-1

-1

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

Blanking

B B

Wistron Incorporated

Wistron Incorporated

A A

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

20 105Tuesday, June 23, 2015

20 105Tuesday, June 23, 2015

20 105Tuesday, June 23, 2015

1

-1A4

-1A4

-1A4

5

www.teknisi-indonesia.com

R1245

1 2

0R0603-PAD

D D

SB3V

R80276 0R3J-0-U-GP

VCC3

R1246 0R3J-0-U-GP

C C

R1248 0R3J-0-U-GP

1D8V_S5

R1249 0R3J-0-U-GP

1D8V_S5

B B

A A

R1244

1 2

0R0603-PAD

-1010

1 2

1 2

(R_)

R1247

1 2

0R0603-PAD

-1010

1 2

1 2

(R_)

-1010

R1250

1 2

0R0603-PAD

R1251

1 2

0R0603-PAD

R1252

1 2

0R0603-PAD

R1253

1 2

0R0603-PAD

5

VCCSFRPLLDDR_1P24_1P35DDR_VDDQ

VCCCLKDDR_1P24_1P35DDR_VDDQ

VCCPADCF3SI0_1P8_3P3

SD3 IO SUPPLY

VCCPADCF1SI0_1P8_3P3SB3V

LPC IO SUPPLY

VCCCFIOAZA_1P801D5V_S0

AUDIO IO SUPPLY

VCCPADCF2SI0_E_1P80

VCCPADCF1SI0_1P80

VCCUSB2_1P8

V1P8_FUSE

VCCUSB2_3P3 SB3V

V_3P0_BAT_VREG VCCRTC_3P3

VCCRTCSUS_3P3 SB3V

4

VCCSFRPLLDDR_1P24_1P35

VCCCLKDDR_1P24_1P35

DDR_VDDQ

VCCPADCF3SI0_1P8_3P3

VCCPADCF1SI0_1P8_3P3

VCCCFIOAZA_1P80

VCCPADCF2SI0_E_1P80

VCCPADCF1SI0_1P80

-1010

R1256

1 2

0R0603-PAD

R1255

1 2

0R0603-PAD

R1254

1 2

0R0603-PAD

4

3

(071.00BSW.0B0U)

CPU1I

AN27

DDRSFR_VDDQ_G_S4

AM25

DDR_VDDQ_G_S42

BE1

DDR_VDDQ_G_S416

BE53

DDR_VDDQ_G_S419

BJ2

DDR_VDDQ_G_S426

BJ3

DDR_VDDQ_G_S427

BJ49

DDR_VDDQ_G_S428

BJ5

DDR_VDDQ_G_S429

BH50

DDR_VDDQ_G_S425

BH5

DDR_VDDQ_G_S424

BH49

DDR_VDDQ_G_S423

BH4

DDR_VDDQ_G_S422

BE3

DDR_VDDQ_G_S417

BG51

DDR_VDDQ_G_S421

BG3

DDR_VDDQ_G_S420

BJ51

DDR_VDDQ_G_S430

BJ52

DDR_VDDQ_G_S431

AY10

DDR_VDDQ_G_S414

AY44

DDR_VDDQ_G_S415

AV44

DDR_VDDQ_G_S413

AV10

DDR_VDDQ_G_S410

BE51

DDR_VDDQ_G_S418

AV38

DDR_VDDQ_G_S412

AV16

DDR_VDDQ_G_S411

AU36

DDR_VDDQ_G_S49

AU18

DDR_VDDQ_G_S48

AN36

DDR_VDDQ_G_S47

AN35

DDR_VDDQ_G_S46

AN19

DDR_VDDQ_G_S45

AN18

DDR_VDDQ_G_S44

AM36

DDR_VDDQ_G_S43

AM18

DDR_VDDQ_G_S41

E1

SDIO_V3P3A_V1P8A_G31

E2

SDIO_V3P3A_V1P8A_G32

G1

SDIO_V3P3A_V1P8A_G33

AH4

UNCORE_V1P8A_G32

AF4

UNCORE_V1P8A_G31

Y18

GPIO_V1P8A_G35

AD33

GPIO_V1P8A_G31

AK18

GPIO_V1P8A_G33

AF33

GPIO_V1P8A_G32

AK19

GPIO_V1P8A_G34

BRASWELL-GP

3

2

9 OF 13

BRASWELL

DDI_VDDQ_G31
DDI_VDDQ_G32

MIPI_V1P2A_G32
MIPI_V1P2A_G31

ICLK_VSFR_G32
ICLK_VSFR_G31

CORE_VSFR_G35

DDR

Title

Title

Title

CPU_(POWER1)

CPU_(POWER1)

CPU_(POWER1)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A

A

A

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

CORE_VSFR_G36

PCIE_V1P05A_G31#AC30

CORE_VSFR_G34
CORE_VSFR_G32
CORE_VSFR_G33
CORE_VSFR_G31

USBHSIC_V1P2A_G3

USB_VDDQ_G32
USB_VDDQ_G33

USBRTCFUSE

USB_VDDQ_G31

USBSSIC_V1P2A_G3

USB_V1P8A_G3

USB_V3P3A_G32
USB_V3P3A_G31

RTC_V3P3RTC_G52
RTC_V3P3RTC_G51

RTC_V3P3A_G51
RTC_V3P3A_G52

FUSE_V1P8A_G3

FUSE1_V1P05A_G4
FUSE0_V1P05A_G3

RSVD_VSS#A3

RSVD#K20

RSVD#M20

2

V36
Y36

T40
P40

Y27
Y25

P38
V30
AC30

AF35
AD35
AD38
AC36

M41
U35
V35
H44
P41

AA29

C23
B22

C5
B6
D4
E3

U16

H10
G10
A3
K20
M20

1

1D24V_S5

1D24V_S5

1D24V_S5

1D24V_S5

1D24V_S5

1D24V_S5
1D24V_S5

1D24V_S5
1D24V_S5

VCCUSB2_1P8

VCCUSB2_3P3

VCCRTC_3P3

VCCRTCSUS_3P3

V1P8_FUSE

1P05V_S5

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

21 105Tuesday, June 23, 2015

21 105Tuesday, June 23, 2015

21 105Tuesday, June 23, 2015

1

-1

-1

-1

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

Blanking

B B

Wistron Incorporated

Wistron Incorporated

A A

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

22 105Tuesday, June 23, 2015

22 105Tuesday, June 23, 2015

22 105Tuesday, June 23, 2015

1

-1A4

-1A4

-1A4

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

Blanking

B B

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

A A

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

5

4

3

2

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

23 105Tuesday, June 23, 2015

23 105Tuesday, June 23, 2015

23 105Tuesday, June 23, 2015

1

-1A4

-1A4

-1A4

5

www.teknisi-indonesia.com

4

3

2

1

L52 BLM18SG121TN1D-GP

1 2

VCC3

(68.00206.021)

12

SB003

R501
220R5J-GP

SIO_PSON_D

D

U67
2N7002K-2-GP

S

D D

Reset Buffer Input

PLTRST_N[18,68]

SB005

C522
SCD1U10V2KX-5DLGP

2 1

INT_SERIRQ_OE

R80214
0R2J-2-GP

SERIRQ Level Shift (Only for BX)

U35

6

VCCB

5

OE

4

B

G2129TL1U-GP

VCCA should not exceed VCCB

73.02129.02J

(R_)

1 2

1D8V_S0 VCC3 1D8V_S0

12

R645

10KR2J-3-GP

12

R646

1KR2J-1-GP

(R_)

C C

G

SIO_PSON_N

VBAT2

12

R337 33R2J-2-GP

C571

(R_)

SCD1U10V2MX-3DLGP

2 1

C523
SCD1U10V2KX-5DLGP

2 1

1

VCCA

2

GND

INT_SERIRQ_CPUSER_IRQ

3

A

INT_SERIRQ_CPU[18]

INT_SERIRQ_CPUSER_IRQ

For CX mount

SYS_THERMDA+ CPU_THERMDA+

GPU VCORE VRD

1 2

G8 GAP-CLOSE-PWR

Power-On Strapping

Symbol Value Description

JP1

DSW_EUP_SEL 1

Pin-23

JP2 WDT_EN

Pin-56

B B

For BX only

JP6 LPC/eSPI 1

Pin-56

For CX only

JP3

FAN_CTL_SEL01 EC Index 63h/73h/7B/A3 is 80h

For BX only

Pin-58

JP3

Vih/Vil_SEL 1.8V Level

For CX only

Pin-58

K8PWR_ENJP4

Pin-60 Enable K8 Power Sequence

Highlight Red letter indicate default

For AC OFF SEQUENCE

SB3V

DCBATOUT

12

R273
100KR2J-1-GP

12

R274
20KR2J-L2-GP

1 2

R269
4K7R2F-GP

(63.47234.1DL)

PWRGD_PS_L

SCD1U16V2ZY-2GP

1 2

Power Good 3V

A A

5

PWROK3_1_R

SB3V

PWROK3_2_R

DOD8

R79772
1KR2J-1-GP

1 2

R277
1KR2J-1-GP

(R_)

1 2

(R_)

0

1

0

0 Enable eSPI Interface

1

0

1

0

PWRGD_PS_L1

(R_)

C174

VCC3

12

R293
1KR2J-1-GP

R283

1 2

0R0402-PAD-2-GP

PWRGD_3V_B_1

6

123 4

RSMRST*_R PWRGD_3V_LL

EUP

DSW

Disable WDT to reset PWROK

Enable WDT to reset PWROK

Enable LPC Interface

EC Index 63h/73h/7B/A3 is 00h

3.3V Level

Disable K8 Power Sequence

5

6

123 4

5

SIO_AVCC3

12

12

V_3P3_A

12

C808
SC10U10V3MX-1-GP

12

C809
SC1U6D3V2KX-DLGP

SIO_GND

HMT

MPCIE_DISABLE_N[61]

SC064

12

C219
SC2200P50V2KX-2DLGP

SYS_THERMDA-

C807
SC10U10V3MX-1-GP

12

C225
SCD1U16V2KX-3DLGP

12

C228
SCD1U16V2KX-3DLGP

TP125
TP126

TP127

1 2

C813 SC1U6D3V2KX-DLGP

1 2

R500 1KR2J-1-GP

LAD0_FWH0[18,68]
LAD1_FWH1[18,68]
LAD2_FWH2[18,68]
LAD3_FWH3[18,68]

LFRAMEJ_FW4[18,68]

CK_25M_SIO[18]
LPC_PME_N[17]

SIO_SUSLED_N[64]

5V_LED[64]

NGFF_BT_DISABLE[61]

ADAPTOR_PSID_SIO[42]

SFD_GPIO[15]

R80150 0R2J-2-GP

IO_SMI_N[16]

SIO_PWRLED_N[64]

C

B

LMBT3904LT1G-GP

E

Q6

C223
SC1U6D3V2KX-DLGP

SIO_VCORE

TP_SIO_VIN0

1

TP_SIO_VIN1

1

SIO_VIN2
SIO_VIN4
SIO_VIN5
TP_SIO_VIN6

1

SIO_REF

CPU_THERMDA+
SYS_THERMDA+

COPEN_N

LAD0_FWH0
LAD0_FWH1
LAD0_FWH2
LAD0_FWH3

PLTRST*_SIO
SER_IRQ
LFRAMEJ_FW4

CK_25M_SIO

LPC_PME_N

SIO_JP2
SIO_SUSLED_N
SIO_JP3

SIO_JP4

NGFF_BT_DISABLE

ADAPTOR_PSID_SIO SUS_WARNB

SFD_GPIO

1 2

PCIRST1#

IO_SMI_N

SIO_GNDSIO_GND

Layout Note: place 2200PF near SIO PIN44.45

0529 Eric modify for BOM

Q29
2N7002EDW-2-GP

(75.27002.F7C)

PWRGD_PS_L2 SIO_ATXPG

Q30
2N7002KDW-GP

(R_75.27002.F7C)

4

1 2

R280
0R0402-PAD-2-GP

12

R278

(R_)

1KR2J-1-GP

VCC3

R2406
10KR2F-2-GP

(63.10334.1DL)

1 2

DI

12

12

C176

R2405
20KR2J-L2-GP

0.8VCC3-> S0_PWR_GOOD

SC100P50V2JN-3DLGP

SIO delay:

0b

150ms 300ms

PWRGD_3V [17,18]

1b

53

11
12
30

52
51
50
49
48
47

46

45
44

29

16
17
18
19

13
14
15
22
33

56
57
58
59
60
62

26
27

10

8

38

CPU VCORE VRD

SIO_JP1

SIO_JP4

SIO_JP3

SIO_JP2

23h<bit 2>

U5

AVCC3

3VSB
VCORE
VBAT

VIN0/VCORE_0D8V
VIN1/VDIMM_STR_1D2V
VIN2_+12_SEN
VIN4/VLDT_12/5VSB_SEN
VIN5/5VDUAL
VIN6

VREF

TMPIN1
TMPIN2

COPEN#

LAD0
LAD1
LAD2
LAD3

LRESET#
SERIRQ
LFRAME#
PCICLK

VCORE_EN/GP42/PCH_C0B/SUSWARN#

PME#/GP54

RTS1#/JP2
DSR1#/GP45/PCH_D0A
SOUT1/JP3
SIN1/GP41
DTR1#/JP4
RI1#/GP32

SST/AMDTSI_D/PCH_D1/GP43
PECI/AMDTSI_C/GP44

PCH_C0A/PCIRST1#/GP12
PCH_DOB/GP22
3VSBSW#/GP40/SCL0

IT8617E-BX-GP

071.08617.000G

1 2

G9 GAP-CLOSE-PWR

1 2

R80162 1KR2J-1-GP

1 2

R932 8K2R2F-1-GP(R_)

1 2

R934 1KR2J-1-GP

1 2

R933 1KR2J-1-GP

1 2

R2431 1KR2J-1-GP(R_)

1 2

R80250 1KR2J-1-GP

1 2

R931 1KR2J-1-GP(R_)

48M CLK

V_3P3_A

1 2

R321
100KR2J-1-GP

V_3P3_A

PWRBTN

PWRBTN_N[18,24,64]

FAN_TAC2/GP52
FAN_CTL2/GP51

FAN_TAC3/GP37
FAN_CTL3/GP36

FAN_TAC4/GP57/MDAT

FAN_CTL4/GP56/MCLK

CTS1#/GP31/FAN_TAC5
DCD1#/GP33/FAN_CTL5

RSMRST#/GP55

SUSC#/GP53
ATXPG/GP30

PWRGD3/CPU_PG/SDA0

VLDT_EN/SLP_SUS#/GP63

DPWROK/GP23

SUSACK#/PWRGD1

PCIRST3#/CIRRX1/GP10

5VSB_CTRL#/GP13

12

C2401
SC2200P50V2KX-2DLGP

NTC

C185

SCD1U16V2KX-3DLGP

L7

1 2

MHC1608S181NBP-GP

SW_ON_N_SIO

1
2

3
4

39
40

63
61

20

KRST#/GP62

21

GA20

42
28

SYS_3VSB

35

PSON#

34

PANSWH#

SIO_SLP_S3_N

31

SUSB#

SIO_SLP_S4_N

36
6
37

64
7

SUS_PWR_ACK_CPU

9
55

41
5
24

CLKIN

25

GPA1

23

GPO50/JP1

32

PWRON#

54

GNDD

43

GNDA/TSD-

C

E

CPU_THERMDA-

V_3P3_A

change from V_3P3_A to VCC3

SB006

VCC3

R933 CX Un_mount, BX mount

VCC3

V_3P3_A

R2431 BX Un_mount, CX mount

SB031

VCC3

V_3P3_A

R80250 CX Un_mount, BX mount
R931 BX Un_mount, CX mount

OCS_48M_2

12

CK_48M_SIO

OCS_48M_1

1 2

R668
0R0402-PAD-2-GP

1 2

R2411
0R0402-PAD-2-GP

3

SB014

SIO_SLP_S4_N

CPU_FAN_TACH_SIO
CPU_FAN_CTRL_SIO

SYS_FAN_TACH_SIO
SYS_FAN_CTRL_SIO

MDAT

R508 10KR2J-3-GP

MCLK

R514 10KR2J-3-GP

KBRST_N
A20GATE

RSMRST_SIO_N
SYS_3VSB
SIO_PSON_N
PWRBTN_N

SIO_ATXPG
PWROK3_1_R

SLP_SUSB

DPWROK

SUS_WARNB

PCIRST3#
SYS_EUP_CTRL
CLK_48M_SIO_C
SIO_MEM_EVENT_L

SIO_JP1
SW_ON_N_SIO

SIO_GND

B

LMBT3904LT1G-GP
Q7

1
2
3
4

PB_IN_N_1

1 2

R662
0R2J-2-GP

(R_)

1 2

For CX mount, R80210/R80212 mount, R80211/R80213 unmount

CPU_FAN_TACH_SIO [26]
CPU_FAN_CTRL_SIO [26]

SYS_FAN_TACH_SIO [26]
SYS_FAN_CTRL_SIO [26]

SIO_GPU_RSTSIO_GPU_RST_R
SIO_GPU_ENSIO_GPU_EN_N

SIO_PSON_N [43]
PWRBTN_N [18,24,64]

PM_SLP_S3#_CPU

SLP_S3_NSIO_SLP_S3_N

PM_SLP_S4#_CPU

SLP_S4_N

VCC3

SIO_GPU_RST [76]
SIO_GPU_EN [56,87]

1 2

R1592 0R0402-PAD-2-GP
R923 100R2F-L1-GP-U

1 2

EVAL_PWRGD

LAN_DISABLE_N

MINI_POWER_CTRL

Reset Buffer Output

R2416 33R2J-2-GP
R2417 33R2J-2-GP
R2418 33R2J-2-GP

R80210 0R2J-2-GP(R_)

1 2

1 2

R80211 0R2J-2-GP

1 2

R80212 0R2J-2-GP(R_)

1 2

R80213 0R2J-2-GP

1 2
1 2

1 2

R2409 0R2J-2-GP

1 2

R2415 0R2J-2-GP

1 2

R80183 0R2J-2-GP(R_)

R80264 0R2J-2-GP

1 2

1 2

R80265 0R2J-2-GP

SIO_MEM_EVENT_L [12]

Remove RT2 circuit

EUP Control for 3D3V_S5 & 5V_S5 Disable / Enable

V_3P3_A

R304
10KR2J-3-GP

1 2

SYS_EUP_CTRL EC_EUP_EN

DOD8

SYS_EUP_CTRL
H: EUP Enable
L: EUP Disable(SIO default)

OSC2

TRI-STATE
GND
OUTPUT
VDD

OSC-48MHZ-16GP

C530
SCD1U16V2KX-3DLGP

SIO_PWNBTN_N [18,99]

R305

1 2

0R0402-PAD-2-GP

PM_SLP_S3#_CPU [18,92]

SLP_S3_N [18,35,40,46,48,53,92,99]

PM_SLP_S4#_CPU [18,92]

SLP_S4_N [32,34,35,39,48,64,92,99]

-1010

RSMRST_N

SB3V

SC066

EVAL_PWRGD [86]

LAN_DISABLE_N [31]
SUS_PWR_ACK_CPU [18]
MINI_POWER_CTRL [61]

Change R80183 to NC
Add R80264
Add R80265

12
12
12

SB019

R725
0R2J-2-GP

12

(R_)

12

(R_)

C180
SCD1U16V2ZY-2GP

1D8V_S0

12

C12385
SC10U10V3MX-1-GP

RSMRST_N [18,99]

PCIE_RST# [61]
PLTRST_LAN_N [31]
PLTRST_SL_N [76,79]

1B002

V_3P3_A

R296
10K5R2F-GP

1 2

Q6706
2N7002H-GP

G

(84.2N702.J31)

S D

SB013

For CX mount

1A007

12

C12384

(R_)

SCD1U16V2KX-3DLGP

Place close to pin24

For BX/CX change

1D8V_S0

R2414 BX Un_mount, CX mount

R2414
0R2J-2-GP

(R_)

R2430
0R2J-2-GP

1 2

12

R2430 CX Un_mount, BX mount

R2413

R2413 CX Un_mount, BX Un_mount

1KR2J-1-GP

(R_)

1 2

SC006

BOM change to NC

1B005

SIO_EUP_EN# [47,49,77,92]

SB019

SIO_EUP_EN#
H: EUP Disable
L: EUP Enable

2

SIO_VIN5

(R_)

SIO_VIN2

SIO_VIN4

CK_48M_SIO

GPA1/DIOD24

GP12/DIOD8

GP32/DIOD8

GP44/DIOD24

GP31/DIOD8

GP33/DIOD8

DIO16

DIO16

GP23/DIOD8

DOD8

DOD8

DOD8

DOD8

DI

DOD8

DOD8

DI

12

C815
SCD1U16V2KX-3DLGP

SIO_GND

12

C233
SCD1U16V2KX-3DLGP

SIO_GND

12

C814
SCD1U16V2KX-3DLGP

SIO_GND

GP63/DIOD8

SLP_SUSB

GP42/DIOD8

SIO_MEM_EVENT_L

PCIRST3#

PCIRST1#

NGFF_BT_DISABLE

MPCIE_DISABLE_N

SFD_GPIO

LAN_DISABLE_N

LPC_PME_N

SIO_GPU_RST

SIO_GPU_EN

PLTRST*_SIO

KBRST_N
A20GATE

LAD3_FWH3
LAD2_FWH2
LAD1_FWH1
LAD0_FWH0

LFRAMEJ_FW4

PWROK3_2_R

SER_IRQ

DPWROK

SW_ON_N_SIO

SIO_PSON_N

RSMRST_N

MINI_POWER_CTRL

SUS_PWR_ACK_CPU

1.997V

1 2

R915 10KR2F-2-GP

12

R930
6K65R2F-GP

SC005

Change R915 from 5K1 to 10K
Change R930 from 5K1 to 6K65

2.0V

1 2

R517 10KR2F-2-GP

12

R916
2KR2F-3-GP

1.997V

1 2

R914 10KR2F-2-GP

12

R929
6K65R2F-GP

SC005

Change R915 from 5K1 to 10K
Change R929 from 5K1 to 6K65

R80151 10KR2F-2-GP(R_)

1 2

R80184 10KR2J-3-GP

R2421 10KR2J-3-GP

1 2

R348 10KR2J-3-GP

R2419 1KR2J-1-GP

1 2

R2420 10KR2J-3-GP(R_)

R2432 10KR2J-3-GP

1 2

1 2

R2422 10KR2J-3-GP

R2423 10KR2J-3-GP(R_)

1 2

R80199 10KR2J-3-GP(R_)

1 2

R855 2K2R2J-2-GP

For Braswell

R2404 10KR2F-2-GP

R354 10KR2F-2-GP(R_)

R336 1KR2J-1-GP

R330 10KR2J-3-GP(R_)
R333 10KR2J-3-GP(R_)

R2424 10KR2F-2-GP(R_)
R2425 10KR2F-2-GP(R_)
R2426 10KR2F-2-GP(R_)
R2427 10KR2F-2-GP(R_)

1 2

R921 10KR2F-2-GP(R_)

R2407 10KR2J-3-GP

R323 10KR2J-3-GP(R_)

R80215 10KR2J-3-GP(R_)

SB008

Reserved

1 2

R928 1KR2J-1-GP(R_)

SC069

change to NC

1 2

GAP-CLOSE-PWR

R391 10KR2J-3-GP

1 2

SB010

Change pull-up from V_3P3_A to SB3V

1 2

R80216 4K7R2J-2-GP

SB020

R390 10KR2J-3-GP

1 2

1 2

R80266 10KR2F-2-GP(R_)

SC074

Add R80266

SB011

1 2

R927 2KR2J-1-GP

R80218 2KR2J-1-GP(R_)

1 2

For SUSACK# used, pull-up to V_3P3_A
For PWRGD1 used, pull-up to VCC3

V_5P0_A

VCC12

SB017

Change value from 1K to 10Kohm

SB5V

VCC3

12

V_3P3_A

SC067

Change R80151 to NC
Change R80184 to STUFF

12

Change R2421 from 1K to 10K

SC070

12

12

SC072

Change to NC

1D8V_S5

VCC3

12

12

-1002

12

12
12

SB032

12
12
12
12

SB007

12

12

VCC3

12

1D8V_S5

V_3P3_A

SB009

change from SB5V to V_3P3_A

G7

SIO_GND

For EUP

SB3V

V_3P3_A

SB3V

SB011

Change pull-up from V_3P3_A to SB3V

SB3V

V_3P3_A

VCC3

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

SIO_IT8617E

SIO_IT8617E

SIO_IT8617E

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
Custom

Custom

Custom

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

24 105Tuesday, June 23, 2015

24 105Tuesday, June 23, 2015

24 105Tuesday, June 23, 2015

-1

-1

-1

5

www.teknisi-indonesia.com

4

3

2

1

SSID = Flash.ROM

D D

SPI_CS0_N

SPI_IO2

1 2

R1733 33R2J-2-GP
R1731 10R2J-2-GP
R1730 10R2J-2-GP

5/13 Allen modify
CRB no R
NB 33
PDG CLK & DATA 10, CS 33, but chceklist CS 30.

12
12

12

R169

10KR2J-3-GP

SPI_CS0_N_ROM_1
SPI_MISO_ROM_1SPI_DATAIN
SPI_WP#

SPI ROM

1D8V_SPI

12

R172

10KR2J-3-GP

SOP8 for 8Mb

1A008

U8

1

CS#

2

DO/IO1

3

WP#/IO2

4

GND

W25Q64FWSSIQ-GP

072.25Q64.0E01

Change flash part P/N

HOLD#/RESET#/IO3

VCC

CLK

DI/IO0

1A001

1 2

1D8V_SPI

12

R186

10KR2J-3-GP

8
7
6
5

SST_HOLDJ_1

SPI_CLK_1
SPI_MOSI_1

R1729 10R2J-2-GP
R1714 10R2J-2-GP
R1732 10R2J-2-GP

R1593
0R0603-PAD-2-GP-U

C116
SCD1U16V2KX-3DLGP

1 2

12
12
12

1D8V_S51D8V_SPI

SPI_IO3
SPI_CLK
SPI_DATAOUT

SC080

C C

SPI_CLK[19]

SPI_CS0_N[19]

SPI_DATAOUT[19]
SPI_DATAIN[19]
SPI_IO2[19]
SPI_IO3[19]

SRCON1

1

2
3
4 5

SKT-SPI8P-GP-U1

(D_62.10089.121)

62.10076.011

62.10089.001

8

7
6

SPI socket mount in SA stage

SSID = RTC

B B

Battery Socket
ST: 22.70017.051
FLAT: 22.70017.061

TP14

VBAT1

TPAD30

1

R199

1 2

1KR2J-1-GP

-1011

+

12

BT1
BAT-AAA-BAT-029-K01-GP-U

22.70034.011

A A

5

4

Change symbol

TP13

TPAD30

1

D6

RB551V30-GP

VBAT2

3

Battery (CR2032):

23.22063.001

VBAT1_R

K A

V_3P3_A

2

3

1

D5
BAS40C-2-GP

V_3P0_BAT_VREG

BAT1
BATTERY CR2032

(23.22063.001)

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

Title

Title

Title

Flash ROM/RTC

Flash ROM/RTC

Flash ROM/RTC

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A4

A4

A4

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

2

25 105Tuesday, June 23, 2015

25 105Tuesday, June 23, 2015

25 105Tuesday, June 23, 2015

1

-1

-1

-1

CPU FAN

www.teknisi-indonesia.com

CPU_FAN_CTRL_SIO[24]

1 2

R2602 100R2F-L1-GP-U

VCC3

12

R2603
2K2R2J-2-GP

D3
1SS355GP-GP

A K

CPU_FAN_CTRL_CONNCPU_FAN_CTRL_SIO

PWM:21-28KHz

CPU_FAN_+12V

12

C247
SC1U25V5KX-1GP

(R_)

CPU_FAN_+12V

12

R385
4K7R2J-2-GP

CPU_FAN_TACH_1 CPU_FAN_TACH_SIO

FOX-CON4-S7-GP

(R_21.61259.104)

R386
20KR2J-L2-GP

FANC2

1

2
3
4 NP1

1 2

FANC1

1

2
3
4

BAOT-CON4-S5-GP

021.60305.0104

12

R389
8K2R2F-1-GP

1A009

For Co-Layout

NP1

CPU_FAN_TACH_SIO [24]

1/14 Remove CPU FAN control circuit

VCC12

CPU_FAN_+12V

12

R80248
0R0805-PAD

ZZ.R0805.ZZZ

SB022

SC007

Change to close PAD

SYS FAN CONTROL

(Reserved)

SYS_FAN_CTRL_SIO[24]

1 2

R396 100R2F-L1-GP-U(R_)

VCC3

12

R394
2K2R2J-2-GP

(R_)

A K

PWM:21-28KHz

SB029

SC008

H1
GEN351X331R209X189-8-F-A-GP

2

3

4

5

ZZ.00PAD.DV1

1

8

6

7

D4
1SS355GP-GP

(R_)

SYS_FAN_CTRL_CONNSYS_FAN_CTRL_SIO

H2
GENS315R158-8-F-A-GP

6

7

SYS_FAN_+12V

4

5

1

8

12

C248
SC1U25V5KX-1GP

(R_)

3

2

SYS_FAN_+12V

12

R2601
4K7R2J-2-GP

(R_)

SYS_FAN_TACH_1 SYS_FAN_TACH_SIO

FANS1

1

2
3
4 NP1

FOX-CON4-S7-GP

(R_21.61259.104)

H3
GENS315R158-8-F-A-GP

4

5

6

7

3

2

1

8

SD008

1 2

R392

(R_)

20KR2J-L2-GP

FANS2

1

2
3
4

BAOT-CON4-S5-GP

021.60305.0104

(R_)

H4

3

4

5

6

GEN330R190-8-F-A-GP-U1

ZZ.AFEN8.190

20150109 H1 Change from ZZ.00PAD.BV1 to ZZ.00PAD.DV1

H4 Change to ZZ.AFEN8.190

LABEL

LBL1
LABEL

(40.3EQ13.011)

LAN ID :
F80F4105EB9A

MYLAR

M1

MYLAR MB ISOLATION

(340.03A09.0001)

2nd Source

340.03A09.1001

EMI GASKET

M2

EMI GASKET SFF CSB

(334.03A02.0001)

2nd Source

334.03A02.1001

PCB

PCB1
MAIN PCB

(1R2V6$EA)

-1(A00)
1R2V6$EA VICTORYGIA
1R2V6$FA GECS
1R2V6$HA GLOBALBRAN
1R2V6$IA WUZHU

SPONGE

M3

SPONGE CARD READER CSB SFF_1

(347.03801.0001)

2nd Source

347.03801.1001

RUBBER

M4

RUB MB SUPPORT CSB SFF

(347.03802.0001)

Change to NC

12

R395
8K2R2F-1-GP

(R_)

1A009

NP1

For Co-Layout

H5

2

7

4

1

8

5

GENS315R158-8-F-A-GP

PCB2
MAIN PCB

(1R2V6$FA)

3

6

2

7

H6

4

1

5

8

GENS315R158-8-F-A-GP

PCB3
MAIN PCB

(1R2V6$HA)

PCB4
MAIN PCB

(1R2V6$IA)

SYS_FAN_TACH_SIO [24]

2

3

1

8

6

7

UMA BACK PLATE GPU BACK PLATE

BP1

UMA Back Plate

(U_360.03D01.0001)

For UMA

360.03D01.0001

360.03D01.0011

UMA COOLER GPU COOLER

COOLER1

UMA COOLER

(U_360.03B01.0001)

For UMA

360.03B01.0001

360.03B01.0011

360.03B01.0021

360.03B01.0031

BP2

GPU Back Plate

(G_360.03D02.0001)

For GPU

360.03D02.0001

COOLER2

GPU COOLER

(G_360.03B02.0001)

For GPU

360.03B02.0001

360.03B02.0011

360.03B02.0021

360.03B02.0031

1/14 Remove SYS FAN control circuit

<Variant Name>

<Variant Name>

<Variant Name>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet of

Date: Sheet of

Date: Sheet of

SYS_FAN_+12V

FAN CIRCUITS/HOLE

FAN CIRCUITS/HOLE

FAN CIRCUITS/HOLE

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

VCC12

12

R80249
0R0805-PAD

ZZ.R0805.ZZZ

SB021

SC007

Change to close PAD

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

26 105Tuesday, June 23, 2015

26 105Tuesday, June 23, 2015

26 105Tuesday, June 23, 2015

-1

-1

-1

AUD_AVDD

www.teknisi-indonesia.com

1D5V_S0

VCC3

12

C789
SC10U10V5KX-2DLGP

AGND

12

C2701
SC10U10V5KX-2DLGP

12

C12383
SC10U10V5KX-2DLGP

LINE2_VREFO_L[29]

LINE1_L[29]

LINE1_R[29]

LINE2_L[29]
LINE2_R[29]

MIC1_L[27,29]
MIC1_R[27,29]
MIC2_L[29]

MIC2_R[29]

MIC1_VREFO_R[29]
MIC1_VREFO_L[29]
MIC2_VREFO[27,29]

V_5_CODEC

C797
SCD1U10V2KX-5DLGP

2 1

C791

SCD1U10V2KX-5DLGP

2 1

LINE1_L
LINE1_R
LINE2_L

LINE2_R

LINE2_VREFO_L

MIC1_L
MIC1_R
MIC2_L
MIC2_R

MIC1_VREFO_R
MIC1_VREFO_L
MIC2_VREFO

2 1

12

HD_LINK

AUD_LINK_SDIN[19,27]

AUD_LINK_SDO[19,27]

AUD_LINK_BCLK[19,27]

AUD_LINK_SYNC[19,27]

AUD_LINK_RST_N[19,27]

From SOC

APU_SPKR[19,27]

move C789 & C12376
closed to PIn25 & 38

C12376
SC10U10V5KX-2DLGP

ALC3600

Line1-in

MIC2_VREFO[27,29]

MIC1_L[27,29]
MIC1_R[27,29]

Mic

Front-out

Mic-in 1

Mic-in 2 pin16/17

Line2-out

pin23/24

pin35/36

pin21/22

SC10U10V5KX-2DLGP

pin14/15

AUD_AVDD

C794
SCD1U10V2KX-5DLGP

2 1

C2702
SCD1U10V2KX-5DLGP

U9623

23

LINE1_L/PORT_C_L

24

LINE1_R/PORT_C_R

14

LINE2_L/PORT_E_L

15

LINE2_R/PORT_E_R

29

LDO_IN

31

LINE2_VREFO

21

MIC1_L/PORT_B_L

22

MIC1_R/PORT_B_R

16

MIC2_L/PORT_F_L

17

MIC2_R/PORT_F_R

32

MIC1_VREFO_R

28

MIC1_VREFO_L

30

MIC2_VREFO

AGND

12

C790

AGND

1

9

25

38

DVDD

DVDD_IO

LDO_OUT1

LDO_OUT2

DVSS

AVSS126VREF

AVSS2

7

42

AUDIO_VREF

12

27

AUD_BEEP_C APU_SPKRAPU_SPKR_R

AUD_LINK_RST_N

AUD_LINK_SYNC

AUD_LINK_BCLK

12

C793

SC22P50V2JN-4DLGP

6

10

11

33

43

44

BEEP

SYNC

BITCLK

RESET#

LINE1_VREFO

LFE/PORT_G_R

CENTER/PORT_G_L

FRONT_R/PORT_D_R

GPIO02REGREF3GPIO1

PIN37_VREFO

JDREF

4

37

40

JDREF

AUD_REGREF

LINE2_VREFO_R

12

R12
20KR2F-L-GP

AGND

C130

SCD1U25V2KX-1-DL-GP

1 2

AUD_LINK_RST_N [19,27]

AUD_LINK_SYNC [19,27]

AUD_LINK_BCLK [19,27]

SENSE_A

13

34

SENSE_A

SENSE_B

SDATA_OUT

SDATA_IN

S/PDIF_OUT

EAPD

DMIC_DATA

DMIC_CLK

SURR_L/PORT_A_L

SURR_R/PORT_A_R

FRONT_L/PORT_D_L

CD_L18CD_GND19CD_R

ALC662-VD-GR-GP

20

(71.03600.00G)

1 2

C796 SC10U10V5KX-2DLGP

SC039

R208 47KR2F-GP

R210 4K7R2F-GP

1 2

R8 39K2R2F-L-GP

(64.51015.6DL)

1 2

R452 5K1R2F-3-GP

1 2

R2703 10KR2F-2-GP

1 2

R425 20KR2F-L-GP

Layout: Near Codec

AUD_LINK_SDO

5

AUD_LINK_SDIN_1

8

48
47

EAPD

45
46

39
41

35
36

LINE2_VREFO_R [29]

FRONT_L
FRONT_R

R427 33R2J-2-GP

FRONT_L [29]
FRONT_R [29]

1 2

1 2

12

LINE2_JDSENSE_B

FRONT_JD
LINEIN_JD

MIC1_JD

SC040

LINE2_JD [29]

FRONT_JD [29]
LINE1_JD [29]
MIC1_JD [29]

AUD_LINK_SDIN

APU_SPKR [19,27]

AUD_LINK_SDO [19,27]

AUD_LINK_SDIN [19,27]

D28
AZ2015-01H-GP

K A

12

AGND

12

R777
10KR2J-3-GP

V_5_CODEC

2 1

AGND

C795

SCD1U10V2KX-5DLGP

SB016

VCC3

12

R1006
10KR2J-3-GP

(R_)

1 2

EAPD

R1004 1KR2J-1-GP(R_)

1 2

R1005 1KR2J-1-GP(R_)

Q82_B

Q83_B

AUD_LINK_RST_N[19,27]

B

E

Q82
LMBT3906LT1G-1-GP

(R_)

C

B

E

Q83
LMBT3906LT1G-1-GP

(R_)

C

Q84_B

E

B

C

C792
SC10U10V5KX-2DLGP

1 2

R1007 0R2J-2-GP(R_)

Q84
LMBT3906LT1G-1-GP

(R_)

(R_)

1 2

L63
MHC1608S800QBP-GP

1 2

L50
MHC1608S800QBP-GP

R1008 10KR2J-3-GP(R_)

12

C12404
SC22U6D3V3MX-1-DL-GP

(R_)

1 2

Q84_E2Q84_E

SB023

SB5V

V_5P0_A

R423 0R0603-PAD-2-GP-U

R428 0R3J-0-U-GP(R_)

1 2

R1009

(R_)

220KR2F-GP

Q85_B

Digital

1 2

AGND

1 2

AGND

Layout: separately place round AGND

V_3P3_A

C860

(R_)

SCD1U10V2KX-5DLGP

2 1

E

B

Q85

(R_)

LMBT3906LT1G-1-GP

C

MUTE [29]

Analog

1 2

R2706 0R0603-PAD-2-GP-U

AGND

1 2

R451 0R3J-0-U-GP(R_)

AGND

1 2

R110 0R0603-PAD-2-GP-U

AGND

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Title

Title

Title

AUDIO ALC3600

AUDIO ALC3600

AUDIO ALC3600

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

Hsichih, Taipei

27 105Tuesday, June 23, 2015

27 105Tuesday, June 23, 2015

27 105Tuesday, June 23, 2015

-1

-1

-1

Blanking

www.teknisi-indonesia.com

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

28 105Tuesday, June 23, 2015

28 105Tuesday, June 23, 2015

28 105Tuesday, June 23, 2015

-1A

-1A

-1A

AUD_LINK_RST_N[19,27]

www.teknisi-indonesia.com

Front Audio Jack

MIC2_VREFO[27]

LINE2_R[27]
LINE2_L[27]
MIC2_L[27]
MIC2_R[27]

LINE2_VREFO_L[27]

LINE2_VREFO_R[27]

LINE2_VREFO_L

LINE2_VREFO_R

SLEEVE_CON

(R_)

MUTE[27,29]

SB033

FRONT_L[27]

FRONT_R[27]

MIC1_L[27]

MIC1_R[27]

LINE1_L[27]

LINE1_R

LINE1_R[27]

TC25 E100U16VM-22-GP

TC6 E100U16VM-22-GP

1 2

R80241 1KR2J-1-GP

(R_)

MUTE_AUDAMPIN_R_C

1 2

R80242 1KR2J-1-GP

(R_)

MUTE_AUDAMPIN_L_C

LINE1 IN(Port C)

1 2

C849 SC10U10V5KX-2DLGP

1 2

C850 SC10U10V5KX-2DLGP

FRONT OUT(Port D)

1 2

1 2

3

Q9642B

5

MMBT3904DW-1-GP

(R_)

4

AGND AGND

MIC1(Port B)

MIC1_VREFO_L[27]

MIC1_VREFO_R[27]

1 2

C845 SC10U10V5KX-2DLGP

1 2

C848 SC10U10V5KX-2DLGP

AUDAMPIN_L_C

AUDAMPIN_R_C

MIC1_VREFO_L

MIC1_VREFO_R

MIC1_LL_1

MIC1_RR_1

AUD_IN_LL_1

AUD_IN_RR_1

6

2

1

R975 2K2R2J-2-GP

R976 2K2R2J-2-GP

R978 75R2F-2-GP

R979 75R2F-2-GP

1 2

R2914 75R2F-2-GP

1 2

R454 75R2F-2-GP

1 2

R53 75R2F-2-GP

1 2

R52 75R2F-2-GP

Q9642A
MMBT3904DW-1-GP

(R_)

1 2

1 2

1 2

1 2

AUD_IN_LL AUDIN_L

1 2

L16 MCB1005S121FBP-GP

(68.00084.B21)

AUD_IN_RR

1 2

L51 MCB1005S121FBP-GP

(68.00084.B21)

12

R453

R2913

22KR2J-GP

22KR2J-GP

1 2

L14 MCB1005S121FBP-GP

(68.00084.B21)

1 2

L15 MCB1005S121FBP-GP

(68.00084.B21)

12

R44

R2915

22KR2J-GP

22KR2J-GP

1 2

L1 MCB1005S121FBP-GP

(68.00084.B21)

1 2

L2 MCB1005S121FBP-GP

(68.00084.B21)

12

R6
22KR2J-GP

AGND

12

C806
SC100P50V2JN-3DLGP

AGND

12

C802
SC100P50V2JN-3DLGP

AGND

12

C842

SC100P50V2JN-3DLGP

AGND

AGND

FB_AUDOUTR_L

FB_AUDOUTR_R

AGND

MIC1_LL

MIC1_RR

12

R7
22KR2J-GP

12

12

AUDIN_R

12

C55
SC100P50V2JN-3DLGP

FB_AUDOUT_L

FB_AUDOUT_R

12

C804
SC100P50V2JN-3DLGP

AUD_MIC_2L

AUD_MIC_2R

12

C841

SC100P50V2JN-3DLGP

AUDIN_R
AUDIN_L

AUD_MIC_2R
AUD_MIC_2L

LINE1_JD[27]

FRONT_JD[27]

MIC1_JD[27]

AGND

2

2

AUDIN_L
LINE1_JDLINE1_L

AUDIN_R

FB_AUDOUT_L
FRONT_JD

FB_AUDOUT_R

AUD_MIC_2L
MIC1_JD

AUD_MIC_2R

1

3

1

3

AUDIO1

32
33
34
35

22
23
24
25

2
3
4
5
1

G1
G2
G3
G4

NP1

AUDIO-JK187-GP

(22.10088.J41)

Q9625
AZ5125-02S-R7G-GP

(R_)

Q9626
AZ5125-02S-R7G-GP

(R_)

BLUE

LIME

PINK

FB_AUDOUT_R
FB_AUDOUT_L

2

Line in

Line out

Mic

1

3

Q14
AZ5125-02S-R7G-GP

(R_)

MIC2(Port F)

MIC2_VREFO

MIC2_R

ESD

HPOL_CON

HPOR_CON

2

2

1

Q24
AZ5125-02S-R7G-GP

3

1

Q57
AZ5125-02S-R7G-GP

3

(R_)

MUTE[27,29]

SB033

MIC2_L

LINE2 OUT(Port E)

LINE2_VREFO_R

LINE2_VREFO_L

LINE2_R

LINE2_L

1 2

R80243 1KR2J-1-GP

(R_)

MUTE_FP_OUT_L_C

1 2

R80244 1KR2J-1-GP

(R_)

MUTE_FP_OUT_R_C

(R_)

1 2

C269 SC4D7U10V3KX-DL-GP

1 2

C270 SC4D7U10V3KX-DL-GP

1 2

R419 2K2R2J-2-GP

1 2

R418 2K2R2J-2-GP

TC24

1 2

E100U16VM-22-GP

TC23

1 2

E100U16VM-22-GP

6

Q9643A

2

MMBT3904DW-1-GP

(R_)

1

AGND AGND

LINE2_R_C

LINE2_L_C

5

1 2

R412 1KR2F-3-GP

1 2

R414 75R2F-2-GP

1 2

R415 75R2F-2-GP

3

Q9643B
MMBT3904DW-1-GP

22KR2F-GP

(R_)

4

R2912

AGND

12

12

R2911
22KR2F-GP

1 2

R413 2K2R2J-2-GP

L6

MIC2_L_RMIC2_L_C

1 2

(68.00084.B21)

L54

HPOR_CON_1

1 2

(68.00084.B21)

L53

HPOL_CON_1

1 2

(68.00084.B21)

MCB1005S121FBP-GP

PCB trace width of
RING2 & SLEEVE at least 40 mil

MCB1005S121FBP-GP

MCB1005S121FBP-GP

12

C2902

SC100P50V2JN-3DLGP

LINE2_JD[27]

12

C2901

SC100P50V2JN-3DLGP

AGND

SLEEVE_CON

HPOR_CON
HPOL_CON

LINE2_JD

12

C274

SC100P50V2JN-3DLGP

AGND

CTIA (Apple) Standard Headset

oTip: Left audio
oRing1: Right audio
oRing2: Ground
oSleeve: Microphone

UAJ1

4
3
2
1

5
6
7

8
NP1
NP2

AUDIO-JK478-GP

(022.10002.0A81)

SC009

20150105 change UAJ1 from

022.10002.0621 to

022.10002.0A81

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd

21F, 88, Hsin Tai Wu Rd
Hsichih, Taipei

Hsichih, Taipei

Title

Title

Title

AUDIO JACK

AUDIO JACK

AUDIO JACK

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev
D

D

D

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

Date: Sheet of

Hsichih, Taipei

29 105Tuesday, June 23, 2015

29 105Tuesday, June 23, 2015

29 105Tuesday, June 23, 2015

-1

-1

-1

5

www.teknisi-indonesia.com

D D

C C

4

3

2

1

Blanking

B B

Wistron Incorporated

Wistron Incorporated

Wistron Incorporated

12F, 88, Hsin Tai Wu Rd

12F, 88, Hsin Tai Wu Rd

A A

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Rosa_Lily SFF

Rosa_Lily SFF

Rosa_Lily SFF

Date: Sheet of

Date: Sheet of

5

4

3

Date: Sheet of

2

12F, 88, Hsin Tai Wu Rd

Hsichih, Taipei

Hsichih, Taipei

Hsichih, Taipei

30 105Tuesday, June 23, 2015

30 105Tuesday, June 23, 2015

30 105Tuesday, June 23, 2015

1

-1A

-1A

-1A