Dell VM9M Schematics

1

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VER : F3B

VM9M Block Diagram Intel UMA

A A

FAN & THERMAL

EMC1423-1-AIZL-TR

PG 31

CLOCK

SLG8SP513V (QFN-64)

PG 17

LVDS

POWER

AC/BATT CONNECTOR

PG 42

BATT CHARGER

RUN POWER SW

+3.3V_SUS/+5V_SUS

+5V/+3.3V/+1.8V

PG 36

PG 41

Penryn

(478 Micro-FCPGA)

PG 3,4

800/1066 MHz

Cantiga

B B

DDR2-SODIMM*2

667/800 MHZ DDR II

1299 uFCBGA

VGA

POWER

+1.5V_RUN/+1.05V_VCCP

REGULATOR

+1.8V_SUS /+0.9V_DDR_V TT

PG 37

CPU VRREGULATOR

REGULATOR

+3.3V_ALW /+5V_SUS/+ 15V_ALW

PG 38

Panel Connector (WXGA)

CRT CONN.

PG 39

PG 40

PG 17

PG 19

PG 15,16

PG 5,6,7,8,9,10

DMI interface

SATA-ODD

SATA

PG 28

SATA-HDD

PG 28

C C

Bluetooth

PG 26

SATA

USB 2.0

IHDA

ICH9-M

676 BGA

PG 11,12,13,14

PCIE PCIE

PCIE

PCIE USB2.0

USB2.0

RTL8111DL

GLAN

MINI-CARD

WLAN

EXPRESS-CARD34

USB conn x 2

PG 34

PG 26

RJ45/Magnetics

PG 34

PG 21

PG 27

USB conn x 2

Board to board

PG 33

LPC

AUDIO/AMP

CX20583-10z

USB2.0

MODEM (AMOM)

Panel Connector (To CCD)

PG 18

CX20548-11Z

PG 32

Audio SPK

D D

conn 2Wx1

Audio Jacks x2

PG 32

Board to board

RJ-11conn

PG 33

KBC

ITE8502

SPI PS/2

FLASH 2M bytes

18X8

Touchpad

Keyboard

USER INTERFACE

PCIE

PG 29

PG 30

3-in-1 Card Reader

R5U230(1394a+Media)

Board to board

PG 33PG 23

PG 24 PG 29

1

2

3

4

5

6

Card Reader CONN.

1394a CONN

QUANTA

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COMPUTER

Title

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Date: Sheet

COMPUTER

Schematic Block Diagram

VM9M 1A

7

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1 46Monday, June 08, 2009

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Table of Contents Power States

PAGE DESCRIPTION

1

Schematic Block Diagram

2

Front Page

Penryn

3-4

Cantiga

5-10

ICH9M

A A

B B

C C

11-14

15-16

DDRII SO-DIMM(200P)

17

Clock Generator

18

LCD Conn.

19

CRT Conn

Express card

21

SIO (ITE8512)

23

FLASH/RTC

24

BLANK PAGE

25

Mini Card / BT

26

USB

27

28

SATA Conn

29

TP / KEYBOARD

30

SWITCH /LED

31

FAN & Thermal

32

Audio CODEC/Phone Jack

33

Board To Board

34

LAN / TRANSFORM

BLANK PAGE

35

Battery Selector & Charger

36

1.05VCCP / 1.5VRUJN

37

38

DDR2_1.8VSUS, 0.9V CPU_MAX17410(2p hase)

39

40

MAX17020 (+5.5V,+3,3V)

RUN Power Switch

41

DCIN,Batt

42

PAD& SCREW

43

EMI CAP

44

SMBUS BLOCK

45

Power Block Dianram

46

POWER PLANE

+PW R_SRC

+RTC_CELL

+3.3V_ALW

+5V_ALW 2

+15V_ALW

+3.3V_LAN

+5V_SUS

+3.3V_SUS

+1.8V_SUS

+0.9V_DDR_VTT

+5V_RUN

+3.3V_RUN

+1.5V_RUN

+1.05V_VCCP

+VCC_CORE

+LCDVCC

+5V_MOD

+5V_HDD

+PBATT

10V~+19V

+3.0V~+3.3V

+3.3V

+5V

+15V

+3.3V

+5V

+3.3V

+1.8V

+0.9V

+5V

+3.3V

+1.5V

+1.05V

+0.7V~+1.77V

+3.3V

+5V

4,18,24,36,37,3,8,39,40,44

11,14,23,24

3,23,24,30,35,36,38,40,41,42,45

37,38,40,41,42

11,18,40,41

34

14,27,30,39,40,41,44

3,11,12,13,14,18,25,30,37,39,41,45

6,8,9,15,37,38,41

16,38,41

14,18,19,21,25,28,29,30,31,32,41,44

3,6,8,9,11,12,13,14,15,17,30,31,32,34,18,19, 20,21,23,25,26,28,41,44,45

4,9,14,26,37,41,44

3,4,6,8,9,11,14,37,44

4,39

18

28

42

DESCRIPTION ACTIVE INVOLTAGE PAGE

MAIN POWER

RTC

8051 POW ER

LCD/CHARGE POW ER

LARGE POW ER

LAN POW ER

SLP_S5# CTRLD POW ER

SODIMM POWER

SLP_S3# CTRLD POW ER

CALISTOGA/ICH8 POWER

CPU/CALISTOGA/ICH8 POWER

CPU CORE POW ER

LCD Power

Module Power

HDD Power

MAIN BATTERY+10V~+17V

CONTROL SIGNAL

ALW ON

+5V_ALW

SUS_ON

3.3V_SUS_ON

DDR_ON

0.9V_DDR_VTT_ON

RUN_ON

3.3V_RUN_ON

1.5V_RUN_ON

1.05V_RUN_ON

IMVP_VR_ON

LCDVCC_TST_EN & ENVDD

CHG_PBATT

S0~S5

GND PLANE PAGE DESCRIPTION

GND

D D

1

2

3

ALL

QUANTA

QUANTA COMPUTER

COMPUTER

Title

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Date: Sheet

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6

Date: Sheet

COMPUTER

Index & Power Status

VM9M 1A

7

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2 46Wednesday, June 03, 2009

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H_A#[3..16][5]

A A

H_ADSTB#0[5] H_REQ#[0..4][5]

H_A#[17..35][5]

B B

H_ADSTB#1[5]

H_A20M#[11]

H_FERR#[11]

H_IGNNE#[11]

H_STPCLK#[11] H_INTR[11] H_NMI[11] H_SMI#[11]

C C

H_A#[3..16]

H_REQ#[0..4]

H_A#[17..35]

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

Populate ITP700Flex for bringup

ITP_BPM#5

ITP_TDO

ITP_TMS

ITP_TDI

R92 56R92 56

D D

R9356R93

R94 56R94 56

R96 *56_NCR96 *56_NC

R95 56R95 56

R97 56R97 56

1 2

56

1 2

1

1 2

ITP_TCK

ITP_TRST#

U16A

J4

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

Quard Core Only

F6

TDI_1/RSV

D3

TDO_2/RSV

N5

BMP_1#[0]/RSV

M4

BMP_1#[1]/RSV

B2

BMP_1#[2]/RSV

AE8

BMP_1#[3]/VSS

D8

DCLKPH_1/VSS

F8

ACLKPH_1/VSS

D22

GTLREF_2/RSV

T2

THRMDA_1/RSV

V3

THRMDC_1/RSV

AA8

HFPLL_1/VSS

AC8

SPARE_1[4]/VSS

AA7

BR1#/VCC

Penryn Ball-out Rev 1a

+1.05V_VCCP

Layout Note: Place R92~R97 close to CPU

2

ADDR GRO UP 0 ADDR GRO UP 1

ADS# BNR#

BPRI#

DEFER#

DRDY# DBSY#

BR0#

CONTROL XDP/ITP SIGNALS

IERR#

INIT#

LOCK#

RESET#

RS[0]# RS[1]# RS[2]#

TRDY#

HIT#

HITM#

BPM[0]# BPM[1]# BPM[2]# BPM[3]#

PRDY# PREQ#

TCK

TDO TMS

TRST#

DBR#

THERMAL

PROCHOT#

THERMDA

THERMDC

ICH

THERMTRIP#

H CLK

BCLK[0] BCLK[1]

RSVD[06]

TDI

H1 E2 G5

H5 F21 E1

F1

D20 B3

H4

C1 F3 F4 G3 G2

G6 E4

AD4 AD3 AD1 AC4 AC2 AC1 AC5 AA6 AB3 AB5 AB6 C20

D21 A24 B25

C7

A22 A21

D2

H_IERR#

Reserve from EMI

ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5 ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST# ITP_DBRESET#

R16 56R16 56

H_PROCHOT# H_THERMDA H_THERMDC

H_THERMTRIP#

R26 56R26 56

1 2

H_ADS# [5] H_BNR# [5] H_BPRI# [5]

H_DEFER# [5] H_DRDY# [5] H_DBSY# [5] H_BR0# [5]

H_INIT# [11]

H_LOCK# [5]

R90 0 603R90 0 603

H_RS#0 [5] H_RS#1 [5] H_RS#2 [5] H_TRDY# [5]

H_HIT# [5] H_HITM# [5]

+1.05V_VCCP

H_THERMTRIP# [6,11]

CLK_CPU_BCLK [17] CLK_CPU_BCLK# [17]

Place under CPU

10/20mils

2

H_THERMDA

H_THERMDC

MMST3904-7-F

REM_DIODE1_P

Q4

1 3

REM_DIODE1_N

Cap should close to thermal IC

3

+1.05V_VCCP

1 2

T30PAD T30PAD T34PAD T34PAD T112PAD T112PAD T29PAD T29PAD T111PAD T111PAD

T114PAD T114PAD

T1PAD T1PAD

T32PAD T32PA D

12

C413

C413 2200P

2200P

50

C408

C408 2200P

2200P

50

H_RESET# [5]

Layout Note: Place voltage divider within

0.5" of GTLREF pin

+1.05V_VCCP

R290

R290 1K/F

1K/F

1 2

12

R289

R289 2K/F

2K/F

+3.3V_RUN

12

C416

0.1U

16

16 402

402

4

H_D#[0..63][5]

H_DSTBN#0[5] H_DSTBP#0[5] H_DINV#0[5]

H_D#[0..63][5]

H_DSTBN#1[5] H_DSTBP#1[5] H_DINV#1[5]

R14 *1K/F_ NCR14 *1K/F_ NC R17 *1K/F_ NCR17 *1K/F_ NC

CPU_MCH_BSEL0[6,17] CPU_MCH_BSEL1[6,17] CPU_MCH_BSEL2[6,17]

COMP0 COMP1 COMP2 COMP3

Comp0,2 connect with Zo=27.4o hm,Comp1,3 connect with Zo=55ohm, make those traces length shorter than 0.5".Trace should be at least 25 mil s away from an y other toggling signal .

U17

1

VDD

2

DP1

3

DN1

4

DP2

5

DN2

EMC1423-1-AIZL-TR

SCL

SDA

ALERT#

SYS_SHDN#

GND

OTP 100 degree C

H_D#[0..63] H_D#[0..63]

H_D#[0..63]

12 12

T96PAD T96PAD T97PAD T97PAD T110PAD T 110PAD T95PAD T95PAD T33PAD T33PAD

R99

54.9/F

1 2

SMBCLK1

10

SMBDAT1

9

THERM_ALERT#

8

SYS_SHDN#

7

6

5

R98

27.4/F

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31

V_CPU_GTLREF CPU_TEST1 CPU_TEST2 CPU_TEST3 CPU_TEST4 CPU_TEST5 CPU_TEST6 CPU_TEST7

R18

54.9/F

1 2

+3.3V_RUN

E22

F24 E26 G22

F23 G25 E25 E23 K24 G24

J24

J23 H22

F26 K22 H23

J26 H26 H25

N22 K25 P26 R23

L23 M24

L22 M23 P25 P23 P22 T24 R24

L25 T25 N25

L26 M26 N24

AD26

C23 D25 C24

AF26

AF1

A26

C3 B22 B23 C21

R19

27.4/F

SMBCLK1 [17,18,23]

SMBDAT1 [17,18,23]

THERM_ALERT# [13]

R331

6.8K/F

Stephen 5/7

1 2

2N7002W-7-F

6

U16B

D[0]# D[1]# D[2]# D[3]# D[4]# D[5]# D[6]# D[7]# D[8]# D[9]# D[10]# D[11]# D[12]# D[13]# D[14]# D[15]# DSTBN[0]# DSTBP[0]# DINV[0]#

D[16]# D[17]# D[18]# D[19]# D[20]# D[21]# D[22]# D[23]# D[24]# D[25]# D[26]# D[27]# D[28]# D[29]# D[30]# D[31]# DSTBN[1]# DSTBP[1]# DINV[1]#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 BSEL[0] BSEL[1] BSEL[2]

Penryn Ball-out Rev 1a

FSB

533 0 0

667

800

DATA GRP 0

DATA GRP 1

MISC

D[32]# D[33]# D[34]# D[35]# D[36]# D[37]#

DATA GRP 2

D[38]# D[39]# D[40]# D[41]# D[42]# D[43]# D[44]# D[45]# D[46]#

D[47]# DSTBN[2]# DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

DATA GRP 3

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]# DSTBN[3]# DSTBP[3]#

DINV[3]#

COMP[0] COMP[1] COMP[2] COMP[3]

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

BCLK

133

166

200

SLP#

PSI#

to EC

Q29

31

2

Title

Size Document Number Rev

Date: Sheet

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

BSEL2 BSEL 1 BSE L0

0

0 0 02661066

THERM_STP# [40]

Penryn Processor (HOST BUS)

VM9M 1A

H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47

H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

COMP0 COMP1 COMP2 COMP3

1

QUANTA

QUANTA COMPUTER

COMPUTER

7

H_D#[0..63] [5]

H_DSTBN#2 [5] H_DSTBP#2 [5]

H_D#[0..63]

Note: H_DPRTSTP need to daisy chain from ICH9 to IM VP6 to CPU.

H_DINV#2 [5]

H_D#[0..63] [5]

H_DSTBN#3 [5] H_DSTBP#3 [5] H_DINV#3 [5]

H_DPRSTP# [6,11,39] H_DPSLP# [11] H_DPWR# [5] H_PWRGOOD [11] H_CPUSLP# [5] H_PSI# [39]

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+VCC_CORE +VCC_CORE

+VCC_CORE

A A

+VCC_CORE

All use 10U 4V(+-20%,X6S,0805)Pb-Free.

C147

C147 10U

10U

805

805 4

4

C87

C87 10U

10U

805

805 4

4

12

C136

C136 *10U_NC

*10U_NC

805

805 4

4

C71

C71 *10U_NC

*10U_NC

805

805 4

4

12

C124

C124 10U

10U

805

805 4

4

12

C57

C57 10U

10U

805

805 4

4

12

C110

C110 10U

10U

805

805 4

4

12

C142

C142 10U

10U

805

805 4

4

12

C98

C98 10U

10U

805

805 4

4

12

C82

C82 10U

10U

805

805 4

4

8 inside cavity, north side, secondary layer.

+VCC_CORE

C111

C111 10U

10U

805

805 4

4

C387

C387 10U

10U

805

805 4

4

12

B B

+VCC_CORE

12

C73

C73 *10U_NC

*10U_NC

805

805 4

4

C392

C392 *10U_NC

*10U_NC

805

805 4

4

12

C138

C138 *10U_NC

*10U_NC

805

805 4

4

C88

C88 10U

10U

805

805 4

4

12

C371

C371 10U

10U

805

805 4

4

12

C379

C379 10U

10U

805

805 4

4

12

C83

C83 10U

10U

805

805 4

4

12

C375

C375 10U

10U

805

805 4

4

8 inside cavity, south side, secondary layer.

+VCC_CORE

C148

C148 10U

10U

805

805 4

4

12

C383

C383 10U

10U

805

805 4

4

12

C143

C143 10U

10U

805

805 4

4

12

C127

C127 10U

10U

805

805 4

4

12

C101

C101 10U

10U

805

805 4

4

12

C372

C372 *10U_NC

*10U_NC

805

805 4

4

6 inside cavity, north side, primary layer.

+VCC_CORE

C C

12

C393

C393 10U

10U

805

805 4

4

12

C388

C388 *10U_NC

*10U_NC

805

805 4

4

12

C384

C384 10U

10U

805

805 4

4

12

C376

C376 *10U_NC

*10U_NC

805

805 4

4

12

C380

C380 10U

10U

805

805 4

4

12

C60

C60 10U

10U

805

805 4

4

6 inside cavity, south side, primary layer.

+1.05V_VCCP

12

Layout out: Place these inside socket cavity on North side secondary.

D D

C125

0.1U

402

402 16

16

12

C56

0.1U

402

402 16

16

12

C99

0.1U

402

402 16

16

12

C126

0.1U

402

402 16

16

12

C59

0.1U

402

402 16

16

12

C100

0.1U

402

402 16

16

U16C

A7

VCC[001]

A9

VCC[002]

A10

VCC[003]

A12

VCC[004]

A13

VCC[005]

A15

VCC[006]

A17

VCC[007]

A18

VCC[008]

A20

VCC[009]

B7

VCC[010]

B9

VCC[011]

B10

VCC[012]

B12

VCC[013]

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA9

VCC[052]

AA10

VCC[053]

AA12

VCC[054]

AA13

VCC[055]

AA15

VCC[056]

AA17

VCC[057]

AA18

VCC[058]

AA20

VCC[059]

AB9

VCC[060]

AC10

VCC[061]

AB10

VCC[062]

AB12

VCC[063]

AB14

VCC[064]

AB15

VCC[065]

AB17

VCC[066]

AB18

VCC[067]

Penryn Ball-out Rev 1a

VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]

VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]

VCCA[01] VCCA[02]

VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]

VCCSENSE

VSSSENSE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

.

VCCSENSE

VSSSENSE

+1.05V_VCCP

12

+

C361

+

C361 220U

220U

3528

3528 4

4

VID0 [39] VID1 [39] VID2 [39] VID3 [39] VID4 [39] VID5 [39] VID6 [39]

VCCSENSE [39]

VSSSENSE [39]

+1.5V_RUN

12

Layout Note: Place C363 near PIN B26.

VCCSENSE VSSSENSE

Layout Note: Route VCCSENSE and VSSSENSE traces at 27.4o hms and length matched to within 25 mil. Place PU and PD within 2 inch of CPU.

C365

0.01U

25

+VCC_CORE

12

R78

R78 100/F

100/F

R79

R79 100/F

100/F

C360

C360 10U

10U

805

805 4

4

U16D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080] VSS[081]P3VSS[162]

Penryn Ball-out Rev 1a

VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106] VSS[107] VSS[108] VSS[109] VSS[110]

VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128]

VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146]

VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161]

VSS[163]

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5

AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6

AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4

AE11 AE14 AE16

.

AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

1

2

3

4

5

6

Date: Sheet

COMPUTER

Penryn Processor (POWER)

VM9M 1A

7

of

4 46Wednesday, June 03, 2009

8

1

2

3

4

5

6

7

8

U15A

M11

N12

P13

N10

AD14

Y10 Y12 Y14

AA8

AA13

AA9 AA11 AD11 AD10 AD13 AE12

AE9

AA2

AD8

AA3

AD3

AD7 AE14

AF3

AC1

AE3

AC3 AE11

AE8

AG2

AD6

C12

E11

A11

B11

W2

F2

G8

F8 E6 G2 H6 H2

F6 D4 H3 M9

J1

J2

J6 P2

L2 R2 N9

L6 M5

J3 N2 R1 N5 N6

N8

L7

M3 Y3

Y6

Y7

Y9

C5 E3

U15A

H_D#_0 H_D#_1 H_D#_2 H_D#_3 H_D#_4 H_D#_5 H_D#_6 H_D#_7 H_D#_8 H_D#_9 H_D#_10 H_D#_11 H_D#_12 H_D#_13 H_D#_14 H_D#_15 H_D#_16 H_D#_17 H_D#_18 H_D#_19 H_D#_20 H_D#_21 H_D#_22 H_D#_23 H_D#_24 H_D#_25 H_D#_26 H_D#_27 H_D#_28 H_D#_29 H_D#_30 H_D#_31 H_D#_32 H_D#_33 H_D#_34 H_D#_35 H_D#_36 H_D#_37 H_D#_38 H_D#_39 H_D#_40 H_D#_41 H_D#_42 H_D#_43 H_D#_44 H_D#_45 H_D#_46 H_D#_47 H_D#_48 H_D#_49 H_D#_50 H_D#_51 H_D#_52 H_D#_53 H_D#_54 H_D#_55 H_D#_56 H_D#_57 H_D#_58 H_D#_59 H_D#_60 H_D#_61 H_D#_62 H_D#_63

H_SWING H_RCOMP

H_CPURST# H_CPUSLP#

H_AVREF H_DVREF

CANTIGA_1p0

4

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31 H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS# H_ADSTB#_0 H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

HOST

H_DPWR#

H_DRDY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0

H_RS#_1

H_RS#_2

For EA test use

H_DSTBP#0

1

ET10ET10

H_D#7

1

ET2ET2

H_D#12

1

ET14ET14

H_DSTBN#1

1

ET9ET9

H_DSTBP#1

1

ET8ET8

H_D#29

1

ET13ET13

H_D#21

1

ET3ET3

H_D#32

1

ET18ET18

H_A#3

A14

H_A#4

C15

H_A#5

F16

H_A#6

H13

H_A#7

C18

H_A#8

M16

H_A#9

J13

H_A#10

P16

H_A#11

R16

H_A#12

N17

H_A#13

M13

H_A#14

E17

H_A#15

P17

H_A#16

F17

H_A#17

G20

H_A#18

B19

H_A#19

J16

H_A#20

E20

H_A#21

H16

H_A#22

J20

H_A#23

L17

H_A#24

A17

H_A#25

B17

H_A#26

L16

H_A#27

C21

H_A#28

J17

H_A#29

H20

H_A#30

B18

H_A#31

K17

H_A#32

B20

H_A#33

F21

H_A#34

K21

H_A#35

L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

5

H_D#[0..63]

H_RESET#[3]

H_CPUSLP#[3]

12

C368

0.1U

402

402 16

16

Layout Note: Place the 0.1 u F decoupling capacitor within 100 mils from GMCH pins.

3

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

H_REF

C31

0.1U

1 2

16

16 402

402

+1.05V_VCCP

H_D#[0..63][3]

R294

R294 1K/F

1K/F

A A

+1.05V_VCCP

12

R21

R21 221/F

221/F

H_SWING

12

R22

R22 100/F

100/F

B B

H_RCOMP

R23

24.9/F

Layout Note:

1 2

H_RCOMP trace should be 10-mil wide with 20-mil spacing.

C C

1 2

12

R295

R295 2K/F

2K/F

D D

1

2

H_A#[3..35]

H_ADS# [3] H_ADSTB#0 [3] H_ADSTB#1 [3] H_BNR# [3] H_BPRI# [3] H_BR0# [3] H_DEFER# [3] H_DBSY# [3] CLK_MCH_BCLK [17] CLK_MCH_BCLK# [17] H_DPWR# [3] H_DRDY# [3] H_HIT# [3] H_HITM# [3] H_LOCK# [3] H_TRDY# [3]

H_DINV#0 [3] H_DINV#1 [3] H_DINV#2 [3] H_DINV#3 [3]

H_DSTBN#0 [3] H_DSTBN#1 [3] H_DSTBN#2 [3] H_DSTBN#3 [3]

H_DSTBP#0 [3] H_DSTBP#1 [3] H_DSTBP#2 [3] H_DSTBP#3 [3]

H_REQ#0 [3] H_REQ#1 [3] H_REQ#2 [3] H_REQ#3 [3] H_REQ#4 [3]

H_RS#0 [3] H_RS#1 [3] H_RS#2 [3]

6

H_A#[3..35] [3]

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

Cantiga (HOST)

VM9M 1A

7

of

5 46Wednesday, June 03, 2009

8

5

U15B

CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20

AH10 AH12 AH13

AL34 AK34 AN35 AM35

AY21

BG23 BF23 BH18 BF18

AT40 AT11

BG48 BF48 BD48 BC48 BH47 BG47 BE47 BH46 BF46 BG45 BH44 BH43

M36

N36 R33 T33 AH9

K12

T24

B31 AJ6

M1

A47

T25 R25 P25 P20 P24 C25 N24

M24

E21 C23 C24 N21 P21 T21 R20

M20

L21 H21 P29 R28 T28

R29

B7 N33 P32

T20 R32

BH6 BH5

BG4

BH3 BF3 BH2

BG2

BE2

BG1

BF1

BD1 BC1

F1

U15B

RSVD1 RSVD2 RSVD3 RSVD4 RSVD5 RSVD6 RSVD7 RSVD8 RSVD9 RSVD10 RSVD11 RSVD12 RSVD13 RSVD14

RSVD15 RSVD16 RSVD17

RSVD20

RSVD21 RSVD22 RSVD23 RSVD24 RSVD25

CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20

PM_SYNC# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR

NC_1 NC_2 NC_3 NC_4 NC_5 NC_6 NC_7 NC_8 NC_9 NC_10 NC_11 NC_12 NC_13 NC_14 NC_15 NC_16 NC_17 NC_18 NC_19 NC_20 NC_21 NC_22 NC_23 NC_24 NC_25

CANTIGA_1p0

+1.8V_SUS +VCC_PEG

R56

R56 1K/F

1K/F

SM_RCOMP_VOH

12

C120

0.01U

25

D D

C C

B B

25

SM_RCOMP_VOL

12

C112

0.01U

25

+3.3V_RUN

R69 10KR69 10K

1 2

R63 10KR63 10K

1 2

Layout Note: Location of all MCH_CFG strap resistors needs to be close to minmize stub.

CPU_MCH_BSEL0[3,17] CPU_MCH_BSEL1[3,17] CPU_MCH_BSEL2[3,17]

PM_BMBUSY#[ 13]

H_DPRSTP#[3,11,39] PM_EXTTS#0[15] PM_EXTTS#1[15] PWROK[13,23]

H_THERMTRIP#[3,11]

DPRSLPVR[13,39]

PLTRST#[12,21,23,26,33,34]

1 2

12

C132

2.2U

805

R73

10

3.01K/F

12

C131

R48

2.2U

805

1K/F

10

1 2

PM_EXTTS#0 PM_EXTTS#1

T4PAD T4PAD

PAD

T11

T11 T35PAD T35PAD

T14PAD T14PAD

T13

T13 PAD

PAD

T8

PADT8PAD

T42PAD T42PAD

T12

PAD

T6

PADT6PAD PADT7PAD

T7

PAD

T10

T10 T3

PADT3PAD

T91

PAD

T118

PAD

T9

PADT9PAD PADPAD

T94

PAD

T115

PAD

PM_EXTTS#0 PM_EXTTS#1

PLTRST#_R H_THERMTRIP#

R292

100

PLTRST#_R

12

NC

RSVD

CFG

PM

4

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1

SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1

SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

DDR CONTROL/COMPENSATION

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_ CLK

DPLL_REF_ CLK#

DPLL_REF_ SSCLK

DPLL_REF_ SSCLK#

PEG_CLK

CLK

PEG_CLK#

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2 DMI_TXN_3

DMI_TXP_0

DMI

DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

GRAPHICS VID

CL_DATA

CL_PWROK

CL_RST#

MEHDA

CL_VREF

DDPC_CTRLCL K

DDPC_CTRLDAT A

SDVO_CTRLCL K

SDVO_CTRLDAT A

CLKREQ#

ICH_SYNC#

MISC

HDA_BCLK HDA_RST#

HDA_SDO

HDA_SYNC

CL_CLK

TSATN

HDA_SDI

AP24 AT21 AV24 AU20

AR24 AR21 AU24 AV20

BC28 AY28 AY36 BB36

BA17 AY16 AV16 AR13

BD17 AY17 BF15 AY13

BG22 BH21

BF28 BH28

AV42 AR36 BF17 BC36

B38 A38 E41 F41

F43 E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

C34

AH37 AH36 AN36 AJ35 AH34

N28 M28 G36 E36 K36 H36

B12

B28 B30 B29 C29 A28

SMRCOMPP SMRCOMPN

SM_RCOMP_VOH SM_RCOMP_VOL

MCH_CLVREF

M_CLK_DDR0 [15] M_CLK_DDR1 [15] M_CLK_DDR3 [15] M_CLK_DDR4 [15]

M_CLK_DDR#0 [15] M_CLK_DDR#1 [15] M_CLK_DDR#3 [15] M_CLK_DDR#4 [15]

DDR_CKE0_DIMMA [15,16] DDR_CKE1_DIMMA [15,16] DDR_CKE3_DIMMB [15,16] DDR_CKE4_DIMMB [15,16]

DDR_CS0_DIMMA# [15,16] DDR_CS1_DIMMA# [15,16] DDR_CS2_DIMMB# [15,16] DDR_CS3_DIMMB# [15,16]

M_ODT0 [15,16] M_ODT1 [15,16] M_ODT2 [15,16] M_ODT3 [15,16]

V_DDR_MCH_REF_L

R32 499/FR32 499/F

1 2

T24 PADT24 PAD

MCH_DREFCLK [17] MCH_DREFCLK# [17] DREF_SSCLK [17] DREF_SSCLK# [17]

CLK_MCH_3GPLL [17] CLK_MCH_3GPLL# [17]

DMI_MRX_ITX_N0 [12] DMI_MRX_ITX_N1 [12] DMI_MRX_ITX_N2 [12] DMI_MRX_ITX_N3 [12]

DMI_MRX_ITX_P0 [12] DMI_MRX_ITX_P1 [12] DMI_MRX_ITX_P2 [12] DMI_MRX_ITX_P3 [12]

DMI_MTX_IRX_N0 [12] DMI_MTX_IRX_N1 [12] DMI_MTX_IRX_N2 [12] DMI_MTX_IRX_N3 [12]

DMI_MTX_IRX_P0 [12] DMI_MTX_IRX_P1 [12] DMI_MTX_IRX_P2 [12] DMI_MTX_IRX_P3 [12]

T105 PADT105 PAD T100 PADT100 PAD T21 PADT21 PAD T18 PADT18 PAD T20

T20

PAD

PAD T104

T104

CL_CLK0 [13] CL_DATA0 [13] ICH_CL_PWROK [13,23] ICH_CL_RST0# [13]

T16 PADT16 PAD T19 PADT19 PAD T23 PADT23 PAD T22 PADT22 PAD

CLK_3GPLLREQ# [17] MCH_ICH_SYNC# [13]

R296 56R296 56

12

T98 PADT98 PAD T103 PADT103 PAD T101 PADT101 PAD T102 PADT102 PAD T99

T99

PAD

+1.8V_SUS

+1.05V_VCCP

1 2

R87

R87 *1K/F_NC

*1K/F_NC

R86

R86 *1K/F_NC

*1K/F_NC

R55

R55 150/F

150/F

1 2

3

+3.3V_RUN

R80 2.2KR80 2.2K R75 2.2KR75 2.2K

V_DDR_MCH_REF

VGA_BLU VGA_GRN VGA_RED

R49

R53

150/F

1 2

+1.05V_VCCP

Non-iAMT

MCH_CLVREF

C144

0.1U

1 2

16

16 402

402

LCD_DDCCLK

12

LCD_DDCDAT

12

+1.8V_SUS

R47

80.6/F

SMRCOMPP SMRCOMPN

R43

80.6/F

Layout Note: Place 150 ohm termination resistors close to GMCH.

R68

R68 1K/F

1K/F

1 2

12

R77

R77 499/F

499/F

+3.3V_RUN

R65 10K/FR65 10K/F

R70 10K/FR70 10K/F

L_IBG

R83

2.4K/F

1 2

12

G_CLK_DDC2[19] G_DAT_DDC2[19]

CFG5

CFG9

CFG16

CFG19

CFG20

SDVO_CRTL_DATA

BIA_PWM[18] PANEL_BKEN[23]

LCD_DDCCLK[18] LCD_DDCDAT[18]

ENVDD[18]

LCD_ACLK-[18] LCD_ACLK+[18]

LCD_A0-[18] LCD_A1-[18] LCD_A2-[18]

LCD_A0+[18] LCD_A1+[18] LCD_A2+[18]

VGA_BLU[19]

VGA_GRN[19]

VGA_RED[19]

VGAHSYNC[19]

VGAVSYNC[ 19]

DMI X2 Select

PCI Express Graphic Lane

FSB Dynamic ODT

DMI Lane Reversal

SDVO/PCIE Concurrent Operation

SDVO Present.

2

U15C

L32

G32

L_CTRL_CLK

M32

L_CTRL_DATA

M33

LCD_DDCCLK

K33

LCD_DDCDAT

J33

M29

L_IBG

C44

T31PAD T31PAD

T106PAD T106PAD T107PAD T107PAD

T108PAD T108PAD T26PAD T26PAD T25PAD T25PAD

T109PAD T109PAD T27PAD T27PAD T28PAD T28PAD

R52 75/F_4R52 75/F_4 R45 75/F_4R45 75/F_4 R46 75/F_4R46 75/F_4

VGA_BLU

VGA_GRN

VGA_RED

R58 30/FR58 30/F

1 2

R64 1.3K/FR64 1.3K/F

1 2

R66 30/FR66 30/F

1 2

Low=DMIx2 High=DMIx4(Default)

Low= Reveise La ne High=Normal operation

Low=Dynamic ODT Disable High=Dynamic ODT Enable(default).

Low=Normal(default). High=Lane Rever sed

Low=Only SDVO o r PCIEx1 is operational (de faults) High=SDVO and PCIEx1 are operating simultaneously via PEG port

Low=No SDVO Device Present (default) High=SDVO Devic e Present

B43 E37

E38 C41 C40

B37

A37

H47

E46 G40

A40

H48 D45

F40

B40

A41

H38 G37

J37

B42 G38

F37

K37

F25

H25

K25

H24

C31

E32

E28

G28

J28

G29

H32

J32

J29 E29 L29

CANTIGA_1p0

L_BKLT_CT RL L_BKLT_EN L_CTRL_ CLK

L_CTRL_ DATA L_DDC_CLK L_DDC_DAT A

L_VDD_EN LVDS_IBG LVDS_VBG LVDS_VREFH LVDS_VREFL LVDSA_CLK# LVDSA_CLK LVDSB_CLK# LVDSB_CLK

LVDSA_DATA#_0 LVDSA_DATA#_1 LVDSA_DATA#_2 LVDSA_DATA#_3

LVDSA_DATA_0 LVDSA_DATA_1 LVDSA_DATA_2 LVDSA_DATA_3

LVDSB_DATA#_0 LVDSB_DATA#_1 LVDSB_DATA#_2 LVDSB_DATA#_3

LVDSB_DATA_0 LVDSB_DATA_1 LVDSB_DATA_2 LVDSB_DATA_3

TVA_DAC TVB_DAC TVC_DAC

TV_RTN

TV_DCONSEL_0 TV_DCONSEL_1

CRT_BLUE

CRT_GREEN

CRT_RED

CRT_IRTN

CRT_DDC_C LK CRT_DDC_D ATA CRT_HSYNC CRT_TVO_ IREF CRT_VSYNC

1

R81 49.9/FR81 49.9/F

VCC3G_PCIE_R

T37

PEG_COMPI

T36

PEG_COMPO

H44

PEG_RX#_0

J46

PEG_RX#_1

L44

PEG_RX#_2

L40

PEG_RX#_3

N41

PEG_RX#_4

P48

PEG_RX#_5

N44

PEG_RX#_6

T43

PEG_RX#_7

LVDS

TV

PCI-EXPRESS GRAPHICS

VGA

PEG_RX#_8

PEG_RX#_9 PEG_RX#_10 PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8

PEG_RX_9 PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8 PEG_TX#_9

PEG_TX#_10 PEG_TX#_11 PEG_TX#_12 PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_0

PEG_TX_1

PEG_TX_2

PEG_TX_3

PEG_TX_4

PEG_TX_5

PEG_TX_6

PEG_TX_7

PEG_TX_8

PEG_TX_9 PEG_TX_10 PEG_TX_11 PEG_TX_12 PEG_TX_13 PEG_TX_14 PEG_TX_15

U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39

H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40

J41 M46 M47 M40 M42 R48 N38 T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46

J42 L46 M48 M39 M43 R47 N37 T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46

12

A A

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Cantiga (VGA,DMI)

Size Document Number Rev

VM9M 1A

Date: Sheet

5

4

3

2

Date: Sheet

1

6 46Saturday, June 06, 2009

of

1

2

3

4

5

6

7

8

DDR_A_D[0..63][15]

A A

B B

C C

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AJ38

AJ41 AN38 AM38

AJ36

AJ40

AM44 AM42

AN43 AN44 AU40 AT38 AN41 AN39 AU44 AU42

AV39 AY44 BA40 BD43

AV41 AY43 BB41 BC40 AY37 BD38

AV37 AT36 AY38 BB38

AV36

AW36

BD13 AU11 BC11 BA12 AU13

AV13 BD12 BC12

BB9 BA9

AU10

AV9

BA11

BD9 AY8 BA6 AV5 AV7 AT9 AN8 AU5 AU6 AT5

AN10

AM11

AM5

AN12

AM13

AJ11

AJ12

AJ9 AJ8

U15D

SA_DQ_0 SA_DQ_1 SA_DQ_2 SA_DQ_3 SA_DQ_4 SA_DQ_5 SA_DQ_6 SA_DQ_7 SA_DQ_8 SA_DQ_9 SA_DQ_10 SA_DQ_11 SA_DQ_12 SA_DQ_13 SA_DQ_14 SA_DQ_15 SA_DQ_16 SA_DQ_17 SA_DQ_18 SA_DQ_19 SA_DQ_20 SA_DQ_21 SA_DQ_22 SA_DQ_23 SA_DQ_24 SA_DQ_25 SA_DQ_26 SA_DQ_27 SA_DQ_28 SA_DQ_29 SA_DQ_30 SA_DQ_31 SA_DQ_32 SA_DQ_33 SA_DQ_34 SA_DQ_35 SA_DQ_36 SA_DQ_37 SA_DQ_38 SA_DQ_39 SA_DQ_40 SA_DQ_41 SA_DQ_42 SA_DQ_43 SA_DQ_44 SA_DQ_45 SA_DQ_46 SA_DQ_47 SA_DQ_48 SA_DQ_49 SA_DQ_50 SA_DQ_51 SA_DQ_52 SA_DQ_53 SA_DQ_54 SA_DQ_55 SA_DQ_56 SA_DQ_57 SA_DQ_58 SA_DQ_59 SA_DQ_60 SA_DQ_61 SA_DQ_62 SA_DQ_63

CANTIGA_1p0

DDR_A_BS0

BD21

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13

DDR SYSTEM MEMORY A

SA_MA_14

BG18 AT25

BB20 BD20 AY20

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

DDR_A_BS1 DDR_A_BS2

DDR_A_RAS# DDR_A_CAS# DDR_A_WE#

DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7

DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6 DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14

DDR_A_BS0 [15,16] DDR_A_BS1 [15,16] DDR_A_BS2 [15,16]

DDR_A_RAS# [15,16] DDR_A_CAS# [15,16]

DDR_A_WE# [15,16]

DDR_A_DM[0..7] [15]

DDR_A_DQS[0..7] [15]

DDR_A_DQS#[0..7] [15]

DDR_A_MA[0..14] [15,16]

DDR_B_D[0..63][15]

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AK47 AH46 AP47 AP46

AJ46 AJ48

AM48

AP48 AU47 AU46

BA48

AY48

AT47

AR47

BA47

BC47

BC46

BC44 BG43

BF43 BE45 BC41

BF40

BF41 BG38

BF38 BH35 BG35 BH40 BG39 BG34 BH34 BH14 BG12 BH11

BG8

BH12

BF11

BG7 BC5 BC6

BD3

AU3 AR3 AN2

AR1

AH1 AM2 AM3 AH3

BF8

AY3 AY1 BF6 BF5 BA1

AV2

AY2 AV1 AP3

AL1 AL2

AJ1

AJ3

U15E

SB_DQ_0 SB_DQ_1 SB_DQ_2 SB_DQ_3 SB_DQ_4 SB_DQ_5 SB_DQ_6 SB_DQ_7 SB_DQ_8 SB_DQ_9 SB_DQ_10 SB_DQ_11 SB_DQ_12 SB_DQ_13 SB_DQ_14 SB_DQ_15 SB_DQ_16 SB_DQ_17 SB_DQ_18 SB_DQ_19 SB_DQ_20 SB_DQ_21 SB_DQ_22 SB_DQ_23 SB_DQ_24 SB_DQ_25 SB_DQ_26 SB_DQ_27 SB_DQ_28 SB_DQ_29 SB_DQ_30 SB_DQ_31 SB_DQ_32 SB_DQ_33 SB_DQ_34 SB_DQ_35 SB_DQ_36 SB_DQ_37 SB_DQ_38 SB_DQ_39 SB_DQ_40 SB_DQ_41 SB_DQ_42 SB_DQ_43 SB_DQ_44 SB_DQ_45 SB_DQ_46 SB_DQ_47 SB_DQ_48 SB_DQ_49 SB_DQ_50 SB_DQ_51 SB_DQ_52 SB_DQ_53 SB_DQ_54 SB_DQ_55 SB_DQ_56 SB_DQ_57 SB_DQ_58 SB_DQ_59 SB_DQ_60 SB_DQ_61 SB_DQ_62 SB_DQ_63

CANTIGA_1p0

DDR_B_BS0

BC16

SB_BS_0 SB_BS_1 SB_BS_2

SB_RAS#

SB_CAS#

SB_WE#

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13

DDR SYSTEM MEMORY B

SB_MA_14

BB17 BB33

AU17 BG16 BF14

AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

DDR_B_BS1 DDR_B_BS2

DDR_B_RAS#

DDR_B_CAS# DDR_B_WE#

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14

DDR_B_BS0 [15,16] DDR_B_BS1 [15,16] DDR_B_BS2 [15,16]

DDR_B_RAS# [15,16] DDR_B_CAS# [15,16] DDR_B_WE# [15,16]

DDR_B_DM[0..7] [15]

DDR_B_DQS[0..7] [15]

DDR_B_DQS#[0..7] [15]

DDR_B_MA[0..14] [15,16]

D D

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

1

2

3

4

5

6

Date: Sheet

COMPUTER

Cantiga (DDR2)

VM9M 1A

7

of

7 46Saturday, June 06, 2009

8

5

U15G

AP33 AN33 BH32

BG32

BF32 BD32 BC32 BB32 BA32 AY32

AW32

AV32 AU32 AT32 AR32 AP32 AN32 BH31

BG31

BF31

BG30

BH29

BG29

BF29 BD29 BC29 BB29 BA29 AY29

AW29

AV29 AU29 AT29 AR29 AP29

BA36 BB24 BD16

BB21 AW16 AW13

AT13

AE25

AB25

AA25

AE24

AC24

AA24

AE23

AC23

AB23

AA23

AJ21 AG21 AE21 AC21 AA21

AH20 AF20 AE20 AC20 AB20 AA20

AM15

AL15 AE15

AJ15 AH15 AG15 AF15 AB15 AA15

AN14

AM14

AJ14 AH14

Y26

Y24

Y21

T17 T16

Y15 V15 U15

U14 T14

5

U15G

VCC_SM_1 VCC_SM_2 VCC_SM_3 VCC_SM_4 VCC_SM_5 VCC_SM_6 VCC_SM_7 VCC_SM_8 VCC_SM_9 VCC_SM_10 VCC_SM_11 VCC_SM_12 VCC_SM_13 VCC_SM_14 VCC_SM_15 VCC_SM_16 VCC_SM_17 VCC_SM_18 VCC_SM_19 VCC_SM_20 VCC_SM_21 VCC_SM_22 VCC_SM_23 VCC_SM_24 VCC_SM_25 VCC_SM_26 VCC_SM_27 VCC_SM_28 VCC_SM_29 VCC_SM_30 VCC_SM_31 VCC_SM_32 VCC_SM_33 VCC_SM_34 VCC_SM_35

VCC_SM_36/NC VCC_SM_37/NC VCC_SM_38/NC VCC_SM_39/NC VCC_SM_40/NC VCC_SM_41/NC VCC_SM_42/NC

VCC_AXG_1 VCC_AXG_2 VCC_AXG_3 VCC_AXG_4 VCC_AXG_5 VCC_AXG_6 VCC_AXG_7 VCC_AXG_8 VCC_AXG_9 VCC_AXG_10 VCC_AXG_11 VCC_AXG_12 VCC_AXG_13 VCC_AXG_14 VCC_AXG_15 VCC_AXG_16 VCC_AXG_17 VCC_AXG_18 VCC_AXG_19 VCC_AXG_20 VCC_AXG_21 VCC_AXG_22 VCC_AXG_23 VCC_AXG_24 VCC_AXG_25 VCC_AXG_26 VCC_AXG_27 VCC_AXG_28 VCC_AXG_29 VCC_AXG_30 VCC_AXG_31 VCC_AXG_32 VCC_AXG_33 VCC_AXG_34 VCC_AXG_35 VCC_AXG_36 VCC_AXG_37 VCC_AXG_38 VCC_AXG_39 VCC_AXG_40 VCC_AXG_41 VCC_AXG_42

VCC_AXG_SENSE VSS_AXG_SENSE

CANTIGA_1p0

POWER

VCC SMVCC GFX

VCC_AXG_NCTF_1 VCC_AXG_NCTF_2 VCC_AXG_NCTF_3 VCC_AXG_NCTF_4 VCC_AXG_NCTF_5 VCC_AXG_NCTF_6 VCC_AXG_NCTF_7 VCC_AXG_NCTF_8

VCC_AXG_NCTF_9 VCC_AXG_NCTF_10 VCC_AXG_NCTF_11 VCC_AXG_NCTF_12 VCC_AXG_NCTF_13 VCC_AXG_NCTF_14 VCC_AXG_NCTF_15 VCC_AXG_NCTF_16 VCC_AXG_NCTF_17 VCC_AXG_NCTF_18 VCC_AXG_NCTF_19 VCC_AXG_NCTF_20 VCC_AXG_NCTF_21 VCC_AXG_NCTF_22 VCC_AXG_NCTF_23 VCC_AXG_NCTF_24 VCC_AXG_NCTF_25 VCC_AXG_NCTF_26 VCC_AXG_NCTF_27 VCC_AXG_NCTF_28 VCC_AXG_NCTF_29 VCC_AXG_NCTF_30 VCC_AXG_NCTF_31 VCC_AXG_NCTF_32 VCC_AXG_NCTF_33 VCC_AXG_NCTF_34 VCC_AXG_NCTF_35 VCC_AXG_NCTF_36 VCC_AXG_NCTF_37 VCC_AXG_NCTF_38 VCC_AXG_NCTF_39 VCC_AXG_NCTF_40 VCC_AXG_NCTF_41 VCC_AXG_NCTF_42 VCC_AXG_NCTF_43 VCC_AXG_NCTF_44 VCC_AXG_NCTF_45 VCC_AXG_NCTF_46 VCC_AXG_NCTF_47 VCC_AXG_NCTF_48 VCC_AXG_NCTF_49 VCC_AXG_NCTF_50 VCC_AXG_NCTF_51 VCC_AXG_NCTF_52 VCC_AXG_NCTF_53 VCC_AXG_NCTF_54 VCC_AXG_NCTF_55

VCC GFX NCTF

VCC_AXG_NCTF_56 VCC_AXG_NCTF_57 VCC_AXG_NCTF_58 VCC_AXG_NCTF_59 VCC_AXG_NCTF_60

VCC_SM_LF1 VCC_SM_LF2 VCC_SM_LF3 VCC_SM_LF4 VCC_SM_LF5 VCC_SM_LF6 VCC_SM_LF7

VCC SM LF

+1.8V_SUS

D D

C C

+1.05V_VCCP

B B

+1.05V_VCCP

R30

R30 *10_NC

*10_NC

1 2

A A

R25

R25 *10_NC

*10_NC

1 2

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

4

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

4

3

+3.3V_RUN

R60 10R60 10

+VCC_GMCH_L

1 2

+1.05V_VCCP

12

+

C359

+

C359

12

220U

3528

3528 4

Layout Note: 370 mils from edge.

Layout Note: Inside GMCH cavity for VCC_AXG.

12

C75

0.1U

402

402 16

16

12

C70

C70 22U

22U

805

805 4

4

+1.05V_VCCP +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP

1 2

+1.05V_VCCP +1.05V_VCCP +1.05V_VCCP

1 2

12

C38

C33

0.1U

0.22U

402

603

16

10

C77

0.1U

402

402 16

16

12

C52

0.1U

402

402 16

16

4

12

C79

C79 10U

10U

603

6.3

+1.8V_SUS

Layout Note: Place C195 where LVDS and DDR2 taps.

C85

C85 *0.1U_NC

*0.1U_NC

16

16 402

402

C118

C118 *0.1U_NC

*0.1U_NC

16

16 402

402

12

C93

0.22U

603

603 10

10

Layout Note: Inside GMCH cavity.

12

C149

C149 1U

1U

603

603 10

10

12

C121

0.1U

402

402 16

16

C117

C117 *0.1U_NC

*0.1U_NC

1 2

16

16 402

402

C102

C102 *0.1U_NC

*0.1U_NC

1 2

16

16 402

402

12

C152

0.47U

603

603 10

10

3

C356

C356 22U

22U

805

805 4

4

C94

0.47U

603

603 10

10

12

+

C14

C14 *220U_NC

*220U_NC

C128

C128 *0.1U_NC

*0.1U_NC

1 2

16

16 402

402

C39

C39 *0.1U_NC

*0.1U_NC

1 2

16

16 402

402

12

C151

C151 1U

1U

603

603 10

10

12

C139

C150

0.22U

603

603 10

10

C139

0.22U

603

603 10

10

+

C13

C13 *220U_NC

*220U_NC

Layout Note: 370 mils from edge.

+

C64

+

C64 220U/2.5V_7343

220U/2.5V_7343

Leon 3/25

1 2

12

C156

C156 1U

1U

603

603 10

10

+1.05V_VCCP

12

Layout Note: Place on the ed ge.

C109

C109 *0.1U_NC

*0.1U_NC

16

16 402

402

D3

RB751V-40

12

C35

0.1U

402

402 16

16

C134

C134 22U

22U

805

805 4

4

2

21

VCC_SM

12

C135

C135 22U

22U

805

805 4

4

2

1

U15F

AG34

VCC_1

AC34

VCC_2

AB34

VCC_3

AA34

VCC_4

Y34

VCC_5

V34

VCC_6

U34

VCC_7

AM33

VCC_8

AK33

VCC_9

AJ33

VCC_10

AG33

VCC_11

AF33

VCC_12

AE33

VCC_13

AC33

VCC_14

AA33

VCC_15

Y33

VCC_16

W33

VCC_17

V33

VCC_18

U33

VCC_19

AH28

VCC_20

AF28

VCC_21

AC28

VCC_22

AA28

VCC_23

AJ26

VCC_24

AG26

VCC_25

AE26

VCC_26

AC26

VCC_27

AH25

VCC_28

AG25

VCC_29

AF25

VCC_30

AG24

VCC_31

AJ23

VCC_32

AH23

VCC_33

AF23

VCC_34

T32

VCC_35

CANTIGA_1p0

Title

Size Document Number Rev

Date: Sheet

VCC CORE

VCC_NCTF_1 VCC_NCTF_2 VCC_NCTF_3 VCC_NCTF_4 VCC_NCTF_5

POWER

VCC_NCTF_6 VCC_NCTF_7 VCC_NCTF_8

VCC_NCTF_9 VCC_NCTF_10 VCC_NCTF_11 VCC_NCTF_12 VCC_NCTF_13 VCC_NCTF_14 VCC_NCTF_15 VCC_NCTF_16 VCC_NCTF_17 VCC_NCTF_18 VCC_NCTF_19 VCC_NCTF_20 VCC_NCTF_21 VCC_NCTF_22 VCC_NCTF_23 VCC_NCTF_24 VCC_NCTF_25 VCC_NCTF_26 VCC_NCTF_27 VCC_NCTF_28 VCC_NCTF_29 VCC_NCTF_30

VCC NCTF

VCC_NCTF_31 VCC_NCTF_32 VCC_NCTF_33 VCC_NCTF_34 VCC_NCTF_35 VCC_NCTF_36 VCC_NCTF_37 VCC_NCTF_38 VCC_NCTF_39 VCC_NCTF_40 VCC_NCTF_41 VCC_NCTF_42 VCC_NCTF_43 VCC_NCTF_44

QUANTA

QUANTA COMPUTER

COMPUTER

Cantiga (VCC,NCTF)

VM9M 1A

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

8 46Wednesday, June 03, 2009

1

+1.05V_VCCP

of

5

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC

+3.3V_RUN

Remove R300 0ohm resistor

D D

Ray 5/27

Non-iAMT

+1.05V_VCCP

L2 BLM11A05S

L3 BLM11A05S

+VCCA_MPLL_L

12

C C

+1.05V_VCCP

B B

+3.3V_RUN

+1.5V_RUN

A A

BLM18PG181SN1D

L29 BLM18PG181SN1D

603

45mA MAx.

FB_120ohm+-25%_100mHz _200mA_0.2ohm DC

+VCCA_HPLL

603

R20

1 2

603

C364

C364 22U

22U

1206

1206 10

10

FB_220ohm+-25%_100MHz _2A_0.1ohm DC

FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC

0.5/F

L32

L27

L27 BLM18PG181SN1D

BLM18PG181SN1D

603

L31

603

C17

4.7U

603

1 2

6.3

+VCCA_MPLL

+VCCA_CRTDAC

C385

0.01U

25

+VCCA_DAC_BG

12

C382

0.1U

402

402 16

16

+1.05V_VCCP

12

C15

0.1U

402

402 16

16

0.1Caps should be

+VCCA_PEG_PLL

12

R308

R308 1/F

1/F

603

12

C401

C401 10U

10U

603

6.3

+VCC_TVDACA

C373

0.01U

25

+VCCD_TVDAC

C108

0.01U

25

+VCCD_QDAC

C122

0.01U

25

placed 200 mils with in its pins.

+1.05V_VCCP

12

C21

0.1U

402

402 16

16

BLM21P221SGPT

805

Remove R304 0oh m resis tor Ray 5/2 7

12

C390

0.1U

402

402 16

16

12

C395

0.1U

402

402 16

16

5

12

C386

0.1U

402

402 16

16

C381

0.01U

25

L9 10uH

L37 10uH

Remove R12 0ohm Ray 6/1

12

C374

0.1U

402

402 16

16

10uH+-20%_100mA

+VCCA_DPLLA

12

805

12

+

12

805

12

+

L8

1uH/300mA

+1.05V_VCCP

FB_220ohm+-25%_100MHz _2A_0.1ohm DC

4

40mA MAx.

12

C160

C160 *220U_NC

*220U_NC

3528

3528 4

4

+VCCA_DPLLB

C405

C405 *220U_NC

*220U_NC

3528

3528 4

4

1 2

12

C115

C115 22U

22U

805

805 4

4

Remove R85 0ohm resist or Ray 5/2 7

C159

C159 10U

10U

603

6.3

12

C398

C398 10U

10U

603

6.3

C68

4.7U

603

6.3

+1.8V_SUS

L35

4

C158

0.1U

402

402 16

16

12

C404

0.1U

402

402 16

16

12

C20

C20 22U

22U

805

805 4

4

12

C103

C103 1U

1U

603

603 10

10

BLM21P221SGPT

805

C402

C402 1000P

1000P

+1.5V_RUN

12

C397

0.1U

402

402 16

16

12

C19

C19 22U

22U

805

805 4

4

12

C116

C116 1U

1U

603

603 10

10

C27 0.1UC27 0.1U

12

C406 0.1U

12

+VCCD_PEG_PLL

12

R310

R310 1/F

1/F

603

12

C409

C409 10U

10U

603

6.3

16402

12

C157

C157 1U

1U

603

603 10

10

50

12

+VCCA_CRTDAC

+VCCA_DAC_BG

+VCCA_DPLLA

+VCCA_DPLLB

+VCCA_HPLL

+VCCA_MPLL

+VCC_TX_LVDS

+VCCA_PEG_PLL

12

C92

C92 1U

1U

603

603 10

10

+VCCA_SM_CK

12

C106

0.1U

402

402 16

16

+VCC_TVDACA

+VCC_HDA

+VCCD_TVDAC

+VCCD_QDAC

+VCCA_MPLL

+VCCD_PEG_PLL

12

C153

C153 *10U_NC

*10U_NC

603

6.3

+VTTLF1 +VTTLF2 +VTTLF3

B27 A26

A25 B25

F47

L48

AD1

AE1

J48

J47

AD48

AA48

AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16

AP28 AN28 AP25 AN25 AN24 AM28 AM26 AM25

AL25

AM24

AL24

AM23

AL23

B24 A24

A32

M25

L28

AF1

AA47

M38

L37

12

C32

0.47U

603

603 10

10

3

U15H

VCCA_CRT_DAC_1 VCCA_CRT_DAC_2

VCCA_DAC_BG VSSA_DAC_BG

VCCA_DPLLA

VCCA_DPLLB

VCCA_HPLL

VCCA_MPLL

VCCA_LVDS

VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM_1 VCCA_SM_2 VCCA_SM_3 VCCA_SM_4 VCCA_SM_5 VCCA_SM_6 VCCA_SM_7 VCCA_SM_8 VCCA_SM_9

VCCA_SM_CK_1 VCCA_SM_CK_2 VCCA_SM_CK_3 VCCA_SM_CK_4 VCCA_SM_CK_5 VCCA_SM_CK_NCTF_1 VCCA_SM_CK_NCTF_2 VCCA_SM_CK_NCTF_3 VCCA_SM_CK_NCTF_4 VCCA_SM_CK_NCTF_5 VCCA_SM_CK_NCTF_6 VCCA_SM_CK_NCTF_7 VCCA_SM_CK_NCTF_8

VCCA_TV_DAC_1 VCCA_TV_DAC_2

VCC_HDA

VCCD_TVDAC

VCCD_QDAC

VCCD_HPLL

VCCD_PEG_PLL

VCCD_LVDS_1 VCCD_LVDS_2

CANTIGA_1p0

12

C29

0.47U

603

603 10

10

3

CRTPLLA PEGA SM

A LVDS

POWER

A CK

TV

HDA

D TV/CRT

LVDS

12

C36

0.47U

603

603 10

10

VCC_AXF_1 VCC_AXF_2 VCC_AXF_3

AXF

VCC_SM_CK_1 VCC_SM_CK_2 VCC_SM_CK_3 VCC_SM_CK_4

SM CK

VCC_TX_LVDS

VCC_HV_1 VCC_HV_2 VCC_HV_3

HV

VCC_PEG_1 VCC_PEG_2 VCC_PEG_3 VCC_PEG_4

PEG

VCC_PEG_5

VCC_DMI_1 VCC_DMI_2 VCC_DMI_3 VCC_DMI_4

DMI

VTTLF

VTT_10 VTT_11 VTT_12 VTT_13 VTT_14

VTT

VTT_15 VTT_16 VTT_17 VTT_18 VTT_19 VTT_20 VTT_21 VTT_22 VTT_23 VTT_24 VTT_25

VTTLF1 VTTLF2 VTTLF3

VTT_1 VTT_2 VTT_3 VTT_4 VTT_5 VTT_6 VTT_7 VTT_8 VTT_9

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47

C35 B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

2

12

+VCC_SM_CK

+VCC_TX_LVDS

+VCC_RXR_DMI

+VTTLF1 +VTTLF2 +VTTLF3

2

12

C54

C72

4.7U

2.2U

603

6.3

10

Close to VTT

1

+1.05V_VCCP

12

C84

0.47U

6.3

C49

4.7U

603

6.3

+

C363

+

C363 220U

220U

3528

3528 4

4

Place on the edge.

Remove L6 0ohm resistor Ray 5/27

+1.05V_VCCP

12

+

12

C86

C86 1U

1U

603

603 10

10

C80

0.1U

402

402 16

16

C407

C407 1000P

1000P

50

C403

C403 220U

220U

3528

3528 4

4

C400

0.1U

402

402 16

16

Title

Size Document Number Rev

Date: Sheet

C95

C95 10U

10U

603

6.3

12

R39

R39 1/F

1/F

603

12

C62

C62 10U

10U

603

6.3

+VCC_PEG

12

C414

C414 22U

22U

1206

1206 10

10

L34

91nH/1.5A

QUANTA

QUANTA COMPUTER

COMPUTER

Cantiga (POWER)

VM9M 1A

L7 1uH/300MA

1uH/300MA

L33

1uH/300MA

805

+3.3V_RUN

12

C396

0.1U

402

Remove R316 0oh m

16

Ray 6/1

12

C410

4.7U

603

6.3

+1.05V_VCCP

12

805L7

805

+1.8V_SUS

1

+1.8V_SUS

+1.05V_VCCP

9 46Saturday, June 06, 2009

of

5

U15I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

D D

C C

B B

A A

5

AF47 AD47 AB47

BD46 BA46 AY46

AV46 AR46

AM46

BF44 AH44 AD44

AA44

M44

BC43

AV43 AU43

AM43

C43

BG42

AY42 AT42 AN42

AJ42 AE42

N42

BD41 AU41

AM41

AH41 AD41

AA41

U41

M41 G41

BG40

BB40

AV40 AN40

H40

AT39

AM39

AJ39 AE39

N39

BH38 BC38 BA38 AU38 AH38 AD38

AA38

U38

C38 BF37 BB37

AW37

AT37 AN37

AJ37

H37

C37

BG36

BD36 AK15 AU36

Y47 T47 N47 L47 G47

V46 R46 P46 H46 F46

Y44 U44 T44

F44

L42

Y41

T41

B41

E40

L39 B39

Y38

T38

F38

J43

J38

VSS_8 VSS_9 VSS_10 VSS_11 VSS_12 VSS_13 VSS_14 VSS_15 VSS_16 VSS_17 VSS_18 VSS_19 VSS_20 VSS_21 VSS_22 VSS_23 VSS_24 VSS_25 VSS_26 VSS_27 VSS_28 VSS_29 VSS_30 VSS_31 VSS_32 VSS_33 VSS_34 VSS_35 VSS_36 VSS_37 VSS_38 VSS_39 VSS_40 VSS_41 VSS_42 VSS_43 VSS_44 VSS_45 VSS_46 VSS_47 VSS_48 VSS_49 VSS_50 VSS_51 VSS_52 VSS_53 VSS_54 VSS_55 VSS_56 VSS_57 VSS_58 VSS_59 VSS_60 VSS_61 VSS_62 VSS_63 VSS_64 VSS_65 VSS_66 VSS_67 VSS_68 VSS_69 VSS_70 VSS_71 VSS_72 VSS_73 VSS_74 VSS_75 VSS_76 VSS_77 VSS_78 VSS_79 VSS_80 VSS_81 VSS_82 VSS_83 VSS_84 VSS_85 VSS_86 VSS_87 VSS_88 VSS_89 VSS_90 VSS_91 VSS_92 VSS_93 VSS_94 VSS_95 VSS_96 VSS_97 VSS_98 VSS_99

CANTIGA_1p0

VSS

4

VSS_100 VSS_101 VSS_102 VSS_103 VSS_104 VSS_105 VSS_106 VSS_107 VSS_108 VSS_109 VSS_110 VSS_111 VSS_112 VSS_113 VSS_114 VSS_115 VSS_116 VSS_117 VSS_118 VSS_119 VSS_120 VSS_121 VSS_122 VSS_123 VSS_124 VSS_125 VSS_126 VSS_127 VSS_128 VSS_129 VSS_130 VSS_131 VSS_132 VSS_133 VSS_134 VSS_135 VSS_136 VSS_137 VSS_138 VSS_139 VSS_140 VSS_141 VSS_142 VSS_143 VSS_144 VSS_145 VSS_146 VSS_147 VSS_148 VSS_149 VSS_150 VSS_151 VSS_152 VSS_153 VSS_154 VSS_155 VSS_156 VSS_157 VSS_158 VSS_159 VSS_160 VSS_161 VSS_162 VSS_163 VSS_164 VSS_165 VSS_166 VSS_167 VSS_168 VSS_169 VSS_170 VSS_171 VSS_172 VSS_173 VSS_174 VSS_175 VSS_176 VSS_177 VSS_178 VSS_179 VSS_180 VSS_181 VSS_182 VSS_183 VSS_184 VSS_185 VSS_186 VSS_187 VSS_188 VSS_189 VSS_190 VSS_191 VSS_192 VSS_193 VSS_194 VSS_195 VSS_196 VSS_197 VSS_198

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23

3

U15J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17 M17 H17 C17

BA16

AU16 AN16

N16 K16 G16 E16

BG15

AC15

W15

A15

BG14

AA14

C14

BG13

BC13 BA13

AN13

AJ13

AE13

N13

L13 G13 E13

BF12

AV12

AT12

AM12

AA12

J12 A12

BD11 BB11 AY11 AN11 AH11

Y11 N11 G11 C11

BG10

AV10

AT10

AJ10

AE10

AA10

M10

BF9

BC9 AN9 AM9

AD9

G9

B9

BH8

BB8

AV8 AT8

3

VSS_230 VSS_231 VSS_232 VSS_233

VSS_235

VSS_237 VSS_238 VSS_239 VSS_240 VSS_241 VSS_242 VSS_243 VSS_244 VSS_245 VSS_246 VSS_247 VSS_248 VSS_249 VSS_250 VSS_251 VSS_252

VSS_255 VSS_256 VSS_257 VSS_258 VSS_259 VSS_260 VSS_261 VSS_262 VSS_263 VSS_264 VSS_265 VSS_266 VSS_267 VSS_268 VSS_269 VSS_270 VSS_271 VSS_272 VSS_273

VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296

CANTIGA_1p0

VSS

VSS NCTF

VSS SCB

NC

VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_318 VSS_319 VSS_320 VSS_321 VSS_322 VSS_323 VSS_324 VSS_325

VSS_327 VSS_328 VSS_329 VSS_330 VSS_331 VSS_332 VSS_333 VSS_334 VSS_335 VSS_336 VSS_337 VSS_338 VSS_339 VSS_340 VSS_341 VSS_342 VSS_343 VSS_344 VSS_345 VSS_346 VSS_347 VSS_348 VSS_349 VSS_350

VSS_351 VSS_352 VSS_353 VSS_354

VSS_NCTF_1 VSS_NCTF_2 VSS_NCTF_3 VSS_NCTF_4 VSS_NCTF_5 VSS_NCTF_6 VSS_NCTF_7 VSS_NCTF_8

VSS_NCTF_9 VSS_NCTF_10 VSS_NCTF_11 VSS_NCTF_12 VSS_NCTF_13 VSS_NCTF_14 VSS_NCTF_15 VSS_NCTF_16

VSS_SCB_1 VSS_SCB_2 VSS_SCB_3 VSS_SCB_4 VSS_SCB_5 VSS_SCB_6

NC_26 NC_27 NC_28 NC_29 NC_30 NC_31 NC_32 NC_33 NC_34 NC_35 NC_36 NC_37 NC_38 NC_39 NC_40 NC_41 NC_42

2

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 B2 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

Title

Size Document Number Rev

Date: Sheet

2

Date: Sheet

QUANTA

QUANTA COMPUTER

COMPUTER

Cantiga (VSS)

VM9M 1A

1

of

10 46Wednesday, June 03, 2009

1

+RTC_CELL

12

R1691MR169 1M

R160 10MR160 10M

W2

1 4

2 3

32.768KHZW232.768KHZ

R174

R174 20K

20K

1 2

12

C247

C247 1U/10V

1U/10V

C267 0.01U/16VC267 0.01U/16V C263 0.01U/16VC263 0.01U/16V

C274 0.01U/16VC274 0.01U/16V C269 0.01U/16VC269 0.01U/16V

12

R329

R329 20K

20K

1 2

12

C440

C440 1U/10V

1U/10V

ICH_RTCRST# ICH_SRTCRST# ICH_INTRUDER#

32.768KHZ

12

C234

C234 15P/50V

15P/50V

A A

ICH_AZ_CODEC_BITCLK[32]

B B

ICH_AZ_CODEC_SYNC[32]

ICH_AZ_CODEC_RST#[23,32]

ICH_AZ_CODEC_SDOUT[32]

Place all series terms close to ICH9 except for SDIN input lines,which sho uld be close t o source.

C C

SATA_TX0 -[28] SATA_TX0 +[28]

SATA_TX1 -[28] SATA_TX1 +[28]

2

ICH_RTCX2ICH_RTCX1

R216 33R216 33

L23

L23 *22uH_NC

*22uH_NC

402

1 2

C293

C293 *27P/50V_NC

*27P/50V_NC

1 2

R223 33R223 33

R213 33R213 33

R217 33R217 33

SATA_TX0 -_C SATA_TX0 +_C

SATA_TX1 -_C SATA_TX1 +_C

12

C238

C238 15P/50V

15P/50V

1 2

3

+RTC_CELL

12

ICH9M Internal VR Enable Strap (Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)

ICH_INTVRMEN

ACZ_BIT_CLK

Reserved for Intel Nineveh design.

ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

Master HDD

SATA ODD

Low = Internal VR Disabled High = Internal VR Enabled(Default)

T37 PADT37 PAD

T67 PADT67 PAD T70 PADT70 PAD T68 PADT68 PAD T69 PADT69 PAD T66 PADT66 PAD T65 PADT65 PAD

+3.3V_SUS

+1.5V_PCIE_ICH

ICH_AZ_CODEC_SDIN0[32]

T141

T141 T142

T142 T85

T85

SATA_ACT#[30]

SATA_RX0-[28] SATA_RX0+[28]

SATA_RX1-[28] SATA_RX1+[28]

R334

R334 332K/F

332K/F

ICH_INTVRMEN

R204 *10K_ NCR204 *10K _NC

R151 24.9/FR151 24.9/F

1 2

PAD

PAD PAD

PAD

ICH_RTCX1 ICH_RTCX2

ICH_RTCRST# ICH_SRTCRST# ICH_INTRUDER#

ICH_INTVRMEN

GLAN_CLK

LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2

12

GLAN_COMP

ACZ_BIT_CLK ACZ_SYNC

ACZ_RST#

ACZ_SDOUT

SATA_TX0 -_C SATA_TX0 +_C

SATA_TX1 -_C SATA_TX1 +_C

4

ICH9M LAN100 SLP Strap (Internal VR for VccLAN1.05 and VccCL1.05)

ICH_LAN100_SLP

U19A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GLAN_DOCK#/GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M REV 1.0

5

Low = Internal VR Disabled High = Internal VR Enabled(Default)

K5

FWH0/LAD0

K4

FWH1/LAD1

L6

FWH2/LAD2

K2

FWH3/LAD3

RTCLAN / GLAN

LPCCPU

RTCLAN / GLANIHDASATA

LPCCPU

IHDASATA

FWH4/LFRAME#

LDRQ1#/GPIO23

CPUPWRGD

THRMTRIP#

SATA_CLKN SATA_CLKP

SATARBIAS#

LDRQ0#

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

IGNNE#

INIT#

INTR

RCIN#

SMI#

STPCLK#

SATA4RXN SATA4RXP SATA4TXN SATA4TXP

SATA5RXN SATA5RXP SATA5TXN SATA5TXP

SATARBIAS

NMI

TP9

K3

J3 J1

N7 AJ27

AJ25 AE23

AJ26

AD22

AF25

AE22 AG25 L3

AF23 AF24

AH27

AG26

AG27

AH11 AJ11 AG12 AF12

AH9 AJ9 AE10 AF10

AH18 AJ18

AJ7 AH7

6

SIO_A20GATE

H_DPRSTP# H_DPSLP#

H_FERR#_L

SIO_RCIN#

1 2

R35 5 6R35 5 6

SATABIAS

R323 56R323 56

H_THERMTRIP#

R34724.9/F R34724.9/F

1 2

LPC_LAD0 [23,26] LPC_LAD1 [23,26] LPC_LAD2 [23,26] LPC_LAD3 [23,26]

LPC_LFRAME# [23,26]

T89PAD T89PAD T150PAD T150PAD

SIO_A20GATE [23] H_A20M# [3]

H_DPRSTP# [3,6,39] H_DPSLP# [3]

H_FERR#

12

H_PWRGOOD [3]

H_IGNNE# [3]

H_INIT# [3] H_INTR [3]

SIO_RCIN# [23]

H_NMI [3] H_SMI# [3]

H_STPCLK# [3]

H_THERMTRIP# [3,6]

T117PAD T117PAD

T71PAD T71PAD T74PAD T74PAD

T76PAD T76PAD T75PAD T75PAD

CLK_PCIE_SATA# [17] CLK_PCIE_SATA [17]

Place within 500mils of ICH9 ball

7

H_FERR# [3]

H_DPRSTP# H_DPSLP# H_FERR#

SIO_A20GATE SIO_RCIN#

H_THERMTRIP#

1 2

R325

R325 *56_NC

*56_NC

1 2

8

R172

R172 *56_NC

*56_NC

R208

8.2K

+1.05V_VCCP

1 2

+3.3V_RUN

1 2

+1.05V_VCCP

1 2

R32456R324 56

R234

R234 10K

10K

R16156R161 56

+3.3V_RUN

R218

1 2

R218 *1K_NC

*1K_NC

R336

R336 *1K_NC

*1K_NC

ACZ_SDOUT

ICH_RSVD [13]

5

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

6

Date: Sheet

COMPUTER

ICH9-M (CPU,SATA,LPC,LAN,CODEC)

VM9M 1A

7

of

11 46Saturday, June 06, 2009

8

XOR Chain Entrance Strap

ICH RSVD HDA SDOUT Description

0

D D

1

2

3

0

RSVD

Enter XOR Chain

1

Normal Operation (Default)

0

Set PCIE port config bit 1

1

4

1

Place TX DC blocking caps close ICH9.

C227 0.1U 16C227 0.1U 16

PCIE_TX2-[26] PCIE_TX2+[26]

PCIE_TX4-[21]

A A

PCIE_TX4+[21]

PCIE_TX5-[33] PCIE_TX5+[33]

PCIE_TX6-/GLAN_TX-[34] PCIE_TX6+/GLAN_TX+[34]

1 2

C228 0.1U 16C228 0.1U 16

1 2

C276 0.1U 16C276 0.1U 16

1 2

C275 0.1U 16C275 0.1U 16

1 2

C2234 0.1U 16C2234 0.1U 16

1 2

C2237 0.1U 16C2237 0.1U 16

1 2

C229 0.1U 16C229 0.1U 16

1 2

C230 0.1U 16C230 0.1U 16

1 2

Boot BIOS Strap

11LPC

B B

OC7# OC6# OC5# OC4#

+3.3V_SUS

OC10# OC11#

PCI

SPI1001

RP39

6 7 8 9

10

10KX8

10KX8 R207 10KR207 10K R225 10KR225 10K

2

GNT0# SPI_CS1#

No stuff

Stuff

+3.3V_SUS

5

OC9#

4

USB_OC_3#

3

USB_OC0_1#

2

OC8#

1

12

+3.3V_SUS

12

PCIE_TXN2_C PCIE_TXP2_C

PCIE_TXN4_C PCIE_TXP4_C

PCIE_TXN5_C PCIE_TXP5_C

GLAN_TXN_C GLAN_TXP_C

No stuff

Stuff

No stuff

3

MiniWWAN

PCIE_RX2-[26] PCIE_RX2+[26]

MiniWLAN

MiniWPAN

PCIE_RX4-[21] PCIE_RX4+[21]

Express Card

PCIE_RX5-[33] PCIE_RX5+[33]

1394+Cardreader

PCIE_RX6-/GLAN_RX-[34] PCIE_RX6+/GLAN_RX+[34]

Giga Bit LOM

T39 PADT 39 PAD T44 PADT 44 PAD T82 PADT 82 PAD

T40 PADT 40 PAD T45 PADT 45 PAD

USB_OC0_1#[27]

USB_OC_3#[33]

R354 22.6/FR354 22 .6/F

1 2

Places within 500 mils of the ICH9

PCIE_TXN2_C PCIE_TXP2_C

PCIE_TXN4_C PCIE_TXP4_C

PCIE_TXN5_C PCIE_TXP5_C

GLAN_TXN_C GLAN_TXP_C

SPI_CLK_R SPI_CS#0_R ICH_SPI_CS1#_R

SPI_MOSI SPI_MISO

USB_OC0_1#

USB_OC_3# OC4# OC5# OC6# OC7# OC8# OC9# OC10# OC11#

USBRBIAS

4

U19D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M REV 1.0

PCI-Express

SPI

USB

DMI0RXN DMI0RXP DMI0TXN DMI0TXP

DMI1RXN DMI1RXP DMI1TXN DMI1TXP

DMI2RXN DMI2RXP DMI2TXN DMI2TXP

DMI3RXN DMI3RXP DMI3TXN DMI3TXP

DMI_CLKN

DMI_CLKP

DMI_ZCOMP

Direct Media Interface

DMI_IRCOMP

USBP0N

USBP0P

USBP1N

USBP1P

USBP2N

USBP2P

USBP3N

USBP3P

USBP4N

USBP4P

USBP5N

USBP5P

USBP6N

USBP6P

USBP7N

USBP7P

USBP8N

USBP8P

USBP9N

USBP9P USBP10N USBP10P USBP11N USBP11P

V27 V26 U29 U28

Y27 Y26 W29 W28

AB27 AB26 AA29 AA28

AD27 AD26 AC29 AC28

T26 T25

AF29 AF28

AC5 AC4 AD3 AD2 AC1 AC2 AA5 AA4 AB2 AB3 AA1 AA2 W5 W4 Y3 Y2 W1 W2 V2 V3 U5 U4 U1 U2

5

DMI_COMP

DMI_MTX_IRX_N0 [6] DMI_MTX_IRX_P0 [6]

DMI_MRX_ITX_N0 [6] DMI_MRX_ITX_P0 [6]

DMI_MTX_IRX_N1 [6] DMI_MTX_IRX_P1 [6]

DMI_MRX_ITX_N1 [6] DMI_MRX_ITX_P1 [6]

DMI_MTX_IRX_N2 [6] DMI_MTX_IRX_P2 [6]

DMI_MRX_ITX_N2 [6] DMI_MRX_ITX_P2 [6]

DMI_MTX_IRX_N3 [6] DMI_MTX_IRX_P3 [6]

DMI_MRX_ITX_N3 [6] DMI_MRX_ITX_P3 [6]

CLK_PCIE_ICH# [17] CLK_PCIE_ICH [17]

1 2

R322 24.9/FR322 24.9/F

ICH_USBP0- [27] ICH_USBP0+ [27] ICH_USBP1- [27] ICH_USBP1+ [27] ICH_USBP2- [33] ICH_USBP2+ [33] ICH_USBP3- [33] ICH_USBP3+ [33] ICH_USBP4- [18] ICH_USBP4+ [18]

T113PAD T113PAD T148PAD T148PAD

ICH_USBP6- [26] ICH_USBP6+ [26] ICH_USBP7- [21] ICH_USBP7+ [21] ICH_USBP8- [26] ICH_USBP8+ [26]

T90PAD T90PAD T147PAD T147PAD T83PAD T83PAD T84PAD T84PAD T145PAD T145PAD T144PAD T144PAD

6

+1.5V_PCIE_ICH

Place within 500mils of ICH9

Side Pair Left

Side Pair Right

Camera

Mini Card (WWAN)

Bluetooth

Express Card

Mini Card (WLAN)

7

PCI Pullups

PCI_FRAME# PCI_TRDY# PCI_DEVSEL# PCI_REQ1#

+3.3V_RUN

PCI_IRDY# PCI_PIRQC# PCI_PIRQE# PCI_PIRQB#

+3.3V_RUN

PCI_REQ2#

RP37RP37

6 7 8 9

10

RP38RP38

6 7 8 9

10

R202 8.2KR202 8.2K

5 4 3 2 1

12

8

+3.3V_RUN

PCI_PLOCK# PCI_STOP# PCI_PIRQD# PCI_PERR#

+3.3V_RUN

PCI_PIRQA# PCI_REQ0# ICH_IRQH_GPIO5 PCI_SERR#

+3.3V_RUN

C C

U19B

D11

AD0

C8 D9

E12

E9

C9

E10

B7 C7 C5

G11

F8

F11

E7

A3 D2

F10

D5

D10

B3

F7 C3

F3

F4 C1

D D

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

1

G7 H7 D1 G5 H6 G1 H3

J5

E1

J6

PCI

AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31

Interrupt I/F

PIRQA# PIRQB# PIRQC# PIRQD#C4PIRQH#/GPIO5

ICH9M REV 1.0

2

REQ0#

GNT0# REQ1#/GPIO50 GNT1#/GPIO51 REQ2#/GPIO52 GNT2#/GPIO53 REQ3#/GPIO54 GNT3#/GPIO55

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP#

TRDY#

FRAME#

PLTRST#

PCICLK

PIRQE#/GPIO2 PIRQF#/GPIO3 PIRQG#/GPIO4

PAR

PME#

F1 G4 B6 A7 F13 F12 E6 F6

D8 B4 D6 A5

D3 E3 R1 C6 E4 C2 J4 A4 F5 D7

C14 D4 R2

H4 K6 F2 G2

PCI_REQ0# PCI_GNT0# PCI_REQ1# PCI_GNT1# PCI_REQ2# PCI_GNT2# GPIO54 PCI_GNT3#

PCI_IRDY#

PCI_DEVSEL# PCI_PERR# PCI_PLOCK# PCI_SERR# PCI_STOP# PCI_TRDY# PCI_FRAME#

PLTRST#

CLK_PCI_ICH

PCI_PIRQE# GPIO3 GPIO4 ICH_IRQH_GPIO5

3

T2080PAD T2080PAD

T86PAD T86PAD

T73PAD T73PAD

T77PAD T77PAD

T88PAD T88PAD

PLTRST# [6,21,23,26,33,34]

CLK_PCI_ICH [17]

T93PAD T93PAD

4

CLK_PCI_ICH

R224

R224 *10_NC

*10_NC

1 2

C306

C306 *8.2P_NC

*8.2P_NC

Reserved for EMI.Place resister and c ap close to ICH.

1 2

16

5

6

GPIO3

GPIO4

GPIO54

BIOS should not enable the internal GPIO pull up resistor.

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

ICH9-M (USB,DMI,PCIE,PCI)

VM9M 1A

7

R211 8.2KR211 8.2K

R238 8.2KR238 8.2K

R386 8.2KR386 8.2K

12

12 46Saturday, June 06, 2009

8

of

+3.3V_SUS

1

RP41

1 3

2.2KX2

Non-iAMT

ICH_SMBDATA

2

ICH_SMBCLK

4

2

3

4

5

6

7

8

Place these close to ICH9.

+3.3V_SUS

A A

B B

C C

D D

RP36

ICH_SMLINK0

2

1 3

ICH_SMBCLK ICH_SMBDATA

+3.3V_RUN

R237

8.2K

1 2

R236

R236 *10_NC

*10_NC

1 2

Option to " Dis able " clkrun. Pulling it down will keep the c lks running.

PCIE_MCARD1_DET#[26]

+3.3V_RUN

R249 100KR249 1 00K

1 2

+3.3V_RUN

R327 *10K_NCR327 *10K_NC R209 10KR209 10K R328 10KR328 10K

+3.3V_SUS

R178 10KR178 10K R337 10KR337 10K R344 100KR344 1 00K

1 2

4

*10KX2_NC

R191 0R191 0 R193 0R193 0

CLKRUN#

12 12 12

12 12

1

ICH_SMLINK1

1 2 1 2

ASF 2.0Non-iAMT

ICH_SMLINK0 ICH_SMLINK1

PCIE_MCARD1_DET#

MCH_ICH_SYNC#_R IRQ_SERIRQ THERM_ALERT#

RSV_WOL_EN SIO_EXT_SMI# USB_MCARD1_DET#

+3.3V_SUS

ICH_SMBCLK[21] ICH_SMBDATA[21]

PM_BMBUSY#[6]

USB_MCARD1_DET#[26]

H_STP_PCI#[17] H_STP_CPU#[17]

CLKRUN#[23]

PCIE_WAKE#[21,26,34] IRQ_SERIRQ[23]

THERM_ALERT#[3]

IMVP_PWRGD[23,39]

SIO_EXT_WAKE#[23] SIO_EXT_SMI#[23] SIO_EXT_SCI#[23]

R235 4.7KR235 4.7K

2

12

SATA_CLKREQ#[17]

MCH_ICH_SYNC#[6]

R194 10KR194 10K R197 10KR197 10K R203 10KR203 10K R179 1KR179 1K

+3.3V_SUS

ICH_RSVD[11]

T60 PADT60 PAD T58 PADT58 PAD T57 PADT57 PAD

T81 PADT81 PAD

T133 P ADT133 PAD

T51 PADT51 PAD

T129 P ADT129 PAD

T135 P ADT135 PAD

T61 PADT61 PAD

T78 PADT78 PAD

T126 P ADT126 PAD

T128 P ADT128 PAD

T50 PADT50 PAD

T54 PADT54 PAD

T127 P ADT127 PAD

T56 PADT56 PAD

T46 PADT46 PAD

T140 P ADT140 PAD

SPKR[32]

T132 P ADT132 PAD

T131 P ADT131 PAD

T130 P ADT130 PAD

+3.3V_RUN

12

12 12 12 12

R210

*1K_NC

No Reboot strap.

SPKR

Low = Default. High = No Reboot.

Non-iAMT

RSV_ICH_CL_RST1# ICH_RI# SIO_EXT_SCI# PCIE_WAKE#

ICH_SMBCLK ICH_SMBDATA RSV_ICH_CL_RST1# ICH_SMLINK0 ICH_SMLINK1

ICH_RI#

RSV_LPCPD#

1 2

R24 1KR24 1K

USB_MCARD1_DET#

CLKRUN#

PCIE_WAKE# IRQ_SERIRQ THERM_ALERT#

IMVP_PWRGD

SIO_EXT_SMI# SIO_EXT_SCI#

SPKR MCH_ICH_SYNC#_R

TP9 TP10 TP11

SPKR

3

U19C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#/GPIO15

E19

STP_CPU#/GPIO25

L4

CLKRUN#/GPIO32

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP8

AG19

TACH1/GPIO1

AH21

TACH2/GPIO6

AG21

TACH3/GPIO7

A21

GPIO8

C12

LANPHYPC/GPIO12

C21

ENGDET/GPIO13

AE18

TACH0/GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

QRT_STATE0/GPIO27

D19

QRT_STATE1/GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP9

AJ20

TP10

AJ21

TP11

ICH9M REV 1.0

SMbus address D2

These are for backdrive issue .

+3.3V_RUN

R175

8.2K

CLK14 CLK48

SUSCLK

SLP_S3# SLP_S4# SLP_S5#

PWROK

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

CLPWROK

SLP_M#

CL_CLK0 CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST0# CL_RST1#

+3.3V_RUN

2

3 1

2N7002W-7-F

+3.3V_RUN

2

3 1

2N7002W-7-F

AH23 AF19 AE21 AD20

H1 AF3

P1

C16 E16 G17

C10

G20

M2

B13

R3

D20

D22

R5

R6

B16

F24 B19

F22 C19

C25 A19

F21 D18

A16 C18 C11 C20

Q19

Q18

5

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA4GP/GPIO36 SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMBSYS GPIO

Clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

Power MGTController Link

CK_PWRGD

GPIO

MEM_LED/GPIO24

ALERT#/GPIO10

NETDETECT/GPIO14

WOL_EN/GPIO9

MISC

ICH_SMBDATA[21] SDATA [15,26]

4

CLK_ICH_14M CLK_ICH_48M

ICH_SUSCLK

PWROK DPRSLPVR

ICH_BATLOW#

RSV_ICH_LAN_RST#

ICH_RSMRST#

ICH_CL_PWROK

RSV_ICH_CL_CLK1

RSV_ICH_CL_DATA1

CL_VREF0

CL_RST1#

RSV_GPIO24 RSV_GPIO10 RSV_GPIO14 RSV_WOL_EN

2

4

RP27

2.2KX2

1

3

1 2

Non-iAMT

R346 8.2KR346 8.2K

R201 8.2KR201 8.2K

SCLK [15,26]ICH_SMBCLK[21]

CLK_ICH_14M [17] CLK_ICH_48M [17]

T146PAD T146PA D

SIO_SLP_S3# [23]

T64PAD T64PA D

SIO_SLP_S5# [23]

PWROK [6,23] DPRSLPVR [6,39]

12

+3.3V_SUS

SIO_PWRBTN# [23]

T47PAD T 47PAD

ICH_RSMRST# [23]

CLK_PWRGD [17]

ICH_CL_PWROK [6,23]

T137PAD T137PAD

CL_CLK0 [6]

T52PAD T 52PAD

CL_DATA0 [6]

T134PAD T134PAD

ICH_CL_RST0# [6]

T53PAD T 53PAD

T136PAD T136PAD T49PAD T 49PAD T72PAD T 72PAD T48PAD T 48PAD

12

+3.3V_SUS

6

PWROK

DPRSLPVR

ICH_RSMRST#

RSV_ICH_LAN_RST#

Non-iAMT

ICH_CL_PWROK

RSV_GPIO10

Non-iAMT

CL_VREF0

12

C240

0.1U

16

16 402

402

CL_VREF0/1 ~=0.405V

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

ICH9-M (PM,GPIO,SMB,CL)

VM9M 1A

7

CLK_ICH_48M

R226

R226 *10_NC

*10_NC

CLK_ICH_14M

R721

R721 *10_NC

*10_NC

R192 10KR192 10K

R352 100KR352 100K

1 2

R157 10KR157 10K

R176 10KR176 10K

R206 1MR206 1M

R180 10KR180 10K

+3.3V_RUN

R168

3.24K/F

1 2

12

R164

R164 453/F

453/F

1 2 12

C309

C309 *4.7P_NC

*4.7P_NC

50

1 2 12

C457

C457 *4.7P_NC

*4.7P_NC

50

12

+3.3V_SUS

12

of

13 46Saturday, June 06, 2009

8

1

U19E

AA26

VSS[001]

AA27

VSS[002]

AA3

VSS[003]

AA6

VSS[004]

AB1

VSS[005]

AA23

VSS[006]

AB28

VSS[007]

AB29

VSS[008]

AB4

VSS[009]

AB5

VSS[010]

AC17

VSS[011]

A A

B B

C C

D D

AC26 AC27

AC3

AD1 AD10 AD12 AD13 AD14 AD17 AD18 AD21 AD28 AD29

AD4

AD5

AD6

AD7

AD9 AE12 AE13 AE14 AE16 AE17

AE2 AE20 AE24

AE3

AE4

AE6

AE9

AF13 AF16 AF18 AF22

AH26

AF26 AF27

AF5

AF7

AF9 AG13 AG16 AG18 AG20 AG23

AG3

AG6

AG9 AH12 AH14 AH17 AH19

AH2 AH22 AH25 AH28

AH5

AH8

AJ12 AJ14 AJ17

B11

B14

B17

B20

B23

C26

C27

E11

E14

E18

E21

E24

G12

G14

G18

G21

G24

G26

G27

H23

H28

H29

AJ8

F16 F28 F29

B2

B5 B8

E2

E5 E8

G8 H2

ICH9M REV 1.0

VSS[012] VSS[013] VSS[014] VSS[015] VSS[016] VSS[017] VSS[018] VSS[019] VSS[020] VSS[021] VSS[022] VSS[023] VSS[024] VSS[025] VSS[026] VSS[027] VSS[028] VSS[029] VSS[030] VSS[031] VSS[032] VSS[033] VSS[034] VSS[035] VSS[036] VSS[037] VSS[038] VSS[039] VSS[040] VSS[041] VSS[042] VSS[043] VSS[044] VSS[045] VSS[046] VSS[047] VSS[048] VSS[049] VSS[050] VSS[051] VSS[052] VSS[053] VSS[054] VSS[055] VSS[056] VSS[057] VSS[058] VSS[059] VSS[060] VSS[061] VSS[062] VSS[063] VSS[064] VSS[065] VSS[066] VSS[067] VSS[068] VSS[069] VSS[070] VSS[071] VSS[072] VSS[073] VSS[074] VSS[075] VSS[076] VSS[077] VSS[078] VSS[079] VSS[080] VSS[081] VSS[082] VSS[083] VSS[084] VSS[085] VSS[086] VSS[087] VSS[088] VSS[089] VSS[090] VSS[091] VSS[092] VSS[093] VSS[094] VSS[095] VSS[096] VSS[097] VSS[098] VSS[099] VSS[100] VSS[101] VSS[102] VSS[103] VSS[104] VSS[105] VSS[106]

1

VSS[107] VSS[108] VSS[109] VSS[110] VSS[111] VSS[112] VSS[113] VSS[114] VSS[115] VSS[116] VSS[117] VSS[118] VSS[119] VSS[120] VSS[121] VSS[122] VSS[123] VSS[124] VSS[125] VSS[126] VSS[127] VSS[128] VSS[129] VSS[130] VSS[131] VSS[132] VSS[133] VSS[134] VSS[135] VSS[136] VSS[137] VSS[138] VSS[139] VSS[140] VSS[141] VSS[142] VSS[143] VSS[144] VSS[145] VSS[146] VSS[147] VSS[148] VSS[149] VSS[150] VSS[151] VSS[152] VSS[153] VSS[154] VSS[155] VSS[156] VSS[157] VSS[158] VSS[159] VSS[160] VSS[161] VSS[162] VSS[163] VSS[164] VSS[165] VSS[166] VSS[167] VSS[168] VSS[169] VSS[170] VSS[171] VSS[172] VSS[173] VSS[174] VSS[175] VSS[176] VSS[177] VSS[178] VSS[179] VSS[180] VSS[181] VSS[182] VSS[183] VSS[184] VSS[185] VSS[186] VSS[187] VSS[188] VSS[189] VSS[190] VSS[191] VSS[192] VSS[193] VSS[194] VSS[195] VSS[196] VSS[197] VSS[198]

VSS_NCTF[01] VSS_NCTF[02] VSS_NCTF[03] VSS_NCTF[04] VSS_NCTF[05] VSS_NCTF[06] VSS_NCTF[07] VSS_NCTF[08] VSS_NCTF[09] VSS_NCTF[10] VSS_NCTF[11] VSS_NCTF[12]

H5 J23 J26 J27 AC22 K28 K29 L13 L15 L2 L26 L27 L5 L7 M12 M13 M14 M15 M16 M17 M23 M28 M29 N11 N12 N13 N14 N15 N16 N17 N18 N26 N27 P12 P13 P14 P15 P16 P17 P2 P23 P28 P29 P4 P7 R11 R12 R13 R14 R15 R16 R17 R18 R28 T12 T13 T14 T15 T16 T17 T23 B26 U12 U13 U14 U15 U16 U17 AD23 U26 U27 U3 V1 V13 V15 V23 V28 V29 V4 V5 W26 W27 W3 Y1 Y28 Y29 Y4 Y5 AG28 AH6 AF2 B25

A1 A2 A28 A29 AH1 AH29 AJ1 AJ2 AJ28 AJ29 B1 B29

2

+5V_RUN

+3.3V_RUN

Non-iAMT

+5V_SUS

+3.3V_SUS

2

+RTC_CELL

R212 10R212 10

1 2

D12

2 1

RB751V-40

R351 10R351 10

1 2

D13

2 1

RB751V-40

+1.5V_RUN

L21

L21 BLM21PG331SN1D

BLM21PG331SN1D

805

646mA

12

+

C429

+

C429 220U

220U

3528

3528 4

4

+1.5V_RUN

10uH+-20%_100mA

+VCCSATPLL

12

C447

C447 1U

1U

10

10 603

603

C232

C232 10U

10U

1 2

603

6.3

Remove R342 0ohm resistor Ray 5/27

L40

L40 10uH

10uH

805

47mA

12

C448

C448 10U

10U

6.3

6.3 603

603

Non-iAMT

+3.3V_RUN

+1.5V_PCIE_ICH

3

C443

C441

C441 *0.1U_NC

*0.1U_NC

0.1U

1 2

16

16 402

402

+ICH_V5REF_RUN

2mA

C288

0.1U

1 2

16

16 402

402

+ICH_V5REF_SUS

2mA

C458

0.1U

1 2

16

16 402

402

FB_330ohm+-25%_100mHz_

1.5A_0.09 ohm DC

C244

C244 10U

10U

1 2

603

6.3

+1.5V_PCIE_ICH

C245

2.2U

1 2

10

10 805

805

+1.5V_RUN

VCC1_5_A TOTAL 1.342A

+1.5V_RUN

1 2

12

3

C237

4.7U

6.3

6.3 603

603

C235

0.1U

16

16 402

402

11mA

+1.5V_RUN

C450

0.1U

1 2

16

1 2

402

T139

PAD

T138

PAD

+VCCSATPLL

12

C273

C273 1U

1U

10

10 603

603

12

C270

C270 1U

1U

10

10 603

603

C286

0.1U

16

16 402

402

TP_VCCSUSLAN1 TP_VCCSUSLAN2

19mA

ICH_GLANPLL

23mA

80mA

+3.3V_RUN

1mA

4

AA24

AA25 AB24 AB25 AC24 AC25 AD24 AD25 AE25 AE26 AE27 AE28 AE29

W24 W25

AJ19

AC16 AD15 AD16 AE15

AF15 AG15 AH15

AJ15

AC11 AD11 AE11

AF11 AG10 AG11 AH10

AJ10

AC18 AC19

AC21

AC12 AC13 AC14

A23

AE1

F25 G25 H24 H25

K24 K25

M24 M25 N23 N24 N25 P24 P25 R24 R25 R26 R27 T24 T27 T28 T29 U24 U25 V24 V25 U23

K23 Y24 Y25

AC9

G10

AA7 AB6 AB7 AC6 AC7

A10 A11

A12 B12

A27

D28 D29 E26 E27

A26

A6

J24 J25

L23 L24 L25

G9

AJ5

U19F

VCCRTC

V5REF

V5REF_SUS

VCC1_5_B[01] VCC1_5_B[02] VCC1_5_B[03] VCC1_5_B[04] VCC1_5_B[05] VCC1_5_B[06] VCC1_5_B[07] VCC1_5_B[08] VCC1_5_B[09] VCC1_5_B[10] VCC1_5_B[11] VCC1_5_B[12] VCC1_5_B[13] VCC1_5_B[14] VCC1_5_B[15] VCC1_5_B[16] VCC1_5_B[17] VCC1_5_B[18] VCC1_5_B[19] VCC1_5_B[20] VCC1_5_B[21] VCC1_5_B[22] VCC1_5_B[23] VCC1_5_B[24] VCC1_5_B[25] VCC1_5_B[26] VCC1_5_B[27] VCC1_5_B[28] VCC1_5_B[29] VCC1_5_B[30] VCC1_5_B[31] VCC1_5_B[32] VCC1_5_B[33] VCC1_5_B[34] VCC1_5_B[35] VCC1_5_B[36] VCC1_5_B[37] VCC1_5_B[38] VCC1_5_B[39] VCC1_5_B[40] VCC1_5_B[41] VCC1_5_B[42] VCC1_5_B[43] VCC1_5_B[44] VCC1_5_B[45] VCC1_5_B[46] VCC1_5_B[47] VCC1_5_B[48] VCC1_5_B[49]

VCCSATAPLL

VCC1_5_A[01] VCC1_5_A[02] VCC1_5_A[03] VCC1_5_A[04] VCC1_5_A[05] VCC1_5_A[06] VCC1_5_A[07] VCC1_5_A[08]

VCC1_5_A[09] VCC1_5_A[10] VCC1_5_A[11] VCC1_5_A[12] VCC1_5_A[13] VCC1_5_A[14] VCC1_5_A[15] VCC1_5_A[16]

VCC1_5_A[17]

VCC1_5_A[18] VCC1_5_A[19]

VCC1_5_A[20]

VCC1_5_A[21] VCC1_5_A[22]

VCC1_5_A[23] VCC1_5_A[24] VCC1_5_A[25]

VCCUSBPLL

VCC1_5_A[26] VCC1_5_A[27] VCC1_5_A[28] VCC1_5_A[29] VCC1_5_A[30]

VCCLAN1_05[1] VCCLAN1_05[2]

VCCLAN3_3[1] VCCLAN3_3[2]

VCCGLANPLL

VCCGLAN1_5[1] VCCGLAN1_5[2] VCCGLAN1_5[3] VCCGLAN1_5[4]

VCCGLAN3_3

ICH9M REV 1.0

CORE

VCCA3GP ATXARX USB CORE

VCCP_COREVCCPSUSVCCPUSB

PCI

VCCSUS1_05[1] VCCSUS1_05[2]

VCCSUS1_5[1]

VCCSUS1_5[2]

VCCSUS3_3[01] VCCSUS3_3[02] VCCSUS3_3[03] VCCSUS3_3[04]

VCCSUS3_3[05]

VCCSUS3_3[06] VCCSUS3_3[07] VCCSUS3_3[08] VCCSUS3_3[09] VCCSUS3_3[10] VCCSUS3_3[11] VCCSUS3_3[12] VCCSUS3_3[13] VCCSUS3_3[14] VCCSUS3_3[15] VCCSUS3_3[16] VCCSUS3_3[17] VCCSUS3_3[18] VCCSUS3_3[19] VCCSUS3_3[20]

GLAN POWER

5

VCC1_05[01] VCC1_05[02] VCC1_05[03] VCC1_05[04] VCC1_05[05] VCC1_05[06] VCC1_05[07] VCC1_05[08] VCC1_05[09] VCC1_05[10] VCC1_05[11] VCC1_05[12] VCC1_05[13] VCC1_05[14] VCC1_05[15] VCC1_05[16] VCC1_05[17] VCC1_05[18] VCC1_05[19] VCC1_05[20] VCC1_05[21] VCC1_05[22] VCC1_05[23] VCC1_05[24] VCC1_05[25] VCC1_05[26]

VCCDMIPLL

VCC_DMI[1] VCC_DMI[2]

V_CPU_IO[1] V_CPU_IO[2]

VCC3_3[01]

VCC3_3[02]

VCC3_3[07]

VCC3_3[03] VCC3_3[04] VCC3_3[05] VCC3_3[06]

VCC3_3[08] VCC3_3[09] VCC3_3[10] VCC3_3[11] VCC3_3[12] VCC3_3[13] VCC3_3[14]

VCCHDA

VCCSUSHDA

VCCCL1_05

VCCCL1_5

VCCCL3_3[1] VCCCL3_3[2]

5

A15 B15 C15 D15 E15 F15 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29

W23 Y23

AB23 AC23

AG29

C268

0.1U

1 2

16

16 402

402

+1.5V_DMIPLL

23mA

+VCC_DMI_ICH

48mA

2mA

VCC3_3 308mA

AJ6

AC10

AD19 AF20 AG24 AC20

B9 F9 G3 G6 J2 J7 K7

AJ4

AJ3

AC8 F17

AD8

F18

A18 D16 D17 E22

AF1

VCCSUS 3_3 212mA

T1 T2 T3 T4 T5 T6 U6 U7 V6 V7 W6 W7 Y6 Y7 T7

G22

G23

A24 B24

19mA

+1.5V_RUN

C313

0.1U

1 2

16

16 402

402

C298

C298 *0.1U_NC

*0.1U_NC

1 2

16

+VCC_HDA_ICH

+VCCSUSHDA

TP_VCCSUS1.05_1 TP_VCCSUS1.05_2TP_VCCSUS1.05_2

TP_VCCSUS1.5_1

TP_VCCSUS1.5_2

11mA

C264 0.1UC264 0.1U

WWAN Noise - ICH improvements

12

C265

C265 *0.1U_NC

*0.1U_NC

16

16 402

402

+VCCCL1_05

+VCCCL1_5

+3.3V_RUN

Non-iAMT

L39 1uH/300mA_8L39 1uH/300mA_8

1 2

12

C312

C312 *0.1U_NC

*0.1U_NC

16

16 402

402

12

6

+1.05V_VCCP

C282

0.1U

16

16 402

402

1 2

C241

0.1U

16

16 402

402

C249

C249 *0.1U_NC

*0.1U_NC

16

T80P AD T80PAD T62P AD T62PAD

C289

0.22U/10V

C433

C433 10U

10U

805

805 10

10

6

1uH+-20%_800mA

C435

0.01U

25

1 2

12

C451

0.1U

16

16 402

402

T79P AD T79PAD

12

C318

C318 *0.1U_NC

*0.1U_NC

16

16 402

402

C251

C251 *0.1U_NC

*0.1U_NC

1 2

16

16 402

402

ICH_GLANPLLICH_GLANPLL

12

C434

2.2U

603

603 10

10

7

+1.05V_VCCP +1.5V_RUN

C436

C436 10U

10U

1 2

6.3

6.3 603

603

12

C254

4.7U

603

6.3

+3.3V_RUN

C300

0.1U

16

16 402

402

C291

0.1U

16

16 402

402

D11

1

2

BAT54C T/R

L38

L38 1uH

1uH

+1.5V_DMIPLL_R

12

L22

BLM21PG331SN1D

805

C246

0.1U

1 2

16

16 402

402

Remove R348 0ohm resistor Ray 5/27

+3.3V_RUN

R198

1 2

3

10

R320 1R320 1

+1.05V_VCCP

C262

C262 *0.1U_NC

*0.1U_NC

1 2

16

+VCCSUSHDA

11mA

+3.3V_SUS

12

C290

0.22U/10V

12

C272

0.1U

16

16 402

402

12

C311

C248

0.1U

*0.1U_NC

16

402

12

C250

C250 *1U_NC

*1U_NC

10

10 603

603

C252

0.1U

16

16 402

402

QUANTA

QUANTA COMPUTER

COMPUTER

Title

Size Document Number Rev

Date: Sheet

COMPUTER

ICH9-M (POWER,GND)

VM9M 1A

7

8

805

+1.5V_RUN

12

+1.05V_VCCP

12

C255

C255 *4.7U_NC

*4.7U_NC

603

6.3

Remove R229 0ohm resistor Ray 5/27

12

C307

0.1U

16

16 402

402

+3.3V_SUS

14 46Wednesday, June 03, 2009

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