DELL PP41L Schematics

5

D D

4

3

2

1

DR1 (Roberts) Schematics Document

uFCPGA Mobile Penryn

Intel Cantiga-GM + ICH9M

C C

2008-10-02

REV : A00

B B

DY : Nopop Component

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cover Page

Cover Page

Cover Page

Roberts

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158Thursday, October 02, 2008

158Thursday, October 02, 2008

A00

A00

A00

5

4

3

2

1

CPU DC/DC

Roberts Block Diagram

ISL6266A

INPUTS

+PWR_SRC

28,29

OUTPUTS

+VCC_CORE

D D

Clock Generator

SLG8SP513VTR

4

Intel Mobile CPU

Penryn

Socket P

5,6,7

Project code : 91.4AQ01.001
PCB P/N : 48.4AQ01.011
Revision : 08212-1

SYSTEM DC/DC

TPS51117

INPUTS

+PWR_SRC

OUTPUTS

+1.05V_VCCP

30

SYSTEM DC/DC

FSB
800/1066MHz

Intel

DDRII
667/800

C C

DDRII
667/800

SD/MMC
MS/MS Pro/xD

B B

CAMERA Module

37

Digital Mic Array

MIC IN

Internal Analog MIC

Slot 0

14

Slot 1

15

CardReader

Realtek
RTS5158E

Azalia
CODEC

IDT
92HD71B7

DDRII 667/800 Channel A

DDR II 667/800 Channel B

USB2.0

21

AZALIA

22

Cantiga-GML

AGTL+ CPU I/F
DDR Memory I/F
External Graphics

DMIx4

Intel

ICH9-M

USB 2.0/1.1 ports (12)
PCI Express ports (6)
High Definition Audio

SATA ports (4)

LPC I/F
ACPI 1.1

PCI/PCI BRIDGE

8,9,10,11,12,13

C-LINK

16,17,18,19

RGB CRT

LVDS(Dual Channel)

PCIE

USB 2.0

LPC Bus

PCIE x 1

CRT
(on I/O board)

LCD

35

PCIE x 1 & USB 2.0 x 1

10/100 NIC

Marvell 88E8040

PCIE x 1

20

USB 2.0 x 2

USB 2.0 x 1

USB 2.0 x 1

USB 2.0 x 1

Power SW

G577BR91U

New Card

I/O Board

Connector

41

Mini-Card

802.11a/b/g

CAMERA
(Option)

Bluetooth

Right Side:
USB x 1

41

41

37

41

41

43

RJ45
CONN

Left Side:
USB x 2

INPUTS

+PWR_SRC

SYSTEM DC/DC

INPUTS

+PWR_SRC

SYSTEM DC/DC

INPUTS

SYSTEM DC/DC

INPUTS

+5V_ALW
+3.3V_ALW

MAXIM CHARGER

INPUTS

+DC_IN
+PBATT

PCB LAYER

L1: Top

OUTPUTS

+5V_ALW2
+3.3V_RTC_LDO
+5V_ALW
+3.3V_ALW

TPS51116

OUTPUTS

+1.8V_SUS
+0.9V_DDR_VTT
+V_DDR_MCH_REF

APL5912

OUTPUTS

LDO

OUTPUTS

MAX8731A

L2: VCC

MAX17020

HP1

A A

OP AMP

MAX9789A

SATA

23

SATA

2CH SPEAKER

HDD

40

5

4

ODD

36 36

SPI

Flash ROM

2MB

3

WINBOND

WPCE773L

Touch
PAD

42 44

44

Int.
KB

24

Thermal & Fan

EMC2102

<Core Design>

<Core Design>

<Core Design>

25

Title

Title

Title

Block Diagram

Block Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Block Diagram

KBC

L3: Signal
L4: Signal
L5: GND
L6: Bottom

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

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258Thursday, October 02, 2008

258Thursday, October 02, 2008

258Thursday, October 02, 2008

+1.5V_RUN+1.8V_SUS

+5V_RUN
+3.3V_RUN

OUTPUTS

+PWR_SRC

A00

A00

A00

27

31

32

34

26

A

ICH9M Functional Strap Definitions

Signal

HDA_SDOUT

4 4

HDA_SYNC PCIE config1 bit0,

GNT2#/
GPIO53

GPIO20 Reserved.
GNT1#/

GPIO51

GNT3#/
GPIO55

GNT0#:
SPI_CS1#/

3 3

GPIO58
SPI_MOSI Integrated TPM Enable,

GPIO49 DMI Termination

SATALED# PCI Express Lane

SPKR

TP3
GPIO33/

HDA_DOCK

2 2

_EN#

Usage/When Sampled

XOR Chain Entrance/
PCIE Port Config1 bit1,
Rising Edge of PWROK.

Rising Edge of PWROK.

PCIE config2 bit2,
Rising Edge of PWROK.

ESI Strap (Server Only)
Rising Edge of PWROK.

Top-Block Swap
override. Rising Edge
of PWROK.

Boot BIOS Destination
Selection 0:1.
Rising Edge of PWROK.

Rising Edge of CLPWROK.

Voltage. Rising Edge
of CLPWROK.

Reversal. Rising Edge
of PWROK.

No Reboot.
Rising Edge of PWROK.

XOR Chain Entrance.
Rising Edge of PWROK.

Flash Descriptor
Security Override
Strap. Rising Edge of
PWROK.

Allows entrance to XOR Chain testing when TP3
pulled low. When TP3 not pulled low at rising edge
of PWROK, sets bit1 of RPC.PC (Cofig Registers:
offset 224h). This signal has weak internal
pull-down.

This signal has a weak internal pull-down.
Sets bit0 of PRC.PC (Config Registers: Offset
224h).

This signal has a weak internal pull-up.
Sets bit2 of PRC.PC2 (Config Registers: Offset
224h).

This signal should not be pulled high.
ESI compatible mode is for server platforms only.

This signal should not be pulled low for desktop
and mobile.

Sampled low: Top-Block Swap mode (inverts A16 for
all cycles targeting FWH BIOS space).
Note: Software will not be able to clear the
Top-Swap bit until the system is rebooted
without GNT3# being pulled down.

Controllable via Boot BIOS Destination bit
(Config Registers: Offset 3410h:bit 11:10).
GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC

Sample low: the Integrated TPM will be disable.
Sample high: the MCH TPM enable strap is sampled
low and the TPM Disable bit is clear, the
Integrated TPM will be enable.

The signal is required to be low for desktop
applications and required to be high for mobile
applications.

Signal has weak internal pull-up. Sets bit 27
of MPC.LR (Device 28: Function 0:Offset D8).

If sampled high, the system is strapped to the
"No Reboot" mode (ICH9 will disable the TCO Timer
system reboot feature). The status is readable
via the NO REBOOT bit.

This signal should not be pull low unless using
XOR Chain testing.

Sampled low: the Flash Descriptor Security will be
overridden. If high, the security measures will be
in effect. This should only be enabled in
manufacturing environments using an external
pull-up resister.

ICH9 EDS 642879 Rev.1.5

Comment

B

ICH9 Integrated pull-up
and pull-down Resistors

C

Cantiga chipset and ICH9M I/O controller

D

E

Hub strapping configuration

ICH9 EDS 642879 Rev.1.5 Montevina Platform Design guide 22339 Rev.0.5

SIGNAL Resistor Type/Value

CL_CLK[1:0]
CL_DATA[1:0]
CL_RST0#
DPRSLPVR/GPIO16
ENERGY_DETECT
HDA_BIT_CLK
HDA_DOCK_EN#/GPIO33
HDA_RST#
HDA_SDIN[3:0]
HDA_SDOUT
HDA_SYNC
GLAN_DOCK#

GNT[3:0]#/GPIO[55,53,51]

GPIO20
GPIO49
LDA[3:0]#/FHW[3:0]#
LAN_RXD[2:0]
LDRQ[0]
LDRQ[1]/GPIO23
PME#
PWRBTN#
SATALED#

SPI_CS1#/GPIO58/CLGPIO6

SPI_MOSI
SPI_MISO
SPKR
TACH_[3:0]
TP[3]
USB[11:0][P,N]

PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K
PULL-DOWN 20K

The pull-up or pull-down
active when configured
for native GLAN_DOCK#
functionality and determined
by LAN controller.

PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 20K
PULL-UP 15K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-DOWN 20K
PULL-UP 20K
PULL-UP 20K
PULL-DOWN 15K

Pin Name

CFG[2:0] FSB Frequency Select 000 = FSB1067

CFG[4:3]
CFG8
CFG[15:14]
CFG[18:17]

CFG5 DMI x2 Select 0 = DMI x2

CFG6 iTPM Host Interface

CFG7 Intel Management

CFG9

CFG10 PCIE Loopback enable 0 = Enable (Note 3)

CFG[13:12] XOR/ALL

CFG16 FSB Dynamic ODT 0 = Dynamic ODT Disabled

CFG19 DMI Lane Reversal

CFG20 Digital Display Port

SDVO
_CTRLDATA

L_DDC_DATA Local Flat Panel

NOTE:

1. All strap signals are sampled with respect to the leading edge of the (G)MCH
Power OK (PWROK) signal.

2. iTPM can be disabled by a 'Soft-Strap' option in the Flash-decriptor section of
the Firmware. This 'Soft-Strap' is activated only after enabling iTPM via CFG6.
Only one of the CFG10/CFG12/CFG13 straps can be enabled at any time.

Strap Description Configuration

011 = FSB667
010 = FSB800

Reserved

engine crypto strap

PCIE Graphics Lane 0 = Reserved Lanes, 15->0, 14->1 ect..

(SDVO/DP/iHDMI)
Concurrent with PCIe

SDVO Present

(LFP) Present

others = Reserved

1 = DMI x4 (Default)

0 = The iTPM Host Interface is enabled (Note 2)

1 = The iTPM Host Interface is disabled (default)

0 = Transport Layer Security (TLS) cipher

suite with no confidentiality

1 = TLS cipher suite with confidentiality(Default)

1 = Normal operation (Default): Lane Numbered in

Order

1 = Disable (Default)

00 = Reserve
10 = XOR mode Enabled
01 = ALLZ mode Enable (Note 3)

11 = Disabled (Default)

1 = Dynamic ODT Enabled (Default)
0 = Normal operation (Default): Lane Numbered in

Order

1 = Reverse Lanes
DMI x4 mode [MCH->ICH]: (3->0, 2->1, 1->2 and 0->3)
DMI x2 mode [MCH->ICH]: (3->0, 2->1)

0 = Only Digital Display Port or PCIE is

operational (Default)

1 = Digital display Port and PCIe are operating

simulataneously via the PEG port

0 = No SDVO Card Present (Default)

1 = SDVO Card Present

0 = LFP Disabled (Default)

1 = LFP Card Present; PCIE disabled

USB TablePCIE Routing

0
1
2
3
4
5
6
7
8
9
10
11

USB

USB1
USB2
USB3
RESERVED
MINI CARD
RESERVED
BLUETOOTH
NEW CARD
RESERVED
RESERVED
Card Reader
CAMERA

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Table of Content

Table of Content

Table of Content

Roberts

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358Thursday, October 02, 2008

358Thursday, October 02, 2008

358Thursday, October 02, 2008

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A00

A00

A00

Pair Device

LANE2

MiniCard WLAN
LANE3 LAN
LANE5 New Card

1 1

5

4

3

2

1

SSID = CLOCK

23

VDDPLL3

GND

22

GNDSRC

GNDSRC

30

36

3D3V_S0_CK505_IO3D3V_S0_CK505

19

27

33

43

52

VDD96_IO

VDDSRC_IO

VDDSRC_IO

VDDSRC_IO

VDDPLL3_IO

27MHZ_NONSS/SRCT1/SE1

GND

GNDSRC

GNDCPU

26

49

59

56

61

CPUT0

60

VDDCPU_IO

27MHZ_SS/SRCC1/SE2

GND

65

CPUC0

58

CPUT1_F

57

CPUC1_F

SRCT6
SRCC6

SRCT10
SRCC10

SRCT9
SRCC9

SRCT4
SRCC4

54
53

51
50

48
47

41
42

40
39

37
38

34
35

31
32

28
29

24
25

20
21

CPUT2_ITP/SRCT8

CPUC2_ITP/SRCC8

SRCT7/CR#_F
SRCC7/CR#_E

SRCT11/CR#_H

SRCC11/CR#_G

SRCT3/CR#_C

SRCC3/CR#_D

SRCT2/SATAT

SRCC2/SATAC

SRCT0/DOTT_96

SRCC0/DOTC_96

Main source: 71.08513.003 (SLG8SP513VTR)
2nd source: 71.00875.C03 (RTM875N-606-VD-GRT)
3rd source:

Co-layout Ref: 71.09355.B03 (ICS9LPRS355BKLFT)

+3.3V_RUN

R204

R204

D D

C C

B B

1 2

0R0603-PAD

0R0603-PAD

12

C229

C229

SC1U10V3KX-3GP

SC1U10V3KX-3GP

+3.3V_RUN 3D3V_S0_CK505

R200

R200

1 2

0R0603-PAD

0R0603-PAD

12

C233

C233

SC1U10V3KX-3GP

SC1U10V3KX-3GP

DY

DY

12

C226

C226

12

C211

C211

12

12

C210

C210

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

12

C218

C218

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C239

C239

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

C238

C238

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

CLKSATAREQ#18

CLKREQ#_B9

PCLK_FWH37
PCLK_KBC24

CLK_PCI_ICH16

CLK_14M_ICH18

12

C209

C209

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C207

C207

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

3D3V_S0_CK505_IO

12

12

C215

C215

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

12

C225

C225

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

C237

C237

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

C234

C234

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C236

C236

DY

DY

C462

C462

SC12P50V2JN-3GP

SC12P50V2JN-3GP

CLK_48M_CARD21

CLK_48M_ICH18

H_STP_PCI#18
H_STP_CPU#18

ICH_SMBCLK14,15,18

ICH_SMBDATA14,15,18

CK_PWRGD18

A00.08/0922

12

12

C243

C243

DY

DY

DY

DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

X3

X3

1 2

X-14D31818M-37GP

X-14D31818M-37GP

12

SC12P50V2JN-3GP

SC12P50V2JN-3GP

1 2

C245 SC4D7P50V2CN-1GP

C245 SC4D7P50V2CN-1GP

R178 475R2F-L1-GPR178 475R2F-L1-GP

1 2

R196 33R2J-2-GP

R196 33R2J-2-GP

1 2

R207 33R2J-2-GPR207 33R2J-2-GP

1 2

R212 33R2J-2-GPR212 33R2J-2-GP

1 2

R190 33R2J-2-GPR190 33R2J-2-GP

1 2

C224

C224

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

C461

C461

R217 22R2J-2-GPR217 22R2J-2-GP

1 2

DY

DY

DY

DY

CLK_XTAL_IN

CLK_XTAL_OUT

12

R216

R216

1 2

22R2J-2-GP

22R2J-2-GP

CLKREQ#_1
PCI2_TME

27_SEL
ITP_EN

FSB
FSC

FSA

4

46

62

16

VDD48

VDDREF

GNDPCI

GND48

15

18

9

VDDPCI

VDDSRC

GNDREF

1

VDDCPU

U54

U54

3

X1

2

X2

17

USB_48MHZ/FSLA

45

PCI_STOP#

44

CPU_STOP#

ICS9LPRS355BKLFT-GP-U

ICS9LPRS355BKLFT-GP-U

7

SCLK

6

SDATA

63

CK_PWRGD/PD#

8

PCI0/CR#_A

10

PCI1/CR#_B

11

PCI2/TME

12

PCI3

13

PCI4/27_SELECT

14

PCI_F5/ITP_EN

64

FSLB/TEST_MODE

5

REF0/FSLC/TEST_SEL

55

NC#55

NEWCARD_CLKREQ#
MINI1_CLKREQ#

NEWCARD_CLKREQ#

CLK_PCIE_NEW
CLK_PCIE_NEW#

R193 10KR2J-3-GPR193 10KR2J-3-GP

1 2

R195 10KR2J-3-GPR195 10KR2J-3-GP

1 2

12

12

C463

C463

C464

DY

DY

C464

DY

DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

A00.08/0910

A00.08/0910

12

EC57

EC57

SC22P50V2JN-4GP

SC22P50V2JN-4GP

NEWCARD_CLKREQ# 41
MINI1_CLKREQ# 37

+3.3V_RUN

CLK_CPU_BCLK 5
CLK_CPU_BCLK# 5

CLK_MCH_BCLK 8
CLK_MCH_BCLK# 8

CLK_CPU_ITP 37
CLK_CPU_ITP# 37

CLK_PCIE_LAN 20
CLK_PCIE_LAN# 20

CLK_PCIE_NEW 41
CLK_PCIE_NEW# 41

CLK_PCIE_MINI1 37
CLK_PCIE_MINI1# 37

CLK_MCH_3GPLL 9
CLK_MCH_3GPLL# 9

CLK_PCIE_ICH 16
CLK_PCIE_ICH# 16

CLK_PCIE_SATA 17
CLK_PCIE_SATA# 17

MCH_SSCDREFCLK 9
MCH_SSCDREFCLK# 9

CLK_MCH_DREFCLK 9
CLK_MCH_DREFCLK# 9

3D3V_S0_CK505

12

R209

R209
10KR2J-3-GP

10KR2J-3-GP

ITP_EN

12

R218

R218

DY

DY

10KR2J-3-GP

10KR2J-3-GP

A A

ITP_EN Output

0 SRC8
1 CPU_ITP

SEL2
FSC

SEL1
FSB

1
0
01
0
00 0

5

3D3V_S0_CK505

12

R198

R198
10KR2J-3-GP

10KR2J-3-GP

PCI2_TME

12

R202

R202
10KR2J-3-GP

10KR2J-3-GP

DY

DY

SEL0
FSA

01
01

1
01

4

PCI2_TME Output

0

Overclocking of CPU and SRC allowed

1

Overclocking of CPU and SRC not allowed

CPU

100M
133M
166M
200M

FSB

X
533M
667M
800M

1067M266M

12

R206

R206
10KR2J-3-GP

10KR2J-3-GP

27_SEL

CLK_MCH_DREFCLK

12

EC140

EC140

DY

DY

SC47P50V2JN-3GP

SC47P50V2JN-3GP

CLK_MCH_DREFCLK#

12

EC139

EC139

DY

DY

SC47P50V2JN-3GP

SC47P50V2JN-3GP

27_SEL PIN 20 PIN 21

0 DOT96T DOT96C
1 SRCT0 SRCC0

R186 10KR2J-3-GPR186 10KR2J-3-GP

CPU_BSEL26
CPU_BSEL16
CPU_BSEL06

1 2

R412 0R2J-2-GPR412 0R2J-2-GP

1 2

R214 2K2R2J-2-GPR214 2K2R2J-2-GP

1 2

R215 1KR2J-1-GPR215 1KR2J-1-GP

1 2

R411 1KR2J-1-GPR411 1KR2J-1-GP

1 2

R181 1KR2J-1-GPR181 1KR2J-1-GP

1 2

3

FSC
FSB
FSA

MCH_CLKSEL0 9
MCH_CLKSEL1 9
MCH_CLKSEL2 9

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Clock Generator SLG8SP513VTR

Clock Generator SLG8SP513VTR

Clock Generator SLG8SP513VTR

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

GM45
PM45

A00

A00

A00

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of

of

458Thursday, October 02, 2008

458Thursday, October 02, 2008

458Thursday, October 02, 2008

1

DCCBB

A

SSID = CPU

H_A#[35..3]8

D

5

H_A#[35..3]

4

1 OF 4

1 OF 4

U41A

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15

H_ADSTB#08

H_REQ#[4..0]8

H_ADSTB#18

H_A20M#17

H_FERR#17

H_IGNNE#17

H_STPCLK#17

H_INTR17
H_NMI17
H_SMI#17

TP30TPAD30 TP30TPAD30
TP31TPAD30 TP31TPAD30
TP13TPAD30 TP13TPAD30
TP23TPAD30 TP23TPAD30
TP21TPAD30 TP21TPAD30
TP24TPAD30 TP24TPAD30
TP19TPAD30 TP19TPAD30
TP55TPAD30 TP55TPAD30

TP25TPAD30 TP25TPAD30

TP34TPAD30 TP34TPAD30
TP12TPAD30 TP12TPAD30

H_A#16

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

RSVD_CPU_1
RSVD_CPU_2
RSVD_CPU_3
RSVD_CPU_4
RSVD_CPU_5
RSVD_CPU_6
RSVD_CPU_7
RSVD_CPU_8
RSVD_CPU_9
RSVD_CPU_10

RSVD_CPU_11

U41A

J4

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD#M4

N5

RSVD#N5

T2

RSVD#T2

V3

RSVD#V3

B2

RSVD#B2

C3

RSVD#C3

D2

RSVD#D2

D22

RSVD#D22

D3

RSVD#D3

F6

RSVD#F6

B1

KEY_NC

BGA479-SKT6-GPU7

BGA479-SKT6-GPU7

62.10040.221

ADDR GROUP 0

ADDR GROUP 0

ADDR GROUP 1

ADDR GROUP 1

ICH

ICH

TEST7

RESERVED

RESERVED

DEFER#

DRDY#
DBSY#

LOCK#

RESET#

TRDY#

BPM0#
BPM1#
BPM2#
BPM3#
PRDY#
PREQ#

TRST#

XDP/ITP SIGNALS CONTROL

XDP/ITP SIGNALS CONTROL
THERMAL

THERMAL

PROCHOT#

THRMDA
THRMDC

THERMTRIP#

HCLK

HCLK

BCLK0
BCLK1

ADS#
BNR#

BPRI#

BR0#

IERR#

INIT#

RS0#
RS1#
RS2#

HIT#

HITM#

TCK

TDO
TMS

DBR#

H1
E2
G5

H5
F21
E1

F1

CPU_IERR#

D20
B3

H4

H_CPURST#

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3
G2

G6
E4

ITP_BPM#0

AD4

ITP_BPM#1

AD3

ITP_BPM#2

AD1

ITP_BPM#3

AC4

ITP_BPM#4

AC2

ITP_BPM#5

AC1

ITP_TCK

AC5

ITP_TDI

AA6

TDI

ITP_TDO

AB3

ITP_TMS

AB5

ITP_TRST#

AB6

ITP_DBRESET#

C20

R50 0R2J-2-GP

R50 0R2J-2-GP

R51 56R2J-4-GPR51 56R2J-4-GP

D21
A24
B25

C7

R76 56R2J-4-GP

R76 56R2J-4-GP

A22
A21

R47 56R2J-4-GPR47 56R2J-4-GP

1 2

ITP_BPM#0 37
ITP_BPM#1 37
ITP_BPM#2 37
ITP_BPM#3 37
ITP_BPM#4 37
ITP_BPM#5 37
ITP_TCK 37

ITP_TDO 37
ITP_TMS 37
ITP_TRST# 37

1 2

DY

DY

1 2

1 2

DY

DY

ITP_DBRESET# 37

A00.08/0903

H_ADS# 8
H_BNR# 8

H_BPRI# 8

H_DEFER# 8
H_DRDY# 8
H_DBSY# 8

H_BREQ#0 8

H_INIT# 17
H_LOCK# 8

H_CPURST# 8,37

H_RS#[2..0] 8

H_TRDY# 8
H_HIT# 8

H_HITM# 8

ITP_TDI 37

3

+1.05V_VCCP

CPU_PROCHOT# 28

+1.05V_VCCP

H_THERMDA 25
H_THERMDC 25

H_THRMTRIP# 9,17,24,34

+1.05V_VCCP

CLK_CPU_BCLK 4
CLK_CPU_BCLK# 4

2

H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil

H_THRMTRIP# should connect to
ICH9 and MCH without T-ing.

H_THERMDA

H_THERMDC

12

C49

C49

DY

DY

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

1

<Core Design>

<Core Design>

A

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU-FSB(1/3)

CPU-FSB(1/3)

CPU-FSB(1/3)

Roberts

Roberts

Roberts

of

of

of

558Thursday, October 02, 2008

558Thursday, October 02, 2008

558Thursday, October 02, 2008

A00

A00

A00

5

DCCBB

A

SSID = CPU

4

3

2

1

D

Layout notes
Z= 55 Ohm 0.5" MAX for CPU_GTLREF0

+1.05V_VCCP

R354

R354

2KR2F-3-GP

2KR2F-3-GP

H_DINV#[3..0]
H_DSTBN#[3..0]
H_DSTBP#[3..0]
H_D#[63..0]

R357

R357
1KR2F-3-GP

1KR2F-3-GP

1 2
12

DY

DY

CPU_GTLREF0

12

C376

C376

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

H_DINV#[3..0] 8
H_DSTBN#[3..0] 8
H_DSTBP#[3..0] 8
H_D#[63..0] 8

H_DSTBN#08
H_DSTBP#08
H_DINV#08

H_DSTBN#18
H_DSTBP#18
H_DINV#18

R53 1KR2J-1-GP

R53 1KR2J-1-GP

1 2

DY

DY

R60 1KR2J-1-GP

R60 1KR2J-1-GP

1 2

DY

DY

R58 1KR2J-1-GP

R58 1KR2J-1-GP

1 2

DY

DY

R7 1KR2J-1-GP

R7 1KR2J-1-GP

1 2

DY

DY

CPU_BSEL04
CPU_BSEL14
CPU_BSEL24

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31

TEST1
TEST2
CPU_TEST3

CPU_TEST5

U41B

U41B

E22

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

BGA479-SKT6-GPU7

BGA479-SKT6-GPU7

62.10040.221

2 OF 4

2 OF 4

DATA GRP0 DATA GRP1

DATA GRP0 DATA GRP1

DATA GRP2DATA GRP3

DATA GRP2DATA GRP3

DSTBN2#
DSTBP2#

DSTBN3#
DSTBP3#

MISC

MISC

DPRSTP#

PWRGOOD

D32#
D33#
D34#
D35#
D36#
D37#
D38#
D39#
D40#
D41#
D42#
D43#
D44#
D45#
D46#
D47#

DINV2#

D48#
D49#
D50#
D51#
D52#
D53#
D54#
D55#
D56#
D57#
D58#
D59#
D60#
D61#
D62#
D63#

DINV3#
COMP0

COMP1
COMP2
COMP3

DPSLP#

DPWR#

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

COMP0
COMP1
COMP2
COMP3

H_DSTBN#2 8
H_DSTBP#2 8
H_DINV#2 8

H_DSTBN#3 8
H_DSTBP#3 8
H_DINV#3 8

R350 27D4R2F-L1-GPR350 27D4R2F-L1-GP

1 2

R349 54D9R2F-L1-GPR349 54D9R2F-L1-GP

1 2

R14 27D4R2F-L1-GPR14 27D4R2F-L1-GP

1 2

R13 54D9R2F-L1-GPR13 54D9R2F-L1-GP

1 2

H_DPRSTP# 9,17,28
H_DPSLP# 17
H_DPWR# 8
H_PWRGOOD 17,34
H_CPUSLP# 8

PSI# 28

Layout Note:
Comp0, 2 connect with Zo=27.4 ohm, make
trace length shorter than 0.5".
Comp1, 3 connect with Zo=55 ohm, make
trace length shorter than 0.5".

Route the CPU_TEST3 and CPU_TEST5 signals
through a ground referenced Zo = 55-ohm trace
that ends in a via that is near a GND via
and is accessible through an oscilloscope connection.

<Core Design>

<Core Design>

A

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU-FSB(2/3)

CPU-FSB(2/3)

CPU-FSB(2/3)

Roberts

Roberts

Roberts

of

of

of

658Thursday, October 02, 2008

658Thursday, October 02, 2008

658Thursday, October 02, 2008

A00

A00

A00

5

4

3

2

1

SSID = CPU

D D

+VCC_CORE

3 OF 4

3 OF 4

U41C

U41C

A7

VCC

A9

VCC

A10

VCC

A12

VCC

A13

VCC

A15

VCC

A17

VCC

A18

VCC

A20

VCC

B7

VCC

B9

VCC

B10

VCC

B12

VCC

B14

VCC

B15

VCC

B17

VCC

B18

VCC

B20

VCC

C9

VCC

C10

VCC

C12

VCC

C13

VCC

C15

VCC

C C

B B

C17

VCC

C18

VCC

D9

VCC

D10

VCC

D12

VCC

D14

VCC

D15

VCC

D17

VCC

D18

VCC

E7

VCC

E9

VCC

E10

VCC

E12

VCC

E13

VCC

E15

VCC

E17

VCC

E18

VCC

E20

VCC

F7

VCC

F9

VCC

F10

VCC

F12

VCC

F14

VCC

F15

VCC

F17

VCC

F18

VCC

F20

VCC

AA7

VCC

AA9

VCC

AA10

VCC

AA12

VCC

AA13

VCC

AA15

VCC

AA17

VCC

AA18

VCC

AA20

VCC

AB9

VCC

AC10

VCC

AB10

VCC

AB12

VCC

AB14

VCC

AB15

VCC

AB17

VCC

AB18

VCC

BGA479-SKT6-GPU7

BGA479-SKT6-GPU7

62.10040.221

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP
VCCP

VCCA
VCCA

VID0
VID1
VID2
VID3
VID4
VID5
VID6

VCCSENSE

VSSSENSE

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

+VCC_CORE

layout note: "+1.5V_VCCA"
as short as possible

CPU_VID0
CPU_VID1
CPU_VID2
CPU_VID3
CPU_VID4
CPU_VID5
CPU_VID6

R311 100R2F-L1-GP-UR311 100R2F-L1-GP-U

R302 100R2F-L1-GP-UR302 100R2F-L1-GP-U

CPU_VID[6..0] 28

1 2

1 2

+VCC_CORE

12

DY

DY

+VCC_CORE

12

+VCC_CORE

12

+1.05V_VCCP

12

DY

DY

12

C25

C25

C36

C36

DY

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C15

C15

C14

C14

DY

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C12

C12

C17

C17

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C44

C44

TC17

TC17

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

ST220U2D5VBM-LGP

ST220U2D5VBM-LGP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

+VCC_CORE

VCC_SENSE 28

VSS_SENSE 28

DY

DY

DY

DY

DY

DY

12

C31

C31

12

C352

C352

12

C32

C32

12

C43

C43

DY

DY

R356

R356

12

C5

C5

12

C338

C338

12

C340

C340

12

C7

C7

12

DY

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

DY

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.5V_RUN+1.5V_VCCA

12

12

C11

C11

C370

DY

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

DY

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C374

C374

C370

DY

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C35

C35

C26

C26

DY

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C29

C29

C30

C30

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C9

C9

C45

C45

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

0R0603-PAD

0R0603-PAD

12

12

C377

C377
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

VCC_SENSE and VSS_SENSE lines
should be of equal length.

12

DY

DY

C365

C365

12

C357

C357

12

C368

C368

12

C366

C366

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C363

C363

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C336

C336
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C6

C6

C3

C3

DY

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C13

C13

C367

C367

DY

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C347

C347

C344

C344

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C8

C8
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Layout Note:
Place as close as possible
to the CPU VCCA pin.

12

C10

C10
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C24

C24
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

U41D

U41D

A4

VSS

A8

VSS

A11

VSS

A14

VSS

A16

VSS

A19

VSS

A23

VSS

AF2

VSS

B6

VSS

B8

VSS

B11

VSS

B13

VSS

B16

VSS

B19

VSS

B21

VSS

B24

VSS

C5

VSS

C8

VSS

C11

VSS

C14

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C25

VSS

D1

VSS

D4

VSS

D8

VSS

D11

VSS

D13

VSS

D16

VSS

D19

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E11

VSS

E14

VSS

E16

VSS

E19

VSS

E21

VSS

E24

VSS

F5

VSS

F8

VSS

F11

VSS

F13

VSS

F16

VSS

F19

VSS

F2

VSS

F22

VSS

F25

VSS

G4

VSS

G1

VSS

G23

VSS

G26

VSS

H3

VSS

H6

VSS

H21

VSS

H24

VSS

J2

VSS

J5

VSS

J22

VSS

J25

VSS

K1

VSS

K4

VSS

K23

VSS

K26

VSS

L3

VSS

L6

VSS

L21

VSS

L24

VSS

M2

VSS

M5

VSS

M22

VSS

M25

VSS

N1

VSS

N4

VSS

N23

VSS

N26

VSS

P3

VSS

BGA479-SKT6-GPU7

BGA479-SKT6-GPU7

62.10040.221

4 OF 4

4 OF 4

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

CPU_GND1

CPU_GND2
CPU_GND3

CPU_GND4

NCTF
PIN

TP10TP10

TP224TP224
TP20TP20

TP56TP56

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU-Power(3/3)

CPU-Power(3/3)

CPU-Power(3/3)

Roberts

Roberts

Roberts

758Thursday, October 02, 2008

758Thursday, October 02, 2008

758Thursday, October 02, 2008

1

of

of

of

A00

A00

A00

5

DCCBB

A

SSID = MCH

4

3

2

1

1 OF 10

U52A

U52A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

HOST

HOST

H_AVREF

H_D#[63..0]

H_CPURST#5,37
H_CPUSLP#6

12

C403

C403

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SWING
H_RCOMP

D

H_SWING

H_RCOMP

+1.05V_VCCP

12

R368

R368
221R2F-2-GP

221R2F-2-GP

12

R367

R367
100R2F-L1-GP-U

100R2F-L1-GP-U

H_SWING routing Trace width and
Spacing use 10 / 20 mil

H_SWING Resistors and
Capacitors close MCH
500 mil ( MAX )

12

C399

C399
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

H_RCOMP routing Trace width and
Spacing use 10 / 20 mil

1 2

24D9R2F-L-GP

24D9R2F-L-GP

R361

R361

H_D#[63..0]6

Place R51 near to the chip ( < 0.5")

+1.05V_VCCP

R369

R369
1KR2F-3-GP

1KR2F-3-GP

1 2

12

R372

R372
2KR2F-3-GP

2KR2F-3-GP

1 OF 10

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#
H_ADSTB#_0
H_ADSTB#_1

H_BNR#

H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM#
H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H_RS#_0

H_RS#_1

H_RS#_2

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

J8
L3
Y13
Y1

L10
M7
AA5
AE6

L9
M8
AA6
AE5

B15
K13
F13
B13
B14

B6
F12
C8

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN#0
H_DSTBN#1
H_DSTBN#2
H_DSTBN#3

H_DSTBP#0
H_DSTBP#1
H_DSTBP#2
H_DSTBP#3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

H_A#[35..3]

H_ADS# 5
H_ADSTB#0 5
H_ADSTB#1 5
H_BNR# 5

H_BPRI# 5

H_BREQ#0 5

H_DEFER# 5

H_DBSY# 5

CLK_MCH_BCLK 4
CLK_MCH_BCLK# 4

H_DPWR# 6
H_DRDY# 5
H_HIT# 5
H_HITM# 5

H_LOCK# 5

H_TRDY# 5

H_DINV#[3..0]

H_DSTBN#[3..0]

H_DSTBP#[3..0]

H_REQ#[4..0]

H_RS#[2..0]

H_A#[35..3] 5

H_DINV#[3..0] 6

H_DSTBN#[3..0] 6

H_DSTBP#[3..0] 6

H_REQ#[4..0] 5

H_RS#[2..0] 5

<Core Design>

<Core Design>

A

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Cantiga-HOST(1/6)

Cantiga-HOST(1/6)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Cantiga-HOST(1/6)

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

858Thursday, October 02, 2008

858Thursday, October 02, 2008

858Thursday, October 02, 2008

of

of

of

A00

A00

A00

DCCBB

A

SSID = MCH

is current setting

*

CFG Strap HighLow

CFG 5

D

A

CFG 6

CFG 7

CFG 9 PCIE GFX lane reversed

CFG 10 PCIE loopback enable PCIE loopback disable
CFG 12 ALLZ mode enable ALLZ mode disable
CFG 13 XOR mode enable XOR mode disable

CFG 16

CFG 19
DMI Lane Reserved

CFG 20
SDVO concurrent
with PCIE

SDVO_CTRLDATA

L_DDC_DATA LFP disable LFP card present

DDPC_CTRLDATA

+3.3V_RUN

R104 2K21R2F-GP

R104 2K21R2F-GP

1 2

DY

DY

R128 2K21R2F-GP

R128 2K21R2F-GP

1 2

DY

DY

R117 4K02R2F-GP

R117 4K02R2F-GP

1 2

DY

DY

R121 4K02R2F-GP

R121 4K02R2F-GP

1 2

DY

DY

RN20

RN20

4

SRN10KJ-5-GP

SRN10KJ-5-GP

R383 2K21R2F-GP

R383 2K21R2F-GP

1 2

DY

DY

R112 2K21R2F-GP

R112 2K21R2F-GP

1 2

DY

DY

R111 2K21R2F-GP

R111 2K21R2F-GP

1 2

DY

DY

R102 2K21R2F-GP

R102 2K21R2F-GP

1 2

DY

DY

R382 4K02R2F-GP

R382 4K02R2F-GP

1 2

DY

DY

R375 2K21R2F-GP

R375 2K21R2F-GP

1 2

DY

DY

R101 2K21R2F-GP

R101 2K21R2F-GP

1 2

DY

DY

R105 2K21R2F-GP

R105 2K21R2F-GP

1 2

DY

DY

R103 2K21R2F-GP

R103 2K21R2F-GP

1 2

DY

DY

5

DMI X 2

ITPM enable

TLS cipher suite with
no confidentiality

FSB dynamic ODT disable

Normal operation Reverse DMI lanes

Only PCIE or SDVO
is operational

SDVO interface disable

SDVO/iHDMI/DP
interface disabled

CFG11
CFG18
CFG19
CFG20

PM_EXTTS#0

1

PM_EXTTS#1

23

CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG12
CFG13
CFG16

H_THRMTRIP#5,17,24,34

DMI X 4

ITPM disable

TLS cipher suite with
confidentiality

PCIE GFX lane
numbered in oder

FSB Dynamic ODT enable

*

PCIE and SDVO are
operatiing simultaneously

*

via the PEG port

SDVO interface enable

*
*

SDVO/iHDMI/DP

*

interface enabled

4

*
*
*

*
*

*
*
*

M36
N36
R33

AH9
AH10
AH12
AH13

AL34
AK34
AN35

AM35

AY21

BG23

BF23
BH18
BF18

T33

K12

T24
B31

B2

M1

U52B

U52B

RESERVED#M36
RESERVED#N36
RESERVED#R33
RESERVED#T33
RESERVED#AH9
RESERVED#AH10
RESERVED#AH12
RESERVED#AH13
RESERVED#K12
RESERVED#AL34
RESERVED#AK34
RESERVED#AN35
RESERVED#AM35
RESERVED#T24

RESERVED#B31
RESERVED#B2
RESERVED#M1

RESERVED#AY21

RESERVED#BG23
RESERVED#BF23
RESERVED#BH18
RESERVED#BF18

RSVD

RSVD

DDR CLK/ CONTROL/COMPENSATION

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLK

CLK

FSB setting

MCH_CLKSEL04
MCH_CLKSEL14
MCH_CLKSEL24

TP86TP86
TP88TP88

TP84TP84
TP85TP85

TP87TP87

PM_SYNC#18

H_DPRSTP#6,17,28
PM_EXTTS#014
PM_EXTTS#115

PM_PWROK18,24,25

R94

R94

PLT_RST#16,20,21,24,37,41

DPRSLPVR18,28

1 2

100R2F-L1-GP-U

100R2F-L1-GP-U

SC100P50V2JN-3GP

SC100P50V2JN-3GP

C94

C94

DY

DY

CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20

RSTIN#

12

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC#BG48

BF48

NC#BF48

BD48

NC#BD48

BC48

NC#BC48

BH47

NC#BH47

BG47

NC#BG47

BE47

NC#BE47

BH46

NC#BH46

BF46

NC#BF46

BG45

NC#BG45

BH44

NC#BH44

BH43

NC#BH43

BH6

NC#BH6

BH5

NC#BH5

BG4

NC#BG4

BH3

NC#BH3

BF3

NC#BF3

BH2

NC#BH2

BG2

NC#BG2

BE2

NC#BE2

BG1

NC#BG1

BF1

NC#BF1

BD1

NC#BD1

BC1

NC#BC1

F1

NC#F1

A47

NC#A47

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

DMI

DMI

CFG

CFG

PM

PM

GRAPHICS VID

GRAPHICS VID

MEHDA

MEHDA

NC

NC

MISC

MISC

3

2 OF 10

2 OF 10

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

SA_CKE_0
SA_CKE_1
SB_CKE_0
SB_CKE_1

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#
DPLL_REF_CLK

DPLL_REF_CLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#
CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK
HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

AP24
AT21
AV24
AU20

AR24
AR21
AU24
AV20

BC28
AY28
AY36
BB36

BA17
AY16
AV16
AR13

BD17
AY17
BF15
AY13

M_RCOMPP

BG22

M_RCOMPN

BH21

SM_RCOMP_VOH

BF28

SM_RCOMP_VOL

BH28
AV42

AR36

SM_REXT

BF17
BC36

CLK_MCH_DREFCLK

B38

CLK_MCH_DREFCLK#

A38

MCH_SSCDREFCLK

E41

MCH_SSCDREFCLK#

F41

CLK_MCH_3GPLL

F43

CLK_MCH_3GPLL#

E43

DMI_TXN0

AE41

DMI_TXN1

AE37

DMI_TXN2

AE47

DMI_TXN3

AH39

DMI_TXP0

AE40

DMI_TXP1

AE38

DMI_TXP2

AE48

DMI_TXP3

AH40

DMI_RXN0

AE35

DMI_RXN1

AE43

DMI_RXN2

AE46

DMI_RXN3

AH42

DMI_RXP0

AD35

DMI_RXP1

AE44

DMI_RXP2

AF46

DMI_RXP3

AH43

B33
B32
G33
F33
E33

C34

AH37
AH36
AN36
AJ35

MCH_CLVREF

AH34

N28
M28
G36
E36
K36
H36

TSATN#

B12

B28
B30
B29
C29
A28

R374 499R2F-2-GPR374 499R2F-2-GP

1 2

CL_CLK0 18
CL_DATA0 18

M_PWROK 18

CL_RST#0 18

MCH_CLVREF ~= 0.35V

1

TP271TP271

CLKREQ#_B 4
MCH_ICH_SYNC# 18

M_CLK_DDR0 14
M_CLK_DDR1 14
M_CLK_DDR2 15
M_CLK_DDR3 15

M_CLK_DDR#0 14
M_CLK_DDR#1 14
M_CLK_DDR#2 15
M_CLK_DDR#3 15

M_CKE0 14
M_CKE1 14
M_CKE2 15
M_CKE3 15

M_CS0# 14
M_CS1# 14
M_CS2# 15
M_CS3# 15

M_ODT0 14
M_ODT1 14
M_ODT2 15
M_ODT3 15

CLK_MCH_DREFCLK 4
CLK_MCH_DREFCLK# 4
MCH_SSCDREFCLK 4
MCH_SSCDREFCLK# 4

CLK_MCH_3GPLL 4
CLK_MCH_3GPLL# 4

DMI_TXN0 16
DMI_TXN1 16
DMI_TXN2 16
DMI_TXN3 16

DMI_TXP0 16
DMI_TXP1 16
DMI_TXP2 16
DMI_TXP3 16

DMI_RXN0 16
DMI_RXN1 16
DMI_RXN2 16
DMI_RXN3 16

DMI_RXP0 16
DMI_RXP1 16
DMI_RXP2 16
DMI_RXP3 16

2

80D6R2F-L-GP

80D6R2F-L-GP

80D6R2F-L-GP

80D6R2F-L-GP

+V_DDR_MCH_REF

1 2

12

R145

R145

DY

DY

10KR2J-3-GP

10KR2J-3-GP

+1.05V_VCCP

1 2

12

12

C175

C175

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.8V_SUS

R380

R380

R377

R377

+1.8V_SUS

DY

DY

R142

R142
10KR2J-3-GP

10KR2J-3-GP

TSATN#

R126

R126
1KR2F-3-GP

1KR2F-3-GP

R130

R130
499R2F-2-GP

499R2F-2-GP

1

12

12

SM_RCOMP_VOH

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SM_RCOMP_VOL

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

12

R370

R370
56R2J-4-GP

56R2J-4-GP

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

12

C159

C159

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

12

C145

C145

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

+3.3V_RUN+1.05V_VCCP

12

R371

R371

DY

DY

10KR2J-3-GP

10KR2J-3-GP

TSATN#_KBC

C

Q19

Q19

B

DY

DY

MMBT3904WT1G-GP

MMBT3904WT1G-GP

E

R131

CLKREQ#_B

R131

1 2

10KR2J-3-GP

10KR2J-3-GP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cantiga-DMI/CFG(2/6)

Cantiga-DMI/CFG(2/6)

Cantiga-DMI/CFG(2/6)

Roberts

Roberts

Roberts

C162

C162

C151

C151

+3.3V_RUN

12

12

958Thursday, October 02, 2008

958Thursday, October 02, 2008

958Thursday, October 02, 2008

+1.8V_SUS

R122

R122
1KR2F-3-GP

1KR2F-3-GP

1 2

12

R116

R116
3K01R2F-3-GP

3K01R2F-3-GP

R119

R119
1KR2F-3-GP

1KR2F-3-GP

1 2

TSATN#_KBC 24

of

of

of

A00

A00

A00

5

DCCBB

A

SSID = MCH

4

3

2

1

M_A_DQ[63..0]14

D

M_A_DQ[63..0]

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

U52D

U52D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

4 OF 10

4 OF 10

BD21

SA_BS_0

BG18

SA_BS_1

AT25

SA_BS_2

BB20

SA_RAS#

BD20

SA_CAS#

AY20

SA_WE#

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_DM[7..0]

M_A_DQS[7..0]

M_A_DQS#[7..0]

M_A_A[14..0]

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

AT41
AY41
AU39
BB12
AY6
AT7
AJ5

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_A_DQS#0

M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DM0

AM37

M_A_BS#0 14
M_A_BS#1 14
M_A_BS#2 14

M_A_RAS# 14
M_A_CAS# 14
M_A_WE# 14

M_A_DM[7..0] 14

M_A_DQS[7..0] 14

M_A_DQS#[7..0] 14

M_A_A[14..0] 14

M_B_DQ[63..0]15

M_B_DQ[63..0]

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

U52E

U52E

AK47

SB_DQ_0

AH46

SB_DQ_1

AP47

SB_DQ_2

AP46

SB_DQ_3

AJ46

SB_DQ_4

AJ48

SB_DQ_5

AM48

SB_DQ_6

AP48

SB_DQ_7

AU47

SB_DQ_8

AU46

SB_DQ_9

BA48

SB_DQ_10

AY48

SB_DQ_11

AT47

SB_DQ_12

AR47

SB_DQ_13

BA47

SB_DQ_14

BC47

SB_DQ_15

BC46

SB_DQ_16

BC44

SB_DQ_17

BG43

SB_DQ_18

BF43

SB_DQ_19

BE45

SB_DQ_20

BC41

SB_DQ_21

BF40

SB_DQ_22

BF41

SB_DQ_23

BG38

SB_DQ_24

BF38

SB_DQ_25

BH35

SB_DQ_26

BG35

SB_DQ_27

BH40

SB_DQ_28

BG39

SB_DQ_29

BG34

SB_DQ_30

BH34

SB_DQ_31

BH14

SB_DQ_32

BG12

SB_DQ_33

BH11

SB_DQ_34

BG8

SB_DQ_35

BH12

SB_DQ_36

BF11

SB_DQ_37

BF8

SB_DQ_38

BG7

SB_DQ_39

BC5

SB_DQ_40

BC6

SB_DQ_41

AY3

SB_DQ_42

AY1

SB_DQ_43

BF6

SB_DQ_44

BF5

SB_DQ_45

BA1

SB_DQ_46

BD3

SB_DQ_47

AV2

SB_DQ_48

AU3

SB_DQ_49

AR3

SB_DQ_50

AN2

SB_DQ_51

AY2

SB_DQ_52

AV1

SB_DQ_53

AP3

SB_DQ_54

AR1

SB_DQ_55

AL1

SB_DQ_56

AL2

SB_DQ_57

AJ1

SB_DQ_58

AH1

SB_DQ_59

AM2

SB_DQ_60

AM3

SB_DQ_61

AH3

SB_DQ_62

AJ3

SB_DQ_63

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

5 OF 10

5 OF 10

BC16

SB_BS_0

BB17

SB_BS_1

BB33

SB_BS_2

AU17

SB_RAS#

BG16

SB_CAS#

BF14

SB_WE#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

AY47
BD40
BF35
BG11
BA3
AP1
AK2

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

M_B_DM1
M_B_DM2
M_B_DM3
M_B_DM4
M_B_DM5
M_B_DM6
M_B_DM7

M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
M_B_DQS#0
M_B_DQS#1
M_B_DQS#2
M_B_DQS#3
M_B_DQS#4
M_B_DQS#5
M_B_DQS#6
M_B_DQS#7

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

M_B_DM0

AM47

M_B_DM[7..0]

M_B_DQS[7..0]

M_B_DQS#[7..0]

M_B_A[14..0]

M_B_BS#0 15
M_B_BS#1 15
M_B_BS#2 15

M_B_RAS# 15
M_B_CAS# 15
M_B_WE# 15

M_B_DM[7..0] 15

M_B_DQS[7..0] 15

M_B_DQS#[7..0] 15

M_B_A[14..0] 15

<Core Design>

<Core Design>

A

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Cantiga-DDR(3/6)

Cantiga-DDR(3/6)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Cantiga-DDR(3/6)

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

10 58Thursday, October 02, 2008

10 58Thursday, October 02, 2008

10 58Thursday, October 02, 2008

of

of

of

A00

A00

A00

DCCBB

A

SSID = MCH

+1.8V_SUS

D

+1.05V_VCCP

VCC_AXG_SENSE

TP83TP83

A

TP82TP82

VSS_AXG_SENSE

5

U52G

U52G

AP33

VCC_SM

AN33

VCC_SM

BH32

VCC_SM

BG32

VCC_SM

BF32

VCC_SM

BD32

VCC_SM

BC32

VCC_SM

BB32

VCC_SM

BA32

VCC_SM

AY32

VCC_SM

AW32

VCC_SM

AV32

VCC_SM

AU32

VCC_SM

AT32

VCC_SM

AR32

VCC_SM

AP32

VCC_SM

AN32

VCC_SM

BH31

VCC_SM

BG31

VCC_SM

BF31

VCC_SM

BG30

VCC_SM

BH29

VCC_SM

BG29

VCC_SM

BF29

VCC_SM

BD29

VCC_SM

BC29

VCC_SM

BB29

VCC_SM

BA29

VCC_SM

AY29

VCC_SM

AW29

VCC_SM

AV29

VCC_SM

AU29

VCC_SM

AT29

VCC_SM

AR29

VCC_SM

AP29

VCC_SM

BA36

VCC_SM/NC

BB24

VCC_SM/NC

BD16

VCC_SM/NC

BB21

VCC_SM/NC

AW16

VCC_SM/NC

AW13

VCC_SM/NC

AT13

VCC_SM/NC

Y26

VCC_AXG

AE25

VCC_AXG

AB25

VCC_AXG

AA25

VCC_AXG

AE24

VCC_AXG

AC24

VCC_AXG

AA24

VCC_AXG

Y24

VCC_AXG

AE23

VCC_AXG

AC23

VCC_AXG

AB23

VCC_AXG

AA23

VCC_AXG

AJ21

VCC_AXG

AG21

VCC_AXG

AE21

VCC_AXG

AC21

VCC_AXG

AA21

VCC_AXG

Y21

VCC_AXG

AH20

VCC_AXG

AF20

VCC_AXG

AE20

VCC_AXG

AC20

VCC_AXG

AB20

VCC_AXG

AA20

VCC_AXG

T17

VCC_AXG

T16

VCC_AXG

AM15

VCC_AXG

AL15

VCC_AXG

AE15

VCC_AXG

AJ15

VCC_AXG

AH15

VCC_AXG

AG15

VCC_AXG

AF15

VCC_AXG

AB15

VCC_AXG

AA15

VCC_AXG

Y15

VCC_AXG

V15

VCC_AXG

U15

VCC_AXG

AN14

VCC_AXG

AM14

VCC_AXG

U14

VCC_AXG

T14

VCC_AXG

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

3000mA

8700mA

POWER

POWER

VCC SMVCC GFX

VCC SMVCC GFX

VCC GFX NCTF

VCC GFX NCTF

7 OF 10

7 OF 10

VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF
VCC_AXG_NCTF

VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF
VCC_SM_LF

VCC SM LF

VCC SM LF

+1.05V_VCCP

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

SM_LF1_GMCH

AV44

SM_LF2_GMCH

BA37

SM_LF3_GMCH

AM40

SM_LF4_GMCH

AV21

SM_LF5_GMCH

AY5

SM_LF6_GMCH

AM10

SM_LF7_GMCH

BB13

4

Place on the Edge

12

12

C108

C108

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

1

1

TC19

TC19

2

2

ST220U2D5VBM-2GP

ST220U2D5VBM-2GP

Place CAP where
LVDS and DDR2 taps

12

C99

C99

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C110

C110

C173

C173

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

Coupling CAP

12

C170

C170

C161

C161

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

12

12

C92

C92

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C383

C383

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C142

C142

SC1U10V3KX-3GP

SC1U10V3KX-3GP

FOR VCC SM

12

12

C431

C431

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C81

C81

C134

C134

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

12

C164

C164

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

TC21

TC21

C426

C426

DY

DY

ST220U2D5VBM-2GP

ST220U2D5VBM-2GP

Place on the Edge

1

1

C182

C182

2

2

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

3

+1.8V_SUS

12

C435

C435

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

12

C178

C178

C186

C186

SC1U10V3KX-3GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

DY

DY

12

C390

C390

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

FOR VCC CORE

12

12

C84

C84

C91

C91

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

+1.05V_VCCP

Coupling CAP 370 mils from the Edge

12

C111

C111

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C113

C113

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

12

C166

C166

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Coupling CAP

R125

R125

1 2

0R2J-2-GP

0R2J-2-GP

Supply Signal Group

+1.05V_VCCP

VCC_AXG
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP

VCCA_SM
+1.05V_VCCP
+1.05V_VCCP

VCCA_SM_CK 26mA

VCCA_HPLL 24mA
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP
+1.05V_VCCP 50mA
+1.05V_VCCP

VCCD_PEG_PLL

VCC_AXF

VCC_HDA+1.5V_RUN
+1.5V_RUN VCCD_TVDAC 35mA
+1.8V_SUS 60.31mA

VCCD_LVDS
+1.8V_SUS
+1.8V_SUS

VCC_SM_CK
+3.3V_RUN VCCA_PEG_BG 414uA
+3.3V_RUN VCC_HV 105.3mA

2

12

C98

C98

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C156

C156

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Imax

2898.52mAVCC+1.05V_VCCP
8700mA
852mAVTT
1782mAVCC_PEG
456mAVCC_DMI
720mA+1.05V_VCCP

139.2mAVCCA_MPLL

157.2mAVCCD_HPLL
50mAVCCA_PEG_PLL

321.35mA
50mA

3000mAVCC_SM
124mA

12

C80

C80

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC_GMCH_35

1

6 OF 10

U52F

U52F

AG34

VCC

AC34

VCC

AB34

VCC

AA34

VCC

Y34

VCC

V34

VCC

U34

VCC

AM33

VCC

AK33

VCC

AJ33

VCC

AG33

VCC

AF33

VCC

AE33
AC33
AA33

AH28
AF28
AC28
AA28

AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24

AJ23
AH23
AF23

2898.52mA

VCC
VCC
VCC

Y33

VCC

W33

VCC

V33

VCC

U33

VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC
VCC

T32

VCC

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

VCC CORE

VCC CORE

POWER

POWER

Cantiga-Power(4/6)

Cantiga-Power(4/6)

Cantiga-Power(4/6)

6 OF 10

+1.05V_VCCP

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

VCC NCTF

VCC NCTF

VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF
VCC_NCTF

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

11 58Thursday, September 11, 2008

11 58Thursday, September 11, 2008

11 58Thursday, September 11, 2008

A00

A00

A00

of

of

of

DCCBB

A

+1.05V_VCCP

R152

R152

1 2

0R0603-PAD

0R0603-PAD

D

+1.05V_VCCP

R351

R351
0R3-0-U-GP

0R3-0-U-GP

1 2

120ohm 100MHz

120ohm 100MHz

+1.05V_VCCP

220ohm 100MHz

+1.5V_RUN

R408

R408

1 2

0R0603-PAD

0R0603-PAD

L12

L12

1 2

FCM1608KF-1-GP

FCM1608KF-1-GP

L11

L11

1 2

FCM1608KF-1-GP

FCM1608KF-1-GP

L16

L16

1 2

BLM18BB221SN1D-GP

BLM18BB221SN1D-GP

R115

R115

1 2

0R0603-PAD

0R0603-PAD

A00.08/0903

L3

L3

1 2

HCB1608K-181T20GP

HCB1608K-181T20GP

180ohm 100MHz

C436

C436

SC1U10V3KX-3GP

SC1U10V3KX-3GP

A

+3.3V_CRT_LDO

C419

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C419

Reserved for TV ripple

12

C189

C189

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C448

C448

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

12

5

M_VCCA_DPLLA

12

12

C188

C188

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

M_VCCA_DPLLB

12

12

C444

C444

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

M_VCCA_HPLL

12

12

C393

C393

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

M_VCCA_MPLL

12

12

C391

C391

DY

DY

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1D05V_RUN_PEGPLL

12

12

C450

C450

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1D5VRUN_TVDAC

12

12

C153

C153

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

1D5VRUN_QDAC

12

12

C154

C154

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

1
2
3
4
5

C187

C187

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C439

C439

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C387

C387

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C384

C384

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C443

C443

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C152

C152

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C158

C158

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

U53

U53

EN
GND
VIN
VOUT
NC#5

G9091-330T12U-GP

G9091-330T12U-GP

Main source:

74.09091.H3F
2nd source:

74.09198.07F

+3.3V_CRT_LDO

+3.3V_CRT_LDO

+1.8V_SUS

+1.5V_RUN

+1.05V_VCCP

+1.05V_VCCP

+1.05V_VCCP

+1.8V_SUS

R394

R394

1 2

0R0603-PAD

0R0603-PAD

R390

R390

1 2

0R0603-PAD

0R0603-PAD

R403

R403

1 2

0R0402-PAD

0R0402-PAD

R402

R402

1 2

0R0402-PAD

0R0402-PAD

R120

R120

1 2

0R0603-PAD

0R0603-PAD

R378

R378

1 2

0R0402-PAD

0R0402-PAD

R360

R360

1 2

0R0603-PAD

0R0603-PAD

R140

R140

1 2

0R0603-PAD

0R0603-PAD

4

12

C434

C434

12

C427

C427

12

C441

C441
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

12

C442

C442
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C127

C127

DY

DY

12

C140

C140

+3.3V_TV_DAC+3.3V_CRT_LDO

12

C385

C385

12

C181

C181
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

3D3V_CRTDAC_S0

12

C433

C433

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

M_VCCA_DAC_BG

12

C423

C423

M_VCCA_DPLLA

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DY

DY

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

DY

DY

R395

R395

1 2

0R0402-PAD

0R0402-PAD

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

M_VCCA_DPLLB
M_VCCA_HPLL
M_VCCA_MPLL

VCCA_PEG_BG

1D05V_RUN_PEGPLL

12

12

C126

C126

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

1D05V_SM_CK

12

12

C144

C144

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

12

12

C417

C417

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCC_HDA

1D5VRUN_TVDAC
1D5VRUN_QDAC
1D05V_RUN_HPLL
1D05V_RUN_PEGPLL

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D8V_SUS_DLVDS

1D8V_TXLVDS

12

C130

C130

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

C157

C157

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C416

C416

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

12

C438

C438

B27
A26

A25
B25

F47

L48
AD1
AE1

J48

J47

AD48

AA48

AR20
AP20
AN20
AR17
AP17

C129

C129

AN17
AT16
AR16

SC1U10V3KX-3GP

SC1U10V3KX-3GP

AP16

AP28
AN28
AP25
AN25

AN24
AM28
AM26
AM25

AL25

AM24

AL24

AM23

AL23

B24
A24

A32

M25

L28

AF1

AA47

M38

L37

U52H

U52H

VCCA_CRT_DAC
VCCA_CRT_DAC

VCCA_DAC_BG
VSSA_DAC_BG

VCCA_DPLLA
VCCA_DPLLB
VCCA_HPLL
VCCA_MPLL

VCCA_LVDS
VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM
VCCA_SM

VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF
VCCA_SM_CK_NCTF

VCCA_TV_DAC
VCCA_TV_DAC

VCC_HDA

VCCD_TVDAC
VCCD_QDAC
VCCD_HPLL
VCCD_PEG_PLL

VCCD_LVDS
VCCD_LVDS

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

5mA

64.8mA

24mA

139.2mA

13.2mA

414uA

50mA

720mA

26mA

79mA

50mA

35mA

2mA

157.2mA
50mA

60.31mA

73mA

3

TV

TV

HDA

HDA

LVDS

LVDS

CRTPLLA PEGA SM

CRTPLLA PEGA SM

A LVDS

A LVDS

POWER

POWER

A CK

A CK

118.8mA

D TV/CRT

D TV/CRT

AXF

AXF

VCC_SM_CK
VCC_SM_CK
VCC_SM_CK
VCC_SM_CK

124mA

SM CK

SM CK

VCC_TX_LVDS

HV

HV

PEG

PEG

DMI

DMI

VTTLF

VTTLF

8 OF 10

8 OF 10

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

852mA

VTT
VTT
VTT

VTT

VTT

VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT
VTT

VCC_AXF
VCC_AXF
VCC_AXF

321.35mA

VCC_HV
VCC_HV
VCC_HV

105.3mA

VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG
VCC_PEG

1782mA

VCC_DMI

VCC_DMI
VCC_DMI
VCC_DMI

456mA

VTTLF
VTTLF
VTTLF

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

B22
B21
A21

BF21
BH20
BG20
BF20

K47
C35

B35
A35

V48
U48
V47
U47
U46

AH48
AF48
AH47
AG47

A8
L1
AB2

1

1

C143

C143

2

2

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

1D05V_VCC_AXF

1D8V_TXLVDS_S3

+3.3V_VCC_HV

VTTLF1
VTTLF2
VTTLF3

2

12

C135

C135

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

12

C447

C447

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

1

1

C395

C395

2

2

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

12

C123

C123

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

+1.05V_VCCP

12

C191

C191

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1

1

C394

C394

2

2

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

12

C128

C128

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

1

3

BAT54-7-F-GP

BAT54-7-F-GP

12

C408

C408

SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

C133

C133

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C440

C440

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

12

C445

C445

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1

1

C90

C90

2

2

SCD47U6D3V2KX-GP

SCD47U6D3V2KX-GP

1

SSID = MCH

+1.05V_VCCP

12

D22

D22

DY

DY

12

12

1 2

1 2

12

12

12

TC3

TC3

EC48

EC48

DY

DY

SCD1U25V3KX-GP

SCD1U25V3KX-GP

ST220U2D5VBM-LGP

ST220U2D5VBM-LGP

+3.3V_RUN +3.3V_VCC_HV

R396

R396

2

R373

R373

1 2

0R0603-PAD

0R0603-PAD

C407

C407
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

R97

R97

1 2

0R0805-PAD

0R0805-PAD

R100

R100
1R3F-GP

1R3F-GP

C137

C137
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

R405

R405

1 2

0R0603-PAD

0R0603-PAD

C449

C449
SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C446

C446
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C185

C185
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

12

10R2J-2-GP

10R2J-2-GP

+1.05V_VCCP

+1.8V_SUS

+1.8V_SUS

+1.05V_VCCP

+1.05V_VCCP+5V_RUN

Cantiga-Power/Filter(5/6)

Cantiga-Power/Filter(5/6)

Cantiga-Power/Filter(5/6)

R398

R398

1 2

0R0402-PAD

0R0402-PAD

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

12

C437

C437
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12 58Thursday, September 11, 2008

12 58Thursday, September 11, 2008

12 58Thursday, September 11, 2008

A00

A00

A00

of

of

of

DCCBB

A

SSID = MCH

U52I

U52I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

AF47

D

A

VSS

AD47

VSS

AB47

VSS

Y47

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

5

VSS

VSS

9 OF 10

9 OF 10

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

U52J

U52J

BG21

VSS

L12

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17

VSS

M17

VSS

H17

VSS

C17

VSS

BA16

VSS

AU16

VSS

AN16

VSS

N16

VSS

K16

VSS

G16

VSS

E16

VSS

BG15

VSS

AC15

VSS

W15

VSS

A15

VSS

BG14

VSS

AA14

VSS

C14

VSS

BG13

VSS

BC13

VSS

BA13

VSS

AN13

VSS

AJ13

VSS

AE13

VSS

N13

VSS

L13

VSS

G13

VSS

E13

VSS

BF12

VSS

AV12

VSS

AT12

VSS

AM12

VSS

AA12

VSS

J12

VSS

A12

VSS

BD11

VSS

BB11

VSS

AY11

VSS

AN11

VSS

AH11

VSS

Y11

VSS

N11

VSS

G11

VSS

C11

VSS

BG10

VSS

AV10

VSS

AT10

VSS

AJ10

VSS

AE10

VSS

AA10

VSS

M10

VSS

BF9

VSS

BC9

VSS

AN9

VSS

AM9

VSS

AD9

VSS

G9

VSS

B9

VSS

BH8

VSS

BB8

VSS

AV8

VSS

AT8

VSS

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

4

VSS

VSS

VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF
VSS_NCTF

VSS NCTF

VSS NCTF

VSS_NCTF
VSS_NCTF

VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB
VSS_SCB

VSS SCB

VSS SCB

NC

NC

10 OF 10

10 OF 10

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS

NC#E1
NC#D2
NC#C3
NC#B4
NC#A5

NC#A6
NC#A43
NC#A44
NC#B45
NC#C46
NC#D47
NC#B47
NC#A46

NC#F48
NC#E48
NC#C48
NC#B48

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

U24
U28
U25
U29

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1
A3

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

GMCH_GND1
GMCH_GND2
GMCH_GND3
GMCH_GND4

TP103TP103
TP80TP80
TP226TP226
TP78TP78

+3.3V_RUN

NCTF
PIN

3

RN19

RN19

1
2 3

SRN2K2J-1-GP

SRN2K2J-1-GP

LDDC_CLK

4

LDDC_DATA

GMCH_HSYNC45

CRT_IREF
routing Trace
width use 20 mil.

GMCH_VSYNC45

M_BLUE45
M_GREEN45
M_RED45

DDC_CLK_CON45

LBKLT_CTL35
GMCH_BL_ON24

+3.3V_RUN

4

R144 2K37R2F-GPR144 2K37R2F-GP

VGA_TXACLK-35
VGA_TXACLK+35
VGA_TXBCLK-35
VGA_TXBCLK+35

VGA_TXAOUT0-35
VGA_TXAOUT1-35
VGA_TXAOUT2-35

VGA_TXAOUT0+35
VGA_TXAOUT1+35
VGA_TXAOUT2+35

VGA_TXBOUT0-35
VGA_TXBOUT1-35
VGA_TXBOUT2-35

VGA_TXBOUT0+35
VGA_TXBOUT1+35
VGA_TXBOUT2+35

R389 75R2F-2-GPR389 75R2F-2-GP

1 2

R386 75R2F-2-GPR386 75R2F-2-GP

1 2

R385 75R2F-2-GPR385 75R2F-2-GP

1 2

R376 150R2F-1-GPR376 150R2F-1-GP
R379 150R2F-1-GPR379 150R2F-1-GP
R381 150R2F-1-GPR381 150R2F-1-GP

RN41

RN41

SRN10KJ-5-GP

SRN10KJ-5-GP

LDDC_CLK35
LDDC_DATA35
LCDVDD_EN35

1 2
1 2
1 2

GMCH_DDCDATA

DDC_CLK_CON

L_CTRL_DATA

1

L_CTRL_CLK

23

12

TP225TP225

1 2

R123 33R2J-2-GPR123 33R2J-2-GP

1 2

R124 1K02R2F-1-GPR124 1K02R2F-1-GP

1 2

R392 33R2J-2-GPR392 33R2J-2-GP

LIBG
LVDS_VBG

TV_DACA
TV_DACB
TV_DACC

M_BLUE
M_GREEN
M_RED

GMCH_DDCCLK
GMCH_DDCDATA
GMCH_HS

CRT_IREF

GMCH_VS

+3.3V_RUN

U4

U4

5
6

2N7002SPT

2N7002SPT

2

U52C

U52C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA-GM-GP-U-NF

CANTIGA-GM-GP-U-NF

34
2
1

5V @ ext. CRT side

1

3 OF 10

3 OF 10

PEG_CMP

PEG_COMPI

PEG_COMPO

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9

PEG_RX#_10

LVDS

LVDS

TV VGA

TV VGA

+3.3V_RUN

RN2

RN2

23
1

4

SRN2K2J-1-GP

SRN2K2J-1-GP

DDC_DATA_CON

GMCH_DDCCLK

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8

PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

PEG_TX_10

PEG_TX_11

PEG_TX_12

PEG_TX_13

PEG_TX_14

PEG_TX_15

DDC_DATA_CON 45

Cantiga-GND/LVDS/VGA(6/6)

Cantiga-GND/LVDS/VGA(6/6)

Cantiga-GND/LVDS/VGA(6/6)

T37
T36

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

H43

PEG_RX_0

J44

PEG_RX_1

L43

PEG_RX_2

L41

PEG_RX_3

N40

PEG_RX_4

P47

PEG_RX_5

N43

PEG_RX_6

T42

PEG_RX_7

U42

PEG_RX_8

Y42

PEG_RX_9

W47
Y37
AA42
AD36
AC48
AD40

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

J42

PEG_TX_0

L46

PEG_TX_1

M48

PEG_TX_2

M39

PEG_TX_3

M43

PEG_TX_4

R47

PEG_TX_5

N37

PEG_TX_6

T39

PEG_TX_7

U36

PEG_TX_8

U39

PEG_TX_9

Y39
Y46
AA36
AA39
AD42
AD46

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

+1.05V_VCCP

R133

R133
49D9R2F-GP

49D9R2F-GP

1 2

Place R105
close to
MCH within
500 mils.

of

of

of

13 58Thursday, October 02, 2008

13 58Thursday, October 02, 2008

13 58Thursday, October 02, 2008

A00

A00

A00

5

SSID = MEMORY

M_A_DQS#[7..0]10

D D

+1.8V_SUS

DY

DY

12

C101

C101

12

C132

C132

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

12

C409

C409

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

C C

+0.9V_DDR_VTT

B B

A A

M_A_DQ[63..0]10
M_A_DM[7..0]10
M_A_DQS[7..0]10
M_A_A[14..0]10

Layout Note:
Place near DM1

DY

DY

DY

DY

12

C138

C138

12

C83

C83

12

12

C116

C116

DY

DY

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

12

12

C432

C432

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

12

C122

C122

C160

C160

DY

DY

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT.

12

12

C96

C96

C103

C103

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

5

12

C93

C93

C109

C109

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C87

C87

C114

C114

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

4

12

C100

C100

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C118

C118

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

+V_DDR_MCH_REF

C203

C203

4

12

C106

C106

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C119

C119

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

DY

DY

12

TC8

TC8

12

C115

C115

M_A_BS#210
M_A_BS#010

M_A_BS#110

ST220U2D5VBM-LGP

ST220U2D5VBM-LGP

12

12

C428

C428

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

M_ODT09
M_ODT19

12

DY

DY

M_A_A0
M_A_A1
M_A_A2
M_A_A3
M_A_A4
M_A_A5
M_A_A6
M_A_A7
M_A_A8
M_A_A9
M_A_A10
M_A_A11
M_A_A12
M_A_A13
M_A_A14

M_A_BS#2
M_A_BS#0

M_A_BS#1

M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48

C420

C420

C202

C202
SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63

M_A_DQS#0
M_A_DQS#1
M_A_DQS#2
M_A_DQS#3
M_A_DQS#4
M_A_DQS#5
M_A_DQS#6
M_A_DQS#7

M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7

M_ODT0
M_ODT1

3

DM2

DM2

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

DQS0#

29

DQS1#

49

DQS2#

68

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

OTD0

119

OTD1

1

VREF

2

VSS

202

GND

MH1

MH1

SKT-SODIMM200-37GP 62.10017.E21

SKT-SODIMM200-37GP 62.10017.E21

3

VDDSPD

NC#50
NC#69
NC#83

NC#120

NC#163/TEST

RAS#

WE#

CAS#

CS0#
CS1#

CKE0
CKE1

CK0

CK0#

CK1

CK1#

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

SDA
SCL

SA0
SA1

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
GND
MH2

108
109
113

110
115

79
80

M_CLK_DDR0

30

M_CLK_DDR#0

32

M_CLK_DDR1

164

M_CLK_DDR#1

166

M_A_DM0

10

M_A_DM1

26

M_A_DM2

52

M_A_DM3

67

M_A_DM4

130

M_A_DM5

147

M_A_DM6

170

M_A_DM7

185

ICH_SMBDATA

195

ICH_SMBCLK

197
199

R55 10KR2J-3-GPR55 10KR2J-3-GP

198

1 2

R56 10KR2J-3-GPR56 10KR2J-3-GP

200

1 2

50
69
83
120
163

+1.8V_SUS

81
82
87
88
95
96
103
104
111
112
117
118

3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

201
MH2

2

+3.3V_RUN

2

M_A_RAS# 10

M_A_WE# 10

M_A_CAS# 10
M_CS0# 9

M_CS1# 9
M_CKE0 9

M_CKE1 9
M_CLK_DDR0 9

M_CLK_DDR#0 9
M_CLK_DDR1 9

M_CLK_DDR#1 9

ICH_SMBDATA 4,15,18
ICH_SMBCLK 4,15,18

PM_EXTTS#0 9

1

put near connector

M_CLK_DDR0
M_CLK_DDR#0
M_CLK_DDR1
M_CLK_DDR#1

12

C74

C74

DUMMY-C2

DUMMY-C2

12

C53

C53

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

RN6

RN6

SRN56J-4-GP

SRN56J-4-GP
RN35

RN35

SRN56J-4-GP

SRN56J-4-GP
RN10

RN10

SRN56J-4-GP

SRN56J-4-GP
RN33

RN33

SRN56J-4-GP

SRN56J-4-GP
RN39

RN39

SRN56J-4-GP

SRN56J-4-GP
RN8

RN8

SRN56J-4-GP

SRN56J-4-GP
RN17

RN17

SRN56J-4-GP

SRN56J-4-GP

1

1
23

1
23

1
23

1
23

4

1
23

1
23

12

M_A_A13

M_A_A5
M_A_A8

M_A_A6
M_A_A2

M_A_A1
M_A_A3

M_CKE0
M_A_BS#2

M_A_BS#1
M_A_RAS#

M_A_A0
M_A_A4

14 58Thursday, October 02, 2008

14 58Thursday, October 02, 2008

14 58Thursday, October 02, 2008

C192

C192

DUMMY-C2

DUMMY-C2

of

of

of

12

C72

C72

DUMMY-C2

DUMMY-C2

+3.3V_RUN

12

C54

C54

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

Layout Note:
Place these resistors close to DM1,
all trace length Max=1.5".

+0.9V_DDR_VTT

RN37

Custom

Custom

Custom

RN37

1
2 3

4

4

4

4

4

4

4

4

SRN56J-4-GP

SRN56J-4-GP

RN31

RN31

1

4

23

SRN56J-4-GP

SRN56J-4-GP

RN4

RN4

1

4

23

SRN56J-4-GP

SRN56J-4-GP

RN12

RN12

1

4

23

SRN56J-4-GP

SRN56J-4-GP

RN29

RN29

SRN56J-4-GP

SRN56J-4-GP

RN28

RN28

SRN56J-4-GP

SRN56J-4-GP

RN11

RN11

SRN56J-4-GP

SRN56J-4-GP

DDRII-SODIMM SLOT1

DDRII-SODIMM SLOT1

DDRII-SODIMM SLOT1

1

1

2 3

23

1

4

23

4

1
23

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

M_A_A9
M_A_A12

M_A_A10
M_A_BS#0

M_ODT0
M_CS0#

M_CKE1
M_A_A14

M_A_WE#
M_A_CAS#

M_CS1#
M_ODT1

M_A_A11
M_A_A7

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

12

C195

C195

DUMMY-C2

DUMMY-C2

A00

A00

A00

5

SSID = MEMORY

M_B_DQS#[7..0]10

D D

+1.8V_SUS

C C

+0.9V_DDR_VTT

B B

A A

DY

DY

12

C430

C430

12

C136

C136

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

12

C415

C415

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

M_B_DQ[63..0]10
M_B_DM[7..0]10
M_B_DQS[7..0]10
M_B_A[14..0]10

Layout Note:
Place near DM2

12

12

C97

C97

C107

DY

DY

12

5

C107

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9V_DDR_VTT.

12

C425

C425

C418

C418

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C112

C112

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

12

C414

C414

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C105

C105

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

12

C406

C406

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C124

C124

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C405

C405

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DY

DY

12

C150

C150

12

C95

C95

4

12

C104

C104

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C410

C410

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

4

12

12

C131

C131

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

12

C117

C117

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

+V_DDR_MCH_REF

12

TC4

TC4

ST220U2D5VBM-LGP

ST220U2D5VBM-LGP

12

C88

C88

C404

C404

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

ICH_SMBCLK4,14,18

ICH_SMBDATA4,14,18

C200

C200
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

M_B_BS#210

M_B_BS#010
M_B_BS#110

12

PM_EXTTS#19

M_CS2#9

M_CS3#9
M_CKE29

M_CKE39
M_B_RAS#10
M_B_CAS#10

M_B_WE#10

M_ODT29

M_ODT39

C102

C102

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C201

C201
SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

M_B_A0
M_B_A1
M_B_A2
M_B_A3
M_B_A4
M_B_A5
M_B_A6
M_B_A7
M_B_A8
M_B_A9
M_B_A10
M_B_A11
M_B_A12
M_B_A13
M_B_A14

M_B_BS#2

M_B_BS#0
M_B_BS#1

M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63

ICH_SMBCLK
ICH_SMBDATA

M_ODT2
M_ODT3

3

3

DM1

DM1

MH1

MH1

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16_BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

50

NC#50

69

NC#69

83

NC#83

120

NC#120

163

NC#163/TEST

110

CS0#

115

CS1#

79

CKE0

80

CKE1

108

RAS#

113

CAS#

109

WE#

197

SCL

195

SDA

114

ODT0

119

ODT1

1

VREF

201

GND

SKT-SODIMM200-38GP

SKT-SODIMM200-38GP

62.10017.E31

62.10017.E31

MH2

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6

DQS7
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

DM0
DM1
DM2
DM3
DM4
DM5
DM6
DM7

CK0

CK0#

CK1

CK1#

SA0
SA1

VDD_SPD

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

GND

MH2

M_B_DQS0

13

M_B_DQS1

31

M_B_DQS2

51

M_B_DQS3

70

M_B_DQS4

131

M_B_DQS5

148

M_B_DQS6

169

M_B_DQS7

188

M_B_DQS#0

11

M_B_DQS#1

29

M_B_DQS#2

49

M_B_DQS#3

68

M_B_DQS#4

129

M_B_DQS#5

146

M_B_DQS#6

167

M_B_DQS#7

186

M_B_DM0

10

M_B_DM1

26

M_B_DM2

52

M_B_DM3

67

M_B_DM4

130

M_B_DM5

147

M_B_DM6

170

M_B_DM7

185

M_CLK_DDR2

30

M_CLK_DDR#2

32

M_CLK_DDR3

164

M_CLK_DDR#3

166

R57 10KR2J-3-GPR57 10KR2J-3-GP

198

1 2

R54 10KR2J-3-GPR54 10KR2J-3-GP

200

1 2

199

+1.8V_SUS

81
82
87
88
95
96
103
104
111
112
117
118

2
3
8
9
12
15
18
21
24
27
28
33
34
39
40
41
42
47
48
53
54
59
60
65
66
71
72
77
78
121
122
127
128
132
133
138
139
144
145
149
150
155
156
161
162
165
168
171
172
177
178
183
184
187
190
193
196

202

2

M_CLK_DDR2 9
M_CLK_DDR#2 9
M_CLK_DDR3 9
M_CLK_DDR#3 9

+3.3V_RUN

2

1

put near connector

M_CLK_DDR2
M_CLK_DDR#2
M_CLK_DDR3
M_CLK_DDR#3

12

12

C71

C71

C75

C75

DUMMY-C2

DUMMY-C2

DUMMY-C2

DUMMY-C2

+3.3V_RUN

12

12

C52

+3.3V_RUN

12

EC12

EC12
SCD1U25V3KX-GP

SCD1U25V3KX-GP

Layout Note:
Place these resistors close to DM2,
all trace length Max=1.5".

+0.9V_DDR_VTT

RN7

M_B_WE#
M_B_CAS#

M_B_BS#2
M_CKE2

M_B_A5
M_B_A8

M_B_A0

M_B_A1
M_B_A3

M_ODT3
M_CS3#

M_CKE3

RN7

1

4

23

SRN56J-4-GP

SRN56J-4-GP

RN13

RN13

1

4

23

SRN56J-4-GP

SRN56J-4-GP

RN16

RN16

1

4

23

SRN56J-4-GP

SRN56J-4-GP

RN32

RN32

1

4

23

SRN56J-4-GP

SRN56J-4-GP

RN15

RN15

1

4

23

SRN56J-4-GP

SRN56J-4-GP

RN5

RN5

1

4

23

SRN56J-4-GP

SRN56J-4-GP

RN40

RN40

1

4

23

SRN56J-4-GP

SRN56J-4-GP

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

DDRII-SODIMM SLOT2

DDRII-SODIMM SLOT2

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

DDRII-SODIMM SLOT2

C52

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

RN27

RN27

4

SRN56J-4-GP

SRN56J-4-GP
RN38

RN38

4

SRN56J-4-GP

SRN56J-4-GP
RN36

RN36

4

SRN56J-4-GP

SRN56J-4-GP
RN34

RN34

4

SRN56J-4-GP

SRN56J-4-GP

RN9

RN9

4

SRN56J-4-GP

SRN56J-4-GP
RN30

RN30

4

SRN56J-4-GP

SRN56J-4-GP
RN14

RN14

4

SRN56J-4-GP

SRN56J-4-GP

M_ODT2

1

M_B_A13

23

M_B_A14

1

M_B_A11

23

M_B_A7

1

M_B_A6

23

M_B_A4M_B_BS#1

1

M_B_A2

23

M_B_A10

1

M_B_BS#0

23

M_B_RAS#

1

M_CS2#

23

M_B_A12

1

M_B_A9

23

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

1

12

C193

C193

DUMMY-C2

DUMMY-C2

C56

C56

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

of

of

of

15 58Thursday, October 02, 2008

15 58Thursday, October 02, 2008

15 58Thursday, October 02, 2008

12

C197

C197

DUMMY-C2

DUMMY-C2

A00

A00

A00

5

SSID = ICH

5 OF 6

5 OF 6

U25E

U25E

AA26

VSS

AA27

VSS

AA3

VSS

AA6

VSS

AB1

VSS

AA23

VSS

AB28

D D

C C

B B

A A

AB29

AB4

AB5
AC17
AC26
AC27

AC3

AD1
AD10
AD12
AD13
AD14
AD17
AD18
AD21
AD28
AD29

AD4

AD5

AD6

AD7

AD9
AE12
AE13
AE14
AE16
AE17

AE2
AE20
AE24

AE3

AE4

AE6

AE9
AF13
AF16
AF18
AF22
AH26
AF26
AF27

AF5

AF7

AF9
AG13
AG16
AG18
AG20
AG23

AG3

AG6

AG9
AH12
AH14
AH17
AH19

AH2
AH22
AH25
AH28

AH5

AH8

AJ12
AJ14
AJ17

C26

C27

G12

G14

G18

G21

G24

G26

G27

H23

H28

H29

AJ8
B11
B14
B17

B2
B20
B23

B5

B8

E11
E14
E18

E2
E21
E24

E5

E8
F16
F28
F29

G8
H2

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

ICH9M-GP-NF

ICH9M-GP-NF

5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

Mini Card

New Card

ICH_GND1

ICH_GND2

ICH_GND3

ICH_GND4

+3.3V_ALW

LAN

TP177TP177

TP178TP178

TP125TP125

TP127TP127

PLT_RST#9,20,21,24,37,41

SPI_WP#
SPI_MOSO
SPI_CS#0

NCTF PIN

USB_OC#7
USB_OC#11

USB_OC#4

PCIE_RXN237
PCIE_RXP237

PCIE_TXN237
PCIE_TXP237

PCIE_RXN320
PCIE_RXP320

PCIE_TXN320
PCIE_TXP320

PCIE_RXN541
PCIE_RXP541

PCIE_TXN541
PCIE_TXP541

4

+3.3V_RUN

PLT_RST#

R245

R245

1 2

DY

DY

10KR2J-3-GP

10KR2J-3-GP

U27

U27

4

GND

3

WP#

SCLK

DY

DY

2

SO

HOLD#

1

CS#

VCC

MX25L512MC-12G-GP

MX25L512MC-12G-GP

RP1

RP1

1
2
3
4
5 6

SRN10KJ-L3-GP

SRN10KJ-L3-GP

C500 SCD1U16V2KX-3GPC500 SCD1U16V2KX-3GP
C497 SCD1U16V2KX-3GPC497 SCD1U16V2KX-3GP

C506 SCD1U16V2KX-3GPC506 SCD1U16V2KX-3GP
C510 SCD1U16V2KX-3GPC510 SCD1U16V2KX-3GP

C518 SCD1U16V2KX-3GPC518 SCD1U16V2KX-3GP
C517 SCD1U16V2KX-3GPC517 SCD1U16V2KX-3GP

SPI_CLK

R233 15R2J-GP

R233 15R2J-GP

SPI_CS#0

R241 15R2J-GP

R241 15R2J-GP

SPI_MOSI

R230 15R2J-GP

R230 15R2J-GP

SPI_MOSO

R237 15R2J-GP

R237 15R2J-GP

4

U32

U32

5
4

74LVC1G08GW-1-GP

74LVC1G08GW-1-GP

1 2

0R0402-PAD

0R0402-PAD

5

SI

6
7
8

1 2

DY

DY

1 2

DY

DY

1 2

DY

DY

1 2

DY

DY

USB_OC#045
USB_OC#145
USB_OC#243

VCC
Y

10
9
8
7

R262

R262

DY

DY

12
12

12
12

12
12

B
A

GND

10KR2J-3-GP

10KR2J-3-GP

SPI_MOSI
SPI_CLK
SPI_HOLD#

USB_OC#0
USB_OC#1USB_OC#5
USB_OC#6
USB_OC#2

R208

R208

1 2

22R2F-1-GP

22R2F-1-GP

3

1

PCI_PLTRST#

2
3

+3.3V_RUN

12

12

R240

R240

DY

DY

+3.3V_ALW +3.3V_ALW

PCIE_C_TXN2
PCIE_C_TXP2

PCIE_C_TXN3
PCIE_C_TXP3

PCIE_C_TXN5
PCIE_C_TXP5

SPI_CLK_R
SPI_CS#0_R
SPI_CS#1

SPI_MOSI_R
SPI_MOSO_R

USB_OC#0
USB_OC#1
USB_OC#2
USB_OC#3
USB_OC#4
USB_OC#5
USB_OC#6
USB_OC#7
USB_OC#8
USB_OC#9
USB_OC#10
USB_OC#11

USB_RBIAS_PN

C315

C315

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

N29
N28
P27
P26

L29

L28
M27
M26

K27

K26

G29

G28

H27

H26

E29

E28

F27

F26

C29

C28

D27

D26

D23

D24

F23

D25

E23

AG2
AG1

U25D

U25D

PERN1
PERP1
PETN1
PETP1

PERN2
PERP2
PETN2
PETP2

J29

PERN3

J28

PERP3
PETN3
PETP3

PERN4
PERP4
PETN4
PETP4

PERN5
PERP5
PETN5
PETP5

PERN6/GLAN_RXN
PERP6/GLAN_RXP
PETN6/GLAN_TXN
PETP6/GLAN_TXP

SPI_CLK
SPI_CS0#
SPI_CS1#/GPIO58/CLGPIO6

SPI_MOSI
SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47
USBRBIAS

USBRBIAS#

ICH9M-GP-NF

ICH9M-GP-NF

3

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

RN55

RN55

8
7
6

SRN8K2J-4-GP

SRN8K2J-4-GP

4 OF 6

4 OF 6

V27

DMI0RXN

V26

DMI0RXP

U29

DMI0TXN

U28

DMI0TXP

Y27

DMI1RXN

Y26

DMI1RXP

W29

DMI1TXN

W28

DMI1TXP

AB27

DMI2RXN

AB26

DMI2RXP

AA29

DMI2TXN

AA28

DMI2TXP

AD27

DMI3RXN

AD26

DMI3RXP

AC29

DMI3TXN

AC28

DMI3TXP

T26

DMI_CLKN

PCI-Express

PCI-Express

DMI_ZCOMP

DMI_IRCOMP

SPI

SPI

USB

USB

T25

DMI_CLKP

Direct Media Interface

Direct Media Interface

AF29
AF28

AC5

USBP0N

AC4

USBP0P

AD3

USBP1N

AD2

USBP1P

AC1

USBP2N

AC2

USBP2P

AA5

USBP3N

AA4

USBP3P

AB2

USBP4N

AB3

USBP4P

AA1

USBP5N

AA2

USBP5P

W5

USBP6N

W4

USBP6P

Y3

USBP7N

Y2

USBP7P

W1

USBP8N

W2

USBP8P

V2

USBP9N

V3

USBP9P

U5

USBP10N

U4

USBP10P

U1

USBP11N

U2

USBP11P

U25B

U25B

D11

AD0

C8

AD1

D9

AD2

E12

AD3

E9

AD4

C9

AD5

E10

AD6

B7

AD7

C7

AD8

C5

AD9

G11

AD10

F8

AD11

F11

AD12

E7

AD13

A3

AD14

D2

AD15

F10

AD16

D5

AD17

D10

AD18

B3

AD19

F7

AD20

C3

AD21

F3

AD22

F4

AD23

C1

AD24

G7

AD25

H7

AD26

D1

AD27

G5

AD28

H6

AD29

G1

AD30

H3

AD31

Interrupt I/F

Interrupt I/F

J5

PIRQA#

E1

PIRQB#

J6

PIRQC#

C4

PIRQD#

ICH9M-GP-NF

ICH9M-GP-NF

USB_OC#9

1

USB_OC#8

2

USB_OC#10

3

USB_OC#3

45

DMI_IRCOMP_R

USB_PN3
USB_PP3

USB_PN5
USB_PP5

USB_PN8
USB_PP8
USB_PN9
USB_PP9
USB_PN10
USB_PP10

2

2 OF 6

2 OF 6

PCI

PCI

REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

PCIRST#

DEVSEL#

PLOCK#

FRAME#

PLTRST#

PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5

DMI_RXN0 9
DMI_RXP0 9
DMI_TXN0 9
DMI_TXP0 9

DMI_RXN1 9
DMI_RXP1 9
DMI_TXN1 9
DMI_TXP1 9

DMI_RXN2 9
DMI_RXP2 9
DMI_TXN2 9
DMI_TXP2 9

DMI_RXN3 9
DMI_RXP3 9
DMI_TXN3 9
DMI_TXP3 9

CLK_PCIE_ICH# 4
CLK_PCIE_ICH 4

USB_PN0 45
USB_PP0 45
USB_PN1 45
USB_PP1 45
USB_PN2 43

USB_PP2 43

TP246TP246
TP247TP247

USB_PN4 37

USB_PP4 37

TP250TP250
TP251TP251

USB_PN6 41

USB_PP6 41

USB_PN7 41

USB_PP7 41

TP248TP248
TP249TP249
TP252TP252
TP253TP253

USB_PN10 21

USB_PP10 21

USB_PN11 41

USB_PP11 41

2

F1

REQ0#

G4

GNT0#

B6
A7
F13
F12
E6
F6

D8

C/BE0#

B4

C/BE1#

D6

C/BE2#

A5

C/BE3#

D3

IRDY#

E3

PAR

R1
C6
E4

PERR#

C2
J4

SERR#

A4

STOP#

F5

TRDY#

D7
C14

D4

PCICLK

R2

PME#

H4
K6
F2
G2

USB1
USB2
USB3

BlUETOOTH
New Card

Card Reader
CAMERA

1

PCI_REQ0#
PCI_GNT0#
PCI_REQ1#
PCI_GNT1#
PCI_REQ2#
PCI_GNT2#
PCI_REQ3#
PCI_GNT3#

PCI_IRDY#
PCIRST1#

PCI_DEVSEL#
PCI_PERR#
PCI_PLOCK#
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME#

PCI_PLTRST#
ICH_PME#

PCI_PIRQE#
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

TP179TP179
TP261TP261

TP135TP135

CLK_PCI_ICH 4

TP138TP138

PCI_GNT0#
SPI_CS#1
PCI_GNT3#

1 2

R442 1KR2J-1-GP

R442 1KR2J-1-GP

1 2

R443 1KR2J-1-GP

R443 1KR2J-1-GP

1 2

R441 1KR2J-1-GP

R441 1KR2J-1-GP

DY

DY
DY

DY
DY

DY

PCI_PIRQF#
PCI_TRDY#
PCI_REQ3#
PCI_PIRQD#

PCI_PIRQB#
PCI_PIRQG#
PCI_REQ0#
PCI_PIRQH#

PCI_STOP#
PCI_PLOCK#
PCI_IRDY#
PCI_PERR#

PCI_DEVSEL#
PCI_REQ1#
PCI_FRAME#
PCI_REQ2#

PCI_SERR#
PCI_PIRQE#
PCI_PIRQA#
PCI_PIRQC#

8
7
6

8
7
6

8
7
6

8
7
6

8
7
6

BOOT BIOS Strap

SPI_CS#1 BOOT BIOS LocationPCI_GNT#0

0 1 SPI

01

PCI

11

LPC(Default)

A16 swap override strap

low = A16 swap override enable
high = default

USB
Pair

0
1
2
3

Device
USB1
USB2
USB3
RESERVED

+1.5V_RUN

1 2

PCI_GNT#3

R429

R429
24D9R2F-L-GP

24D9R2F-L-GP

4 MINI CARD
5

RESERVED
BLUETOOTH

6
7

NEW CARD
RESERVED

8

RESERVED

9
10

Card Reader

11

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

ICH9-PCI/PCIE/DMI/USB/GND(1/4)

ICH9-PCI/PCIE/DMI/USB/GND(1/4)

ICH9-PCI/PCIE/DMI/USB/GND(1/4)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

CAMERA

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

1

RN57

RN57

SRN8K2J-4-GP

SRN8K2J-4-GP
RN25

RN25

SRN8K2J-4-GP

SRN8K2J-4-GP
RN26

RN26

SRN8K2J-4-GP

SRN8K2J-4-GP
RN58

RN58

SRN8K2J-4-GP

SRN8K2J-4-GP

RN56

RN56

SRN8K2J-4-GP

SRN8K2J-4-GP

of

of

of

16 58Thursday, October 02, 2008

16 58Thursday, October 02, 2008

16 58Thursday, October 02, 2008

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

1
2
3
45

+3.3V_RUN

A00

A00

A00

5

4

3

2

1

SSID = ICH

ICH_RTCX1

R445 10MR2J-L-GPR445 10MR2J-L-GP

1 2

X4

X4

1

4

D D

SC12P50V2JN-3GP

SC12P50V2JN-3GP

C522

C522

12

23

X-32D768KHZ-38GPU

X-32D768KHZ-38GPU

ICH_RTCX2

12

C520

C520
SC12P50V2JN-3GP

SC12P50V2JN-3GP

1 OF 6

+RTC_CELL

+RTC_CELL

C C

+1.5V_RUN

ICH_AZ_CODEC_BITCLK22

ICH_AZ_CODEC_SYNC22
ICH_AZ_CODEC_RST#22
ICH_SDOUT_CODEC22

12

C227

C227

DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

DY

HDD

B B

ODD

R456

R456

1 2

20KR2F-L-GP

20KR2F-L-GP

C307

C307

SC1U10V3KX-3GP

SC1U10V3KX-3GP

R461

R461

1 2

20KR2F-L-GP

20KR2F-L-GP

ICH_RTCRST#

21

12

12

C526

C526
SC1U10V3KX-3GP

SC1U10V3KX-3GP

G49

G49
GAP-OPEN

GAP-OPEN

Place within 500 mil of SB.

R444 24D9R2F-L-GPR444 24D9R2F-L-GP

1 2

R201 33R2J-2-GPR201 33R2J-2-GP

1 2

R197 33R2J-2-GPR197 33R2J-2-GP

1 2

R205 33R2J-2-GPR205 33R2J-2-GP

1 2

R194 33R2J-2-GPR194 33R2J-2-GP

1 2

12

C230

C230

DY

DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

SATA_RXN0_C36
SATA_RXP0_C36

SATA_TXN036
SATA_TXP036

SATA_RXN1_C36
SATA_RXP1_C36

SATA_TXN136
SATA_TXP136

TP235TP235

ICH_SDIN_CODEC22

C473 SCD01U50V2KX-1GPC473 SCD01U50V2KX-1GP

1 2

C474 SCD01U50V2KX-1GPC474 SCD01U50V2KX-1GP

1 2

C475 SCD01U50V2KX-1GPC475 SCD01U50V2KX-1GP

1 2

C476 SCD01U50V2KX-1GPC476 SCD01U50V2KX-1GP

1 2

R506

R506

1 2

DY

DY

10KR2J-3-GP

10KR2J-3-GP

ICH_RTCRST#
SRTCRST#
SM_INTRUDER#

ICH_INTVRMEN
LAN100_SLP

GPIO56
GLAN_COMP

ACZ_BIT_CLK
ACZ_SYNC_R

ACZ_RST#_R

ACZ_SDATAOUT_R

SATA_LED#

SATA_TXN0_C
SATA_TXP0_C

SATA_TXN1_C
SATA_TXP1_C

U25A

U25A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GLAN_DOCK#/GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M-GP-NF

ICH9M-GP-NF

1 OF 6

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

RTCLAN / GLAN

LPCCPU

RTCLAN / GLAN

LPCCPU

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT#

RCIN#

STPCLK#

THRMTRIP#

SATA4RXN

IHDA

IHDA

SATA4RXP

SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP

SATA5TXN
SATA5TXP

SATA_CLKN

SATA_CLKP

SATA

SATA

SATARBIAS#

SATARBIAS

INTR

NMI

SMI#

PECI

K5
K4
L6
K2

K3
J3

J1
N7

AJ27
AJ25

AE23
AJ26
AD22
AF25
AE22

AG25
L3

AF23
AF24

AH27
AG26
AG27

AH11
AJ11
AG12
AF12

AH9
AJ9
AE10
AF10

AH18
AJ18

AJ7
AH7

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

H_DPRSTP#

H_FERR#_R

H_THERMTRIP_R

Placed Within 2" from SB.

SATARBIAS

Place within 500 mils from SB.

LPC_LAD[0..3]

LPC_LFRAME# 24,37

KA20GATE 24
H_A20M# 5

H_DPRSTP# 6,9,28
H_DPSLP# 6

1 2

R166 56R2J-4-GPR166 56R2J-4-GP

R165 54D9R2F-L1-GPR165 54D9R2F-L1-GP

R187 24D9R2F-L-GPR187 24D9R2F-L-GP

1 2

1 2

H_PWRGOOD 6,34
H_IGNNE# 5
H_INIT# 5

H_INTR 5

H_NMI 5
H_SMI# 5

H_STPCLK# 5

H_THERMTRIP_1

CLK_PCIE_SATA# 4
CLK_PCIE_SATA 4

LPC_LAD[0..3] 24,37

R438

R438

1 2

DY

DY

10KR2J-3-GP

10KR2J-3-GP

R163

R163

1 2

56R2J-4-GP

56R2J-4-GP

R242

R242

1 2

DY

DY

10KR2J-3-GP

10KR2J-3-GP

R164

R164

1 2

R167

R167

1 2

A00.08/0903

+3.3V_RUN

+1.05V_VCCP

+3.3V_RUN

+1.05V_VCCP

56R2J-4-GP

56R2J-4-GP

0R2J-2-GP

0R2J-2-GP

H_FERR# 5

KBRCIN# 24

H_THRMTRIP# 5,9,24,34

+RTC_CELL

R448

R448

330KR2F-L-GP

A A

330KR2F-L-GP

R271

R271

330KR2F-L-GP

330KR2F-L-GP

R264

R264

1MR2J-1-GP

1MR2J-1-GP

12

12

12

5

ICH_INTVRMEN

LAN100_SLP

SM_INTRUDER#

integrated VccSus1_05,VccSus1_5,VccCL1_5

INTVRMEN

High=Enable Low=Disable

integrated VccLan1_05VccCL1_05

LAN100_SLP

High=Enable Low=Disable

4

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

ICH9-LAN/HDA/SATA/LPC(2/4)

ICH9-LAN/HDA/SATA/LPC(2/4)

ICH9-LAN/HDA/SATA/LPC(2/4)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

17 58Thursday, October 02, 2008

17 58Thursday, October 02, 2008

17 58Thursday, October 02, 2008

1

A00

A00

A00

of

of

of

5

4

3

2

1

SSID = ICH

U25C

+3.3V_ALW

RN60

RN60

1

4

23

SRN2K2J-1-GP

D D

C C

+3.3V_RUN

B B

SRN2K2J-1-GP

R267 10KR2J-3-GPR267 10KR2J-3-GP

1 2

RN59

RN59

1

4

23

SRN10KJ-5-GP

SRN10KJ-5-GP

R455 10KR2J-3-GPR455 10KR2J-3-GP

1 2

RN61

RN61

1

8

2

7

3

6

45

SRN8K2J-4-GP

SRN8K2J-4-GP

R451 10KR2J-3-GPR451 10KR2J-3-GP

1 2

RN63

RN63

1

4

23

DY

DY

SRN10KJ-5-GP

SRN10KJ-5-GP

R235 8K2R2J-3-GPR235 8K2R2J-3-GP

1 2

R244 8K2R2J-3-GPR244 8K2R2J-3-GP

1 2

R247 10KR2J-3-GPR247 10KR2J-3-GP
R421 10KR2J-3-GPR421 10KR2J-3-GP
R424 10KR2J-3-GPR424 10KR2J-3-GP
R180 8K2R2J-3-GP

R180 8K2R2J-3-GP
R238 10KR2J-3-GPR238 10KR2J-3-GP

+3.3V_RUN

DY

DY

12

12

DY

DY

R449

R449
100KR2J-1-GP

100KR2J-1-GP

R446

R446
100KR2J-1-GP

100KR2J-1-GP

12
12
12
12
12

iTPM_EN

SMB_DATA
SMB_CLK

ME_EC_DATA1
ME_EC_CLK1

SMB_ALERT#
PM_BATLOW#_R
ITP_DBRESET#_1
ICH_RI#

ECSMI#

H_STP_CPU#
H_STP_PCI#

PM_CLKRUN#
INT_SERIRQ
GPIO18
ECSCI#
ECSWI#
GPIO22
CLKSATAREQ#

iTPM Select

iTPM_EN

0 = Disable
1 = Enable

A A

5

SMB_CLK37,41

SMB_DATA37,41

TP257TP257

ITP_DBRESET#_137

PM_SYNC#9

TP186TP186

H_STP_PCI#4
H_STP_CPU#4

PM_CLKRUN#24

PCIE_WAKE#20,41
INT_SERIRQ24

THERM_SCI#25

VGATE_PWRGD24,28

R263 0R2J-2-GP

R263 0R2J-2-GP

1 2

DY

DY

ECSCI#24
ECSWI#24

ECSMI#24

TP181TP181

TP168TP168
TP236TP236
TP123TP123
TP184TP184
TP262TP262

CLKSATAREQ#4

TP124TP124

SB_SPKR22

MCH_ICH_SYNC#9

TP263TP263

4

LINKALERT#
ME_EC_CLK1
ME_EC_DATA1

ICH_RI#
SUS_STAT#

ITP_DBRESET#_1

SMB_ALERT#
H_STP_PCI#

H_STP_CPU#

PCIE_WAKE#PCIE_WAKE#
INT_SERIRQ

VGATE_PWRGD
ICH_TP7
ECSCI#
ECSWI#

ECSMI#
GPIO12
GPIO13
GPIO17
GPIO18
GPIO20
GPIO22
GPIO27
GPIO28

CLK_SEL0
CLK_SEL1
GPIO48

iTPM_EN

ICH_TP3

+3.3V_RUN

R179

R179

10KR2J-3-GP

10KR2J-3-GP

R185

R185

10KR2J-3-GP

10KR2J-3-GP

ICH_SMBDATA4,14,15

DY

DY

DY

DY

U25C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

SST

AG19

TACH1/GPIO1

AH21

TACH2/GPIO6

AG21

TACH3/GPIO7

A21

GPIO8

C12

LAN_PHY_PWR_CTRL/GPIO12

C21

ENERGY_DETECT/GPIO13

AE18

TACH0/GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

PWM0

AJ20

PWM1

AJ21

PWM2

ICH9M-GP-NF

ICH9M-GP-NF

12

12

R423

R423
10KR2J-3-GP

10KR2J-3-GP

DY

DY

CLK_SEL0
CLK_SEL1

12

12

R427

R427
10KR2J-3-GP

10KR2J-3-GP

DY

DY

SMB_CLK

3 OF 6

3 OF 6

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMB

SMB

Clocks

Clocks

SYS GPIO

SYS GPIO

Power MGTController Link

Power MGTController Link

GPIO

GPIO

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

MISC

MISC

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW#
PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST0#
CL_RST1#

GPIO24/MEM_LED

GPIO9/WOL_EN

CLK Gen Select

CLK Gen select

CLK_SEL0

Disable X X

Seligo
Realtek
ICS

RN62

RN62

4

SRN2K2J-1-GP

SRN2K2J-1-GP

U56

U56

1
2
3 4

2N7002SPT

2N7002SPT

3

1
1
0

+3.3V_RUN

1
23

SMB_DATA

6
5

SATA0GP

AH23

SATA1GP

AF19

SATA2GP

AE21

SATA3GP

AD20
H1

AF3

ICH_SUSCLK

P1

SB_SLP_S3#

C16
E16

PM_SLP_S5#

G17

GPIO26

C10

PM_PWROK

G20
M2

PM_BATLOW#_R

B13
R3

LAN_RST#1

D20
D22
R5

M_PWROK

R6

PM_SLP_M#

B16
F24

B19
F22

C19

CL_VREF0_ICH

C25

CL_VREF1_ICH

A19
F21

D18

GPIO24

A16

GPIO10

C18

GPIO14

C11
C20

CLL_SEL1

1
0
1

ICH_SMBCLK 4,14,15

CLK_14M_ICH 4
CLK_48M_ICH 4

ICH_SUSCLK 25

PM_SLP_S4# 24,31,41

TP259TP259
TP182TP182

DPRSLPVR 9,28

PM_PWRBTN# 24

RSMRST#_KBC 24
CK_PWRGD 4
M_PWROK 9

TP183TP183

CL_CLK0 9

CL_DATA0 9

CL_RST#0 9

TP180TP180

2

SB_SLP_S3#

RN49

SATA2GP
SATA3GP
SATA1GP
SATA0GP

PM_PWROKLINKALERT#
DPRSLPVR
LAN_RST#1
RSMRST#_KBC

GPIO10
GPIO13
GPIO14
GPIO17
GPIO48

M_PWROK

+3.3V_ALW +3.3V_RUN

12

R268

R268

DY

DY

3K24R2F-GP

3K24R2F-GP

12

12

C309

C309

R261

DY

DY

U29

U29

1

B

2

A

3

GND

74LVC1G08GW-1-GP

74LVC1G08GW-1-GP

R261

DY

DY

453R2F-1-GP

453R2F-1-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+3.3V_ALW

5

VCC

DY

DY

R265

R265

1 2

0R0402-PAD

0R0402-PAD

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

PM_SLP_S3#

4

Y

ICH9-GPIO/PM/CL(3/4)

ICH9-GPIO/PM/CL(3/4)

ICH9-GPIO/PM/CL(3/4)

RN49

8
7
6

SRN10KJ-6-GP

SRN10KJ-6-GP

R440 10KR2J-3-GPR440 10KR2J-3-GP

1 2

R232 100KR2J-1-GP

R232 100KR2J-1-GP

1 2

DY

DY

R266 0R0402-PADR266 0R0402-PAD

1 2

R447 10KR2J-3-GPR447 10KR2J-3-GP

1 2

R501 10KR2J-3-GP

R501 10KR2J-3-GP

1 2

DY

DY

R502 10KR2J-3-GP

R502 10KR2J-3-GP

1 2

DY

DY

R503 10KR2J-3-GP

R503 10KR2J-3-GP

1 2

DY

DY

R504 10KR2J-3-GP

R504 10KR2J-3-GP

1 2

DY

DY

R505 10KR2J-3-GP

R505 10KR2J-3-GP

1 2

DY

DY

R439

R439

1 2

0R0402-PAD

0R0402-PAD

12

R454

R454

3K24R2F-GP

3K24R2F-GP

12

12

R450

R450

C523

C523

453R2F-1-GP

453R2F-1-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

PM_SLP_S3# 24,25,30,31,32,34,41

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

1

+3.3V_RUN

1
2
3
45

PM_PWROK 9,24,25

of

of

of

18 58Thursday, October 02, 2008

18 58Thursday, October 02, 2008

18 58Thursday, October 02, 2008

A00

A00

A00

5

+RTC_CELL

SSID = ICH

D D

C C

B B

A A

*Within a given well, 5VREF needs to
be up before the corresponding 3.3V rail

V5REF_S0 V5REF_S5

+3.3V_RUN

L7

L7

SB_VCCLAN3_3

VCC_GLAN_PLL

12

+1.5V_RUN

R269

R269

1 2

0R0603-PAD

0R0603-PAD

IND-1D2UH-5-GP

IND-1D2UH-5-GP

+3.3V_RUN +5V_ALW+3.3V_ALW+5V_RUN

21

D15

D15

CH751H-40PT

CH751H-40PT

1 2

12

C304

C304
SC1U10V3KX-3GP

SC1U10V3KX-3GP

+1.5V_RUN

12

12

12

C301

C301

C306

C306

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C312

C312

C303

C303

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

5

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

R274

R274
10R2J-2-GP

10R2J-2-GP

12

DY

DY

+1.5V_RUN

C276

C276

12

C489

C489

C512

C512

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.5V_RUN

+1.5V_RUN

+1.5V_RUN

1 2

0R0603-PAD

0R0603-PAD

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

DY

DY

21

D14

D14

CH751H-40PT

CH751H-40PT

12

C242

C242
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

TC9

TC9

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

ST220U2D5VBM-LGP

ST220U2D5VBM-LGP

L4

L4

1 2

L-10UH-11-GP

L-10UH-11-GP

R183

R183

DY

DY

C521

C521

12

+3.3V_RUN

C279

C279

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C524

C524

R213

R213
10R2J-2-GP

10R2J-2-GP

1 2

12

C246

C246

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

+VCCSATAPLL+1.5V_RUN

12

C222

C222

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

VCCLAN1D05

12

A00.08/0909

DY

DY

R453

R453

1 2

0R3-0-U-GP

0R3-0-U-GP

4

12

C525

C525

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

12

C244

C244

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

12

C213

C213

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

12

C481

C481

SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

12

C480

C480

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D5V_USB_S0

12

12

C482

C482

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SB_VCCLAN3_3
VCC_GLAN_PLL

3D3V_GLAN_S0

A00.08/0909

4

V5REF_S0
V5REF_S5

C251

C251

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

C219

C219

SC1U10V3KX-3GP

SC1U10V3KX-3GP

C220

C220

SC1U10V3KX-3GP

SC1U10V3KX-3GP

C485

C485

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C483

C483

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

AE1

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29

G25
H24
H25

M24
M25
N23
N24
N25

R24
R25
R26
R27

U24
U25

U23
W24
W25

AJ19

AC16
AD15
AD16
AE15
AF15
AG15
AH15

AJ15

AC11
AD11
AE11
AF11
AG10
AG11
AH10

AJ10

AC9

AC18
AC19

AC21

G10

AC12
AC13
AC14

AA7

AB6

AB7

AC6

AC7

D28

D29

A23

A6

F25

J24

J25
K24
K25
L23
L24
L25

P24
P25

T24
T27
T28
T29

V24
V25

K23
Y24
Y25

G9

AJ5

A10
A11

A12
B12

A27

E26
E27

A26

U25F

U25F

VCCRTC

2mA

V5REF
V5REF_SUS
VCC1_5_B

VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B
VCC1_5_B

VCCSATAPLL
VCC1_5_A

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

VCC1_5_A
VCC1_5_A

VCC1_5_A
VCC1_5_A
VCC1_5_A

VCC1_5_A
VCC1_5_A

VCC1_5_A
VCC1_5_A

VCCUSBPLL
VCC1_5_A

VCC1_5_A
VCC1_5_A
VCC1_5_A
VCC1_5_A

VCCLAN1_05
VCCLAN1_05

VCCLAN3_3
VCCLAN3_3

VCCGLANPLL
VCCGLAN1_5

VCCGLAN1_5
VCCGLAN1_5
VCCGLAN1_5

VCCGLAN3_3

ICH9M-GP-NF

ICH9M-GP-NF

2mA

646mA

47mA

1342mA

11mA

78mA

23mA

80mA

1mA

6 OF 6

6 OF 6

CORE

CORE

23mA

50mA

2mA

VCCA3GP ATXARX USB CORE

VCCA3GP ATXARX USB CORE

VCCP_CORE

VCCP_CORE

PCI

PCI

11mA

11mA

VCCPSUSVCCPUSB

VCCPSUSVCCPUSB

212mA

GLAN POWER

GLAN POWER

VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05

1634mA

VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05
VCC1_05

VCCDMIPLL

VCCDMI
VCCDMI

V_CPU_IO
V_CPU_IO

VCC3_3
VCC3_3
VCC3_3
VCC3_3

VCC3_3
VCC3_3
VCC3_3

VCC3_3

308mA

VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3
VCC3_3

VCCHDA

VCCSUSHDA

VCCSUS1_05
VCCSUS1_05

VCCSUS1_5
VCCSUS1_5

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCCSUS3_3
VCCSUS3_3

VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3
VCCSUS3_3

VCCCL1_05

VCCCL1_5
VCCCL3_3

VCCCL3_3

73mA

3

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

R29
W23

Y23
AB23

AC23
AG29
AJ6
AC10
AD19

AF20
AG24
AC20

B9
F9
G3
G6
J2
J7
K7

AJ4
AJ3
AC8

F17
AD8
F18

A18
D16
D17
E22

AF1
T1

T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

G22
G23
A24

B24

3

12

C496

C496

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D5V_DMIPLL_ICH_S0

VCCDMI

SB_V_CPU_IO

SB_VCC_3_3_C
3D3V_VCCPCORE_ICH_S0

PCI_VCCP_CORE_S0

SB_VCCHDA

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]
VCCSUS1_5[2]

SB_VCCCL3_3

1
1

SB_VCCSUS3_3

VCCSUS1_05[3]

VCCSUS1_5[3]

1 2

0R0603-PAD

0R0603-PAD

12

C501

C501

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

TP243TP243
TP260TP260

C515

C515

1 2

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

R452

R452

12

12

C495

C495

DY

DY

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1D5V_DMIPLL_ICH_S0

12

12

C263

C263

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

12

12

C488

C488

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

R430

R430

1 2

0R0603-PAD

0R0603-PAD

12

C477

C477
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

12

C507

C507

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

R172

R172

1 2

DY

DY

0R3-0-U-GP

0R3-0-U-GP

12

12

C308

C308

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

12

C493

C493

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

+3.3V_RUN

DY

2

12

C492

C492

C503

C503

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

L5

L5

IND-1D2UH-5-GP

IND-1D2UH-5-GP

C265

C265

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C252

C252

C253

C253

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

+3.3V_RUN

12

C516

C516

C509

C509

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.5V_RUN

12

C313

C313

C302

C302

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C490

C490

C491

C491

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD022U16V2KX-3GP

SCD022U16V2KX-3GP

A00.08/0909

12

12

C513

C513

C511

C511

SC1U10V3KX-3GP

SC1U10V3KX-3GP

2

+1.5V_RUN

12

R434

R434

1 2

0R0603-PAD

0R0603-PAD

R437

R437

1 2

0R0603-PAD

0R0603-PAD

R191

R191

1 2

0R0402-PAD

0R0402-PAD

R270

R270

1 2

0R0603-PAD

0R0603-PAD

R436

R436

1 2

0R0603-PAD

0R0603-PAD

12

C514

C514

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.05V_VCCP

+1.05V_VCCP

SB_V_CPU_IO

12

C478

C478

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+3.3V_RUN

+3.3V_ALW

12

C217

C217

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+3.3V_ALW

+3.3V_ALW

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

SB_VCC_3_3_C

12

C232

C232

SC1U10V3KX-3GP

SC1U10V3KX-3GP

SB_VCCHDA

12

C221

C221
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

ICH9-POWER(4/4)

ICH9-POWER(4/4)

ICH9-POWER(4/4)

1

R431

R431

1 2

0R0603-PAD

12

C231

C231

12

C223

C223

R188

R188

0R0402-PAD

0R0402-PAD

1

0R0603-PAD

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

R177

R177

1 2

0R0603-PAD

0R0603-PAD

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+3.3V_RUN

19 58Thursday, September 11, 2008

19 58Thursday, September 11, 2008

19 58Thursday, September 11, 2008

12

C479

C479

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

EC56

EC56

SCD1U25V3KX-GP

SCD1U25V3KX-GP

1 2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

+1.05V_VCCP

+3.3V_RUN

of

of

of

A00

A00

A00

5

4

3

2

1

SSID = LOM

+3.3V_LAN+2.5V_LOM +1.2V_LOM

TP270TP270

1

TP269TP269

U26

U26

34

NC#34

35

NC#35

36

NC#36

37

NC#37

10

LOM_DISABLE#

12

VAUX_AVLBL

11

SWITCH_VCC

47

VMAIN_AVLBL

9

SWITCH_VAUX

16

RSET

3

PD_12

4

PD_25

24

HSDACP

25

HSDACN

+3.3V_LAN

1

MDI0­MDI1-

MDI0+
MDI1+

12

C269

C269

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

61

VDDO_TTL1VDDO_TTL8VDDO_TTL40VDDO_TTL45VDDO_TTL

30

DY

DY

12

4

64

23

VDD25

AVDDL

VPD_CLK38VPD_DATA

29

41

VPD_DATA

R231

R231
0R2J-2-GP

0R2J-2-GP

1 2

12

C271

C271

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

52

32

57

AVDD51AVDD

AVDDL19AVDDL22AVDDL28AVDDL

AVDDL

88E8040-A0-NNC1C000-GP

88E8040-A0-NNC1C000-GP

RXN18TXN21NC#2727NC#3131RXP17TXP20NC#2626NC#30

12

12

C266

C266

C290

C290

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

58

VDD2VDD7VDD

VDD33VDD39VDD44VDD48VDD

PU_VDDO_TTL#4242PU_VDDO_TTL#43

TESTMODE46TSTPT

43

C286

C286

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

13

WAKE#

PERST#
REFCLKP
REFCLKN

PCIE_TXN
PCIE_TXP

PCIE_RXN
PCIE_RXP

LED_LINK#

NC#62

LED_SPEED#

LED_ACT#

XTALI

XTALO

GND

65

R236

R236

1 2

4K7R2J-2-GP

4K7R2J-2-GP

R234

R234

1 2

4K7R2J-2-GP

4K7R2J-2-GP

6
5
55
56

LAN_RXN3

50

LAN_RXP3

49
53

54

63
62
60
59

LANX1

15

LANX2

14

+3.3V_LAN

C285 SCD1U10V2KX-4GPC285 SCD1U10V2KX-4GP

1 2

C284 SCD1U10V2KX-4GPC284 SCD1U10V2KX-4GP

1 2

R228

R228

DY

DY

10MR2J-L-GP

10MR2J-L-GP

X2

X2

1 2

12

XTAL-25MHZ-96GP

XTAL-25MHZ-96GP

C259

C259
SC12P50V2JN-3GP

SC12P50V2JN-3GP

MDI0+

1 2

DY

DY

R222 49D9R2F-GP

R222 49D9R2F-GP

MDI0-

1 2

DY

DY

R223 49D9R2F-GP

R223 49D9R2F-GP

MDI1+

1 2

DY

DY

R225 49D9R2F-GP

R225 49D9R2F-GP

MDI1-

1 2

DY

DY

R224 49D9R2F-GP

R224 49D9R2F-GP

3

12

LANX1LANX2

MDIS0_LAN

MDIS1_LAN

PCIE_WAKE# 18,41

PLT_RST# 9,16,21,24,37,41

CLK_PCIE_LAN 4
CLK_PCIE_LAN# 4

PCIE_RXN3 16
PCIE_RXP3 16

PCIE_TXN3 16
PCIE_TXP3 16

12

C260

C260
SC12P50V2JN-3GP

SC12P50V2JN-3GP

1 2

DY

DY

C247 SCD01U16V2KX-3GP

C247 SCD01U16V2KX-3GP

1 2

DY

DY

C248 SCD01U16V2KX-3GP

C248 SCD01U16V2KX-3GP

+3.3V_LAN

C268 SC1KP50V2KX-1GPC268 SC1KP50V2KX-1GP

1 2

C283 SC1U10V3KX-3GPC283 SC1U10V3KX-3GP

1 2

C281 SC1U10V3KX-3GPC281 SC1U10V3KX-3GP

1 2

+2.5V_LOM

C257 SCD1U10V2KX-4GPC257 SCD1U10V2KX-4GP

1 2

C258 SC1KP50V2KX-1GPC258 SC1KP50V2KX-1GP

1 2

C255 SC1KP50V2KX-1GPC255 SC1KP50V2KX-1GP

1 2

SC4D7U6D3V5KX-3GP

C288 SC1U10V3KX-3GPC288 SC1U10V3KX-3GP
C291

C291

+1.2V_LOM

C264 SC1U10V3KX-3GPC264 SC1U10V3KX-3GP
C267 SC1KP50V2KX-1GPC267 SC1KP50V2KX-1GP
C282 SC1U10V3KX-3GPC282 SC1U10V3KX-3GP
C270 SC1KP50V2KX-1GPC270 SC1KP50V2KX-1GP
C292 SC1U10V3KX-3GPC292 SC1U10V3KX-3GP
C261 SC1KP50V2KX-1GPC261 SC1KP50V2KX-1GP
C278 SC4D7U6D3V5KX-3GPC278 SC4D7U6D3V5KX-3GP

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

LAN Marvell-88E8040

LAN Marvell-88E8040

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

LAN Marvell-88E8040

SC4D7U6D3V5KX-3GP

1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

1

of

of

of

20 58Thursday, October 02, 2008

20 58Thursday, October 02, 2008

20 58Thursday, October 02, 2008

A00

A00

A00

D D

+3.3V_LAN

+3.3V_LAN

1

TP145TP145

+3.3V_RUN

1

TP147TP147

+3.3V_LAN

C C

B B

+3.3V_ALW

12

C296

C296

A A

PM_LAN_ENABLE24

R229

R229

12

4K7R2J-2-GP

4K7R2J-2-GP

LOM_DISABLE#

A00.08/0903

R246

R246

1 2

0R0402-PAD

0R0402-PAD

R221 2KR2F-3-GPR221 2KR2F-3-GP

1 2

R243 10KR2J-3-GP

R243 10KR2J-3-GP

1 2

DY

DY

R239 10KR2J-3-GP

R239 10KR2J-3-GP

1 2

DY

DY

TP136TP136

1

TP139TP139

1

+3.3V_RUN

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

G

5

1 2

R507 0R3-0-U-GP

R507 0R3-0-U-GP

1 2

R248 0R3-0-U-GP

R248 0R3-0-U-GP

S

12

R257

R257
10KR2J-3-GP

10KR2J-3-GP

Q15

Q15
2N7002-7F-GP

2N7002-7F-GP

S D

DY

DY
DY

DY

Q14

Q14

G

LANSC
LANPWR
LANSV
LANRSET
CTRL12
CTRL25

LANHP
LANHN

MDI0-45
MDI1-45

MDI0+45
MDI1+45

D

D

G

G

AO3403-GP

AO3403-GP

D

5

SSID = SDIO

4

3

2

1

Please close to pin8.

+3.3V_PHY

D D

12

C319

C319

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C310

C310

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

12

C298

C298

C297

C297

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

VREG

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

Please close to pin11 and pin33.

+3.3V_RUN_CARD

12

C299

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

XD_CD#37
SD_WP37
SD_CD#37

R250

R250

1 2

0R0402-PAD

0R0402-PAD

R249

R249

1 2

0R0402-PAD

0R0402-PAD

12

C280

C280
SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

XD_D4/SD_DAT137
XD_D5/MS_BS37
XD_D3/MS_D137
SD_DAT0/XD_D6/MS_D037
XD_D2/MS_D237
MS_INS#37
XD_D7/MS_D337
SD_CLK/XD_D1/MS_CLK37
XD_D037
XD_WP#37
XD_RDY37
SD_DAT3/XD_WE#37
SD_DAT2/XD_RE#37
XD_ALE37
XD_CE#37
XD_CLE37

SD_CLK/XD_D1/MS_CLK

C C

B B

MS_CLK37

SD_CLK37

MS_CLK

SD_CLK

C273

C273

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

DY

DY

12

DY

DY

XD_CD#
SD_WP
SD_CD#
XD_D4/SD_DAT1
XD_D5/MS_BS
XD_D3/MS_D1
SD_DAT0/XD_D6/MS_D0
XD_D2/MS_D2
MS_INS#
XD_D7/MS_D3
SD_CLK/XD_D1/MS_CLK
XD_D0
XD_WP#
XD_RDY
SD_DAT3/XD_WE#
SD_DAT2/XD_RE#
XD_ALE
XD_CE#
XD_CLE CARD_EEDI

C299

9

1

U34

U34

19
20
21
23
25
26
27
28
29
31
34
35
37
38
39
40
41
42
43

AV_PLL

SP1

CARD_3V3

SP2
SP3
SP4
SP5
SP6
SP7
SP8
SP9
SP10

RTS5158E-GRT-GP

RTS5158E-GRT-GP

SP11
SP12
SP13
SP14
SP15
SP16
SP17
SP18
SP19

MS_D4

MS_D5

22

24

10

VREG

NC#30

30

8

3V3_IN

NC#7

7

NC#3

3

+3.3V_PHY

12

C300

C300

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

11

33

D3V3

D3V3

12

36

45

SD_CMD

MODE_SEL

GND

6

C320

C320

14

12

GPIO0

GND

+3.3V_RUN

R259

R259

1 2

0R0603-PAD

0R0603-PAD

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

MODE_SEL
SD_CMD
CARD_RREF
CARD_RST#

A00.08/1002

44

2

A00.08/0902

RST#

RREF

5

DP

4

DM

13

XTAL_CTR

47

XTLI

48

XTLO

17

EESK

16

EECS

15

EEDO

18

EEDI

GND

GND

32

46

R260

R260

1 2

6K2R2F-GP

6K2R2F-GP

USB_PP10
USB_PN10

XTAL_CTR

CARD_EESK
CARD_EECS

CARD_EEDO

SD_CMD 37

R282

R282

499KR2F-1-GP

499KR2F-1-GP

1 2

CARD_RST#_R

12

R283

R283

DY

DY

1 2

BLM18BD601SN1D-GP

BLM18BD601SN1D-GP

R272 10KR2J-3-GPR272 10KR2J-3-GP

+3.3V_PHY

DY

DY

1 2
12

DY

DY

+3.3V_PHY

R284

R284
100KR2J-1-GP

100KR2J-1-GP

C318

C318

SC1U10V2KX-1GP

SC1U10V2KX-1GP

CLK_48M_CARD 4

USB_PN10
USB_PP10

R510

R510

1 2

2K2R2J-2-GP

2K2R2J-2-GP

12

C568

C568

SC1U10V2KX-1GP

SC1U10V2KX-1GP

A00.08/1002

1

2

DY

DY

4

3

PLT_RST# 9,16,20,24,37,41

L6

L6
DLW21SN900SQ2LUGP

DLW21SN900SQ2LUGP

USB_PN10 16

USB_PP10 16

+3.3V_PHY

U33

A A

CARD_EECS
CARD_EESK
CARD_EEDO
CARD_EEDI

U33

1

CS

VCC

2

SK

3

DI

ORG

DY

DY

DO4GND

AT93C46DN-SH-B-GP

AT93C46DN-SH-B-GP

8
7

DC

12

6
5

C311

C311

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

Reserve for changing USB VID/PID.

5

4

Power mode select

No staff R and C for power saving mode.

MODE_SEL

12

DY

DY

12

C317

C317

DY

DY

SC47P50V2JN-3GP

SC47P50V2JN-3GP

R280

R280

10KR2J-3-GP

10KR2J-3-GP

3

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

RTS5158E

RTS5158E

RTS5158E

Roberts

Roberts

Roberts

1

A00

A00

A00

of

of

of

21 58Thursday, October 02, 2008

21 58Thursday, October 02, 2008

21 58Thursday, October 02, 2008

5

SSID = AUDIO

4

3

2

1

+3.3V_RUN

12

C537

+3.3V_RUN

1 2

C537

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2

C529

C529
SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12
12

D D

ICH_AZ_CODEC_BITCLK17

ICH_SDIN_CODEC17

C C

B B

ICH_SDOUT_CODEC17
ICH_AZ_CODEC_SYNC17
ICH_AZ_CODEC_RST#17

AUD_DMIC_IN041

R463 22R2J-2-GPR463 22R2J-2-GP
R465 33R2J-2-GPR465 33R2J-2-GP

12

12

C530

C530

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

R467

R467

0R0402-PAD

0R0402-PAD

ICH_AZ_CODEC_BITCLK_R
SB_AZ_CODEC_SDIN0_R

12

C532

C532

DY

DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

AUD_DMIC_CLK
AUD_DMIC_IN0

Place C914 close to pin1
Place C915 close to pin9

C533

C533

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

U61

U61

1

DVDD_CORE

9

DVDD_CORE

40

NC#40/OTP

3

DVDD_IO

6

BITCLK

8

SDI_CODEC

5

SDO

10

SYNC

11

RESET#

46

DMIC_CLK

2

VOL_UP/DMIC_0/GPIO1

4

VOL_DN/DMIC_1/GPIO2

47

EAPD/GPIO0/SPDIF_OUT0OR1

48

SPDIF_OUT0

43

GPIO5

44

GPIO6

45

GPIO7/SPDIF_OUT1

7

DVSS

49

GND

92HD71B7A5NLGXB3X8-GP

92HD71B7A5NLGXB3X8-GP

AVDD1
AVDD2

SENSE_A

SENSE_B/NC#34

PORTA_L
PORTA_R

NC#37

PORTB_L
PORTB_R

VREFOUT_B

PORTC_L

PORTC_R

VREFOUT_C

PORTD_L

PORTD_R

PORTE_L
PORTE_R

VREFOUT_E/GPIO4

PORTF_L

PORTF_R

GPIO3
NC#18

NC#19
NC#20

PCBEEP

MONO_OUT

CAP2

VREFFILT

AVSS1
AVSS2

+VDDA

12

12

C550

C550

25
38

13
34

39
41
37

21
22
28

23
24
29

35
36

14
15
31

16
17
30

18
19
20

12
32

33
27

26
42

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

AUD_SENSE_A
AUD_SENSE_B

AUD_HP1_OUT_L
AUD_HP1_OUT_R

AUD_EXT_MIC_L
AUD_EXT_MIC_R
AUD_VREFOUT_B

AUD_INT_MIC_L
AUD_INT_MIC_R
AUD_VREFOUT_C

AUD_LINE_OUT_L
AUD_LINE_OUT_R

AUD_PC_BEEP
Trace width>15 mils

PC BEEP

AUD_PC_BEEP

AUD_CAP2
AUD_VREFFLT

+VDDA

C555

C555

SC1U10V3KX-3GP

SC1U10V3KX-3GP

C547 SC1U10V3KX-3GPC547 SC1U10V3KX-3GP

1 2

C549 SC1U10V3KX-3GPC549 SC1U10V3KX-3GP

1 2

R292 4K7R2J-2-GPR292 4K7R2J-2-GP

1 2

C560 SC1U6D3V2KX-GPC560 SC1U6D3V2KX-GP

12

C558

C558

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1 2

12

C561

C561

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

R487

R487
20KR2F-L-GP

20KR2F-L-GP

C531 SCD1U10V2KX-4GPC531 SCD1U10V2KX-4GP

R468

R468
DUMMY-C2

DUMMY-C2

1 2

12

+VDDA

12

R479

R479
5K1R2F-2-GP

5K1R2F-2-GP

R473 39K2R2F-L-GPR473 39K2R2F-L-GP
R478 20KR2F-L-GPR478 20KR2F-L-GP
C541 SC1KP50V2KX-1GPC541 SC1KP50V2KX-1GP

AUD_HP1_OUT_L 23
AUD_HP1_OUT_R 23

AUD_EXT_MIC_L 40
AUD_EXT_MIC_R 40

AUD_VREFOUT_B 40

INT_MIC_L_R 40

AUD_LINE_OUT_L 23
AUD_LINE_OUT_R 23

SB_SPKR_R

12

12
12

R464

R464
499KR2F-1-GP

499KR2F-1-GP

1 2

AUD_HP1_JD# 23,40
EXT_MIC_JD# 40

Port A---> HP
Port B---> Ext Mic
Port C---> Int Mic
Port D---> Speaker

From SB

SB_SPKR 18

Azalia I/F EMI

ICH_SDOUT_CODEC

12

R466

R466
47R2J-2-GP

47R2J-2-GP

DY

DY

ICH_AZ_CODEC_SDOUT1

A A

12

C528

C528

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

5

4

AUD_DMIC_CLK_G41

SC22P50V2JN-4GP

SC22P50V2JN-4GP

EC154

EC154

+3.3V_RUN

5

12

4

R477 22R2J-2-GPR477 22R2J-2-GP

U59

U59

OE#

VCC

A

DY

DY

GND

Y

74LVC1G125DC-GP

74LVC1G125DC-GP

12

3

1
2
3

AUD_DMIC_CLK

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

AUDIO CODEC 92HD71B7

AUDIO CODEC 92HD71B7

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

AUDIO CODEC 92HD71B7

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

22 58Thursday, October 02, 2008

22 58Thursday, October 02, 2008

22 58Thursday, October 02, 2008

1

A00

A00

A00

of

of

of

5

4

3

2

1

SSID = AUDIO

+5V_RUN

BLM21PG600SN-1GP

D D

AUD_HP1_OUT_R22
AUD_HP1_OUT_L22

C C

BLM21PG600SN-1GP

60ohm 100MHz
3000mA 0.05ohm DC

+5V_SPK_AMP

L18

L18

1 2

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C564

C564

1 2

6040B

6040B

1 2

6040B

6040B

C557

C557

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

Close to U24.8 Close to U24.18

12

AUD_SPK_L140
AUD_SPK_L240
AUD_SPK_R240
AUD_SPK_R140

AUD_HP1_JACK_R40
AUD_HP1_JACK_L40

AUD_HP1_OUT_R1
AUD_HP1_OUT_L1

12

2K2R2J-2-GP

2K2R2J-2-GP

R490

R490

1 2
1 2

R488

R488

2K2R2J-2-GP

2K2R2J-2-GP

C545

C545

C538

C538

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

AUD_SPK_L1
AUD_SPK_L2
AUD_SPK_R2
AUD_SPK_R1

AUD_HP1_JACK_R
AUD_HP1_JACK_L

AUD_AMP_GAIN1
AUD_AMP_GAIN2

AUD_HP1_OUT_R2
AUD_HP1_OUT_L2

12

C563

C563

SC1U10V3KX-3GP

SC1U10V3KX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

19
20

15
16

31
32

26
27

+5V_SPK_AMP +5V_SPK_AMP

+5V_SPK_AMP

12

C553

C553

18

PVDD

GND

28

33

C551

C551

9

17

CPVDD

CPGND11CPVSS13PVSS

GND

AUD_CPVSS

12

AUD_SET
AUD_BIAS

30

SPKR_INR

HPVDD

SPKR_INL

SPKR_EN#

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

VDD

2
3

23
25

MUTE#

22

HP_EN

4

REGEN

10

C1P

12

C1N

29

VOUT

24

BIAS

1

SET

9789

MAX9789A-GP

MAX9789A-GP

14

9789

C535 SCD033U16V3KX-GP

C535 SCD033U16V3KX-GP

6040

6040

C566 SCD033U16V3KX-GP

C566 SCD033U16V3KX-GP

6040

6040

C567 SCD1U10V2KX-4GP

C567 SCD1U10V2KX-4GP

9789

9789

AUD_LIN_R
AUD_LIN_L

AUD_SPK_ENABLE#
AMP_MUTE#_R
AUD_HP1_EN
AMP_REGEN
AMP_C1P
AMP_C1N

AUD_BIAS
AUD_SET

8

U62

U62

6
7

OUTL+
OUTL­OUTR­OUTR+

HPR
HPL

GAIN1
GAIN2

HP_INR
HP_INL

PVDD

PGND

PGND

5

21

SC1U10V3KX-3GP

SC1U10V3KX-3GP

12

12

12

C562

C562

C554

C554

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C544 SCD033U16V3KX-GPC544 SCD033U16V3KX-GP
C543 SCD033U16V3KX-GPC543 SCD033U16V3KX-GP

C321 SC1U10V3KX-3GPC321 SC1U10V3KX-3GP

1 2

R469

R469

0R2J-2-GP

0R2J-2-GP

12
12
12

12

C552

C552

SC10U6D3V5MX-3GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 2
1 2

6040

6040

SC10U6D3V5MX-3GP

R486 100KR2J-1-GP

R486 100KR2J-1-GP

6040

6040

R483 0R2J-2-GP

R483 0R2J-2-GP

9789

9789

12

12

C565

C565

SC1U10V3KX-3GP

SC1U10V3KX-3GP

KBC_BEEP_RAMP_REGEN

12

C548

C548

12

12

12

C556

C556

C322

C322

SC1U10V3KX-3GP

SC1U10V3KX-3GP

1 2

12

1KR2J-1-GP

1KR2J-1-GP
R484

R484

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

AUD_LINE_OUT_R 22
AUD_LINE_OUT_L 22

+VDDA

SC1U10V3KX-3GP

SC1U10V3KX-3GP

R472

R472

10KR2J-3-GP

10KR2J-3-GP

12

Close to Pin9

+5V_SPK_AMP

R286

R286

12

9789

9789

100KR2J-1-GP

100KR2J-1-GP

C546

C546

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

From EC

AMP_MUTE# 24

+5V_RUN

KBC_BEEP 24

From EC

GAIN SETTING

+5V_SPK_AMP

B B

100KR2J-1-GP

100KR2J-1-GP

100KR2J-1-GP

100KR2J-1-GP

A A

R290

R290

R291

R291

DY

DY

12

12

DY

DY

12

12

A00.08/0922

GAIN1 GAIN2 GAIN

0 0 6dB
0 1 10dB
1 0 15.6dB
1 1 21.6dB

5

R288

R288
100KR2J-1-GP

100KR2J-1-GP

AUD_AMP_GAIN2AUD_AMP_GAIN1

R289

R289
100KR2J-1-GP

100KR2J-1-GP

Main
source

TPA6040A
(74.06040.013)

R486

R483

R469

R286

C535

C566

No ASM

No ASM

No ASM

0.033uF

0.033uF

C565 1uF

100K

Second
source

MAX9789A
(74.09789.013)

No ASM

0 Ohm

0 Ohm

100K

No ASM

No ASM

No ASM

C567 No ASM 0.1uF

C564

C557

10uF

10uF

4

2.2uF

2.2uF

G80

G80

1 2

GAP-OPEN-PWR

GAP-OPEN-PWR

G79

G79

1 2

GAP-OPEN-PWR

GAP-OPEN-PWR

G77

G77

1 2

GAP-OPEN-PWR

GAP-OPEN-PWR

G78

G78

1 2

GAP-OPEN-PWR

GAP-OPEN-PWR

3

Signal inverter for speaker shutdown

U36

U36

AUD_HP1_JD#22,40

2

AUD_HP1_JD#
AUD_HP1_JD AUD_HP1_EN

D17

D17

2

1

BAW56-2-GP

BAW56-2-GP

AUD_SPK_ENABLE

3

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

+VDDA

R293

R293

100KR2J-1-GP

100KR2J-1-GP

NB_SPK_EN#

5
6

2N7002SPT

2N7002SPT

12

AUDIO AMP/SPEAKER

AUDIO AMP/SPEAKER

AUDIO AMP/SPEAKER

+5V_SPK_AMP

12

R485

R485
100KR2J-1-GP

100KR2J-1-GP

AUD_HP1_JD

34

AMP_MUTE#

2
1

12

R489

R489
10MR2J-L-GP

10MR2J-L-GP

+5V_SPK_AMP+5V_SPK_AMP

12

R285

R285
100KR2J-1-GP

100KR2J-1-GP

U35

U35

34
5
6

2

1

2N7002SPT

2N7002SPT

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

1

12

R287

R287
100KR2J-1-GP

100KR2J-1-GP

AUD_SPK_ENABLE#AUD_HP1_JD#
AMP_MUTE#

23 58Thursday, October 02, 2008

23 58Thursday, October 02, 2008

23 58Thursday, October 02, 2008

A00

A00

A00

of

of

of

D

DCCBB

A

PCB_VER2
PCB_VER1
PCB_VER0

A

L17 BLM18AG601SN-3GPL17 BLM18AG601SN-3GP

1 2

12

12

C466

C466

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

+3.3V_RUN

12

DY

DY

12

+3.3V_RUN

12

R148

R148
10KR2J-3-GP

10KR2J-3-GP

DY

DY

R149

R149
4K7R2J-2-GP

4K7R2J-2-GP

1 2

R146

R146

R143

R143

C465

C465

VGATE_PWRGD18,28

EC_SPI_WP#_R42

RUNPWROK30,31,32

3V_5V_POK27

PM_PWROK9,18,25

PSID_DISABLE#45

HDD_5V_EN36

CPUCORE_ON28

USB_PWR_EN#43,45

12

10KR2J-3-GP

10KR2J-3-GP

12

DY

DY

10KR2J-3-GP

10KR2J-3-GP

E51_TxD

12

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

PWRLED42

BLON_OUT35

R138

R138

10KR2J-3-GP

10KR2J-3-GP

DY

DY

R141

R141

10KR2J-3-GP

10KR2J-3-GP

5

12

C456

C456

C451

C451

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

R182

R182

R158

R158

R159

R159

12

R151

R151

10KR2J-3-GP

10KR2J-3-GP

X00
X01

12

X02

-1

R150

R150

10KR2J-3-GP

10KR2J-3-GP

A00.08/0902

CAP close to VCC-GND pin pair

12

C457

C457

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

AD_IA26

CAPA_INT#42

CAMERA_DET#41

PM_SLP_S3#18,25,30,31,32,34,41
KBC_PWRBTN#42
AC_IN#26
LID_CLOSE#41

A00.08/0902

1 2

A00.08/0903

AD_OFF45
RSMRST#_KBC18

PM_SLP_S4#18,31,41

A00.08/0903

1 2

1 2

A00.08/0903

12

C458

C458

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

12

C459

C459

KBC_THERMTRIP#

PCB_VER0
PCB_VER1
PCB_VER2

BIOS_ID
RUNPWROK_R

PM_PWROK_R

CPUCORE_ON_R
ECSMI#_KBC

MB VERSION ID

MB VERSION ID

VER1

VER2

00

0

0
0

1

0

1

KBC CLK EMI

PCLK_KBC

R410

R410

DY

DY

0R2J-2-GP

0R2J-2-GP

PCLK_KBC_RC

1 2

C453

C453

DY

DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

1 2

12

C460

C460

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

VER0

0
1
0
1

VBAT

U20A

U20A

104

VREF

97

GPI90/AD0

98

GPI91/AD1

99

GPI92/AD2

100

GPI93/AD3

108

GPIO05

96

GPIO04

101

GPI94

105

GPI95

106

GPI96

107

GPI97

64

GPIO01/TB2

95

GPIO03

93

GPIO06

94

GPIO07

119

GPIO23

6

GPIO24

109

GPIO30

120

GPIO31

65

GPIO32/D_PWM

66

GPIO33/H_PWM

16

GPIO40/F_PWM

17

GPIO42/TCK

20

GPIO43/TMS

21

GPIO44/TDI

22

GPIO45/E_PWM

23

GPIO46/TRST#

24

GPIO47

25

GPIO50/TDO

26

GPIO51

27

GPIO52/RDY#

28

GPIO53

73

GPIO70

74

GPIO71

75

GPIO72

110

GPO82/TRIS#

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

4

115

VCC

PLT_RST1#_1

C228

C228

12

23

C240

C240

12

88

VCC19VCC46VCC76VCC

A/D

A/D

D/A

D/A

GPIO

GPIO

116

R156

R156

DY

DY

0R2J-2-GP

0R2J-2-GP

R153

R153

1 2

0R0402-PAD

0R0402-PAD

12

C190

C190

DY

DY

SC470P50V2KX-3GP

SC470P50V2KX-3GP

X1

X1

1

X-32D768KHZ-38GPU

X-32D768KHZ-38GPU

4

X3_1

4

102

80

VDD

AVCC

GPIO41
GPIO10/LPCPD#

LPC

LPC

GPIO11/CLKRUN#

ECSCI#/GPIO54

GPIO67/PWUREQ#

SMB

SMB

SP

SP

SPI

SPI

SER/IR

SER/IR

R203

R203

1 2

33KR3-GP

33KR3-GP

GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1

GPIO66/G_PWM

GPIO76/SHBM

GPO83/SOUT_CR/BADDR1

GPIO87/SIN_CR

GPO84/BADDR0

GND5GND18GND45GND78GND89GND

AGND

WPCE773LA0DG-GP

WPCE773LA0DG-GP

103

R413

R413
0R2J-2-GP

0R2J-2-GP

1 2

CPUCORE_ONRUNPWROK

12

PLT_RST# 9,16,20,21,37,41

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1 OF 2

1 OF 2

LRESET#

LCLK

LFRAME#

LAD0
LAD1
LAD2
LAD3

SERIRQ

KBRST#

GA20

GPIO65/SMI#

GPIO77
GPIO75

GPIO81

GPIO16
GPIO34
GPIO36

VCORF

KBC_XI

R199

R199
20MR3-GP

20MR3-GP

KBC_XO

124
7
2
3
126
127
128
1
125
8
122
121
29
9
123

68
67
69
70

81

84
83
82
91

111
113
112

114
14
15

44

C194

C194

+3.3V_RUN+3.3V_RTC_LDO

KBC_VCORF

EC_SPI_DI42
EC_SPI_DO42
EC_SPI_CS#42
EC_SPI_CLK42

12

DY

DY

PLT_RST1#_1

LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3

ECSCI#_KBC
ECSWI#_KBC

KBC_SDA1
KBC_SCL1

KBC_GPIO76

E51_TxD
E51_RxD

TSATN#_KBC

PURE_HW_SHUTDOWN#25,34

3

C196

C196

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1 2

R157 10KR2J-3-GPR157 10KR2J-3-GP

12

C204

C204
SC1U10V3KX-3GP

SC1U10V3KX-3GP

EC_SPI_DI
EC_SPI_DO
EC_SPI_CS#
EC_SPI_CLK

BAT_IN# 45

PCLK_KBC 4
LPC_LFRAME# 17,37

LPC_LAD[0..3] 17,37

INT_SERIRQ 18

PM_CLKRUN# 18
KBRCIN# 17
KA20GATE 17

GMCH_BL_ON 13

12

BAT_SDA 26,45
BAT_SCL 26,45

BLUETOOTH_EN 41,47
WIFI_RF_EN 37

E51_TxD 37
E51_RxD 37

PM_LAN_ENABLE 20

TSATN#_KBC 9

S5_ENABLE 34

R192 0R2J-2-GPR192 0R2J-2-GP

+3.3V_RTC_LDO

A00.08/0903

AMP_MUTE#23

PS_ID_EC45

PM_PWRBTN#18

LCD_TST_EN35

KBC_BEEP23

BATLOW_LED42

BRIGHTNESS35

KB_DET#44

LCD_CBL_DET#35

LCD_TST35

1 2

10KR2J-3-GP

10KR2J-3-GP

R173

R173

1 2
1 2

R170

R170

0R0402-PAD

0R0402-PAD

2

+3.3V_RUN

1

SSID = KBC

1 2

DY

DY

R415 0R2J-2-GP

R416

R416

KBC_XI

KBC_XO

EC_SPI_CLK_C

B

Q10

Q10

1 2

DY

DY

0R2J-2-GP

0R2J-2-GP

KBC_SCL1

+1.05V_VCCP

BAS16-1-GP

BAS16-1-GP

BAS16-1-GP

BAS16-1-GP

BAS16-1-GP

BAS16-1-GP

U20B

U20B

77

32KX1/32KCLKIN

79

32KX2

30

GPIO55/CLKOUT

63

GPIO14/TB1

117

GPIO20/TA2

31

GPIO56/TA1

32

GPIO15/A_PWM

118

GPIO21/B_PWM

62

GPIO13/C_PWM

13

GPIO12/PSDAT3

12

GPIO25/PSCLK3

11

GPIO27/PSDAT2

10

GPIO26/PSCLK2

71

GPIO35/PSDAT1

72

GPIO37/PSCLK1

86

F_SDI

87

F_SDO

90

F_CS0#

92

F_SCK

ECRST#

E

C

E

1

2

1

2

1

2

12

CAP_SDA42

THERM_SDA25

H_THRMTRIP#5,9,17,34

ECSWI#18

ECSCI#18

ECSMI#18

TPDATA44

TPCLK44

ECRST#_C

CH3906PT-GP

CH3906PT-GP

R415 0R2J-2-GP

5
6

R417 0R2J-2-GP

R417 0R2J-2-GP

12

R162

R162
2K2R2J-2-GP

2K2R2J-2-GP

C199

C199

12

B

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

KBC_THERMTRIP#

C

Q9

Q9
CH3904PT-GP

CH3904PT-GP

D13

D13

3

D11

D11

3

D12

D12

3

PS/2

PS/2

FIU

FIU

C214

C214
SC1U10V3KX-3GP

SC1U10V3KX-3GP

U22

U22

2N7002SPT

2N7002SPT

1 2

DY

DY

ECSWI#_KBC

ECSCI#_KBC

ECSMI#_KBC

KBC

KBC

KBSOUT15/GPIO61/XOR_OUT

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

KBC_SDA1

34
2
1

R418

R418

1 2

DY

DY

0R2J-2-GP

0R2J-2-GP

E51_RxD

KA20GATE
KBRCIN#

KBC_SCL1
KBC_SDA1

BAT_SDA
BAT_SCL

KBC_PWRBTN#
LID_CLOSE#
LCD_CBL_DET#
KB_DET#
CAMERA_DET#
KBC_THERMTRIP#

S5_ENABLE
KCOL0
KBC_GPIO76
BIOS_ID

BIOS_ID: Pull High for Discrete
KBC internal Pull Low for UMA

2 OF 2

2 OF 2

KBSOUT0/JENK#

KBSOUT1/TCK
KBSOUT2/TMS

KBSOUT3/TDI

KBSOUT4/JEN0#

KBSOUT5/TDO

KBSOUT6/RDY#

KBSOUT7
KBSOUT8

KBSOUT9
KBSOUT10
KBSOUT11

KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62

GPIO60/KBSOUT16
GPIO57/KBSOUT17

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

VCC_POR#

WPCE773LA0DG-GP

WPCE773LA0DG-GP

KBC Winbond WPC773L

KBC Winbond WPC773L

KBC Winbond WPC773L

1 2

R147 10KR2J-3-GP

R147 10KR2J-3-GP

4

4

4

1 2

R425 100KR2J-1-GPR425 100KR2J-1-GP

1 2

R422 10KR2J-3-GP

R422 10KR2J-3-GP

1 2

R409 100KR2J-1-GPR409 100KR2J-1-GP

1 2

R406 100KR2J-1-GP

R406 100KR2J-1-GP

1 2

R401 100KR2J-1-GPR401 100KR2J-1-GP

1 2

R404 100KR2J-1-GPR404 100KR2J-1-GP

1 2

R407 10KR2J-3-GPR407 10KR2J-3-GP

1 2

R400 10KR2J-3-GP

R400 10KR2J-3-GP

1 2

R420 10KR2J-3-GPR420 10KR2J-3-GP

1 2

R509 10KR2J-3-GP

R509 10KR2J-3-GP

KCOL0

53

KCOL1

52

KCOL2

51

KCOL3

50

KCOL4

49

KCOL5

48

KCOL6

47

KCOL7

43

KCOL8

42

KCOL9

41

KCOL10

40

KCOL11

39

KCOL12

38

KCOL13

37

KCOL14

36

KCOL15

35

KCOL16

34

KCOL17

33

KROW0

54

KROW1

55

KROW2

56

KROW3

57

KROW4

58

KROW5

59

KROW6

60

KROW7

61

ECRST#

85

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

THERM_SCL 25

CAP_SCL 42

DY

DY

RN21

RN21

1
23

DY

DY

SRN10KJ-5-GP

SRN10KJ-5-GP

RN47

RN47

1
23

SRN4K7J-8-GP

SRN4K7J-8-GP
RN46

RN46

1
23

SRN4K7J-8-GP

SRN4K7J-8-GP

DY

DY

DY

DY

DY

DY

DY

DY

A00.08/0902

1

+3.3V_RTC_LDO

TP122TP122

24 58Thursday, October 02, 2008

24 58Thursday, October 02, 2008

24 58Thursday, October 02, 2008

+3.3V_RUN

DY

DY

KCOL[0..16] 44

KROW[0..7] 44

of

of

of

12

EC132

EC132

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

A00

A00

A00

5

SSID = Thermal

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

D D

+3.3V_RTC_LDO

+3.3V_RUN

1.For CPU Sensor

H_THERMDC5

C50

SC470P50V3JN-2GP

H_THERMDA5

C C

SC470P50V3JN-2GP

C50

C388 must be near Q18

12

C388

C388

DY

DY

SC470P50V3JN-2GP

B

SC470P50V3JN-2GP

Q18

Q18

MMBT3904-3-GP

MMBT3904-3-GP

E

C

2.System Sensor, Put between CPU and NB.

C37 must be near Q1

E

Q1

Q1

MMBT3904-3-GP

MMBT3904-3-GP

B

C

C37

C37

DY

DY

SC470P50V3JN-2GP

SC470P50V3JN-2GP

3.HW T8 sensor

B B

TP223TP223
TP72TP72

EMC2102_FAN_TACH_1

1

EMC2102_FAN_DRIVE

1

Layout notice :
Both H_THERMDA and THERMDC routing

12

10 mil trace width and 10 mil spacing.

Layout notice :
Both DN2 and DP2 routing 10 mil
trace width and 10 mil spacing.

C61

C61
SC470P50V3JN-2GP

SC470P50V3JN-2GP

1 2

C61 must be
near EMC2102

Layout notice :
Both DN3 and DP3 routing 10 mil
trace width and 10 mil spacing.

C63

C63
SC470P50V3JN-2GP

SC470P50V3JN-2GP

1 2

C63 must be
near EMC2102

4

+5V_RUN +5V_RUN

12

12

C389

C386

C386

R346

R346

12

DY

DY

49D9R2F-GP

49D9R2F-GP

R340

R340

12

49D9R2F-GP

49D9R2F-GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

GND = Fan is OFF
OPEN = Fan is at 60% full-scale
+3.3V = Fan is at 75% full-scale

C389
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

EMC2102_VDD_3D3

C60

C60

1 2

EMC2102_DN2
EMC2102_DP2
EMC2102_DN3
EMC2102_DP3

GND = Channel 1
OPEN = Channel 3
+3.3V = Disabled

+3.3V_RUN

R67

R67

DY

DY

10KR2J-3-GP

10KR2J-3-GP

R68

R68

DY

DY

10KR2J-3-GP

10KR2J-3-GP

R71

R71

10KR2J-3-GP

10KR2J-3-GP

U8

U8

1
2
3
4
5
6
7

12

12

12

+3.3V_RUN

29

GND

VDD_3V
DN1
DP1
DN2
DP2
DN3
DP3

EMC2102_SHDN

EMC2102_FAN_mode

12

R63

R63
10KR2J-3-GP

10KR2J-3-GP

26

28

27

TACH

VDD_5Va

EMC2102

EMC2102

SHDN_SEL9FAN_MODE10TRIP_SET11SYS_SHDN#12THERMTRIP#13POWER_OK#

NC#8

8

3

EMC2102_FAN_TACH

EMC2102_FAN_DRIVE

25

23

24

FANb

FANa

SMCLK

VDD_5Vb

+3.3V_RUN

R66

R66

1 2

DY

DY

0R2J-2-GP

0R2J-2-GP

D6

D6

RB551V30-GP

RB551V30-GP

RN3

RN3

23
1

4

SRN4K7J-8-GP

SRN4K7J-8-GP

THERM_SCL 24
THERM_SDA 24

22

SMDATA

21

NC#21

20

GND

19

ALERT#

18

CLK_IN

17

CLK_SEL

16

RESET#

15

NC#15

EMC2102-DZK-GP

EMC2102-DZK-GP

14

R85 10KR2J-3-GPR85 10KR2J-3-GP
R84 10KR2J-3-GPR84 10KR2J-3-GP

12

R362

R362
10KR2J-3-GP

10KR2J-3-GP

Q17

Q17

G

2N7002-7F-GP

2N7002-7F-GP

S D

KA

+3.3V_RUN

ALERT#
CLK_32K
EMC2102_CLK_SEL
EM2102_RESET#

12
12

+3.3V_RTC_LDO

12

R347

R347
10KR2J-3-GP

10KR2J-3-GP

12

R348

R348

DY

DY

10KR2J-3-GP

10KR2J-3-GP

EMC2102_FAN_TACH_1

R87 0R2J-2-GP

R87 0R2J-2-GP

DY

DY

R88 10KR2J-3-GPR88 10KR2J-3-GP

+3.3V_RUN

PURE_HW_SHUTDOWN# 24,34

2

12

12

EMC2102_FAN_TACH_1 36

EMC2102_FAN_DRIVE 36

+3.3V_RUN

R89

R89
8K2R2J-3-GP

8K2R2J-3-GP

1 2

THERM_SCI# 18

GND = Internal Oscillator Selected
+3.3V = External 32.768kHz Clock Selected

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

V_DEGREE

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

C78

C78

C70

C70

+3.3V_RUN

12

12

1

A00.08/0922

12

R82

R82
10KR2F-2-GP

10KR2F-2-GP

TRIP_SET Pin Voltage
V_DEGREE=(((Degree-75)/21)

12

R78

R78
2K37R2F-GP

2K37R2F-GP

T8 shutdown is set 88 deg-C.

32K suspend clock output

U10

R219

ICH_SUSCLK18

A A

5

SD

Q13

Q13
2N7002-7F-GP

2N7002-7F-GP

G

RUN_POWER_ON

R219

1 2

10R2J-2-GP

10R2J-2-GP

CLK_32KCLK_32K_R CLK_32K

12

C249

C249

DY

DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

4

EM2102_RESET#

PM_SLP_S3#18,24,30,31,32,34,41

3

U10

1

B

2

A

3

GND

74LVC1G08GW-1-GP

74LVC1G08GW-1-GP

DY

DY

VCC

Y

+3.3V_ALW

5

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

4

DY

DY

C82

C82

12

PM_PWROK 9,18,24

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Thermal/Fan Controllor EMC2102

Thermal/Fan Controllor EMC2102

Thermal/Fan Controllor EMC2102

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

25 58Thursday, October 02, 2008

25 58Thursday, October 02, 2008

25 58Thursday, October 02, 2008

1

of

of

of

A00

A00

A00

5

4

3

2

1

SSID = Charger

MAX8731_LDO

12

R339

R339
10KR2F-2-GP

10KR2F-2-GP

+DC_IN_SS

Q2

Q2

12

ACAV_IN

R59

R59
10KR2J-3-GP

10KR2J-3-GP

1 2

DC_IN_D

G

S D

BAT_SCL24,45

BAT_SDA24,45

12

R341

R341
15K4R2F-GP

15K4R2F-GP

Id=-8A
Qg=17~24nC
Rdson=15~20mohm

Layout Trace 250mil

8
7
6

DCIN_GATE1

ACAV_IN

12

C64

C64
SCD1U25V3KX-GP

SCD1U25V3KX-GP

CHG_AGND

U47

U47

D

D
D

D
D

D

AO4407A-GP

AO4407A-GP

G

S D

MAX8731_DCIN
MAX8731_ACIN

ACAV_IN

BAT_SCL

BAT_SDA

CHG_AGND

S

S

1

S

S

2

S

S

3

GD

GD

45

R64

R64

1 2

49K9R2F-L-GP

49K9R2F-L-GP

Q3

Q3
2N7002-7F-GP

2N7002-7F-GP

Adaptor In Soft-Start Circuit

+SDC_IN

R62

DCIN_GATE2

U7

U7

22

DCIN

2

ACIN

11

VDD

13

ACOK

10

SCL

9

SDA

14

BATSEL

8

INP

R62

1 2

100KR2J-1-GP

100KR2J-1-GP

12

C47

C47

SCD1U25V3KX-GP

SCD1U25V3KX-GP

CHG_AGND

CHG_AGND CHG_AGND

1

28

CSSP

ASNS

CSSN

VCC

LDO

DLO

PGND

CSIP

CSIN

BST

DHI

27
26

25
21

24

23

LX

20

19
18
17

R338

R338

1 2

D01R2512F-4-GP

D01R2512F-4-GP

G57

G57

1 2

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

MAX8731_CSSP

MAX8731_VCC

MAX8731_BST
MAX8731_LDO

MAX8731_DHI

MAX8731_LX

MAX8731_DLO

MAX8731_CSIP
MAX8731_CSIN

0R3-0-U-GP

0R3-0-U-GP

1 2

R44

R44

1R3F-GP

1R3F-GP

1 2

1 2

C42 SC220P50V2KX-3GPC42 SC220P50V2KX-3GP

R45

R45

G56

G56

1 2

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

12

MAX8731_CSSN

MAX8731_BST1

C41

C41
SCD1U25V3KX-GP

SCD1U25V3KX-GP

12

12

R49

R49

33R2J-2-GP

33R2J-2-GP

D5

D5

K A

BAS516-1-GP

BAS516-1-GP

C34 SCD1U25V3KX-GPC34 SCD1U25V3KX-GP

1 2

CHG_AGND

SC1U10V3KX-3GP

SC1U10V3KX-3GP

C38

C38
SC1U10V3KX-3GP

SC1U10V3KX-3GP

C48

C48

1 2

+PWR_SRC

MAX8731_LX1

470KR2J-2-GP

470KR2J-2-GP

678

DDD

DDD

U45

U45
SI4800BDY-T1

SI4800BDY-T1

SSS

GD

SSS

GD

123

4 5

L9

L9

1 2

IND-5D8UH-GP

IND-5D8UH-GP

678

DDD

DDD

U44

U44
SI4800BDY-T1

SI4800BDY-T1

SSS

GD

SSS

GD

123

4 5

D D

+3.3V_RTC_LDO

12

R72

R72
100KR2J-1-GP

100KR2J-1-GP

AC_IN#24

12

C67

C67

Q4

Q4

SC1U10V3KX-3GP

SC1U10V3KX-3GP

C C

B B

AD_IA24

+DC_IN_SS

R52

R52

365KR3F-GP

365KR3F-GP

R48

R48

49K9R2F-L-GP

49K9R2F-L-GP

S D

CHG_AGND

G

2N7002-7F-GP

2N7002-7F-GP

A00.08/0903

1 2

12

0R0402-PAD

0R0402-PAD

SC1U25V5KX-1GP

SC1U25V5KX-1GP

12

12

ACAV_IN

2N7002-7F-GP

2N7002-7F-GP

R46

R46

C39

C39

+3.3V_RTC_LDO

C46

C46

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

A00.08/0909

R61 10KR2F-2-GPR61 10KR2F-2-GP

1 2

12

R65

5

R65

10KR2F-2-GP

10KR2F-2-GP

A A

12

C62

C62

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

MAX8731_CCV1

12

C58

C58

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

12

C57

C57

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

12

MAX8731_CCV
MAX8731_CCI
MAX8731_CCS
MAX8731_REF

12

C51

C51

C55

C55

SC1U10V3KX-3GP

SC1U10V3KX-3GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

MAX8731_DAC

12

C59

C59

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

CHG_AGND

4

6

CCV

5

CCI

4

CCS

3

REF

7

DAC

12

GND

GND

MAX8731AETI-GP

MAX8731AETI-GP

29

16

FBSB

15

FBSA

1 2

G11

G11
GAP-CLOSE-PWR

GAP-CLOSE-PWR

BAT_SENSE

12

R335

R335

1 2

100R2F-L1-GP-U

100R2F-L1-GP-U

C372

C372
SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

3

BATT_SENSE

BATT_SENSE 45

2

+PBATT

12

12

EC77

EC77

EC76

EC76

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

Layout Trace 300milLayout Trace 300mil

U37

U37

S

S

1

S

S

2

S

S

3

GD

+DC_IN_SS

12

R295

R295

12

C369

C369

CHG_PWR

1 2

D01R2512F-4-GP

D01R2512F-4-GP

1 2

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

GD

4 5

AO4407A-GP

AO4407A-GP

12

12

DY

DY

SC10U25V0KX-3GP

SC10U25V0KX-3GP

R306

R306

G51

G51

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

C40

C40

C371

C371

SC10U25V0KX-3GP

SC10U25V0KX-3GP

Layout Trace 300mil

G50

G50

1 2

CHARGER MAX8731

CHARGER MAX8731

CHARGER MAX8731

12

12

D

D
D

D
D

D

SCD1U25V3KX-GP

SCD1U25V3KX-GP

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

Roberts

Roberts

Roberts

EC79

EC79

EC80

EC80

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

+PBATT

8
7
6

+PBATT

12

12

C331

C331

SC10U25V0KX-3GP

SC10U25V0KX-3GP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

12

C329

C329

DY

DY

SC10U25V0KX-3GP

SC10U25V0KX-3GP

26 58Thursday, October 02, 2008

26 58Thursday, October 02, 2008

26 58Thursday, October 02, 2008

C323

C323

of

of

of

SC10U25V6KX-1GP

SC10U25V6KX-1GP

A00

A00

A00

A

SSID = PWR.Plane.Regulator_3p3v5v

+PWR_SRC

4 4

5V_ALW +/- 5%
Design Current: 6A
Peak current 8.5A

9.35<OCP<12A

3 3

+5V_ALW

Vout1 = 0.7(Rtop/Rbottom + 1)

2 2

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 3.3UH PCMC063T3R3MN CYNTEC DCR 28~30mohm Isat =13.5Arms 68.3R310.20A
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
O/P cap: 150U 6.3V PSLB20J157M(45) 45mOhm 1.374rms NEC_TOKIN/77.C1571.09L
H/S: IRF8707 SO-8/ 14.2mohm/17.5mOhm@4.5Vgs/ 84.08707.037
L/S: FDS4712 SO-8/ 15mohm/18mOhm@4.5Vgs/ 84.04712.037

1 1

G19

G19

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G72

G72

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G33

G33

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G21

G21

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G36

G36

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G44

G44

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G45

G45

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G43

G43

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G48

G48

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G47

G47

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G46

G46

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PWR_SRC_17020

+5V_ALWP

+5V_ALWP

12

TC7

TC7

NEC 220uF
6D3V, V Size
ESR=25mohm

12

TC20

TC20

ST150U6D3VBM-1-GP

ST150U6D3VBM-1-GP

ST220U6D3VDM-15GP

ST220U6D3VDM-15GP

DY

DY

A

12

C424

C424

12

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

8778_FB1_1

12

DY

DY

12

MAX8778_3/5V_AGND

12

12

C421

C421

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

L15

L15

1 2

IND-3D3UH-57GP

IND-3D3UH-57GP

G41

G41
GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

R132

R132
0R2J-2-GP

0R2J-2-GP

R137

R137
0R0402-PAD

0R0402-PAD

A00.08/0903

PWR_SRC_17020

12

12

C148

C148

C422

C147

C147

SCD1U50V3KX-GP

SCD1U50V3KX-GP

C422

U15

U15

IRF8707PBF-GP

IRF8707PBF-GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SSS

SSS

123

12

R129

R129

DY

DY

2D2R5F-2-GP

2D2R5F-2-GP

5V_PHASE1_Sn

SSS

SSS

12

123

C176

C176

DY

DY

SC330P50V2KX-3GP

SC330P50V2KX-3GP

4/14 modify.
Add RC circuit for power sequence.

3V_5V_EN34

B

0.1uF for ISL6236,
Install with 1uF for
Max8778

CLOSE TO PIN 10

678

DDD

DDD

GD

GD

MAX8778_3/5V_AGND

4 5

678

DDD

DDD

U17

U17

AO4712-GP

AO4712-GP

GD

GD

4 5

A00.08/0903

R110 0R0402-PADR110 0R0402-PAD

1 2

R134 0R0402-PADR134 0R0402-PAD

1 2

A00.08/0903

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SKIPSEL

pulse-skipping

Operating

mode

Mode

CH1 Freq

CH2 Freq

LDOREFIN GND
Operating

Mode

FB1 GND
Operating

Mode

B

+5V_ALW2

1 2

12

C177

C177

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

PWR_SRC_17020

12

12

R399

R399

R397

R397

0R5J-5-GP

0R5J-5-GP

0R5J-5-GP

0R5J-5-GP

12

C169

C169

SCD1U50V3KX-GP

SCD1U50V3KX-GP

MAX8778_3/5V_AGND

+3.3V_RTC

270KR2F-GP

270KR2F-GP

GNDTONSEL
400kHz

500kHz

R391

R391

1 2

A00.08/0903

MAX8778_3/5V_AGND

C183

C183

12

SCD1U25V3KX-GP

SCD1U25V3KX-GP

17020_FB 17020_SKIP#
17020_ILIM1

R136

R136

1 2

3V_5V_POK
5V_EN

MAX8778_3/5V_AGND

17020_PHASE1

12

C179

C179

R135

R135

SCD1U25V3KX-GP

SCD1U25V3KX-GP

8778_BOOT1_1

1 2

0R3-0-U-GP

0R3-0-U-GP

+5V_ALW2

SC1U25V0KX-GP

SC1U25V0KX-GP

+5V_ALW2

R127

R127

1 2

A00.08/0903

3V_EN

5V_EN

12

12

C141

C141

C180

C180

DY

DY

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

GND

Open/REF (2V)
ultrasonic

mode

Open
(REF)

400kHz

300kHz

VCC

C165

C165

1 2

SC1U25V0KX-GP

SC1U25V0KX-GP

3V/5V_VIN

LDO_EN

0R0402-PAD

0R0402-PAD

U18

U18

33

GND

9

BYP

10

OUT1

11

FB1

12

ILIM1

13

PGOOD1

14

ON1

15

DH1

16

LX1

17020_BOOT1
17020_LGATE1

C172

C172

0R0402-PAD

0R0402-PAD

High
(VCC)

200kHz

300kHz

+3.3V_RTC

8

5

7

6

IN

RTC

LDO

LDOREFIN

MAX17020ETJ-GP

MAX17020ETJ-GP

BST117DL118VDD19SECFB20AGND21PGND22DL223BST2

8778_SECFB

MAX8778_3/5V_AGND

1 2

High
(VCC or 3.3V)

forced-PWM
operation

VLDOREFIN
= 0.5V

0.96/1.0/1.043.23/3.3/3.374.90/5.0/5.10

VCC

1.482/1.50/1.5184.925/5.00/5.075

No Install for ISL6236
Install 10 ohm for MAX8778

+5V_VCC1

R393

R393

10R3F-GP

10R3F-GP

+5V_VCC1

12

R387

R387

DY

DY

0R2J-2-GP

0R2J-2-GP

R114

R114

1 2

DY

DY

0R2J-2-GP

0R2J-2-GP

C146

C146

1 2

3V/5V_TON

SC1U25V0KX-GP

SC1U25V0KX-GP

3

1

4

REF

TON2VCC

ONLDO

G42

G42
GAP-CLOSE-PWR

GAP-CLOSE-PWR

REFIN2

ILIM2
OUT2
SKIP#

PGOOD2

ON2
DH2

LX2

24

17020_BOOT2
8778_LGATE2

1 2

17020_REFIN2

32

17020_ILIM2

31

17020_OUT2

30
29

3V_5V_POK

28

3V_EN

27

17020_UGATE2

26
25

1 2

REFIN2 5V
Operating

Mode

C

+2.0V_REF_3V5VREG

DY

DY

12

1 2

C155

C155

SC1U25V0KX-GP

SC1U25V0KX-GP

DY

DY

1 2

MAX8778_3/5V_AGND

17020_PHASE2

C149

C149

SCD1U25V3KX-GP

SCD1U25V3KX-GP

8778_BOOT2_1

R118

R118
0R3-0-U-GP

0R3-0-U-GP

C

+5V_VCC1

R113

R113

0R2J-2-GP

0R2J-2-GP

R107

R107

0R2J-2-GP

0R2J-2-GP

3V_5V_POK

12

R384

R384
0R0402-PAD

0R0402-PAD

A00.08/0902

R108

R108

1 2

237KR2F-GP

237KR2F-GP

12

+3.3V_RTC_LDO

1.038/1.050 /1.0623.255/3.30/3.345

MAX8778_3/5V_AGND

A00.08/0903

R106 0R0402-PADR106 0R0402-PAD

1 2

12

+5V_VCC1

DY

DY

PR19 0R2J-2-GP

PR19 0R2J-2-GP

MAX8778_3/5V_AGND MAX8778_3/5V_AGND

12

R109

R109
100KR2J-1-GP

100KR2J-1-GP

3V_5V_POK 24

RTC
(3.3V)

CLOSE TO PIN 30

12

C139

C139

SCD1U25V3KX-GP

SCD1U25V3KX-GP

+PWR_SRC

IRF8707PBF-GP

IRF8707PBF-GP

+5V_ALW2

D

PWR_SRC_17020

G17

G17

12

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G23

G23

12

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G63

G63

12

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G70

G70

12

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G68

G68

12

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G66

G66

12

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G64

G64

12

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PWR_SRC_17020

12

12

12

C85

AO4712-GP

AO4712-GP

C85

12

R86

R86

DY

DY

2D2R5F-2-GP

2D2R5F-2-GP

8778_PHASE2_Sn

12

C79

C79

DY

DY

SC330P50V2KX-3GP

SC330P50V2KX-3GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

L13

L13

1 2

IND-3D3UH-57GP

IND-3D3UH-57GP

678

DDD

DDD

U12

U12

SSS

GD

SSS

GD

123

4 5

678

DDD

DDD

U11

U11

SSS

GD

SSS

GD

123

4 5

12

C86

C86

C401

C401

SC10U25V6KX-1GP

SC10U25V6KX-1GP

DY

DY

SCD1U50V3KX-GP

SCD1U50V3KX-GP

+3.3V_ALWP

12

C402

C402

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

NEC 220uF
6D3V, V Size
ESR=25mohm

12

C397

C397

G18

G18

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

+3.3V_ALWP

12

TC2

TC2

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

ST220U6D3VDM-15GP

ST220U6D3VDM-15GP

Vout2 = Vref(Rrefin_top/Rrefin_bottom + 1)

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 3.3UH PCMC063T3R3MN CYNTEC DCR 28~30mohm Isat =13.5Arms 68.3R310.20A
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
O/P cap: 150U 6.3V PSLB20J157M(45) 45mOhm 1.374rms NEC_TOKIN/77.C1571.09L
H/S: IRF8707 SO-8/ 14.2mohm/17.5mOhm@4.5Vgs/ 84.08707.037
L/S: FDS4712 SO-8/ 15mohm/18mOhm@4.5Vgs/ 84.04712.037

+3.3V_RTC_LDO

U19

U19

1
2

12

C171

C171

SC1U10V3KX-3GP

SC1U10V3KX-3GP

D

G9091-330T11U-GP

G9091-330T11U-GP

VIN

VOUT
GND
EN3NC#4

5
4

12

C184

C184

SC1U10V3KX-3GP

SC1U10V3KX-3GP

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A2

A2

A2

Date: Sheet

Date: Sheet of

Date: Sheet of

E

3V_ALW +/- 5%
Design Current: 5.4A
Peak current 7.8A

8.58<OCP<10.92A

G30

G30

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G32

G32

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G31

G31

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G27

G27

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G26

G26

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G29

G29

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G25

G25

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G28

G28

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

DC to DC 3.3V/5V

DC to DC 3.3V/5V

DC to DC 3.3V/5V

Roberts

Roberts

Roberts

E

+3.3V_ALW

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

27 58Thursday, October 02, 2008

27 58Thursday, October 02, 2008

27 58Thursday, October 02, 2008

A00

A00

A00

5

4

3

2

1

SSID = CPU.Regulator

D D

DPRSLPVR9,18
H_DPRSTP#6,9,17

+3.3V_RUN

PR11 10KR2J-3-GP

PR11 10KR2J-3-GP

1 2

DY

DY

TP22TP22

CLK_EN#

10R3F-GP

10R3F-GP

+3.3V_RUN

R305

R305

R297 10KR2J-3-GPR297 10KR2J-3-GP

1 2

CPU_VID6

CPU_VID5

CPU_VID3

CPU_VID4

CPU_VID1

12

CPU_VID2

CPUCORE_ON 24

CPU_VID[6..0] 7

CPU_VID0

A00.08/0903 A00.08/0903

12

C337

C337

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+3.3V_RUN

12

R312

+1.05V_VCCP

12

C C

CPU_PROCHOT#5

R37 4K02R2F-GP

R37 4K02R2F-GP

Place close to
1st phase choke

SC100P50V2JN-3GP

SC100P50V2JN-3GP

B B

A A

68R2F-GP

68R2F-GP

1 2

DY

DY

C349

C349

1 2

R318

R318

1 2

97K6R2F-GP

97K6R2F-GP

R320

R320

1 2

100R2F-L1-GP-U

100R2F-L1-GP-U

R321

R321

1 2

1KR2F-3-GP

1KR2F-3-GP

VCC_SENSE7

VSS_SENSE7

5

R36

R36

VGATE_PWRGD18,24

DY

DY

C343 SCD01U50V2KX-1GP

C343 SCD01U50V2KX-1GP

1 2

DY

DY

6266A_VO

C350 SC1KP50V2KX-1GPC350 SC1KP50V2KX-1GP

1 2

R317

R317

1 2

8K25R2F-1-GP

8K25R2F-1-GP

C348

C348

1 2

SC270P50V2KX-1GP

SC270P50V2KX-1GP

C356

C356

1 2

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

PSI#6

C341

C341

1 2

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

R299 NTC-470K-1-GP

R299 NTC-470K-1-GP

1 2

DY

DY

1 2

R38 12K1R2F-L1-GPR38 12K1R2F-L1-GP

6266A_SOFT

1 2

0R2J-2-GP

0R2J-2-GP

1 2

0R2J-2-GP

0R2J-2-GP

R312

1K91R2F-1-GP

1K91R2F-1-GP

A00.08/0903

1 2
1 2

R315 4K99R2F-L-GPR315 4K99R2F-L-GP

1 2

R316 147KR2F-GPR316 147KR2F-GP

R329

R329

R330

R330

6266A_PSI# 6266A_UGATE1

R35

R35

0R0402-PAD

0R0402-PAD

6266A_PMON
6266A_RBIAS

6266A_NTC

C346

C346

6266A_SOFT

1 2

SCD015U50V3KX-GP

SCD015U50V3KX-GP

6266A_OCSET
6266A_VW
6266A_COMP
6266A_FB
6266A_FB2

12

R322

R322
1KR2F-3-GP

1KR2F-3-GP

1 2

DY

DY

PR12 1KR2J-1-GP

PR12 1KR2J-1-GP

SC330P50V2KX-3GP

SC330P50V2KX-3GP

SC330P50V2KX-3GP

SC330P50V2KX-3GP

4

U40

U40

1

PGOOD

2

PSI#

3

PMON

4

RBIAS

5

VR_TT#

6

NTC

7

SOFT

8

OCSET

9

VW

10

COMP

11

FB

12

FB2

C361

C361

C359

C359

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

6266A_CLK_EN#

6266A_3V3

49

48

3V3

GND

VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1

6266A_VDIFF

6266A_VSEN

12

12

C362

C362

1 2

1 2

R29 0R0402-PADR29 0R0402-PAD

R307 0R0402-PADR307 0R0402-PAD

6266A_DPRSTP#

46

47

CLK_EN#

DPRSTP#

6266A_RTN

12

C364

C364

12

1 2

1 2

R169 499R2F-2-GPR169 499R2F-2-GP

R308 0R0402-PADR308 0R0402-PAD

6266A_VRON

6266A_D6

6266A_DPRSLPVR

45

44

VR_ON

DPRSLPVR

ISL6266AHRZ-GP

ISL6266AHRZ-GP

74.06266.073

6266A_DROOP

6266A_DFB

12

R323 3K92R2F-GPR323 3K92R2F-GP

R327 1KR2F-3-GPR327 1KR2F-3-GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

1 2

1 2

1 2

R309 0R0402-PADR309 0R0402-PAD

R303 0R0402-PADR303 0R0402-PAD

R304 0R0402-PADR304 0R0402-PAD

6266A_D5

6266A_D4

43

6266A_VSUM

6266A_VIN

6266A_VO

12

PWR_SRC_CPU

12

12

C27 SCD22U10V2KX-1GPC27 SCD22U10V2KX-1GP

C20 SCD01U50V2KX-1GPC20 SCD01U50V2KX-1GP

1 2

1 2

R298 0R0402-PADR298 0R0402-PAD

6266A_D2

6266A_D3

6266A_VDD

12

R331 10R3F-GPR331 10R3F-GP

12

1 2

1 2

R301 0R0402-PADR301 0R0402-PAD

R310 0R0402-PADR310 0R0402-PAD

R313 0R0402-PADR313 0R0402-PAD

6266A_D0

6266A_D1

VID037VID138VID239VID340VID441VID542VID6

BOOT1
UGATE1
PHASE1

PGND1

LGATE1

LGATE2

PGND2
PHASE2
UGATE2

BOOT2

NC#25

24

6266A_ISEN1

6266A_ISEN2

R41

R41

1 2

10R3F-GP

10R3F-GP
C28

C28
SC1U10V3KX-3GP

SC1U10V3KX-3GP

3

PVCC

36
35
34
33
32

+5V_RUN

31
30
29
28
27
26
25

+5V_RUN

6266A_BOOT2

C18

C18
SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

1 2

6266A_VO

C19

C19
SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

1 2

R314

R314

1 2

1R3F-GP

1R3F-GP

R319

R319

1 2

1R3F-GP

1R3F-GP

C339

C339

SCD22U25V3KX-GP

SCD22U25V3KX-GP

C345

C345

1 2

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

C351

C351

1 2

SCD22U25V3KX-GP

SCD22U25V3KX-GP

6266A_ISEN1 29

6266A_VO 29

6266A_ISEN2 29

R324

R324

1 2

0R0402-PAD

0R0402-PAD

12

6266AGND

6266A_PHASE1

6266A_PHASE1

6266A_ LGATE1

6266A_LGATE2

6266A_PHASE2
6266A_UGATE2
6266A_PHASE2

2

6266A_PHASE1 29
6266A_UGATE1 29

6266A_ LGATE1 29

6266A_LGATE2 29

6266A_UGATE2 29
6266A_PHASE2 29

6266A_VSUM29

6266A_VSUM

6266A_VO

C358

C358

1 2

SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

12

C360

C360

SCD047U10V2KX-2GP

SCD047U10V2KX-2GP

12

R328

R328

11KR2F-L-GP

11KR2F-L-GP

12

R332

R332
2K61R2F-1-GP

2K61R2F-1-GP

12

R300

R300
NTC-10K-9-GP

NTC-10K-9-GP

Place close to 1st Choke

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

CPU VCORE POWER(1/2)

CPU VCORE POWER(1/2)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

CPU VCORE POWER(1/2)

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

28 58Thursday, October 02, 2008

28 58Thursday, October 02, 2008

28 58Thursday, October 02, 2008

1

of

of

of

A00

A00

A00

5

SSID = CPU.Regulator

4

3

2

1

AOL1426-GP

AOL1426-GP

6266A_PHASE1

AOL1412-GP

AOL1412-GP

6266A_ LGATE1

PWR_SRC_CPU

U42

U42

AOL1426-GP

AOL1426-GP

PWR_SRC_CPU

678

DDD

DDD

U39

U39

GD

GD

4 5

678

DDD

DDD

U38

U38

GD

GD

4 5

6266A_VSUM
6266A_ISEN1

6266A_VO
6266A_ISEN2

678

DDD

DDD

SSS

GD

SSS

GD

123

4 5

678

DDD

DDD

U3

U3

SSS

GD

SSS

GD

SSS

SSS

123

SSS

SSS

123

R42 3K65R2F-1-GPR42 3K65R2F-1-GP
R39 10KR2F-2-GPR39 10KR2F-2-GP

R43 1R2F-GPR43 1R2F-GP
R40 10KR2F-2-GPR40 10KR2F-2-GP

123

4 5

678

DDD

DDD

SSS

GD

SSS

GD

123

4 5

1 2
1 2

1 2
1 2

678

DDD

DDD

SSS

GD

SSS

GD

123

4 5

AOL1426-GP

AOL1426-GP

U2

U2
AOL1412-GP

AOL1412-GP

U5

U5
AOL1426-GP

AOL1426-GP

12

C1

C1

SC10U25V6KX-1GP

SC10U25V6KX-1GP

12

12

12

1 2

68.R3610.20C

G52

G52

C354

C354

C333

C333

SC10U25V6KX-1GP

SC10U25V6KX-1GP

L8

L8

IND-D36UH-9-GP

IND-D36UH-9-GP

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

12

C22

C22

12

C2

C2

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

DY

DY

12

G53

G53

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

12

C355

C355

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SC10U25V6KX-1GP

12

C4

C4

SCD1U25V3KX-GP

SCD1U25V3KX-GP

12

TC14

TC14

SE330U2VDM-L-GP

SE330U2VDM-L-GP

12

C23

C23

SC10U25V6KX-1GP

SC10U25V6KX-1GP

12

C335

C335

SCD1U25V3KX-GP

SCD1U25V3KX-GP

+VCC_CORE

12

TC1

TC1

SE330U2VDM-L-GP

SE330U2VDM-L-GP

12

C334

C334

SCD1U25V3KX-GP

SCD1U25V3KX-GP

12

C21

C21

12

TC16

TC16

12

C353

C353

PWR_SRC_CPU+PWR_SRC

G10

G10

D D

C C

B B

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G5

G5

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G2

G2

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G1

G1

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G4

G4

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G3

G3

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G9

G9

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G8

G8

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G7

G7

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G6

G6

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

6266A_UGATE128

6266A_PHASE128

6266A_ LGATE128

6266A_UGATE1

6266A_VSUM28
6266A_ISEN128

6266A_VO28
6266A_ISEN228

+PWR_SRC

SCD1U25V3KX-GP

SCD1U25V3KX-GP

SE330U2VDM-L-GP

SE330U2VDM-L-GP

SCD1U25V3KX-GP

SCD1U25V3KX-GP

12

TC10

TC10
SE100U25VM-14GP

SE100U25VM-14GP

DY

DY

CPU noise

12

PTC3

PTC3
SE100U25VM-14GP

SE100U25VM-14GP

DY

DY

6266A_UGATE228

6266A_PHASE228

6266A_LGATE228

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 0.36UH PCMC104T-R36MN1R05J CYNTEC DCR 1.05(+5%~-5%)mohm

A A

Isat =60Arms 68.R3610.20C
O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3.0Arms Panasonic/79.33719.L01
H/S: AOL1426 PowerPAK/ 10.2mohm/12.5mOhm@4.5Vgs/84.01426.037
L/S: AOL1412 PowerPAK/ 3.8mohm/4.65mOhm@4.5Vgs/ 84.01412.037

5

4

6266A_UGATE2

6266A_PHASE2

U6

U6

AOL1412-GP

AOL1412-GP

6266A_LGATE2

6266A_VSUM
6266A_ISEN2

6266A_VO
6266A_ISEN1

678

DDD

DDD

SSS

GD

SSS

GD

4 5

GD

GD

123

4 5

R333 3K65R2F-1-GPR333 3K65R2F-1-GP

1 2

R325 10KR2F-2-GPR325 10KR2F-2-GP

1 2

R334 1R2F-GPR334 1R2F-GP

1 2

R326 10KR2F-2-GPR326 10KR2F-2-GP

1 2

678

DDD

DDD

U43

U43
AOL1412-GP

AOL1412-GP

SSS

SSS

123

3

L10

L10

1 2

IND-D36UH-9-GP

IND-D36UH-9-GP

68.R3610.20C

12

G54

G54

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

12

G55

G55

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

+VCC_CORE

12

TC15

TC15

SE330U2VDM-L-GP

SE330U2VDM-L-GP

2

12

TC13

TC13

SE330U2VDM-L-GP

SE330U2VDM-L-GP

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

CPU VCORE POWER(2/2)

CPU VCORE POWER(2/2)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

CPU VCORE POWER(2/2)

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

29 58Thursday, October 02, 2008

29 58Thursday, October 02, 2008

29 58Thursday, October 02, 2008

1

of

of

of

A00

A00

A00

5

4

3

2

1

12

C125

C125

SC10U25V6KX-1GP

SC10U25V6KX-1GP

L14

L14

12KR2F-L-GP

12KR2F-L-GP

+1.05V_VFB

30KR2F-GP

30KR2F-GP

+1.05V_RUNP

12

C411

C411

R353

R353

R352

R352

SSID = PWR.Plane.Regulator_1p05v

D D

+PWR_SRC +1.05V_PWR_SRC

G15

G15

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G14

G14

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G13

G13

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G12

G12

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G16

G16

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

C C

C400

C400

SC1U10V3KX-3GP

SC1U10V3KX-3GP

+5V_ALW

D21

D21
CH551H-30PT-GP

CH551H-30PT-GP

2 1

R355 100KR2J-1-GPR355 100KR2J-1-GP

PM_SLP_S3#18,24,25,31,32,34,41

RT: Non_ASM

B B

TI: ASM

1 2

R363 200KR2J-L1-GPR363 200KR2J-L1-GP

1 2

+1.05V_PWR_SRC

12

D23

D23

PR13

PR13

1 2

DY

DY

1M1R2J-GP

1M1R2J-GP

TI: Non_ASM
RT :ASM

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

+5V_ALW

21

G60

G60

1 2

G59

G59

1 2

G61

G61

1 2

G62

G62

1 2

G58

G58

1 2

12

12

CH751H-40PT

CH751H-40PT

12

+1.05V_PWR_SRC+PWR_SRC

R364

R364
300R3-GP

300R3-GP

C396

C396
SC1U10V3KX-3GP

SC1U10V3KX-3GP

+1.05V_V5FILT

+1.05V_VBST
+1.05V_VFB

+1.05V_EN
+1.05V_TON

+1.05V_TRIP

12

C378

C378

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

RT: Non_ASM
TI: ASM

12

R366

R366

DY

DY

6K19R2D-1-GP

6K19R2D-1-GP

H/S: IRF8707 SO-8/

14.2mohm/17.5mOhm@4.5Vgs

84.08707.037

IRF8707PBF-GP

C398

R365

R365

0R3-0-U-GP

0R3-0-U-GP

U49

U49

4

V5FILT

10

V5DRV

14

VBST

5

VFB

1

EN_PSV

2

TON

11

TRIP

TPS51117PWR-GP

TPS51117PWR-GP

PR15

PR15
17K4R3F-GP

17K4R3F-GP

TI: Non_ASM
RT :ASM

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 1.0UH PCMC104T1R0MN Cyntec DCR:3.0 ~3.5mohm Isat =40Arms 68.1R01A.20A
O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L
H/S: IRF8707 SO-8/14.2mohm/17.5mOhm@4.5Vgs/ 84.08707.037
L/S: FDS8672S SO-8/ 5.3mOhm/7.0mohm@4.5Vgs/ 84.08672.A37
Switching freq-->350KHz

+1.05V_LL

DRVH

DRVL

VOUT

PGOOD

PGND

GND

+1.05V_LL1

12

+1.05V_DRVH

13

+1.05V_LL

12

LL

+1.05V_DRVL

9

+1.05V_VOUT

3
6

7
8

C398

1 2

SCD1U25V3KX-GP

SCD1U25V3KX-GP

RUNPWROK 24,31,32

R358

R358

1 2

100KR2J-1-GP

100KR2J-1-GP

D19

D19

2

3

1

BAW56-2-GP

BAW56-2-GP

+3.3V_RUN

+5V_RUN

PM_SLP_S3#

L/S: FDS8672S SO-8

5.3mOhm/7.0mohm@4.5Vgs

84.08672.A37

IRF8707PBF-GP

FDS8672S-GP

FDS8672S-GP

+1.05V_PWR_SRC

678

DDD

DDD

U13

U13

GD

GD

4 5

678

D

DG

D

DG

U51

U51

4 5

SSS

SSS

123

DSD S

DSD S

S

S

123

12

678

DDD

DDD

U50

U50

SSS

GD

SSS

GD

IRF8707PBF-GP

IRF8707PBF-GP

123

4 5

678

D

DG

DSD S

D

DG

DSD S

DY

DY

U16

U16

S

S

FDS8672S-GP

FDS8672S-GP

123

4 5

DY

DY

C412

C412

SC10U25V6KX-1GP

SC10U25V6KX-1GP

1 2

COIL-1UH-33-GP

COIL-1UH-33-GP

12

R388

R388
2D2R5F-2-GP

2D2R5F-2-GP

12

C429

C429
SC330P50V3KX-GP

SC330P50V3KX-GP

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

12

C120

C120

SC10U25V6KX-1GP

SC10U25V6KX-1GP

G35

G35

12

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

+1.05V_VOUT

12

12

G67

G67

12

G74

G74

12

G71

G71

12

G75

G75

12

G20

G20

12

G37

G37

12

G22

G22

12

G65

G65

12

12

C121

C121

DY

DY

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

+1.05V_SUSP+/- 5%
Design Current: 14.3A
Peak current 20.4A

22.44<OCP<28.5

+1.05V_RUNP

12

C413

C413

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

Vout=0.75V*(R1+R2)/R2

12

C382

C382

DY

DY

SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

12

TC6

TC6

ST330U2D5VDM-13GP

ST330U2D5VDM-13GP

+1.05V_RUNP+1.05V_VCCP

12

TC5

TC5

ST330U2D5VDM-13GP

ST330U2D5VDM-13GP

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

G69

G69

G73

G73

G76

G76

G24

G24

G34

G34

G38

G38

G39

G39

G40

G40

+1.05V_VCCP

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

DC to DC 1.05V

DC to DC 1.05V

DC to DC 1.05V

Roberts

Roberts

Roberts

30 58Thursday, October 02, 2008

30 58Thursday, October 02, 2008

30 58Thursday, October 02, 2008

1

of

of

of

A00

A00

A00

5

4

SSID = PWR.Plane.Regulator_1p8v0p9v

3

2

1

TI TPS51116 for 1.8V and 0.9V

D D

PR2

RT: Non_ASM
TI: ASM

+5116_PWR_SRC

RUNPWROK24,30,32

1STTI2ND

C C

PR7

RT

Non_ASM ASM

+5V_ALW

+1.8V_SUS_P

+3.3V_ALW

PR6

PR6
20KR2F-L-GP

20KR2F-L-GP

DY

DY

1 2

PR7 619KR2F-GP

PR7 619KR2F-GP

1 2

RT

RT

+1.8V_SUS_P

PR16 1M1R2J-GP

PR16 1M1R2J-GP

1 2

DY

DY

PR14 0R0402-PADPR14 0R0402-PAD

1 2

A00.08/0903

SC1KP50V2KX-1GP

+0D9V_DDR_P

+0D9V_DDR_P

B B

12

12

PC3

PC3

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

PC5

PC5

PC4

PC4

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC1KP50V2KX-1GP

12

PC6

PC6

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

State S3 S5 VDDR VTTREF VTT

On

Hi Hi

S0
S3

S4/S5

A A

HiLo

Lo Lo

On

On

On

Off Off Off

VDDQSET VDDQ (V) VTTREF and VTT NOTE

GND

V5IN

FB Resistors

2.5

1.8

Adjustable

5

VVDDQSNS/2

VVDDQSNS/2

VVDDQSNS/2

PR2

1 2

9K31R2F-GP

9K31R2F-GP

1 2

PC7

PC7

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

PM_SLP_S4#18,24,41

PC2

PC2

SC1U10V3KX-3GP

SC1U10V3KX-3GP

PC17

PC17

DY

DY

1 2

+0D9V_DDR_P

On

Off(Hi-Z)

51116_VDD

0D9V_EN

12

+0.9V_DDR_VTT

PG2

PG2

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG1

PG1

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

DDR

DDR2

1.5 V < VVDDQ < 3 V

+5V_ALW

12

PC9

PC9

SC1U10V3KX-3GP

SC1U10V3KX-3GP

16

ILIM

13

PGD

12

NC#12

11

EN/PSV

10

VTTEN

23

VTTIN

7

NC#7

TPS51116RGER-GP-U

TPS51116RGER-GP-U

1

PGND2

4

TON

24

VTT

2

VTTS

VSSA

GND

3

25

12

PR4

PR4
5D1R3J-GP

5D1R3J-GP

15

14

VDDP

PGND1
PGND1

VDDQS

5

12

VDDP

VCCA

REF

1 2

0R0603-PAD

0R0603-PAD

+5V_ALW

12

PC16

PC16

SC1U10V3KX-3GP

SC1U10V3KX-3GP

PU1

PU1

TPS51116_VBST1

22

BST

TPS51116_UGT

21

DH

TPS51116_PHS

20

LX

TPS51116_LGT

19

DL

18
17

8
9

FB

6

+V_DDR_MCH_REF

PR3

PR3

PC8

PC8
SCD033U16V3KX-GP

SCD033U16V3KX-GP

PR1

PR1

1 2

0R3-0-U-GP

0R3-0-U-GP

TPS51116_VDDQSNS
51116_VDDQSET

+5V_ALW

0R2J-2-GP

0R2J-2-GP

12

PC10

PC10

DY

DY

SC1U10V3KX-3GP

SC1U10V3KX-3GP

TPS51116_VBST

PR17

PR17

1 2

+5V_ALW

PD1

PD1

DY

DY

CH551H-30PT-GP

CH551H-30PT-GP

2 1

+5116_PWR_SRC

678

DDD

DDD

PU2

PU2

FDS8880-NL-GP

FDS8880-NL-GP

SSS

GD

SSS

GD

123

4 5

TPS51116_UGT
TPS51116_VBST TPS51116_PHS

TPS51116_LGT

1 2

PC1

PC1

SCD1U25V3KX-GP

SCD1U25V3KX-GP

U14

U14

FDS8672S-GP

FDS8672S-GP

678

D

DG

DSD S

D

DG

DSD S

S

S

123

4 5

4/14 modify.
Add RC circuit for power sequence.

PC12

PC12

1 2

SC10U25V6KX-1GP

SC10U25V6KX-1GP

IND-1D5UH-23-GP

IND-1D5UH-23-GP

12

PR10

PR10

DY

DY

2D2R5F-2-GP

2D2R5F-2-GP

TPS51116_PHS_SET

12

DY

DY

PC13

PC13
SC330P50V3KX-GP

SC330P50V3KX-GP

Close to VFB Pin (pin5)

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 1.5UHPCMC063T-1R5MN Cyntec DCR:14~15mohm Isat =18Arms 68.1R510.10K
O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L
H/S: FDS8880 SO-8/9.6mohm/ 12mOhm@4.5Vgs/ 84.08880.037
L/S: FDS8672S SO-8/ 5.3mOhm/7.0mohm@4.5Vgs/ 84.08672.A37
Switching freq-->400KHz

4

3

PC19

PC19

1 2

SC10U25V6KX-1GP

SC10U25V6KX-1GP

PL1

PL1

1 2

TPS51116_VDDQSNS

51116_VDDQSET

PM_SLP_S3#18,24,25,30,32,34,41
PM_SLP_S4#18,24,41

PC18

PC18

1 2

SCD1U50V3KX-GP

SCD1U50V3KX-GP

PR5

PR5

42K2R2F-L-GP

42K2R2F-L-GP

PR18

PR18

30KR2F-GP

30KR2F-GP

A00.08/0903

PR9 0R0402-PADPR9 0R0402-PAD

1 2

PR8 0R2J-2-GP

PR8 0R2J-2-GP

1 2

+PWR_SRC

12

PC20

PC20

SC4D7U25V5KX-GP

SC4D7U25V5KX-GP

PG18

PG18

1 2

GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

12

12

DY

DY

DY

DY

12

DY

DY

2

0D9V_EN

0D9V_EN

DY

DY

+5116_PWR_SRC

PG6

PG6

12

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG4

PG4

12

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG7

PG7

12

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG5

PG5

12

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG3

PG3

12

GAP-CLOSE-PWR

GAP-CLOSE-PWR

12

12

PC14

PC14

PC15

PC15

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

PC11

PC11
SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

12

C89

C89

DY

DY

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

+1.8V_SUS +/- 5%
Design Current: 9.7A
Peak current 13.9A

15.29<OCP<19.46A

+1.8V_SUS_P

12

12

PTC2

PTC2

PTC1

PTC1

DY

DY

ST330U2D5VDM-13GP

ST330U2D5VDM-13GP

ST330U2D5VDM-13GP

ST330U2D5VDM-13GP

DC to DC 1.8V/0.9V

DC to DC 1.8V/0.9V

DC to DC 1.8V/0.9V

+1.8V_SUS_P

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

1

PG8

PG8

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG10

PG10

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG14

PG14

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG13

PG13

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG12

PG12

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG11

PG11

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG9

PG9

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG15

PG15

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG16

PG16

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

PG17

PG17

1 2

GAP-CLOSE-PWR

GAP-CLOSE-PWR

of

of

of

31 58Thursday, October 02, 2008

31 58Thursday, October 02, 2008

31 58Thursday, October 02, 2008

+1.8V_SUS

A00

A00

A00

5

4

3

2

1

SSID = PWR.Plane.Regulator_1p5v

D D

Change from +5V_RUN to +5V_ALW,
please confrim it is okay.

+1.8V_SUS+5V_ALW

1D5V_SB

SC1U10V3KX-3GP

SC1U10V3KX-3GP

C C

Vo=0.8*(1+(R1/R2))

RUNPWROK24,30,31

C216

C216

DY

DY

1D5V_EN

12

PM_SLP_S3#18,24,25,30,31,34,41

1 2

R189 2K2R2J-2-GPR189 2K2R2J-2-GP

SC4700P50V2KX-1GP

SC4700P50V2KX-1GP

12

C208

C208

U21

U21

7

POK

8

EN

APL5912-KAC-GP

APL5912-KAC-GP

6

VCNTL

VOUT
VOUT

GND

1

VIN
VIN

FB

SO-8-P

5
9

3
4

2

12

C205

C205
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

R176

R176

1KR2F-3-GP

1KR2F-3-GP

12

R184

R184
1K13R2F-1-GP

1K13R2F-1-GP

12

C206

C206

DY

DY

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

+1.5V_RUN

TC22

TC22

12

12

C212

C212

SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

DY

DY

ST100U6D3VBM-5GP

ST100U6D3VBM-5GP

NEC_TOKIN
100uF, 6.3V, B2 Size
Iripple=1.374A, ESR=45mohm

+1.5V_RUN +/- 5%
Design Current: 2.5A
Peak current 3.5A

TC23

TC23

12

ST100U6D3VBM-5GP

ST100U6D3VBM-5GP

B B

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

DC to DC 1.5V

DC to DC 1.5V

DC to DC 1.5V

Roberts

Roberts

Roberts

32 58Thursday, October 02, 2008

32 58Thursday, October 02, 2008

32 58Thursday, October 02, 2008

1

of

of

of

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

VGA Power

VGA Power

VGA Power

Roberts

Roberts

Roberts

1

of

of

of

33 58Tuesday, September 09, 2008

33 58Tuesday, September 09, 2008

33 58Tuesday, September 09, 2008

A00

A00

A00

5

4

3

2

1

SSID = Reset.Suspend

H_THRMTRIP# 5,9,17,24

D D

H_PWRGOOD6,17

3V_5V_EN27

12

R160

R160

DY

DY

200KR2J-L1-GP

200KR2J-L1-GP

C C

R161

R161

1 2

DY

DY

1KR2J-1-GP

1KR2J-1-GP

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

2

BAS16-1-GP

BAS16-1-GP

1

R168 1KR2J-1-GPR168 1KR2J-1-GP

H_PWRGD_R

D10

D10

1 2

C198

C198

3

DY

DY

12

B

DY

DY

E

C

Q8

Q8

CHT2222APT-GP

CHT2222APT-GP

PURE_HW_SHUTDOWN# 24,25

S5_ENABLE 24

Run Power

+5V_RUN

C534

C534

12

DY

B B

A A

5

+PWR_SRC

1 2

R460

R460

R458 330KR2F-L-GPR458 330KR2F-L-GP

PM_SLP_S3#18,24,25,30,31,32,41

Z_12V

10KR2J-3-GP

10KR2J-3-GP

NDS0610-NL-GP

NDS0610-NL-GP

84.S0610.B31

84.S0610.B31

Z_12V_G3

12

100KR2J-1-GP

100KR2J-1-GP

Q22

Q22

S D

G

12

R459

R459

Z_12V_D3

G

S D

4

G

Q21

Q21
2N7002-7F-GP

2N7002-7F-GP

Q23

Q23
2N7002-7F-GP

2N7002-7F-GP

S D

RUN_POWER_ON

12

R281

R281

100KR2J-1-GP

100KR2J-1-GP

SCD1U25V3KX-GP

SCD1U25V3KX-GP

D16

D16
BZX384-C9V1-GP

BZX384-C9V1-GP

DY

DY

A K

DY

R275 10KR2J-3-GPR275 10KR2J-3-GP

R273 10KR2J-3-GPR273 10KR2J-3-GP

3

1 2

12

+3.3V_RUN

1 2

12

U30

U30

S

S

1

S

S

2

S

S

3

GD

GD

4 5

AO4468-GP

AO4468-GP

C314

C314
SC6800P25V2KX-1GP

SC6800P25V2KX-1GP

U31

U31

S

S

1

S

S

2

S

S

3

GD

GD

4 5

AO4468-GP

AO4468-GP

C316

C316
SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

+5V_ALW

D

D

8

D

D

7

D

D

6

+3.3V_ALW

D

D

8

D

D

7

D

D

6

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Power Plane Enable

Power Plane Enable

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Power Plane Enable

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

34 58Thursday, October 02, 2008

34 58Thursday, October 02, 2008

34 58Thursday, October 02, 2008

1

A00

A00

A00

of

of

of

SSID = VIDEO

SSID = Inverter

LVDS CONNECTOR

LCD1

LCD1

49
47

46

45

44

43

42

41
48

IPEX-CONN40-2R-GP

IPEX-CONN40-2R-GP

20.F1093.040

20.F1093.040

GFX_PWR_SRC +LCDVDD

51
40
39
38
37
36
35
34

LCD_BRIGHTNESS

33
32
31
30
29
28

LCD_TST

27

LDDC_CLK

26

LDDC_DATA

25

LCD_DET_G

24

VGA_TXBOUT0-

23

VGA_TXBOUT0+

22
21

VGA_TXBOUT1-

20

VGA_TXBOUT1+

19
18

VGA_TXBOUT2-

17

VGA_TXBOUT2+

16
15

VGA_TXBCLK-

14

VGA_TXBCLK+

13
12

VGA_TXAOUT0-

11

VGA_TXAOUT0+

10
9

VGA_TXAOUT1-

8

VGA_TXAOUT1+

7
6

VGA_TXAOUT2-

5

VGA_TXAOUT2+

4
3

VGA_TXACLK-

2

VGA_TXACLK+

1
50

12

+3.3V_RUN

LCD_CBL_DET# 24

BLON_OUT 24

LCD_TST 24
LDDC_CLK 13
LDDC_DATA 13

VGA_TXBOUT0- 13
VGA_TXBOUT0+ 13

VGA_TXBOUT1- 13
VGA_TXBOUT1+ 13

VGA_TXBOUT2- 13
VGA_TXBOUT2+ 13

VGA_TXBCLK- 13
VGA_TXBCLK+ 13

VGA_TXAOUT0- 13
VGA_TXAOUT0+ 13

VGA_TXAOUT1- 13
VGA_TXAOUT1+ 13

VGA_TXAOUT2- 13
VGA_TXAOUT2+ 13

VGA_TXACLK- 13
VGA_TXACLK+ 13

1

AFTP5AFTP5

12

EC22

EC22

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

C76

C76

SC1U10V3KX-3GP

SC1U10V3KX-3GP

R73

R73

1 2

100R2F-L1-GP-U

100R2F-L1-GP-U

+3.3V_RUN

12

DY

DY

R75

R75
10KR2J-3-GP

10KR2J-3-GP

D7

D7

K A

DY

DY

RB551V30-GP

RB551V30-GP
R81

R81

1 2

0R0402-PAD

0R0402-PAD

VGA_TXBOUT0­VGA_TXBOUT0+
VGA_TXBOUT1­VGA_TXBOUT1+
VGA_TXBOUT2­VGA_TXBOUT2+
VGA_TXBCLK­VGA_TXBCLK+

INVERTER POWER

GFX_PWR_SRC +PWR_SRC

F1

F1

LBKLT_CTL 13

BRIGHTNESS 24

LCD_BRIGHTNESS
LCD_TST

12

12

EC87

EC87

EC19

DY

1

AFTP1AFTP1

1

AFTP3AFTP3

1

AFTP2AFTP2

1

AFTP4AFTP4

1

AFTP7AFTP7

1

AFTP6AFTP6

1

AFTP9AFTP9

1

AFTP8AFTP8

DY

EC19

DY

DY

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC33P50V2JN-3GP

For EMI request

SSID = VIDEO

12

C68

C68

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

C69

C69
SCD1U50V3KX-GP

SCD1U50V3KX-GP

1 2

12

FUSE-3A32V-7-GP

FUSE-3A32V-7-GP

LCD POWER

+3.3V_RUN+LCDVDD

VGA_TXBCLK­VGA_TXBCLK+

VGA_TXAOUT0-

VGA_TXAOUT1­VGA_TXAOUT1+

VGA_TXAOUT2­VGA_TXAOUT2+

VGA_TXACLK­VGA_TXACLK+

VGA_TXBOUT0­VGA_TXBOUT0+

VGA_TXBOUT1­VGA_TXBOUT1+

VGA_TXBOUT2­VGA_TXBOUT2+

DY

DY

12

EC30

EC30

12

12

EC29

EC29

DY

DY

DY

DY

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

12

EC36

EC36

EC35

EC35

DY

DY

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

12

12

EC39

EC39

DY

DY

DY

DY

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

12

EC40

EC40

EC26

EC26

DY

DY

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

DY

DY

12

EC25

EC25

12

12

EC24

EC24

DY

DY

DY

DY

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

12

EC23

EC23

EC28

EC28

DY

DY

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

DY

DY

12

EC27

EC27

12

12

EC21

EC21

DY

DY

DY

DY

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

12

12

EC20

EC20

EC38

EC38

DY

DY

DY

DY

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

For EMI request

EC37

EC37

SC5D6P50V2CN-1GP

SC5D6P50V2CN-1GP

U48

D20

D20

LCDVDD_EN13

LCD_TST_EN24

1

2

BAT54CPT-GP

BAT54CPT-GP

R508

R508

ENVDD_DVGA_TXAOUT0+

3

1 2

49K9R2F-L-GP

49K9R2F-L-GP

12

R359

R359

49K9R2F-L-GP

49K9R2F-L-GP

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

Custom

Custom

Custom

ENVDD

12

U48

1

IN#1

2

OUT

3

EN

4

GND

G5281RC1U-GP

G5281RC1U-GP

C392

C392

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

LCD/Inverter Connector

LCD/Inverter Connector

LCD/Inverter Connector

Roberts

Roberts

Roberts

9

GND

8

IN#8

7

IN#7

6

IN#6

5

IN#5

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

of

of

35 58Thursday, October 02, 2008

35 58Thursday, October 02, 2008

35 58Thursday, October 02, 2008

12

C73

C73

SC1U10V3KX-3GP

SC1U10V3KX-3GP

A00

A00

A00

SSID = SATA

SATA HDD Connector

+5V_ALW

12

R462

R462
100KR2J-1-GP

100KR2J-1-GP

DY

DY

HDD_5V_EN_R

U57

U57

6
5

DY

DY

2N7002SPT

2N7002SPT

SSID = SATA

+5V_ALW

12

R251

R251
100KR2J-1-GP

100KR2J-1-GP

DY

DY

ODD_5V_EN_R

U28

U28

6
5

DY

DY

2N7002SPT

2N7002SPT

RUN_POWER_ON

12

R457

R457

100KR2J-1-GP

100KR2J-1-GP

DY

DY

1
2
34

1
2
34

HDD_5V_EN 24

HDD_5V_EN 24

ODD_PWR_EN

12

C295

C295

DY

DY

SCD1U25V3KX-GP

SCD1U25V3KX-GP

RUN_POWER_ON

R252

R252

100KR2J-1-GP

100KR2J-1-GP

HDD_PWR_EN

12

C527

C527

DY

DY

SCD1U25V3KX-GP

SCD1U25V3KX-GP

12

DY

DY

12

DY

DY

C293

C293
SC4700P50V2KX-1GP

SC4700P50V2KX-1GP

Q20

Q20

1

2

3 4

DY

DY

FDC655BN-GP

FDC655BN-GP

U58

U58

8

D

D

7

D

D

6

D

D

DY

DY

SI4800BDY-T1

SI4800BDY-T1

12

R255

R255
100KR2J-1-GP

100KR2J-1-GP

DY

DY

+5V_HDD+5V_RUN

6

5

+5V_MOD+5V_RUN

1

S

S

2

S

S

3

S

S

45

GD

GD

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

GAP-CLOSE-PWR

+5V_RUN

G81

G81

12

G82

G82

12

+5V_RUN

G83 GAP-CLOSE-PWRG83 GAP-CLOSE-PWR
G84 GAP-CLOSE-PWRG84 GAP-CLOSE-PWR
G85 GAP-CLOSE-PWRG85 GAP-CLOSE-PWR
G86 GAP-CLOSE-PWRG86 GAP-CLOSE-PWR

12
12
12
12

+3.3V_RUN

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

+5V_HDD

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C508

C508

C289

C289

AFTP12AFTP12
AFTP14AFTP14
AFTP13AFTP13
AFTP16AFTP16
AFTP15AFTP15
AFTP17AFTP17

SATA_TXN117
SATA_TXP117

SATA_RXN1_C17
SATA_RXP1_C17

12

12

C498

C498

DY

DY

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

12

C277

C277
SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

AFTP11AFTP11

+3.3V_RUN

1

+5V_HDD

1

SATA_RXP0

1

SATA_RXN0

1

SATA_TXN0

1

SATA_TXP0

1

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

C469 SCD01U50V2KX-1GPC469 SCD01U50V2KX-1GP
C467 SCD01U50V2KX-1GPC467 SCD01U50V2KX-1GP

SATA_RX- and SATA_RX+ Trace
Length match within 20 mil

1

C455

C455

12
12

NP1
NP2

+5V_MOD

12

1A
2A
3A

7A
8A
9A

13A
14A
15A

11A

HDD1

HDD1

V33
V33
V33

V5
V5
V5

V12
V12
V12

RESERVED#11A
NP1

NP2

SKT-SATA15P+S7-1-GP

SKT-SATA15P+S7-1-GP

20.81107.022

20.81107.022

ODD Connector

12

C452

C452

SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

SATA_RX1-_C
SATA_RX1+_C

GND
GND
GND
GND
GND
GND
GND
GND
GND
GND

S2

A+

S3

A-

S6

B+

S5

B-

S1
S4
S7
4A
5A
6A
10A
12A
1
2

SATA_RXP0
SATA_RXN0

1

ODD1

ODD1

P3

+5V

P2

+5V

S3

TX-

S2

TX+

S5

RX-

S6

RX+

NP1

NP1

NP2

NP2

SKT-SATA7P+6P-40-GP

SKT-SATA7P+6P-40-GP

22.10300.271

22.10300.271

C254 SC3900P50V2KX-2GPC254 SC3900P50V2KX-2GP

12

C250 SC3900P50V2KX-2GPC250 SC3900P50V2KX-2GP

12

AFTP10AFTP10

P1

DETECT

GND
GND
GND
GND
GND
GND
GND

MD

ODD_MD

P4

P5
P6
S1
S4
S7
8
9

1

AFTP18AFTP18

1

AFTP19AFTP19

+5V_MOD
SATA_TXN1
SATA_TXP1
SATA_RX1-_C
SATA_RX1+_C

SATA_TXP0 17
SATA_TXN0 17

SATA_RXP0_C 17

SATA_RXN0_C 17

1

AFTP20AFTP20

1

AFTP21AFTP21

1

AFTP22AFTP22

1

AFTP24AFTP24

1

AFTP23AFTP23

SSID = Thermal

Fan Connector

FAN1

FAN1

4

EMC2102_FAN_TACH_125

EMC2102_FAN_DRIVE25

EMC2102_FAN_TACH_1

EMC2102_FAN_DRIVE

C16

SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

C16

AFTP25AFTP25

*Layout* 15 mil

KA

12

D4

D4
RB551V30-GP

RB551V30-GP

1

3
2

1

5

MLX-CON3-6-GP-U

MLX-CON3-6-GP-U

20.F0700.003

20.F0700.003

AFTP26AFTP26
AFTP27AFTP27

31

EMC2102_FAN_TACH_1

1

EMC2102_FAN_DRIVE

1

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

HDD/ODD/FAN

HDD/ODD/FAN

HDD/ODD/FAN

Roberts

Roberts

Roberts

36 58Thursday, October 02, 2008

36 58Thursday, October 02, 2008

36 58Thursday, October 02, 2008

of

of

of

A00

A00

A00

5

4

3

2

1

SSID = Wireless

Mini Card Connector(802.11a/b/g)

2
4
6

LPC_LFRAME#_IN

8

LPC_LAD3_IN

10

LPC_LAD2_IN

12

LPC_LAD1_IN

14

LPC_LAD0_IN

16

18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

+1.5V_RUN

1
1
1
1
1
1
1
1
1
1
1
1
1

MINI1

MINI1

53

MINI_2_WAKE#

D D

CLK_PCIE_MINI1#4

CLK_PCIE_MINI14

PLT_RST#9,16,20,21,24,41

PCLK_FWH4
E51_RXD24
E51_TXD24

C C

B B

+5V_ALW

C305

C305

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

A A

DY

DY

DY

+3.3V_RUN +1.5V_RUN

12

C235

C235

DY

DY

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

AFTP43AFTP43

WLAN_ACT41,47

BT_ACT41,47

MINI1_CLKREQ#4

R498 0R2J-2-GP

R498 0R2J-2-GP
R499 0R2J-2-GP

R499 0R2J-2-GP

R211 0R2J-2-GP

R211 0R2J-2-GP

1 2

DY

DY

R210 0R2J-2-GP

R210 0R2J-2-GP

1 2

DY

DY

PCIE_RXN216
PCIE_RXP216

PCIE_TXN216
PCIE_TXP216

+3.3V_RUN

AFTP53AFTP53

12

12

C241

C241

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

5

1

1 2

DY

DY

1 2

DY

DY

1

+5V_ALW

C468

C468

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C294

C294

DY

DY

E51_RXD_R
E51_TXD_R

R171

R171

1 2

DY

DY

0R3-0-U-GP

0R3-0-U-GP

+3.3V_RUN

12

12

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

NP1

NP2

C471

C471

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1

3
5
7

9
11
13
15

17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51

54

SKT-MINI52P-21-GP

SKT-MINI52P-21-GP

62.10043.581

62.10043.581

WLAN_ACT
CLK_PCIE_MINI1#
CLK_PCIE_MINI1
E51_TXD_R
E51_RXD_R
PCIE_RXN2
PCIE_TXP2
+3.3V_RUN
+1.5V_RUN
WIFI_RF_EN
PLT_RST#
SMB_CLK
SMB_DATA

WLAN_ACT

R493

R493

1 2

R494

R494

1 2

R495

R495

1 2

R496

R496

1 2

R497

R497

1 2

PLT_RST#

SMB_CLK
SMB_DATA

USB_PN4
USB_PP4

AFTP56AFTP56
AFTP59AFTP59
AFTP58AFTP58
AFTP61AFTP61
AFTP65AFTP65
AFTP64AFTP64
AFTP67AFTP67
AFTP69AFTP69
AFTP72AFTP72
AFTP71AFTP71
AFTP73AFTP73
AFTP75AFTP75
AFTP74AFTP74

4

+3.3V_RUN

DY

DY
DY

DY
DY

DY
DY

DY
DY

DY

+3.3V_RUN

1

1

12

0R2J-2-GP

0R2J-2-GP
0R2J-2-GP

0R2J-2-GP
0R2J-2-GP

0R2J-2-GP
0R2J-2-GP

0R2J-2-GP
0R2J-2-GP

0R2J-2-GP

EC65

EC65
SC220P50V2KX-3GP

SC220P50V2KX-3GP

LPC_LFRAME# 17,24

LPC_LAD3
LPC_LAD2
LPC_LAD1
LPC_LAD0

LPC_LAD[0..3] 17,24

WIFI_RF_EN 24

PLT_RST# 9,16,20,21,24,41

SMB_CLK 18,41

SMB_DATA 18,41

USB_PN4 16
USB_PP4 16

A00.08/0903

AFTP54AFTP54

AFTP55AFTP55

SSID = SDIO

SD_DAT0/XD_D6/MS_D0
XD_D4/SD_DAT1
SD_DAT2/XD_RE#
SD_DAT3/XD_WE#

+3.3V_RUN_CARD

12

C272

C272

DY

DY

12

C275

C275

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

XD_D021
SD_CLK/XD_D1/MS_CLK21
XD_D2/MS_D221
XD_D3/MS_D121
XD_D4/SD_DAT121
XD_D5/MS_BS21
SD_DAT0/XD_D6/MS_D021
XD_D7/MS_D321

XD_RDY21
SD_DAT2/XD_RE#21
XD_CE#21
XD_CLE21
XD_ALE21
SD_DAT3/XD_WE#21
XD_WP#21
XD_CD#21

12

C287

C287

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

AFTP39AFTP39

SD_CMD
SD_CLK
SD_CD#
SD_WP

C274

C274

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

DY

DY

For EMI

1

XD_D0
SD_CLK/XD_D1/MS_CLK
XD_D2/MS_D2 SD_CD#
XD_D3/MS_D1
XD_D4/SD_DAT1
XD_D5/MS_BS
SD_DAT0/XD_D6/MS_D0
XD_D7/MS_D3

XD_RDY
SD_DAT2/XD_RE#
XD_CE#
XD_CLE
XD_ALE
SD_DAT3/XD_WE#
XD_WP#
XD_CD#

SSID = User.Interface

12

12

R9

R9

R17

R17

ITP_TDI5
ITP_TMS5

ITP_TRST#5

ITP_TCK5

ITP_TDO5
CLK_CPU_ITP#4
CLK_CPU_ITP4

H_CPURST#5,8

ITP_BPM#55
ITP_BPM#45
ITP_BPM#35
ITP_BPM#25
ITP_BPM#15
ITP_BPM#05

ITP_DBRESET#5

+1.05V_VCCP use Decoupling Capacitor close
ITP connector 100 mil ( max )

CPU

ITP_TDI
ITP_TMS

ITP_TRST#
ITP_TCK

CLK_CPU_ITP#
CLK_CPU_ITP

1 2

ITP_BPM#5

150R2F-1-GP

150R2F-1-GP

ITP_BPM#4
ITP_BPM#3
ITP_BPM#2
ITP_BPM#1
ITP_BPM#0
ITP_DBRESET#

54D9R2F-L1-GP

54D9R2F-L1-GP

ITP Connector

TCK(PIN AC5)

3

54D9R2F-L1-GP

54D9R2F-L1-GP

R25

R25

DY

DY

R22

R22

TCK(PIN 5)

FBO(PIN 11)

DY

DY

51R2F-2-GP

51R2F-2-GP

12

SD/XD/MS Card Reader

12

12

EC74

EC74

DY

DY

SC220P50V2KX-3GP

SC220P50V2KX-3GP

+3.3V_RUN_CARD

+1.05V_VCCP

12

R16

R16

54D9R2F-L1-GP

54D9R2F-L1-GP

1 2

0R2J-2-GP

0R2J-2-GP

+3.3V_RUN
12

R11

R11
54D9R2F-L1-GP

54D9R2F-L1-GP

12

EC75

EC75

DY

DY

EC142

EC142

SC220P50V2KX-3GP

SC220P50V2KX-3GP

CARD1

CARD1

23

SD_VCC

14

MS_VCC

33

XD_VCC

8

XD_D0

9

XD_D1

26

XD_D2

27

XD_D3

28

XD_D4

30

XD_D5

31

XD_D6

32

XD_D7

1

XD_R/B

2

XD_RE

3

XD_CE

4

XD_CLE

5

XD_ALE

6

XD_WE

7

XD_WP

34

XD_CD_SW

NP1

NP1

NP2

NP2

CARD-PUSH-36P-5-GP

CARD-PUSH-36P-5-GP

20.I0081.011

20.I0081.011

12

R24

R24

R20

R20

54D9R2F-L1-GP

54D9R2F-L1-GP

R10

R10

DY

DY

R344

R344

1 2

1K2R2F-1-GP

1K2R2F-1-GP

2

12

DY

DY

EC145

EC145

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

12

54D9R2F-L1-GP

54D9R2F-L1-GP

1 2

R19 0R2J-2-GP

R19 0R2J-2-GP

1 2

R23 0R2J-2-GP

R23 0R2J-2-GP

1 2

R21 0R2J-2-GP

R21 0R2J-2-GP

1 2

R18 22D6R2F-L1-GP

R18 22D6R2F-L1-GP

1 2

R345 0R2J-2-GP

R345 0R2J-2-GP

1 2

R342 0R2J-2-GP

R342 0R2J-2-GP

1 2

R8 1KR2J-1-GP

R8 1KR2J-1-GP

1 2

R12 0R2J-2-GP

R12 0R2J-2-GP

1 2

R15 0R2J-2-GP

R15 0R2J-2-GP

1 2

R3 0R2J-2-GP

R3 0R2J-2-GP

1 2

R5 0R2J-2-GP

R5 0R2J-2-GP

1 2

R6 0R2J-2-GP

R6 0R2J-2-GP

1 2

R4 0R2J-2-GP

R4 0R2J-2-GP

1 2

R343 0R2J-2-GP

R343 0R2J-2-GP

ITP_DBRESET#_118

12

12

DY

DY

EC147

EC147

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3

SD_CMD

SD_CLK
SD_CD_SW
SD_WP_SW

MS_DATA0
MS_DATA1
MS_DATA2
MS_DATA3

MS_BS

MS_INS

MS_SCLK

4IN1_GND
4IN1_GND
4IN1_GND
4IN1_GND

H_CPURST# use pull-up Resistor close
ITP connector 500 mil ( max ),
others place near CPU side.

DY

DY
DY

DY
DY

DY

DY

DY
DY

DY
DY

DY
DY

DY
DY

DY
DY

DY
DY

DY
DY

DY
DY

DY
DY

DY
DY

DY

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

12

DY

DY

DY

DY

EC146

EC146

EC144

EC144

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SD_DAT0/XD_D6/MS_D0

25

XD_D4/SD_DAT1

29

SD_DAT2/XD_RE#

10

SD_DAT3/XD_WE#

11

SD_CMD

12

SD_CLK

24
36

SD_WP

35

SD_DAT0/XD_D6/MS_D0

19

XD_D3/MS_D1

20

XD_D2/MS_D2

18

XD_D7/MS_D3

16

XD_D5/MS_BS

21

MS_INS#

17

MS_CLK

15

13
22
38
37

+1.05V_VCCP

MINICARD(WLAN)/SD/ITP CONN

MINICARD(WLAN)/SD/ITP CONN

MINICARD(WLAN)/SD/ITP CONN

Custom

Custom

Custom

SD_CMD

1
1
1
1

1
1
1

1

1

1

SD_CD#

1

SD_WP

1

MS_INS#

1

XD_D0

1

XD_RDY

1

XD_CE#

1

XD_CLE

1

XD_ALE

1

XD_WP#

1

XD_CD#

1

SD_CLK

1

MS_CLK

1

SD_CLK/XD_D1/MS_CLK

1

AFTP37AFTP37
AFTP40AFTP40
AFTP38AFTP38
AFTP47AFTP47

SD_CMD 21

SD_CLK 21

SD_CD# 21

SD_WP 21

AFTP48AFTP48
AFTP50AFTP50
AFTP49AFTP49

AFTP51AFTP51

MS_INS# 21
MS_CLK 21

AFTP52AFTP52

AFTP29AFTP29
AFTP28AFTP28
AFTP30AFTP30
AFTP42AFTP42
AFTP41AFTP41
AFTP32AFTP32
AFTP31AFTP31

12

AFTP34AFTP34
AFTP33AFTP33
AFTP45AFTP45

DY

DY

EC143

EC143

AFTP44AFTP44
AFTP36AFTP36
AFTP35AFTP35
AFTP46AFTP46

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

ITP Connector

ITP1

ITP_TDI_1
ITP_TMS_1

ITP_TRST#_1
ITP_TCK_1
ITP_TDO_1ITP_TDO

CLK_CPU_ITP#_1
CLK_CPU_ITP_1

H_CPURST#_1
ITP_BPM#5_1

ITP_BPM#4_1
ITP_BPM#3_1
ITP_BPM#2_1
ITP_BPM#1_1
ITP_BPM#0_1
ITP_DBRESET#_1

Roberts

Roberts

Roberts

ITP1

1
2

3
4
5
6
7
8

9
10
11
12
13
14
15

DY

DY

16
17
18
19
20
21
22
23
24
25
26
27
28

MLX-CON28-3-GP

MLX-CON28-3-GP

20.K0116.028

20.K0116.028

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

37 58Thursday, October 02, 2008

37 58Thursday, October 02, 2008

37 58Thursday, October 02, 2008

1

29

30

A00

A00

A00

of

of

of

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

MINICARD(WWAN)

MINICARD(WWAN)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

MINICARD(WWAN)

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

38 58Monday, September 22, 2008

38 58Monday, September 22, 2008

38 58Monday, September 22, 2008

1

of

of

of

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

MINICARD(WPAN)

MINICARD(WPAN)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

MINICARD(WPAN)

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

39 58Monday, September 22, 2008

39 58Monday, September 22, 2008

39 58Monday, September 22, 2008

1

of

of

of

A00

A00

A00

5

SSID = AUDIO

4

3

2

1

AUD_VREFOUT_B22

Speaker Connector

D D

AUD_SPK_L223
AUD_SPK_L123

AUD_SPK_R223
AUD_SPK_R123

C C

AUD_SPK_L2
AUD_SPK_L1

AUD_SPK_R2
AUD_SPK_R1

DY

DY

12

12

EC3

EC3

EC4

EC4

DY

DY

SC100P50V2JN-3GP

SC100P50V2JN-3GP

R30 0R3-0-U-GPR30 0R3-0-U-GP
R28 0R3-0-U-GPR28 0R3-0-U-GP

R31 0R3-0-U-GPR31 0R3-0-U-GP
R32 0R3-0-U-GPR32 0R3-0-U-GP

12

EC6

EC6

DY

DY

DY

DY

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

SC100P50V2JN-3GP

1 2
1 2

1 2
1 2

12

EC8

EC8

SC100P50V2JN-3GP

SC100P50V2JN-3GP

AFTP77AFTP77
AFTP79AFTP79
AFTP80AFTP80
AFTP78AFTP78

AUD_SPK_L2_R

AUD_SPK_L1_R
AUD_SPK_R2_R
AUD_SPK_R1_R

MLX-CON4-15-GP-U

MLX-CON4-15-GP-U

AUD_SPK_L2_R

1

AUD_SPK_L1_R

1

AUD_SPK_R2_R

1

AUD_SPK_R1_R

1

20.F0693.004

20.F0693.004

SPK1

SPK1

5

1
2

3
4

6

AUD_EXT_MIC_L22

AUD_EXT_MIC_R22

AUD_EXT_MIC_L

AUD_EXT_MIC_R MIC_IN_R_2

C539 SC1U10V3KX-3GPC539 SC1U10V3KX-3GP

12

C540 SC1U10V3KX-3GPC540 SC1U10V3KX-3GP

12

Internal Microphone

12

12

R471

R471

4K7R2J-2-GP

4K7R2J-2-GP

12

C559

C559

R470

R470

4K7R2J-2-GP

4K7R2J-2-GP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

MIC_IN_L_2 MIC_IN_L_C

R481 0R3-0-U-GPR481 0R3-0-U-GP

R480 0R3-0-U-GPR480 0R3-0-U-GP

EXT_MIC_JD#22

12

1 2

AFTP81AFTP81
AFTP82AFTP82
AFTP83AFTP83

MIC IN

AFTP76AFTP76

MIC_IN_R_C

12

12

EC157

EC157

SC100P50V2JN-3GP

SC100P50V2JN-3GP

MIC_IN_L_C

1

MIC_IN_R_C

1

EXT_MIC_JD#

1

LINE1 OUT

1

EC158

EC158

SC100P50V2JN-3GP

SC100P50V2JN-3GP

MIC1

MIC1

1
2
6
3
4
5

7
8
9

10

PHONE-JK284-GP

PHONE-JK284-GP

22.10133.D01

22.10133.D01

LOUT1

LOUT1

1
2
6
3
4
5

7
8
9

10

PHONE-JK284-GP

PHONE-JK284-GP

22.10133.D01

22.10133.D01

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Audio Jack

Audio Jack

Audio Jack

Roberts

Roberts

Roberts

1

of

of

of

40 58Thursday, October 02, 2008

40 58Thursday, October 02, 2008

40 58Thursday, October 02, 2008

A00

A00

A00

DY

DY

12

EC156

EC156

1

SC100P50V2JN-3GP

SC100P50V2JN-3GP

BLM18BD601SN1D-GP

INT_MIC_L_R22

B B

A A

5

INT_MIC_L_R

EC160

EC160

SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

12

CN6

CN6

1

MICROPHONE-40-GP-U1

MICROPHONE-40-GP-U1

23.42143.001

23.42143.001

2

AUD_HP1_JD#22,23
AUD_HP1_JACK_L23
AUD_HP1_JACK_R23

4

AUD_HP1_JACK_L
AUD_HP1_JACK_R

3

60D4R2F-GP

60D4R2F-GP

R475

R475

1 2
1 2

R474

R474

60D4R2F-GP

60D4R2F-GP

AFTP85AFTP85
AFTP86AFTP86
AFTP87AFTP87

AUD_HP1_JACK_L2
AUD_HP1_JACK_R2

AUD_HP1_JD#

1

AUD_HP1_JACK_L1

1

AUD_HP1_JACK_R1

1

BLM18BD601SN1D-GP
L19

L19

1 2
1 2

L20

L20
BLM18BD601SN1D-GP

BLM18BD601SN1D-GP

600ohm 100MHz
200mA 0.5ohm DC

2

AFTP84AFTP84

AUD_HP1_JD#
AUD_HP1_JACK_L1
AUD_HP1_JACK_R1

12

DY

DY

EC155

EC155

SC100P50V2JN-3GP

SC100P50V2JN-3GP

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

5

4

3

2

1

SSID = ExpressCard SSID = User.Interface

PCIE_TXP5

AFTP92AFTP92
AFTP96AFTP96
AFTP95AFTP95

Place them Near to Chip

D D

12

C499

C499

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DY

DY

12

C504

C504

12

C487

C487

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

+3.3V_RUN

12

12

C484

C484

C256

C256

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

12

C486

C486

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C262

C262

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

12

C502

C502

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

+3.3V_CARDAUX+3.3V_CARD +1.5V_CARD+1.5V_RUN+3.3V_ALW

12

AFTP98AFTP98
AFTP97AFTP97
AFTP100AFTP100
AFTP99AFTP99
AFTP101AFTP101
AFTP102AFTP102
AFTP103AFTP103
AFTP104AFTP104

C505

C505

AFTP105AFTP105
AFTP106AFTP106
AFTP108AFTP108

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

AFTP110AFTP110
AFTP109AFTP109
AFTP112AFTP112
AFTP111AFTP111
AFTP113AFTP113

1

PCIE_TXN5

1

PCIE_RXP5

1

PCIE_RXN5

1

CLK_PCIE_NEW

1

CLK_PCIE_NEW#

1

+3.3V_ALW

1

LID_CLOSE#

1

CPUSB#

1

USB_PP7

1

USB_PN7

1

NEWCARD_CLKREQ#

1

+3.3V_CARD

1

PERST#

1

+3.3V_CARDAUX

1

PCIE_WAKE#

1

+1.5V_CARD

1

SMB_DATA

1

SMB_CLK

1

CAMERA1

CAMERA1

10

9

ACES-CON8-3-GP-U

ACES-CON8-3-GP-U

20.F0779.008

20.F0779.008

8

AUD_DMIC_CLK_G_R

7
6

AUD_DMIC_IN0_R

5
4

USB_PN11

3

USB_PP11

2
1

R69 33R2J-2-GPR69 33R2J-2-GP

1 2
1 2

1

+3.3V_CAMERA

AFTP107AFTP107
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

33R2J-2-GPR70 33R2J-2-GPR70

C65

C65

DY

DY

12

Camera Connector

CAMERA_DET# 24
AUD_DMIC_CLK_G 22

AUD_DMIC_IN0 22

12

EC17

EC17

DY

DY

SC33P50V2JN-3GP

SC33P50V2JN-3GP

DY

DY

12

EC18

EC18

4

DY

DY

1

SC33P50V2JN-3GP

SC33P50V2JN-3GP

3

L2

L2
DLW21SN900SQ2LUGP

DLW21SN900SQ2LUGP

2

USB_PN11 16

USB_PP11 16

Digital Mic Power

+3.3V_CAMERA+3.3V_RUN

NEWCARD_OC#

19

7

21

1

GND

AUXOUT

15

AUXIN

17

18

OC#

GND

RCLKEN

3_3VOUT

1_5VOUT111_5VIN

3

12

STBY#

SYSRST#

3_3VIN

G577BR91U-GP

G577BR91U-GP

2

U55

16
14
13

5
4

+3.3V_ALW

+1.5V_CARD

U55

NC#16
1_5VIN
1_5VOUT
3_3VOUT
3_3VIN

C C

+1.5V_RUN
+1.5V_CARD
+3.3V_CARD

+3.3V_RUN

+3.3V_CARDAUX

+1.5V_CARD Max. 650mA, Average 500mA.
+3.3V_CARD Max. 1300mA, Average 1000mA
+3.3V_CARDAUX Max. 275mA

B B

SHDN#
PERST#
CPUSB#

CPPE#

+3.3V_RUN
+3.3V_CARD
+1.5V_RUN

1

AFTP114AFTP114

PM_SLP_S3# 18,24,25,30,31,32,34

20

PERST#

8

CPUSB#

9

CPPE#

10

NRST

6

RN24

RN24

23

DY

DY

4

SRN100KJ-6-GP

SRN100KJ-6-GP
R435 0R2J-2-GPR435 0R2J-2-GP
C494 SC22P50V2JN-4GP

C494 SC22P50V2JN-4GP

12

DY

DY

+3.3V_ALW

1

12

PM_SLP_S4# 18,24,31

PLT_RST# 9,16,20,21,24,37

SSID = User.Interface

New Card Connector

NEW1

NEW1

31

NP1

1

CPPE#

NEWCARD_CLKREQ#4

A A

AFTP121AFTP121

+3.3V_CARD

+3.3V_CARDAUX

+1.5V_CARD

SMB_DATA18,37
SMB_CLK18,37

AFTP123AFTP123
AFTP122AFTP122

1

NEWCARD_CLKREQ#

PERST#

CONN_TP2

1

CONN_TP3

1

5

NP2

11
13
15
17
19
21
23
25
27
29

32

3
5
7
9

FOX-CONN30A-9GP

FOX-CONN30A-9GP

20.F0908.030

20.F0908.030

2
4

6
8
10
12
14
16
18
20
22
24
26
28
30

1

LID_CLOSE#
CPUSB#

12

EC70

EC70

DY

DY

SC5P50V2CN-2GP

SC5P50V2CN-2GP

AFTP120AFTP120

4

12

EC69

EC69

DY

DY

SC5P50V2CN-2GP

SC5P50V2CN-2GP

PCIE_TXP5 16

PCIE_TXN5 16

PCIE_RXP5 16

PCIE_RXN5 16

CLK_PCIE_NEW 4

CLK_PCIE_NEW# 4PCIE_WAKE#18,20

+3.3V_ALW

LID_CLOSE# 24

USB_PP7 16
USB_PN7 16

AFTP116AFTP116
AFTP115AFTP115
AFTP117AFTP117
AFTP118AFTP118
AFTP119AFTP119

3

R77

R77

1 2

0R0603-PAD

0R0603-PAD

EC16

EC16

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

WLAN_ACT37,47

BLUETOOTH_EN24,47

USB_PP6

1

USB_PN6

1

BLUETOOTH_EN

1

WLAN_ACT

1

+3.3V_RUN

1

12

12

C66

DY

DY

BT_ACT37,47

USB_PP616
USB_PN616

C66
SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

12

R74

R74

DY

DY

100KR2J-1-GP

100KR2J-1-GP

2

12

+3.3V_RUN

R83

R83

10KR2J-3-GP

10KR2J-3-GP

12

C77

C77

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

AUD_DMIC_IN0_R
AUD_DMIC_CLK_G_R

AFTP89AFTP89
AFTP88AFTP88
AFTP90AFTP90
AFTP91AFTP91
AFTP93AFTP93
AFTP94AFTP94

1
1
1
1
1
1

CAMERA_DET#
AUD_DMIC_CLK_G_R
AUD_DMIC_IN0_R
+3.3V_CAMERA
USB_PN11
USB_PP11

DY

DY

12

EC15

EC15

12

EC14

EC14

DY

DY

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

Bluetooth Module conn.

BT1

BT1

11

1
2

3
4
5
6
7
8
9

10

12

12

EC33

EC33

DY

DY

DY

DY

SC22P50V2JN-4GP

SC22P50V2JN-4GP

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Bluetooth/CAM/New Card

Bluetooth/CAM/New Card

Bluetooth/CAM/New Card

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

12

EC31

EC31

DY

DY

SC22P50V2JN-4GP

SC22P50V2JN-4GP

EC32

EC32

SC220P50V2KX-3GP

SC220P50V2KX-3GP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

FOX-CON10-GP-U

FOX-CON10-GP-U

20.F0711.010

20.F0711.010

41 58Thursday, October 02, 2008

41 58Thursday, October 02, 2008

41 58Thursday, October 02, 2008

1

12

A00

A00

A00

of

of

of

5

4

3

2

1

SPI FLASH ROM (16M bits)

+3.3V_RTC_LDO

4

D D

EC_SPI_CS#24

EC_SPI_DI24

EC_SPI_WP#_R24

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

C C

SSID = User.Interface

R419 0R2J-2-GPR419 0R2J-2-GP
R482 0R2J-2-GPR482 0R2J-2-GP

12

EC135

EC135

1 2
1 2

100KR2J-1-GP

100KR2J-1-GP

R476

R476

12

2 3

EC_SPI_WP#

RN50

RN50
SRN100KJ-6-GP

SRN100KJ-6-GP

1

EC_SPI_CS#

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

EC_SPI_HOLD#

8

EC_SPI_HOLD#

7
6
5

EC133

EC133

+3.3V_RTC_LDO

U23

U23

1

CS#

2

DO

HOLD#

3

WP#
GND4DIO

W25X16AVSSIG-GP

W25X16AVSSIG-GP

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

VCC

CLK

Power/Battery LED

SSID = Flash.ROM

+3.3V_RTC_LDO

12

12

C454

C454

DY

DY

R414 33R2J-2-GPR414 33R2J-2-GP

1 2

12

12

EC134

EC134
SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

C470

C470

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

EMI REQUEST

12

C472

C472

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

EC_SPI_CLK 24
EC_SPI_DO 24

+5V_ALW

SSID = User.Interface

Power Dash Board to Board CONN

R500

R500

KBC_PWRBTN#24

SSID = RBATT

1 2

0R2J-2-GP

0R2J-2-GP

12

EC161

EC161

DY

DY

SC220P50V2KX-3GP

SC220P50V2KX-3GP

KBC_PWRBTN#_IN

AFTP124AFTP124

CN1

CN1

5
1

1

2
3
4

6

ACES-CON4-10-GP-U

ACES-CON4-10-GP-U

20.K0320.004

20.K0320.004

POWER LED

LED1

R491

12

EC62

EC62

DY

DY

SC220P50V2KX-3GP

SC220P50V2KX-3GP

12

EC61

EC61

DY

DY

SC220P50V2KX-3GP

SC220P50V2KX-3GP

R491

1 2

330R2J-3-GP

330R2J-3-GP

R492

R492

1 2

270R2J-L

270R2J-L

PWR_LED_B

BAT_LED_B

Q12

Q12

R1

R1

PWRLED24

BATLOW_LED24

B B

B

R2

R2

PDTC124EU-1-GP

PDTC124EU-1-GP

Q11

Q11

R1

R1

B

R2

R2

PDTC124EU-1-GP

PDTC124EU-1-GP

LED_PWR#

C
E

LED_BAT#

C
E

LED1

3

2

LED-OW-3-GP

LED-OW-3-GP

White

Amber

BATT LED

1

+RTC_CELL

R227

R227

0R2J-2-GP

0R2J-2-GP

RTC_PWR_L

1 2

12

C519

C519
SC1U10V3KX-3GP

SC1U10V3KX-3GP

U24

U24

3

SDMG0340LC7F-GP-U

SDMG0340LC7F-GP-U

2

1

+3.3V_RTC_LDO

RTC_PWR

1 2

Width=20mils

AFTP126AFTP126

RTC Connector

+RTC_VCC

R220

R220

+RTC_VCC

1

NP1
NP2

1KR2J-1-GP

1KR2J-1-GP

AFTP125AFTP125

1

RTC1

RTC1

1

PWR

2

GND
NP1
NP2

BAT-CON2-1-GP-U

BAT-CON2-1-GP-U

62.70001.011

62.70001.011

SSID = User.Interface

R33 0R3-0-U-GP

R33 0R3-0-U-GP

+3.3V_RUN

+5V_RUN

CAP_SCL24

A A

5

CAP_SDA24

CAPA_INT#24

1 2

R34 FUSE-D5A32V-5-GP

R34 FUSE-D5A32V-5-GP

1 2

DY

DY

Capacitive Button

CN2

DY

DY

DY

DY

12

EC5

EC5

DY

DY

SC220P50V2KX-3GP

SC220P50V2KX-3GP

CAP_SCL
CAP_SDA

AFTP128AFTP128

12

EC7

EC7

SC220P50V2KX-3GP

SC220P50V2KX-3GP

1

4

CN2

7
1
2

3
4
5
6

DY

DY

8

ACES-CON6-12-GP

ACES-CON6-12-GP

20.K0358.006

20.K0358.006

AFTP129AFTP129
AFTP131AFTP131
AFTP130AFTP130
AFTP132AFTP132

1
1
1
1

+5V_RUN
CAP_SCL
CAP_SDA
CAPA_INT#

3

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

FWH/LED/Power Dash/RTC/Cap

FWH/LED/Power Dash/RTC/Cap

FWH/LED/Power Dash/RTC/Cap

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

42 58Thursday, October 02, 2008

42 58Thursday, October 02, 2008

42 58Thursday, October 02, 2008

1

A00

A00

A00

of

of

of

5

SSID = USB

4

3

2

1

D D

USB_PN216

USB_PP216

C C

+5V_ALW

USB_PN2

USB_PP2

at least 80 mil

12

12

DY

DY

TC12

TC12

EC78

EC78

SCD1U50V3KX-GP

SCD1U50V3KX-GP

ST100U6D3VBM-8GP

ST100U6D3VBM-8GP

USB_PWR_EN#24,45

Right USB Port CONN

+5V_USB2

1

2

L1

L1
L-63UH-GP

L-63UH-GP

DY

DY

4

U1

U1

1

GND

2

VIN

3

VIN
EN/EN#4FLG#

RT9711BPF-GP

RT9711BPF-GP

3

AFTP127AFTP127

AFTP133AFTP133
AFTP135AFTP135
AFTP134AFTP134

at least 80 mil

8

VOUT

7

VOUT

6

VOUT

5

USB_OC#216

+5V_USB2

12

DY

DY

1

1
1
1

R296

R296

100KR2J-1-GP

100KR2J-1-GP

+5V_USB2
USB_PN2
USB_PP2

12

6

CN3

CN3

4
3
2

1

MLX-CON4-15-GP-U

MLX-CON4-15-GP-U

20.F0693.004

20.F0693.004

5

12

C328

C328

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

C327

C327

SC1U10V3KX-3GP

SC1U10V3KX-3GP

TC11

TC11

ST100U6D3VBM-7GP

ST100U6D3VBM-7GP

B B

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

USB

USB

USB

Roberts

Roberts

Roberts

43 58Thursday, October 02, 2008

43 58Thursday, October 02, 2008

43 58Thursday, October 02, 2008

1

of

of

of

A00

A00

A00

5

4

3

2

1

SSID = Touch.PadSSID = KBC

D D

C174

C174

+5V_RUN

23

12

Internal KeyBoard Connector

KB1

KB1

29

C C

28

JAE-CON27-GP

JAE-CON27-GP

20.K0291.027

20.K0291.027

KCOL10

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27

KCOL11
KCOL9
KCOL14
KCOL13
KCOL15
KCOL16
KCOL12
KCOL0
KCOL2
KCOL1
KCOL3
KCOL8
KCOL6
KCOL7
KCOL4
KCOL5
KROW0
KROW3
KROW1
KROW5
KROW2
KROW4
KROW6
KROW7

1

AFTP137AFTP137

1

AFTP136AFTP136

1

AFTP138AFTP138

1

AFTP140AFTP140

1

AFTP139AFTP139

1

AFTP142AFTP142

1

AFTP141AFTP141

1

AFTP144AFTP144

1

AFTP143AFTP143

1

AFTP145AFTP145

1

AFTP150AFTP150

1

AFTP148AFTP148

1

AFTP147AFTP147

1

AFTP149AFTP149

1

AFTP151AFTP151

1

AFTP153AFTP153

1

AFTP152AFTP152

1

AFTP154AFTP154

1

AFTP156AFTP156

1

AFTP155AFTP155

1

AFTP158AFTP158

1

AFTP157AFTP157

1

AFTP159AFTP159

1

AFTP160AFTP160

1

AFTP162AFTP162

1

AFTP164AFTP164

KB_DET# 24

1

AFTP166AFTP166

KROW[0..7] 24

KCOL[0..16] 24

TPCLK24

TPDATA24

SC33P50V2JN-3GP

SC33P50V2JN-3GP

TouchPad Connector

+5V_RUN

1

RN18

RN18
SRN10KJ-5-GP

SRN10KJ-5-GP

4

1

AFTP146AFTP146

12

C163

C163
SC33P50V2JN-3GP

SC33P50V2JN-3GP

+5V_RUN

1

AFTP161AFTP161
AFTP163AFTP163
AFTP165AFTP165

1
1

TPCLK
TPDATA

12

C167

C167

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

5
1
2

3
4

6

12

C168

C168

SC1U10V3KX-3GP

SC1U10V3KX-3GP

TPAD1

TPAD1

ACES-CON4-10-GP-U

ACES-CON4-10-GP-U

20.K0320.004

20.K0320.004

B B

For EMS

12

DY

DY

DY

DY

EC110

EC110

SC220P50V2KX-3GP

SC220P50V2KX-3GP

A A

12

DY

DY

DY

DY

EC116

EC116

SC220P50V2KX-3GP

SC220P50V2KX-3GP

5

12

EC104

EC104

SC220P50V2KX-3GP

SC220P50V2KX-3GP

12

EC114

EC114

SC220P50V2KX-3GP

SC220P50V2KX-3GP

DY

DY

DY

DY

12

EC107

EC107

12

EC121

EC121

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

DY

DY

DY

DY

12

EC102

EC102

12

EC119

EC119

KCOL3
KCOL2
KCOL1
KCOL0

SC220P50V2KX-3GP

SC220P50V2KX-3GP

KCOL7
KCOL6
KCOL5
KCOL4

SC220P50V2KX-3GP

SC220P50V2KX-3GP

DY

DY

DY

DY

12

EC105

EC105

12

EC115

EC115

4

12

DY

DY

EC103

EC103

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

12

DY

DY

EC111

EC111

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

DY

DY

DY

DY

12

EC109

EC109

12

EC113

EC113

12

DY

DY

EC112

EC112

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

12

DY

DY

EC120

EC120

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

KCOL11
KCOL10
KCOL9
KCOL8

KCOL15
KCOL14
KCOL13
KCOL12

DY

DY

DY

DY

12

EC127

EC127

12

EC130

EC130

12

DY

DY

EC125

EC125

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

12

DY

DY

EC128

EC128

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

3

DY

DY

DY

DY

12

EC129

EC129

12

EC126

EC126

12

DY

DY

EC123

EC123

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

12

DY

DY

EC124

EC124

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

SC220P50V2KX-3GP

KROW3
KROW2
KROW1
KROW0

KROW7
KROW6
KROW5
KROW4

DY

DY

12

KCOL16

EC118

EC118

SC220P50V2KX-3GP

SC220P50V2KX-3GP

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

KeyBoard/Touch Pad

KeyBoard/Touch Pad

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

KeyBoard/Touch Pad

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

44 58Thursday, October 02, 2008

44 58Thursday, October 02, 2008

44 58Thursday, October 02, 2008

1

of

of

of

A00

A00

A00

5

4

3

2

1

SSID = PWR.Support

R98

R98

15KR2J-1-GP

15KR2J-1-GP

1 2

B

D D

I/O Board Connector

PS_ID

CN4

CN4

51

NP1

1 2
3 4

5 6
7 8
9 10

11 12

+2.5V_LOM

12

13 14
15 16
17 18
19 20
21 22
23 24
25 26
27 28
29 30
31 32
33 34
35 36
37 38
39 40
41 42
43 44
45 46
47 48
49 50

NP2

54

ACES-CONN50A-GP

ACES-CONN50A-GP

20.F1318.050

20.F1318.050

C33

C33
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

AFTP168AFTP168

C C

+5V_RUN

B B

12

C342

C342
SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

1

M_RED13
M_GREEN13
M_BLUE13 GMCH_HSYNC 13

MDI1+20
MDI1-20

M_RED
M_GREEN
M_BLUE

+5V_USB1

Batt Connecter

BATT1

BATT1

11

GND

10

GND

9

GND2

8

GND1

A A

BAT_ALERT

SYS_PRES#

BATT_PRS#

DAT_SMB
CLK_SMB

BATT2+
BATT1+

TYCO-CON9-1-GP

TYCO-CON9-1-GP

20.80959.009

20.80959.009

5

7
6
5
4
3
2
1

PBAT_ALARM#
PBAT_PRES1#

PBAT_SMBDAT1
PBAT_SMBCLK1

SCD1U50V3KX-GP

SCD1U50V3KX-GP

53
52

DDC_DATA_CON
DDC_CLK_CON

55
56

1

AFTP192AFTP192

1

AFTP193AFTP193

R1 100R2F-L1-GP-UR1 100R2F-L1-GP-U

1 2

12

C326

C326

12

C325

C325
SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

1

AFTP167AFTP167

1

AFTP169AFTP169

AFTP170AFTP170
AFTP173AFTP173
AFTP172AFTP172
AFTP174AFTP174
AFTP171AFTP171
AFTP176AFTP176
AFTP175AFTP175
AFTP177AFTP177
AFTP178AFTP178
AFTP179AFTP179
AFTP181AFTP181
AFTP180AFTP180
AFTP182AFTP182
AFTP183AFTP183
AFTP185AFTP185
AFTP184AFTP184
AFTP186AFTP186
AFTP187AFTP187

AFTP188AFTP188
AFTP189AFTP189
AFTP191AFTP191
AFTP190AFTP190

+5V_RUN

+2.5V_LOM

GMCH_VSYNC 13
DDC_DATA_CON 13
DDC_CLK_CON 13

USB_PP0 16

USB_PN0 16

USB_PP1 16

USB_PN1 16

MDI0+ 20

MDI0- 20

+5V_USB1

1

USB_PP0

1

USB_PN0

1

USB_PP1

1

USB_PN1

1

MDI1+

1

MDI1-

1

MDI0+

1

MDI0-

1

M_RED

1

M_BLUE

1

GMCH_VSYNC

1

DDC_DATA_CON

1

DDC_CLK_CON

1

M_GREEN

1

GMCH_HSYNC

1

+5V_RUN

1

+2.5V_LOM

1

PBAT_PRES1#

1

PBAT_SMBDAT1

1

PBAT_SMBCLK1

1

+PBATT

1

4

RN1 SRN100J-3-GPRN1 SRN100J-3-GP

R2 0R3-0-U-GPR2 0R3-0-U-GP

4

1
23

12

100KR2J-1-GP

100KR2J-1-GP

R294

R294

470KR2J-2-GP

470KR2J-2-GP

R95

R95

AD_OFF24

12

1 2

FDV301N-NL-GP

FDV301N-NL-GP

D

D

USB_PWR_EN#24,43

+3.3V_RTC_LDO

BAT_IN# 24
BAT_SDA 24,26
BAT_SCL 24,26

+PBATT

BATT_SENSE 26

Q6

Q6

R92

R92

1 2

DY

DY

33R2J-2-GP

33R2J-2-GP

Q5

Q5

R1

R1

1

DY

DY

IN

IN

R2

R2

DDTC124EUA-7F-GP

DDTC124EUA-7F-GP

at least 80 mil at least 80 mil

+5V_ALW

E

CH3904PT-GP

CH3904PT-GP
Q7

Q7

C

G

12

SD

This cap should be used
only as last resort for
EMI suppression.

12

C332

C332

DY

DY

SCD1U50V3KX-GP

SCD1U50V3KX-GP

OUT

OUT

3

GND

GND

2

3

R93

R93
10KR2J-3-GP

10KR2J-3-GP

PSID_DISABLE#_R

Q16

Q16

R2

R2

B

R1

R1

DY

DY

PDTA124EU-1-GP

PDTA124EU-1-GP

U9

U9

1

GND

2

IN

3

EN1/EN1#
EN2/EN2#4OC2#

G546B2P1UF-GP

G546B2P1UF-GP

1

2

DY

DY

D9

D9
BAV99-4-GP

BAV99-4-GP

3

DY

DY

0R2J-2-GP

0R2J-2-GP

R91

R91

1 2

33R2J-2-GP

33R2J-2-GP

+DC_IN +DC_IN_SS

12

C373

C373

SC1U25V5KX-1GP

SC1U25V5KX-1GP

E
C

8

OC1#

7

OUT1

6

OUT2

5

Reserved for EMI

Place near DCIN1

+DC_IN

R99

R99

12

12

R337

R337

240KR3-GP

240KR3-GP

R336

R336
47KR3J-L-GP

47KR3J-L-GP

1 2

12

C330

C330
SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

PSID_DISABLE# 24

U46

U46

S

S

1

S

S

2

S

S

3

GD

GD

4 5

AO4407A-GP

AO4407A-GP

Id=17A
Qg=100~150nC
Rdson=5.4~6.5mohm

USB Power

+5V_USB1+5V_ALW

USB_OC#0 16
USB_OC#1 16

DY

DY

D

D

8

D

D

7

D

D

6

12

TC18

TC18

2

+5V_ALW +3.3V_ALW

2

3

12

12

C375

C375

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

12

EC84

EC84

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

ST100U6D3VBM-8GP

ST100U6D3VBM-8GP

1

D8

D8
BAV99-4-GP

BAV99-4-GP

C380

C380

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

12

R90

R90
2K2R2J-2-GP

2K2R2J-2-GP

PS_ID_EC 24

12

12

C381

C381

C379

C379

SC10U25V6KX-1GP

SC10U25V6KX-1GP

SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

D2

D2

BAT_SCL

BAT_SDA

BAT_IN#

PBAT_ALARM#

LEFT IO/DCIN/BATT CONN

LEFT IO/DCIN/BATT CONN

LEFT IO/DCIN/BATT CONN

3

BAV99-4-GP

BAV99-4-GP

D3

D3

3

BAV99-4-GP

BAV99-4-GP

D1

D1

3

BAV99-4-GP

BAV99-4-GP

D18

D18

3

BAV99-4-GP

BAV99-4-GP

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

1

+3.3V_RTC_LDO

2

1

2

1

2

1

2

1

45 58Thursday, October 02, 2008

45 58Thursday, October 02, 2008

45 58Thursday, October 02, 2008

of

of

of

A00

A00

A00

5

4

3

2

1

SSID = LOM

D D

C C

SSID = VIDEO

(Blanking)

B B

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

LAN CONNECTOR / CRT

LAN CONNECTOR / CRT

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

LAN CONNECTOR / CRT

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

46 58Tuesday, September 09, 2008

46 58Tuesday, September 09, 2008

46 58Tuesday, September 09, 2008

1

of

of

of

A00

A00

A00

5

4

3

2

1

SSID = Mechanical

+3.3V_RTC_LDO +3.3V_RUN

12

12

EC54

D D

C C

EC54

DY

DY

BLUETOOTH_EN24,41

WLAN_ACT37,41

BT_ACT37,41

1

1

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

H18

H18

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

H12

H12

DY

DY

EC151

EC151

12

EC81

EC81

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC162

EC162

DY

DY

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

H11

H11

1

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

H9

H9

1

12

DY

DY

EC88

EC88

12

12

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC164

EC164

EC163

EC163

DY

DY

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

H5

H5

1

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

H10

H10

1

12

EC9

EC9

EC93

EC93

DY

DY

SC47P50V2JN-3GP

SC47P50V2JN-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

+5V_MOD +5V_ALW +3.3V_ALW

12

DY

DY

1

1

12

12

EC71

EC71

DY

DY

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC166

EC166

EC165

EC165

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

H13

H13

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

H4

H4

EC122

EC122

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1

1

+5V_ALW

12

EC108

EC108

H15

H15

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

H17

H17

12

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1

12

12

EC53

EC53

EC60

EC60

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

EC167 SCD1U16V2KX-3GP

EC167 SCD1U16V2KX-3GP

1 2

DY

DY

EC168 SCD1U16V2KX-3GP

EC168 SCD1U16V2KX-3GP

1 2

DY

DY

EC169 SCD1U16V2KX-3GP

EC169 SCD1U16V2KX-3GP

1 2

DY

DY

H20

H20

EC96

EC96

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC99

EC99

SC47P50V2JN-3GP

SC47P50V2JN-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

+DC_IN_SS

12

DY

DY

12

DY

DY

+5V_RUN

12

DY

DY

12

EC92

EC92

C324

C324

SCD1U50V3KX-GP

SCD1U50V3KX-GP

12

EC34

EC34

EC41

EC41

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC85

EC85

EC101

EC101

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

12

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

+PWR_SRC

EC43

EC43

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

EC82

EC82

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

DY

DY

+1.8V_SUS

12

DY

DY

+5V_RUN

12

DY

DY

12

EC97

EC97

EC13

EC13

DY

DY

SCD1U50V3KX-GP

SCD1U50V3KX-GP

12

EC44

EC44

EC45

EC45

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC11

EC11

EC90

EC90

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC1

EC1

DY

DY

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

SCD1U50V3KX-GP

12

EC47

EC47

DY

DY

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC50

EC50

DY

DY

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC94

EC94

SCD1U50V3KX-GP

SCD1U50V3KX-GP

12

EC46

EC46

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC68

EC68

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DY

DY

DY

DY

12

EC55

EC55

12

EC153

EC153

+1.05V_VCCP

DY

DY

12

EC98

EC98

DY

DY

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC152

EC152

DY

DY

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC49

EC49

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC106

EC106

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC148

EC148

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC138

EC138

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC117

EC117

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC67

EC67

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DY

DY

DY

DY

12

EC51

EC51

12

EC59

EC59

12

EC89

EC89

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

+3.3V_RUN+0.9V_DDR_VTT

12

EC91

EC91

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC52

EC52

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DY

DY

DY

DY

12

EC2

EC2

12

EC100

EC100

12

EC131

EC131

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC95

EC95

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

B B

HOLE355X355R111-S1-GP

H3
HOLEH3HOLE

1

H6
HOLEH6HOLE

1

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

H2
HOLEH2HOLE

1

H14

H14
HOLE

HOLE

1

34.4W005.001
Mini Card BOSS

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

H7
HOLEH7HOLE

1

1

34.4W004.001
New Card BOSS

H16

H16
HOLE

HOLE

H8
HOLEH8HOLE

1

HOLE355X355R111-S1-GP

HOLE355X355R111-S1-GP

34.4W001.001
NB Thermal BOSS

HOLE355X355R111-S1-GP

H1
HOLEH1HOLE

1

H19

H19
HOLE

HOLE

1

HOLE355X355R111-S1-GP

For TP button holder touch.

+3.3V_RUN

12

DY

DY

+PWR_SRC

12

EC83

EC83

EC137

EC137

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC150

EC150

DY

DY

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

+3.3V_RUN

12

EC159

EC159

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DY

DY

12

EC58

EC58

12

EC10

EC10

DY

DY

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC86

EC86

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DY

DY

12

EC64

EC64

12

EC141

EC141

DY

DY

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC149

EC149

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DY

DY

12

EC136

EC136

12

EC72

EC72

DY

DY

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC63

EC63

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

DY

DY

12

EC42

EC42

12

EC66

EC66

DY

DY

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

EC73

EC73

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

BOSS Placement

DY

DY

12

12

EC174

EC174

EC170

EC170

DY

DY

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

MISC

MISC

MISC

Roberts

Roberts

Roberts

47 58Thursday, October 02, 2008

47 58Thursday, October 02, 2008

47 58Thursday, October 02, 2008

1

A00

A00

A00

of

of

of

12

12

A A

SPR1

4

SPR1
SPRING-24-GP

SPRING-24-GP

34.45T31.001

34.45T31.001

1

1

Spring

SW1

SW1

SPRING-24-GP

SPRING-24-GP

SPR2

SPR2
SPRING-24-GP

SPRING-24-GP

34.45T31.001

34.45T31.001

1

5

SPR3

SPR3
SPRING-24-GP

SPRING-24-GP

34.45T31.001

34.45T31.001

1

SPR5

SPR5
SPRING-58-GP

SPRING-58-GP

34.4B312.002

34.4B312.002

1

SPR4

SPR4
SPRING-24-GP

SPRING-24-GP

34.45T31.001

34.45T31.001

1

DY

DY

3

EC173

EC173

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

DY

DY

12

EC171

EC171

EC172

EC172

DY

DY

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

SCD1U25V2ZY-1GP

5

D D

4

3

2

1

Adapter

P2003EVG

+PWR_SRC TPS51116

ISL6266AHRZ

TPS5117

LDO

+1.8V_SUS

Charger

+VCC_CORE

Battery

MAX8731A

+PBATT

MAX17020

C C

+5V_ALW2

G9091

+3.3V_RTC_LDO

G546B2P1UF

+5V_USB1

+5V_ALW

AO4468

+5V_RUN

RT9711BPF

+5V_USB2

+1.05V_VCCP

AO4468

+3.3V_RUN

+3.3V_ALW

G577BR91U

+3.3V_CARDAUX

+0.9V_DDR_VTT+V_DDR_MCH_REF

AO3403

+3.3V_LAN

APL5912

+1.5V_RUN

G577BR91U

+1.5V_CARD

88E8040

G9091

B B

+3.3V_CRT_LDO

MAX9789A

+VDDA

FDC655BN

+5V_HDD

SI4800BDY

+5V_MOD

G5281RC1U

+LCDVDD

G577BR91U

+3.3V_CARD

RTS5158E

+3.3V_RUN_CARD

+1.2V_LOM+2.5V_LOM

Power Shape

Regulator LDO Switch

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Power Block Diagram

Power Block Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Power Block Diagram

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

48 58Thursday, October 02, 2008

48 58Thursday, October 02, 2008

48 58Thursday, October 02, 2008

1

of

of

of

A00

A00

A00

A

ICH9M SMBus Block Diagram

B

C

D

E

KBC SMBus Block Diagram

+5V_RUN

‧

SRN10KJ-5-GP

1 1

+3.3V_RUN

‧

+3.3V_RUN

‧

SRN2K2J-1-GP

‧

ICH_SMBDATA

‧

‧

ICH_SMBDATA

‧

ICH_SMBDATA

DIMM 1

ICH_SMBCLK

SCL
SDA

SMBus Address:A0

DIMM 2

ICH_SMBCLK

SCL
SDA

SMBus Address:A4

Clock
Generator

ICH_SMBCLK

SCLK
SDATA

KBC

WPC773L

+3.3V_ALW

‧

SRN2K2J-1-GP

ICH9M

2 2

SMBCLK

SMBDATA

SMB_CLK
SMB_DATA

‧

‧

2N7002SPT

Express
Card

SMB_CLK
SMB_DATA

SMB_CLK
SMB_DATA

‧

‧

SMBus address:D2

Minicard
WLAN

ICH_SMBCLK

ICH_SMBDATA

3 3

SMB_CLK
SMB_DATA

PSDAT1
PSCLK1

GPIO61/SCL2
GPIO62/SDA2

SCL1
SDA1

TPDATA
TPCLK

BAT_SCL
BAT_SDA

KBC_SCL1
KBC_SDA1

+3.3V_RTC_LDO

‧

SRN4K7J-8-GP

‧

‧

+3.3V_RTC_LDO

‧

SRN4K7J-8-GP

‧

‧

‧

‧

+3.3V_RUN

SRN100J-3-GP

‧

‧

‧

PBAT_SMBCLK1
PBAT_SMBDAT1

2N7002DW-1-GP

0R2J-2-GP

0R2J-2-GP

+3.3V_RUN

‧

‧

TPDATA
TPCLK

Battery Conn.

CLK_SMB
DAT_SMB

MAX8731

SCL
SDA

+3.3V_RUN

‧

‧

‧

TouchPad Conn.

TPDATA
TPCLK

SMBus address:12

SRN4K7J-8-GP

Thermal

THERM_SCL
THERM_SDA

SCL
SDA

Capacity
Button

SMBus address:16

SMBus address:7A

SMBus address:86

‧

SRN2K2J-1-GP

LDDC_CLK
LDDC_DATA

LDDC_CLK
LDDC_DATA

‧

‧

LCD Conn.

+3.3V_RUN

‧

GMCH

CTRL_DDC_CLK

4 4

CTRL_DDC_DATA

GMCH_DDCCLK
GMCH_DDCDATA

‧

‧

SRN2K2J-1-GP

+3.3V_RUN

‧

2N7002DW-1-GP

Charger Board CONN.

A

B

C

+5V_CRT_RUN

‧

D

‧

SRN2K2J-1-GP

DDC_CLK_CON

‧

DDC_DATA_CON

CRT CONN

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

C

C

C

Date: Sheet

Date: Sheet

Date: Sheet

SMBUS Block Diagram

SMBUS Block Diagram

SMBUS Block Diagram

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

E

A00

A00

49 58Thursday, October 02, 2008

49 58Thursday, October 02, 2008

49 58Thursday, October 02, 2008

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of

of

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D

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Thermal Block Diagram

1 1

Audio Block Diagram

SPEAKER

OUTL+

OUTL-

OUTR-

OUTR+

PORT_D_L
PORT_D_R

SPKR_INL
SPKR_INR

MAX9789A

PORT_A_L

H_THERMDA

DP1

2 2

DN1

H_THERMDC

SC470P50V3JN-2GP

Thermal

THRMDA

THRMDC

CPU

Codec

92HD71B7

PORT_A_R

HP_INL
HP_INR

HPL
HPR

HP

OUT

EMC2102

MIC

IN

DP2

DN2

EMC2102_DP2

EMC2102_DN2

SC470P50V3JN-2GP

MMBT3904-3-GP

System sensor, put
between CPU and NB.

PORTB_L
PORTB_R

VREFOUT_B

3 3

DMIC_CLK

VOL_UP/DMIC_0/GPIO1

Digital
MIC
Array

DP3

EMC2102_DP3

SC470P50V3JN-2GP

DN3

EMC2102_DN3

Place near the CPU
and GMCH.

4 4

A

B

MMBT3904-3-GP

PORTC_L
PORTC_R

VREFOUT_C

C

Analog
MIC

D

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Thermal/Audio Block Diagram

Thermal/Audio Block Diagram

Thermal/Audio Block Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

50 58Thursday, October 02, 2008

50 58Thursday, October 02, 2008

50 58Thursday, October 02, 2008

E

of

of

of

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

VGA-PCIE(1/4)

VGA-PCIE(1/4)

VGA-PCIE(1/4)

Roberts

Roberts

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51 58Thursday, October 02, 2008

51 58Thursday, October 02, 2008

51 58Thursday, October 02, 2008

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B B

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<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

VGA-VRAM(2/4)

VGA-VRAM(2/4)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

VGA-VRAM(2/4)

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

52 58Thursday, October 02, 2008

52 58Thursday, October 02, 2008

52 58Thursday, October 02, 2008

1

of

of

of

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

VGA-HDMI/STRAP(3/4)

VGA-HDMI/STRAP(3/4)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

VGA-HDMI/STRAP(3/4)

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

53 58Thursday, October 02, 2008

53 58Thursday, October 02, 2008

53 58Thursday, October 02, 2008

1

of

of

of

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

VGA-LVDS/TV/CRT/(4/4)

VGA-LVDS/TV/CRT/(4/4)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

VGA-LVDS/TV/CRT/(4/4)

Taipei Hsien 221, Taiwan, R.O.C.

Roberts

Roberts

Roberts

54 58Thursday, October 02, 2008

54 58Thursday, October 02, 2008

54 58Thursday, October 02, 2008

1

of

of

of

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

VRAM

VRAM

VRAM

Roberts

Roberts

Roberts

55 58Thursday, October 02, 2008

55 58Thursday, October 02, 2008

55 58Thursday, October 02, 2008

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PAGE

1

45 CN4 Pin.51 from +DC_IN change to GND. EE

2

24 Dummy R422 EE

3

06/03

D D

06/05

06/06

06/10

C C

06/12

06/16

X01

06/17

06/18

B B

06/19

06/23
06/27

41 CAMERA1 conn reduce from 10 to 8 pin. Follow camera design. EE

4

42

5

46 Exchange H14 and H6 names. Correction. H14 for mini card boss ; H6 is hole. EE

6

42

7

37,41 Remove CN5 and related circuit in page.41.

8

37 Dummy R210, R211

9

24 Dummy R150. Staff R151. PCB Version for SB. EE

10

42 CN1 Pin.2 set to NC. Add R500 and dummy EC161. Avoid shorting between KBC_PWRBTN# and GND.

11

24 Dummy R406.

12

36 Update HDD symbol. Update symbol and footprint for only SATA HDD. (no co-layout) EE

13

35~45 Change All TP near connectors to AFTP (ZZ.AFT30.101). For AFTE test pad. EE

14

04 Change C461 and C462 from 15pF to 12pF. For X3 cap choice by report suggestion. EE

15

17 Change C520 and C522 from 15pF to 12pF. For X4 cap choice by report suggestion. EE

16

24,42 Add 0 ohm R482 on EC_SPI_WP# and link to KBC/GPIO30.

17

40 Change L19 and L20 to 68.00082.531. For EMI. EE

18

45 Change M_RED to CN4 Pin.17 ; M_GREEN to CN4 Pin.21 ; M_BLUE to CN4 Pin.25.

19

47 Add H20. Add square GND for TP button holder touch. EE

20

42 Dummy CN2, R34. EECap. button function is disable.

21

47 Add dummy EC162, EC163, EC164.

22

04 Change R216 to 22 ohm. The same clock dirve to U25 and U34. EE

23

44 Dummy EC110, EC104, EC107, EC102, EC105, EC103, EC109, EC112, EC127, EC125,

43 EENo need 0 ohm R.Short R26, R27.

24

47 Add SW1. ME request. EE

25

35 LCD1.38 link to GFX_PWR_SRC ; LCD1.37 set NC ; LCD1.35 link to +LCDVDD ;

26

18 Dummy R179, R423.

27

24 Dummy R416, R418. Cap. button function is disable. EE

28

40 Change LOUT1 and MIC1 to 22.10133.D01. Change jack source. EE

29

17,18 Dummy U25.B10 link R506 to GND; U25.C18 link R501 to GND;

30

31

25 Change R82 to 20K 1% ; Change R78 to 10K 1%. For T8 shutdown is set 88 deg-C. EE

32

47 Add dummy EC170, EC171, EC172, EC173, EC174. For EMI. EE
42 Change U23 to 72.25X16.A01. Better performance. EE

33

RTC1 CONN change p/n: 22.70031.001 to 62.70001.011.

Reverse LED1. Correction. Amber for BAT_LED_B ; White for PWR_LED_B.

Add dummy R: R493, R494, R495, R496, R497, R498, R499

Change R425, R422, R409, R406, R401, R404 to 100K ohm.

Change RN50 to 100k and Add R476 for EC_SPI_WP#.

CN4 Pin.23 and Pin.27 to GND.

Add dummy EC165, EC166.
Add dummy EC167, EC168, EC169.

EC129, EC123, EC118, EC116, EC114, EC121, EC119, EC115, EC111, EC113, EC120,
EC130, EC128, EC126, EC124.

LCD1.34 link to +3.3V_RUN ; LCD1.33 link to LCD_BRIGHTNESS ; LCD1.32 to GND ;
LCD1.31 link to LCD_CBL_DET#.

Dummy U25.C21 link R502 to GND; U25.C11 link R503 to GND;
Dummy U25.AE18 link R504 to GND; U25.AF21 link R505 to GND.
Dummy R421, R424.

CN4 Pin.51 should be ground.
LID SW is push-pull type, no need pull high.

Qty issue to change another.

Remove debug board connector.
For debug mini card, change LPC Bus to mini card base.
Set dummy res to avoid damaging MB or additional mini card.

For debug mini card.
Set dummy res to avoid damaging MB or additional mini card.

New R and C are for EMC pre-location.
Dummy R406 for no keyboard detect function.
R change to 100k for save power.

KBC can control WP# of Flash ROM.
R change to 100k for save power.

Avoiding noise to impact CRT signals. EE

For EMI.

For EMI. EE

For LED backlight panel. EE

SW check vender ID by SMBus.

Avoiding abnormal action in U25(ICH9-M). EE

OWNERDATE VERSON Issue DescriptionModified ListNO

EE

EE
EE

EE

EE

EE

EE

EE

EE

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Change List - EE (1/2)

Change List - EE (1/2)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet

Date: Sheet

Date: Sheet of

Change List - EE (1/2)

Roberts

Roberts

Roberts

56 58Thursday, October 02, 2008

56 58Thursday, October 02, 2008

56 58Thursday, October 02, 2008

1

of

of

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5

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1

DATE VERSON Issue Description

D D

07/30

X02

08/06

C C

08/07

08/11
08/15

09/02

A0009/03

B B

09/09
09/10

09/22

10/02

PAGE

18 Staff R421, R424. (PT build cut-in) EE

34
35

23 EE
20 EE

36

21 EE

37

24 EE

38

35 EE

39

22,23

40

36

41

37 EE

42
43

47 EE
09 EE

44

41 EE

45

04

46

- EE

47

24,32 EE

48

37 EE

49

- EE

50

19 EE

51

23

52

32 EE

53

11 EE

54

21 EE

55

24

56

24 EE

57

05,17 EE

58

12,20,

59

24

37

60

19 EE

61

04 EE

62

21 EE

63

04 EE

64

25 EE

65

23 EE

66
67 21 Dummy R284, C318.

Dummy R290 ; Staff R291. (PT build cut-in)
Add dummy R507.
Short R253, R254.
Staff R138, R150 ; Dummy R141, R151.
Add R508 ; Change R359 to 49.9k ohm.
Move C535 (Change 0.033uF), R472 to page.23.

Remove C536 (Change 0.033uF), C542.
Add R484 to gnd ; Add C566 for AUD_SET, C567 for AUD_BIAS.
C565 for 6040 only.

Material change: HDD1
Material change: CARD1
Material change: SPR4
Add TP271 for U52/ SDVO_CTRLDATA.
Short R79, R80.
Symbol change: U54.
Change to close line:

R204, R200, R356, R139, R152, R408, R394, R390, R403, R402, R96, R120, R378,
R360, R140, R373, R97, R405, R155, R154, R262, R266, R439, R265, R226, R269,
R174, R175, R183, R432, R433, R434, R430, R431, R437, R191, R177, R270, R188,
R436, R452, R259, R282, R250, R249, R467, R153, R81, R77.

Move R182 to page.24.
Short R428, R426 ; Add DY L21.
Short R139, R96 , R155, R154, R226, R174, R175, R432, R433.
Staff C488.
Use 2.2uF C564 and C557 for Maxim U62 IC. For improving bobo sound.
Material change: TC23. (DY) Material issue.
Material change: TC19, TC21. Material issue.
USB_PP10 for U34.5 ; USB_PN10 for U34.4. (ST build cut-in) Schematic modification.
Staff R151 ; Dummy R150. PCB Version for -1(Xbuild).
Add dummy R509 to gnd for KBC GPIO24. (09/10 update) For GM45.
Dummy R76 ; Staff R167 For H_THRMTRIP# to SB.
Change to close line:

R115, R246, R182, R158, R159, R170.
Remove L21. No need L21.

Staff R453, C511 ; DY C521. Follow Intel DG 2.0.
Short RN42, RN43, RN44, RN45, RN48, RN22, RN23, RN54, RN53, RN52, RN51. No need 0 ohm R.
Add dummy R510 and C568.

Staff R282 0 ohm.
Dummy R196. For debug. Normally, no need it.

R82 change to 10k ; R78 change to 2.37k. For T8 thermal shutdown setting.
Staff R288 ; Dummy R289. For Audio amp. gain.

Staff R282 to Bead 68.00082.531.
Staff R510 to 2.2K ; Staff C568.

Modified ListNO

Avoiding always issue interrupt event.

Adjust audio amp. gain value.

Add RUN power for LAN.

No need 0 ohm R.

PCB Version for SC.

For LCD power sequence.

For PC beep.

ME request.

ME request.

ME request.

TP.

No need 0 ohm R.

For clock generator co-layout.

No need 0 ohm R.

Movement.

Pre-location for Minicard USB trace.

No need 0 ohm R.

For DMI.

No need 0 ohm R.

For U34 power bounce issue.

OWNER

EE

EE

EE

EE

EE

EE
EE

EEFor U34 power bounce issue.

A A

5

4

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Change List - EE (2/2)

Change List - EE (2/2)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet

Date: Sheet

Date: Sheet of

Change List - EE (2/2)

Roberts

Roberts

Roberts

57 58Thursday, October 02, 2008

57 58Thursday, October 02, 2008

57 58Thursday, October 02, 2008

1

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of

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A

B

C

D

E

PAGE

1
2

34

06/03

4 4

06/05

06/06

X01

06/10
06/18

06/23
07/30

3 3

08/11

09/03

X02

A00

xx

xx

3

4

5

36

6

27
28

7

8

31 PC9 to GND otherwise DC-DC IC can not obtain power to

9

31

10

30

18,24

11

31

12

30

13
14

26,45

31 Change PR7 value from 622k to 619k ohm. For 2nd source.

15
16 Power team request.

26,45 Material change: U37, U46, U47.

17

26,27,
28,31

18

26 R61 change 4.7k to 10k. Power team request.

19
20
21

R189 change to 2.2K ohm, C216 dummy.32 For +1.5V_RUN sequence.
C378 change to 0.01uF.30 For +1.05V_VCCP sequence.
C316 change from 4.7nF to 0.01uF.

Staff C314 and change from 4.7nF to 6.8nF.34

Dummy Q20, U57, R462, R457, C527 and U58, U28, R251, R252, C293, C295
Change R258, R256 to G81, G82
Change R278, R279, R277, R276 to G83, G84, G85, G86

R136 change to 270k and R108 change to 237k
R38 change to 12.1k

R323 change to 3.92k , C360 change to 0.047 uF 10V X7R
PC9 to GND.

PR2 change to 9.31k ohm.
Add D23.
Remove U60, R482, R476 and change trace name VRMPWRGD to VGATE_PWRGD.
PR7.1 link to +5116_PWR_SRC.
Rename "+1.05V_SUSP" to "+1.05V_RUNP"

For +3.3V_RUN sequence and improve +3.3V_ALW voltage drop
due to SW(U31) turn on quickly (higher loading).

due to SW(U30) turn on quickly (higher loading).
No sniffer function, no control HDD & ODD power.

For 5V/3.3V OCP
R38 for VCORE OCP

R323 and C360 for transient and load line.

generate 1.8V/0.9V output.
For 1.8V OCP.

For power sequence.
For power sequence.
Reserve for other source.
Correct naming.

Material change: U37, U46, U47. NIKO-SEM P2003EVG component has some risk.

Change to close line:
R46 ,R137 ,R127,R106 ,R384 ,R391 ,R35 ,R29 ,R307 ,R308 ,R309 ,R303 ,R304 ,
R298 ,R301 ,R310 ,R313 ,PR14.

No need 0 ohm R.

OWNERDATE VERSON Issue DescriptionModified ListNO

Power EE
Power EE
Power EE

Power EEFor +5V_RUN sequence and improve +5V_ALW voltage drop

Power EE

Power EE

Power EE
Power EE

Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE
Power EE

Power EE

22

xx

2 2

xx

1 1

23 x x x
24 x x x
25 x x x

A

B

C

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Change List - Power

Change List - Power

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet

Date: Sheet

D

Date: Sheet of

Change List - Power

Roberts

Roberts

Roberts

Power EE
Power EE
Power EE

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

A00

A00

58 58Thursday, October 02, 2008

58 58Thursday, October 02, 2008

58 58Thursday, October 02, 2008

E

A00

of

of