Dell PP36L Schematics

1bios.ru

A

B

C

D

E

Model Name:
PCB NO:
BOM P/N:

1 1

KML50 DIS
LA-4595PR04
DA80000DR00

Half Penny Bridge 15.4

2 2

Compal Confidential

Schematic Document

Cantiga + ICH9

2009 / 02 / 17

3 3

4 4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

Rev:1.0(A00)

Compal Secret Data

Compal Secret Data

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

C

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

Cover Sheet

Cover Sheet

Cover Sheet

LA-4595P

LA-4595P

LA-4595P

E

1 49Tuesday, February 17, 2009

1.0

1.0

1.0

of

of

of

1 49Tuesday, February 17, 2009

1 49Tuesday, February 17, 2009

1bios.ru

A

B

C

D

E

Compal confidential

Half Penny Bridge 15.4 DIS

File Name : LA-4595P

ZZZ1

ZZZ1

PCB

PCB

1 1

CRT

+CRT_VCC

P.16

LVDS Panel Interface

+B+
+3VS
+LCDVDD

P.16

Thermal Sensor
EMC1402-2-ACZL-TR

+3VS

Fan conn

+5VS

P.4

P.4

nVidia
NB9M-GS

+VGA_CORE

VRAM x 2

+1.8VS +USB_BS +USB_CS

2 2

P.35

CardBus Controller

O2MICRO OZ888

+1.8VS_CB

+3VS_PHY

1394

+1.1V_GFX_PCIE

+1.8VS

+3VS

P.30

Media Card

+3VS_CR

P.31,32,33,34

PCI -E BUS

DMI X4

PCI-E BUS

Penryn -4MB (Socket P)

+CPU_CORE

+VCCP

+1.5VS

uFCPGA-478 CPU

P.4,5,6

H_A#(3..35)

H_D#(0..63)

FSB

800/1066MHz 1.05V

Intel Cantiga MCH

+VCCP

+1.05VS_DPLLA

+1.05VS_DPLLB

+1.8V_TXLVDS

1329pin BGA

+3VS_DAC_CRT

+3VS_DAC_BG

Intel ICH9-M

+RTCVCC

+1.5VS

+VCCP
+3VALW

676pin BGA

P.17,18,19,20

P.7,8,9,10,11,12

C-Link

DDR2 667/800MHz 1.8V

Dual Channel

USB2.0

Azalia

SATA 0

SATA 1

DDR2-SO-DIMM X2

BANK 0, 1, 2, 3

+1.8V

+0.9VS

P.13,14

USB conn x 4

+USB_AS

FingerPrinter

+3VS

Felica Conn

+5VS

BT Conn

+3VS

Camera

+3VS +5VS

P.29

P.29

P.29

P.16

CK505

Clock Generator
ICS9LPRS387AKLFT

+1.05VS_CK505

+3VS_CK505

P.29

TSSOP-64

P.15

10/100/1000 LAN

REALTEK
RTL8111DL

+LAN_IO

3 3

RJ45/11 CONN

P.21

P.21

Mini-Card-2
(WLAN)

+1.5VS

+3VS

P.23 P.23 P.26

Mini-Card-1
(WWAN)

+1.5VS

+3VS

SIM CON

+UIM_PWR

Express Card

+1.5VS

+3VS

LPC BUS

Express Card

+3VS +1.5VS

Mini-Card-1

Mini-Card-2

+1.5VS+3VS

+1.5VS+3VS

P.26

P.23

P.23

Digi Mic

P.16

+3VS

Audio Jack

+MIC1_VREFO

P.24

Mini-Card-2

+1.5VS+3VS

P.23

ENE KB926

+3VALW

+EC_AVCC

P.27

TPM

SLB 9635

+3VALW

+3VS

P.28

Audio CODEC
IDT92HD81

+5VS +3VS

P.24

SATA HDD Connector

Power On/Off CKT.

+3VALW

4 4

DC/DC Interface CKT.

+3VS

+5VS

P.28

P.36

RTC CKT.

+RTCVCC

P.18

Power Circuit DC/DC

P.39~P.49

A

Touch Pad CONN. Int.KBD

+5VS

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

BIOS(System/EC)

+3VALW

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

C

P.27P.28P.28

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

+5VS

CDROM Conn.

+5VS

D

P.22

P.22

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Block diagram

Block diagram

Block diagram

LA-4595P

LA-4595P

LA-4595P

E

of

of

of

2 49Tuesday, February 17, 2009

2 49Tuesday, February 17, 2009

2 49Tuesday, February 17, 2009

1.0

1.0

1.0

1bios.ru

Voltage Rails

power
plane

State

O MEANS ON X MEANS OFF

+5VALW

+B

+3VALW

+1.8V

+5VS

+3VS

+1.5VS

+0.9VS

+VCCP

+CPU_CORE

+VGA_CORE

+1.8VS

+1.1V_GFX_PCIEP

A

Symbol Note :

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build

CON@ : means ME connectors

TPM@ : means TPM function

PCI EXPRESS

DESTINATION

SATA

DESTINATION

Lane 1

Lane 2

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

1 1

USB PORT#

O

O

O

O

O

X

0

1

2

3

ICH9-M

4

5

6

7

9

O

O

O

O

X

O

X X

X

X X X

DESTINATION

JUSBP1

CAMERA

JUSBP3 TOP

Felica

Blue Tooth

Finger Printer

JMINI2-WLAN

Express card

JUSBP3 BOT8

JMINI1-WWAN

JUSBP410

OO

OO

X

Lane 3

Lane 4

Lane 5

Lane 6

X

SMBUS Control Table

SMB_EC_CK1
SMB_EC_DA1

SMB_EC_CK2
SMB_EC_DA2

SMB_CK_CLK1
SMB_CK_DAT1 ICH9

LCD_CLK
LCD_DAT

I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0

DDR SO-DIMM 1

CLOCK GENERATOR (EXT.)

LED panel 58 0 1 0 1 1 0 0 0

MINI CARD-1 WWAN

GLAN RTL8111DL

MINI CARD-2 WLAN

EXPRESS CARD

CARD READER OZ888

NA

SOURCE

KB926

KB926

INVERTER BATT EEPROM

X
X

X

Cantiga

X X

HEX

A0

D2

SERIAL SENSOR

V V

X X

X

X

X X

ADDRESS

1 0 1 0 0 0 0 0

1 0 1 0 0 1 0 0A4

1 1 0 1 0 0 1 0

THERMAL

(CPU)

X X

V

X

Lane 0

Lane 1

Lane 4

Lane 5 NA

SODIMM CLK CHIP

X

X

X

V V

X X

HDD

ODD

NA

MINI CARD

X X
X

X

X

LCD

X

X

V

11

NA

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

2005/03/10 2006/03/10

2005/03/10 2006/03/10

2005/03/10 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Notes List

Notes List

Notes List

LA-4595P

LA-4595P

LA-4595P

3 49Tuesday, February 17, 2009

3 49Tuesday, February 17, 2009

3 49Tuesday, February 17, 2009

of

of

of

1.0

1.0

1.0

1bios.ru

5

D D

CONN@

H_A#[3..16]< 7>

H_ADSTB#0<7>

H_REQ#0<7>
H_REQ#1<7>
H_REQ#2<7>
H_REQ#3<7>
H_REQ#4<7>

C C

B B

A A

H_A#[17..35]<7>

H_ADSTB#1<7>

H_A20M#<18>
H_FERR#<18>
H_IGNNE#<18>

H_STPCLK#<18>
H_INTR<18>
H_NMI<18>
H_SMI#<18>

+VCCP

B

B

E

H_PROCHOT# OCP#

H_IERR#

E

3 1

Q2

@

Q2

@

MMBT3904_SOT23

MMBT3904_SOT23

+VCCP

12

@

@

R17

R17
56_0402_5%

56_0402_5%

2

C

C

R18

R18
56_0402_5%

56_0402_5%

1 2

5

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1

H_A20M#
H_FERR#
H_IGNNE#

H_STPCLK#
H_INTR
H_NMI
H_SMI#

CONN@

JCPU1A

JCPU1A

J4

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD[01]

N5

RSVD[02]

T2

RSVD[03]

V3

RSVD[04]

B2

RSVD[05]

D2

RSVD[06]

D22

RSVD[07]

D3

RSVD[08]

F6

RSVD[09]

Penryn

Penryn

OCP# <19>

ADDR GROUP_0

ADDR GROUP_0

ADDR GROUP_1

ADDR GROUP_1

THERMAL

THERMAL

ICH

ICH

THERMTRIP#

RESERVED

RESERVED

ADS#
BNR#

BPRI#

DEFER#

DRDY#
DBSY#

BR0#

IERR#

INIT#

LOCK#

CONTROL

CONTROL

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HIT#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TRST#

DBR#

XDP/ITP SIGNALS

XDP/ITP SIGNALS

PROCHOT#

THERMDA
THERMDC

H CLK

H CLK

BCLK[0]
BCLK[1]

TCK

TDO
TMS

H1
E2
G5

H5
F21
E1

F1

D20
B3

H4

C1
F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6

TDI

AB3
AB5
AB6
C20

D21
A24
B25

C7

A22
A21

4

H_ADS#
H_BNR#
H_BPRI#

H_DEFER#
H_DRDY#
H_DBSY#

H_BR0#

H_IERR#
H_INIT#

H_LOCK#

H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#

H_HIT#
H_HITM#

XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#

H_PROCHOT#

H_THERMDC_R

H_THERMTRIP#

CLK_CPU_BCLK
CLK_CPU_BCLK#

4

H_ADS# <7>
H_BNR# <7>
H_BPRI# <7>

H_DEFER# <7>
H_DRDY# <7>
H_DBSY# <7>

H_BR0# <7>

H_INIT# <18>

H_LOCK# <7>

H_RESET# <7>
H_RS#0 <7>
H_RS#1 <7>
H_RS#2 <7>
H_TRDY# <7>

H_HIT# <7>
H_HITM# <7>

T84T84

XDP_DBRESET# <19>

R146

68_0402_1%~D

R146

R57 100_0402_5%R57 100_0402_5%
R53 100_0402_5%R53 100_0402_5%

H_THERMTRIP# <7,18>

CLK_CPU_BCLK <15>
CLK_CPU_BCLK# <15>

68_0402_1%~D

1 2
1 2

H_THERMDA, H_THERMDC routing together,
Trace width / Spacing = 10 / 10 mil

+VCCP

H_THERMDAH_THERMDA_R
H_THERMDC

3

C5

C5

1 2

+3VS

+3VS

1

C13

C13

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2200P_0402_50V7K

2200P_0402_50V7K

R16

R16

1 2

10K_0402_5%

10K_0402_5%

2

H_THERMDA

H_THERMDC

L_THERM#

FAN Control circuit

C94

C94

2

EN_DFAN1

+3VS

12

2

1

EN_DFAN1<27>

FAN_SPEED1<27>

0.01U_0402_16V7K

0.01U_0402_16V7K

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

1

XDP_TDI

XDP_TMS

XDP_TRST#

XDP_TCK

R5 54.9_0402_1%R5 54.9_0402_1%

1 2

R4 54.9_0402_1%R4 54.9_0402_1%

1 2

R11 54.9_0402_1%R11 54.9_0402_1%

1 2

R35 54.9_0402_1%R35 54.9_0402_1%

1 2

This shall place near CPU

Thermal Sensor EMC1402-1-ACZL-TR

U2

1

2

3

EMC1402-2-ACZL-TR MSOP 8P

EMC1402-2-ACZL-TR MSOP 8P

Address:100_11000

R61

R61

10K_0402_5%

10K_0402_5%

3

U2

VDD

SCLK

D+

SDATA

ALERT#

D-

THERM#4GND

C76

C76

10U_1206_16V4Z~N

10U_1206_16V4Z~N

C88

C88

1000P_0402_50V7K~N

1000P_0402_50V7K~N

FAN1_POWER

2

D61

D61
PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

@

@

1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

EC_SMB_CK2

8

EC_SMB_DA2

7

6

5

12

+5VS

1 2

12

40mil

LA-4595P

LA-4595P

LA-4595P

C77 10U_1206_16V4Z~NC77 10U_1206_16V4Z~N

U3

U3

1

VEN

2

VIN

3

VO

4

VSET

RT9027BPS SO 8P

RT9027BPS SO 8P

JFAN1

JFAN1

1

1

2

2

3

3

4

GND

5

GND

ACES_85205-03001

ACES_85205-03001

conn@

conn@

FAN1

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Penryn(1/3)-AGTL+/ITP-XDP

Penryn(1/3)-AGTL+/ITP-XDP

Penryn(1/3)-AGTL+/ITP-XDP

EC_SMB_CK2 <16,27,31>

EC_SMB_DA2 <16,27,31>

8

GND

7

GND

6

GND

5

GND

1

+VCCP

4 49Tuesday, February 17, 2009

4 49Tuesday, February 17, 2009

4 49Tuesday, February 17, 2009

1.0

1.0

1.0

of

of

of

1bios.ru

5

4

3

2

1

CONN@

H_D#[0..15]<7>

D D

H_DSTBN#0<7>
H_DSTBP#0<7>
H_DINV#0<7>
H_D#[16..31]<7>

C C

H_DSTBN#1<7>
H_DSTBP#1<7>
H_DINV#1<7>

T50T50
T51T51
T2T2
T3T3
T4T4
T5T5

T6T6

CPU_BSEL0<15>
CPU_BSEL1<15>
CPU_BSEL2<15>

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1

+V_CPU_GTLREF

TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
TEST7
CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

layout note: Rout H_DPRSTP# from ICH9 to IMVP6 then to GMCH & CPU

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

CPU_BSEL CPU_BSEL2 CPU_BSEL1

B B

166

200

0 1

0

1

CONN@

JCPU1B

JCPU1B

E22

D[0]#

F24

D[1]#

E26

D[2]#

G22

D[3]#

F23

D[4]#

G25

D[5]#

E25

D[6]#

E23

D[7]#

K24

D[8]#

G24

D[9]#

J24

D[10]#

J23

D[11]#

H22

D[12]#

F26

D[13]#

K22

D[14]#

H23

D[15]#

J26

DSTBN[0]#

H26

DSTBP[0]#

H25

DINV[0]#

N22

D[16]#

K25

D[17]#

P26

D[18]#

R23

D[19]#

L23

D[20]#

M24

D[21]#

L22

D[22]#

M23

D[23]#

P25

D[24]#

P23

D[25]#

P22

D[26]#

T24

D[27]#

R24

D[28]#

L25

D[29]#

T25

D[30]#

N25

D[31]#

L26

DSTBN[1]#

M26

DSTBP[1]#

N24

DINV[1]#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

C3

TEST7

B22

BSEL[0]

B23

BSEL[1]

C21

BSEL[2]

Penryn

Penryn

CPU_BSEL0

H_D#32

Y22

MISC

MISC

DATA GRP 0

DATA GRP 0

DATA GRP 1

DATA GRP 1

D[32]#
D[33]#
D[34]#
D[35]#
D[36]#
D[37]#
D[38]#
D[39]#
D[40]#

DATA GRP 2DATA GRP 3

DATA GRP 2DATA GRP 3

D[41]#
D[42]#
D[43]#
D[44]#
D[45]#
D[46]#

D[47]#
DSTBN[2]#
DSTBP[2]#

DINV[2]#

D[48]#

D[49]#

D[50]#

D[51]#

D[52]#

D[53]#

D[54]#

D[55]#

D[56]#

D[57]#

D[58]#

D[59]#

D[60]#

D[61]#

D[62]#

D[63]#
DSTBN[3]#
DSTBP[3]#

DINV[3]#

COMP[0]
COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#
DPWR#

PWRGOOD

SLP#

PSI#

AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3

COMP0
COMP1
COMP2
COMP3

H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGOOD
H_CPUSLP#
H_PSI#

1

H_D#[32..47] <7>

H_DSTBN#2 <7>
H_DSTBP#2 <7>
H_DINV#2 <7>
H_D#[48..63] <7>

H_DSTBN#3 <7>
H_DSTBP#3 <7>
H_DINV#3 <7>

H_DPRSTP# <7,18,47>
H_DPSLP# <18>

H_DPWR# <7>

H_PWRGOOD <18>
H_CPUSLP# <7>

H_PSI# <47>

R23

12

54.9_0402_1%

54.9_0402_1%

Resistor p laced with in

0.5" of CP U pin.Trac e
should be at least 2 5
mils away from any o ther
toggling s ignal.
COMP[0,2] trace widt h is
18 mils. C OMP[1,3] t race
width is 4

12

12

54.9_0402_1%

54.9_0402_1%

27.4_0402_1%

27.4_0402_1%

27.4_0402_1%

27.4_0402_1%

R25

R25

R24

R24

R23

0

+CPU_CORE +CPU_CORE

R26

R26

12

AA7

AA9
AA10
AA12
AA13
AA15
AA17
AA18
AA20

AB9
AC10
AB10
AB12
AB14
AB15
AB17
AB18

CONN@

CONN@

JCPU1C

JCPU1C

A7

VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]

Penryn

Penryn

VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA[01]
VCCA[02]

VCCSENSE

VSSSENSE

A9
A10
A12
A13
A15
A17
A18
A20

B7

B9
B10
B12
B14
B15
B17
B18
B20

C9
C10
C12
C13
C15
C17
C18

D9
D10
D12
D14
D15
D17
D18

E7

E9
E10
E12
E13
E15
E17
E18
E20

F7

F9
F10
F12
F14
F15
F17
F18
F20

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

AF7

AE7

VCCSENSE

VSSSENSE

CPU_VID0 <47>
CPU_VID1 <47>
CPU_VID2 <47>
CPU_VID3 <47>
CPU_VID4 <47>
CPU_VID5 <47>
CPU_VID6 <47>

VCCSENSE <47>

VSSSENSE <47>

220U_D2_4VY_R15M

220U_D2_4VY_R15M

+VCCP

C10

C10

10U_0805_6.3V6M

10U_0805_6.3V6M

1

+

+

2

1

C12

C12

2

+1.5VS

1

C11

C11

2

0.01U_0402_16V7K

0.01U_0402_16V7K

Near pin B26

266 0 0 0

+VCCP

12

R27

R27
1K_0402_1%

1K_0402_1%

12

R29

R29
2K_0402_1%

2K_0402_1%

+V_CPU_GTLREF

Close to CPU pin AD26

For 8 layer condition
Length match within 25 mils.Z0=27.4 ohm
The trace width/space/other is 20/7/25.

+CPU_CORE

R28 100_0402_1%R28 100_0402_1%

1 2

R30 100_0402_1%R30 100_0402_1%

1 2

VCCSENSE

VSSSENSE

within 500mils.

A A

Close to CPU pin
within 500mils.

Security Classification

Security Classification

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Penryn(2/3)-AGTL+/ITP-XDP

Penryn(2/3)-AGTL+/ITP-XDP

Penryn(2/3)-AGTL+/ITP-XDP

LA-4595P

LA-4595P

LA-4595P

1

1.0

1.0

1.0

of

of

of

5 49Tuesday, February 17, 2009

5 49Tuesday, February 17, 2009

5 49Tuesday, February 17, 2009

1bios.ru

5

High Frequence Decoupling

10uF 0805 X5R -> 85 degree.

Place these caps inside
the CPU socket cavity.

( Left side on Top ).

D D

C C

B B

CONN@

CONN@

JCPU1D

JCPU1D

A4

VSS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

Penryn

Penryn

VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

.

.

Place these caps inside
the CPU socket cavity.

( Right side on Top side).

Place these caps inside
the CPU socket cavity.

( Left side on Bottom ).

Place these caps inside
the CPU socket cavity.

( Right side on Bottom ).

Place these caps inside
the CPU socket.

+VCCP

1

C213

C213

0.1U_0402_10V6K

0.1U_0402_10V6K

2

4

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

+CPU_CORE

C196

C196

1

C209

C209

0.1U_0402_10V6K

0.1U_0402_10V6K

2

1

C204

C204
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C178

C178
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C501

C501
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C502

C502
10U_0805_6.3V6M

10U_0805_6.3V6M

2

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

1

+

+

2

C198

C198

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

1

+

+

2

1

2

1

C205

C205
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C202

C202
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C508

C508
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C510

C510
10U_0805_6.3V6M

10U_0805_6.3V6M

2

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

1

C259

C259

+

+

2

C212

C212

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C529

C529
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C254

C254
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C514

C514
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C515

C515
10U_0805_6.3V6M

10U_0805_6.3V6M

2

330U_D2E_2.5VM_R9

330U_D2E_2.5VM_R9

Place these caps inside

1

C255

C255

the CPU socket.

+

+

( Right side on Top side).( Left side on Top ).

2

1

C185

C185

0.1U_0402_10V6K

0.1U_0402_10V6K

2

3

1

C232

C232
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C190

C190
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C519

C519
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C520

C520
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C183

C183

0.1U_0402_10V6K

0.1U_0402_10V6K

2

1

C258

C258
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C203

C203
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C522

C522
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C526

C526
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C505

C505
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C200

C200
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C533

C533
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C532

C532
10U_0805_6.3V6M

10U_0805_6.3V6M

2

ESR <= 1.5m ohm

Capacitor > 880 uF

Place these inside
socket cavity on L8
(North side
Secondary)

1

C184

C184

0.1U_0402_10V6K

0.1U_0402_10V6K

2

2

1

C504

C504
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C182

C182
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C257

C257
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C199

C199
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C261

C261
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

C208

C208
10U_0805_6.3V6M

10U_0805_6.3V6M

2

1

Place these caps inside
the CPU socket.

1

( Left side on Top ).

C214

C214
10U_0805_6.3V6M

10U_0805_6.3V6M

2

Place these caps inside
the CPU socket.

1

( Right side on Top ).

C226

C226
10U_0805_6.3V6M

10U_0805_6.3V6M

2

A A

Security Classification

Security Classification

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Penryn(3/3)-AGTL+/ITP-XDP

Penryn(3/3)-AGTL+/ITP-XDP

Penryn(3/3)-AGTL+/ITP-XDP

LA-4595P

LA-4595P

LA-4595P

1

1.0

1.0

1.0

of

of

of

6 49Tuesday, February 17, 2009

6 49Tuesday, February 17, 2009

6 49Tuesday, February 17, 2009

1bios.ru

5

U4A

24.9_0402_1%

24.9_0402_1%

F2

G8

F8

E6
G2
H6
H2

F6
D4
H3
M9

M11

J1
J2

N12

J6
P2
L2

R2
N9

L6

M5

J3

N2
R1
N5
N6

P13

N8

L7

N10

M3

Y3

AD14

Y6

Y10
Y12
Y14

Y7

W2

AA8

Y9

AA13

AA9
AA11
AD11
AD10
AD13
AE12

AE9

AA2

AD8

AA3

AD3

AD7
AE14

AF3

AC1

AE3

AC3
AE11

AE8

AG2

AD6

C5

E3

C12

E11

A11

B11

H_RCOMP

12

R324

R324

U4A

H_D#_0
H_D#_1
H_D#_2
H_D#_3
H_D#_4
H_D#_5
H_D#_6
H_D#_7
H_D#_8
H_D#_9
H_D#_10
H_D#_11
H_D#_12
H_D#_13
H_D#_14
H_D#_15
H_D#_16
H_D#_17
H_D#_18
H_D#_19
H_D#_20
H_D#_21
H_D#_22
H_D#_23
H_D#_24
H_D#_25
H_D#_26
H_D#_27
H_D#_28
H_D#_29
H_D#_30
H_D#_31
H_D#_32
H_D#_33
H_D#_34
H_D#_35
H_D#_36
H_D#_37
H_D#_38
H_D#_39
H_D#_40
H_D#_41
H_D#_42
H_D#_43
H_D#_44
H_D#_45
H_D#_46
H_D#_47
H_D#_48
H_D#_49
H_D#_50
H_D#_51
H_D#_52
H_D#_53
H_D#_54
H_D#_55
H_D#_56
H_D#_57
H_D#_58
H_D#_59
H_D#_60
H_D#_61
H_D#_62
H_D#_63

H_SWING
H_RCOMP

H_CPURST#
H_CPUSLP#

H_AVREF
H_DVREF

CANTIGA_1p0

CANTIGA_1p0

+VCCP

221_0603_1%

221_0603_1%

100_0402_1%

100_0402_1%

H_ADSTB#_0
H_ADSTB#_1

H_DEFER#

HPLL_CLK

HPLL_CLK#

H_DPWR#

HOST

HOST

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

12

R322

R322

H_SWNG

12

1

C386

C386

R323

R323

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

H_D#[0..63]<5>

D D

C C

H_RESET#<4>

H_CPUSLP#<5>

B B

H_RCOMP Dual core 24.9 ohm_1% pull down
Quad core 16.9 ohm_1% pull down
H_SWNG Dual core 100 ohm_1% pull down
Quad core 75 ohm_1% pull down

Layout Not e:
H_RCOMP / H_VREF / H_SWNG

trace wid th and spa cing is 10 /20

+VCCP

12

R45

R45

1K_0402_1%

1K_0402_1%

A A

12

R46

2K_0402_1%

2K_0402_1%

R46

0.1U_0402_16V4Z

0.1U_0402_16V4Z

H_SWNG
H_RCOMP

H_RESET#
H_CPUSLP#

+H_VREF

+H_VREF

@

@

1

C391

C391

2

H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

Near B3 pinwithin 100 mils from NB

CRB-no stuff
Checklist-no

5

10/16

H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8

H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31

H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#

H_BNR#
H_BPRI#

H_BREQ#

H_DBSY#

H_DRDY#

H_HIT#

H_HITM#
H_LOCK#
H_TRDY#

H_RS#_0

H_RS#_1

H_RS#_2

4

H_A#3

A14

H_A#4

C15

H_A#5

F16

H_A#6

H13

H_A#7

C18

H_A#8

M16

H_A#9

J13

H_A#10

P16

H_A#11

R16

H_A#12

N17

H_A#13

M13

H_A#14

E17

H_A#15

P17

H_A#16

F17

H_A#17

G20

H_A#18

B19

H_A#19

J16

H_A#20

E20

H_A#21

H16

H_A#22

J20

H_A#23

L17

H_A#24

A17

H_A#25

B17

H_A#26

L16

H_A#27

C21

H_A#28

J17

H_A#29

H20

H_A#30

B18

H_A#31

K17

H_A#32

B20

H_A#33

F21

H_A#34

K21

H_A#35

L20

H_ADS#

H12

H_ADSTB#0

B16

H_ADSTB#1

G17

H_BNR#

A9

H_BPRI#

F11

H_BR0#

G12

H_DEFER#

E9

H_DBSY#

B10

CLK_MCH_BCLK

AH7

CLK_MCH_BCLK#

AH6

H_DPWR#

J11

H_DRDY#

F9

H_HIT#

H9

H_HITM#

E12

H_LOCK#

H11

H_TRDY#

C9

H_DINV#0

J8

H_DINV#1

L3

H_DINV#2

Y13

H_DINV#3

Y1

H_DSTBN#0

L10

H_DSTBN#1

M7

H_DSTBN#2

AA5

H_DSTBN#3

AE6

H_DSTBP#0

L9

H_DSTBP#1

M8

H_DSTBP#2

AA6

H_DSTBP#3

AE5

H_REQ#0

B15

H_REQ#1

K13

H_REQ#2

F13

H_REQ#3

B13

H_REQ#4

B14

H_RS#0

B6

H_RS#1

F12

H_RS#2

C8

ICH_PWROK<19,27>

VGATE<19,27,47>

Layout Note:
V_DDR_MCH_REF
trace width and
spacing is 20/20.

+V_DDR_MCH_REF<13,14>

4

H_A#[3..35] <4>

+SMRCOMP_VOH

H_ADS# <4>
H_ADSTB#0 <4>
H_ADSTB#1 <4>
H_BNR# <4>
H_BPRI# < 4>
H_BR0# <4>
H_DEFER# <4>
H_DBSY# <4>
CLK_MCH_BCLK <15>
CLK_MCH_BCLK# <15>
H_DPWR# <5>
H_DRDY# <4>
H_HIT# <4>
H_HITM# <4>
H_LOCK# <4>
H_TRDY# <4>

H_DINV#0 <5>
H_DINV#1 <5>
H_DINV#2 <5>
H_DINV#3 <5>

H_DSTBN#0 <5>
H_DSTBN#1 <5>
H_DSTBN#2 <5>
H_DSTBN#3 <5>

H_DSTBP#0 <5>
H_DSTBP#1 <5>
H_DSTBP#2 <5>
H_DSTBP#3 <5>

H_REQ#0 <4>
H_REQ#1 <4>
H_REQ#2 <4>
H_REQ#3 <4>
H_REQ#4 <4>

H_RS#0 <4>
H_RS#1 <4>
H_RS#2 <4>

PLT_RST#<17,27,30,31>

H_THERMTRIP#<4,18>

DPRSLPVR<19,47>

1 2

R408 0_0402_5%R408 0_0402_5%

1 2

R407 0_0402_5%@R407 0_0402_5%@

+V_DDR_MCH_REF

0.1U_0402_16V4Z

0.1U_0402_16V4Z

3

T7T7
T11T11
T12T12

+1.8V

1

1

12

R331

C398

C398

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

2

1

C403

C403

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

1

C121

C121

2

R331

C400

C400

1K_0402_1%

1K_0402_1%

0.01U_0402_25V7K

0.01U_0402_25V7K

2

12

R332

R332

3.01K_0402_1%

3.01K_0402_1%

12

R333

R333

1

1K_0402_1%

1K_0402_1%

C404

C404

2

0.01U_0402_25V7K

0.01U_0402_25V7K

R82

R82

PM_EXTTS#0

PM_EXTTS#1

PM_PWROK_R

+1.8V

12

R42

R42
1K_0402_1%

1K_0402_1%

12

R43

R43
1K_0402_1%

1K_0402_1%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

1 2

10K_0402_5%

10K_0402_5%

R83

R83

1 2

10K_0402_5%

10K_0402_5%

MCH_CLKSEL0<15>
MCH_CLKSEL1<15>
MCH_CLKSEL2<15>

CFG16<9>

CFG19<9>
CFG20<9>

PM_BMBUSY#<19>

H_DPRSTP#<5,18,47>
PM_EXTTS#0<13>
PM_EXTTS#1<14>

1 2

R523 100_0402_5%R523 100_0402_5%

3

T13T13
T14T14
T15T15
T16T16
T17T17
T18T18
T19T19
T20T20
T21T21
T22T22
T24T24

T25T25
T26T26
T27T27

T28T28

T41T41
T44T44
T73T73
T74T74

+3VS

MCH_CLKSEL0
MCH_CLKSEL1
MCH_CLKSEL2

T8PAD T8PAD

T9PAD T9PAD

CFG5<9>
CFG6<9>
CFG7<9>

CFG9<9>

CFG5
CFG6
CFG7

T37PAD T37PAD

CFG9

T65PAD T65PAD

T40PAD T40PAD

CFG12

T67PAD T67PAD

CFG13

T47PAD T47PAD

T10PAD T10PAD

T66PAD T66PAD

CFG16

T68PAD T68PAD

T39PAD T39PAD

CFG19
CFG20

PM_BMBUSY#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1

PM_PWROK_R

PLT_RST#_NBPLT_RST#
H_THERMTRIP#
DPRSLPVR

2008/09/24 2006/03/10

2008/09/24 2006/03/10

2008/09/24 2006/03/10

U4B

U4B

M36

RSVD1

N36

RSVD2

R33

RSVD3

T33

RSVD4

AH9

RSVD5

AH10

RSVD6

AH12

RSVD7

AH13

RSVD8

K12

RSVD9

AL34

RSVD10

AK34

RSVD11

AN35

RSVD12

AM35

RSVD13

T24

RSVD14

B31

RSVD15

B2

RSVD16

M1

RSVD17

AY21

RSVD20

BG23

RSVD22

BF23

RSVD23

BH18

RSVD24

BF18

RSVD25

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

F1

NC_25

A47

NC_26

CANTIGA_1p0

CANTIGA_1p0

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

M_CLK_DDR0

AP24

SA_CK_0
SA_CK_1
SB_CK_0
SB_CK_1

SA_CK#_0
SA_CK#_1
SB_CK#_0
SB_CK#_1

SA_CKE_0
SA_CKE_1

RSVD

RSVD

CFG

CFG

PM

PM

NC

NC

2

SB_CKE_0
SB_CKE_1

SA_CS#_0
SA_CS#_1
SB_CS#_0
SB_CS#_1

SA_ODT_0
SA_ODT_1
SB_ODT_0
SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

DDR CLK/ CONTROL/COMPENSATION

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

CLK

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2

DMI

DMI

DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

GFX_VR_EN

GRAPHICS VID

GRAPHICS VID

CL_CLK

CL_DATA

CL_PWROK

CL_RST#
CL_VREF

MEHDA

MEHDA

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

TSATN#

MISC

MISC

HDA_BCLK

HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

M_CLK_DDR1

AT21

M_CLK_DDR2

AV24

M_CLK_DDR3

AU20

M_CLK_DDR#0

AR24

M_CLK_DDR#1

AR21

M_CLK_DDR#2

AU24

M_CLK_DDR#3

AV20

DDR_CKE0_DIMMA

BC28

DDR_CKE1_DIMMA

AY28

DDR_CKE2_DIMMB

AY36

DDR_CKE3_DIMMB

BB36

DDR_CS0_DIMMA#

BA17

DDR_CS1_DIMMA#

AY16

DDR_CS2_DIMMB#

AV16

DDR_CS3_DIMMB#+SMRCOMP_VOL

AR13

M_ODT0

BD17

M_ODT1

AY17

M_ODT2

BF15

M_ODT3

AY13

SMRCOMP

BG22

SMRCOMP#

BH21

+SMRCOMP_VOH

BF28

+SMRCOMP_VOL

BH28

+V_DDR_MCH_REF

AV42
AR36

SM_REXT

BF17

TP_SM_DRAMRST#

BC36

B38
A38
E41
F41

CLK_MCH_3GPLL

F43

CLK_MCH_3GPLL#

E43

DMI_MRX_ITX_N0

AE41

DMI_MRX_ITX_N1

AE37

DMI_MRX_ITX_N2

AE47

DMI_MRX_ITX_N3

AH39

DMI_MRX_ITX_P0

AE40

DMI_MRX_ITX_P1

AE38

DMI_MRX_ITX_P2

AE48

DMI_MRX_ITX_P3

AH40

DMI_MTX_IRX_N0

AE35

DMI_MTX_IRX_N1

AE43

DMI_MTX_IRX_N2

AE46

DMI_MTX_IRX_N3

AH42

DMI_MTX_IRX_P0

AD35

DMI_MTX_IRX_P1

AE44

DMI_MTX_IRX_P2

AF46

DMI_MTX_IRX_P3

AH43

B33
B32
G33
F33
E33

C34

CL_CLK0

AH37

CL_DATA0

AH36

M_PWROK

AN36

CL_RST#

AJ35

+CL_VREF

AH34

N28
M28
G36
E36

CLKREQ#_7

K36

MCH_ICH_SYNC#

H36

R1071

R1071

B12

56_0402_5%

56_0402_5%

B28
B30
B29
C29
A28

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

R328 80.6_0402_1%

R328 80.6_0402_1%
R329 80.6_0402_1%R329 80.6_0402_1%

R40 499_0402_1%R40 499_0402_1%

T30T30
T31T31
T32T32
T33T33
T34T34

T35T35

T36T36
T48T48
T63T63
T64T64

12

T99T99
T100T100
T101T101
T102T102
T103T103

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Cantiga(1/6)-AGTL/DMI/DDR

Cantiga(1/6)-AGTL/DMI/DDR

Cantiga(1/6)-AGTL/DMI/DDR

LA-4595P

LA-4595P

LA-4595P

1

M_CLK_DDR0 <13>
M_CLK_DDR1 <13>
M_CLK_DDR2 <14>
M_CLK_DDR3 <14>

M_CLK_DDR#0 <13>
M_CLK_DDR#1 <13>
M_CLK_DDR#2 <14>
M_CLK_DDR#3 <14>

DDR_CKE0_DIMMA <13>
DDR_CKE1_DIMMA <13>
DDR_CKE2_DIMMB <14>
DDR_CKE3_DIMMB <14>

DDR_CS0_DIMMA# <13>
DDR_CS1_DIMMA# <13>
DDR_CS2_DIMMB# <14>
DDR_CS3_DIMMB# <14>

M_ODT0 <13>
M_ODT1 <13>
M_ODT2 <14>
M_ODT3 <14>

1 2
1 2

1 2

T29 PADT29 PAD

CLK_MCH_3GPLL <15>
CLK_MCH_3GPLL# <15>

DMI_MTX_IRX_N0 <19>
DMI_MTX_IRX_N1 <19>
DMI_MTX_IRX_N2 <19>
DMI_MTX_IRX_N3 <19>

CL_CLK0 <19>
CL_DATA0 <19>
M_PWROK <19>
CL_RST# <19>

0.1U_0402_16V4Z

0.1U_0402_16V4Z

CLKREQ#_7 <15>
MCH_ICH_SYNC# <19>

DMI_MRX_ITX_N0 <19>
DMI_MRX_ITX_N1 <19>
DMI_MRX_ITX_N2 <19>
DMI_MRX_ITX_N3 <19>

DMI_MRX_ITX_P0 <19>
DMI_MRX_ITX_P1 <19>
DMI_MRX_ITX_P2 <19>
DMI_MRX_ITX_P3 <19>

DMI_MTX_IRX_P0 <19>
DMI_MTX_IRX_P1 <19>
DMI_MTX_IRX_P2 <19>
DMI_MTX_IRX_P3 <19>

C181

C181

+VCCP

1

+1.8V

+VCCP

12

R100

R100
1K_0402_1%

1K_0402_1%

12

1

R99

R99
511_0402_1%

511_0402_1%

2

1.0

1.0

1.0

of

of

of

7 49Tuesday, February 17, 2009

7 49Tuesday, February 17, 2009

7 49Tuesday, February 17, 2009

1bios.ru

5

D D

DDR_A_D[0..63]<13>

C C

B B

DDR_A_D0 DDR_B_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AJ38

AJ41
AN38
AM38

AJ36

AJ40

AM44
AM42

AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36

AW36

BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12

AU10

BA11

AN10

AM11

AM5

AN12

AM13

AJ11

AJ12

BB9
BA9

AV9

BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5

AJ9
AJ8

U4D

U4D

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

CANTIGA_1p0

CANTIGA_1p0

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_BS_0
SA_BS_1
SA_BS_2

SA_RAS#
SA_CAS#

SA_WE#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6

SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

4

DDR_A_BS#0

BD21
BG18
AT25

BB20
BD20
AY20

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7
AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

DDR_A_BS#1
DDR_A_BS#2

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2

DDR_A_DQS#3

DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

DDR_A_BS#0 <13>
DDR_A_BS#1 <13>
DDR_A_BS#2 <13>

DDR_A_RAS# <13>
DDR_A_CAS# <13>
DDR_A_WE# <13>

DDR_A_DM[0..7] <13>

DDR_A_DQS[0..7] <13>

DDR_A_DQS#[0..7] <13>

DDR_A_MA[0..14] <13>

3

DDR_B_D[0..63]<14>

DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AK47
AH46
AP47
AP46

AJ46

AJ48
AM48
AP48
AU47
AU46
BA48
AY48
AT47
AR47
BA47
BC47
BC46
BC44
BG43
BF43
BE45
BC41
BF40
BF41
BG38
BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11

BG8
BH12
BF11

BF8

BG7

BC5

BC6

AY3

AY1

BF6

BF5

BA1

BD3

AV2

AU3

AR3

AN2

AY2

AV1

AP3

AR1

AH1

AM2

AM3

AH3

AL1
AL2
AJ1

AJ3

U4E

U4E

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

CANTIGA_1p0

CANTIGA_1p0

2

DDR_B_BS#0

BC16

SB_BS_0
SB_BS_1
SB_BS_2

SB_RAS#
SB_CAS#

SB_WE#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6

SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

BB17
BB33

AU17
BG16
BF14

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6
AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

DDR_B_BS#1
DDR_B_BS#2

DDR_B_RAS#
DDR_B_CAS#
DDR_B_WE#

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

1

DDR_B_BS#0 <14>
DDR_B_BS#1 <14>
DDR_B_BS#2 <14>

DDR_B_RAS# <14>
DDR_B_CAS# <14>

DDR_B_WE# <14>

DDR_B_DM[0..7] <14>

DDR_B_DQS[0..7] <14>

DDR_B_DQS#[0..7] <14>

DDR_B_MA[0..14] <14>

A A

Security Classification

Security Classification

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(2/6)-DDR2 A/B CH

Cantiga(2/6)-DDR2 A/B CH

Cantiga(2/6)-DDR2 A/B CH

LA-4595P

LA-4595P

LA-4595P

1

1.0

1.0

1.0

of

of

of

8 49Tuesday, February 17, 2009

8 49Tuesday, February 17, 2009

8 49Tuesday, February 17, 2009

1bios.ru

5

D D

T38T38

T46T46

T49T49

C C

L32
G32
M32

M33

K33

J33

M29
C44

B43

E37

E38
C41
C40

B37

A37

H47

E46
G40

A40

H48
D45

F40

B40

A41
H38
G37

J37

B42
G38

F37

K37

F25
H25

K25

H24

C31

E32

E28

G28

J28

G29

H32

J32

J29

E29

L29

4

U4C

U4C

L_BKLT_CT RL
L_BKLT_EN
L_CTRL_C LK

L_CTRL_D ATA
L_DDC_CLK
L_DDC_DATA

L_VDD_EN
LVDS_IBG
LVDS_VBG
LVDS_VREFH
LVDS_VREFL
LVDSA_CLK#
LVDSA_CLK
LVDSB_CLK#
LVDSB_CLK

LVDSA_DATA#_0
LVDSA_DATA#_1
LVDSA_DATA#_2
LVDSA_DATA#_3

LVDSA_DATA_0
LVDSA_DATA_1
LVDSA_DATA_2
LVDSA_DATA_3

LVDSB_DATA#_0
LVDSB_DATA#_1
LVDSB_DATA#_2
LVDSB_DATA#_3

LVDSB_DATA_0
LVDSB_DATA_1
LVDSB_DATA_2
LVDSB_DATA_3

TVA_DAC
TVB_DAC
TVC_DAC

TV_RTN

TV_DCONSEL_0
TV_DCONSEL_1

CRT_BLUE

CRT_GREEN

CRT_RED

CRT_IRTN

CRT_DDC_ CLK
CRT_DDC_ DATA
CRT_HSYNC
CRT_TVO_IREF
CRT_VSYNC

CANTIGA_1p0

CANTIGA_1p0

3

R56 within 500 mils from
pin T37,T36

PEGCOMP

T37

PEG_COMPI

T36

PEG_COMPO

H44

PEG_RX#_0

J46

PEG_RX#_1

L44

PEG_RX#_2

L40

PEG_RX#_3

N41

PEG_RX#_4

P48

PEG_RX#_5

N44

PEG_RX#_6

T43

PEG_RX#_7
PEG_RX#_8

PEG_RX#_9
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8

PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8

PEG_TX#_9
PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8

PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

LVDS

LVDS

TV

TV

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

VGA

VGA

R95

R95

1 2

49.9_0402_1%

49.9_0402_1%

PEG_NRX_GTX_N0
PEG_NRX_GTX_N1
PEG_NRX_GTX_N2
PEG_NRX_GTX_N3
PEG_NRX_GTX_N4
PEG_NRX_GTX_N5
PEG_NRX_GTX_N6
PEG_NRX_GTX_N7
PEG_NRX_GTX_N8
PEG_NRX_GTX_N9
PEG_NRX_GTX_N10
PEG_NRX_GTX_N11
PEG_NRX_GTX_N12
PEG_NRX_GTX_N13
PEG_NRX_GTX_N14
PEG_NRX_GTX_N15

PEG_NRX_GTX_P0
PEG_NRX_GTX_P1
PEG_NRX_GTX_P2
PEG_NRX_GTX_P3
PEG_NRX_GTX_P4
PEG_NRX_GTX_P5
PEG_NRX_GTX_P6
PEG_NRX_GTX_P7
PEG_NRX_GTX_P8
PEG_NRX_GTX_P9
PEG_NRX_GTX_P10
PEG_NRX_GTX_P11
PEG_NRX_GTX_P12
PEG_NRX_GTX_P13
PEG_NRX_GTX_P14
PEG_NRX_GTX_P15

PEG_TXN0

C568 0.1U_0402_16V7KC568 0.1U_0402_16V7K

PEG_TXN1

C537 0.1U_0402_16V7KC537 0.1U_0402_16V7K

PEG_TXN2

C538 0.1U_0402_16V7KC538 0.1U_0402_16V7K

PEG_TXN3

C539 0.1U_0402_16V7KC539 0.1U_0402_16V7K

PEG_TXN4

C540 0.1U_0402_16V7KC540 0.1U_0402_16V7K

PEG_TXN5 PEG_NTX_GRX_N5

C541 0.1U_0402_16V7KC541 0.1U_0402_16V7K

PEG_TXN6

C542 0.1U_0402_16V7KC542 0.1U_0402_16V7K

PEG_TXN7

C543 0.1U_0402_16V7KC543 0.1U_0402_16V7K

PEG_TXN8

C544 0.1U_0402_16V7KC544 0.1U_0402_16V7K

PEG_TXN9

C545 0.1U_0402_16V7KC545 0.1U_0402_16V7K

PEG_TXN10

C546 0.1U_0402_16V7KC546 0.1U_0402_16V7K
C547 0.1U_0402_16V7KC547 0.1U_0402_16V7K

PEG_TXN12

C548 0.1U_0402_16V7KC548 0.1U_0402_16V7K

PEG_TXN13

C549 0.1U_0402_16V7KC549 0.1U_0402_16V7K

PEG_TXN14

C550 0.1U_0402_16V7KC550 0.1U_0402_16V7K

PEG_TXN15

C551 0.1U_0402_16V7KC551 0.1U_0402_16V7K

PEG_TXP0

C552 0.1U_0402_16V7KC552 0.1U_0402_16V7K

PEG_TXP1

C553 0.1U_0402_16V7KC553 0.1U_0402_16V7K

PEG_TXP2

C554 0.1U_0402_16V7KC554 0.1U_0402_16V7K

PEG_TXP3

C555 0.1U_0402_16V7KC555 0.1U_0402_16V7K

PEG_TXP4

C556 0.1U_0402_16V7KC556 0.1U_0402_16V7K

PEG_TXP5

C557 0.1U_0402_16V7KC557 0.1U_0402_16V7K

PEG_TXP6

C558 0.1U_0402_16V7KC558 0.1U_0402_16V7K

PEG_TXP7

C559 0.1U_0402_16V7KC559 0.1U_0402_16V7K

PEG_TXP8

C560 0.1U_0402_16V7KC560 0.1U_0402_16V7K

PEG_TXP9

C561 0.1U_0402_16V7KC561 0.1U_0402_16V7K

PEG_TXP10

C562 0.1U_0402_16V7KC562 0.1U_0402_16V7K

PEG_TXP11

C563 0.1U_0402_16V7KC563 0.1U_0402_16V7K

PEG_TXP12

C564 0.1U_0402_16V7KC564 0.1U_0402_16V7K

PEG_TXP13

C565 0.1U_0402_16V7KC565 0.1U_0402_16V7K

PEG_TXP14

C566 0.1U_0402_16V7KC566 0.1U_0402_16V7K

PEG_TXP15

C567 0.1U_0402_16V7KC567 0.1U_0402_16V7K

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

PEG_NRX_GTX_N[0..15]

PEG_NRX_GTX_P[0..15]

+VCC_PEG

PEGCOMP trace width
and spacing is 20/25 mils.

PEG_NRX_GTX_N[0..15] <31>

PEG_NRX_GTX_P[0..15] <31>

PEG_NTX_GRX_N0
PEG_NTX_GRX_N1
PEG_NTX_GRX_N2
PEG_NTX_GRX_N3
PEG_NTX_GRX_N4

PEG_NTX_GRX_N6
PEG_NTX_GRX_N7
PEG_NTX_GRX_N8

PEG_NTX_GRX_N9
PEG_NTX_GRX_N10
PEG_NTX_GRX_N11PEG_TXN11
PEG_NTX_GRX_N12
PEG_NTX_GRX_N13
PEG_NTX_GRX_N14
PEG_NTX_GRX_N15

PEG_NTX_GRX_P0

PEG_NTX_GRX_P1

PEG_NTX_GRX_P2

PEG_NTX_GRX_P3

PEG_NTX_GRX_P4

PEG_NTX_GRX_P5

PEG_NTX_GRX_P6

PEG_NTX_GRX_P7

PEG_NTX_GRX_P8

PEG_NTX_GRX_P9
PEG_NTX_GRX_P10
PEG_NTX_GRX_P11
PEG_NTX_GRX_P12
PEG_NTX_GRX_P13
PEG_NTX_GRX_P14
PEG_NTX_GRX_P15

PEG_NTX_GRX_N[0..15] <31>

PEG_NTX_GRX_P[0..15] <31>

2

1

Strap Pin Table

CFG[2:0] FSB Freq select

CFG[4:3] Rese rved

CFG5 (DMI select)

CFG6

CFG6

CFG7 (Intel Management

Engine Crypto strap)

CFG8

CFG9

(PCIE Graphics Lane Reversal)

CFG10 (PCIE Lookback enable)

CFG11

CFG[13:12] (XOR/ALLZ)

CFG16 (FSB Dynamic ODT)

CFG19 (DMI Lane Reversal)

CFG20 (PCIE/SDVO concurrent)

CFG5<7>

CFG6<7>

CFG7<7>

CFG9<7>

CFG16<7>

000 = FSB 1066MHz
010 = FSB 800MHz
011 = FSB 667MHz
Others = Reserved

0 = DMI x 2
1 = DMI x 4
0 = The iTPM Host Interface is enable

1 = The iTPM Host Interface is disable

0 =(TLS)chiper suite with no confidential ity

1 =(TLS)chiper suite with confidentiality

*

Reserved

0 = Reverse Lane,15->0, 14->1

1 = Normal Operation,Lane Number in order

0 = Enable

1 = Disable

*

Reserved

00 = Reserved
01 = XOR Mode Enabled
10 = All Z Mode Enabled

ReservedCFG[15:14]

0 = Disabled

1 = Enabled

*

ReservedCFG[18:17]

0 = Normal Operation

(Lane number in Order)

1 = Reverse Lane

0 = Only PCIE or SDVO is operational.

1 = PCIE/SDVO are operating simu.

R66 2.21K_0402_1%~D@R66 2.21K_0402_1%~D@

1 2

R58 2.21K_0402_1%~D@R58 2.21K_0402_1%~D@

1 2

R59 2.21K_0402_1%~D@R59 2.21K_0402_1%~D@

1 2

R55 2.21K_0402_1%~D@R55 2.21K_0402_1%~D@

1 2

R70 2.21K_0402_1%~D@R70 2.21K_0402_1%~D@

1 2

*

*

*

(Default)11 = Normal Operation

*

*

*

CFG[5:16] have internal pullup

R72 4.02K_0402_1%~D@R72 4.02K_0402_1%~D@

CFG19<7>

B B

A A

Security Classification

Security Classification

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DR AWING IS THE PRO PRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PRO PRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL

THIS SHEET OF ENGINEERING DR AWING IS THE PRO PRIETARY PROPERT Y OF COMPAL ELECT RONICS, INC. AND CONTAINS CON FIDENTIAL
AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D

AND TRAD E SECRET INFOR MATION. THIS SHEET M AY NOT BE TRANSF ERED FROM T HE CUSTODY OF THE COMPETEN T DIVISION OF R&D
DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CON TAINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CON TAINS

DEPARTMEN T EXCEPT AS AUT HORIZED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INF ORMATION IT CON TAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, IN C.

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, IN C.

4

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, IN C.

3

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

CFG20<7>

CFG[19:20] have internal pulldown

Custom

Custom

Custom

Date: Sheet of

Date: Sheet of

Date: Sheet of

1 2

R73 4.02K_0402_1%~D@R73 4.02K_0402_1%~D@

1 2

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Compal Electronics, Inc.

Cantiga(3/6)-VGA/LVDS/TV

Cantiga(3/6)-VGA/LVDS/TV

Cantiga(3/6)-VGA/LVDS/TV

LA-4595P

LA-4595P

LA-4595P

+3VS

1.0

1.0

9 49Tuesday, February 17, 2009

9 49Tuesday, February 17, 2009

1

9 49Tuesday, February 17, 2009

1.0

1bios.ru

5

4

3

2

1

U4H

U4H

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

AXF

AXF

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

SM CK

VCC_TX_LVDS

HV

HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

PEG

PEG

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

DMI

DMI

VTTLF

VTTLF

VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8

VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT_15

VTT

VTT

VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

VCC_HV_1
VCC_HV_2
VCC_HV_3

VTTLF1
VTTLF2
VTTLF3

73mA

B27

VCCA_CRT_DAC_1

A26

VCCA_CRT_DAC_2

2.68mA

A25

VCCA_DAC_BG

B25

D D

64.8mA

64.8mA

+1.05VS_HPLL

+1.05VS_MPLL

139.2mA

13.2mA

+1.5VS_PEG_BG

+1.5VS

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

C175

C175

+1.05VS_PEGPLL

2

720mA

+VCCP

C C

100U_D2E_6.3VM_R15M~D

100U_D2E_6.3VM_R15M~D

R71

R71

1 2

0_0603_5%

0_0603_5%

R50 0_0805_5%

R50 0_0805_5%

1 2

1

C68

C68

+

+

2

+1.05VS_A_SM

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C82

C82

1

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

+1.05VS_A_SM_CK

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C104

C104

1

2

HDMI disable connected to GND

1U_0603_10V4Z~D

1U_0603_10V4Z~D

1

1

C83

C83

2

1

2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C123

C123

TVA 24.15mA
TVB 39.48mA
TVX 24.15mA

C72

C72

2

50mA

58.67mA

C233 0.1U_0402_1 6V4Z C233 0.1U_0402_1 6V4Z

48.363mA

157.2mA

60.31mA

2

1

50mA

B B

+1.05VS_HPLL

C251 0.1U_0402_1 6V4Z C251 0.1U_0402_1 6V4Z

2

1

+1.5VS_QDAC

+1.05VS_PEGPLL

VSSA_DAC_BG

F47

VCCA_DPLLA

L48

VCCA_DPLLB

24mA

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

414uA

AD48

VCCA_PEG_BG

50mA

AA48

VCCA_PEG_PLL

AR20

VCCA_SM_1

AP20

VCCA_SM_2

AN20

VCCA_SM_3

AR17

VCCA_SM_4

AP17

VCCA_SM_5

AN17

VCCA_SM_6

AT16

VCCA_SM_7

AR16

VCCA_SM_8

AP16

VCCA_SM_9

26mA 321.35mA

AP28

VCCA_SM_CK_1

AN28

VCCA_SM_CK_2

AP25

VCCA_SM_CK_3

AN25

VCCA_SM_CK_4

AN24

VCCA_SM_CK_5

AM28

VCCA_SM_CK_NCTF_1

AM26

VCCA_SM_CK_NCTF_2

AM25

VCCA_SM_CK_NCTF_3

AL25

VCCA_SM_CK_NCTF_4

AM24

VCCA_SM_CK_NCTF_5

AL24

VCCA_SM_CK_NCTF_6

AM23

VCCA_SM_CK_NCTF_7

AL23

VCCA_SM_CK_NCTF_8

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

CANTIGA_1p0

CANTIGA_1p0

CRTPLLA PEGA SM

CRTPLLA PEGA SM

A LVDS

A LVDS

POWER

POWER

A CK

A CK

TV

TV

HDA

HDA

D TV/CRT

D TV/CRT

LVDS

LVDS

852mA

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

B22
B21
A21

124mA

BF21
BH20
BG20
BF20

118.8mA

K47

C35
B35
A35

V48
U48
V47
U47
U46

AH48
AF48
AH47
AG47

A8
L1
AB2

+VCCP

1732mA

456mA

20mils

0.47U_0603_10V7K

0.47U_0603_10V7K

C382

C382

220U_D2_4VY_R15M

220U_D2_4VY_R15M

+V1.05VS_AXF

+1.8V_SM_CK

105.3mA

+VCC_PEG

+1.05VS_DMI

0.47U_0603_10V7K

0.47U_0603_10V7K

C385

C385

1

2

4.7U_0805_10V4Z

1

C370

C370

2

1

C383

C383

2

C65

C65

1

2

4.7U_0805_10V4Z

C384

C384

1

+

+

2

2.2U_0603_10V7K~D

1

2

+3VS

2.2U_0603_10V7K~D

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1

C56

C56

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

+1.5VS_QDAC

0.01U_0402_25V7K~N

0.01U_0402_25V7K~N

C97

C97

C98

C98

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

+1.05VS_HPLL

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C388

C388

1

2

+1.05VS_MPLL

1

C63

C63

2

+1.05VS_PEGPLL

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C176

C176

1

2

R69

R69

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

L29

L29

1 2

MBK2012121YZF_0805

MBK2012121YZF_0805

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1

C387

C387

2

L9

L9

1 2

0_0603_5%

0_0603_5%

LQH32CNR15M33L_1210~D

LQH32CNR15M33L_1210~D

R74

R74

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1 2

C62

C62

1

2

L12

L12

1_0402_5%~D

1_0402_5%~D

1 2

BLM21PG221SN1D_0805~D

BLM21PG221SN1D_0805~D

R123

R123

C179

C179

1

10U_0805_4VAM~D

10U_0805_4VAM~D

2

+1.5VS

12

+VCCP

+VCCP

+VCCP

0.47U_0603_10V7K

0.47U_0603_10V7K

C373

C373

C410

C410

0.47U_0603_10V7K

0.47U_0603_10V7K

1

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

2

+V1.05VS_AXF

10U_0805_4VAM~D

10U_0805_4VAM~D

1

2

+1.8V_SM_CK

1_0402_5%~D

1_0402_5%~D

1

10U_0805_4VAM~D

10U_0805_4VAM~D

2

+VCC_PEG

C117

C117

1

+

+

C95

C95

2

+1.05VS_DMI

1

2

C113

C113

R124

R124

C96

C96

220U_D2_4VY_R15M

220U_D2_4VY_R15M

C116

C116

C389

C389

R112

R112

1 2

0_0805_5%

0_0805_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1U_0603_10V4Z

1U_0603_10V4Z

C69

C69

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C102

C102

1

2

4.7U_0805_10V4Z

4.7U_0805_10V4Z

1

2

+VCC_PEG

R101

R101

1 2

0_0805_5%

0_0805_5%

R102

R102

1 2

0_0805_5%

0_0805_5%

PJP13

PJP13
JUMP_43X39

JUMP_43X39

112

+VCCP

2

+VCCP

+1.8V

A A

Security Classification

Security Classification

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPE RTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D

AND TRADE SE CRET INFORMATION. THIS SHEET MAY NOT B E TRANSFERED FRO M THE CUSTODY OF THE COMPETENT DIVISI ON OF R&D
DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS

DEPARTMENT EX CEPT AS AUTHORIZ ED BY COMPAL ELECTRONICS, INC . NEITHER THIS SHE ET NOR THE INFORMA TION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(4/6)-PWR

Cantiga(4/6)-PWR

Cantiga(4/6)-PWR

LA-4595P

LA-4595P

LA-4595P

1

1.0

1.0

10 49Tuesday, February 17, 2009

10 49Tuesday, February 17, 2009

10 49Tuesday, February 17, 2009

1.0

of

of

of

1bios.ru

5

U4F

AG34
AC34
AB34
AA34

AM33
AK33

AJ33
AG33
AF33

AE33
AC33
AA33

W33

AH28
AF28
AC28
AA28

AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24

AJ23
AH23
AF23

Y34
V34
U34

Y33

V33
U33

T32

U4F

VCC_1
VCC_2
VCC_3
VCC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34

VCC_35

CANTIGA_1p0

CANTIGA_1p0

+VCCP

D D

0.22U_0402_10V4Z

0.22U_0402_10V4Z

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

220U_D2_4VY_R15M

220U_D2_4VY_R15M

1

C118

C118

1

+

+

C374

C374

2

2

C C

B B

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.22U_0402_10V4Z

0.22U_0402_10V4Z

C143

C143

1

2

C120

C120

C119

C119

1

1

2

2

4

Extnal Graphic: 1210.34mA
integrated Graphic: 1930.4mA

VCC CORE

VCC CORE

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

POWER

POWER

VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28
VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31

VCC NCTF

VCC NCTF

VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8
VCC_NCTF_9

+VCCP

+1.8V

3

U4G

U4G

AP33

VCC_SM_1

AN33

VCC_SM_2

C148 330U_V_ 2.5VM

C148 330U_V_ 2.5VM

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C147

C147

C165

C165

1

1

+

+

2

2

2

1

1

2

T42PAD T42PAD
T43PAD T43PAD

BH32

VCC_SM_3

BG32

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C164

C164

BF32
BD32
BC32
BB32
BA32
AY32

AW32

AV32
AU32
AT32
AR32
AP32
AN32
BH31
BG31
BF31
BG30
BH29
BG29
BF29
BD29
BC29
BB29
BA29
AY29

AW29

AV29
AU29
AT29
AR29
AP29

BA36
BB24
BD16

BB21
AW16
AW13

AT13

AE25

AB25

AA25

AE24

AC24

AA24

AE23

AC23

AB23

AA23

AJ21
AG21
AE21
AC21
AA21

AH20
AF20
AE20
AC20
AB20
AA20

AM15

AL15
AE15

AJ15
AH15
AG15
AF15
AB15
AA15

AN14

AM14

AJ14
AH14

Y26

Y24

Y21

T17
T16

Y15
V15
U15

U14
T14

VCC_SM_4
VCC_SM_5
VCC_SM_6
VCC_SM_7
VCC_SM_8
VCC_SM_9
VCC_SM_10
VCC_SM_11
VCC_SM_12
VCC_SM_13
VCC_SM_14
VCC_SM_15
VCC_SM_16
VCC_SM_17
VCC_SM_18
VCC_SM_19
VCC_SM_20
VCC_SM_21
VCC_SM_22
VCC_SM_23
VCC_SM_24
VCC_SM_25
VCC_SM_26
VCC_SM_27
VCC_SM_28
VCC_SM_29
VCC_SM_30
VCC_SM_31
VCC_SM_32
VCC_SM_33
VCC_SM_34
VCC_SM_35

VCC_SM_36/NC
VCC_SM_37/NC
VCC_SM_38/NC
VCC_SM_39/NC
VCC_SM_40/NC
VCC_SM_41/NC
VCC_SM_42/NC

6326.84mA

VCC_AXG_1
VCC_AXG_2
VCC_AXG_3
VCC_AXG_4
VCC_AXG_5
VCC_AXG_6
VCC_AXG_7
VCC_AXG_8
VCC_AXG_9
VCC_AXG_10
VCC_AXG_11
VCC_AXG_12
VCC_AXG_13
VCC_AXG_14
VCC_AXG_15
VCC_AXG_16
VCC_AXG_17
VCC_AXG_18
VCC_AXG_19
VCC_AXG_20
VCC_AXG_21
VCC_AXG_22
VCC_AXG_23
VCC_AXG_24
VCC_AXG_25
VCC_AXG_26
VCC_AXG_27
VCC_AXG_28
VCC_AXG_29
VCC_AXG_30
VCC_AXG_31
VCC_AXG_32
VCC_AXG_33
VCC_AXG_34
VCC_AXG_35
VCC_AXG_36
VCC_AXG_37
VCC_AXG_38
VCC_AXG_39
VCC_AXG_40
VCC_AXG_41
VCC_AXG_42

VCC_AXG_SENSE
VSS_AXG_SENSE

3000mA

2

VCC SMVCC GFX

VCC SMVCC GFX

VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8

VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22

POWER

POWER

VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

VCC SM LF

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

AV44
BA37
AM40
AV21
AY5
AM10
BB13

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

1

C70 0.1U_0402_16V4ZC70 0.1U_0402 _16V4Z

1

1

2

2

C81 0.22U_0603_10V7KC81 0.22U_0603_10V7K

C67 0.22U_0603_10V7KC67 0.22U_0603_10V7K

C71 0.1U_0402_16V4ZC71 0.1U_0402 _16V4Z

1

1

2

2

C145 1U_0603_10V4ZC145 1U_0603 _10V4Z

C163 1U_0603_10V4ZC163 1U_0603 _10V4Z

C146 0.47U_0402_6.3V6KC 146 0.47U_0402_6.3V6K

1

1

1

2

2

2

A A

CANTIGA_1p0

CANTIGA_1p0

Security Classification

Security Classification

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(5/6)-PWR/GND

Cantiga(5/6)-PWR/GND

Cantiga(5/6)-PWR/GND

LA-4595P

LA-4595P

LA-4595P

1

1.0

1.0

1.0

of

of

of

11 49Tuesday, February 17, 2009

11 49Tuesday, February 17, 2009

11 49Tuesday, February 17, 2009

1bios.ru

5

U4I

U4I

AU48

VSS_1

AR48

VSS_2

AL48

VSS_3

BB47

VSS_4

AW47

VSS_5

AN47

VSS_6

AJ47

VSS_7

AF47

D D

C C

B B

A A

AD47
AB47

BD46
BA46
AY46
AV46
AR46
AM46

BF44
AH44
AD44
AA44

M44

BC43
AV43
AU43
AM43

BG42
AY42
AT42
AN42

AJ42

AE42

BD41
AU41
AM41
AH41
AD41
AA41

M41

BG40
BB40
AV40
AN40

AT39
AM39

AJ39

AE39

BH38
BC38
BA38
AU38
AH38
AD38
AA38

BF37
BB37

AW37

AT37
AN37

AJ37

BG36
BD36
AK15
AU36

N47

G47

V46
R46
P46
H46
F46

Y44
U44
T44

F44

C43

N42

Y41
U41
T41

G41
B41

H40
E40

N39

B39

Y38
U38
T38

F38
C38

H37
C37

Y47
T47

L47

J43

L42

L39

J38

VSS_8
VSS_9
VSS_10
VSS_11
VSS_12
VSS_13
VSS_14
VSS_15
VSS_16
VSS_17
VSS_18
VSS_19
VSS_20
VSS_21
VSS_22
VSS_23
VSS_24
VSS_25
VSS_26
VSS_27
VSS_28
VSS_29
VSS_30
VSS_31
VSS_32
VSS_33
VSS_34
VSS_35
VSS_36
VSS_37
VSS_38
VSS_39
VSS_40
VSS_41
VSS_42
VSS_43
VSS_44
VSS_45
VSS_46
VSS_47
VSS_48
VSS_49
VSS_50
VSS_51
VSS_52
VSS_53
VSS_54
VSS_55
VSS_56
VSS_57
VSS_58
VSS_59
VSS_60
VSS_61
VSS_62
VSS_63
VSS_64
VSS_65
VSS_66
VSS_67
VSS_68
VSS_69
VSS_70
VSS_71
VSS_72
VSS_73
VSS_74
VSS_75
VSS_76
VSS_77
VSS_78
VSS_79
VSS_80
VSS_81
VSS_82
VSS_83
VSS_84
VSS_85
VSS_86
VSS_87
VSS_88
VSS_89
VSS_90
VSS_91
VSS_92
VSS_93
VSS_94
VSS_95
VSS_96
VSS_97
VSS_98
VSS_99

CANTIGA_1p0

CANTIGA_1p0

VSS

VSS

VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199

4

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

3

U4J

U4J

BG21

VSS_199

L12

VSS_200

AW21

VSS_201

AU21

VSS_202

AP21

VSS_203

AN21

VSS_204

AH21

VSS_205

AF21

VSS_206

AB21

VSS_207

R21

VSS_208

M21

VSS_209

J21

VSS_210

G21

VSS_211

BC20

VSS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

BA16

AU16
AN16

BG15

AC15

W15

BG14

AA14

BG13

BC13
BA13

AN13

AJ13

AE13

BF12
AV12
AT12

AM12

AA12

BD11
BB11
AY11
AN11
AH11

BG10

AV10
AT10

AJ10
AE10
AA10

AM9

R17
M17
H17
C17

N16
K16
G16
E16

A15

C14

N13

G13
E13

A12

Y11
N11
G11
C11

M10
BF9
BC9
AN9

AD9

BH8
BB8
AV8
AT8

L13

J12

G9

B9

VSS_230
VSS_231
VSS_232
VSS_233

VSS_235

VSS_237
VSS_238
VSS_239
VSS_240
VSS_241
VSS_242
VSS_243
VSS_244
VSS_245
VSS_246
VSS_247
VSS_248
VSS_249
VSS_250
VSS_251
VSS_252

VSS_255
VSS_256
VSS_257
VSS_258
VSS_259
VSS_260
VSS_261
VSS_262
VSS_263
VSS_264
VSS_265
VSS_266
VSS_267
VSS_268
VSS_269
VSS_270
VSS_271
VSS_272
VSS_273

VSS_275
VSS_276
VSS_277
VSS_278
VSS_279
VSS_280
VSS_281
VSS_282
VSS_283
VSS_284
VSS_285
VSS_286
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296

CANTIGA_1p0

CANTIGA_1p0

VSS

VSS

VSS NCTF

VSS NCTF

VSS SCB

VSS SCB

NC

NC

VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325

VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350

VSS_351
VSS_352
VSS_353
VSS_354

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8

VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16

VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5

NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42

2

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

U24
U28
U25
U29

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1
A3

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

1

5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Cantiga(6/6)-PWR/GND

Cantiga(6/6)-PWR/GND

Cantiga(6/6)-PWR/GND

LA-4595P

LA-4595P

LA-4595P

1

1.0

1.0

1.0

of

of

of

12 49Tuesday, February 17, 2009

12 49Tuesday, February 17, 2009

12 49Tuesday, February 17, 2009

1bios.ru

5

DDR_A_DQS#[0..7]<8>

DDR_A_D[0..63]<8>

DDR_A_DM[0..7]<8>

DDR_A_DQS[0..7]<8>

DDR_A_MA[0..13]<8>

D D

Layout Note:
Place near JDIM1

+1.8V

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

1

2

C106

C106

C124

C124

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C125

C125

RP14

RP14

RP13

RP13

RP7

RP7

RP6

RP6

RP5

RP5

RP1

RP1

R96 56_0402_5%

R96 56_0402_5%

2.2U_0603_6.3V6K

C149

C149

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C126

C126

1 4
2 3

56_0404_4P2R_5%

56_0404_4P2R_5%

1 4
2 3

56_0404_4P2R_5%

56_0404_4P2R_5%

1 4
2 3

56_0404_4P2R_5%

56_0404_4P2R_5%

1 4
2 3

56_0404_4P2R_5%

56_0404_4P2R_5%

1 4
2 3

56_0404_4P2R_5%

56_0404_4P2R_5%

2 3
1 4

56_0404_4P2R_5%

56_0404_4P2R_5%

1 2

C105

C105

1

2

Layout Note:

C C

Place one cap close to every 2 pullup
resistors terminated to +0.9V

+0.9VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

B B

DDR_A_MA5
DDR_A_MA8

DDR_A_MA1
DDR_A_MA3

DDR_A_RAS#
DDR_CS0_DIMMA#

DDR_A_BS#0

A A

DDR_A_MA10

DDR_A_CAS#
DDR_A_WE#

DDR_CS1_DIMMA#
M_ODT1

DDR_CKE1_DIMMA

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

C166

C166

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C127

C127

+0.9VS

5

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C169

C169

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C150

C150

C151

C151

RP22 56_0404_4P2R_5%RP22 56_0404_4P2R_5%

DDR_A_MA12

14

DDR_CKE0_DIMMA

23

RP17 56_0404_4P2R_5%RP17 56_0404_4P2R_5%

DDR_A_MA7

14

DDR_A_MA6

23

RP15 56_0404_4P2R_5%RP15 56_0404_4P2R_5%

DDR_A_MA9

14

DDR_A_BS#2

23

RP16 56_0404_4P2R_5%RP16 56_0404_4P2R_5%

DDR_A_MA4

14

DDR_A_MA2

23

RP8 56_0404_4P2R_5%RP8 56_0404_4P2R_5%

DDR_A_MA0

14

DDR_A_BS#1

23

RP2 56_0404_4P2R_5%RP2 56_0404_4P2R_5%

M_ODT0

14

DDR_A_MA13

23

RP23 56_0404_4P2R_5%RP23 56_0404_4P2R_5%

DDR_A_MA14

14

DDR_A_MA11

23

C154

C154

1

2

1

2

C167

C167

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C130

C130

C131

C131

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C107

C107

C128

C128

330U 2.5V Y D2

330U 2.5V Y D2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C108

C108

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C129

C129

C152

C152

Layout Note:
Place these resistor
closely JP41,all
trace length Max=1.5"

4

1

C84

C84

+

+

@

@

2

DDR_CKE0_DIMMA<7>

DDR_A_BS#2<8>

DDR_A_BS#0<8>

DDR_A_WE#<8>

DDR_A_CAS#<8>

DDR_CS1_DIMMA#<7>

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C153

C153

1

1

2

2

C234

C234

C168

C168

M_ODT1<7>

ICH_SM_DA<14,15,19>

ICH_SM_CLK<14,15,19>

+3VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.8V

DDR_A_D4
DDR_A_D1

DDR_A_DQS#0
DDR_A_DQS0

DDR_A_D2
DDR_A_D3

DDR_A_D8
DDR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D14

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2
DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D29
DDR_A_D24

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS#2

DDR_A_MA12

DDR_A_MA8

DDR_A_MA5
DDR_A_MA3
DDR_A_MA1

DDR_A_MA10
DDR_A_BS#0

DDR_A_CAS#
DDR_CS1_DIMMA#

M_ODT1

DDR_A_D37
DDR_A_D36

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D35
DDR_A_D34

DDR_A_D40
DDR_A_D44

DDR_A_DM5

DDR_A_D41
DDR_A_D46

DDR_A_D49
DDR_A_D48

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D54
DDR_A_D50

DDR_A_D61
DDR_A_D60

DDR_A_DM7

DDR_A_D59
DDR_A_D58

ICH_SM_DA
ICH_SM_CLK

1

C58

C58

2

3

1

C59

C59

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

2

JDIM2

JDIM2

1

VREF

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_ASOA426-M2RN-7F

FOX_ASOA426-M2RN-7F

SO-DIMM A

REVERSE

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0

CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

BA1
RAS#

VDD
ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1

CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SA0

SA1

2

1

Close to VREF pins of SO-DIMM

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2.2U_0805_16V4Z

2

DDR_A_D5

4

DDR_A_D0

6
8

DDR_A_DM0

10
12

DDR_A_D6

14

DDR_A_D7

16
18

DDR_A_D13

20

DDR_A_D12

22
24

DDR_A_DM1

26
28

M_CLK_DDR0

30

M_CLK_DDR#0

32
34

DDR_A_D11

36

DDR_A_D10DDR_A_D15

38
40

42

DDR_A_D20

44

DDR_A_D21

46
48
50

NC

A11

A7
A6

A4
A2
A0

S0#

NC

52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

DDR_A_DM2

DDR_A_D23
DDR_A_D22

DDR_A_D28
DDR_A_D25

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D31
DDR_A_D30

DDR_CKE1_DIMMA

DDR_A_MA14

DDR_A_MA11

DDR_A_MA7DDR_A_MA9

DDR_A_MA6

DDR_A_MA4
DDR_A_MA2
DDR_A_MA0

DDR_A_BS#1
DDR_A_RAS#
DDR_CS0_DIMMA#DDR_A_WE#

M_ODT0
DDR_A_MA13

DDR_A_D32
DDR_A_D33

DDR_A_DM4

DDR_A_D39
DDR_A_D38

DDR_A_D45
DDR_A_D47

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D43
DDR_A_D42

DDR_A_D52
DDR_A_D53

M_CLK_DDR1
M_CLK_DDR#1

DDR_A_DM6

DDR_A_D51
DDR_A_D55

DDR_A_D57
DDR_A_D56

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

12

R31

R31

R32

R32

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

12

2.2U_0805_16V4Z

C201

C201

1

2

M_CLK_DDR0 <7>
M_CLK_DDR#0 <7>

PM_EXTTS#0 <7>

DDR_CKE1_DIMMA <7>

DDR_A_MA14 <8>

DDR_A_BS#1 <8>
DDR_A_RAS# <8>
DDR_CS0_DIMMA# <7>

M_ODT0 <7>

M_CLK_DDR1 <7>
M_CLK_DDR#1 <7>

C220

C220

1

2

+V_DDR_MCH_REF <7,14>

Bottom side

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

DDR2 SO-DIMM I

DDR2 SO-DIMM I

DDR2 SO-DIMM I

LA-4595P

LA-4595P

LA-4595P

1.0

1.0

1.0

of

of

of

13 49Tuesday, February 17, 2009

13 49Tuesday, February 17, 2009

13 49Tuesday, February 17, 2009

1

1bios.ru

5

DDR_B_DQS#[0..7]<8>

DDR_B_D[0..63]<8>

DDR_B_DM[0..7]<8>

DDR_B_DQS[0..7]<8>

DDR_B_MA[0..13]<8>

D D

Layout Note:
Place near JDIM2

+1.8V

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

C160

C160

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C156

C156

C135

C135

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

56_0404_4P2R_5%

5

2.2U_0603_6.3V6K

C138

C138

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C157

C157

+0.9VS

RP24 56_0404_4P2R_5%RP24 56_0404_4P2R_5%

RP26 56_0404_4P2R_5%RP26 56_0404_4P2R_5%

RP19 56_0404_4P2R_5%RP19 56_0404_4P2R_5%

RP21 56_0404_4P2R_5%RP21 56_0404_4P2R_5%

RP20 56_0404_4P2R_5%RP20 56_0404_4P2R_5%

RP4 56_0404_4P2R_5%RP4 56_0404_4P2R_5%

RP25

RP25

56_0404_4P2R_5%

56_0404_4P2R_5%

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C177

C177

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C170

C170

DDR_B_MA9

14
23

DDR_B_MA14

14

DDR_B_MA11

23

DDR_B_MA5

14

DDR_B_MA8

23

DDR_B_MA7

14

DDR_B_MA6

23

DDR_B_MA4

14

DDR_B_MA2

23

DDR_B_MA13

14

M_ODT2

23

DDR_B_BS#2

14

DDR_CKE2_DIMMB

23

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C132

C132

C109

C109

1

1

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

1

2

2

C171

C171

2

C111

C111

C136

C136

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

Layout Note:
Place one cap close to every 2 pullup
resistors terminated to +0.9VS

C C

+0.9VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

B B

DDR_B_MA1
DDR_B_MA3 DDR _B_MA12

DDR_B_MA10
DDR_B_BS#0

DDR_B_BS#1
DDR_B_MA0

DDR_B_RAS#
DDR_CS2_DIMMB#

A A

DDR_B_CAS#
DDR_B_WE#

DDR_CS3_DIMMB#
M_ODT3

DDR_CKE3_DIMMB

C112

C112

1

2

1

2

C110

C110

C139

C139

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C134

C134

RP18

RP18

RP10

RP10

RP12

RP12

RP11

RP11

RP9

RP9

RP3

RP3

R335 56_0402_5%

R335 56_0402_5%

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

1 4
2 3

2 3
1 4

1 2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C133

C133

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C158

C158

4

330U 2.5V Y D2

330U 2.5V Y D2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Layout Note:
Place these resistor
closely JP42,all
trace length Max=1.5"

1

C189

C189

C155

C155

1

+

+

2

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

2

2

C172

C172

C137

C137

4

3

+1.8V

JDIM1

JDIM1

1

VREF

3

DDR_B_D0
DDR_B_D1

DDR_B_DQS#0
DDR_B_DQS0

DDR_B_D2
DDR_B_D3

DDR_B_D8
DDR_B_D9

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D17
DDR_B_D20

DDR_B_DQS#2

@

@

DDR_CKE2_DIMMB<7>

DDR_B_BS#2<8>

DDR_B_BS#0<8>

DDR_B_CAS#<8>

DDR_CS3_DIMMB#<7>

1

2

C159

C159

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

ICH_SM_DA<13,15,19>

ICH_SM_CLK<13,15,19>

Issued Date

Issued Date

Issued Date

M_ODT3<7>

DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D28
DDR_B_D25

DDR_B_DM3

DDR_B_D30
DDR_B_D31

DDR_CKE2_DIMMB

DDR_B_BS#2

DDR_B_MA12
DDR_B_MA9
DDR_B_MA8

DDR_B_MA5
DDR_B_MA3
DDR_B_MA1

DDR_B_MA10
DDR_B_BS#0
DDR_B_WE#

DDR_B_CAS#
DDR_CS3_DIMMB#

M_ODT3

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D51
DDR_B_D50

DDR_B_D56
DDR_B_D61

DDR_B_DM7

DDR_B_D59
DDR_B_D58

ICH_SM_DA
ICH_SM_CLK

+3VS

C61

C61

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

1

C60

C60

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

2

2

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

3

VSS

5

DQ0

7

DQ1

9

VSS

11

DQS0#

13

DQS0

15

VSS

17

DQ2

19

DQ3

21

VSS

23

DQ8

25

DQ9

27

VSS

29

DQS1#

31

DQS1

33

VSS

35

DQ10

37

DQ11

39

VSS

41

VSS

43

DQ16

45

DQ17

47

VSS

49

DQS2#

51

DQS2

53

VSS

55

DQ18

57

DQ19

59

VSS

61

DQ24

63

DQ25

65

VSS

67

DM3

69

NC

71

VSS

73

DQ26

75

DQ27

77

VSS

79

CKE0

81

VDD

83

NC

85

BA2

87

VDD

89

A12

91

A9

93

A8

95

VDD

97

A5

99

A3

101

A1

103

VDD

105

A10/AP

107

BA0

109

WE#

111

VDD

113

CAS#

115

NC/S1#

117

VDD

119

NC/ODT1

121

VSS

123

DQ32

125

DQ33

127

VSS

129

DQS4#

131

DQS4

133

VSS

135

DQ34

137

DQ35

139

VSS

141

DQ40

143

DQ41

145

VSS

147

DM5

149

VSS

151

DQ42

153

DQ43

155

VSS

157

DQ48

159

DQ49

161

VSS

163

NC,TEST

165

VSS

167

DQS6#

169

DQS6

171

VSS

173

DQ50

175

DQ51

177

VSS

179

DQ56

181

DQ57

183

VSS

185

DM7

187

VSS

189

DQ58

191

DQ59

193

VSS

195

SDA

197

SCL

199

VDDSPD

FOX_AS0A426-NARN-7F~N

FOX_AS0A426-NARN-7F~N

SO-DIMM B
REVERSE

Bottom side

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

VSS
DQ4
DQ5
VSS
DM0
VSS
DQ6
DQ7

VSS
DQ12
DQ13

VSS

DM1

VSS

CK0

CK0#

VSS
DQ14
DQ15

VSS

VSS
DQ20
DQ21

VSS

DM2

VSS
DQ22
DQ23

VSS
DQ28
DQ29

VSS

DQS3#

DQS3

VSS
DQ30
DQ31

VSS

NC/CKE1

VDD

NC/A15
NC/A14

VDD

VDD

VDD

BA1
RAS#

VDD
ODT0

NC/A13

VDD

VSS
DQ36
DQ37

VSS

DM4

VSS
DQ38
DQ39

VSS
DQ44
DQ45

VSS

DQS5#

DQS5

VSS
DQ46
DQ47

VSS
DQ52
DQ53

VSS

CK1

CK1#

VSS

DM6

VSS
DQ54
DQ55

VSS
DQ60
DQ61

VSS

DQS7#

DQS7

VSS
DQ62
DQ63

VSS

SAO

SA1

NC

A11

A7
A6

A4
A2
A0

S0#

NC

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40

42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200

2

+V_DDR_MCH_REF

DDR_B_D5
DDR_B_D4

DDR_B_DM0

DDR_B_D6
DDR_B_D7

DDR_B_D12
DDR_B_D13

DDR_B_DM1

M_CLK_DDR2
M_CLK_DDR#2

DDR_B_D14
DDR_B_D15

DDR_B_D21
DDR_B_D16

DDR_B_DM2

DDR_B_D22
DDR_B_D23

DDR_B_D29
DDR_B_D24

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D26
DDR_B_D27

DDR_CKE3_DIMMB

DDR_B_MA14

DDR_B_MA11

DDR_B_MA7

DDR_B_MA6

DDR_B_MA4
DDR_B_MA2
DDR_B_MA0

DDR_B_BS#1
DDR_B_RAS#
DDR_CS2_DIMMB#

M_ODT2
DDR_B_MA13

DDR_B_D36
DDR_B_D37

DDR_B_DM4

DDR_B_D39
DDR_B_D38

DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D52
DDR_B_D53

M_CLK_DDR3
M_CLK_DDR#3

DDR_B_DM6

DDR_B_D54
DDR_B_D55

DDR_B_D60
DDR_B_D57

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

10K_0402_5%

10K_0402_5%

2

1

Close to VREF pins of SO-DIMM

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2.2U_0805_16V4Z

2.2U_0805_16V4Z

1

1

C222

C222

C221

C221

2

2

M_CLK_DDR2 <7>
M_CLK_DDR#2 <7>

PM_EXTTS#1 <7>

DDR_CKE3_DIMMB <7>

DDR_B_MA14 <8>

DDR_B_BS#1 <8>
DDR_B_RAS# <8>
DDR_CS2_DIMMB# <7>DDR_B_WE#<8>

M_ODT2 <7>

M_CLK_DDR3 <7>
M_CLK_DDR#3 <7>

R33

R33

1 2

12

10K_0402_5%

10K_0402_5%

R34

R34

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

+3VS

Compal Electronics, Inc.

DDR2 SO-DIMM II

DDR2 SO-DIMM II

DDR2 SO-DIMM II

LA-4595P

LA-4595P

LA-4595P

+V_DDR_MCH_REF <7,13>

1

1.0

1.0

1.0

of

of

of

14 49Tuesday, February 17, 2009

14 49Tuesday, February 17, 2009

14 49Tuesday, February 17, 2009

1bios.ru

5

PCI

SRC

CPU

CLKSEL1

0

FSA

CLKSEL0

MHz

266

MHz

1000

MHz

MHz

33.30

14.318 96.0 48.0

DOT_96
MHz

FSC FSB REF

CLKSEL2

0 1000 13 3 33.31 14.318 96.0 48.0

0 1001 20 0 33.30 14.318 96.0 48.0

D D

0 1001 16 6 33.31 14.318 96.0 48.0

1 1000 33 3 33.30 14.318 96.0 48.0

1 1000 10 0 33.31 14.318 96.0 48.0

1 1001 40 0 33.30 14.318 96.0 48.0

1 1 1

R37

R983

R983

FSA

1 2

2.2K_0402_5%

2.2K_0402_5%

CPU_BSEL0<5>

C C

R37

1 2

1K_0402_1%

1K_0402_1%

Reserved

MCH_CLKSEL0 <7>

For SED TEST

CLK_14M_ICH<19>

R39

CPU_BSEL1

CPU_BSEL1<5>

R39

1 2

1K_0402_1%

1K_0402_1%

SB, MINI PCI

MCH_CLKSEL1 <7>

CLK_DEBUG_PORT<23>
CLK_PCI_EC<27>
CLK_PCI_TPM<28>
PCI_CLK<17>

For SED TEST

R47

B B

CPU_BSEL2<5>

FSC

R1016

R1016

1 2

10K_0402_5%

10K_0402_5%

R47

1 2

1K_0402_1%

1K_0402_1%

MCH_CLKSEL2 <7>

VGA (Discrete)

CK_PWRGD<19>

4

USB
MHz

NB

CPU

22P_0402_50V8J

22P_0402_50V8J

ICH_SM_DA<13,14,19>

ICH_SM_CLK<13,14,19>

2

C120622P_0402_50V8J@C120622P_0402_50V8J

C120522P_0402_50V8J@C120522P_0402_50V8J

1

@

CLK_PCIE_VGA<31>
CLK_PCIE_VGA#<31 >

Routing the trace at least 10mil

*

C1196

C1196

22P_0402_50V8J

22P_0402_50V8J

CLK_MCH_BCLK#<7>
CLK_MCH_BCLK<7>
CLK_CPU_BCLK#<4>
CLK_CPU_BCLK<4>

C1209

@C1209

@

12

R991 33_0402_1%R991 33_0402_1%

1 2

R1001 33_0402_1%R1001 33_0402_1%

1 2

R1004 33_0402_1%R1004 33_0402_1%

1 2

R1006 33_0402_1%

R1006 33_0402_1%

1 2

R1008 33_0402_1%R1008 33_0402_1%

2

2

C120722P_0402_50V8J@ C120722P_0402_50V8J

1

1

@

CLK_48M_ICH<19>

CLKREQ#_7<7>

C120822P_0402_50V8J@C120822P_0402_50V8J

@

1 2

2

1

@

C1251

CLK_XTAL_OUT

CLK_XTAL_IN

14.31818MHZ_16P

14.31818MHZ_16P
R986

R986

0_0402_5%

0_0402_5%

1 2

Y7

Y7

12

2

2

1

T120PAD T120PAD

12

22P_0402_50V8J

22P_0402_50V8J

R1013 33_0402_1%R1013 33_0402_1%

R1024 0_0402_5%R1024 0_0402_5%
R1026 0_0402_5%R1026 0_0402_5%

C1197

C1197

22P_0402_50V8J

22P_0402_50V8J

1

R976 0_0402_5%

R976 0_0402_5%

1 2

R978 0_0402_5%

R978 0_0402_5%
R980 0_0402_5%

R980 0_0402_5%
R982 0_0402_5%

R982 0_0402_5%

ICH_SM_DA
ICH_SM_CLK

@C1251

@

1 2

12
12

+3VS_CK505

CK_PWRGD
CPU_BSEL1

CLK_XTAL_OUT
CLK_XTAL_IN

FSC

PCI2_TME
R_CLK_PCI_EC
27_SEL
ITP_EN

1 2

1 2

R51 475_0402_1%~DR51 475_0402_1%~D

12
12

3

R_MCH_BCLK#
R_MCH_BCLK
R_CPU_BCLK#
R_CPU_BCLK

U55

U55

1

CKPWRGD/PD#

2

FS_B/TEST_MODE

3

VSS_REF

4

XTAL_OUT

5

XTAL_IN

6

VDD_REF

7

REF_0/FS_C/TEST_

8

REF_1

9

SDA

10

SCL

11

NC

12

VDD_PCI

13

PCI_1

14

PCI_2

15

PCI_3

16

PCI_4/SEL_LCDCL

17

PCIF_5/ITP_EN

18

VSS_PCI

+3VS_CK505

FSA

R_CLKREQ#_7

+1.05VS_CK505

R_MCH_DREFCLK
R_MCH_DREFCLK#

+3VS_CK505

R971

R971

1 2

+3VS

0_0805_5%

0_0805_5%

+1.05VS_CK505

+3VS_CK505

71

68

73

72

70

69

GND

CPU_0

CPU_0#

VSS_CPU

VDD_CPU

VDD_4819USB_0/FS_A20USB_1/CLKREQ_A#21VSS_4822VDD_IO23SRC_0/DOT_9624SRC_0#/DOT_96#25VSS_IO26VDD_PLL327LCDCLK/27M28LCDCLK#/27M_SS29VSS_PLL330VDD_PLL3_IO31SRC_232SRC_2#33VSS_SRC34SRC_335SRC_3#

61

64

67

66

62

65

63

CPU_1

CPU_1#

CLKREQ_7#

VDD_CPU_IO

VDD_SRC_IO

SRC_8/CPU_ITP

SRC_8#/CPU_ITP#

1

C1189

C1189

10U_0805_10V4Z

10U_0805_10V4Z

2

0905 Connect to +VCCP

MEDIA_REQ#32

57

60

58

59

SRC_7

SRC_7#

VSS_SRC

CLKREQ_6#

SSCDREFCLK#
SSCDREFCLK

1

C1190

C1190

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

+VCCP

R972

R972

1 2

0_0805_5%

0_0805_5%

EXPCARD_REQ#16
R_PCIE_EXPR
R_PCIE_EXPR#

56

55

SRC_6

SRC_6#

VDD_SRC

36

+1.05VS_CK505

R979 0_0402_5%

R979 0_0402_5%
R981 0_0402_5%

R981 0_0402_5%

+3VS_CK505

PCI_STOP#

CPU_STOP#

VDD_SRC_IO

SRC_10#

SRC_10

CLKREQ_10#

SRC_11

SRC_11#

CLKREQ_11#

SRC_9#

SRC_9

CLKREQ_9#

VSS_SRC

CLKREQ_4#

SRC_4#

SRC_4

VDD_SRC_IO

CLKREQ_3#

S IC ICS9LPRS387AKLFT MLF 72P CLK GEN

S IC ICS9LPRS387AKLFT MLF 72P CLK GEN

R_PCIE_ICH#
R_PCIE_ICH

R_MCH_3GPLL#
R_MCH_3GPLL

2

1

C1191

C1191

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

Place close to U55

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1198

C1198

2

10U_0805_10V4Z

10U_0805_10V4Z

R1019 0_0402_5%

R1019 0_0402_5%

1 2

R1021 0_0402_5%

R1021 0_0402_5%

1 2

1 2
1 2

+1.05VS_CK505

H_STP_PCI#

54

H_STP_CPU#

53
52

R_CLK_WWA N#

51

R_CLK_WWA N

50

WWAN_RE Q#10

49

R_PCIE_SATA

48

R_PCIE_SATA#

47

R_CLKSATAREQ#

46

R_CLK_PCIE_LAN#

45

R_CLK_PCIE_LAN

44

GLAN_REQ#9

43
42

WLAN_REQ#4

41

R_CLK_PCIE_MCARD#

40

R_CLK_PCIE_MCARD

39
38
37

R1010 0_0402_5%

R1010 0_0402_5%

1 2

R1012 0_0402_5%

R1012 0_0402_5%

1 2

R1015 0_0402_5%R1015 0_0402_5%

1 2

R1018 0_0402_5%R1018 0_0402_5%

1 2

R1067 33_0402_1%R1067 33_0402_1%

1 2

R1195 33_0402_1%R1195 33_0402_1%

1 2

1

C1192

C1192

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

1

1

2

C1200

C1200

C1199

C1199

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

MEDIA_REQ#32 <30>
CLK_PCIE_Media <30>
CLK_PCIE_Media# <30>

EXPCARD_REQ#16 <26>
CLK_PCIE_EXPR <26>
CLK_PCIE_EXPR# <26>

H_STP_PCI# <19>

H_STP_CPU# <19>

R988 0_0402_5%

R988 0_0402_5%

1 2

R989 0_0402_5%

R989 0_0402_5%

1 2

R992 0_0402_5%R9 92 0_0402_5%

1 2

R994 0_0402_5%R9 94 0_0402_5%

1 2

R56 475_0402_1%~DR56 475_0402_1%~D

1 2

R996 0_0402_5%R9 96 0_0402_5%

1 2

R997 0_0402_5%R9 97 0_0402_5%

1 2

R1005 0_0402_5%R1005 0_0402_5%

1 2

R1007 0_0402_5%R1007 0_0402_5%

1 2

1

C1193

C1193

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

10U_0805_10V4Z

10U_0805_10V4Z

1

C1201

C1201

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

CardBus OZ888

Express Card

CPU_STP

CLK_PCIE_ICH# <19>
CLK_PCIE_ICH <19>

CLK_MCH_3GPLL# <7>
CLK_MCH_3GPLL <7>

CLK_NVSS_27M <31>
CLK_NV_27M <31>

1

C1194

C1194

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1202

C1202

C1203

C1203

2

CLK_PCIE_WW AN# <23>
CLK_PCIE_WW AN <23>

WWAN_RE Q#10 <23>
CLK_PCIE_SATA <18>
CLK_PCIE_SATA# <18>
CLKSATAREQ# <19>
CLK_PCIE_LAN# <21>
CLK_PCIE_LAN <21>
GLAN_REQ#9 <21>

WLAN_REQ#4 <23>
CLK_PCIE_MCARD# <23>
CLK_PCIE_MCARD <23>

ICH

NB_3GPLL

VGA_27M (DIS)

1

+1.05VS_CK505

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1195

C1195

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

C1204

C1204

MiniCard_WWAN

ICH_SATA

GLAN

MiniCard_WLAN

ITP_EN

27_SEL

PCI2_TME

A A

12

R1032

R1032
10K_0402_5%

10K_0402_5%

5

0 = SRC8/SRC8#

*

1 = ITP/ITP#

0 = Enable DOT96 & SRC1(UMA)

1 = Enable SRC0 & 27MHz(DIS)

*

0 = Overclocking of CPU and SRC Allowed

1 = Overclocking of CPU and SRC NOT allowed

*

+3VS_CK505

12

R1030

R1030
10K_0402_5%

10K_0402_5%

ITP_EN 27_SEL

+3VS_CK505

1 2

PCI2_TME

R1031

R1031
10K_0402_5%

10K_0402_5%

EXPCARD_REQ#16

WWAN_RE Q#10

CLKSATAREQ#

GLAN_REQ#9

WLAN_REQ#4

CLKREQ#_7

MEDIA_REQ#32

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Clock Generator CK505

Clock Generator CK505

Clock Generator CK505

1 2

R90 10K_0402_5%R90 10K_0402_5%

1 2

R89 10K_0402_5%R89 10K_0402_5%

1 2

R88 10K_0402_5%R88 10K_0402_5%

1 2

R87 10K_0402_5%R87 10K_0402_5%

1 2

R85 10K_0402_5%R85 10K_0402_5%

1 2

R60 10K_0402_5%R60 10K_0402_5%

1 2

R80 10K_0402_5%R80 10K_0402_5%

LA-4595P

LA-4595P

LA-4595P

1

+3VS

1.0

1.0

1.0

of

15 49Tuesday, February 17, 2009

of

15 49Tuesday, February 17, 2009

of

15 49Tuesday, February 17, 2009

1bios.ru

A

C R T

1 1

MSEN#<27>

VGA_CRT_R<31>

VGA_CRT_G<31>

VGA_CRT_B<31>

2 2

MSEN#

VGA_CRT_R

VGA_CRT_G

1

12

12

R63

R63

R65

R65

R64

R64

1 2

C52 0.1U_0402_16V4ZC52 0.1U_0402_16V4Z

VGA_HSYNC<31>

VGA_VSYNC<31>

150_0402_1%

150_0402_1%

VGA_HSYNC

VGA_VSYNC

150_0402_1%

150_0402_1%

150_0402_1%

150_0402_1%

@

@

@

@

C46

C46

C45

C45

2

22P_0402_50V8J

22P_0402_50V8J

+CRT_VCC

5

1

P

4

OE#

A2Y

G

U62

U62

74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

3

1 2

C115 0.1U_0402_16V4ZC115 0.1U_0402_16V4Z

1

12

1

@

@

C47

C47

2

2

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

+CRT_VCC

B

For NVidia

1 2

L8

L8

BK1608LL121-T 0603

BK1608LL121-T 0603

1 2

L10

L10

BK1608LL121-T 0603

BK1608LL121-T 0603

1 2

L14

L14

BK1608LL121-T 0603

BK1608LL121-T 0603

For EMI

R62 10K_0402_5%R62 10K_0402_5%

D_CRT_HSYNC

1

5

P

D_CRT_VSYNC

4

OE#

A2Y

G

U63

U63
74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

3

+5VS

CRT_R_L

CRT_G_L

CRT_B_LVGA_CRT_B

C48

C48

4.7P_0402_50V8C

4.7P_0402_50V8C

12

DAN217_SC59-3

DAN217_SC59-3

1

2

D11

D11

DAN217_SC59-3

DAN217_SC59-3

1

2

3

@

@

1

C49

C49

2

4.7P_0402_50V8C

4.7P_0402_50V8C

1 2

L11 0_0603_5%

L11 0_0603_5%

1 2

L13 0_0603_5%

L13 0_0603_5%

D18

D18

1

2

3

@

@

C50

C50

4.7P_0402_50V8C

4.7P_0402_50V8C

DAN217_SC59-3

DAN217_SC59-3

1

2

D20

D20

2

@

@

1

2

1

3

HSYNC_L

VSYNC_L

C55

C55

15P_0402_50V8J

15P_0402_50V8J

+5VS

1 2

0_1210_5%~D

0_1210_5%~D

1

C144

C144

2

15P_0402_50V8J

15P_0402_50V8J

R140

R140

C51

C51

1

C53

C53

2

100P_0402_50V8J

100P_0402_50V8J

C

W=40mils

+5VS_CRTVCC

DDC_MD2

1

2

100P_0402_50V8J

100P_0402_50V8J

C54

C54

D14

D14

2 1

RB411DT146 SOT23

RB411DT146 SOT23

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

@

@

100P_0402_50V8J

100P_0402_50V8J

@

@

C140

C140

C43

C43

1

2

W=40mils

1

2

VGA_DDC_DATA_C

VGA_DDC_CLK_C

100P_0402_50V8J

100P_0402_50V8J

+CRT_VCC

1

2

C44

C44

@

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z
JCRT1

JCRT1

6

11

1
7

12

2
8

13

3
9

14

4
10
15

5

SUYIN_070549FR015S208CR

SUYIN_070549FR015S208CR

CONN@

CONN@

D

+3VS+CRT_VCC +3VS+CRT_VCC +3VS

R7

R6

1 2

1 2

2K_0402_5%R72K_0402_5%

2K_0402_5%R62K_0402_5%

2

G

VGA_DDC_DATA_C

VGA_DDC_CLK_C

16
17

G

1 3

D

D

Q3

Q3
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

R77

R77

1 2

2.2K_0402_5%

2.2K_0402_5%

S

S

2

G

G

1 3

D

S

D

S

Q5

Q5
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

R103

R103

E

1 2

2.2K_0402_5%

2.2K_0402_5%

VGA_DDCDATA <31>

VGA_DDCCLK <31>

+3VS

L C D

3 3

VGA_LVDDEN<31>

LCD_VCC_TEST_EN<27>

4 4

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

VGA_LVDDEN

LCD_VCC_TEST_EN

A

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

D8

D8

2 1

R662

R662

0_0402_5%

0_0402_5%

Q7

Q7

12

+LCDVDD +5VALW

R67

R67

1 2
13

D

D

S

S

100_0603_1%

100_0603_1%

2

G

G

Q9

Q9

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

2

G

G

12

R15

R15

10K_0402_5%

10K_0402_5%

1 2

13

D

D

S

S

1

R75

R75

47K_0402_5%

47K_0402_5%

12

R68 1K_0402_5%

R68 1K_0402_5%

C173

C173

0.047U_0402_16V7K

0.047U_0402_16V7K

D60

D60

3

INVT_PWM

2

PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

@

@

W=60mils

+3VS

S

S

SI2301BDS-T1-E3 1P SOT23

SI2301BDS-T1-E3 1P SOT23

G

G

Q6

Q6

2

1

2

D

D

1 3

1

4.7U_0805_10V4Z

4.7U_0805_10V4Z

2

C174

C174

7.3

7.3

+LCDVDD

W=60mils

+LCDVDD

0.1U_0402_16V4Z

0.1U_0402_16V4Z

LCD_TST
LCD_CBL_DET#
INVT_PWM
DAC_BRIG
DISPOFF#

1

C41

C41

2

C3

C6

C4

C3

C6

C4

100P_0402_25V8K

100P_0402_25V8K

100P_0402_25V8K

100P_0402_25V8K

100P_0402_25V8K

100P_0402_25V8K

100P_0402_25V8K

100P_0402_25V8K

G7X_ENBKL<27,31>

@ C38

@

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C14

C17

C14

C17

100P_0402_25V8K

100P_0402_25V8K

BKOFF#<27>

C38

1 2

+LCDVDD +LCDVDD

+3VS

VGA_LVDSA0-<31>

VGA_LVDSA1+<31>
VGA_LVDSA2-<31>

VGA_LVDSAC+<31>
VGA_LVDSB0-<31>

VGA_LVDSB1+<31>
VGA_LVDSB2-<31>

VGA_LVDSBC+<31>

INVT_PWM<27>
DAC_BRIG<27>

EC_SMB_CK2<4,27,31>

EC_SMB_DA2<4,27,31>

EMIESD

B

C

BKOFF#

G7X_ENBKL

R652

R652

2.2K_0402_5%

2.2K_0402_5%

JLVDS1

JLVDS1

1

1

2

3

3

4

5

5

VGA_LVDSA0-

VGA_LVDSA1+
VGA_LVDSA2-

VGA_LVDSAC+
VGA_LVDSB0-

VGA_LVDSB1+
VGA_LVDSB2-

VGA_LVDSBC+

EC_SMB_CK2_R

+B+
INVT_PWM
DAC_BRIG

1 2

R19 0_0402_5%@ R19 0_0402_5%@

1 2

R12 0_0402_5%@ R12 0_0402_5%@

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

6

7

7

8

9

9

10

11

11

12

13

13

14

15

15

16

17

17

18

19

19

20

21

21

22

23

23

24

25

25

26

27

27

28

29

29

30

31

31

32

33

33

34

35

35

36

37

37

38

39

39

40

GND41GND

ACES_88242-4001

ACES_88242-4001

EC_SMB_CK2_R

EC_SMB_DA2_R

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42

D26

D26
CH751H-40_SC76

CH751H-40_SC76

D25

D25
CH751H-40_SC76@

CH751H-40_SC76@

LCD_CBL_DET#
LCD_TSTVGA_CLK_LCD
VGA_DAT_LCD
VGA_LVDSA0+
VGA_LVDSA1-

VGA_LVDSA2+
VGA_LVDSAC-

VGA_LVDSB0+
VGA_LVDSB1-

VGA_LVDSB2+
VGA_LVDSBC-

EC_SMB_DA2_R

DISPOFF#

Compal Secret Data

Compal Secret Data

Compal Secret Data

12

R21

R21

4.7K_0402_5%

4.7K_0402_5%

DISPOFF#

21

21

LCD_CBL_DET# <27>

VGA_LVDSA0+ <31>
VGA_LVDSA1- <31>

VGA_LVDSA2+ <31>
VGA_LVDSAC- <31>

VGA_LVDSB0+ <31>
VGA_LVDSB1- <31>

VGA_LVDSB2+ <31>
VGA_LVDSBC- <31>

C32

C32

Deciphered Date

Deciphered Date

Deciphered Date

D

LCD_TST <27>VGA_CLK_LCD<31>

VGA_DAT_LCD <31>

2

2

C34

C34

0.1U_0603_50V4Z

0.1U_0603_50V4Z

1

1

0.1U_0603_50V4Z

0.1U_0603_50V4Z

JCA1

JCA1

1

1

2

2

USB20_P1<19>

+5VS

+3VS

USB20_N1<19>

MIC_SIG<24>

MIC_CLK<24>

MIC_DIAG<27>

L42 MBK1608221YZF_0603

L42 MBK1608221YZF_0603

1 2

MIC_SIG

L43 MBK1608221YZF_0603

L43 MBK1608221YZF_0603

R81

MIC_CLK
MIC_DIAG

R81

1 2

0_0603_5%

0_0603_5%

1 2

CAMERA

+B+

Compal Electronics, Inc.

Title

Title

Title

CRT CONN/LCD CONN

CRT CONN/LCD CONN

CRT CONN/LCD CONN

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-4595P

LA-4595P

LA-4595P

Date: Sheet

Date: Sheet

Date: Sheet

E

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND

12

GND

ACES_88460-1001

ACES_88460-1001

of

16 49Tuesday, February 17, 2009

of

16 49Tuesday, February 17, 2009

of

16 49Tuesday, February 17, 2009

1.0

1.0

1.0

1bios.ru

5

+3VS

R1035 8.2K_0402_5%

R1035 8.2K_0402_5%

1 2

R1036 8.2K_0402_5%

R1036 8.2K_0402_5%

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

12

R1037 8.2K_0402_5%

R1037 8.2K_0402_5%

R1038 8.2K_0402_5%

R1038 8.2K_0402_5%

R1039 8.2K_0402_5%

D D

C C

R1039 8.2K_0402_5%

R1040 8.2K_0402_5%

R1040 8.2K_0402_5%

R1041 8.2K_0402_5%

R1041 8.2K_0402_5%

R1042 8.2K_0402_5%

R1042 8.2K_0402_5%

+3VS

R1043 8.2K_0402_5%R 1043 8.2K_0402_5%

R1044 8.2K_0402_5%

R1044 8.2K_0402_5%

R1045 8.2K_0402_5%

R1045 8.2K_0402_5%

R1046 8.2K_0402_5%

R1046 8.2K_0402_5%

R1047 8.2K_0402_5%

R1047 8.2K_0402_5%

R1048 8.2K_0402_5%

R1048 8.2K_0402_5%

R1049 8.2K_0402_5%

R1049 8.2K_0402_5%

R1050 8.2K_0402_5%

R1050 8.2K_0402_5%

R1051 8.2K_0402_5%R 1051 8.2K_0402_5%

R1052 8.2K_0402_5%R 1052 8.2K_0402_5%

R1053 8.2K_0402_5%R 1053 8.2K_0402_5%

R1054 8.2K_0402_5%R 1054 8.2K_0402_5%

R20 10K_0402_5%

R20 10K_0402_5%

PCI_DEVSEL#

PCI_STOP#

PCI_TRDY#

PCI_FRAME#

PCI_PLOCK#

PCI_IRDY#

PCI_SERR#

PCI_PERR#

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#

PCI_PIRQD#

PCI_PIRQE#

PCI_PIRQF#

PCI_PIRQG#

PCI_PIRQH#

PCI_REQ0#

PCI_REQ1#

PCI_REQ2#

PCI_REQ3#

PME#

A16 swap override Strap

Low= A16 swap override Enble

B B

PCI_GNT3# High= Default

*

4

PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC# PCI_PIRQG#
PCI_PIRQD#

Boot BIOS Strap

PCI_GNT0# SPI_CS#1

U56B

U56B

D11

AD0

C8
D9

E12

E9

C9

E10

B7
C7
C5

G11

F8

F11

E7

A3
D2

F10

D5

D10

B3

F7
C3

F3

F4
C1
G7
H7
D1
G5
H6
G1
H3

E1

PCI

PCI

AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

Interrupt I/F

Interrupt I/F

J5

PIRQA#
PIRQB#

J6

PIRQC#
PIRQD#C4PIRQH#/GPIO5

ICH9M REV 1.0

ICH9M REV 1.0

REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

PIRQE#/GPIO2

PIRQF#/GPIO3

PIRQG#/GPIO4

Boot BIOS Location

REQ0#
GNT0#

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR#

PLOCK#

SERR#

STOP#
TRDY#

FRAME#

PLTRST#

PCICLK

PME#

3

PCI_REQ0#

F1

PCI_GNT0#

G4

PCI_REQ1#

B6
A7

PCI_REQ2#

F13
F12

PCI_REQ3#

E6

PCI_GNT3#

F6

D8
B4
D6
A5

PCI_IRDY#

D3
E3

PCI_PCIRST#

R1

PCI_DEVSEL#

C6

PCI_PERR#

E4

PCI_PLOCK#

C2

PCI_SERR#

J4

PCI_STOP#

A4

PCI_TRDY#

F5

PCI_FRAME#

D7

PCI_PLTRST#

C14

PCI_CLK

D4
R2

H4
K6
F2
G2

PME#

PCI_PIRQE#
PCI_PIRQF#

PCI_PIRQH#

C2

C2

12

R10 33_0402_5%@R10 33_0402_5%@

@

@

22P_0402_50V8J

22P_0402_50V8J

PCI_CLK < 15>

1 2

PCI_CLK

2

PCI_PCIRST#

C78

C78

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R1094

R1094
0_0402_5%

0_0402_5%

+3VALW

1

2

@

@

5

U61

@ U61

@

2

P

B

4

Y

1

A

G

MC74VHC1G08DFT2G SC70 5P

MC74VHC1G08DFT2G SC70 5P

3

12

PCI_RST#

1

PCI_RST# <21,23,26,28>

R1058

@R1058

@

1 2

R1060

@R1060

@

1 2

SPI1

PCI

LPC

*

+3VALW

1K_0402_5%

1K_0402_5%

1K_0402_5%

1K_0402_5%

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

PCI_PLTRST#

2

C57

C57

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R1061

R1061
0_0402_5%

0_0402_5%

+3VALW

1

2

@

@

5

U58

@ U58

@

2

P

B

1

A

12

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

PLT_RST#

4

Y

G

MC74VHC1G08DFT2G SC70 5P

MC74VHC1G08DFT2G SC70 5P

3

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ICH9(1/4)-PCI/INT

ICH9(1/4)-PCI/INT

ICH9(1/4)-PCI/INT

LA-4595P

LA-4595P

LA-4595P

1

PLT_RST# <7,27,30,31>

of

17 49Tuesday, February 17, 2009

of

17 49Tuesday, February 17, 2009

of

17 49Tuesday, February 17, 2009

1.0

1.0

1.0

R1055

@R1055

5

@

1 2

1K_0402_5%

1K_0402_5%

PCI_GNT3#

A A

0

1

1

SPI_CS1#_R<19>

4

0

1

SPI_CS1#_R

PCI_GNT0#

1bios.ru

5

4

3

2

1

+RTCVCC

ICH_RTCX1

R984

R984
0_0402_5%

0_0402_5%

C1212

C1212

12P_0402_50V8J

12P_0402_50V8J

ACZ_BITCLK

ACZ_SDOUT

SM_INTRUDER#

LAN100_SLP_INTVRMEN

1U_0603_10V4Z

1U_0603_10V4Z

ICH_RTCX2

12

HDD

ODD

C1220

C1220

GATEA20

KB_RST#

+RTCVCC

1 2

R1068 20K_0402_5%R1068 20K_0402_5%

1 2

R1109 20K_0402_5%R1109 20K_0402_5%

1

JOPEN2@JOPEN2

1U_0603_10V4Z

1U_0603_10V4Z

@

1 2

2

+1.5VS

ACZ_BITCLK<24>
ACZ_SYNC<24>

ACZ_RST#<24>

ADC_ACZ_SDIN0<24>

ACZ_SDOUT<24>

SATA_LED#<28>

PSATA_IRX_DTX_N0_C<22>

PSATA_IRX_DTX_P0_C<22>
PSATA_ITX_DRX_N0<22>
PSATA_ITX_DRX_P0<22>

ODD_IRX_DTX_N0_C<22>

ODD_IRX_DTX_P0_C<22>
ODD_ITX_DRX_N0<22>
ODD_ITX_DRX_P0<22>

+3VS

1

C1210

C1210

2

R1073 24.9_0402_1%R1073 24.9_0402_1%

R1074 33_0402_5%

R1074 33_0402_5%
R1076 33_0402_5%

R1076 33_0402_5%

R1077 33_0402_5%

R1077 33_0402_5%

R1079 33_0402_5%

R1079 33_0402_5%

1 2

R1080 10K_0402_5%R1080 10K_0402_5%

PSATA_ITX_DRX_N0
PSATA_ITX_DRX_P0

C1213

C1213
C1214

C1214

C1215

C1215

C1216

C1216

JOPEN1@JOPEN1

@

1 2

Need to place JMINI1

1 2

1 2
1 2

1 2

1 2

0.01U_0402_50V7K

0.01U_0402_50V7K

1 2
1 2

0.01U_0402_50V7K

0.01U_0402_50V7K

0.01U_0402_50V7K

0.01U_0402_50V7K

1 2
1 2

0.01U_0402_50V7K

0.01U_0402_50V7K

LAN100_SLP_INTVRMEN
LAN100_SLP_INTVRMEN

T123PAD T123PAD
T124PAD T124PAD

PSATA_ITX_DRX_N0_C
PSATA_ITX_DRX_P0_C

ODD_ITX_DRX_N0_CODD_ITX_DRX_N0
ODD_ITX_DRX_P0_CODD_ITX_DRX_P0

ICH_RTCX1
ICH_RTCX2

ICH_RTCRST#
SRTCRST#
SM_INTRUDER#

GLAN_COMP

HDA_BITCLK
HDA_SYNC

HDARST#

ADC_ACZ_SDIN0

HDA_SDOUT

SATA_LED#

U56A

U56A

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M REV 1.0

ICH9M REV 1.0

RTCLAN / GLANIHDASATA

RTCLAN / GLANIHDASATA

LPCCPU

LPCCPU

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT#

INTR

RCIN#

SMI#

STPCLK#

THRMTRIP#

TP12

SATA4RXN

SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN

SATA5RXP
SATA5TXN
SATA5TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#

SATARBIAS

LPC_AD0

K5

LPC_AD1

K4

LPC_AD2

L6

LPC_AD3

K2

LPC_FRAME#

K3

LPC_DRQ0#

J3
J1

GATEA20

N7

H_A20M#

AJ27

H_DPRSTP#

AJ25

H_DPSLP#

AE23

R_H_FERR#

AJ26

H_PWRGOOD

AD22

H_IGNNE#

AF25

H_INIT#

AE22

H_INTR

AG25

KB_RST#

L3

H_NMI

AF23

NMI

H_SMI#

AF24

H_STPCLK#

AH27

THRMTRIP_ICH#

AG26

AG27

AH11
AJ11
AG12
AF12

AH9
AJ9
AE10
AF10

CLK_PCIE_SATA#

AH18

CLK_PCIE_SATA

AJ18

AJ7

R1081

R1081

AH7

1 2

24.9_0402_1%

24.9_0402_1%

Within 500 mils

LPC_AD[0..3] <23,27,28>

LPC_FRAME# <23,27,28>

T121 PADT121 PAD
T122 PADT122 PAD

GATEA20 <27>
H_A20M# <4>

R1072

R1072

1 2

56_0402_5%

56_0402_5%

H_PWRGOOD <5>

H_IGNNE# <4>

H_INIT# <4>
H_INTR <4>

KB_RST# <27>

H_NMI <4>
H_SMI# <4>

H_STPCLK# <4>

R1078 54.9_0402_1%R1078 54.9_0402_1%

1 2

T52 PADT52 PAD

H_FERR#

+VCCP

CLK_PCIE_SATA# <15>
CLK_PCIE_SATA <15>

1 2

1 2

H_DPRSTP# <5,7,47>
H_DPSLP# <5>

12

R1075

R1075
56_0402_5%

56_0402_5%

1 2

R1062 1M_0402_5%R1062 1M_0402_5%

R1064

R1064

D D

R1069

R1069

1 2

10M_0402_5%

10M_0402_5%

1

C1211

C1211

12P_0402_50V8J

12P_0402_50V8J

2

C C

Y8

Y8

32.768KHZ_12.5P_1TJS125BJ2A251

32.768KHZ_12.5P_1TJS125BJ2A251

C1321 15P_0402_50V8J @C1321 15P_0402_50V8J @

B B

For EMI TEST

332K_0402_1%~D

332K_0402_1%~D

1

2

1

2

4

IN

OUT

NC3NC

1 2

C1307 15P_0402_50V8J @C1307 15P_0402_50V8J @

1 2

+3VS

R1063

R1063

10K_0402_5%

10K_0402_5%

R1066

R1066

10K_0402_5%

10K_0402_5%

+VCCP

R1070

R1070
56_0402_5%

56_0402_5%

1 2

H_THERMTRIP# <4,7>

H_FERR# <4>

XOR CHAIN ENTRANCE STRAP:RSVD

+3VS

R1082

@R1082

@

1 2

1K_0402_5%

1K_0402_5%

R1083

@R1083

@

1 2

1K_0402_5%

1K_0402_5%

A A

ICH_RSVD

5

ACZ_SDOUT

ICH_RSVD <19>

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

ICH9(2/4)_LAN,HD,IDE,LPC

ICH9(2/4)_LAN,HD,IDE,LPC

ICH9(2/4)_LAN,HD,IDE,LPC

LA-4595P

LA-4595P

LA-4595P

1

1.0

1.0

1.0

of

of

of

18 49Tuesday, February 17, 2009

18 49Tuesday, February 17, 2009

18 49Tuesday, February 17, 2009

1bios.ru

5

@

@

1 2

R1096 10K_0402_5% @R 1096 10K_0402_5% @

1 2

SERIRQ

PCI_CLKRUN#

EC_THERM#

OCP#

LAN_CABDT

EC_SCI#

SB_SPKR

+3VALW

ICH_PCIE_WAKE#<21,23,26,27>

R1085 2.2K_0402_5%R 1085 2.2K_0402_5%
R1087 2.2K_0402_5%R 1087 2.2K_0402_5%

VGATE<7,27,47>

ICH_SMBCLK<26>
ICH_SMBDATA<26>

R1102 100K_0402_5%

R1102 100K_0402_5%

+3VS

D D

1 2

R1084 10K_ 0402_5%R1084 10K_0402_5%

1 2

R1086 8.2K_0402 _5%R1086 8.2K_0402_5%

1 2

R1088 8.2K_0402 _5%@R1088 8.2K_0402_5%@

1 2

R1090 10K_ 0402_5%R1090 10K_0402_5%

1 2

R310 10K _0402_5%R310 10K_0402_5%

1 2

R1095 8.2K_0402 _5%

R1095 8.2K_0402 _5%

+3VS

low-->default

High -->No boot

+3VS

R1101 10K_0402_5%@R1101 10K_0402_5%@

checklist pull hi

C C

1 2

CL_RST#1

ICH_LOW_BAT#

ICH_PCIE_WAKE#_R

ICH_RI#

XDP_DBRESET#

ME_EC_CLK1

ME_EC_DATA1

EC_LID_OUT#

EC_SMI#

SB_SPKR<24>

+3VALW

1 2

R1108 10K_ 0402_5%R1108 10K_0402_5%

1 2

R1110 8.2K_0402 _5%R1110 8.2K_0402_5%

1 2

R1111 10K_ 0402_5%R1111 10K_0402_5%

1 2

R1113 10K_ 0402_5%R1113 10K_0402_5%

1 2

R1114 10K_ 0402_5%R1114 10K_0402_5%

1 2

R1115 10K_ 0402_5%R1115 10K_0402_5%

R1116 10K_ 0402_5%R1116 10K_0402_5%

1 2

R1117 10K_ 0402_5%R1117 10K_0402_5%

1 2

R1119 8.2K_0402 _5%R1119 8.2K_0402_5%

GLAN

WLAN

B B

A A

EC_SWI#

USB_OC#1

USB_OC#2_#8

USB_OC#4

USB_OC#7

USB_OC#9

USB_OC#0

USB_OC#3

USB_OC#5

USB_OC#10

USB_OC#11

R113 10K _0402_5%R113 10K_0402_5%

1 2

R114 10K _0402_5%R114 10K_0402_5%

1 2

R125 10K _0402_5%R125 10K_0402_5%

1 2

R129 10K _0402_5%R129 10K_0402_5%

1 2

R130 10K _0402_5%R130 10K_0402_5%

1 2

R132 10K _0402_5%R132 10K_0402_5%

1 2

R134 10K _0402_5%R134 10K_0402_5%

1 2

R135 10K _0402_5%R135 10K_0402_5%

1 2

R136 10K _0402_5%R136 10K_0402_5%

1 2

R137 10K _0402_5%R137 10K_0402_5%

1 2

R138 10K _0402_5%R138 10K_0402_5%

1 2

5

ICH_SM_DA<13,14,15>

ICH_SM_CLK<13,14,15>

+3VALW

+3VS

R11232.2K_0402_5% R11232.2K_0402_5%

Express Card

Card Reader

12

12

2.2K_0402_5%

2.2K_0402_5%
R1124

R1124

S

S

G

G

+3VS

WWAN

Q106

Q106
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

D

D

13

S

S

2

G

G

4

1 2
1 2

T125PAD T 125PAD

XDP_DBRESET#<4>

PM_BMBUSY#<7>

EC_LID_OUT#<27>

H_STP_PCI#<15>
H_STP_CPU#<15>

PCI_CLKRUN#<27,28>

ICH_PCIE_WAKE# ICH_PCIE_W AKE#_R

1 2

@

@

GLAN_RXN<21>
GLAN_RXP<21>

SPI_CS1#_R<17>

ICH_SMBDATA

D

D

ICH_SMBCLK

13

Q107

Q107

2

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

R658

1 2

SERIRQ<27,28>
EC_THERM#<27>

OCP#<4>

LAN_LOPWEN<21>

EC_SMI#<27>
EC_SCI#<27>

CLKSATAREQ#<15>

MCH_ICH_SYNC#<7>

ICH_RSVD<18>

GLAN_TXN<21>
GLAN_TXP<21>

PCIE_RXN3<23>
PCIE_RXP3<23>
PCIE_TXN3< 23>
PCIE_TXP3<23>

PCIE_RXN4<26>
PCIE_RXP4<26>
PCIE_TXN4< 26>
PCIE_TXP4<26>

PCIE_RXN5<30>
PCIE_RXP5<30>
PCIE_TXN5<30>
PCIE_TXP5<30>

PCIE_RXN1<23>
PCIE_RXP1<23>
PCIE_TXN1< 23>
PCIE_TXP1<23>

4

ICH_SMBCLK
ICH_SMBDATA
CL_RST#1
ME_EC_CLK1
ME_EC_DATA1

ICH_RI#

SUS_STAT#
XDP_DBRESET#

PM_BMBUSY#

EC_LID_OUT#

H_STP_PCI#
R_STP_CPU#

PCI_CLKRUN#

0_0402_5%

0_0402_5%

@R658

@

VRMPWRGD

1 2

R1099 0_0402_5%R1099 0_0402_5%
T128PAD T128PAD

OCP#
LAN_LOPWEN

EC_SMI#
EC_SCI#

T130PAD T130PAD

T131PAD T131PAD
T132PAD T132PAD

CLKSATAREQ#

GPIO49

SB_SPKR
MCH_ICH_SYNC#
ICH_RSVD

T133PAD T133PAD
T134PAD T134PAD
T135PAD T135PAD

0.1U_0402_16V7K~N

0.1U_0402_16V7K~N

0.1U_0402_16V7K~N

0.1U_0402_16V7K~N

0.1U_0402_16V7K~N

0.1U_0402_16V7K~N

0.1U_0402_16V7K~N

0.1U_0402_16V7K~N

USB_OC#0<29>

USB_OC#2_#8<29>

EC_SWI#<27>

USB_OC#9<29>

ICH_SMBDATA <26>

ICH_SMBCLK <26>

SERIRQ

EC_THERM#

T53T53

12

R1125

R1125

22.6_0402_1%

22.6_0402_1%

U56C

U56C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP11

AG19

GPIO1

AH21

GPIO6

AG21

GPIO7

A21

GPIO8

C12

GPIO12

C21

GPIO13

AE18

GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP8

AJ20

TP9

AJ21

TP10

ICH9M REV 1.0

ICH9M REV 1.0

GLAN_RXN
GLAN_RXP
GLAN_TXN_C

C12210.1U_0402_16V7K~N C12210.1U_0402_16V7K~N

12

GLAN_TXP_C

C12220.1U_0402_16V7K~N C12220.1U_0402_16V7K~N

12

PCIE_RXN3
PCIE_RXP3
PCIE_C_TXN3

C12230.1U_0402_16V7K~N C12230.1U_0402_16V7K~N

12

PCIE_C_TXP3

C12240.1U_0402_16V7K~N C12240.1U_0402_16V7K~N

12

PCIE_RXN4
PCIE_RXP4

C1225

C1225

PCIE_C_TXN4

12

C1226

C1226

PCIE_C_TXP4

12

C1228

C1228

12

C1227

C1227

12

PCIE_RXN1
PCIE_RXP1
PCIE_C_TXN1

C13090.1U_0402_16V7K~N C13090.1U_0402_16V7K~N

12

PCIE_C_TXP1

C13080.1U_0402_16V7K~N C13080.1U_0402_16V7K~N

12

SPI_CS1#_R

USB_OC#0
USB_OC#1
USB_OC#2_#8
USB_OC#3
USB_OC#4
USB_OC#5
EC_SWI#
USB_OC#7
USB_OC#2_#8
USB_OC#9
USB_OC#10
USB_OC#11

USBRBIAS

Within 500 mils

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

U56D

U56D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M REV 1.0

ICH9M REV 1.0

Issued Date

Issued Date

Issued Date

3

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMBSYS GPIO

SMBSYS GPIO

Clocks

Clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

Power MGTController Link

Power MGTController Link

GPIO

GPIO

MEM_LED/GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

MISC

MISC

PCI-Express

PCI-Express

DMI_ZCOMP

DMI_IRCOMP

SPI

SPI

USB

USB

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

3

GPIO21

AH23

GPIO19

AF19

GPIO36

AE21

GPIO37

AD20

CLK_14M_ICH

H1

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

PWROK

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

CK_PWRGD

CLPWROK

SLP_M#

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST0#
CL_RST1#

WOL_EN/GPIO9

DMI0RXN
DMI0RXP
DMI0TXN

DMI0TXP

DMI1RXN
DMI1RXP
DMI1TXN

DMI1TXP

DMI2RXN
DMI2RXP
DMI2TXN

DMI2TXP

DMI3RXN
DMI3RXP
DMI3TXN

DMI3TXP

DMI_CLKN
DMI_CLKP

Direct Media Interface

Direct Media Interface

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N

USBP9P
USBP10N
USBP10P
USBP11N
USBP11P

CLK_48M_ICH

AF3

ICH_SUSCLK

P1

SLP_S3#

C16

SLP_S4#

E16

SLP_S5#

G17

C10

ICH_PWROK

G20

M2

ICH_LOW_BAT#

B13

PBTN_OUT#

R3

D20

R_EC_RSMRST#GPIO49

D22

CK_PWRGD_R

R5

M_PWROK

R6

B16

CL_CLK0

F24
B19

CL_DATA0

F22
C19

CL_VREF0_ICH

C25
A19

CL_RST#

F21
D18

A16
C18
C11

1 2

C20

DMI_MTX_IRX_N0

V27

DMI_MTX_IRX_P0

V26

DMI_MRX_ITX_N0

U29

DMI_MRX_ITX_P0

U28

DMI_MTX_IRX_N1

Y27

DMI_MTX_IRX_P1

Y26

DMI_MRX_ITX_N1

W29

DMI_MRX_ITX_P1

W28

DMI_MTX_IRX_N2

AB27

DMI_MTX_IRX_P2

AB26

DMI_MRX_ITX_N2

AA29

DMI_MRX_ITX_P2

AA28

DMI_MTX_IRX_N3

AD27

DMI_MTX_IRX_P3

AD26

DMI_MRX_ITX_N3

AC29

DMI_MRX_ITX_P3

AC28

CLK_PCIE_ICH#

T26

CLK_PCIE_ICH

T25

AF29

DMI_IRCOMP

AF28

USB20_N0

AC5

USB20_P0

AC4

USB20_N1

AD3

USB20_P1

AD2

USB20_N2

AC1

USB20_P2

AC2

USB20_N3

AA5

USB20_P3

AA4

USB20_N4

AB2

USB20_P4

AB3

USB20_N5

AA1

USB20_P5

AA2

USB20_N6

W5

USB20_P6

W4

USB20_N7

Y3

USB20_P7

Y2

USB20_N8

W1

USB20_P8

W2

USB20_N9

V2

USB20_P9

V3

USB20_N10

U5

USB20_P10

U4
U1
U2

Compal Secret Data

Compal Secret Data

Compal Secret Data

R6570_0402_5%@ R6570_0402_5%@

Deciphered Date

Deciphered Date

Deciphered Date

2

1 2

R1089 8.2K_0402_5%R1089 8.2K_0402_5%

CLK_14M_ICH <15>
CLK_48M_ICH <15>

T126 PADT126 PAD

SLP_S3# <27>
SLP_S4# <27>
SLP_S5# <27>

T127 PADT127 PAD

DPRSLPVR <7,47>

PBTN_OUT# <27>

R1104

R1104

10K_0402_5%

10K_0402_5%

1 2

R1105 0_0402_5%R1105 0_0402_5%

1 2

T129 PADT129 PAD

CL_CLK0 <7>

CL_DATA0 <7>

CL_RST# <7>

LAN_CABDT

DMI_MTX_IRX_N0 <7>
DMI_MTX_IRX_P0 <7>
DMI_MRX_ITX_N0 <7>
DMI_MRX_ITX_P0 <7>

DMI_MTX_IRX_N1 <7>
DMI_MTX_IRX_P1 <7>
DMI_MRX_ITX_N1 <7>
DMI_MRX_ITX_P1 <7>

DMI_MTX_IRX_N2 <7>
DMI_MTX_IRX_P2 <7>
DMI_MRX_ITX_N2 <7>
DMI_MRX_ITX_P2 <7>

DMI_MTX_IRX_N3 <7>
DMI_MTX_IRX_P3 <7>
DMI_MRX_ITX_N3 <7>
DMI_MRX_ITX_P3 <7>

CLK_PCIE_ICH# <15>
CLK_PCIE_ICH <15>

R1120 24.9_0402_1%R1120 24.9_0402_1%

1 2

USB20_N0 <29>
USB20_P0 <29>
USB20_N1 <16>
USB20_P1 <16>
USB20_N2 <29>
USB20_P2 <29>
USB20_N3 <29>
USB20_P3 <29>
USB20_N4 <29>
USB20_P4 <29>
USB20_N5 <29>
USB20_P5 <29>
USB20_N6 <23>
USB20_P6 <23>
USB20_N7 <26>
USB20_P7 <26>
USB20_N8 <29>
USB20_P8 <29>
USB20_N9 <29>
USB20_P9 <29>
USB20_N10 <23>
USB20_P10 <23>

2

+3VS

R695 100 _0402_5%R695 100 _0402_5%

1 2

ICH_PWROK <7,27>

R1097 10K_0402_5%R1097 10K_0402_5%

ACIN <27,39,40>

LAN_CABDT <21>

Within 500 mils

+1.5VS

JUSBP1

Camera

JUSBP3

Felica

BlueTooth

FingerPrinter

Mini Card

Express Card

JUSBP3

JUSBP4

Mini Card2

1

12

@

@

R1091

R1091

10_0402_5%

10_0402_5%

@

@

1

C1217

C1217

4.7P_0402_50V8C

4.7P_0402_50V8C

2

M_PWROK

1 2

CK_PWRGD <15>

M_PWROK <7>

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

C1219

C1219

1 2

12

R1107

R1107
453_0402_1%

453_0402_1%

NA lead free

RSMRST circuit

R1103

R1103

@ R656

@

0_0402_5%

0_0402_5%

1 2

EC_RSMRST#<27>

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

ICH9(3/4)_DMI,USB,GPIO,PCIE

ICH9(3/4)_DMI,USB,GPIO,PCIE

ICH9(3/4)_DMI,USB,GPIO,PCIE

LA-4595P

LA-4595P

LA-4595P

1 2

1

Place closely pin H1Place closely pin AF3

CLK_14M_ICHCLK_48M_ICH

12

@

@

R1092

R1092

10_0402_5%

10_0402_5%

@

@

1

C1218

C1218

4.7P_0402_50V8C

4.7P_0402_50V8C

2

R1106

R1106

3.24K_0402_1%

3.24K_0402_1%

R656
0_0402_5%

0_0402_5%

R_EC_RSMRST#

19 49Tuesday, February 17, 2009

19 49Tuesday, February 17, 2009

19 49Tuesday, February 17, 2009

+3VS

of

of

of

POK <41>

1.0

1.0

1.0

1bios.ru

5

+RTCVCC

1

C1229

C1229

2

0.1U_0402_16V4Z

40 mils

C1234

C1234

+ICH_V5REF_RUN

20 mils

+ICH_V5REF_SUS

20 mils

1

C1255

C1255

2

1 2

R1129 0_0603_5%

R1129 0_0603_5%

5

0.1U_0402_16V4Z

+VCC1_5_B

1

+

+

2

220U_D2_4VM

220U_D2_4VM

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1U_0603_10V4Z

1U_0603_10V4Z

1

2

10U_0805_10V4Z

10U_0805_10V4Z

L96

L96

1 2

+1.5VS

BLM21PG600SN1D_0805~D

D D

100_0402_5%~D

100_0402_5%~D

100_0402_5%~D

100_0402_5%~D

C C

B B

+3VS

C1268

C1268

A A

0.1U_0402_16V4Z

0.1U_0402_16V4Z

BLM21PG600SN1D_0805~D

+5VS +3VS

12

R1127

R1127

12

R1128

R1128

10UH_LB2012T100MR_20%_0805~D

10UH_LB2012T100MR_20%_0805~D

+1.5VS

1

+1.5VS

2

21

D45

D45

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

1

C1241

C1241
1U_0603_10V6K~D

1U_0603_10V6K~D

2

+3VALW+5VALW

21

D46

D46

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

1

C1306

C1306
1U_0603_10V6K~D

1U_0603_10V6K~D

2

L99

L99

1 2

1 2

L100

L100
1UH_20%_0805~D

1UH_20%_0805~D

C1254

C1254

C1269

C1269

C1235

C1235

1

C1230

C1230

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

+VCCSATAPLL

1

2

10U_0805_10V4Z

10U_0805_10V4Z

+1.5VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.5VS

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1 2

C1267

C1267

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

20 mils

1U_0603_10V4Z~D

1U_0603_10V4Z~D

1

C1231

C1231

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

C1237

C1237

C1236

C1236

2

2.2U_0603_6.3V4Z

2.2U_0603_6.3V4Z

+1.5VS

C1256

C1256

1U_0603_10V4Z

1U_0603_10V4Z

+1.5VS

C1258

C1258

1U_0603_10V4Z

1U_0603_10V4Z

C1262

C1262

C1263

C1263

+VCCLAN3_3

+VCCGLANPLL

C1270

C1270

G3: 6uA

+ICH_V5REF_RUN

+ICH_V5REF_SUS

646mA

1

2

1

2

1

2

1342mA

1

2

11mA

1

11mA

2

VCC_LAN1_05_INT_ICH_1

19/78/78mA

+1.5VS

1

C1271

C1271

2

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

47mA

+3VS

2mA

2mA

23mA

80mA

1mA

AA24
AA25
AB24
AB25
AC24
AC25
AD24
AD25
AE25
AE26
AE27
AE28
AE29

M24
M25
N23
N24
N25

R24
R25
R26
R27

U24
U25

U23
W24
W25

AJ19

AC16
AD15
AD16
AE15
AF15
AG15
AH15

AJ15

AC11
AD11
AE11
AF11
AG10
AG11
AH10

AJ10

AC9

AC18
AC19

AC21

G10

AC12
AC13
AC14

AA7

AB6

AB7

AC6

AC7

D28

D29

A23

A6

AE1

F25
G25
H24
H25

J24

J25
K24
K25
L23
L24
L25

P24
P25

T24
T27
T28
T29

V24
V25

K23
Y24
Y25

G9

AJ5

A10
A11

A12
B12

A27

E26
E27

A26

4

U56F

U56F

VCCRTC

V5REF

V5REF_SUS

VCC1_5_B[1]
VCC1_5_B[2]
VCC1_5_B[3]
VCC1_5_B[4]
VCC1_5_B[5]
VCC1_5_B[6]
VCC1_5_B[7]
VCC1_5_B[8]
VCC1_5_B[9]
VCC1_5_B[10]
VCC1_5_B[11]
VCC1_5_B[12]
VCC1_5_B[13]
VCC1_5_B[14]
VCC1_5_B[15]
VCC1_5_B[16]
VCC1_5_B[17]
VCC1_5_B[18]
VCC1_5_B[19]
VCC1_5_B[20]
VCC1_5_B[21]
VCC1_5_B[22]
VCC1_5_B[23]
VCC1_5_B[24]
VCC1_5_B[25]
VCC1_5_B[26]
VCC1_5_B[27]
VCC1_5_B[28]
VCC1_5_B[29]
VCC1_5_B[30]
VCC1_5_B[31]
VCC1_5_B[32]
VCC1_5_B[33]
VCC1_5_B[34]
VCC1_5_B[35]
VCC1_5_B[36]
VCC1_5_B[37]
VCC1_5_B[38]
VCC1_5_B[39]
VCC1_5_B[40]
VCC1_5_B[41]
VCC1_5_B[42]
VCC1_5_B[43]
VCC1_5_B[44]
VCC1_5_B[45]
VCC1_5_B[46]
VCC1_5_B[47]
VCC1_5_B[48]
VCC1_5_B[49]

VCCSATAPLL

VCC1_5_A[1]
VCC1_5_A[2]
VCC1_5_A[3]
VCC1_5_A[4]
VCC1_5_A[5]
VCC1_5_A[6]
VCC1_5_A[7]
VCC1_5_A[8]

VCC1_5_A[9]
VCC1_5_A[10]
VCC1_5_A[11]
VCC1_5_A[12]
VCC1_5_A[13]
VCC1_5_A[14]
VCC1_5_A[15]
VCC1_5_A[16]

VCC1_5_A[17]

VCC1_5_A[18]
VCC1_5_A[19]

VCC1_5_A[20]

VCC1_5_A[21]
VCC1_5_A[22]

VCC1_5_A[23]
VCC1_5_A[24]
VCC1_5_A[25]

VCCUSBPLL

VCC1_5_A[26]
VCC1_5_A[27]
VCC1_5_A[28]
VCC1_5_A[29]
VCC1_5_A[30]

VCCLAN1_05[1]
VCCLAN1_05[2]

VCCLAN3_3[1]
VCCLAN3_3[2]

VCCGLANPLL

VCCGLAN1_5[1]
VCCGLAN1_5[2]
VCCGLAN1_5[3]
VCCGLAN1_5[4]

VCCGLAN3_3

ICH9M REV 1.0

ICH9M REV 1.0

4

CORE

CORE

VCCA3GP ATXARX

VCCA3GP ATXARX

VCCP_CORE

VCCP_CORE

PCI

PCI

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCPSUSVCCPUSB

VCCPSUSVCCPUSB

VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]

USB CORE

USB CORE

GLAN POWER

GLAN POWER

VCC1_05[1]
VCC1_05[2]
VCC1_05[3]
VCC1_05[4]
VCC1_05[5]
VCC1_05[6]
VCC1_05[7]
VCC1_05[8]

VCC1_05[9]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]

VCCDMIPLL

VCC_DMI[1]
VCC_DMI[2]

V_CPU_IO[1]
V_CPU_IO[2]

VCC3_3[1]

VCC3_3[2]

VCC3_3[7]

VCC3_3[3]
VCC3_3[4]
VCC3_3[5]
VCC3_3[6]

VCC3_3[8]

VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

VCCHDA

VCCSUSHDA

VCCSUS1_5[1]

VCCSUS1_5[2]

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]

VCCSUS3_3[5]

VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]
VCCSUS3_3[9]

VCCCL1_05

VCCCL1_5

VCCCL3_3[1]
VCCCL3_3[2]

+VCCP

1634mA

A15
B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

+VCCDMIPLL

R29

23mA

W23
Y23

48mA

AB23
AC23

2mA

AG29

AJ6

0.1U_0402_16V4Z

0.1U_0402_16V4Z

AC10

AD19
AF20
AG24
AC20

308mA

B9
F9
G3
G6
J2
J7
K7

AJ4

11mA

AJ3

11mA

AC8
F17

+VCCSUS1_5_ICH_1

AD8

+VCCSUS1_5_ICH_2

F18

A18
D16
D17
E22

AF1

212mA

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

+VCCCL1_05_ICH

G22

+VCCCL1_5_ICH

G23

19/73/73mA

A24

+3VS

B24

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1232

C1232

2

+VCC_DMI

1

2

+3VS

C1248

0.1U_0402_16V4Z

C1248

0.1U_0402_16V4Z

0.1U_0402_16V4Z C1249

0.1U_0402_16V4Z

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

T140T140
T141T141

T142T142

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

1

C1259

C1259

2

1

C1265 1U_0603_ 10V4Z C1265 1U_0603_ 10V4Z

2

3

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1233

C1233

2

L97

L97

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

1

C1238

C1238

2

0.01U_0402_16V7K

0.01U_0402_16V7K

22U_0805_6.3VAM

22U_0805_6.3VAM

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+3VS

C1247

C1247

0.1U_0402_16V4Z C1250

0.1U_0402_16V4Z

C1249

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C1253

C1253

2

+3VALW

+3VALW

0.022U_0402_16V7K~D

0.022U_0402_16V7K~D

1

2

1

C1266 0.1U_0402_16V 4Z~D C1266 0.1U_0402_16V 4Z~D

2

1 2

1

C1239

C1239
10U_0805_10V4Z

10U_0805_10V4Z

2

5ohm@100MHz

1 2

L98

L98
BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

1

C1240

C1240

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

+3VS

C1245

C1245

2

C1250

1

2

1

+3VALW

2

0.022U_0402_16V7K~D

0.022U_0402_16V7K~D

1

C1261

C1261

C1260

C1260

2

1

C1264

C1264

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

2006/02/13 2006/03/10

2006/02/13 2006/03/10

2006/02/13 2006/03/10

+3VS

1

C1246

C1246

2

+3VS

C1252

C1252

1

C1257

C1257

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

T144T144

Compal Secret Data

Compal Secret Data

Compal Secret Data

+VCCP

T143T143

Deciphered Date

Deciphered Date

Deciphered Date

+VCCP

4.7U_0603_6.3V6M

4.7U_0603_6.3V6M

C1242

C1242

1

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

2

(DMI)

+1.5VS

C1243

C1243

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C1244

C1244

1

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

U56E

U56E

AA26

VSS[1]

AA27

VSS[2]

AA3

VSS[3]

AA6

VSS[4]

AB1

VSS[5]

AA23

VSS[6]

AB28

VSS[7]

AB29

VSS[8]

AB4

VSS[9]

AB5

VSS[10]

AC17

VSS[11]

AC26

VSS[12]

AC27

VSS[13]

AC3

VSS[14]

AD1

VSS[15]

AD10

VSS[16]

AD12

VSS[17]

AD13

VSS[18]

AD14

VSS[19]

AD17

VSS[20]

AD18

VSS[21]

AD21

VSS[22]

AD28

VSS[23]

AD29

VSS[24]

AD4

VSS[25]

AD5

VSS[26]

AD6

VSS[27]

AD7

VSS[28]

AD9

VSS[29]

AE12

VSS[30]

AE13

VSS[31]

AE14

VSS[32]

AE16

VSS[33]

AE17

VSS[34]

AE2

VSS[35]

AE20

VSS[36]

AE24

VSS[37]

AE3

VSS[38]

AE4

VSS[39]

AE6

VSS[40]

AE9

VSS[41]

AF13

VSS[42]

AF16

VSS[43]

AF18

VSS[44]

AF22

VSS[45]

AH26

VSS[46]

AF26

VSS[47]

AF27

VSS[48]

AF5

VSS[49]

AF7

VSS[50]

AF9

VSS[51]

AG13

VSS[52]

AG16

VSS[53]

AG18

VSS[54]

AG20

VSS[55]

AG23

VSS[56]

AG3

VSS[57]

AG6

VSS[58]

AG9

VSS[59]

AH12

VSS[60]

AH14

VSS[61]

AH17

VSS[62]

AH19

VSS[63]

AH2

VSS[64]

AH22

VSS[65]

AH25

VSS[66]

AH28

VSS[67]

AH5

VSS[68]

AH8

VSS[69]

AJ12

VSS[70]

AJ14

VSS[71]

AJ17

VSS[72]

AJ8

VSS[73]

B11

VSS[74]

B14

VSS[75]

B17

VSS[76]

B2

VSS[77]

B20

VSS[78]

B23

VSS[79]

B5

VSS[80]

B8

VSS[81]

C26

VSS[82]

C27

VSS[83]

E11

VSS[84]

E14

VSS[85]

E18

VSS[86]

E2

VSS[87]

E21

VSS[88]

E24

VSS[89]

E5

VSS[90]

E8

VSS[91]

F16

VSS[92]

F28

VSS[93]

F29

VSS[94]

G12

VSS[95]

G14

VSS[96]

G18

VSS[97]

G21

VSS[98]

G24

VSS[99]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9M REV 1.0

ICH9M REV 1.0

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

ICH9(4/4)_POWER&GND

ICH9(4/4)_POWER&GND

ICH9(4/4)_POWER&GND

LA-4595P

LA-4595P

LA-4595P

1

VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]

VSS_NCTF[1]
VSS_NCTF[2]
VSS_NCTF[3]
VSS_NCTF[4]
VSS_NCTF[5]
VSS_NCTF[6]
VSS_NCTF[7]
VSS_NCTF[8]

VSS_NCTF[9]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

1

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

20 49Tuesday, February 17, 2009

20 49Tuesday, February 17, 2009

20 49Tuesday, February 17, 2009

1.0

1.0

1.0

of

of

of

1bios.ru

5

W=60mils

Q128

Q128

D

D

6

S

S

+LAN_IO_R

1U_0603_10V6K

+B+_BIAS

D D

EN_WOL#<27>

C C

1 2

+3VS

1K_0402_5%

1K_0402_5%

B B

A A

C1488

C1488

27P_0402_50V8J

27P_0402_50V8J

LAN_LOPWEN<19>

C1490 0.01U_0402_16V7KC149 0 0.01U _0402_16V7K

1 2

C1491 0.01U_0402_16V7KC149 1 0.01U _0402_16V7K

1 2

C1492 0.01U_0402_16V7KC149 2 0.01U _0402_16V7K

1 2

C1494 0.01U_0402_16V7KC149 4 0.01U _0402_16V7K

1 2

RJ45_TX0-

RJ45_TX0+

2

G

G

GLAN_RXP<19 >

GLAN_RXN<19>

GLAN_TXP<19>

GLAN_TXN<19>

CLK_PCIE_LAN< 15>

CLK_PCIE_LAN#<15>

GLAN_REQ#9<15>

PCI_RST#<17,23,26,28>

R1245

R1245

2

1

R1246

R1246
15K_0402_5%

15K_0402_5%

1 2

Y9

Y9

1 2

25MHZ_20P_1BX25000CK1A

25MHZ_20P_1BX25000CK1A

LAN_LOPWEN ISOLATEB

R1374

@ R1374

@

CM1293-04SO_SOT23-6

CM1293-04SO_SOT23-6

1

CH1

2

Vn

3

CH2

D28

@D28

@

5

R1239

R1239
470K_0402_5%

470K_0402_5%

1 2

13

D

D

Q58

Q58
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

C1473 0.1U_0402_16V7K ~N

C1473 0.1U_0402_16V7K ~N

C1476 0.1U_0402_16V7K ~N

C1476 0.1U_0402_16V7K ~N

ICH_PCIE_WAKE#<19,23,26,27>

0_0402_5%

0_0402_5%

1 2

+V_DAC
LAN_MDIN3
LAN_MDIP3

+V_DAC
LAN_MDIN2
LAN_MDIP2

+V_DAC
LAN_MDIN1
LAN_MDIP1

+V_DAC
LAN_MDIN0
LAN_MDIP0

4

CH4

5

Vp

6

CH3

2

EN_WOL

12

12

1 2

R1244 2.49K_0402_1%

R1244 2.49K_0402_1%

R1253

R1253
0_0402_5%

0_0402_5%

LAN_CABDT<19>

1 2

2

C1489

C1489

1

27P_0402_50V8J

27P_0402_50V8J

RJ45_RX1-

RJ45_RX1+

1

C1455

C1455

1U_0603_10V6K

45

L109

2
1

SI3456BDV-T1-E3 1N TSOP6

SI3456BDV-T1-E3 1N TSOP6

G

G

3

1 2

GLAN_RXP_C

GLAN_RXN_C

GLAN_TXP

GLAN_TXN

PCI_RST#

TS1

TS1

1

TCT1

2

TD1+

3

TD1-

4

TCT2

5

TD2+
TD2-6MX2-

7

TCT3

8

TD3+

9

TD3-

10

TCT4

11

TD4+

12

TD4-

BOTH_GST5009-LF

BOTH_GST5009-LF

+3VS +3VS

R1240

R1240

1.5M_0402_5%

1.5M_0402_5%

ISOLATEB

24

MCT1

23

MX1+

22

MX1-

21

MCT2

20

MX2+

19

18

MCT3

17

MX3+

16

MX3-

15

MCT4

14

MX4+

13

MX4-

L109
0_1210_5%~D

0_1210_5%~D

RJ45_TX3­RJ45_TX3+

RJ45_TX2­RJ45_TX2+

RJ45_RX1­RJ45_RX1+

RJ45_TX0­RJ45_TX0+

RJ45_TX2-

RJ45_TX2+

4

12

1

C1456

C1456

@

@

2

22U_1206_6.3V6M

22U_1206_6.3V6M

U64

U64

20

HSOP

21

HSON

15

HSIP

16

HSIN

17

REFCLK_P

18

REFCLK_M

25

CLKREQB

27

PERSTB

46

RSET

26

LANWAKEB

28

ISOLATEB

41

CKTAL1

42

CKTAL2

23

NC

24

NC

7

GND

14

GND

31

GND

47

GND

22

EGND

RTL8111DL-GR_LQFP48

RTL8111DL-GR_LQFP48

CM1293-04SO_SOT23-6

CM1293-04SO_SOT23-6

1

2

3

D29

@D29

@

4

1

C1457

C1457

2

RTL8111DL

RTL8111DL

CH1

Vn

CH2

W=60mils

+LAN_IO+3VALW

1.5A

1

C1458

C1458

2

22U_1206_6.3V6M

22U_1206_6.3V6M

75_1206_8P4R_5%

75_1206_8P4R_5%

RP42

RP42

CH4

Vp

CH3

0.1U_0402_10V7K~N

0.1U_0402_10V7K~N

LED3/EEDO

LED2/EEDI/AUX

LED1/EESK

SROUT12

45
36
27
18

2

C1493

C1493
1000P_1206_2KV7K

1000P_1206_2KV7K

1

RJ45_TX3-

4

5

RJ45_TX3+

6

1

C1459

C1459

2

0.1U_0402_10V7K~N

0.1U_0402_10V7K~N

1

2

C1460

C1460

0.1U_0402_10V7K~N

0.1U_0402_10V7K~N

These caps close to U64: Pin 29, 37, 44, 45

EECS

LED0

MDIP0
MDIN0
MDIP1
MDIN1

MDI P2
MDI N2
MDI P3
MDI N3

FB12

EVDD12
DVDD12
DVDD12
DVDD12
AVDD12

AVDD12

VDDSR
VDDSR

VDD33
VDD33

AVDD33
AVDD33

ENSR

LAN_LED3

33

LAN_LED2

34

LAN_LED1

35
32

38

2
3
5
6
8
9
11
12

4

+LAN_SROUT12

48

+LAN_EVDD12

19
30
36
13
10

39

44
45

29
37

1
40
43

LAN_LED0

LAN_MDIP0

LAN_MDIN0

LAN_MDIP1

LAN_MDIN1

LAN_MDIP2

LAN_MDIN2

LAN_MDIP3

LAN_MDIN3

R1241 3.6K_0402_5% R1241 3.6K_0402_5%

1 2

4.7UH_1008HC-472EJFS-A_5%_1008

4.7UH_1008HC-472EJFS-A_5%_1008

+LAN_DVDD12

W=60mils

+LAN_DVDD12

+LAN_IO

+LAN_AVDD33

+LAN_IO

These caps close to U64: Pin 1,29,37,40

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

1

C1461

C1461

2

0.1U_0402_10V7K~N

0.1U_0402_10V7K~N

L107

L107

1 2

C1486 0.1U_0402_16V7K ~N

C1486 0.1U_0402_16V7K ~N

C1487 0.1U_0402_16V7K ~N

C1487 0.1U_0402_16V7K ~N

C1477 0.1U_0402_10V7K ~NC1477 0.1U_0402_10V7K~N

C1480 0.1U_0402_10V7K ~NC1480 0.1U_0402_10V7K~N

3

1

2

+LAN_IO

W=60mils

1

C1478

C1478

2

0.1U_0402_10V7K~N

0.1U_0402_10V7K~N

1 2

1 2

1 2

1 2

LAN_LED2

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

LAN_LED3

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

LAN_LED1

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

LAN_LED3

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

2

C1462

C1462

+LAN_VDD

1 2

0_0603_5%

0_0603_5%

0.1U_0402_10V7K~N

0.1U_0402_10V7K~N

These caps close to U64: Pin 30, 36,13,10,39

R1238

R1238

+LAN_DVDD12

1

C14640.1U_0402_10V7K~N C14640.1U_0402_10V7K~N

C14630.1U_0402_10V7K~N C14630.1U_0402_10V7K~N

2

1

2

These caps close to U64: Pin 4

+LAN_DVDD12

1

2

C1743

+LAN_VDD

1

C1479

C1479

These components close to U64: Pin 48

2

( Should be place within 200 mils )

W=30mils

22U_1206_6.3V6M

22U_1206_6.3V6M

1 2

C1484 1U_0402_6.3V6K ~DC1484 1U_0402_6.3V6K~D

1 2

C1485 1U_0402_6.3V6K ~DC1485 1U_0402_6.3V6K~D

0.1U_0402_10V7K

0.1U_0402_10V7K

0_0603_5%

0_0603_5%

C1743

L110

L110

W=30mils

12

+LAN_VDD

These caps close to U64: Pin 19

L1080_0603_5% L10 80_0603 _5%

12

+LAN_IO

+LAN_IO

D54

D54

LED2_LED3

21

D55

D55

21

D56

D56

LED1_LED3

21

D57

D57

21

Compal Secret Data

Compal Secret Data

2008/03/21 2009/03/21

2008/03/21 2009/03/21

2008/03/21 2009/03/21

Compal Secret Data

+LAN_IO

Deciphered Date

Deciphered Date

Deciphered Date

LAN_LED0

LED2_LED3

LED1_LED3

R1247 220_0402_5%R1247 220_0402_5%

LAN_ACTIVITY#

1 2

R1251

R1251

1 2

220_0402_5%

220_0402_5%

R1252

R1252

1 2

220_0402_5%

220_0402_5%

220P 25V K NPO 0402

220P 25V K NPO 0402

2

1

C14650.1U_0402_10V7K~N C14650.1U_0402_10V7K~N

2

RJ45_TX3-

RJ45_TX3+

RJ45_RX1-

RJ45_TX2-

RJ45_TX2+

RJ45_RX1+

RJ45_TX0-

RJ45_TX0+

LINK_10_1000#

LINK_100_1000#

1

2

C1471

C1471

220P 25V K NPO 0402

220P 25V K NPO 0402

1

1

1

C14660.1U_0402_10V7K~N C14660.1U_0402_10V7K~N

C14670.1U_0402_10V7K~N C14670.1U_0402_10V7K~N

2

2

+LAN_IO

C1474

C1474

1

2

22U_1206_6.3V6M

22U_1206_6.3V6M

1

2

C1475

C1475

0.1U_0402_10V7K~N

0.1U_0402_10V7K~N

These caps close to U64: Pin 44,45

( Should be place within 200 mils )

1

1

C1470 220P 25V K NPO 0402C 1470 220P 25V K NPO 0402

C1469 220P 25V K NPO 0402C 1469 220P 25V K NPO 0402

2

2

JLAN1

JLAN1

13

Yellow LED-

12

Yellow LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

11

Green LED-

9

Orange LED-

10

Green-Orange LED+

C-1775553

C-1775553

CONN@

CONN@

1

1

2

2

C1481

C1481

C1472

C1472

220P 25V K NPO 0402

220P 25V K NPO 0402

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

Gigabit LAN_RTL8111C

Gigabit LAN_RTL8111C

Gigabit LAN_RTL8111C

LA-4595P

LA-4595P

LA-4595P

GND

GND

15

14

1

1.0

1.0

1.0

of

of

of

21 49Tuesday, February 17, 2009

21 49Tuesday, February 17, 2009

21 49Tuesday, February 17, 2009

1bios.ru

5

4

3

2

1

SATA HDD CONN

JSATA1

JSATA1

1

D D

PSATA_ITX_DRX_P0<18>
PSATA_ITX_DRX_N0<18>

PSATA_IRX_DTX_N0_C<18>

PSATA_IRX_DTX_P0_C<18>

PSATA_ITX_DRX_P0
PSATA_ITX_DRX_N0

PSATA_IRX_DTX_N0

1 2

C393 0.01U_0402_50V7K

C393 0.01U_0402_50V7K

C392 0.01U_0402_50V7K

C392 0.01U_0402_50V7K

1 2

PSATA_IRX_DTX_P0

+5VS

+5VS

0.1U_0402_16V7K~N

1

2

0.1U_0402_16V7K~N

1

C377

C377

2

1

C376

C376

2

1000P_0402_50V7K~N

1000P_0402_50V7K~N

10U_0805_10V4Z~N

10U_0805_10V4Z~N

C C

C574

C574

1

2

C296

C296

0.1U_0402_16V7K~N

0.1U_0402_16V7K~N

Close to SATA H DD

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17
18
19
20
21
22

SUYIN_127043FR022G226ZL_NR

SUYIN_127043FR022G226ZL_NR

CONN@

CONN@

GND
Reserved
GND
V12
V12
V12

GND

GND

23

24

SATA ODD CONN

ODD_ITX_DRX_P0<18>
ODD_ITX_DRX_N0<18>

ODD_IRX_DTX_N0_C<18>
ODD_IRX_DTX_P0_C<18>

close JODD2

ODD_ITX_DRX_P0
ODD_ITX_DRX_N0

1 2

C327 0.01U_0402_50V7K

C327 0.01U_0402_50V7K

1 2

C326 0.01U_0402_50V7KC326 0.01U_0402_50V 7K

+5VS

+5VS

10U_0805_10V4Z

10U_0805_10V4Z

1

C498

C498

2

1

C506

C506

2

1U_0603_10V4Z

1U_0603_10V4Z

ODD_IRX_DTX_N0
ODD_IRX_DTX_P0

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C503

C503

2

JODD2

JODD2

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

DP

9

5V

10

5V

11

MD

12

GND

13

GND

SUYIN_127382FR013S52_NR

SUYIN_127382FR013S52_NR

1

C499

C499

2

1000P_0402_50V7K~N

1000P_0402_50V7K~N

GND
GND

14
15

Close to ODD Con n

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

HDD/CDROM

HDD/CDROM

HDD/CDROM

LA-4595P

LA-4595P

LA-4595P

1

22 49Tuesday, February 17, 2009

1.0

1.0

1.0

of

of

of

22 49Tuesday, February 17, 2009

22 49Tuesday, February 17, 2009

1bios.ru

A

B

C

D

E

WWAN

0.01U_0402_16V7K~N

0.01U_0402_16V7K~N

1

2

1

C294

C294

2

4.7U_0805_10V4Z~N

4.7U_0805_10V4Z~N

WWAN_RE Q#10

CLK_PCIE_WW AN#
CLK_PCIE_WW AN

R288 0_0402_5% R288 0_0402_5%

R287 0_0402_5%@R287 0_0402_5%@

PCIE_RXN1
PCIE_RXP1

PCIE_TXN1
PCIE_TXP1

+3VS

C316

C316

1 1

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

WWAN_RE Q#10<15>

CLK_PCIE_WW AN#<15>
CLK_PCIE_WW AN<15>

EC_RX_P80_DATA<27>

2 2

PCI_RST#

PCIE_RXN1<19>
PCIE_RXP1<19>

PCIE_TXN1<19>

PCIE_TXP1<19>

+3VS +1.5VS

0.01U_0402_16V7K~N

0.01U_0402_16V7K~N

1

C86

1

C321

C321

2

ICH_PCIE_WAKE#

1 2
1 2

R141 100K_0402_ 5%

R141 100K_0402_ 5%

@

@

C86

+

+

@

@

2

330U 2.5V Y D2

330U 2.5V Y D2

12

1

C298

C298

2

JMINI1

JMINI1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

FOX_AS0B226-S52N-7F~N

FOX_AS0B226-S52N-7F~N

C312

C312

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

GND2

+1.5VS

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

1

2

+3VALW_R

4.7U_0805_10V4Z~N

4.7U_0805_10V4Z~N

1

C320

C320

2

WL_OFF#

1 2

LED_WWAN #

+3VS

T23 PADT23 PAD

R2840_0402_5% R2840_0402_5%

UIM_DATA
UIM_CLK
UIM_RST

WL_OFF# <27>

PCI_RST# <17,21,26,28>

+3VALW

USB20_N10
USB20_P10

+UIM_PWR

R285 0_0402_5%

R285 0_0402_5%

1 2

R286 0_0402_5%@ R 286 0_0402_5%@

1 2

USB20_N10 <19>
USB20_P10 <19>

UIM_VPP

EC_TX_P80_DATA <27>

UIM_DET<27>

UIM_DATA
UIM_DET

C571

C571

100P_0402_25V8K

100P_0402_25V8K

U23

U23

1

CH1

2

Vn

CH23CH3

S DIO(BR) NUP4301MR6T1 TSOP-6

S DIO(BR) NUP4301MR6T1 TSOP-6

JSIM2

JSIM2

2

GND

4

VPP

6

I/O

7

DET

8

DET

SUYIN_254070FB008H505ZL

SUYIN_254070FB008H505ZL

C571 & C573 as close as JSIM1

CH4

6

5

Vp

4

VCC

RST
CLK

GND
GND

1
3
5

9
10

+UIM_PWR +3V S

UIM_RSTUIM_VPP
UIM_CLK

1

C329

C329

C573

C573

100P_0402_25V8K

100P_0402_25V8K

4.7U 10V Z Y5V 0805

4.7U 10V Z Y5V 0805

2

D9

@D9

@

1

DAN217_SC59-3

DAN217_SC59-3

1

C330

C330

0.1U 16V K X7R 0402

0.1U 16V K X7R 0402

2

3

2

Power status(Left)

LED1

LED1
12-21-BHC-ZL1M2RY-2C BLUE

PWR_BLUE_LED#<27,28>

PWR_BLUE_LED#

12-21-BHC-ZL1M2RY-2C BLUE

R472

R472

1 2

12

200_0603_5%

200_0603_5%

+5VALW

Mini-Express Card---WLAN

LED2

LED2

Y

3 3

JMINI2

ICH_PCIE_WAKE#

CH_DATA<29>
CH_CLK<29>

WLAN_REQ#4<15>

CLK_PCIE_MCARD#<15>

CLK_PCIE_MCARD<15>

CLK_DEBUG_PORT<15>

PCIE_RXN3<19>
PCIE_RXP3<19>

PCIE_TXN3<19>
PCIE_TXP3<19>

+3V_WLAN

4 4

ICH_PCIE_WAKE#

CH_DATA MINI_PIN3

R380 0_0402_5%@R380 0_0402_5%@
R381 0_0402_5%@R381 0_0402_5%@

WLAN_REQ#4

PCI_RST#

1 2

R445 0_0402_5% R445 0_0402_ 5%

1 2

R403 0_0402_5%R403 0_0402_5%

1 2

R404 0_0402_5%R404 0_0402_5%

A

1 2
1 2

CH_CLK MINI_PIN4

PCIE_RXN3 PCIE_C_RXN3
PCIE_RXP3 PCIE_C_RXP3

PCIE_TXN3
PCIE_TXP3

JMINI2

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

ACES_88910-5204

ACES_88910-5204

GND2

+3V_WLAN

+1.5VS

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

LED_WLAN#

B

LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

WL_OFF#

USB20_N6
USB20_P6

@

@

1 2

R411 0_0805_5%

R411 0_0805_5%

1 2

R412 0_0805_5%

R412 0_0805_5%

T61 PADT61 PAD

12

R86100K_0402_5% R86100K_0402_5%

0.01U_0402_16V7K~N

0.01U_0402_16V7K~N

+3VALW

@

@

LED_WLAN# <28>

Security Classification

Security Classification

Security Classification

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+3VS

LPC_FRAME# <18,27,28>

LPC_AD[0..3] <18,27,28>

WL_OFF# <27>

PCI_RST# <17,21,26,28>

+3V_WLAN

+1.5VS

USB20_N6 <19>
USB20_P6 <19>

+3V_WLAN

+1.5VS

+3V_WLAN

Issued Date

Issued Date

Issued Date

1

C500

C500

2

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

C

1

C489

C489

2

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

1

C485

C485

2

0.01U_0402_16V7K~N

0.01U_0402_16V7K~N

Compal Secret Data

Compal Secret Data

Compal Secret Data

+3V_WLAN

4.7U_0805_10V4Z~N

4.7U_0805_10V4Z~N

1

C456

C456

2

+1.5VS

0.01U_0402_16V7K~N

0.01U_0402_16V7K~N

1

C488

C488

2

Deciphered Date

Deciphered Date

Deciphered Date

BATT_LOW_LED#<27>

BATT_CHG_LED#<27>

WLANPW_EN #<27>

WLANPW_E N#

Rename

D

BATT_LOW_LED#

BATT_CHG_LED#

12-22/Y2BHC-A30/2C_Y/B~D

12-22/Y2BHC-A30/2C_Y/B~D

1U_0603_10V6K

1U_0603_10V6K

+B+_BIAS

1 2

13

D

D

2

G

G

S

S

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Y

3

1

2

B

B

+3VALW

D

D

6

1

C1468

C1468

R1242

R1242
470K_0402_5%

470K_0402_5%

Q59

Q59
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

2

WLANPW_D IS

2
1

Compal Electronics, Inc.

Mini-Card/LED

Mini-Card/LED

Mini-Card/LED

LA-4595P

LA-4595P

LA-4595P

R471

R471

1 2

200_0603_5%

200_0603_5%

+3V_WLAN

S

S

45

SI3456BDV-T1-E3 1N TSOP6

SI3456BDV-T1-E3 1N TSOP6

3

R1243

R1243

1.5M_0402_5%

1.5M_0402_5%

@

@

1 2

23 49Tuesday, February 17, 2009

23 49Tuesday, February 17, 2009

23 49Tuesday, February 17, 2009

E

G

G

Q130

Q130

+5VALW

1.0

1.0

1.0

of

of

of

1bios.ru

5

4

3

2

1

+3VS

C1399

C1399

R41 10_0402_5% @R41 10_0402_5% @

ACZ_BITCLK

R8 33_0402_5%R8 33_0402_5%

1 2

1 2

For IDT

1 2

R1190 0_0402_5%

R1190 0_0402_5%

C142

C142

1 2

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

12

12

W=40Mil

1

1

2

2

AMP_R

AMP_L

40mil

1

1

C1398

C1398

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

12

@

@

C651

C651
10U_0805_10V4Z

10U_0805_10V4Z

7

RIN+

17

RIN-

9

LIN+

5

LIN-

19

SHUTDOWN

21

1U_0402_6.3V

1U_0402_6.3V

12

GNDA

GND

C1397

C1397

20

1

2

0.1U_0402_10V6K

0.1U_0402_10V6K

3

U60

U60

6

HDA_BITCLK

8

HDA_SDI

5

HDA_SDO

10

HDA_SYNC

11

HDA_RST#

2

DMIC_CLK/GPIO1

4

DMIC0/GPIO2

46

DMIC1/GPIO0/SPDIF_OUT_1

48

SPDIF_OUT_0

47

EAPD

35

CAP-

36

CAP+

14

SENSE_B

13

SENSE_A

7

DVSS

42

PVSS

26

AVSS

30

AVSS

33

AVSS

49

GND

92HD81B1X5NLGXA1X8 48P

92HD81B1X5NLGXA1X8 48P

1 2

R537 0_0603_5%R537 0_0603_5%

16

15

6

U18

U18

VDD

PVDD1

PVDD2

GAIN0

GAIN1

ROUT+

ROUT-

LOUT+

LOUT-

BYPASS

GND41GND311GND213GND1

P3017THF TSSOP 20P

P3017THF TSSOP 20P

DVDD_IO

9

NC

C796

C796

DVDD

2

3

18

14

4

8

12

10

HPL

1

2

10U_0603_6.3V

10U_0603_6.3V

1

DVDD_CORE

VREFOUT_A_or_F

SPKR_PORT_D_L+

SPKR_PORT_D_L-

SPKR_PORT_D_R-

SPKR_PORT_D_R+

1 2

R128 0_0603_5%R128 0_0603_5%

D D

C23 10P_0402_50V8J@C23 10P_0402_50V8J@

1 2

ACZ_BITCLK<18>

ADC_ACZ_SDIN0<18>

ACZ_SDOUT<18>

ACZ_SYNC<18>

ACZ_RST#<18>

MIC_CLK<16>

MIC_SIG<16>

EC_MUTE<27>

+AVDD_HD

+AVDD_HD

C C

C1322 15P_0402_50V8J @C1322 15P_0402_50V8J @

ACZ_SDOUT

1 2

HP_JD

MIC_JD

R126 0_0603_5%R126 0_0603_5%

R127 0_0603_5%R127 0_0603_5%

EC_MUTE

R139 100K_0402_5%R139 100K_0402_5%

1 2

R915 2.49K_0402_1%R915 2.49K_0402_1%

1 2

R13 20K_0402_1%

R13 20K_0402_1%

1 2

R892 10K_0402_1%

R892 10K_0402_1%

C114 1000P_0402_50V7K~NC114 1000P_0402_50V7K~N

For SED TEST

C648

C648

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C642

C642

1 2

0.47U_0603_10V7K

0.47U_0603_10V7K

AMP_RIGHT

C638

C638

1 2

0.47U_0603_10V7K

0.47U_0603_10V7K

C650

C650

1 2

0.47U_0603_10V7K

B B

0.47U_0603_10V7K

AMP_LEFT

0.47U_0603_10V7K

0.47U_0603_10V7K

C636

C636

1 2

EC_MUTE

40mil

45

AVDD27AVDD38PVDD39PVDD

HP0_PORT_A_L
HP0_PORT_A_R

HP1_PORT_B_L
HP1_PORT_B_R

PORT_C_L

PORT_C_R

VREFOUT_C

PORT_E_L
PORT_E_R

PORT_F_L

PORT_F_R

PC_BEEP

MONO_OUT

CAP2

VREFFILT

V-

VREG

+5VS

+5VS

R520 10K_0402_5%R520 10K_0402_5%

R512 10K_0402_5%@ R512 10K_0402_5%@

1

C654

C654

2

1U_0603_10V4Z

1U_0603_10V4Z

+AVDD_HD

C1403

C1403

28
29
23

31
32

19
20
24

40
41

43
44

15
16

17
18

12

25

22

21

34

37

1 2

1 2

SPK_R1

SPK_R2

SPK_L1

SPK_L2

1

2

1U_0402_6.3V

1U_0402_6.3V

AMP_LEFT
AMP_RIGHT

HP_LEFT

HP_RIGHT

MIC_LEFT

MIC_RIGHT

HPR

1

C1404

C1404

2

0.1U_0402_10V6K

0.1U_0402_10V6K

SPR_L1
SPR_L2

SPR_R1
SPR_R2

4.7U_0603_6.3V

4.7U_0603_6.3V

R505 0_0603_5%R505 0_0603_5%

R504 0_0603_5%R504 0_0603_5%

R502 0_0603_5%R502 0_0603_5%

R503 0_0603_5%R503 0_0603_5%

+AVDD_HD+DVDD_IO

1

C1405

C1405

2

R696

R696
R697

R697

R698

R698
R699

R699

R1189 0_0402_5%R1189 0_0402_5%

1 2

1 2

1 2

1 2

1

1

C1407

C1407

C1406

C1406

2

2

1U_0402_6.3V

1U_0402_6.3V

10U_0603_6.3V

10U_0603_6.3V

+MIC1_VREFO

1 2

0_0603_5%

0_0603_5%

1 2

0_0603_5%

0_0603_5%

@

@
@

@

1 2

0_0603_5%

0_0603_5%

1 2

0_0603_5%

0_0603_5%

@

@
@

@

1 2

1

C141

C141

C1414

C1414

2

R513 10K_0402_5%R513 10K_0402_5%

1 2

R521 10K_0402_5%@ R521 10K_0402_5%@

1 2

INTSPK_R1

INTSPK_R2

INTSPK_L1

INTSPK_L2

0.1U_0402_10V6K

0.1U_0402_10V6K

INTSPK_L1
INTSPK_L2

INTSPK_R2
INTSPK_R1

MONO_IN

1

2

2.2U_0603_6.3V6K

2.2U_0603_6.3V6K

1 2

C66

C66

+5VS

L6 0_0805_5%

L6 0_0805_5%

+AVDD_HD

SPR_L1
SPR_L2
SPR_R1
SPR_R2

1

1

C1413

C1413

2

2

10U_0603_6.3V

10U_0603_6.3V

R514 10K_0402_5%@R514 10K_0402_5%

@

1U_0402_6.3V

1U_0402_6.3V

R14

R14

R115

R115

R116

R116

R117

R117

R118

R118

1 2

1 2

@

R515 10K_0402_5%@R515 10K_0402_5%

@

1 2

R51810K_0402_5%@R51810K_0402_5%

R51910K_0402_5%@R51910K_0402_5%

1 2

@

1 2

1 2

1 2

1 2

1 2

R522 10K_0402_5%@R522 10K_0402_5%

@

1 2

12

@

0_0805_5%

0_0805_5%

0_0805_5%

0_0805_5%

0_0805_5%@

0_0805_5%@

0_0805_5%@

0_0805_5%@

0_0805_5%@

0_0805_5%@

R524 10K_0402_5%@R524 10K_0402_5%

@

1 2

HEADPHONE OUT JACK

FOX_JA6333L-B3S0-7F

FOX_JA6333L-B3S0-7F

1

2

0.01U_0402_16V7K

0.01U_0402_16V7K

C252

C252

@

@

5

4

3
6
2
1

JHP1

JHP1

FOX_JA6333L-B3S0-7F

FOX_JA6333L-B3S0-7F

5

4

3
6
2
1

JMIC1

JMIC1

MONO_IN

12

R51610K_0402_5%@R51610K_0402_5%

R51710K_0402_5%@R51710K_0402_5%

@

HP_RIGHT

HP_LEFT

1 2

R360 56_0402_5%

R360 56_0402_5%

1 2

R361 56_0402_5%

R361 56_0402_5%

1

C991000P_0402_50V7K~N@C991000P_0402_50V7K~N

@

@

2

L23

L23

HP_R HPR

1 2

L22

L22

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

1 2

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

1

C1001000P_0402_50V7K~N@C1001000P_0402_50V7K~N

2

For IDT

+MIC1_VREFO

1

C7

C7

@

@

2

1U_0402_6.3V

1U_0402_6.3V

1 2

1 2

4.7K_0402_5%

4.7K_0402_5%

4.7K_0402_5%

4.7K_0402_5%

R348

R348

R349

MIC_RIGHT

C24 2.2U_0402_6.3V6C24 2.2U_0402_6.3V6

MIC_LEFT

C25 2.2U_0402_6.3V6C25 2.2U_0402_6.3V6

GNDAGND

R349

1 2

L34 BLM18BD601SN1D_0603~D

L34 BLM18BD601SN1D_0603~D

1 2

L35 BLM18BD601SN1D_0603~D

L35 BLM18BD601SN1D_0603~D

EC Beep

BEEP<27>

ICH Beep

SB_SPKR<19>

C1412 0.1U_0402_16V4Z

C1412 0.1U_0402_16V4Z

1 2

C1416 0.1U_0402_16V4Z

C1416 0.1U_0402_16V4Z

1 2

HP_JD

HPLHP_L

1

2

2

3

0.01U_0402_16V7K

0.01U_0402_16V7K

D23

D23

@

@

C260

C260

@

@

1

PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

MICROPHONE IN JACK

MIC_JD

C525

@ C525

@

C524

@ C524

@

100P_0402_25V8K

100P_0402_25V8K

100P_0402_25V8K

@

@

R1183

R1183

499K_0402_1%~D

499K_0402_1%~D

R1188

R1188

499K_0402_1%~D

499K_0402_1%~D

100P_0402_25V8K

2

3

D16

D16

1

PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

13

D

+5VALW

2N7002_SOT23-3

2N7002_SOT23-3

2N7002_SOT23-3

2N7002_SOT23-3

R1424

R1424

10K_0402_1%

A A

10K_0402_1%

EC_MUTE

2

G

G

1 2

13

D

D

Q135

Q135
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

D

Q15

Q15

2

G

G

SSM3K131TU_UFM-3

SSM3K131TU_UFM-3

S

S

@

@

S

S

@

@

G

G

SSM3K131TU_UFM-3

SSM3K131TU_UFM-3

2

Q11

Q11

D

D

1 3

Q131

Q131

Q133

Q133

13

D

D

2

G

G

S

S

S

S

G

G

2

D

D

1 3

12

2

G

G

2

R1425

R1425
100K_0402_5%

100K_0402_5%

@

@

13

D

D

S

S

G

G

1 3

SSM3K131TU_UFM-3

SSM3K131TU_UFM-3

SSM3K131TU_UFM-3

SSM3K131TU_UFM-3

S

S

D

D

For pop/click noise from S3/S4/cold boot/warm boot

5

4

Q132

Q132

Q134

Q134

13

D

D

Q10

Q10

2

G

G

2N7002_SOT23-3

2N7002_SOT23-3

S

S

@

@

S

S

@

@

G

G

2N7002_SOT23-3

2N7002_SOT23-3

2

Q16

Q16

D

D

1 3

*

0

1

1

00

1

0 15.6dB

1

GAINGAIN1GAIN0

6dB

10dB

21.6dB

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

MAY BE USED BY OR DISCLOSED TO ANY THI RD PARTY WITHOUT PRIOR WRIT TEN CONSENT OF COMPAL ELECTRONICS, INC .

3

2008/05/07 2009/05/07

2008/05/07 2009/05/07

2008/05/07 2009/05/07

D12PACDN042Y3R_SOT23-3 @D12PACDN042Y3R_SOT23-3 @

2

1

3

1

D17PACDN042Y3R_SOT23-3 @D17PACDN042Y3R_SOT23-3 @

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

2

2

3

Speaker Connector

INTSPK_L2
INTSPK_L1
INTSPK_R2
INTSPK_R1

ACES_88266-04001

ACES_88266-04001

4

4

G2

3

3

G1

2

2

1

1

JSPK1

JSPK1

@C8

6
5

@

INTSPK_R2

C8

100P_0402_25V8K

100P_0402_25V8K

@C15

@

@C9

@

INTSPK_R1

INTSPK_L1

C9

100P_0402_25V8K

100P_0402_25V8K

INTSPK_L2

C15

100P_0402_25V8K

100P_0402_25V8K

100P_0402_25V8K

100P_0402_25V8K

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

HD CODEC 92HD81

HD CODEC 92HD81

HD CODEC 92HD81

LA-4595P

LA-4595P

LA-4595P

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Tuesday, February 17, 2009

of

24 49

of

24 49

of

1

24 49

@C16

@

C16

1.0

1.0

1.0

1bios.ru

5

FD5

FD1

FIDUCAL

FIDUCAL

FIDUCAL

FIDUCAL

@

@

1

D D

H_3P0

H_3P2

H_3P1

C C

H_3P7

H7
HOLEA@H7HOLEA@

1

H17

H17
HOLEA@

HOLEA@

1

H30

H30
HOLEA@

HOLEA@

1

H26

H26
HOLEA@

HOLEA@

1

@

@

@

@

1

H8
HOLEA@H8HOLEA@

1

H18

H18
HOLEA@

HOLEA@

1

FIDUCAL

FIDUCAL

1

H9
HOLEA@H9HOLEA@

1

H25

H25
HOLEA@

HOLEA@

1

FD4

FD4
FIDUCAL

FIDUCAL

@

@

H10

H10
HOLEA@

HOLEA@

FD3

FD3

FD2

FD2

FD1

FD5
FIDUCAL

FIDUCAL

@

@

1

1

1

H11

H11
HOLEA@

HOLEA@

1

H27

H27
HOLEA@

HOLEA@

1

H12

H12
HOLEA@

HOLEA@

FD6

FD6
FIDUCAL

FIDUCAL

@

@

1

4

1

H15

H15

H16

H29

H29
HOLEA@

HOLEA@

1

H16

HOLEA@

HOLEA@

HOLEA@

HOLEA@

1

1

H21

H21

H20

H20

HOLEA@

HOLEA@

HOLEA@

HOLEA@

1

1

3

H22

H22

H23

H23

HOLEA@

HOLEA@

HOLEA@

HOLEA@

1

1

2

1

H4

H3

HOLEA@H4HOLEA@

H_4P2

H_4P5

B B

A A

HOLEA@H3HOLEA@

1

1

H1

H2

HOLEA@H1HOLEA@

HOLEA@H2HOLEA@

1

1

H6

H5

HOLEA@H6HOLEA@

HOLEA@H5HOLEA@

1

1

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

Screws

Screws

Screws

LA-4595P

LA-4595P

LA-4595P

1

25 49Tuesday, February 17, 2009

1.0

1.0

1.0

of

of

of

25 49Tuesday, February 17, 2009

25 49Tuesday, February 17, 2009

1bios.ru

5

4

3

2

1

Express card

JEXP1

D D

12

C91 0 .1U_0402_16V4 Z~N

C91 0 .1U_0402_16V4 Z~N

12

C74 0 .1U_0402_16V4 Z~N

C74 0 .1U_0402_16V4 Z~N

12

C85 0 .1U_0402_16V4 Z~N

C85 0 .1U_0402_16V4 Z~N

PCI_RST#<17,2 1,23,28>

C C

SYSON<27,36,4 3>

SUSP#<27,30,36 ,42,44,46> CLK_PCIE_ EXPR#<15>

Express Card Power Switch

+1.5VS

+3VS

+3VALW

PCI_RST#

SYSON

SUSP#

CPPE#

EXPR_CP USB#

+1.5V_CARD Max. 650mA, Average 500mA

U11

U11

12

1.5Vin

14

1.5Vin

2

3.3Vin

4

3.3Vin

AUX_IN17AUX_OUT

6

SYSRST#

20

SHDN#

1

STBY#

10

CPPE#

9

CPUSB#

18

RCLKEN

P2231NF _QFN20

P2231NF _QFN20

1.5Vout

1.5Vout

3.3Vout

3.3Vout

PERST#

OC#

GND

+1.5VS_P EC

11
13

+3VS_PE C

3
5

+3V_PEC

15

19

PERST#

8

16

NC

7

0.1U_040 2_16V4Z~N

0.1U_040 2_16V4Z~N

0.1U_040 2_16V4Z~N

0.1U_040 2_16V4Z~N

+3V_CARD Max. 1300mA, Average 1000mA

0.1U_040 2_16V4Z~N

0.1U_040 2_16V4Z~N

C90

C90

C92

C92

C75

C75

+1.5VS_P EC

1

2

+3V_PEC

1

2

+3VS_PE C

1

2

4.7U_080 5_10V4Z~N

4.7U_080 5_10V4Z~N

1

C89

C89

2

4.7U_080 5_10V4Z~N

4.7U_080 5_10V4Z~N

1

C93

C93

2

4.7U_080 5_10V4Z~N

4.7U_080 5_10V4Z~N

1

C73

C73

2

EXPCARD _REQ#16<15>

USB20_N 7
USB20_P 7

ICH_SMBCL K<19>
ICH_SMBDA TA< 19>

CLK_PCIE_ EXPR<15>

PCIE_RXN4<19>

PCIE_RXP4<19>

PCIE_TXN4<19>

PCIE_TXP4<1 9>

+3V_PEC

+3VS_PE C

+1.5VS_P EC
+1.5VS_P EC

EXPR_CP USB#

ICH_SMBCL K
ICH_SMBDA TA

PERST#

EXPCARD _REQ#16
CPPE#
CLK_PCIE_ EXPR#
CLK_PCIE_ EXPR

PCIE_RXN4
PCIE_RXP4

PCIE_TXN4
PCIE_TXP4

USB20_N 7<19 >

USB20_P 7<19>

ICH_PCIE_W AKE#<19,21,23,27>

JEXP1

1

GND

2

USB_D-

3

USB_D+

4

CPUSB#

5

RSV

6

RSV

7

SMB_CLK

8

SMB_DATA

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

GND

28

GND

29

GND
GND30GND

FOX_1CX 41202-KH_26P

FOX_1CX 41202-KH_26P

conn@

conn@

GND

31
32

B B

A A

Security Class ification

Security Class ification

Security Class ification

2007/1/1 5 2008/1/1 5

2007/1/1 5 2008/1/1 5

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/1 5 2008/1/1 5

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

EXPRESS CARD

EXPRESS CARD

EXPRESS CARD

LA-4595P

LA-4595P

LA-4595P

1.0

1.0

1.0

26 49Tuesday, February 17, 2009

26 49Tuesday, February 17, 2009

26 49Tuesday, February 17, 2009

of

of

1

of

1bios.ru

ICH_PCIE_WAKE#

CLK_PCI_EC

12

R272

R272

10_0402_5%@

10_0402_5%@

1

C282

@C282

@

15P_0402_50V8J

15P_0402_50V8J

2

EC_SMB_DA1

EC_SMB_CK1

EC_SMB_DA2

EC_SMB_CK2

LCD_TST

LCD_CBL_DET#

MIC_DIAG

EC_FB_SDATA

EC_FB_SCLK

MSEN#

TP_DATA
TP_CLK

EC_MUTE

KSO1

KSO2

For ENE D2

+3VALW

R263 4.7K_0402_5% R263 4.7K_0402_5%

R262 4.7K_0402_5% R262 4.7K_0402_5%

R264 4.7K_0402_5%R264 4.7K_0402_5%

R265 4.7K_0402_5%R265 4.7K_0402_5%

R269 4.7K_0402_5%@ R269 4.7K_0402_5%@

R276 4.7K_0402_5%R276 4.7K_0402_5%

R308 10K_0402_5%

R308 10K_0402_5%

R303 4.7K_0402_5% R303 4.7K_0402_5%

R304 4.7K_0402_5% R304 4.7K_0402_5%

R309 10K_0402_5%

R309 10K_0402_5%

R271

R271

4.7K_0402_5%

4.7K_0402_5%

1 2
1 2

R270

R270

4.7K_0402_5%

4.7K_0402_5%

R312

R312

R76

R76

R78

R78

12

12

12

12

12

12

1 2

12

12

1 2

+5VS

EC_FB_SCLK<28>
EC_FB_SDATA<28>

+3VALW

1 2

10K_0402_5%

10K_0402_5%

1 2

47K_0402_5%@

47K_0402_5%@

1 2

47K_0402_5%@

47K_0402_5%@

32.768KHZ_12.5P_1TJS125BJ2A251

32.768KHZ_12.5P_1TJS125BJ2A251

+3VALW

R405

10K_0402_5%

10K_0402_5%

R281 0_0402_5% R281 0_0402_5%

12

R228

R228

1 2

47K_0402_5%

47K_0402_5%

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+5VALW

+3VS

C292

C292

22P_0402_50V8J

22P_0402_50V8J

R405

1 2

PCIE_PME#_R

C268

C268

TOUCHKEY_TINT<28>

XCLKO

2

1

2

1

R278

R278

1 2

20M_0603_5%@

20M_0603_5%@

1

IN

2

X2

X2

L18

+3VALW +E C_AVCC

1000P_0402_50V7K~N

1000P_0402_50V7K~N

1000P_0402_50V7K~N

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2

KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14

KSO15

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

C493

C493

1

2

1
2
3
4
5
7
8

10

12
13
37
20
38

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

77
78
79
80

6
14
15
16
17
18
19
25
28
29
30
31
32
34
36

122
123

1000P_0402_50V7K~N

1000P_0402_50V7K~N

C269

C269

C291

C291

1

1

2

2

U29

U29

GA20/GPIO00
KBRST#/GPIO01
SERIRQ#
LFRAME#
LAD3
LAD2
LAD1

LPC & MISC

LPC & MISC

LAD0

PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24

Int. K/B

Int. K/B

KSO5/GPIO25

Matrix

Matrix

KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

XCLK1
XCLK0

KB926QFA1_LQFP128

KB926QFA1_LQFP128

SM Bus

SM Bus

9

22

33

96

VCC

VCC

VCC

VCC

PWM Output

PWM Output

DA Output

DA Output

PS2 Interface

PS2 Interface

SPI Device Interface

SPI Device Interface

SPI Flash ROM

SPI Flash ROM

GPIO

GPIO

GND

GND

GND

11

24

35

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

C285

C285

1

2

KSI[0..7]

KSO[0..15]

TOUCHKEY_TINT

R277

R277
0_0402_5%

0_0402_5%

C297

C297

22P_0402_50V8J

22P_0402_50V8J

C277

C277

1

2

GATEA20
KB_RST#
SERIRQ
LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0 BATT_OVP

CLK_PCI_EC
PLT_RST#
EC_RST#
EC_SCI#
PCI_CLKRUN#

EC_SMB_CK1
EC_SMB_DA1
EC_SMB_CK2
EC_SMB_DA2

SLP_S3#
SLP_S5#
EC_SMI#

LID_SW#
EC_FB_SCLK
EC_FB_SDATA

PCIE_PME#_R

VGA_THER

FAN_SPEED1

EC_TX_P80_DATA
EC_RX_P80_DATA

ON_OFF
PWR_BLUE_LED#
NUMLED#

XCLKI
XCLKO

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

C281

C281

1

2

GATEA20<18>
KB_RST#<18>
SERIRQ<19,28>
LPC_FRAME#<18,23,28>
LPC_AD3<18,23,28>
LPC_AD2<18,23,28>
LPC_AD1<18,23,28>
LPC_AD0<18,23,28>

CLK_PCI_EC<15>
PLT_RST#<7,17,30,31>

EC_SCI#<19>

PCI_CLKRUN#<19,28>

KSI[0..7]<28>

KSO[0..15]<2 8>

UIM_DET<23>

EC_SMB_CK1<48>
EC_SMB_DA1<48>
EC_SMB_CK2<4,16,31>
EC_SMB_DA2<4,16,31>

SLP_S3#<19>
SLP_S5#<19>
EC_SMI#<19>
LID_SW#<28>

VGA_THER<31>
FAN_SPEED1<4>

EC_TX_P80_DATA<23>
EC_RX_P80_DATA<23>

ON_OFF<28>

PWR_BLUE_LED#<23,28>

NUMLED#<28>

XCLKI

1 2

2

4

1

OUT

NC3NC

1000P_0402_50V7K~N

67

111

125

VCC

VCC

AVCC

INVT_PWM/PWM 1/GPIO0F

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

ACOFF/FANPWM2/GPIO13

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

AD Input

AD Input

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

TP_CLK/PSCLK3/GPIO4E

TP_DATA/PSDAT3/GPIO4F

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

BATT_CHGI_LED#/GPIO52

CAPS_LED#/GPIO53

GPIO

GPIO

BATT_LOW_LED#/GPIO54

SUSP_LED#/GPIO55

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03

EC_LID_OUT#/GPXO04

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

GPO

GPO

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

GPI

GPI

AGND

GND

GND

69

94

113

AD3/GPIO3B

AD4/GPIO42

IREF/DA2/GPIO3E

DA3/GPIO3F

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D

SDICS#/GPXOA00
SDICLK/GPXOA01

SDIDO/GPXOA02

SDIDI/GPXID0

SPIDO/WR#

SPICLK/GPIO58

CIR_RX/GPIO40

SYSON/GPIO56

AC_IN/GPIO59

EC_ON/GPXO05

BKOFF#/GPXO08

ENBKL/GPXID2

ECAGND

ECAGND

SPIDI/RD#

SPICS#

GPXO10
GPXO11

GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

V18R

C481

C481

1

2

21

BEEP

23

W_DISABLE#

26

ACOFF

27

63
64

ADP_I

65

AD_BID

66

MIC_DIAG

75

POW_MON

76

DAC_BRIG

68

EN_DFAN1

70

IREF

71

M_PWROK_EC

72

EC_MUTE

83

LCD_TST

84

VGA_ON

85

LCD_CBL_DET#

86

TP_CLK

87

TP_DATA

88

SPI_PULLDOWNKSO3

97

EN_WOL#

98

BT_OFF#

99

VGATE

109

FRD#SPI_SO

119

FWR#SPI_SI

120

SPI_CLK

126

FSEL#SPICS#

128

WLANPW_E N#

73

MSEN#

74

FSTCHG

89

BATT_CHG_LED#

90

CAPSLED#

91

BATT_LOW_LED#

92

SCRLED#

93

SYSON

95

VR_ON

121

ACIN

127

EC_RSMRST#

100

EC_LID_OUT#

101

EC_ON

102

EC_SWI#

103

ICH_PWROK

104

BKOFF#

105

WL_OFF#

106

LCD_VCC_TEST_EN

107

PSID_DISABLE#

108

SLP_S4#

110

G7X_ENBKL

112

USB_EN

114

EC_THERM#

115

SUSP#

116
117

PS_ID

118

124

L18

FBM-11-160808-601-T_0603

FBM-11-160808-601-T_0603

2

C482

C482

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

1

C273 0.01U_0402_16V7KC 273 0.01U_0402_16V7K

BATT_TEMP

PBTN_OUT#

+V18R

12

L19FBM-11-160808-601-T_0603 L19FBM-11-160808-601-T_0603

W_DISABLE# <28>

1 2

BATT_TEMP < 48>
BATT_OVP <48>
ADP_I <40>

MIC_DIAG <16>
POW_MON <47>

DAC_BRIG <16>
EN_DFAN1 <4>
IREF <40>

EC_MUTE <24>
LCD_TST <16>
VGA_ON < 45>

TP_CLK <28>
TP_DATA <28>

R274 4.7K_0402_5% R274 4.7K_0402_5%

EN_WOL# <21>
BT_OFF# <29>
VGATE <7,19,47>

WLANPW_E N# <23>

MSEN# <16>

FSTCHG <40>

BATT_CHG_LED# <23>

BATT_LOW_LED# <23>

SYSON < 26,36,43>
VR_ON <47>
ACIN <19,39,40>

EC_RSMRST# <19>
EC_LID_OUT# <19>
EC_ON <28>
EC_SWI# <19>
ICH_PWROK <7,19>

BKOFF# <16>

PSID_DISABLE# <39>

SLP_S4# <19>
G7X_ENBKL <16,31>
USB_EN <29>

EC_THERM# <19>

PBTN_OUT# <19>

1 2

C322

C322

C270 0.1U_0402_16V4ZC270 0.1U_040 2_16V4Z

12

+3VALW+EC_AVCC

INVT_PWM <16>
BEEP <24>

ACOFF <40>

LCD_CBL_DET# <16>

SUSP# <26,30,36,42,44,46>

PS_ID <39>

ECAGND

CHGVADJ <40>

12

CAPSLED# <28>

SCRLED# <28>

WL_OFF# <23>

LCD_VCC_TEST_EN <16>

1U_0603_10V4Z

1U_0603_10V4Z

12

C79

BATT_OVP ECAGND

FSEL#SPICS# SPI_CS#

FRD#SPI_SO

C79

1 2

100P_0402_50V8J

100P_0402_50V8J

+3VALW

C314

C314

1 2

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

R439 15_0402 _5%

R439 15_0402 _5%

1 2

R437

R437

12

R27515_0402_5% R27515_0402_5%

12

10K_0402_5%

10K_0402_5%

Board ID

+3VALW

Ra

Rb

M/B rev:0.1; 0.2; 0.3; 1.0
Voltage:0.0; 0.4; 0.8; 1.0

3.3V+/-5% 0.6V~1.6VVCC

Ra

100k

Board ID

26.1K +/-1%

0

34.8K +/-1%

1

46.4K +/-1%

2

56.2K +/-1%

3

71.5K +/-1%

4

91K +/-1%

SPI Flash (8Mb*1)

C507

@C507

@

0_0402_5%

0_0402_5%

1 2

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

20mils

U37

U37

1

CS#

2

SO

3

WP#

4

GND

MX25L1605AM2C-12G_SO8

MX25L1605AM2C-12G_SO8

VCC

HOLD#

SCLK

SI

For SED TEST

8
7
6
5

SPI_CLK

SPI_CLK_RSPI_SO

12

R232

R232

100K_0402_5%

100K_0402_5%

R231

R231

1 2

71.5K_0402_1%

71.5K_0402_1%

Rb

SPI_SI

AD_BID

1

C272

C272

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

0.683

0.8519

1.0459

1.1873

1.3758

1.57235

1 2

@

@

1 2

1 2

C1323

C1323

12

22P_0402_50V8J

22P_0402_50V8J

R419

R419

SPI_CLK_R

R42015_0402_5% R42015_0402_5%

FWR#SPI_SI

R43815_0402_5% R43815_0402_5%

SPI_CLK

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

Compal Electronics, Inc.

BIOS & EC I/O Port

BIOS & EC I/O Port

BIOS & EC I/O Port

LA-4595P

LA-4595P

LA-4595P

27 49Tuesday, February 17, 2009

27 49Tuesday, February 17, 2009

27 49Tuesday, February 17, 2009

of

of

of

1.0

1.0

1.0

1bios.ru

A

+3VALW

Power Button

R297

R297

1 1

EC_ON<27>

2 2

PWR_ON-OFF_BTN#

CHN202UPT SC-70

CHN202UPT SC-70

+3VALW

R296

R296

4.7K_0402_5%

4.7K_0402_5%

@

@

1 2

EC_ON

R291

R291
0_0402_5%

0_0402_5%

1

1 2

Wireless_BTN

SW1

+5VS

W_DISABLE#<27>

3 3

W_DISABLE#

SW1

1BS003-1211L_3P

1BS003-1211L_3P

11223

2

3

3

D59

D59

PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

@

@

1 2

D15

D15

100K_0402_5%

100K_0402_5%

2

3

13

D

D

2

G

G

S

S

51ON#

2

1

Q26

Q26

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

ON_OFF <27>

51ON# <39>

C313

C313
1000P_0402_50V7K~N

1000P_0402_50V7K~N

Regulator for ENE sensor

+5VS

1U_0402_6.3V4Z

1U_0402_6.3V4Z

C250

C250

1

2

1

TPM 1.2

JTPM1

JTPM1

1

GND1

3

IAC_SDATA_OUT

5

GND2

7

IAC_SYNC

9

IAC_SDATA_IN

11

IAC_RESET#

GND13GND14GND15GND16GND17GND

+3VS

+3VALW

LPC_FRAME#

PCI_RST#

SERIRQ

PCI_CLKRUN#

12mA

LPC_FRAME#<18,23,27>

PCI_RST#<17,21,23,26>

SERIRQ<19 ,27>

PCI_CLKRUN#<19,27>

4 4

12

D13

D13
RLZ20A_LL34

RLZ20A_LL34

Adjustable Output

R901

R901

1 2

10K_0603_1%

10K_0603_1%

RES0
RES1

3.3V
GND3
GND4

IAC_BITCLK

ACES_88018-124L

ACES_88018-124L

18

CONN@

CONN@

B

PWR_ON-OFF_BTN#

2

1

LPC_AD0

2

LPC_AD1

4

LPC_AD2

6

LPC_AD3

8

CLK_PCI_TPM

10
12

SW3

@ SW3

@

SW_1BT002-0121L_4P

SW_1BT002-0121L_4P

3

4

5

RT9198-33PBR SOT-23 5P

RT9198-33PBR SOT-23 5P

SHDN#3BP

GND

VIN

U54

U54

VOUT

4

5

LPC_AD0 <18,23,27>
LPC_AD1 <18,23,27>
LPC_AD2 <18,23,27>
LPC_AD3 <18,23,27>
CLK_PCI_TPM <15>

1

2

6

Base I/O Address

0 = 02Eh

* 1 = 04Eh

POWER SWITCH

+3VS_FUN

C

INT_KBD CONN.

KSI[0..7]<27>

KSO[0..15]<27>

Function/B CONN.

FB_SDATA

C27

C27

@

@

C28

C28

33P_0402_50V8J

33P_0402_50V8J

@

@

33P_0402_50V8J

33P_0402_50V8J

PWR_ON-OFF_BTN#

BTOP_BTN#

Touch PAD/B CONN.

KSI[0..7]

KSO[0..15]

EC_FB_SDATA<27>

EC_FB_SCLK<27>

FB_SCLK

For ENE
near JFN1

D58

D58

2

3

PESD24VS2UT_SOT23-3~D

PESD24VS2UT_SOT23-3~D

@

@

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8

KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15

1

C300

C300

0.01U_0402_16V7K

0.01U_0402_16V7K

D

JKB1

JKB1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

13

14

14

15

15

16

16

17

17

18

18

19

19

20

20

21

21

22

22

23

23

24

24

25

25

26

26

27

G1

28

G2

ACES_88514-2601_26P

ACES_88514-2601_26P

CONN@

CONN@

+3VS

L2

L2

L3 KC FBMA-11-100505-301T 0402

L3 KC FBMA-11-100505-301T 0402

LID_SW#

+5VS

1

2

12

KC FBMA-11-100505-301T 0402

KC FBMA-11-100505-301T 0402

12

BLUETOOTH_LED#<29>

PWR_BLUE_LED#<23,27>

TOUCHKEY_TINT<27>
NUMLED#<27>
CAPSLED#<27>
SCRLED#<27>

U10

U10
APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

3

VOUT

TP_CLK<27>
TP_DATA<27>

KSO8

KSI3

KSO9

KSI2

KSI1

KSO10

KSO11

KSI0

KSO12

KSO13

KSO14

KSO15

R881

@R881

@

0_0603_5%

0_0603_5%

1 2

SATA_LED#<18>

LED_WLAN#<23>

@

@

2

VDD

GND

1

TP/B TO M/B

1

C309100P_0402_25V8K@C309100P_0402_25V8K

2

C449 100P_0402_25V8K@ C449 100P_0402_25V8K@ C235 100P_0402_25V8K@ C235 100P_0402_25V8K@

C239 100P_0402_25V8K@ C239 100P_0402_25V8K@

C249 100P_0402_25V8K@ C249 100P_0402_25V8K@

C240 100P_0402_25V8K@ C240 100P_0402_25V8K@

C241 100P_0402_25V8K@ C241 100P_0402_25V8K@

C248 100P_0402_25V8K@ C248 100P_0402_25V8K@

C247 100P_0402_25V8K@ C247 100P_0402_25V8K@

C242 100P_0402_25V8K@ C242 100P_0402_25V8K@

C246 100P_0402_25V8K@ C246 100P_0402_25V8K@

C245 100P_0402_25V8K@ C245 100P_0402_25V8K@

C244 100P_0402_25V8K@ C244 100P_0402_25V8K@

C243 100P_0402_25V8K@ C243 100P_0402_25V8K@

KSI7

KSI6

KSI5

KSO0

KSO1

KSO2

KSI4

KSO3

KSO4

KSO5

KSO6

KSO7

For EMI

1

+3VALW

C80

C80

+3VS_FUN

+3VALW

0.1U_0402_16V4Z

0.1U_0402_16V4Z

@

@

@

1

C29

C29

2

@

C310100P_0402_25V8K@C310100P_0402_25V8K

R623

R623

1 2

PWR_ON-OFF_BTN#

LED_WLAN#
FB_SDATA
FB_SCLK

BLUETOOTH_LED#

PWR_BLUE_LED#

TOUCHKEY_TINT

NUMLED#
CAPSLED#
SCRLED#

BTOP_BTN#

LID_SW#< 27>

TP_CLK
TP_DATA

1

2

D24

D24

2

@

@

0_0402_5%

0_0402_5%

10U_0603_6.3V

10U_0603_6.3V

R_SATA_LED#

1 2

2

3

1

18
17
16
15
14
13
12
11
10

9
8
7
6

R607

R607

LID_SW#

6
5
4
3
2
1

5
4
3
2
1

3

CONN@

CONN@

ACES_85201-0405N

ACES_85201-0405N

G2
G1
4
3
2
1

JP1

JP1

0_0402_5%

0_0402_5%

PACDN042Y3R_SOT23-3

PACDN042Y3R_SOT23-3

E

C236 100P_0402_25V8K@ C236 100P_0402_25V8K@

C237 100P_0402_25V8K@ C237 100P_0402_25V8K@

C441 100P_0402_25V8K@ C441 100P_0402_25V8K@

C442 100P_0402_25V8K@ C442 100P_0402_25V8K@

C443 100P_0402_25V8K@ C443 100P_0402_25V8K@

C238 100P_0402_25V8K@ C238 100P_0402_25V8K@

C444 100P_0402_25V8K@ C444 100P_0402_25V8K@

C445 100P_0402_25V8K@ C445 100P_0402_25V8K@

C446 100P_0402_25V8K@ C446 100P_0402_25V8K@

C447 100P_0402_25V8K@ C447 100P_0402_25V8K@

C448 100P_0402_25V8K@ C448 100P_0402_25V8K@

CONN@

CONN@

ACES_88512-1641_16P

ACES_88512-1641_16P

GND
GND
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

JFN1

JFN1

U9

U9
APX9132ATI-TRL_SOT23-3

APX9132ATI-TRL_SOT23-3

VDD

VOUT

GND

1

+3VALW

2

1

C26

C26

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

A

B

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

D

Date: Sheet

Compal Electronics, Inc.

PWR_OK/BTN/TP

PWR_OK/BTN/TP

PWR_OK/BTN/TP

LA-4595P

LA-4595P

LA-4595P

E

28 49Tuesday, February 17, 2009

1.0

1.0

1.0

of

of

of

28 49Tuesday, February 17, 2009

28 49Tuesday, February 17, 2009

1bios.ru

+5VALW

1

C228

C228

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C64

C64

+5VALW

1

2

C253

C253

2

+5VALW

1

2

Fingerprint

USB20_N5<19>
USB20_P5<19>

+3VS

+5VS

USB20_N3<19>
USB20_P3<19>

TP1TP1

C315

C315

10U_0805_10V4Z

10U_0805_10V4Z

80 mils

USB_EN#

80 mils

USB_EN#

80 mils

USB_EN#

JFP1

JFP1

7

66G1

5

8

5

G2

4

4

3

3

2

2

1

1

ACES_88512-0641_6P

ACES_88512-0641_6P

CONN@

CONN@

Felica Conn

USB20_N3
USB20_P3

LEC

1

2

CM1293-04SO_SOT23-6

CM1293-04SO_SOT23-6

1

CH1

2

Vn

3

CH2

D21

D21

CONN@

CONN@

ACES_88512-0641_6P

ACES_88512-0641_6P

1

1

2

2

3

3

4

4

5

8

5

G2

7

66G1

JFE1

JFE1

U12

U12

1

GND

2

IN

3

IN

4

EN#

RT9711PS SO 8P

RT9711PS SO 8P

1
2
3
4

1
2
3
4

4

CH4

5

Vp

6

CH3

USB_EN<27>

OUT
OUT
OUT
OC#

U14

U14

GND

OUT

IN

OUT
OUT

IN

OC#

EN#

RT9711PS SO 8P

RT9711PS SO 8P

U13

U13

GND
IN
IN
EN#

RT9711PS SO 8P

RT9711PS SO 8P

USB20_P5

USB20_N5

+3VS

OUT
OUT
OUT
OC#

8
7
6
5

8
7
6
5

BT_OFF#<27>

USB_EN

8
7
6

5

+USB_AS

+USB_CS

+USB_BS

2

G

G

1

+

+

C434

C434

150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

2

1

+

+

150U_B2_6.3VM_R45M

150U_B2_6.3VM_R45M

2

+3VS

R282

R282

10K_0402_5%

10K_0402_5%

1 2

BT_OFF#

+5VALW

R222

R222
10K_0402_5%

10K_0402_5%

1 2

13

D

D

Q4

Q4
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C435

C435

USB_EN#

USB20_P4<19>
USB20_N4<19>

CH_CLK<23>

CH_DATA<23>

BLUETOOTH_LED#<28>

USB_EN#

C223

C223

USB_EN#

USB_OC#0 <19>

USB_OC#2_#8 <19>

C224

C224

USB_OC#9 <19>

T62PAD T62PAD

+3VS

R155

R155

470_0603_5%

470_0603_5%

1 2
13

D

D

Q14

Q14

2

G

G

SSM3K7002FU_SC70-3

R36

SSM3K7002FU_SC70-3

S

S

R38
470_0603_5%

470_0603_5%

1 2

13

D

D

2

G

G

S

S

USB20_N0<19>

USB20_P0<19>

R38

Q13

Q13
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

USB20_N0

USB20_P0

CM1293-04SO_SOT23-6

CM1293-04SO_SOT23-6

1

CH1

2

Vn

3

CH2

D19

@D19

@

USB20_N9<19>

USB20_P9<19>

USB20_N9

USB20_P9

12

R1 0_0402_5%R1 0_0402_5%

12

R3 0_0402_5%R3 0_0402_5%

4

CH4

5

Vp

6

CH3

R1410 0_0402_5%R1410 0_0402_5%

R1411 0_0402_5%R1411 0_0402_5%

12

12

2

G

G

12

R154

R154
100K_0402_5%

100K_0402_5%

@

@

USB_EN#

R36
470_0603_5%

470_0603_5%

1 2

13

D

D

S

S

Q8

Q8
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

Bluetooth

JBT1

JBT1

1

1

2

2

3

BT_ACTIVE

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

GND

12

GND

ACES_88460-1001

ACES_88460-1001

CONN@

CONN@

Compal Secret Data

Compal Secret Data

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

IEEE1394_TPBN0<30>
IEEE1394_TPBP0<30>
IEEE1394_TPAN0<30>
IEEE1394_TPAP0<30>

USB20_P2<19>
USB20_N2<19>

USB20_P8<19>
USB20_N8<19>

USB_P0

USB_N0

+USB_AS

USB_N0
USB_P0

+USB_AS

+USB_BS

W=60mils

CM1293-04SO_SOT23-6

CM1293-04SO_SOT23-6

1

2

3

D27

@D27

@

CH1

Vn

CH2

CH4

CH3

4

5

Vp

6

W=60mils

JUSBP4

JUSBP4

1

USB_P9­USB_P9+

+USB_CS

W=80mils

Title

Title

Title

USB/BlueTooth/FP/Felcia

USB/BlueTooth/FP/Felcia

USB/BlueTooth/FP/Felcia

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

LA-4595P

LA-4595P

LA-4595P

Date: Sheet

Date: Sheet

Date: Sheet

VCC

2

USB_N

3

USB_P

4

GND

5

GND

6

GND

7

GND

8

GND

SUYIN_020133MR004S536ZL

SUYIN_020133MR004S536ZL

CONN@

CONN@

JUSBP3

JUSBP3

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

11

12

12

13

GND1

14

GND2

ACES_87213-1200G

ACES_87213-1200G

CONN@

CONN@

Compal Electronics, Inc.

JUSBP1

JUSBP1

1

VCC

2

USB_N

3

USB_P

4

GND

5

GND

6

GND

7

GND

8

GND

SUYIN_020133MR004S536ZL

SUYIN_020133MR004S536ZL

CONN@

CONN@

USB20_P9

+USB_BS

USB20_N9

29 49Tuesday, February 17, 2009

29 49Tuesday, February 17, 2009

29 49Tuesday, February 17, 2009

of

of

of

1.0

1.0

1.0

1bios.ru

5

D D

+1.8V

R1377

@ R1377

@

SUSP<36,46>

0_0603_5%

0_0603_5%

+3VS

C C

B B

A A

1 2

R1381

R1381

MEDIA_REQ#32<15>

IEEE1394_TPBIAS0

R1385

R1385

56.2_0402_1%

56.2_0402_1%

R1401

R1401

56.2_0402_1%

56.2_0402_1%

R1407

R1407

5.1K_0402_1%

5.1K_0402_1%

1 2

100K_0402_5%

100K_0402_5%

0.1U_0402_10V6K

0.1U_0402_10V6K

1

C1761

C1761

C1760

C1760

2

+3VS

12

12

R1386

R1386

56.2_0402_1%

56.2_0402_1%

12

12

R1400

R1400

56.2_0402_1%

56.2_0402_1%

2

C1769

C1769
270P_0402_50V7K

270P_0402_50V7K

1

1 2

Q129

Q129

AO3413_SOT23

AO3413_SOT23

S

S

G

G

+3VS_PHY

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C1762

C1762

2

2

R1384

R1384

1 2

10K_0402_5%

10K_0402_5%

1

2

IEEE1394_TPAP0

IEEE1394_TPAN0

IEEE1394_TPBP0

IEEE1394_TPBN0

+1.8VS_CB

@

@

D

D

13

2

1

C1754

C1754

0.01U_0402_16V7K

0.01U_0402_16V7K

2

@

@

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

C1770

C1770
1U_0402_6.3V6K

1U_0402_6.3V6K

R1375

R1375

1 2

0_0402_5%

0_0402_5%

+1.8VS_CB

C1750

C1750

+3VS

+3VS_PHY

0_0603_5%

0_0603_5%

1 2

R1380

R1380

PCIE_TXP5<19>
PCIE_TXN5<19>

PCIE_RXP5<19>
PCIE_RXN5<19>

CLK_PCIE_MEDIA<15>

CLK_PCIE_MEDIA#<15>

PLT_RST#<7,17,27,31>

IEEE1394_TPAP0 <29>

IEEE1394_TPAN0 <29>

IEEE1394_TPBP0 <29>

IEEE1394_TPBN0 <29>

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

C1746

C1746

C1747

C1747

1

2

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C1752

C1752

C1751

C1751

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C1756

C1756

C1757

C1757

2

2

+PE_3.3VCCA

@

@

Layout Note: Place close to OZ888 Chipset.

5

4

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

C1748

C1748

1

1

C1771

C1771

2

2

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

0.1U_0402_10V6K

1

1

C1753

C1753

2

2

1 2

O2 recommend

0.1U_0402_10V6K

0.1U_0402_10V6K

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

1

C1755

C1755

2

C1758 4.7U_0603_6.3V6K~D

C1758 4.7U_0603_6.3V6K~D

1 2

C1759 0.1U_0402_10V6K

C1759 0.1U_0402_10V6K

1 2

@

@

C1763 0.1U_0402_10V6K

C1763 0.1U_0402_10V6K
C1764 0.1U_0402_10V6K

C1764 0.1U_0402_10V6K

4

+1.8PE_VCCA

0.1U_0402_10V6K

0.1U_0402_10V6K

1

2

@

@

O2 recommend

R1379

R1379

0_0402_5%

0_0402_5%

@

@

+VCCD_OUT

R1423 0_0402_5%

R1423 0_0402_5%

1 2

1 2

R1422 0_0402_5%

R1422 0_0402_5%

@

@

R1382 1.2K_0402_1%

R1382 1.2K_0402_1%

12

R13835.1K_0402_1% R13835.1K_0402_1%

12

12
12

3

U16

+3VALW

SUSP#

SUSP#<26,27,36,42,44,46>

0_0402_5%

0_0402_5%

12

R1023

R1023

+VCCA_OUT

U46

U46

7

PE_VCCA

14

PE_VCCA

17

PE_VCCA

1

VCCA_OUT

POWER

4
18
24
41
64

20
28

44
27
19

2
40
35

3

11

@

@

9

10

12
13

15
16

5

6

32

31

65

POWER

CORE_VCCD
CORE_VCCD
CORE_VCCD
CORE_VCCD
CORE_VCCD

VCCD_OUT
VCCD_OUT

3.3VCCD

3.3VCCD

3.3VCCD

3.3VCCA

3.3VCCA

3.3VCCA

PE_3.3VCCA

PLL_REF_RETURN

PE_RTERM2

PE_RTERM1

PE_RXP
PE_RXN

PE_TXP
PE_TXN

PE_REFCLKP
PE_REFCLKN

PE_CLKREQ#

PE_RST#

DGND

OZ888GS0L1N_QFN64_8X8

OZ888GS0L1N_QFN64_8X8

PCIe

PCIe

GND

GND

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

2

IEEE1394

IEEE1394

MMI_SD_MMC_CD#

MS_CLK/XD_CE#

SD_MMC_CLK

MMI_XD_WPO

SD_MMC_CMD

MMI_XD_WE#

MS_BS/XD_ALE

MMC_MS_XD_D7
MMC_MS_XD_D6
MMC_MS_XD_D5
MMC_MS_XD_D4

CardReader

CardReader

MS_XD_D0
MS_XD_D1
MS_XD_D2
MS_XD_D3
MMC_XD_D4
MMC_XD_D5
MMC_XD_D6
MMC_XD_D7

XD_WE#
MMI_XD_WPO
MSBS_XDALE
XD_CD#
XD_RB#
XD_RE#
MSCLK_XDCE#
XD_CLE

C218

C218

1394_TPBIAS

MMI_XD_CD#
MMI_MS_CD#

MMI_XD_RE#
MMI_XD_RB#
MMI_XD_CLE

SD_MMC_D3

SD_MMC_D2

SD_MMC_D1

SD_MMC_D0

1
2
3

RT9043-GB_SOT23-5~D

RT9043-GB_SOT23-5~D

R1421

R1421
10K_0402_5%

10K_0402_5%

1 2

@

@

33

1394_TPBN

34

1394_TPBP

36

1394_TPAN

37

1394_TPAP

38

42

1394_XI

43

1394_XO

39

1394_REF

26

MMI_VCC

25
29
30

45
46
61

MMI_WPI#

63
62
23
22
48
21
47

49
50
51
52

53

MS_XD_D3

54
55

MS_XD_D2

56
57

MS_XD_D1

58
59

MS_XD_D0

60

8

AGND

R1387 0_0402_5%

R1387 0_0402_5%

1 2

R1388 0_0402_5%

R1388 0_0402_5%

1 2

R1389 0_0402_5%

R1389 0_0402_5%

1 2

R1390 0_0402_5%

R1390 0_0402_5%

1 2

R1391 0_0402_5%

R1391 0_0402_5%

1 2

R1392 0_0402_5%

R1392 0_0402_5%

1 2

R1393 0_0402_5%

R1393 0_0402_5%

1 2

R1394 0_0402_5%

R1394 0_0402_5%

1 2

R1395 0_0402_5%

R1395 0_0402_5%

1 2

R1396 0_0402_5%

R1396 0_0402_5%

1 2

R1397 0_0402_5%

R1397 0_0402_5%

1 2

R1399 0_0402_5%

R1399 0_0402_5%

1 2

R1402 0_0402_5%

R1402 0_0402_5%

1 2

R1403 0_0402_5%

R1403 0_0402_5%

1 2

R1404 33_0402_5%~D

R1404 33_0402_5%~D

1 2

R1405 0_0402_5%

R1405 0_0402_5%

1 2

3

U16

VOUT

VIN
GND

FB

EN

IEEE1394_TPBN0
IEEE1394_TPBP0

IEEE1394_TPAN0
IEEE1394_TPAP0

IEEE1394_TPBIAS0

OZ888XI
OZ888XO

R1378

R1378

1 2

5.9K_0402_1%

5.9K_0402_1%

XD_CD#
MS_CD#
SD_CD#

MSCLK_XDCE#
SD_CLK_R
MMI_WPI#
MMI_XD_WPO
XD_RE#
XD_RB#
XD_CLE
SD_CMD
XD_WE#
MSBS_XDALE

MMC_XD_D7
MMC_XD_D6
MMC_XD_D5
MMC_XD_D4

MS_XD_D3
MMC_SD_D3
MS_XD_D2
MMC_SD_D2
MS_XD_D1 SD_CLK
MMC_SD_D1
MS_XD_D0
MMC_SD_D0

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

+1.8VS_CB

R1376

R1420

SD_CLK

R1376

61.9K +-1% 0402

61.9K +-1% 0402

1 2

12

R1409

R1409
100K_0402_5%

100K_0402_5%

+3VS_CR

1

2

5

4

1

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

2

R1420

0_0402_5%

0_0402_5%

C217

C217

12

For EMI TEST

+3VS_CR +3VS_CR

JSD1

JSD1

3

XDD0_MSD0
XDD1_MSD1
XDD2_MSD2
XDD3_MSD3
XDD4_MMCD4
XDD5_MMCD5
XDD6_MMCD6
XDD7_MMCD7

XDWE
XDWP
XDALE_MSBS
XDCD
XDRB
XDRE
XDCE_MSCLK
XDCLE

XD-VCC

32

XD-D0

10

34
33
35
40
39
38
37
36

11
31
41
42

2008/1/3 2009/01/3

2008/1/3 2009/01/3

2008/1/3 2009/01/3

XD-D1

9

XD-D2

8

XD-D3

7

XD-D4

6

XD-D5

5

XD-D6

4

XD-D7

XD-WE
XD-WP
XD-ALE
XD-CD
XD-R/B
XD-RE
XD-CE
XD-CLE

7in1-GND
7in1-GND
7in1-GND
7in1-GND

TAITW_R015-A10-LM

TAITW_R015-A10-LM

7 IN 1 CONN

7 IN 1 CONN

Compal Secret Data

Compal Secret Data

Compal Secret Data

2

Layout Note: Place close to
OZ888 and Shield GND.

C1745

C1745

1 2

15P_0402_50V8J

15P_0402_50V8J

X3

X3

24.576MHz_16P_X5H024576FG1H-H

24.576MHz_16P_X5H024576FG1H-H

1 2

C1749

C1749

1 2

18P_0402_50V8J

18P_0402_50V8J

FOR DELL TEST

C1772

C1772

4.7U_0603_6.3V6K~D

4.7U_0603_6.3V6K~D

+3VS_CR

1

C1768

C1768

1U 10V Z Y5V 0603

1U 10V Z Y5V 0603

SD-VCC

MS-VCC

SD_CLK
SD-DAT0
SD-DAT1
SD-DAT2
SD-DAT3
SD-DAT4
SD-DAT5
SD-DAT6
SD-DAT7

SD-CD

SD-WP

SD-CMD

MS-SCLK

MS-BS

MS-INS

MS-DATA0
MS-DATA1
MS-DATA2
MS-DATA3

21

28

20

14
12
30
29
27
23
18
16

1
2
25

26

13

22

17
15
19
24

1

2

2

SDCLK

R1093 33_0402_5%~D

R1093 33_0402_5%~D

SDDAT0

R1412 0_0402_5%

R1412 0_0402_5%

SDDAT1

R1413 0_0402_5%

R1413 0_0402_5%

SDDAT2

R1414 0_0402_5%

R1414 0_0402_5%

SDDAT3

R1415 0_0402_5%

R1415 0_0402_5%

XDD4_MMCD4
XDD5_MMCD5
XDD6_MMCD6
XDD7_MMCD7

SDCD

R1398 0_0402_5%

R1398 0_0402_5%

SDWP

R1416 0_0402_5%

R1416 0_0402_5%

SDCMD

R1417 0_0402_5%

R1417 0_0402_5%

XDCE_MSCLK
XDALE_MSBS
MSINS

R1406 0_0402_5%

R1406 0_0402_5%

XDD0_MSD0
XDD1_MSD1
XDD2_MSD2
XDD3_MSD3

All DATA spacing=8mil, CLK spacing=15mil

Deciphered Date

Deciphered Date

Deciphered Date

2

OZ888XI

R1408

R1408

OZ888XOOZ888XO_L

1 2

0_0402_5%

0_0402_5%

1

C1765

C1767

C1767
1U 10V Z Y5V 0603

1U 10V Z Y5V 0603

2

MSCLK_XDCE#

C1765
1U 10V Z Y5V 0603

1U 10V Z Y5V 0603

R1418

0_0402_5%

0_0402_5%

R1419

0_0402_5%

0_0402_5%

For EMI TEST and Colse to J8IN1

1 2
1 2
1 2
1 2
1 2

1 2
1 2
1 2

1 2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Date: Sheet

Date: Sheet

Date: Sheet

1

@R1418

@

C1766

C1766

12

1 2

10P_0402_50V8J~D

10P_0402_50V8J~D

@R1419

@

C1773

C1773

12

1 2

10P_0402_50V8J~D

10P_0402_50V8J~D

SD_CLK
MMC_SD_D0
MMC_SD_D1
MMC_SD_D2
MMC_SD_D3

SD_CD#
MMI_WPI#
SD_CMD

MS_CD#

OZ888GS0L1N Media Card/1394

OZ888GS0L1N Media Card/1394

OZ888GS0L1N Media Card/1394

LA-4595P

LA-4595P

LA-4595P

1

@

@

@

@

of

30 49

of

30 49

of

30 49

1.0

1.0

1.0

1bios.ru

5

PEG_NRX_GTX_P[0..15]<9>

PEG_NRX_GTX_N[0..15]<9>

PEG_NTX_GRX_P[0..15]<9>

PEG_NTX_GRX_N[0..15]<9>

D D

PEG_NRX_GTX_P0
PEG_NRX_GTX_N0
PEG_NRX_GTX_P1
PEG_NRX_GTX_N1
PEG_NRX_GTX_P2
PEG_NRX_GTX_N2
PEG_NRX_GTX_P3
PEG_NRX_GTX_N3
PEG_NRX_GTX_P4

C C

PEG_NRX_GTX_N4
PEG_NRX_GTX_P5
PEG_NRX_GTX_N5
PEG_NRX_GTX_P6
PEG_NRX_GTX_N6
PEG_NRX_GTX_P7
PEG_NRX_GTX_N7
PEG_NRX_GTX_P8
PEG_NRX_GTX_N8
PEG_NRX_GTX_P9
PEG_NRX_GTX_N9
PEG_NRX_GTX_P10
PEG_NRX_GTX_N10
PEG_NRX_GTX_P11
PEG_NRX_GTX_N11
PEG_NRX_GTX_P12
PEG_NRX_GTX_N12
PEG_NRX_GTX_P13
PEG_NRX_GTX_N13
PEG_NRX_GTX_P14
PEG_NRX_GTX_N14
PEG_NRX_GTX_P15
PEG_NRX_GTX_N15

Check reset timing

B B

PEX_TERMP

1 2

R1160 2.49K_0402_1%R1160 2.49K_0402_1%

PEG_NRX_GTX_P[0..15]

PEG_NRX_GTX_N[0..15]

PEG_NTX_GRX_P[0..15]

PEG_NTX_GRX_N[0..15]

C1273 0.1U_0402_16V7KC1273 0.1U_0402_16V7K

1 2

C1274 0.1U_0402_16V7KC1274 0.1U_0402_16V7K

1 2

C1275 0.1U_0402_16V7KC1275 0.1U_0402_16V7K

1 2

C1276 0.1U_0402_16V7KC1276 0.1U_0402_16V7K

1 2

C1277 0.1U_0402_16V7KC1277 0.1U_0402_16V7K

1 2

C1278 0.1U_0402_16V7KC1278 0.1U_0402_16V7K

1 2

C1279 0.1U_0402_16V7KC1279 0.1U_0402_16V7K

1 2

C1280 0.1U_0402_16V7KC1280 0.1U_0402_16V7K

1 2

C1281 0.1U_0402_16V7KC1281 0.1U_0402_16V7K

1 2

C1282 0.1U_0402_16V7KC1282 0.1U_0402_16V7K

1 2

C1284 0.1U_0402_16V7KC1284 0.1U_0402_16V7K

1 2

C1285 0.1U_0402_16V7KC1285 0.1U_0402_16V7K

1 2

C1286 0.1U_0402_16V7KC1286 0.1U_0402_16V7K

1 2

C1287 0.1U_0402_16V7KC1287 0.1U_0402_16V7K

1 2

C1288 0.1U_0402_16V7KC1288 0.1U_0402_16V7K

1 2

C1289 0.1U_0402_16V7KC1289 0.1U_0402_16V7K

1 2

C1290 0.1U_0402_16V7KC1290 0.1U_0402_16V7K

1 2

C1291 0.1U_0402_16V7KC1291 0.1U_0402_16V7K

1 2

C1292 0.1U_0402_16V7KC1292 0.1U_0402_16V7K

1 2

C1293 0.1U_0402_16V7KC1293 0.1U_0402_16V7K

1 2

C1294 0.1U_0402_16V7KC1294 0.1U_0402_16V7K

1 2

C1295 0.1U_0402_16V7KC1295 0.1U_0402_16V7K

1 2

C1296 0.1U_0402_16V7KC1296 0.1U_0402_16V7K

1 2

C1297 0.1U_0402_16V7KC1297 0.1U_0402_16V7K

1 2

C1298 0.1U_0402_16V7KC1298 0.1U_0402_16V7K

1 2

C1299 0.1U_0402_16V7KC1299 0.1U_0402_16V7K

1 2

C1300 0.1U_0402_16V7KC1300 0.1U_0402_16V7K

1 2

C1301 0.1U_0402_16V7KC1301 0.1U_0402_16V7K

1 2

C1302 0.1U_0402_16V7KC1302 0.1U_0402_16V7K

1 2

C1303 0.1U_0402_16V7KC1303 0.1U_0402_16V7K

1 2

C1304 0.1U_0402_16V7KC1304 0.1U_0402_16V7K

1 2

C1305 0.1U_0402_16V7KC1305 0.1U_0402_16V7K

1 2

XTALSSIN<34>
CLK_NVSS_27M< 15>

CLK_PCIE_VGA<15>
CLK_PCIE_VGA#<15>

PLT_RST#<7,17,27,30>

XTALOUTBUFF<34>

4

PEG_NTX_GRX_P0
PEG_NTX_GRX_N0
PEG_NTX_GRX_P1
PEG_NTX_GRX_N1
PEG_NTX_GRX_P2
PEG_NTX_GRX_N2
PEG_NTX_GRX_P3
PEG_NTX_GRX_N3
PEG_NTX_GRX_P4
PEG_NTX_GRX_N4
PEG_NTX_GRX_P5
PEG_NTX_GRX_N5
PEG_NTX_GRX_P6
PEG_NTX_GRX_N6
PEG_NTX_GRX_P7
PEG_NTX_GRX_N7
PEG_NTX_GRX_P8
PEG_NTX_GRX_N8
PEG_NTX_GRX_P9
PEG_NTX_GRX_N9
PEG_NTX_GRX_P10
PEG_NTX_GRX_N10
PEG_NTX_GRX_P11
PEG_NTX_GRX_N11
PEG_NTX_GRX_P12
PEG_NTX_GRX_N12
PEG_NTX_GRX_P13
PEG_NTX_GRX_N13
PEG_NTX_GRX_P14
PEG_NTX_GRX_N14
PEG_NTX_GRX_P15
PEG_NTX_GRX_N15

PEG_NRX_C_GTX_P0
PEG_NRX_C_GTX_N0
PEG_NRX_C_GTX_P1
PEG_NRX_C_GTX_N1
PEG_NRX_C_GTX_P2
PEG_NRX_C_GTX_N2
PEG_NRX_C_GTX_P3
PEG_NRX_C_GTX_N3
PEG_NRX_C_GTX_P4
PEG_NRX_C_GTX_N4
PEG_NRX_C_GTX_P5
PEG_NRX_C_GTX_N5
PEG_NRX_C_GTX_P6
PEG_NRX_C_GTX_N6
PEG_NRX_C_GTX_P7
PEG_NRX_C_GTX_N7
PEG_NRX_C_GTX_P8
PEG_NRX_C_GTX_N8
PEG_NRX_C_GTX_P9
PEG_NRX_C_GTX_N9
PEG_NRX_C_GTX_P10
PEG_NRX_C_GTX_N10
PEG_NRX_C_GTX_P11
PEG_NRX_C_GTX_N11
PEG_NRX_C_GTX_P12
PEG_NRX_C_GTX_N12
PEG_NRX_C_GTX_P13
PEG_NRX_C_GTX_N13
PEG_NRX_C_GTX_P14
PEG_NRX_C_GTX_N14
PEG_NRX_C_GTX_P15
PEG_NRX_C_GTX_N15

CLK_PCIE_VGA
CLK_PCIE_VGA#

R1150 0_0402_5%~DR1150 0_0402_5%~D

1 2

PEX_TERMP

XTALOUTBUFF

XTALSSIN_R

1 2

R1158 0_0402_5%~D @R1158 0_0402_5%~D @

1 2

R1159 0_0402_5%~D R1159 0_0402_5%~D

U59A

U59A

AE12

PEX_RX0

AF12

PEX_RX0_N

AG12

PEX_RX1

AG13

PEX_RX1_N

AF13

PEX_RX2

AE13

PEX_RX2_N

AE15

PEX_RX3

AF15

PEX_RX3_N

AG15

PEX_RX4

AG16

PEX_RX4_N

AF16

PEX_RX5

AE16

PEX_RX5_N

AE18

PEX_RX6

AF18

PEX_RX6_N

AG18

PEX_RX7

AG19

PEX_RX7_N

AF19

PEX_RX8

AE19

PEX_RX8_N

AE21

PEX_RX9

AF21

PEX_RX9_N

AG21

PEX_RX10

AG22

PEX_RX10_N

AF22

PEX_RX11

AE22

PEX_RX11_N

AE24

PEX_RX12

AF24

PEX_RX12_N

AG24

PEX_RX13

AF25

PEX_RX13_N

AG25

PEX_RX14

AG26

PEX_RX14_N

AF27

PEX_RX15

AE27

PEX_RX15_N

AD10

PEX_TX0

AD11

PEX_TX0_N

AD12

PEX_TX1

AC12

PEX_TX1_N

AB11

PEX_TX2

AB12

PEX_TX2_N

AD13

PEX_TX3

AD14

PEX_TX3_N

AD15

PEX_TX4

AC15

PEX_TX4_N

AB14

PEX_TX5

AB15

PEX_TX5_N

AC16

PEX_TX6

AD16

PEX_TX6_N

AD17

PEX_TX7

AD18

PEX_TX7_N

AC18

PEX_TX8

AB18

PEX_TX8_N

AB19

PEX_TX9

AB20

PEX_TX9_N

AD19

PEX_TX10

AD20

PEX_TX10_N

AD21

PEX_TX11

AC21

PEX_TX11_N

AB21

PEX_TX12

AB22

PEX_TX12_N

AC22

PEX_TX13

AD22

PEX_TX13_N

AD23

PEX_TX14

AD24

PEX_TX14_N

AE25

PEX_TX15

AE26

PEX_TX15_N

AB10

PEX_REFCLK

AC10

PEX_REFCLK_N

AD9

PEX_RST_N

AG10

PEX_TERMP

E9

XTALOUTBUFF

D11

XTALSSIN

NB9M-GS_BGA533~D

NB9M-GS_BGA533~D

Part 1 of 5

Part 1 of 5

DVO / GPIO

DVO / GPIO

DACsI2C

DACsI2C

PCI EXPRESS

PCI EXPRESS

TEST

TEST

PEX_TSTCLK_OUT

PEX_TSTCLK_OUT_N

CLK

CLK

GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
GPIO6
GPIO7
GPIO8

GPIO9
GPIO10
GPIO11
GPIO12
GPIO13
GPIO14
GPIO15
GPIO16
GPIO17
GPIO18
GPIO19

DACA_HSYNC
DACA_VSYNC

DACA_RED

DACA_BLUE

DACA_GREEN

DACA_RSET
DACA_VREF

DACB_RED

DACB_BLUE

DACB_GREEN

DACB_RSET

DACB_CSYNC

DACB_VREF

DACC_HSYNC
DACC_VSYNC

DACC_RED

DACC_BLUE

DACC_GREEN

DACC_RSET
DACC_VREF

I2CA_SCL

I2CA_SDA

I2CB_SCL
I2CB_SDA
I2CC_SCL
I2CC_SDA
I2CD_SCL
I2CD_SDA

I2CE_SCL
I2CE_SDA
I2CH_SCL
I2CH_SDA

I2CS_SCL
I2CS_SDA

JTAG_TCK

JTAG_TDI

JTAG_TDO
JTAG_TMS

JTAG_TRST_N

TESTMODE

XTALIN

XTALOUT

18P_0402_50V8J

18P_0402_50V8J

3

C1077

@ C1077

@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

N1
G1

NV_INVTPWM

C1

VGA_LVDDEN

M2

G7X_ENBKL

M3

GPU_VID0

K3

GPU_VID1

K2

MEM_VID

J2

VGA_THER

C2
M1
D2
D1
J3
J1
K1
F3
G3
G2

DVI_MODE1

F1

HDMI_DET1

F2

VGA_HSYNC

AD2

VGA_VSYNC

AD1

VGA_CRT_R

AE2

VGA_CRT_B

AD3

VGA_CRT_G

AE3

DACA_RSET

AE1

DACA_VREF

AF1

F7
E6
E7
F8
D6
G6

U6
U4
T5
R4
T4
V6
R6

VGA_DDCCLK

R1

VGA_DDCDATA

T3

I2CA_SCL

R2

I2CA_SDA

R3

VGA_CLK_LCD

A2

VGA_DAT_LCD

B1

I2CD_SCL

N2

I2CD_SDA

N3

I2CE_SCL

Y6

I2CE_SDA

W6

I2CH_SCL

A3

I2CH_SDA

A4

EC_SMB_CK2

T1

EC_SMB_DA2

T2

AF3

PAD

PAD

TP2

AG4
AE4
AF4
AG3
AD25

AF10
AE10

D10

E10

C616

C616

@

@

TP2

PAD

PAD

TP3

TP3

PAD

PAD

TP4

TP4

PAD

PAD

TP5

TP5

PAD

PAD

TP6

TP6

12

R1148 10K_0402_5%~DR1148 10K_0402_5%~D

1 2

R1149 200_0402_5%R 1149 200_0402_5%

1 2

R1197 0_0402_5%~D R1197 0_0402_5%~D

4

1

27MHZ_16PF_X7T027000BG1H-V~D

27MHZ_16PF_X7T027000BG1H-V~D

1

2

PAD

PAD

GPU_VID0 <45>
GPU_VID1 <45>

PAD

PAD

T150

T150

R1130 10K_0402_5%R1130 10K_0402_5%

VGA_HSYNC <16>
VGA_VSYNC <16>
VGA_CRT_R <16>
VGA_CRT_B <16>
VGA_CRT_G <16>

1 2

R1140 124_0402_1%~DR1140 124_0402_1%~D

Y5

Y5

3

GND

OUT

2

IN

GND

@

@

T145

T145

VGA_LVDDEN <16>
G7X_ENBKL <16,27>

R1131

R1131

10K_0402_5%

10K_0402_5%

THER_ALERT#

12

T148PAD~DT148PAD~D
T149PAD~DT149PAD~D

1 2

C1272

C1272

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

VGA_DDCCLK <16>
VGA_DDCDATA <16>

VGA_CLK_LCD <16>
VGA_DAT_LCD <16>

EC_SMB_CK2 <4,16,27>

EC_SMB_DA2 <4,16,27>

CLK_NV_27M <15>

R1198

R1198
0_0402_5%~D

0_0402_5%~D

@

@

1 2

1

C617

C617

18P_0402_50V8J

18P_0402_50V8J

2

@

@

For Internal Thermal
Sensor

12

VGA_THER <27>

<---CRT

<---LVDS

+3VS

+3VS

VGA_LVDSAC+<16>

VGA_LVDSAC-<16>
VGA_LVDSA0+<16>

VGA_LVDSA0-<16>

VGA_LVDSA1+<16>

VGA_LVDSA1-<16>

VGA_LVDSA2+<16>

VGA_LVDSA2-<16>

VGA_LVDSBC+<16>
VGA_LVDSBC-<16>
VGA_LVDSB0+<16>
VGA_LVDSB0-<16>
VGA_LVDSB1+<16>
VGA_LVDSB1-<16>
VGA_LVDSB2+<16>
VGA_LVDSB2-<16>

VGA_CLK_LCD

VGA_DAT_LCD

VGA_CRT_R

VGA_CRT_G

VGA_CRT_B

STRAP_CAL_PU_GND0

STRAP_CAL_PU_GND1

I2CA_SCL

I2CA_SDA

I2CD_SCL

I2CD_SDA

I2CE_SCL

I2CE_SDA

I2CH_SCL

I2CH_SDA

2

VGA_LVDSAC+
VGA_LVDSAC­VGA_LVDSA0+
VGA_LVDSA0­VGA_LVDSA1+
VGA_LVDSA1­VGA_LVDSA2+
VGA_LVDSA2-

VGA_LVDSBC+
VGA_LVDSBC­VGA_LVDSB0+
VGA_LVDSB0­VGA_LVDSB1+
VGA_LVDSB1­VGA_LVDSB2+
VGA_LVDSB2-

12

R1134 1K_0402_5%~D @R1134 1K_0402_5%~D @

1 2

R54 10K_0402_1%

R54 10K_0402_1%

R142

R142

1 2

2.2K_0402_5%

2.2K_0402_5%

R273

R273

1 2

2.2K_0402_5%

2.2K_0402_5%

CLOSE TO GPU

1 2

R1161 150_0402_5%~DR1161 150_0402_5%~D

1 2

R1162 150_0402_5%~DR1162 150_0402_5%~D

1 2

R1164 150_0402_5%~DR1164 150_0402_5%~D

1 2

R1168 40.2K_0402_1%R1168 40.2K_0402_1%

1 2

R1169 40.2K_0402_1%R1169 40.2K_0402_1%

R143 2.2K_0402_5%R143 2.2K_0402_5%

1 2

R144 2.2K_0402_5%R144 2.2K_0402_5%

1 2

R145 2.2K_0402_5%R145 2.2K_0402_5%

1 2

R147 2.2K_0402_5%R147 2.2K_0402_5%

1 2

R148 2.2K_0402_5%R148 2.2K_0402_5%

1 2

R149 2.2K_0402_5%R149 2.2K_0402_5%

1 2

R150 2.2K_0402_5%R150 2.2K_0402_5%

1 2

R151 2.2K_0402_5%R151 2.2K_0402_5%

1 2

U59C

U59C

AC4
AD4

V5

V4
AA5
AA4

W4

Y4
AB4
AB5
AB3
AB2

W1

V1

W3

W2
AA2
AA3
AB1
AA1

AB6

A7
B7
A6
B6
C6

C15
D15

J5

F6
J22
L22

AG9
AE9

AA6

AC19

E15

T6

NB9M-GS_BGA533~D

NB9M-GS_BGA533~D

+3VS

IFPA_TXC
IFPA_TXC_N
IFPA_TXD0
IFPA_TXD0_N
IFPA_TXD1
IFPA_TXD1_N
IFPA_TXD2
IFPA_TXD2_N
IFPA_TXD3
IFPA_TXD3_N
IFPB_TXC
IFPB_TXC_N
IFPB_TXD4
IFPB_TXD4_N
IFPB_TXD5
IFPB_TXD5_N
IFPB_TXD6
IFPB_TXD6_N
IFPB_TXD7
IFPB_TXD7_N

IFPAB_RSET

HDA_BCLK
HDA_SYNC
HDA_SDI
HDA_SDO
HDA_RST_N

RFU0(NC)
RFU1(NC)
RFU2(NC)
RFU3(NC)
RFU4(NC)
RFU5(NC)
RFU6(NC)
RFU7(NC)

NC0
NC1
NC2
NC3

+3VS

Part 3 of 5

Part 3 of 5

LVDS

LVDS

HDA

HDA

GENERAL

GENERAL

IFPC_AUX

IFPC_AUX_N

IFPC_L0

IFPC_L0_N

IFPC_L1

IFPC_L1_N

IFPC_L2

IFPC_L2_N

IFPC_L3

IFPC_L3_N

IFPC_RSET

IFPE_AUX

IFPE_AUX_N

IFPE_L0

IFPE_L0_N

IFPE_L1

MXM/DVI/DP

MXM/DVI/DP

IFPE_L1_N

IFPE_L2

IFPE_L2_N

IFPE_L3

IFPE_L3_N

IFPE_RSET

ROM_SCLK

ROM_SI

ROM_SO

ROMCS_N

STRAP0
STRAP1
STRAP2

STRAP_CAL_PD_3V3(NC)

STRAP_CAL_PD_MIOB(NC)

SPDIF

BUFRST_N

THERMDP

THERMDN

Strap pin define

R1142

R1142

STRAP0
STRAP1

45.3K_0402_1%~D

45.3K_0402_1%~D

STRAP2
ROM_SCLK_GPU
ROM_SI_GPU
ROM_SO_GPU

R1151

@ R1151

@

4.99K_0402_1%~D

4.99K_0402_1%~D

Each strap pin represents a 4 bit value

Pullup or Pulldown configures the MSB

Resistor Value determines the 3 LSBs

Resistor range is R*n

where n is 0-9 and R is 5K ohm.

G4
G5
P4
N4
M5
M4
L4
K4
H4
J4

R5

D3
D4
F5
F4
E4
D5
C3
C4
B3
B4

M6

C9
A10
C10
B10

C7
B9
A9
F10
F11

F9
N5

D9
D8

12

R1143

R1143

@

@

12

R1152

R1152

1

1 2

R720 1K_0402_1%~DR720 1K_0402_1%~D

1 2

R721 1K_0402_1%~D

R721 1K_0402_1%~D

ROM_SCLK_GPU
ROM_SI_GPU
ROM_SO_GPU

STRAP0
STRAP1
STRAP2
STRAP_CAL_PU_GND0
STRAP_CAL_PU_GND1

1 2

R722 1K_0402_1%~D

R722 1K_0402_1%~D

12

R1144

R1144

1 2

10K_0402_5%

10K_0402_5%

1K_0402_5%~D

1K_0402_5%~D

12

R1153

R1153

1 2

@

@

10K_0402_5%

10K_0402_5%

1K_0402_5%~D

1K_0402_5%~D

Value

3 Kohms

6 Kohms

12 Kohms

24 Kohms

48 Kohms

96 Kohms

192 Kohms

284 Kohms

2 Kohms*

@

@

D+

1

C1283

@C1283

@

2200P_0402_50V7K

2200P_0402_50V7K

2

D-

12

R1145

R1145

@

@

@

@

1K_0402_5%~D

1K_0402_5%~D

R1154

R1154

1 2

15K_0402_5%

15K_0402_5%

Multilevel T ied to GroundTied to VCCResistor

Y

Y

Y

Y

Y

Y

Y

Y

N

D+

Close to Sensor

D-

+3VS

12

R1146

R1146

R1147

R1147

1K_0402_5%~D

1K_0402_5%~D

4.99K_0402_1%~D

4.99K_0402_1%~D

12

R1155

R1155

R1156

R1156

@

@

30K_0402_5%

30K_0402_5%

1K_0402_5%~D

1K_0402_5%~D

@

@

1000

1001

1010

1011

1100

1101

1110

1111

1xxx

12

12

0000

0001

0010

0011

0100

0101

0110

0111

0xxx

+3VS

External Thermal sensor

12

R79

R79
200_0402_5%

200_0402_5%

@

@C197

@

12

D+

D-

VGA_THER

@

5

U7

U7

1

VCC

SCLK

2

DXP

SDA

3

DXN

ALERT#

4

OVERT#

GND

MAX6649MUA+T_UMAX8~D

MAX6649MUA+T_UMAX8~D

@

@

8

7

6

5

EC_SMB_CK2

EC_SMB_DA2

THER_ALERT#

NVidia

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

NVG98 PCIE,GPIO,CLK,LVDS

NVG98 PCIE,GPIO,CLK,LVDS

NVG98 PCIE,GPIO,CLK,LVDS

LA-4595P

LA-4595P

LA-4595P

1

1.0

1.0

31 49Tuesday, February 17, 2009

31 49Tuesday, February 17, 2009

31 49Tuesday, February 17, 2009

1.0

DELL CONFIDENTIAL/PROPRIETARY

A A

C197

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1bios.ru

5

4

3

2

1

FBAD[0:63]

D D

FBAD0
FBAD7
FBAD6
FBAD4
FBAD1
FBAD5
FBAD3
FBAD2
FBAD10
FBAD12
FBAD9
FBAD15
FBAD13
FBAD8
FBAD11
FBAD14

C C

B B

FBAD16
FBAD20
FBAD18
FBAD22
FBAD17
FBAD21
FBAD19
FBAD23
FBAD29
FBAD28
FBAD30
FBAD31
FBAD27
FBAD25
FBAD26
FBAD24
FBAD38
FBAD36
FBAD37
FBAD39
FBAD32
FBAD35
FBAD34
FBAD33
FBAD44
FBAD45
FBAD47
FBAD46
FBAD41
FBAD42
FBAD43
FBAD40
FBAD48
FBAD53
FBAD50
FBAD51
FBAD49
FBAD55
FBAD54
FBAD52
FBAD61
FBAD62
FBAD59
FBAD57
FBAD60
FBAD58
FBAD56
FBAD63

DQMA#[0:7]

DQSA_WP[0:7]

DQSA_RN[0:7]

U59B

U59B

D21

FBAD0

C22

FBAD1

B22

FBAD2

A22

FBAD3

C24

FBAD4

B25

FBAD5

A25

FBAD6

A26

FBAD7

D22

FBAD8

E22

FBAD9

E24

FBAD10

D24

FBAD11

D26

FBAD12

D27

FBAD13

C27

FBAD14

B27

FBAD15

D16

FBAD16

E16

FBAD17

D17

FBAD18

F18

FBAD19

D20

FBAD20

F20

FBAD21

E21

FBAD22

F21

FBAD23

C16

FBAD24

B18

FBAD25

C18

FBAD26

D18

FBAD27

C19

FBAD28

C21

FBAD29

B21

FBAD30

A21

FBAD31

P22

FBAD32

P24

FBAD33

R23

FBAD34

R24

FBAD35

T23

FBAD36

U24

FBAD37

V23

FBAD38

V24

FBAD39

N25

FBAD40

N26

FBAD41

R25

FBAD42

R26

FBAD43

T25

FBAD44

V26

FBAD45

V25

FBAD46

V27

FBAD47

V22

FBAD48

W22

FBAD49

W23

FBAD50

W24

FBAD51

AA22

FBAD52

AB23

FBAD53

AB24

FBAD54

AC24

FBAD55

W25

FBAD56

W26

FBAD57

W27

FBAD58

AA25

FBAD59

AB25

FBAD60

AB26

FBAD61

AD26

FBAD62

AD27

FBAD63

NB9M-GS_BGA533~D

NB9M-GS_BGA533~D

Part 2 of 5

Part 2 of 5

FBAD[0:63] <35>

DQMA#[0:7] <35>

DQSA_WP[0:7] < 35>

DQSA_RN[0:7] <35>

FBA_CMD0
FBA_CMD1
FBA_CMD2
FBA_CMD3
FBA_CMD4
FBA_CMD5
FBA_CMD6
FBA_CMD7
FBA_CMD8

FBA_CMD9
FBA_CMD10
FBA_CMD11
FBA_CMD12
FBA_CMD13
FBA_CMD14
FBA_CMD15
FBA_CMD16
FBA_CMD17
FBA_CMD18
FBA_CMD19
FBA_CMD20
FBA_CMD21
FBA_CMD22
FBA_CMD23
FBA_CMD24
FBA_CMD25
FBA_CMD26
FBA_CMD27
FBA_CMD28

FBADQM0
FBADQM1

MEMORY

INTERFACE

MEMORY

INTERFACE

FBADQM2
FBADQM3
FBADQM4
FBADQM5
FBADQM6
FBADQM7

FBADQS_RN0
FBADQS_RN1
FBADQS_RN2
FBADQS_RN3
FBADQS_RN4
FBADQS_RN5
FBADQS_RN6
FBADQS_RN7

FBADQS_WP0
FBADQS_WP1
FBADQS_WP2
FBADQS_WP3
FBADQS_WP4
FBADQS_WP5
FBADQS_WP6
FBADQS_WP7

FB_VREF

FBA_CLK0

FBA_CLK0_N

FBA_CLK1

FBA_CLK1_N

FBA_DEBUG

F26
J24
F25
M23
N27
M27
K26
J25
J27
G23
G26
J23
M25
K27
G25
L24
K23
K24
G22
K25
H22
M26
H24
F27
J26
G24
G27
M24
K22

D23
C26
D19
B19
T24
T26
AA23
AB27

B24
D25
E18
A18
R22
R27
Y24
AA27

A24
C25
E19
A19
T22
T27
AA24
AA26

A16

F24
F23
N24
N23
M22

FBAA4
FBARAS#
FBAA5
FBA_BA1
FBBA2
FBBA4
FBBA3

FBACS0#
FBAA11
FBACAS#
FBAWE#
FBA_BA0
FBBA5
FBAA12

FBA_RST_R

FBAA7
FBAA10
FBA_CKE
FBAA0
FBAA9
FBAA6
FBAA2
FBAA8
FBAA3
FBAA1

SNN_FBA_CMD28

DQMA#0
DQMA#1
DQMA#2
DQMA#3
DQMA#4
DQMA#5
DQMA#6
DQMA#7

DQSA_RN0
DQSA_RN1
DQSA_RN2
DQSA_RN3
DQSA_RN4
DQSA_RN5
DQSA_RN6
DQSA_RN7

DQSA_WP0
DQSA_WP1
DQSA_WP2
DQSA_WP3
DQSA_WP4
DQSA_WP5
DQSA_WP6
DQSA_WP7

FBA_VREF

FBACLK0
FBACLK0#
FBACLK1
FBACLK1#

R1174

R1174
10K_0402_5%~D

10K_0402_5%~D

FBAA[0..11]

FBBA[2..5]

FBARAS# <35>

FBA_BA1 <35>

FBACS0# <35>

FBACAS# <35>
FBAWE# <35>
FBA_BA0 <35>

FBAA12 <35>

1 2

R560 0_0402_5%R5 60 0_0402_5%

12

R563

R563
10K_0402_5%

10K_0402_5%

FBA_BA2_CMD27 FBA_BA2

T152PAD~DT152PAD~D

FBACLK0 <35>
FBACLK0# <35>
FBACLK1 <35>
FBACLK1# <35>

T153PAD~DT153PAD~D

12

+1.8VS

FBAA[0..11] <35>

FBBA[2..5] <35>

FBA_RST

12

R571

R571
10K_0402_5%

10K_0402_5%

FBA_CKE <35>

R571 & R563 Pull-down for initialization
CKE & RESET/ODT

1 2

R561 0_0402_5%R5 61 0_0402_5%

+1.8VS

10mil

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C1310

C1310

2

@

@

FBA_RST <35>

1K_0402_1%~D

1K_0402_1%~D

R1172

R1172

12

@

@

R1173

R1173

1K_0402_1%~D

1K_0402_1%~D

12

@

@

FBA_BA2 <35>

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

NVG98 Memory Interface

NVG98 Memory Interface

NVG98 Memory Interface

LA-4595P

LA-4595P

LA-4595P

1.0

1.0

32 49Tuesday, February 17, 2009

32 49Tuesday, February 17, 2009

32 49Tuesday, February 17, 2009

1

1.0

of

of

of

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

1bios.ru

5

4

3

2

1

Place near GPU

4.7U_0603_6.3V4Z~D

4.7U_0603_6.3V4Z~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

D D

+VGA_CORE

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

C1422

C1422

2

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

1

C161

C161

2

C C

+1.1V_GFX_PCIE

B B

+3VS

FB_PLLVDD = 40 mA

L102

L102

BLM18AG121SN1D_0603~D

BLM18AG121SN1D_0603~D

1 2

BLM18AG121SN1D_0603~D

BLM18AG121SN1D_0603~D

1 2

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

2

DACA VDD= 120mA

L104

L104

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+3VS

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

1

C1425

C1425

2

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C843

C843

C1369

C1369

2

0.1U_0402_10V7K~D

C1430

C1430

1

2

1 2

R49 10K_0402_5%R49 10K_0402_5%

R1176 10K_0402_5%~DR1176 10K_0402_5%~D

+FB_PLLVDD

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C1421

C1421

1

1

C1353

C1353

2

4700P_0402_25V7K~D

4700P_0402_25V7K~D

1

C1377

C1377

2

1

C1355

C1355

C1354

C1354

2

2

1

2

+DACA_VDD

470P_0402_50V7K~D

470P_0402_50V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C1379

C1379

C1378

C1378

C1372

C1372

2

2

4.7U_0603_6.3V6M~D

1

1

C1423

C1423

2

2

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

1

1

C162

C162

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C1431

C1431

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C1370

C1370

C1371

C1371

2

12

C1424

C1424

1

C180

C180

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C1432

C1432

2

+1.8VS

+DACB_VDD

+DACC_VDD

Place near Balls

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

1

C188

C188

C192

C192

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C1434

C1434

C1435

C1433

C1433

C1435

2

2

+DACA_VDD

+FB_PLLVDD

1 2

R1175 44.2_0402_1%~DR1175 44.2_0402_1%~D

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

1

1

C1436

C1436

2

2

+DACB_VDD
+DACC_VDD

FB_CAL_PD_VDDQ

C1437

C1437

U59D

U59D

J10

VDD_0

J12

VDD_1

J13

VDD_2

J9

VDD_3

L9

VDD_4

M11

VDD_5

M17

VDD_6

M9

VDD_7

N11

VDD_8

N12

VDD_9

N13

VDD_10

N14

VDD_11

N15

VDD_12

N16

VDD_13

N17

VDD_14

N19

VDD_15

N9

VDD_16

P11

VDD_17

P12

VDD_18

P13

VDD_19

P14

VDD_20

P15

VDD_21

P16

VDD_22

P17

VDD_23

R11

VDD_24

R12

VDD_25

R13

VDD_26

R14

VDD_27

R15

VDD_28

R16

VDD_29

R17

VDD_30

R9

VDD_31

T11

VDD_32

T17

VDD_33

T9

VDD_34

U19

VDD_35

U9

VDD_36

W10

VDD_37

W12

VDD_38

W13

VDD_39

W18

VDD_40

W19

VDD_41

W9

VDD_42

A12

VDD33_0

B12

VDD33_1

C12

VDD33_2

D12

VDD33_3

E12

VDD33_4

F12

VDD33_5

AG2

DACA_VDD

D7

DACB_VDD

W5

DACC_VDD

R19

FB_PLLAVDD

T19

FB_DLLAVDD

B15

FBCAL_PD_VDDQ

NB9M-GS_BGA533~D

NB9M-GS_BGA533~D

PEX_IOVDD = 500mA

PEX_IOVDDQ = 1600mA

PEX_IOVDD_0

Part 4 of 5

Part 4 of 5

PEX_IOVDD_1
PEX_IOVDD_2
PEX_IOVDD_3
PEX_IOVDD_4

PEX_IOVDD_5
PEX_IOVDDQ_0
PEX_IOVDDQ_1
PEX_IOVDDQ_2
PEX_IOVDDQ_3
PEX_IOVDDQ_4
PEX_IOVDDQ_5
PEX_IOVDDQ_6
PEX_IOVDDQ_7
PEX_IOVDDQ_8
PEX_IOVDDQ_9

PEX_IOVDDQ_10
PEX_IOVDDQ_11

PEX_PLLVDD

VDD_SENSE

FBVDDQ_0
FBVDDQ_1
FBVDDQ_2
FBVDDQ_3
FBVDDQ_4
FBVDDQ_5
FBVDDQ_6
FBVDDQ_7
FBVDDQ_8
FBVDDQ_9

FBVDDQ_10

POWER

POWER

FBVDDQ_11
FBVDDQ_12
FBVDDQ_13
FBVDDQ_14
FBVDDQ_15
FBVDDQ_16
FBVDDQ_17
FBVDDQ_18
FBVDDQ_19
FBVDDQ_20
FBVDDQ_21
FBVDDQ_22
FBVDDQ_23
FBVDDQ_24
FBVDDQ_25

IFPA_IOVDD
IFPB_IOVDD
IFPC_IOVDD
IFPE_IOVDD

IFPAB_PLLVDD

IFPC_PLLVDD
IFPE_PLLVDD

VID_PLLVDD

SP_PLLVDD

PLLVDD

AC9
AD7
AD8
AE7
AF7
AG7
AB13
AB16
AB17
AB7
AB8
AB9
AC13
AC7
AD6
AE6
AF6
AG6

AF9

W15

A13
B13
C13
D13
D14
E13
F13
F14
F15
F16
F17
F19
F22
H23
H26
J15
J16
J18
J19
L19
L23
L26
M19
N22
U22
Y22

V3
V2

J6

H6

AD5
P6
N6

K5
K6
L6

1U_0402_6.3V6K~D

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C1365

C1365

2

+IFPAB_IOVDD

+IFPE_IOVDD

+IFPAB_PLLVDD

+IFPE_PLLVDD

+GPU_PLLVDD

1

1

C1327

C1327

C1314

C1314

C1313

C1313

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

1

1

C1325

C1325

C1311

C1311

2

2

Place near Balls

+PEX_PLLVDD

NVVDD_SENSE <45>

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C1366

C1366

2

R1166

R1166

12

10K_0402_5%

10K_0402_5%

12

1

C1367

C1367

2

1

2

R1167 10K_0402_ 5%R1167 10K_0402_5%

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1312

C1312

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1368

C1368

4.7U_0603_6.3V4Z~D

4.7U_0603_6.3V4Z~D

1

C1315

C1315

C1316

C1316

2

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

1

C193

C193

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C1343

C1343

2

+1.1V_GFX_PCIE

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

22U_0805_6.3V6M

C916

C916

C917

C917

1

1

2

2

+1.1V_GFX_PCIE

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

0.47U_0402_6.3V6K

1

1

C194

C194

C195

C195

2

2

+1.8VS

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

1

C1347

C1347

C1344

C1344

2

2

2

+IFPX_IOVDD= 38 5mA

+IFPX_PLLVDD= 1 60mA

PEX_PLLVDD = 10 0mA

+PEX_PLLVDD

1

2

10 mil

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1317

C1317

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

C1318

C1318

2

4.7U_0603_6.3V4Z~D

4.7U_0603_6.3V4Z~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

1

C1319

C1319

2

2

Place near Balls Place near GPU

4.7U_0603_6.3V4Z~D

4.7U_0603_6.3V4Z~D

C1346

C1346

IFPAB_PLLVDD = 140 mA

BLM18AG121SN1D_0603~D

4700P_0402_25V7K~D

4700P_0402_25V7K~D

1

1

C1381

C1381

2

2

BLM18AG121SN1D_0603~D

470P_0402_50V7K~D

470P_0402_50V7K~D

C1388

C1388

+IFPAB_PLLVDD

IFPAB_IOVDD = 100mA

BLM18AG121SN1D_0603~D

+IFPAB_IOVDD

470P_0402_50V7K~D

470P_0402_50V7K~D

1

C1391

C1391

2

4700P_0402_25V7K~D

4700P_0402_25V7K~D

1

C1392

C1392

2

BLM18AG121SN1D_0603~D

470P_0402_50V7K~D

470P_0402_50V7K~D

1

1

C1385

C1385

2

2

4700P_0402_25V7K~D

4700P_0402_25V7K~D

GPU_PLLVDD = 140 mA

+GPU_PLLVDD

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

1

C1375

C1375

C1390

C1390

2

2

0.1U_0402_10V7K~D

1

1

C1374

C1374

2

2

+1.1V_GFX_PCIE

12

L101

L101
10NH_LQG15HS10NJ02D_5%_0402~D

10NH_LQG15HS10NJ02D_5%_0402~D

C1320

C1320

+1.8VS

L105

L105

1 2

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

C1389

C1389

2

L106

L106

1 2

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

C1387

C1387

C1386

C1386

2

1 2

L103

L103

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

BLM18AG121SN1D_0603~D

BLM18AG121SN1D_0603~D

1

C1380

C1380

C1376

C1376

2

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

C1384

C1384

2

+1.8VS

+1.1V_GFX_PCIE

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

NVG98 POWER

NVG98 POWER

NVG98 POWER

LA-4595P

LA-4595P

LA-4595P

1.0

1.0

33 49Tuesday, February 17, 2009

33 49Tuesday, February 17, 2009

33 49Tuesday, February 17, 2009

1

1.0

of

of

of

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,

NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD

PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

3

2

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

Date: Sheet

1bios.ru

5

-1.75% (DOWN)

D D

±0.875% (CENTER)

D_C Internal pull up

XTALOUTBUFF< 31>

XTALSSIN<31>

C C

B B

A A

5

12

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

12

R710

R710

@

@

12

R711

R711

@

@

AC11
AC14
AC17

AC20
AC23
AC26

AF11
AF14
AF17

AF20
AF23
AF26

D_C

0

1

0_0402_5%~D

0_0402_5%~D

R712

R712

@

@

U59E

U59E

GND_0
GND_1
GND_2

AC2

GND_3
GND_4
GND_5
GND_6

AC5

GND_7

AC8

GND_8
GND_9
GND_10
GND_11

AF2

GND_12
GND_13
GND_14
GND_15

AF5

GND_16

AF8

GND_17

B11

GND_18

B14

GND_19

B17

GND_20

B2

GND_21

B20

GND_22

B23

GND_23

B26

GND_24

B5

GND_25

B8

GND_26

E11

GND_27

E14

GND_28

E17

GND_29

E2

GND_30

E20

GND_31

E23

GND_32

E26

GND_33

E5

GND_34

E8

GND_35

H2

GND_36

H5

GND_37

J11

GND_38

J14

GND_39

J17

GND_40

K19

GND_41

K9

GND_42

L11

GND_43

L12

GND_44

L13

GND_45

L14

GND_46

L15

GND_47

NB9M-GS_BGA533~D

NB9M-GS_BGA533~D

4

U45

U45

1

XIN/CLKIN

2

VSS

3

D_C
ModOUT4REFCLK

P1819GF-08SR_SO8~D

P1819GF-08SR_SO8~D

@

@

Part 5 of 5

Part 5 of 5

4

3

L50

BLM18AG121SN1D_0603~D

+3VS

@

R708

R708

L16
L17
L2
L5
M12
M13
M14
M15
M16
P19
P2
P23
P26
P5
P9
T12
T13
T14
T15
T16
U11
U12
U13
U14
U15
U16
U17
U2
U23
U26
U5
V19
V9
W11
W14
W17
Y2
Y23
Y26
Y5

AC6

W16

A15
B16

@

12

12

R709

R709

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

10K_0402_5%~D

Close to U44 pin W16

GND_SENSE

FB_CAL_PU_GND
FB_CAL_TERM_GND

@

@

8

XOUT

7

VDD

6

PD#

5

GND_48
GND_49
GND_50
GND_51
GND_52
GND_53
GND_54
GND_55
GND_56
GND_57
GND_58
GND_59
GND_60
GND_61
GND_62
GND_63
GND_64
GND_65
GND_66
GND_67
GND_68
GND_69
GND_70
GND_71
GND_72
GND_73
GND_74
GND_75

GND

GND

GND_76
GND_77
GND_78
GND_79
GND_80
GND_81
GND_82
GND_83
GND_84
GND_85
GND_86
GND_87

RFU_GND

GND_SENSE

FBCAL_PU_GND

FBCAL_TERM_GND

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

+3VL

@

@

1

C870

C870

2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1 2

R707 0_0402_5%~DR707 0_0402_5%~D

1 2

R703 30.9_0402_1%~DR703 30.9_0402_1%~D

1 2

R702 40.2_0402_1%~DR702 40.2_0402_1%~D

3

BLM18AG121SN1D_0603~D

1 2

@

@

1

C871

C871

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

@L50

@

+3VS

1

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Num ber Rev

Size Document Num ber Rev

Size Document Num ber Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

NVG98 GND

NVG98 GND

NVG98 GND

LA-4595P

LA-4595P

LA-4595P

1.0

1.0

1.0

34 49Tuesday, February 17, 2009

34 49Tuesday, February 17, 2009

34 49Tuesday, February 17, 2009

of

of

1

of

1bios.ru

5

+1.8VS

12

R911

R911

1.05K_0402_1%

1.05K_0402_1%

12

R916

R916

2.49K_0402_1%

+1.8VS

12

12

2.49K_0402_1%

R925

R925

1.05K_0402_1%

1.05K_0402_1%

R926

R926

2.49K_0402_1%

2.49K_0402_1%

D D

C C

B B

+VREFA1

1

C949

C949

0.01U_0402_16V7K

0.01U_0402_16V7K

2

+VREFA0

+VREFB1

1

C944

C944

0.01U_0402_16V7K

0.01U_0402_16V7K

2

FBAA12< 32> FBAA12<32>

FBARAS#<32>
FBACAS#<32>
FBAWE#<32>
FBACS0#<32>

FBA_CKE<32>
FBACLK0<32> FBACLK1<32>
FBACLK0#<32>

1 2

R919 243_0402_1%R919 243_0402_1%

FBA_RST<32>

FBAA0
FBAA1
FBAA2
FBAA3
FBAA4
FBAA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10
FBAA11
FBA_BA0
FBA_BA1

DQMA#0
DQMA#2
DQMA#3
DQMA#1

DQSA_WP0
DQSA_WP2
DQSA_WP3
DQSA_WP1

+VREFA0
+VREFA1

FBAA12 FBAA12

FBARAS#
FBACAS#
FBAWE#
FBACS0#

FBA_CKE
FBACLK0
FBACLK0#

DQSA_RN0
DQSA_RN2
DQSA_RN3
DQSA_RN1

+1.8VS

FBA_RST
FBA_BA2

M12

B12

U51

U51

VSSQB1VSSQB4VSSQB9VSSQ

A0
A1
A2
A3
A4
A5
A6
A7
A8/AP
A9
A10
A11
BA0
BA1

DM0
DM1
DM2
DM3

WDQS0
WDQS1
WDQS2
WDQS3

VREF
VREF
RFU1
RFU2

RAS#
CAS#
WE#
CS#

CKE
CK
CK#

ZQ
MF

RDQS0
RDQS1
RDQS2
RDQS3

VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD

SEN
RESET
BA2

VSSA
VSSA

VSSQD1VSSQD4VSSQD9VSSQ

K4

H2

K3

M4

K9
H11
K10

L9
K11

M9

K2

L4

G4
G9

E3
E10
N10

N3

D2
D11
P11

P2

H1
H12

J2
J3

H3

F4

H9

F9

H4

J11
J10

A4
A9

D3
D10
P10

P3

A2

A11

F1

F12

M1

V2

V11

V4
V9

H10

J1

J12

4

D12

G11

L11

P12

T12

VSSQG2VSSQ

VSSQL2VSSQ

VSSQP1VSSQP4VSSQP9VSSQ

VSSQT1VSSQT4VSSQT9VSSQ

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8

DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31

VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ
VDDQ

VDDA
VDDA

VSSA3VSS

VSSG1VSS

VSSL1VSS

VSSV3VSS

K4J52324QE-BC14_FBGA136~D

K4J52324QE-BC14_FBGA136~D

L12

A10

V10

G12

FBAD1

B2

FBAD3

B3

FBAD2

C2

FBAD5

C3

FBAD7

E2

FBAD4

F3

FBAD0

F2

FBAD6

G3

FBAD16

B11

FBAD17

B10

FBAD18

C11

FBAD19

C10

FBAD20

E11

FBAD21

F10

FBAD22

F11

FBAD23

G10

FBAD27

M11

FBAD25

L10

FBAD24

N11

FBAD26

M10

FBAD31

R11

FBAD28

R10

FBAD30

T11

FBAD29

T10

FBAD10

M2

FBAD12

L3

FBAD9

N2

FBAD15

M3

FBAD8

R2

FBAD13

R3

FBAD11

T2

FBAD14

T3

A1
A12
C1
C4
C9
C12
E1
E4
E9
E12
J4
J9
N1
N4
N9
N12
R1
R4
R9
R12
V1
V12

K1
K12

C889

C889

0.1U_0402_16V4Z

0.1U_0402_16V4Z

+1.8VS

+1.8VS

1

2

+1.8VS

12

12

1

C890

C890

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

R910

R910

1.05K_0402_1%

1.05K_0402_1%

R914

R914

2.49K_0402_1%

2.49K_0402_1%

3

+VREFB0

1

C948

C948

0.01U_0402_16V7K

0.01U_0402_16V7K

2

FBACLK1#<32>

1 2

R920 243_0402_1%R920 243_0402_1%

+1.8VS

FBAA0
FBAA1
FBBA2
FBBA3
FBBA4
FBBA5
FBAA6
FBAA7
FBAA8
FBAA9
FBAA10

FBAA11

FBA_BA0
FBA_BA1

DQMA#5
DQMA#4
DQMA#6
DQMA#7

DQSA_WP5
DQSA_WP4
DQSA_WP6
DQSA_WP7

+VREFB0
+VREFB1

FBARAS#
FBACAS#
FBAWE#
FBACS0#

FBA_CKE

FBACLK1
FBACLK1#

DQSA_RN5
DQSA_RN4
DQSA_RN6
DQSA_RN7

FBA_RST
FBA_BA2

M12

2

FBAD[0..63]<32>

DQSA_RN[0:7]<32>

B12

D12

G11

L11

P12

U52

U52

VSSQB1VSSQB4VSSQB9VSSQ

VSSQD1VSSQD4VSSQD9VSSQ

VSSQG2VSSQ

K4

A0

H2

A1

K3

A2

M4

A3

K9

A4

H11

A5

K10

A6

L9

A7

K11

A8/AP

M9

A9

K2

A10

L4

A11

G4

BA0

G9

BA1

E3

DM0

E10

DM1

N10

DM2

N3

DM3

D2

WDQS0

D11

WDQS1

P11

WDQS2

P2

WDQS3

H1

VREF

H12

VREF

J2

RFU1

J3

RFU2

H3

RAS#

F4

CAS#

H9

WE#

F9

CS#

H4

CKE

J11

CK

J10

CK#

A4

ZQ

A9

MF

D3

RDQS0

D10

RDQS1

P10

RDQS2

P3

RDQS3

A2

VDD

A11

VDD

F1

VDD

F12

VDD

M1

VDD
VDD

V2

VDD

V11

VDD

V4

SEN

V9

RESET

H10

BA2

J1

VSSA

J12

VSSA

VSSQL2VSSQ

VSSA3VSS

VSSG1VSS

VSSL1VSS

L12

A10

G12

T12

VSSQP1VSSQP4VSSQP9VSSQ

VSSQT1VSSQT4VSSQT9VSSQ

B2

DQ0

B3

DQ1

C2

DQ2

C3

DQ3

E2

DQ4

F3

DQ5

F2

DQ6

G3

DQ7

B11

DQ8

B10

DQ9

C11

DQ10

C10

DQ11

E11

DQ12

F10

DQ13

F11

DQ14

G10

DQ15

M11

DQ16

L10

DQ17

N11

DQ18

M10

DQ19

R11

DQ20

R10

DQ21

T11

DQ22

T10

DQ23

M2

DQ24

L3

DQ25

N2

DQ26

M3

DQ27

R2

DQ28

R3

DQ29

T2

DQ30

T3

DQ31

A1

VDDQ

A12

VDDQ

C1

VDDQ

C4

VDDQ

C9

VDDQ

C12

VDDQ

E1

VDDQ

E4

VDDQ

E9

VDDQ

E12

VDDQ

J4

VDDQ

J9

VDDQ

N1

VDDQ

N4

VDDQ

N9

VDDQ

N12

VDDQ

R1

VDDQ

R4

VDDQ

R9

VDDQ

R12

VDDQ

V1

VDDQ

V12

VDDQ

K1

VDDA

K12

VDDA

0.1U_0402_16V4Z

0.1U_0402_16V4Z

VSSV3VSS

K4J52324QE-BC14_FBGA136~D

K4J52324QE-BC14_FBGA136~D

V10

C891

C891

FBAD40
FBAD41
FBAD42
FBAD43
FBAD44
FBAD45
FBAD46
FBAD47
FBAD35
FBAD34
FBAD32
FBAD33
FBAD39
FBAD36
FBAD37
FBAD38
FBAD51
FBAD48
FBAD53
FBAD50
FBAD52
FBAD49
FBAD54
FBAD55
FBAD59
FBAD57
FBAD61
FBAD62
FBAD60
FBAD63
FBAD56
FBAD58

+1.8VS

+1.8VS

1

2

1

C892

C892

0.1U_0402_16V4Z

0.1U_0402_16V4Z

2

DQSA_WP[0:7]<32>

DQMA#[0:7]<32>

FBAA[0..11]<32>

FBBA[2..5]<32>

FBA_BA0<32>

FBA_BA1<32>

FBA_BA2<32>

1

FBAD[0..63]

FBADQS#[0..7]

DQSA_WP[0:7]

DQMA#[0..7]

FBAA[0..11]

FBBA[2..5]

FBA_BA0

FBA_BA1

FBA_BA2

@

@

+1.8VS

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C894

C894

2

1000P_0402_50V7K

1000P_0402_50V7K

A A

5

1

C895

C895

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1

2

GDDR3 BGA MEMORY GDDR3 BGA MEMORY

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C896

C896

2

1

C897

C897

C898

C898

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C899

C899

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

4

1U_0402_6.3V4Z

1U_0402_6.3V4Z

1

1

C900

C900

2

2

FBACLK0<32> FBACLK1<32>

FBACLK0#<32>

1

C902

C902

C901

C901

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

10U_0805_10V4Z

10U_0805_10V4Z

1

C903

C903

2

22U_0805_6.3V6M

22U_0805_6.3V6M

FBACLK0#

1

2

FBACLK0

C904

C904

R613

R613
475_0402_1%~D

475_0402_1%~D

1 2

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/02/12

2007/02/12

2007/02/12

@

@

+1.8VS

1

2

1000P_0402_50V7K

1000P_0402_50V7K

FBACLK1#<32>

Compal Secret Data

Compal Secret Data

Compal Secret Data

0.01U_0402_16V7K

0.01U_0402_16V7K

1

C905

C905

C906

C906

2

FBACLK1

FBACLK1#

Deciphered Date

Deciphered Date

Deciphered Date

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C907

C907

2

0.01U_0402_16V7K

0.01U_0402_16V7K

1 2

1

C908

C908

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

R614

R614
475_0402_1%~D

475_0402_1%~D

2008/02/12

2008/02/12

2008/02/12

2

0.1U_0402_16V4Z

0.1U_0402_16V4Z

1

C909

C909

2

10U_0805_10V4Z

1U_0402_6.3V4Z

1

2

1U_0402_6.3V4Z

1

1

C910

C910

0.1U_0402_16V4Z

0.1U_0402_16V4Z

C912

C912

C911

C911

2

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Date: Sheet of

Date: Sheet

Date: Sheet

10U_0805_10V4Z

1

1

C913

C913

C914

C914

2

1U_0402_6.3V4Z

1U_0402_6.3V4Z

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

2

22U_0805_6.3V6M

22U_0805_6.3V6M

VRAM GDDR3 A

VRAM GDDR3 A

VRAM GDDR3 A

LA-4595P

LA-4595P

LA-4595P

1

1

C915

C915

2

35 49

of

35 49

of

35 49

1.0

1.0

1.0

1bios.ru

A

B

C

D

E

+5VALW to +5VS Transfer+3VALW to +3VS Transfer

C264

1

S

2

S

3

S

4

G

SYSON

+3VS+3VA LW

10U_0805_10V4Z~N

10U_0805_10V4Z~N

1

C465

C465

2

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

+3VALW

R409

R409

100K_0402_5%

100K_0402_5%

SYSON#

2

G

G

R365

R365
10K_0402_5%

10K_0402_5%

1 2

1

C256

C256

2

12

13

D

D

Q42

Q42
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

U39

U39

8

S

D

7

S

D

6

1

C278

C278

2

10U_0805_10V4Z~N

10U_0805_10V4Z~N

RUNON 5VS_GATE

D

5

D

SI4800DY_SO8

SI4800DY_SO8

1 2

R267

R267
47K_0402_5%

47K_0402_5%

S
G

1
C279

2

+B+_BIAS

12

R198

R198

330K_0402_5%

330K_0402_5%

1 1

SUSP

2

G

G

2 2

1

2

RUNON 3VS_GATE

13

D

D

Q18

Q18

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

U40

U40

8

D

7

D

6

D

5

D

C271

C271

SI4800DY_SO8

SI4800DY_SO8

10U_0805_10V4Z~N

10U_0805_10V4Z~N

1 2

R197

R197
100K_0402_5%

100K_0402_5%

SYSON<26,27,43>

1

C264

0.01U_0402_25V7K~N

0.01U_0402_25V7K~N

2

+5VS+5VALW

1
2
3
4

C279

0.01U_0402_25V7K~N

0.01U_0402_25V7K~N

1

2

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

C284

C284

1

C283

C283

10U_0805_10V4Z~N

10U_0805_10V4Z~N

2

+1.8V to +1.8VS Transfer

VGA_PWGOD#

SUSP

R665

R665

1 2

0_0402_5%@

0_0402_5%@

+B+_BIAS

1

R559

R559

C727

C727

1 2

2

10U_0805_10V4Z~N

10U_0805_10V4Z~N

47K_0402_5%

47K_0402_5%

1.8VS ON 1.8VS_GATE

1 2

R608

R608
100K_0402_5%

100K_0402_5%

13

D

D

2

G

Q48

G

Q48

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

U41

U41

8

D

7

D

6

D

5

D

SI4800DY_SO8

SI4800DY_SO8

1

C696

C696

0.01U_0402_25V7K~N

0.01U_0402_25V7K~N

2

1

S

2

S

3

S

4

G

+1.8VS+1.8V

10U_0805_10V4Z~N

10U_0805_10V4Z~N

1

C728

C728

0.1U_0402_16V4Z~N

0.1U_0402_16V4Z~N

2

4.7A

1

C697

C697

2

+5VALW

12

R340

2

G

G

R338

R338
10K_0402_5%

10K_0402_5%

1 2

+3VALW

R668

R668

2

G

G

R340

100K_0402_5%

100K_0402_5%

13

D

D

Q32

Q32
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

12

13

D

D

Q49

Q49
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

R647

R647

R646

R646

VGA Discharge circuit

2

G

G

Discharge circuit-1

+1.8VS_CB

R536

@ R536

@

470_0603_5%

470_0603_5%

1 2

13

D

2

G

G

D

Q50

Q50
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

S

S

@

@

SUSP

B

+1.8V

R133

@ R133

@

470_0603_5%

470_0603_5%

1 2

13

D

SYSON#

D

2

G

G

Q12

Q12

S

S

@

@

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

C

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

470_0603_5%

470_0603_5%

1 2
13

D

D

Q61

Q61

S

S

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

SUSP

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

+0.9VS

1 2

13

D

D

2

G

G

S

S

SUSPSUSP

2

G

G

R351

@ R351

@

470_0603_5%

470_0603_5%

Q33

Q33

@

@

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

D

470_0603_5%

470_0603_5%

1 2

13

D

D

Q62

Q62

S

S

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

+5VS

R391

@ R391

@

470_0603_5%

470_0603_5%

1 2

13

D

SUSP SUSPSUSP

D

2

G

G

S

S

Q39

Q39

@

@

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

Date: Sheet

VGA_PWGOD#

+3VS

1 2

13

2

G

G

DC/DC Circuits

DC/DC Circuits

DC/DC Circuits

LA-4595P

LA-4595P

LA-4595P

3 3

R551

R551

100K_0402_5%

100K_0402_5%

VGA_PWGOD

SUSP

SUSP#

+5VALW

12

100K_0402_5%

100K_0402_5%

VGA_PWGOD#

SUSP<30,46>

SUSP#<26,27,30,42,44,46>

4 4

VGA_PWGOD<45>

SYSON -> SUSP# -> VGA_ON->VGA_PWGOD

A

+1.8VS+1.1V_GFX_PCIE +VGA_CORE

R609

R609

470_0603_5%

470_0603_5%

1 2

13

D

D

2

G

G

Q65

Q65

S

S

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

+1.5VS

R383

R383
39_0603_5%

39_0603_5%

D

D

Q38

Q38

S

S

SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

1 2

13

D

D

2

G

G

S

S

R382
470_0603_5%

470_0603_5%

Q37

Q37
SSM3K7002FU_SC70-3

SSM3K7002FU_SC70-3

Compal Electronics, Inc.

E

@ R382

@

@

@

1.0

1.0

1.0

of

of

of

36 49Tuesday, February 17, 2009

36 49Tuesday, February 17, 2009

36 49Tuesday, February 17, 2009

1bios.ru

A

KAL80 POWER UP SEQUENCE

KAL80 POWER UP SEQUENCE

KAL80 POWER UP SEQUENCEKAL80 POWER UP SEQUENCE

ACIN/BATT-IN

51ON#
(only BATT-IN)

5VALW/3VALW

RSMRST#

Suspend Clock ( 32KHz)
ICH9 internal clock

This signal is
asserted high w hen

A A

both SLP_S3# an d
VRMPWRGD are hi gh

SUSCLK

ON/OFF#

EC_ON

PWRBTN_OUT#

SYSON#

1.8V

SLP_S5#

SLP_S4#

SLP_S3#

+1.5VS

+0.9VS

CPU_CORE

CK_PWRGD

CLK_MCH_BCLK

ICH_PWROK

PCI_RST#

H_PWRGOOD

H_RESET#

SUSP#

+5VS

+3VS

VCCP

VR_ON

VGATE

126ms

← →

644ms

→←

864us

1.59ms

←→

←

244ms

→←

360ms

→

←→

→←

←

2.74ms

250ms

→←

←

30.6us

→

3.88s

30us

→←

→

888us

→

←

104us

112us

←→

→←

2.02ms

→←

1.46ms

←→

24.1ms

← →

1.20ms

←

→

5.26ms

→

←

1.03ns

←→

114ms

← →

1.20ms

←→

1.06ms

→

←

2.20ms

→←

Title

Title

Title

Power Sequence

Power Sequence

Power Sequence

Size D ocument Number Rev

Size D ocument Number Rev

Size D ocument Number Rev

LA-4595P 1.0

Custom

LA-4595P 1.0

Custom

LA-4595P 1.0

Custom

Date: Sheet

Date: Sheet of

A

Date: Sheet of

of

37 4 9Tuesday, February 17, 200 9

37 4 9Tuesday, February 17, 200 9

37 4 9Tuesday, February 17, 200 9

1bios.ru

5

Request

Request

Item

Item Issue Description

ItemItem

D D

C C

B B

Page# Title

Page#Page#

1

2

3 R405 POP

4 U50 unPOP & R1190 POP

5 WWAN move to PORT6 BIOS

6 Add C1391 & C1392 12/02 NVidia LVDS single channel issue Short U59.V2 & U59.V3. Add C1391 C1392 for IFPB_IOVDD

7 Swap JSPK1 Pin 12/02 EE

8 R101 12/04 EE Change to 0805

9 TPM Con 12/04 EE Modify to Con

10 R76 & R78 UnPOP 12/09 EE EC update to Rev:C1

11 Q7 & Q9 12/09 EE Update Q7 & 9 footprint

12 R658 & R281 12/11 EE R685 UnPOP & R281 UnPOP for wake on LAN

13 U89 & WLANPW_DIS#

14 C1484 & C1485

15 Update PW schematic 12/12

16 C260 & C252 12/15PWEE IDT ask UnPop

17 Add D29 D28 12/15 ESD ESD for LAN

18 U9 Pop & U10 UnPop 12/15 ME

19 Wake On WLAN EE Modify WLANPW_DIS# circuit

20 Add T49 & T53

21 C696 12/16 EE Update PN

22 WLANPW_DIS# 12/17 EE Move WLANPW_DIS# to EC-GPIO40 and Del BTOP_ON

23 L42 & L43 12/17 EMI L42 & L43 update to Bead from 0 ohm

24 C3 C4 C6 C14 C17 12/17 EMI POP 100 P

25 R69 12/17 EE Update to Bead drom 100 ohm

26 Cap 12/17 EMI Add C1469 C1470 C1471 C1472 C1481 R81

27 D21 D12 D17 12/17 ESD ESD ask POP

28 12/17 PWUpdate PW schematic

29 Update Q128 Q130 PN 12/18 EE

30 Update Board ID 12/18 EE R231

31 Add U16 for OZ888 12/18 EE

32 C1323 POP 12/18 EE For Kepart

33 R1421 UnPOP 12/22 EE

34 C292 C297 12/22 EE Modify to 22P form 18P (Crystal Vendor)

35 C1745 C1749 12/22 EE Modify to 18P form 10P(C1749) and 15P from 10P(C1745)(Crystal Vendor)

36 C1211 12/22 EE Modify to 12P form 15P (Crystal Vendor)

37 R1423 & R1422 01/07 EE Add for O2

38 L6 & R1190 01/10 EE Change to 0805

39 Modify LDO to +5VS 01/12 EE

40 Add C80 & D59 & D60 01/12 EE

41 Add components of JHP1 01/13 EE For vendor

42 Update R360 & R361 to 56 ohm01/19R360 & R361 EE

43 U37 01/19 EE Update U37 to SA00001KN10

44 R231 01/19 EE Update Board ID

Swap SW1

Update JUSBP3 pin define

Title

TitleTitle

Date

DateDate

12/02

12/02

12/02

12/02

12/02

12/11

12/11EEEE

12/16

12/16 Layout

RequestRequest
Owner

Owner

OwnerOwner

EE

EE

EE

EE

4

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Issue DescriptionDate

Issue DescriptionIssue Description

Add U89 for wake on LAN. Add WLANPW_DIS# of EC

C1484 & C1485 modify to 1U form LAN vendor

3

Page 1/1

Page 1/1

Page 1/1Page 1/1

2

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

1

Rev.Page#

Rev.Rev.

A A

Security Classification

Security Classification

5

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

EEW PIR-1

EEW PIR-1

EEW PIR-1

LA-4595P

LA-4595P

LA-4595P

1

1.0

1.0

1.0

of

of

of

38 49Tuesday, February 17, 2009

38 49Tuesday, February 17, 2009

38 49Tuesday, February 17, 2009

1bios.ru

5

PL16

PL16

FBM-L11-160808-601LMT 0603~D

PJPDC1

PJPDC1
TYCO_1566065-2~D

TYCO_1566065-2~D

9

GND_4

8

GND_3

7

BATT+

51ON#<28>

GND_2

6

GND_1

MH1

MH2

@

@

D D

C C

1

Low_PWR

2

DC+_1

3

DC+_2

4

DC-_1

5

DC-_2

PD4

PD4

2 1

CH751H-40PT_SOD323-2

CH751H-40PT_SOD323-2

CHGRTCP

12

PR205

PR205

100K_0402_5%~D

100K_0402_5%~D

PR206

PR206

22K_0402_1%~D

22K_0402_1%~D

1 2

FBM-L11-160808-601LMT 0603~D

PJP1

PJP1
JUMP_43X118@

JUMP_43X118@

112

12

PC164

PC164

0.22U_1206_25V7K~D

0.22U_1206_25V7K~D

12

12

2

2

DOCK_PSID

PC313

PC313

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

PQ50

PQ50

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

13

32.8

32.8

12

PC311

PC311

VIN

1 2
12

68_1206_5%

68_1206_5%

12

100P_0402_50V8J~D

100P_0402_50V8J~D

RLS4148_LL34-2

RLS4148_LL34-2

PR203

PR203

4

12

12

PC312

PC312

1000P_0402_50V7K~D

1000P_0402_50V7K~D

PD3

PD3

12

PR204

PR204

68_1206_5%

68_1206_5%

PC165

PC165

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

3

ADPIN

12

12

PC158

PC158

PC314

PC314

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D
100P_0402_50V8J~D

100P_0402_50V8J~D

SMB3025500YA_2P

SMB3025500YA_2P

PC157

PC157

1000P_0402_50V7K~D

1000P_0402_50V7K~D

PL17

PL17

1 2

12

PC160

PC160

100P_0402_50V8J~D

100P_0402_50V8J~D

VIN

12

PC159

PC159

1000P_0402_50V7K~D

1000P_0402_50V7K~D

@

@

PC162

PC162

.1U_0402_16V7K~D

.1U_0402_16V7K~D

VIN

12

PR190

@ P R190

@

82.5K_0402_1%~D

82.5K_0402_1%~D

PR193

PR193
22K_0402_1%~D@

22K_0402_1%~D@

1 2

@

@

12

PR194

PR194

19.6K_0402_1%~D

19.6K_0402_1%~D

+

-

8

@

@

PU12B

PU12B

P

O

G

LM393DR_SO8

LM393DR_SO8

4

12

@

@

PC163

PC163
1000P_0402_50V7K~D

1000P_0402_50V7K~D

7

12

5

6

2

PR189

PR189
1M_0402_1%~D@

1M_0402_1%~D@

1 2

VS

@

@

N40N41

3

+

N35

2

-

PR198

@ PR198

@

10K_0402_5%~D

10K_0402_5%~D

12

Vin Detector

PC161

PC161

8

PU12A

PU12A

P

O

G

LM393DR_SO8

LM393DR_SO8

4

@

@

12

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

1

RLZ4.3B_LL34

RLZ4.3B_LL34

RTCVREF

3.3V

PD1

PD1

1

VIN

12

PR191

PR191
10K_0402_5%~D@

10K_0402_5%~D@

12

@

@

PR192

@PR192

@

1K_0402_5%~D

1K_0402_5%~D

1 2

12

@

@

PR195

PR195
10K_0402_5%~D

10K_0402_5%~D

ACIN <19,27,40>

Max. typ. Min.

VS

L-->H 18.234 17.841 17.449
H-->L 17.597 17.210 16.813

2

+1.5VSP

+0.9VSP

+VCCPP

12

PR207

PR207
200_0805_5%

200_0805_5%

12

PC167

PC167
1U_0805_25V4Z~D

1U_0805_25V4Z~D

PJP4

PJP4
JUMP_43X118@

JUMP_43X118@

112

PJP6

PJP6
JUMP_43X118@

JUMP_43X118@

112

PJP8

PJP8
JUMP_43X118@

JUMP_43X118@

112

PJP10

PJP10
JUMP_43X118@

JUMP_43X118@

112

PJP12

PJP12
JUMP_43X118@

JUMP_43X118@

112

PJP14

PJP14
JUMP_43X118@

JUMP_43X118@

112

+3VALWP+5VALWP

2

PR212

PR212

3

PD5

PD5

DA204U_SOT323

DA204U_SOT323

1

+5VALWP

12

PR209

PR209

1 2

2.2K_0402_5%~D

2.2K_0402_5%~D

+5VALWP

2

3

PD6

PD6

PR214

PR214

@

@

DA204U_SOT323

DA204U_SOT323

10K_0402_1%~D

10K_0402_1%~D

PR216

PR216

1 2

10K_0402_1%~D@

10K_0402_1%~D@

Title

Title

Title

DCIN / Vin Detector

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet

Date: Sheet

LA-4595P

LA-4595P

LA-4595P

1

PS_ID <27>

PSID_DISABLE# <27>

1

of

of

39 49Tuesday, February 17, 2009

39 49Tuesday, February 17, 2009

39 49Tuesday, February 17, 2009

1.0Custom

1.0Custom

1.0Custom

PR208

@ PR208

@

1 2

0_0402_5%~D

0_0402_5%~D

33_0402_5%~D

PQ53

PQ53

D

DOCK_PSID

PR213

2

+1.5VS

2

+0.9VS

2

+VCCP

2

2

+VGA_CORE

2

4

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2

1

3

PR213

3

PD7

PD7
SM24_SOT23

SM24_SOT23

100K_0402_1%~D

100K_0402_1%~D

@

@

PR215

PR215

15K_0402_1%~D

15K_0402_1%~D

2006/10/1 2007/5/01

2006/10/1 2007/5/01

2006/10/1 2007/5/01

1 2

1 2

Compal Secret Data

Compal Secret Data

Compal Secret Data

FDV301N_NL_SOT23-3~D

FDV301N_NL_SOT23-3~D

Deciphered Date

Deciphered Date

Deciphered Date

D

1 3

2

B

B

E

E

33_0402_5%~D

S

S

1 2

G

G

2

C

C

PQ54

PQ54

MMST3904-7-F_SOT323-3

MMST3904-7-F_SOT323-3

3 1

2

PJP2

PJP2
JUMP_43X118@

JUMP_43X118@

112

PJP3

PJP3
JUMP_43X118@

JUMP_43X118@

112

PJP5

PJP5
JUMP_43X118@

JUMP_43X118@

112

PJP7

PJP7
JUMP_43X118@

JUMP_43X118@

112

PJP9

PJP9
JUMP_43X118@

JUMP_43X118@

112

PJP11

PJP11
JUMP_43X118@

JUMP_43X118@

112

5

RTCVREF

12

PC166

PC166

2

2

2

2

2

2

APL5156-33DI-TRL_SOT89-3

APL5156-33DI-TRL_SOT89-3

PU14

PU14

3

VOUT

GND

1

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

+1.1V_GFX_PCIE

+5VALW

+3VALW

+1.8V

VIN

+VGA_COREP

3.3V

B B

+1.1V_GFX_PCIEP

+5VALWP

A A

+3VALWP

+1.8VP

1bios.ru

A

B

C

D

E

PQ56

PQ55

VIN

12

PR339

1 1

PR339

3.3_1210_5%~D

3.3_1210_5%~D

12

PR272

PR272

3.3_1210_5%~D

3.3_1210_5%~D

PC169

PC169

2.2U_0805_25V6K

2.2U_0805_25V6K

1 2

PC170

PC170

0.01U_0603_50V7K~D

0.01U_0603_50V7K~D

1 2

90W adapter

Icharge=(Vsrset/Vvdac)*(0.1/PR34)=3.34A

Iadapter=(Vacset/Vvdac)*(0.1/PR217)=4.27A

Input OVP : 22.3V

2 2

Input UVP : 16.98V

Fsw : 300KHz

VREF

D

D

S

S

1 2

13

PR229

PR229
47K_0402_1%~D

47K_0402_1%~D

GND

CELLS

VREF

CELLS

2

G

G

PQ61

PQ61
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

3 Cell

4 Cell

ACGOOD#

3cell/4cell# <48>

Cells selector

3 3

CHGVADJ<27>

FDS4435BZ_SO8

FDS4435BZ_SO8

8
7
6
5

1 2

1 2

PR226

PR226
340K_0402_1%~D

340K_0402_1%~D

1 2

OVPSET

PR227

PR227

54.9K_0402_1%

54.9K_0402_1%

1 2

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR53

PR53

210K_0402_1%~D

210K_0402_1%~D

1 2

PQ55

S

D

S

D

S

D

G

D

PR221

PR221
340K_0402_1%~D

340K_0402_1%~D

ACDET

PR223

PR223

54.9K_0402_1%

54.9K_0402_1%

SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

PR228

PR228

100K_0402_1%~D

100K_0402_1%~D

1 2

PC189

PC189

REGN

1
2
3
4

1 2

GATE

12

12

PR51

PR51
0_0402_5%~D@

0_0402_5%~D@

VADJ

12

PR54

PR54
499K_0402_1%~D

499K_0402_1%~D

PC174

PC174

+3VALW

CP setting

2

ACSET

CHGVADJ=9.3755*(charger voltage per cell - 4)

PR235

PR235

1 2

+B+

100_0805_5%~D

100_0805_5%~D

+5VALW

PR236

PR236

1 2

12

470K_0402_5%~D

PD9

PD9

PR238

PR238

1 2

32.8

32.8

220K_0402_5%

220K_0402_5%

4 4

12

PR239

PR239

PC194

PC194

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

470K_0402_5%~D

PQ64

PQ64

2

1SS355_SOD323-2

1SS355_SOD323-2

G

G

1 2

220K_0402_5%

220K_0402_5%

A

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

13

32.8

32.8

2

13

D

D

RHU002N06_SOT323

RHU002N06_SOT323

S

S

PQ63

PQ63

PC193

PC193

1 2

0.1U_0805_25V7M~D

0.1U_0805_25V7M~D

+B+_BIAS

100K_0402_1%~D

100K_0402_1%~D

ACOFF

1 2

PC362

PC362

.1U_0402_16V7K~D

.1U_0402_16V7K~D

PR396

PR396

VREF

FDS4435BZ_SO8

FDS4435BZ_SO8

1
2
3
4

12

PR219

PR219

100K_0402_1%~D

100K_0402_1%~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

56.2K_0402_1%

56.2K_0402_1%

1 2

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

@

@

PQ60

PQ60

1 3

VREF

12

2

G

G

12

PR397

PR397

340K_0402_1%~D

340K_0402_1%~D

B

PQ56

8

S

D

7

S

D

6

S

D

5

G

D

12

PC178

PC178

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR224

PR224

12

PC182

PC182

1U_0603_10V6K~D

1U_0603_10V6K~D

+3VALW

0_0402_5%~D

0_0402_5%~D

CHGVADJ Pre Cell

3.282V 4.35V

0V 4V

PR53 = 210K

CHGVADJ

12

PR395

PR395
200K_0402_1%~D

200K_0402_1%~D

2

G

G

13

D

D

PQ90

PQ90
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

PR217

PR217

0.015_2512_1%

0.015_2512_1%

1

2

PC175

PC175

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1 2

ACSET

12

PR225

PR225
100K_0402_1%~D

100K_0402_1%~D

1 2

0.47U_0603_16V7K~N

0.47U_0603_16V7K~N

VREF

12

PC188

PC188

1 2

PR371

PR371

/BATDRV

要要要

EC DA pin

GATE

13

D

D

PQ89

PQ89
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

4

3

PU15

PU15

CHGEN#

1

CHGEN

12

PC176

PC176

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

2

ACN

3

ACP

4

ACDRV

5

ACDET

6

ACSET

7

ACOP

PC184

PC184

8

OVPSET

9

AGND

10

12

VREF

PR370

PR370
0_0402_5%~D@

0_0402_5%~D@

11

VDAC

VADJ

12

VADJ

13

ACGOOD

14

BATDRV

BQ24751ARHDR_QFN28_5X5

BQ24751ARHDR_QFN28_5X5

RTCVREF

BAT54CW_SOT323~D

BAT54CW_SOT323~D

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

PD2

PD2

27.4

27.4

ADP_I<27>

2

PVCC

BTST

HIDRV

PH

REGN

LODRV

PGND

LEARN

CELLS

SRP

SRN

BAT

TP

SRSET

IADAPT

+COINCELL

12

Z4012

3

1

C

28

27

26

25

24

23

22

21

20

19

18

17

29

16

15

100P_0402_50V8J~D

100P_0402_50V8J~D

PR1

PR1
1K_0402_5%~D

1K_0402_5%~D

+B+

PJP15

0.1U_0805_25V7K

0.1U_0805_25V7K

1 2

PR220

PR220

2.2_0603_5%~D

2.2_0603_5%~D

1 2

DH_CHG

LX_CHG

PD8

PD8

RLS4148_LL34-2

RLS4148_LL34-2

REGN

12

PC183

PC183

1U_0603_10V6K~D

1U_0603_10V6K~D

DL_CHG

CELLS

12

PC190

PC190

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PJP15

2

JUMP_43X118@

JUMP_43X118@

PC177

PC177

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

FDS6690AS_NL_SO8

FDS6690AS_NL_SO8

ACOFF <27>

112

FDS8884_SO8

FDS8884_SO8

1 2

PC179

PC179

PQ57

PQ57

PQ59

PQ59

578

3 6

578

3 6

CHG_B+

PC1714.7U_1206_25V6K~D PC1714.7U_1206_25V6K~D

1 2

241

10UH_SIL1045RA-100PF_4.5A_30%

10UH_SIL1045RA-100PF_4.5A_30%

1 2

@

@

12

PR394

PR394

12

@

@

241

PC361

PC361

ICHG setting

PR231

PR231

12

49.9K_0402_1%~D

49.9K_0402_1%~D

12

PC191

PC191

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

@

@

IREF Current

1 2

PR233

PR233

10_0603_5%~D

10_0603_5%~D

PC192

PC192

12

12

PR234

PR234
100K_0402_1%~D

100K_0402_1%~D

2.968V 3A

COIN RTC Battery

PJP24

PJP24

+RTCVCC

1

PC1

PC1
1U_0603_10V4Z~D

1U_0603_10V4Z~D

2

2006/10/1 2007/5/01

2006/10/1 2007/5/01

2006/10/1 2007/5/01

+COINCELL

Compal Secret Data

Compal Secret Data

Compal Secret Data

1

+

SUYIN_060003FA002G201NL~D

SUYIN_060003FA002G201NL~D

Deciphered Date

Deciphered Date

Deciphered Date

@

@

D

12

PL18

PL18

4.7_1206_5%~D

4.7_1206_5%~D

680P_0603_50V7K~D

680P_0603_50V7K~D

PC3151000P_0402_50V7K~ D PC3151000P_0402_50V7K~D

1 2

IREF <27>

2

-

PC3161000P_0402_50V7K~ D PC3161000P_0402_50V7K~D

PC1724.7U_1206_25V6K~D PC1724.7U_1206_25V6K~D

12

PC180

PC180

1 2

10U_1206_25V6M~D

10U_1206_25V6M~D

12

PC186

PC186

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

PC168

PC168

PC1734.7U_1206_25V6K~D PC1734.7U_1206_25V6K~D

1 2

/BATDRV

PR222

PR222

0.02_2512_1%

0.02_2512_1%

1

2

PC185

PC185

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1 2

100K_0402_1%~D

100K_0402_1%~D

ACGOOD#

FSTCHG<27>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

B

B

B

Date: Sheet

Date: Sheet

Date: Sheet

12

PR218

PR218
100K_0402_1%~D

100K_0402_1%~D

1 2

3

4

S1S2S

G

D8D7D6D

5

4

3

12

PC187

PC187

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

RTCVREF

PR230

PR230

VREF

12

Charger/RTC BATTERY

Charger/RTC BATTERY

Charger/RTC BATTERY

Charger/RTC BATTERY

Charger/RTC BATTERY

Charger/RTC BATTERY

Charger/RTC BATTERYCharger/RTC BATTERY

Charger/RTC BATTERYCharger/RTC BATTERY

Charger/RTC BATTERYCharger/RTC BATTERY

PR232

PR232
100K_0402_1%~D

100K_0402_1%~D

1 2

13

D

D

PQ62

PQ62

2

G

G

SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

VREF

PR237

PR237
100K_0402_1%~D

100K_0402_1%~D

1 2

CHGEN#

13

D

D

PQ65

PQ65

2

G

G

SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

KML50

KML50

KML50KML50

E

PQ58

PQ58
FDS4435BZ_SO8

FDS4435BZ_SO8

12

PC181

PC181

10U_1206_25V6M~D

10U_1206_25V6M~D

BATT+

12

ACIN <19,27,39>

PC223

PC223

10U_1206_25V6M~D

10U_1206_25V6M~D

@

@

1.0

1.0

1.0

of

of

of

40 49Tuesday, February 17, 2009

40 49Tuesday, February 17, 2009

40 49Tuesday, February 17, 2009

1bios.ru

5

4

3

2

1

+B+

PJP20

PJP20
JUMP_43 X118@

JUMP_43 X118@

2

112

D D

+3VALWP

1

+

+

PC204

PC204

330U_D3 L_6.3VM_R25M

330U_D3 L_6.3VM_R25M

C C

2

12

PC215

PC215

PC195

PC195

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

3.3UH_11 64AY-3R3N-P3_7.5A_ 30%

3.3UH_11 64AY-3R3N-P3_7.5A_ 30%

PR244

PR244

0_0402_5%~D

0_0402_5%~D

1 2

PR247

PR247

10K_0402_1%~D

10K_0402_1%~D

1 2

@

@

12

PC196

PC196

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D

PL20

PL20

1 2

12

12

PC197

PC197

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D
2200P_0402_50V7K~D

2200P_0402_50V7K~D

PR241

PR241

4.7_1206_5%~D

4.7_1206_5%~D

PC206

PC206

680P_0603_50V8J~D

680P_0603_50V8J~D

Rds(on) = 18m ohm(max) ; Rds(on) = 15m ohm(typical)

3.3VALWP
Imax=6A

VS

PD10

PD10

RLZ5.1B_ LL34

RLZ5.1B_ LL34

1 2

Iocp=8.94A

B B

MAINPW ON<48>

2

1 3

PD16

PD16

1 2

1SS355T E-17_SOD323-2

A A

1SS355T E-17_SOD323-2

TPS51427_B+

12

12

PR251

PR251

100K_04 02_1%~D

100K_04 02_1%~D

1 2

PQ74

PQ74

TP0610K -T1-E3_SOT23-3

TP0610K -T1-E3_SOT23-3

3 6

241

3 6

241

578

PQ66

PQ66

AO4466_ SO8

AO4466_ SO8

578

PQ68

PQ68
AO4712_ SO8

AO4712_ SO8

PR252

PR252

1 2

200K_0402_5%~D

200K_0402_5%~D

PR259

PR259

0_0402_ 5%~D

0_0402_ 5%~D

PC205

PC205

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

1 2

PC212

PC212

0.22U_06 03_25V7K~D

0.22U_06 03_25V7K~D

1 2

VL

PR257

PR257

1 2

806K_0603_1%~D

806K_0603_1%~D

12

12

PC213

PC213

PR240

PR240

0_0805_ 5%~D

0_0805_ 5%~D

1 2

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

PR243

PR243

BST3A BST5 A

12

2.2_0603 _5%~D

2.2_0603 _5%~D

LX3

DL3

FB3

VL

2VREF_TPS51427

1 2

PC211 0 .22U_0603_10V 7K~DPC211 0.22 U_0603_10V7K~ D

PR254

@P R254

@

0_0402_ 5%~D

0_0402_ 5%~D

PR260

PR260

47K_040 2_5%~D@

47K_040 2_5%~D@

1 2

0.047U_0603_16V7K~D

0.047U_0603_16V7K~D

1 2

12

PC214

PC214

@

@

0.047U_0402_16V7K~D

0.047U_0402_16V7K~D

PC201

PC201

1 2

2VREF_TPS51427

PR256

PR256

33

26

24

25

23

30

32

1

8

20

4

14

27

0_0402_5%~D

0_0402_5%~D

1 2

PU16

PU16

TP

DRVH2

VBST2

LL2

DRVL2

VOUT2

REFIN2

VREF2

LDOREFIN

NC

EN_LDO

EN1

EN2

PC308

PC308

6

5

12

VIN

VREF3

1 2

PC202

PC202

1U_0603_10V6K~D

1U_0603_10V6K~D

3

V5FILT

TONSE

2

12

PR258

PR258

@

@

0_0402_ 5%~D

0_0402_ 5%~D

VL

12

PC203

PC203

7

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

19

LDO

V5DRV

DRVH1

VBST1

LL1

DRVL1

PGND

VOUT1

FB1

VSW

SKIPSEL

PGOOD2

PGOOD1

TRIP1

TRIP2

GND

SN08060 81RHBR_QFN32 _5X5

SN08060 81RHBR_QFN32 _5X5

21

DH5DH3

15

17

LX5

16

DL5

18

22

10

FB5

11

9

29

28

13

TRIP1

12

TRIP2

31

AO4466_ SO8

AO4466_ SO8

PC207

PC207

1U_0603 _10V6K~D

1U_0603 _10V6K~D

1 2

PR245

PR245

2.2_0603 _5%~D

2.2_0603 _5%~D

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

PR249 0_0402_5 %~D@ PR249 0_040 2_5%~D@

PR250 0_0402_5 %~DPR 250 0 _0402_5%~D

1 2

12

AO4712_ SO8

AO4712_ SO8

PC208

PC208

1 2

12

PR253

PR253

309K_04 02_1%

309K_04 02_1%

PR255

PR255

309K_04 02_1%

309K_04 02_1%

Rds(on) = 18m ohm(max) ; Rds(on) = 15m ohm(typical)

578

PQ67

PQ67

3 6

241

578

PQ69

PQ69

PR242

PR242

3 6

241

VL

POK <19>

12

12

5VALWP
Imax=6A

Iocp=8.81A

1U_0603_10V6K~D

1U_0603_10V6K~D

2VREF_TPS51427

TPS51427_B+

12

12

PC200

PC200

PC199

PC199

PC198

PC198

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D

PL21

PL21

3.3UH_11 64AY-3R3N-P3_7.5A_ 30%

3.3UH_11 64AY-3R3N-P3_7.5A_ 30%

12

4.7_1206_5%~D

4.7_1206_5%~D

12

PC209

PC209

680P_0603_50V8J~D

680P_0603_50V8J~D

12

12

12

PC216

PC216

2200P_0402_50V7K~D

2200P_0402_50V7K~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

+5VALWP

1

+

+

PC210

PR246

PR246

1 2

61.9K_0402_1%~D

61.9K_0402_1%~D

PR248

PR248

1 2

10K_0402_1%~D

10K_0402_1%~D

PC210
330U_D3 L_6.3VM_R25M

330U_D3 L_6.3VM_R25M

2

Security Class ification

Security Class ification

Security Class ification

2006/10/ 1 2007/05/ 30

2006/10/ 1 2007/05/ 30

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2006/10/ 1 2007/05/ 30

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

+3VALWP, +5VALWP

+3VALWP, +5VALWP

+3VALWP, +5VALWP+3VALWP, +5VALWP

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

LA-4595P

LA-4595P

LA-4595P

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Tuesday, February 17, 2009

1

41 49

41 49

41 49

of

of

of

1.0Custom

1.0Custom

1.0Custom

1bios.ru

5

D D

C C

4

3

VCCPP_B ++

2

PJP25

PJP25

12

JUMP_43 X118

JUMP_43 X118

@

@

12

12

12

12

PC218

PC218

PC318

PC318

PC317

PC217

PC217

2200P_0402_50V7K~D

2200P_0402_50V7K~D

PC317

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1

+B+

PR340

PR340

267K_04 02_1%~D

267K_04 02_1%~D

EN_VCCP

PU23

PU23

TON

VOUT

V5FILT

VFB

PGOOD

1 2

1

EN_PSV

GND7PGND

BST_VCC P

1 2

2.2_0603 _5%~D

2.2_0603 _5%~D

14

15

TP

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

TPS5111 7RGYR_QFN14_3.5x3.5

TPS5111 7RGYR_QFN14_3.5x3.5

8

PR342

PR342

UG_VCCP

LX_VCCP

TRIP_VCCP

V5DRV_V CCP

LG_VCCP

PC319

PC319

1 2

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

PR347

PR347

1 2

10.2K_04 02_1%~D

10.2K_04 02_1%~D

+5VALW

12

PR345

PR345
0_0603_ 5%~D

0_0603_ 5%~D

12

PC325

PC325

4.7U_080 5_10V6K~D

4.7U_080 5_10V6K~D

FDS6676 AS_SO8

FDS6676 AS_SO8

PR341

PR341

0_0402_ 5%~D

0_0402_ 5%~D

SUSP#<26,27,30,36,44,46>

PR344

PR344
300_060 3_5%~D

300_060 3_5%~D

+5VALW

B B

A A

1 2

12

PR343

PR343

30.1K_04 02_1%~D

30.1K_04 02_1%~D

12

PC324

PC324

1U_0603 _10V6K~D

1U_0603 _10V6K~D

21.5K_04 02_1%~D

21.5K_04 02_1%~D

12

PC320

PC320

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

@

@

12

PR349

PR349

12

PC326

PC326

47P_040 2_50V8J~D

47P_040 2_50V8J~D

12

@

@

12

PR348

PR348

8.66K_04 02_1%~D

8.66K_04 02_1%~D

TON_VCC P

V5FILT_VC CP

FB_VCCP

2

3

4

5

6

PQ80

PQ80

578

3 6

5

4

241

PQ79

PQ79

FDS8884 _SO8

FDS8884 _SO8

D8D7D6D

S1S2S3G

PL29

PL29

1UH_FDU E1040D-1R0M-P3 _21.3A_20%

1UH_FDU E1040D-1R0M-P3 _21.3A_20%

1 2

PR346

PR346

4.7_1206 _5%~D@

4.7_1206 _5%~D@

1 2

PC323

PC323
680P_06 03_50V8J~D@

680P_06 03_50V8J~D@

1 2

FDS6676AS
Rds(on)=5.9mohm~7.25mohm

VCCPP
Imax=9A

Iocp=14.04A
Fsw=298KHz

PC321

PC321

1

12

2

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

+

+

PC322

PC322

220U_D2_4VM

220U_D2_4VM

+VCCPP

Security Class ification

Security Class ification

Security Class ification

2008/2/5 2009/2/5

2008/2/5 2009/2/5

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/2/5 2009/2/5

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

+VCCPP

+VCCPP

+VCCPP

LA-4595P

LA-4595P

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Tuesday, February 17, 2009

LA-4595P

1

of

42 49

of

42 49

of

42 49

1.0

1.0

1.0

1bios.ru

5

D D

C C

4

3

+1.8VP_B ++

2

PJP26

PJP26

12

JUMP_43 X118

JUMP_43 X118

@

12

12

PC219

PC219

2200P_0402_50V7K~D

2200P_0402_50V7K~D

12

PC327

PC327

PC328

PC328

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

@

12

PC220

PC220

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1

+B+

PR350

PR350

267K_04 02_1%~D

267K_04 02_1%~D

EN_1.8

PU24

PU24

TON

VOUT

V5FILT

VFB

PGOOD

1 2

PC329

PR352

PR352

BST_1.8

1 2

2.2_0603 _5%~D

2.2_0603 _5%~D

1

14

15

TP

VBST

EN_PSV

DRVH

V5DRV

DRVL

GND7PGND

TPS5111 7RGYR_QFN14_3.5x3.5

TPS5111 7RGYR_QFN14_3.5x3.5

8

Security Class ification

Security Class ification

Security Class ification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

TRIP

UG_1.8

13

LX_1.8

12

LL

TRIP_1.8

11

V5DRV_1 .8

10

LG_1.8

9

PC329

1 2

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

+5VALW

PR357

PR357

1 2

12.1K_04 02_1%~D

12.1K_04 02_1%~D

2006/10/ 1 2007/05/ 30

2006/10/ 1 2007/05/ 30

2006/10/ 1 2007/05/ 30

3

12

PR355

PR355
0_0603_ 5%~D

0_0603_ 5%~D

12

PC335

PC335

4.7U_080 5_10V6K~D

4.7U_080 5_10V6K~D

Compal Secret Data

Compal Secret Data

Compal Secret Data

FDS6670 AS_NL_SO8

FDS6670 AS_NL_SO8

Deciphered Date

Deciphered Date

Deciphered Date

PR351

PR351

0_0402_ 5%~D

PR354

PR354
300_060 3_5%~D

300_060 3_5%~D

1 2

0_0402_ 5%~D

12

PR353

PR353

30.1K_04 02_1%~D

30.1K_04 02_1%~D

12

PC333

PC333

1U_0603 _10V6K~D

1U_0603 _10V6K~D

21.5K_04 02_1%~D

21.5K_04 02_1%~D

12

PC330

PC330

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

@

@

12

PR359

PR359

12

PC336

PC336

47P_040 2_50V8J~D

47P_040 2_50V8J~D

12

@

@

PR358

PR358

30.1K_04 02_1%~D

30.1K_04 02_1%~D

TON_1.8

V5FILT_1.8

FB_1.8

12

4

2

3

4

5

6

SYSON<26,27,36>

B B

A A

+5VALW

5

PQ82

PQ82

578

PQ81

PQ81

FDS8884 _SO8

FDS8884 _SO8

3 6

241

8

D6D5D7D

4

G

S

S

3

2

1

PR356

PR356

4.7_1206 _5%~D@

4.7_1206 _5%~D@

1 2

1 2

S

2

PL30

PL30

1.8UH_SIL1 04R-1R8PF_9.5A_ 30%

1.8UH_SIL1 04R-1R8PF_9.5A_ 30%

1 2

PC334

PC334
680P_06 03_50V8J~D@

680P_06 03_50V8J~D@

FDS6670AS
Rds(on)=9mohm~11.5mohm

1.8VP
Imax=9A

Iocp=10.95A
Fsw=297KHz

+

+

PC332

PC332

1

220U_D2_4VM

220U_D2_4VM

+1.8VP

of

43 49

of

43 49

of

43 49

PC331

PC331

1

12

2

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

Compal Electronics, Inc.

Title

Title

Title

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Date: Sheet

Date: Sheet

Date: Sheet

+1.8VP

+1.8VP

+1.8VP

LA-4595P

LA-4595P

LA-4595P

1.0

1.0

1.0

1bios.ru

5

D D

C C

4

3

+1.5VSP_ B++

2

PJP27

PJP27

12

JUMP_43 X118

JUMP_43 X118

@

@

12

12

PC221

PC221

PC337

PC337

10U_1206_25V6M~D

2200P_0402_50V7K~D

2200P_0402_50V7K~D

10U_1206_25V6M~D

12

12

PC222

PC222

PC338

PC338

10U_1206_25V6M~D

10U_1206_25V6M~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1

+B+

PR360

PR360

267K_04 02_1%~D

267K_04 02_1%~D

EN_1.5

PU25

PU25

TON

VOUT

V5FILT

VFB

PGOOD

1 2

1

EN_PSV

GND7PGND

BST_1.5

1 2

2.2_0603 _5%~D

2.2_0603 _5%~D

15

14

TP

VBST

13

DRVH

12

LL

11

TRIP

10

V5DRV

9

DRVL

TPS5111 7RGYR_QFN14_3.5x3.5

TPS5111 7RGYR_QFN14_3.5x3.5

8

PR362

PR362

UG_1.5

LX_1.5

TRIP_1.5

V5DRV_1 .5

LG_1.5

PC339

PC339

1 2

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

PR365

PR365

1 2

12K_040 2_1%~D

12K_040 2_1%~D

+5VALW

12

PR366

PR366
0_0603_ 5%~D

0_0603_ 5%~D

12

PC345

PC345

4.7U_080 5_10V6K~D

4.7U_080 5_10V6K~D

PQ84

PQ84

AO4712_ SO8

AO4712_ SO8

PR361

PR361

0_0402_ 5%~D

0_0402_ 5%~D

SUSP#<26,27,30,36,42,46>

PR364

PR364
300_060 3_5%~D

300_060 3_5%~D

+5VALW

B B

A A

1 2

12

PR363

PR363

30.1K_04 02_1%~D

30.1K_04 02_1%~D

12

PC343

PC343

1U_0603 _10V6K~D

1U_0603 _10V6K~D

22.1K_04 02_1%~D

22.1K_04 02_1%~D

12

PC340

PC340

.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

@

@

12

PR369

PR369

12

PC346

PC346

47P_040 2_50V8J~D

47P_040 2_50V8J~D

12

@

@

12

PR368

PR368

22.1K_04 02_1%~D

22.1K_04 02_1%~D

TON_1.5

V5FILT_1.5

FB_1.5

2

3

4

5

6

578

3 6

578

3 6

241

241

PQ83

PQ83

AO4466_ SO8

AO4466_ SO8

PL31

PR367

PR367

4.7_1206 _5%~D@

4.7_1206 _5%~D@

PC344

PC344
680P_06 03_50V8J~D@

680P_06 03_50V8J~D@

PL31

1 2

2.2UH_PC MC063T-2R2MN_ 8A_20%

2.2UH_PC MC063T-2R2MN_ 8A_20%

1 2

1 2

AO4712
Rds(on)=15mohm~18mohm

1.5VSP
Imax=3.5A

Iocp=6.87A
Fsw=298KHz

1

PC342

PC341

PC341

12

PC342

+

+

2

220U_D2_4VM

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

220U_D2_4VM

+1.5VSP

Security Class ification

Security Class ification

Security Class ification

2008/2/5 2009/2/5

2008/2/5 2009/2/5

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/2/5 2009/2/5

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

+1.5VSP

+1.5VSP

+1.5VSP

LA-4595P

LA-4595P

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Tuesday, February 17, 2009

LA-4595P

1

of

44 49

of

44 49

of

44 49

1.0

1.0

1.0

1bios.ru

5

PJP28

PJP28

+B+

D D

C C

1 2

JUMP_43 X118

JUMP_43 X118

@

@

VGA_ON<27>

12

PC363

PC363

PR405

PR405

22K_040 2_1%~D

22K_040 2_1%~D

1 2

12

12

PC364

PC364

2200P_0402_50V7K~D

2200P_0402_50V7K~D

10U_1206_25V6M~D

10U_1206_25V6M~D

12

PC369

PC369

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

@

@

12

12

PC366

PC366

PC365

PC365

10U_1206_25V6M~D

10U_1206_25V6M~D

PR402

PR402

0_0603_ 5%~D

0_0603_ 5%~D

12

PC370

PC370

2.2U_060 3_6.3V6K~D

2.2U_060 3_6.3V6K~D

PC372

PC372
.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

0.90V 1.09V 1.17V
GPU_VID_0 0 0 1
GPU_VID_1 0 1 1

B B

output voltage adjustable network

+3VS

PR419

PR419

10K_040 2_5%~D

10K_040 2_5%~D

1 2

GPU_VID0<31>

10K_040 2_5%~D

10K_040 2_5%~D

12

PR423

PR423

10K_040 2_5%~D

10K_040 2_5%~D

@

@

PR422

PR422

12

12

PR424

PR424

100K_0402_5%~D

100K_0402_5%~D

2

1

PC380

PC380

2

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

12

G

G

4

VIN_VGA

6268_VG A

EN_VGA

PC374

PC374

12

PR417

PR417

11.5K_04 02_1%~D

11.5K_04 02_1%~D

13

D

D

PQ87

PQ87
BSS138W -7-F_SOT323

BSS138W -7-F_SOT323

S

S

VGA_PW GOD<36 >

12

COMP_VG A

68P_0402_50V8J~D

68P_0402_50V8J~D

6268_VG A

PR399

PR399

10K_040 2_1%~D

10K_040 2_1%~D

PU26

PU26

3

VIN

4

VCC

5

EN

12

PR409

PR409

33K_040 2_1%~D

33K_040 2_1%~D

12

PC376

PC376

2200P_0402_25V7K~D

2200P_0402_25V7K~D

PR414

PR414
0_0402_ 5%~D

0_0402_ 5%~D

PC378

PC378
820P_04 02_50V7K~D

820P_04 02_50V7K~D

12

1

8

2

GND

PHASE

PGOOD

ISL6268CA Z-T_SSOP16

ISL6268CA Z-T_SSOP16

COMP6FB7FSET

PR410

PR410

44.2K_04 02_1%~D

44.2K_04 02_1%~D

12

12

GPU_VID1<31>

PHASE_V GA

16

UG

9

FSET_VGA

12

10K_040 2_5%~D

10K_040 2_5%~D

PR400

PR400

1 2

2.2_0603 _5%~D

2.2_0603 _5%~D

BOOT_VG A

15

BOOT

14

PVCC

13

LG

12

PGND

11

ISEN

VO

10

12

PC375

PC375

0.01U_04 02_25V7K~D

0.01U_04 02_25V7K~D

+3VS

1 2

12

PR420

PR420

@

@

3

PC367 0 .1U_0603_25V7 K~DPC367 0 .1U_0603_25V7 K~D

+5VALW

12

PR401

PR401
0_0603_ 5%~D

0_0603_ 5%~D

PR403

PR403

4.7_0603 _5%

4.7_0603 _5%

1 2

PC368

PC368

PVCC_VGA

1 2

2.2U_060 3_6.3V6K~D

2.2U_060 3_6.3V6K~D

LG_VGA

ISEN_VGA

1 2

PR406

PR406

11.8K_04 02_1%~D

11.8K_04 02_1%~D

PR416

PR416

10K_040 2_5%~D

10K_040 2_5%~D

PR418

PR418

10K_040 2_5%~D

10K_040 2_5%~D

UG_VGA

1 2

12

12

PR421

PR421

100K_0402_5%~D

100K_0402_5%~D

6268_VG A

1

2

2

G

G

PC379

PC379

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

PQ86

PQ86

FDS6690 AS_NL_SO8

FDS6690 AS_NL_SO8

FB_VGA

12

PR415

PR415

4.7K_040 2_1%~D

4.7K_040 2_1%~D

13

D

D

PQ88

PQ88
BSS138W -7-F_SOT323

BSS138W -7-F_SOT323

S

S

VGA_B++

578

3 6

578

3 6

2

PQ85

PQ85
FDS8884 _SO8

FDS8884 _SO8

241

1.8UH_SIL1 04R-1R8PF_9.5A_ 30%

1.8UH_SIL1 04R-1R8PF_9.5A_ 30%

PR404

PR404

4.7_1206 _5%~D

4.7_1206 _5%~D

1 2

1 2

241

12

PR412

PR412
0_0402_ 5%~D

0_0402_ 5%~D

12

PC377

PC377
820P_04 02_50V7K~D

820P_04 02_50V7K~D

FDS6690AS
Rds(on)=12mohm~15mohm

+VGA_COREP
Imax=7A

Iocp=10.74A

Fsw=301KHz

PL32

PL32

1 2

PR413

PR413

12

PR407

PR407
10_0402 _1%~D

10_0402 _1%~D

1 2

PR411

PR411

1.5K_040 2_1%~D

1.5K_040 2_1%~D

12

PC373

PC373
680P_06 03_50V8J~D@

680P_06 03_50V8J~D@

3K_0402 _1%~D

3K_0402 _1%~D

PC371

PC371

1 2

PR408

PR408
0_0402_ 5%~D

0_0402_ 5%~D

1

+VGA_CO REP

1

12

+

+

PC352

PC352

2

220U_X_2VM

220U_X_2VM

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

NVVDD_S ENSE <33>

A A

Compal Electronics, Inc.

+VGA_CORE

+VGA_CORE

+VGA_CORE

LA-4595P

LA-4595P

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Tuesday, February 17, 2009

LA-4595P

1

of

45 49

of

45 49

of

45 49

1.0

1.0

1.0

Security Class ification

Security Class ification

Security Class ification

2008/2/5 2009/2/5

2008/2/5 2009/2/5

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2008/2/5 2009/2/5

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

1bios.ru

5

D D

12

PC273

PC273

6

PU21

PU21

7

POK

PR321

PR321

SUSP#<26,27,30,36,42,44>

C C

1 2

0_0402_5%~D

0_0402_5%~D

12

PC277

PC277
.1U_0402_16V7K~D

.1U_0402_16V7K~D

@

@

8

EN

5

VIN

3

VOUT

VCNTL

4

VOUT

2

FB

9

VIN

GND

1

APL5913-KAC-TRL_SO8

APL5913-KAC-TRL_SO8

4

+1.5VSP+5VALW

PJP18

PJP18

2

JUMP_43X118@

JUMP_43X118@

2

1

1

1U_0603_10V6K~D

1U_0603_10V6K~D

12

12

PR322

PR322

1K_0402_1%~D

1K_0402_1%~D

12

PC274

PC274

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

12

PC275

PC275

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

PR323

PR323

2.61K_0402_1%~D

2.61K_0402_1%~D

+1.1V_GFX_PCIEP

12

PC276

PC276

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

3

+1.8V

1

PJP17

PJP17

1

JUMP_43X118@

JUMP_43X118@

2

2

12

PC267

PC267

1K_0402_1%~D

1K_0402_1%~D

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

PR318

PR318

0_0402_5%~D

0_0402_5%~D

SUSP< 30,36>

1 2

PC272

PC272

@

@

.1U_0402_16V7K~D

.1U_0402_16V7K~D

2

G

G

12

PQ78

PQ78

RHU002N06_SOT323

RHU002N06_SOT323

13

D

D

S

S

12

PR317

PR317

12

PR320

PR320

1K_0402_1%~D

1K_0402_1%~D

2

12

PC270

PC270

.1U_0402_16V7K~D

.1U_0402_16V7K~D

PU20

PU20

VIN1VCNTL

2

GND

3

VREF

4

VOUT

APL5331KAC-TRL_SO8

APL5331KAC-TRL_SO8

+0.9VSP

12

PC271

PC271

1U_0603_10V6K~D

1U_0603_10V6K~D

1

6

5

NC

7

NC

8

NC

9

TP

+3VALW

12

PC268

PC268

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

B B

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/10/1 2007/05/30

2005/10/1 2007/05/30

2005/10/1 2007/05/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

+0.9VSP/+1.1V_GFX_PCIEP

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

LA-4595P

LA-4595P

LA-4595P

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Tuesday, February 17, 2009

46 49

46 49

1

46 49

1.0Custom

1.0Custom

1.0Custom

of

of

of

1bios.ru

5

@

@

D D

DPRSLPV R<7,19 >

H_DPRST P#<5 ,7,18>

CLK_EN#

+3VS

+3VS

PR157

PR157

499_040 2_1%~D

499_040 2_1%~D

VGATE<7 ,19,27>

H_PSI#<5>

POW_ MON <27>

C C

VR_TT#

PR165 4 .22K_0402_1%@PR165 4.22K_0402_ 1%@

1 2

PC147

PC147

1U_0603 _10V6K~D

1U_0603 _10V6K~D

PR164 1 47K_0402_1%~ DPR16 4 147K_0402_ 1%~D

1 2

PH2

PH2

1 2

100K_06 03_1%_TH11-4H 104FT@

100K_06 03_1%_TH11-4H 104FT@

1 2

PC1280.015U _0402_16V7K@ PC1280.015U _0402_16V7K@

PR166 1 1.5K_0402_1%~ DPR166 1 1.5K_0402_1%~D

1 2

PC131

PC131

1000P_0 402_50V7K~D

1000P_0 402_50V7K~D

1 2

PR169 8 .25K_0402_1%~ D

PR169 8 .25K_0402_1%~ D

1 2

1 2

12

PR156

PR156

1 2

PR181 10K_0402 _1%~DPR181 10 K_0402_1%~D

1 2

PC1290.068U _0603_50V7K~ N PC 1290.0 68U_0603_50V 7K~N

1 2

1.91K_0402_1%~D

1.91K_0402_1%~D

PR143 499_0402 _1%~DPR14 3 499 _0402_1%~D

PR144 0_0402_5 %~DPR 144 0 _0402_5%~D

PR145 0_0402_5 %~DPR 145 0 _0402_5%~D

1 2

PR154 0_0402_5 %~DPR 154 0 _0402_5%~D

1 2

12

PC121

PC121

1U_0603_10V6K~D

1U_0603_10V6K~D

1

2

3

4

5

6

7

8

9

10

11

12

1 2

1 2

PGOOD

PSI#

PMON

RBIAS

VR_TT#

NTC

SOFT

OCSET

VW

COMP

FB

FB2

1 2

PC132 1 000P_0402_50 V7K~DPC132 1 000P_0402_50 V7K~D

PR175 9 7.6K_0402_1%~ DPR175 9 7.6K_0402_1%~D

1 2

B B

PC137 100P_040 2_50V8J~D

PC137 100P_040 2_50V8J~D

12

PR184

PR184

100K_04 02_1%~D

100K_04 02_1%~D

@

@

VCCSENS E<5>

PR177

PR177

1 2

100_040 2_1%~D

100_040 2_1%~D

PR179 1K_0402_ 1%~DP R179 1K_040 2_1%~D

VSSSENS E<5>

PC134 2 70P_0402_50V 7K~DPC134 270 P_0402_50V7K ~D

1 2

PC138 2 200P_0402_50 V7K~D

PC138 2 200P_0402_50 V7K~D

1 2

1 2

PR180 0_0402_5 %~DPR 180 0 _0402_5%~D

12

1 2

12

PR176

PR176
1K_0402 _1%~D

1K_0402 _1%~D

PC140 3 30P_0402_50V 7K~D

PC140 3 30P_0402_50V 7K~D

1 2

12

PC141

PC141
330P_04 02_50V7K~D

330P_04 02_50V7K~D

@

@

1 2

PR183 0_0402_5 %~DPR 183 0 _0402_5%~D

PC143 1 80P_0402_50V 8J~DPC 143 180P_040 2_50V8J~D

1 2

1 2

PR186 1 K_0402_1%~DPR186 1K_0402 _1%~D

VCC_PRM

A A

PC145

PC145

0.22U_06 03_16V7K~D

0.22U_06 03_16V7K~D

4

PC112

PC112

12

5600P_0 402_25V7K

5600P_0 402_25V7K

49

46

47

48

3V3

GND

CLK_EN#

DPRSTP#

VR_ON

12

PR153

PR153

0_0402_5%~D

0_0402_5%~D

44

45

VR_ON

DPRSLPVR

ISL6266AC RZ-T_QFN48_7X 7

ISL6266AC RZ-T_QFN48_7X 7

<27>

CPU_VID4

CPU_VID3

CPU_VID5

CPU_VID6

12

12

12

12

PR146 0_0402_5%~DPR1460_0402_5%~D

PR147 0_0402_5%~DPR1470_0402_5%~D

PR148 0_0402_5%~DPR1480_0402_5%~D

43

VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1

12

PC139

PC139

12

PC142

PC142

0.01U_06 03_25V7K~D

0.01U_06 03_25V7K~D

VSUM

12

PR185

1 2

PR187 3 .57K_0402_1%~ DPR187 3 .57K_0402_1%~D

PC144 0 .068U_0603_50 V7K~NPC1 44 0.068U_060 3_50V7K~N

PC146 0 .22U_0603_10V 7K~DPC146 0.22 U_0603_10V7K~ D

12

PR185

1 2

12

<5>

<5>

<5>

CPU_VID2

CPU_VID1

CPU_VID0

12

12

12

PR149 0_0402_5%~DPR1490_0402_5%~D

PR152 0_0402_5%~DPR1520_0402_5%~D

PR151 0_0402_5%~DPR1510_0402_5%~D

PR150 0_0402_5%~DPR1500_0402_5%~D

VID037VID138VID239VID340VID441VID542VID6

BOOT1

UGATE1

PHASE1

PGND1

LGATE1

PVCC

LGATE2

PGND2

PHASE2

UGATE2

BOOT2

NC

24

1 2

12

PR174 1 _0603_5%~DPR174 1_ 0603_5%~D

PC136

PC136
1U_0603 _10V6K~D

1U_0603 _10V6K~D

PR178

PR178

1 2

10_0603 _5%~D

10_0603 _5%~D

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

12

PR182

PR182

2.61K_0402_1%~D

2.61K_0402_1%~D

PH3

PH3

10KB_06 03_ERTJ1VR10 3J

10KB_06 03_ERTJ1VR10 3J

11K_0402_1%~D

11K_0402_1%~D

1 2

3

+5VS

PR142

<5>

<5>

<5>

<5>

PR142
1_0603_ 5%~D

1_0603_ 5%~D

1 2

12

12

PC119

PC119

PC118

PC118

1U_0603_10V6K~D

1U_0603_10V6K~D

0.22U_06 03_10V7K~D

0.22U_06 03_10V7K~D

1 2

PC122

PC122

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

4

12

PC120

PC120

1U_0603_10V6K~D

1U_0603_10V6K~D

3 5

241

5

PQ44

D

G

S3S

S

2

1

5

@PQ44

@

PQ45

PQ45

D

4

G

S3S

2

SI7636DP-T1-E3_SO8

SI7636DP-T1-E3_SO8

1

36

35

34

33

32

BOOT_CP U1

UGATE_C PU1

PHASE_C PU1

LGATE_C PU1

12

PC117

PC117

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

PR155

PR155

1 2

2.2_0603 _5%~D

2.2_0603 _5%~D

31

30

29

28

27

26

25

PU11

PU11

29.1

29.1

ISEN1
ISEN2

BOOT_CP U2

2.2_0603 _5%~D

2.2_0603 _5%~D

+5VS

+CPU_B+

LGATE_C PU2

PHASE_C PU2

UGATE_C PU2

PR167

PR167

1 2

PC130

PC130

1 2

0.22U_06 03_10V7K~D

0.22U_06 03_10V7K~D

4

SI7636DP-T1-E3_SO8

SI7636DP-T1-E3_SO8

PQ46

PQ46

SI7686DP-T 1-E3_SO8

SI7686DP-T 1-E3_SO8

5

PQ47

PQ47

D

G

S3S

S

2

1

3 5

241

5

4

G

2

12

PC114

PC114

10U_1206_25V6M~D

10U_1206_25V6M~D

PQ43

PQ43
SI7686DP-T 1-E3_SO8

SI7686DP-T 1-E3_SO8

12

PR158

PR158

12

S

PC123

PC123

SI7636DP-T1-E3_SO8

SI7636DP-T1-E3_SO8

PC125

PC125

12

PQ48

PQ48

D

12

S3S

S

2

1

SI7636DP-T1-E3_SO8

SI7636DP-T1-E3_SO8

@

@

12

PC116

PC116

PC115

PC115

@

@

10U_1206_25V6M~D

10U_1206_25V6M~D

4.7_1206_5%~D

4.7_1206_5%~D

680P_0603_50V8J~D

680P_0603_50V8J~D

12

12

PC126

PC126

10U_1206_25V6M~D

10U_1206_25V6M~D

PR168

PR168

4.7_1206 _5%~D

4.7_1206 _5%~D

PC133

PC133
680P_06 03_50V8J~D

680P_06 03_50V8J~D

+CPU_B+

1

+

+

PC113

PC113

2

100U_25V_M

100U_25V_M

12

PR160

PR160

PR162 0_0402_5 %~D@PR16 2 0_0 402_5%~D@

10K_0402_1%~D

10K_0402_1%~D

ISEN1

0.22U_06 03_16V7K~D

0.22U_06 03_16V7K~D

12

12

PC227

PC227

2200P_0402_50V7K~D

2200P_0402_50V7K~D

12

PR170

PR170

PR173 0_0402_5 %~D@PR17 3 0_0 402_5%~D@

10K_0402_1%~D

10K_0402_1%~D

3.65K_1206_1%

3.65K_1206_1%

0.22U_06 03_16V7K~D

0.22U_06 03_16V7K~D

ISEN2

1

+

+

2

1 2

12

10U_1206_25V6M~D

10U_1206_25V6M~D

P_0.36H_ ETQP4LR36W FC_24A_20%

P_0.36H_ ETQP4LR36W FC_24A_20%

12

PR159

PR159

3.65K_1206_1%

3.65K_1206_1%

VSUM

12

PC127

PC127

@

@

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

P_0.36H_ ETQP4LR36W FC_24A_20%

P_0.36H_ ETQP4LR36W FC_24A_20%

12

PR171

PR171

VSUM

PC155

PC155

100U_25V_M

100U_25V_M

12

PL14

PL14

PC124

PC124

1 2

PC228

PC228

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PL15

PL15

1 2

PC135

PC135

1 2

1

PL13

12

2200P_0402_50V7K~D

2200P_0402_50V7K~D

PR161

PR161

1_0402_ 5%~D

1_0402_ 5%~D

VCC_PRM

PL13

1 2

PC226

PC226

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

FBMA-L18 -453215-900LMA 90T_1812

FBMA-L18 -453215-900LMA 90T_1812

12

PC225

PC225

12

+CPU_B+

12

12

PR172

PR172

1_0402_ 5%~D

1_0402_ 5%~D

VCC_PRM

+B+

+CPU_CORE

Security Class ification

Security Class ification

Security Class ification

2007/1/1 5 2008/1/1 5

2007/1/1 5 2008/1/1 5

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

2007/1/1 5 2008/1/1 5

3

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Do cument Number Rev

Size Do cument Number Rev

Size Do cument Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

+CPU_CORE

+CPU_CORE

+CPU_CORE

LA-4595P

LA-4595P

LA-4595P

1

1.0

1.0

1.0

47 49Tuesday, February 17, 2009

47 49Tuesday, February 17, 2009

47 49Tuesday, February 17, 2009

of

of

of

1bios.ru

5

4

3

2

1

1

PD12

PD12
PJSOT24C_SOT23-3

BATT+

D D

BATT+

12

12

PC309

PC309

100P_0402_50V8J~D

100P_0402_50V8J~D

PJPB1 battery connector

SMART

SMART

SMARTSMART
Battery:

Battery:

Battery:Battery:

1.BAT+

1.BAT+

1.BAT+1.BAT+

2.BAT+

2.BAT+

2.BAT+2.BAT+

3.ID

3.ID

3.ID3.ID

4.B/I

4.B/I

4.B/I4.B/I

5.TS

5.TS

5.TS5.TS

6.SMD

6.SMD

6.SMD6.SMD

7.SMC

7.SMC

C C

7.SMC7.SMC

8.GND

8.GND

8.GND8.GND

9.GND

9.GND

9.GND9.GND

PL28

PL28

SMB3025500YA_2P

SMB3025500YA_2P

1 2

PC278

PC278

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

BATT++

12

PC279

PC279

1000P_0402_50V7K~D

1000P_0402_50V7K~D

PJP19

PJP19

10
11

SUYIN_200275MR009G186ZL

SUYIN_200275MR009G186ZL

@

@

GND
GND

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

BATT++

3cell/4cell#

+3VALWP

1 2

1 2

PR328

PR328

100_0402_5%~D

100_0402_5%~D

1 2

PR329

PR329

100_0402_5%~D

100_0402_5%~D

PR324

PR324
47K_0402_5%~D

47K_0402_5%~D

12

PC310

PC310

100P_0402_50V8J~D

100P_0402_50V8J~D

PJSOT24C_SOT23-3

2

3

3cell/4cell# <40>

PR326

PR326

1K_0402_5%~D

1K_0402_5%~D

EC_SMB_DA1 <27>

EC_SMB_CK1 <27>

1

PD13

PD13
PJSOT24C_SOT23-3

PJSOT24C_SOT23-3

2

3

Battery Connect/OTP

Place clsoe to EC pin

BATT_TEMP

1 2

PR325

PR325

1K_0402_5%~D

1K_0402_5%~D

12

1 2

PR327

PR327

6.49K_0402_1%~D

6.49K_0402_1%~D

PC280

PC280
.1U_0402_16V7K~D

.1U_0402_16V7K~D

1 2

@

@

+3VALWP

BATT_TEMP <27>

CPU

PH1 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
Recovery at 50 +-3 degree C

BATT+

12

PR330

PR330
453K_0402_1%~D

453K_0402_1%~D

VS

12

PR332

PR332

499K_0402_1%~D

499K_0402_1%~D

PC282

PC282

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

12

PR337

PR337

86.6K_0402_1%

86.6K_0402_1%

PC283

PC283

1000P_0402_50V7K~D

1000P_0402_50V7K~D

0

8

LM358ADR_SO8

LM358ADR_SO8

5

P

+

6

-

G

4

12

B B

PR398

PR398

10K_0402_1%~D

10K_0402_1%~D

PU22B

PU22B

7

12

BATT_OVP<27>

VL VS

12

CPU

12

PR331

PR331

10.7K_0402_1%~D

10.7K_0402_1%~D

PR335

PR335

61.9K_0402_1%~D

61.9K_0402_1%~D

1 2

1 2

VL

PR336

12

PH4

PH4
100K_0603_1%_TH11-4H104FT

100K_0603_1%_TH11-4H104FT

PR336

150K_0402_1%~D

150K_0402_1%~D

150K_0402_1%~D

150K_0402_1%~D

PR338

PR338

PR333

PR333

147K_0402_1%~D

147K_0402_1%~D

1 2

12

12

8

3

P

+

0

2

-

G

PU22A

PU22A

4

LM358ADR_SO8

LM358ADR_SO8

PC284

PC284
1U_0603_10V6K~D

1U_0603_10V6K~D

PC281

PC281

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

PD11

PD11

1

1 2

1SS355_SOD323-2

1SS355_SOD323-2

VL

1 2

PR334

PR334
205K_0402_1%~D

205K_0402_1%~D

MAINPWON <41>

LI-3S :13.5V----BATT-OVP=1.5V

BATT-OVP=0.111*BATT+

A A

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

5

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2005/10/1 2007/05/30

2005/10/1 2007/05/30

2005/10/1 2007/05/30

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

BATTERY CONN

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet

Date: Sheet

2

Date: Sheet

LA-4595P

LA-4595P

LA-4595P

Tuesday, February 17, 2009

Tuesday, February 17, 2009

Tuesday, February 17, 2009

48 49

48 49

1

48 49

1.0Custom

1.0Custom

1.0Custom

of

of

of

1bios.ru

5

Request

Request

Item

Item Issue Description

ItemItem

D D

C C

B B

A A

Page# Title

Page#Page#

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

33

34

39 DCIN /Vin Detector 08/12/08 COMPAL

40

48

39 DCIN /Vin Detector 08/12/12 COMPAL

42

43

44

Title

TitleTitle

Charger vendor FAE suggest

BATTERY CONN

VCCPP

1.8VP

1.5VSP

Date

DateDate

08/12/08

08/12/08

08/12/08

08/12/12

08/12/12

08/12/12

RequestRequest
Owner

Owner

OwnerOwner

4

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )

Version Change List ( P. I. R. List )Version Change List ( P. I. R. List )

Issue DescriptionDate

Issue DescriptionIssue Description

common circuit design modify

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

COMPAL

design modify

design modify

increase capaci tor for EMI requ est

change resister for EMI request

change resister for EMI request

change resister for EMI request

3

2

Page 1/1

Page 1/1

Page 1/1Page 1/1

Solution Description

Solution Description Rev.

Solution DescriptionSolution Description

change PR203 from 33 to 68 and add PR204 to 68

change PL17 from SM010018880 to SM010008E10

change PR272 PR339 from 1 to 3.3

change PL28 from SM010018210 to SM010008E10

add PC313 at 0.01uf and PC314 at 0.1uf 0.3

change PR342 from 0 to 2.2 0.3

change PR352 from 0 to 2.2

change PR362 from 0 to 2.2

1

Rev.Page#

Rev.Rev.

0.3

0.3

0.3

0.3

0.3

0.3

5

Security Classification

Security Classification

Security Classification

Issued Date

Issued Date

Issued Date

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL

THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF C OMPAL ELECTRONICS, INC. AND CONTAIN S CONFIDENTIAL
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D

AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFE RED FROM THE CUSTOD Y OF THE COMPETENT DIVISION OF R&D
DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS

DEPARTMENT EXCE PT AS AUTHORIZED BY COMPAL ELECTRO NICS, INC. NEITHER THIS SHEET NOR T HE INFORMATION IT CONTAINS
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

4

MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.

3

2007/1/15 2008/1/15

2007/1/15 2008/1/15

2007/1/15 2008/1/15

Compal Secret Data

Compal Secret Data

Compal Secret Data

Deciphered Date

Deciphered Date

Deciphered Date

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Custom

Custom

Custom

Date: Sheet

Date: Sheet

2

Date: Sheet

Compal Electronics, Inc.

PW PIR-1

PW PIR-1

PW PIR-1

LA-4595P

LA-4595P

LA-4595P

1

1.0

1.0

1.0

of

of

of

49 49Tuesday, February 17, 2009

49 49Tuesday, February 17, 2009

49 49Tuesday, February 17, 2009