Dell N4010 Schematics

5

4

3

2

1

Arsenal Discrete Schematics Document

D D

AMD Danube CPU S1G4

VGA ATI PARKS3-LP

RS880M + SB820M

C C

2010-05-07 REV : X01

DY : Nopop Component

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Cover Page

Arsenal DJ1 Discrete

1 89Friday, May 07, 2010

1

of

X01

5

2

28,

3

4

3

2

1

CHARGER

Project code :

Arsenal DJ1 Discrete Block Diagram

PCB P/N : Revision : 09915-1

AMD Champlain

D D

Clock Generator

ICS9LPRS480BKLFT

7

VRAM

64Mx16bx4 (512MB)

84,85

4

CPU S1G4

OUT

8,9,10,11

IN

DDR III 800/1066

HyperTransport 16X16

DDRIII 800/1066/1333

gDDR3 700MHz

ATI PARK-S3

CRT

C C

LCD

55

54

RGB CRT

LVDS

80,81,82,83

PCIe x 16

North Bridge

AMD RS880M

CPU I/F LVDS, CRT I/F

INTEGRATED GRAHPICS

12,13,14,15

PCIE x 1

USB 2.0 x 2

A-LINK 4X4

PCIE x 1 USB 2.0 x 1

CardReader

SD/SDIO/MMC MS/MS Pro/xD

B B

Internal Analog MIC

44

Realtek RTS5138

32

Azalia

USB2.0

AZALIA

CODEC

MIC IN

HP OUT

2CH SPEAKER

A A

5

& OP AMP

92HD79B1

30

4

South Bridge

AMD SB820M

14 USB 2.0 ports

ETHERNET (10/100/1000Mb)

High Definition Audio

4 PCIE GPP

6 SATA ports

ACPI 1.1

LPC I/F

PCI/PCI BRIDGE

HDD

20,21,22,23,24

SATA

ODD

59 59

SATA

USB 2.0

SPI

Flash ROM

2MB

3

LPC Bus

NUVOTON

NPCE781BA0DX

Touch

62 68 25

PAD

DIMM1

18

DIMM2

19

I/O Board

Connector

76

10/100 NIC

ATHEROS AR8152

USB 2.0 x 1

Left Side: USB x 2

Mini-Card

802.11a/b/g

CAMERA (Option)

Bluetooth

Right Side: USB x 1

RJ45 CONN

73

63

KBC

37

ThermalInt.

68

KB

EMC2102

Fan

58

2

39

Title

Block Diagram

Size Document N umber Rev

A3

Date: Sheet of

Block Diagram

Arsenal DJ1 Discrete

BQ24745RHDR

INPUTS

+DC_IN_SS

+CHAGER_SRC

OUTPUTS

+PWR_SRC

SYSTEM DC/DC

TPS51125RGER-GP

INPUTS

+PWR_SRC

OUTPUTS

+5V_ALW2 +3.3V_RTC_LDO +5V_ALW +3.3V_ALW

SYSTEM DC/DC

RT8209EGQW

INPUTS OUTPUTS

+1.1V_ALW+PWR_SRC

CPU CORE

ISL6265AHRTZ-T-GP

INPUTS

+PWR_SRC

OUTPUTS

+VCC_CORE +VDDNB

DDR III SUS&VTT

TPS51116RGER-GP-U

INPUTS

+PWR_SRC

OUTPUTS

+1.5V_SUS

SYSTEM DC/DC

APL5930KAI

INPUTS

+3.3V_ALW

OUTPUTS

+1.8V_RUN

+1.8V_DELAY

SYSTEM DC/DC

Swithes

INPUTS

+5V_ALW +5V_RUN

+1.5V_SUS

OUTPUTS

+3.3V_RUN+3.3V_ALW

+1.5V_RUN

+1.1V_RUN+1.1V_ALW

VGA

RT8208AGQW

INPUTS

OUTPUTS

+VCC_GFX_CORE+PWR_SRC

PCB LAYER

L1: Top L2: GND L3: Signal L4: Signal L5: VCC L6: Signal L7: GND L8: Bottom

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

2 89Friday, May 07, 2010

1

X01

46

48

47

49

52

53

86

A

B

C

D

E

Power Shape

Power Block Diagram

Regulator LDO Switch

4 4

Adapter

AO4407A

Battery

3 3

+3.3V_RTC_LDO

+PWR_SRC

Charger

+PBATT

G547F2P81U

+5V_USB1

TPS51125RGER

+5V_ALW

AO4468

+5V_RUN

ISL6265AHRTZ TPS51116RGERRT9025 RT8208AGQW RT8209EGQW

+VCC_CORE

+VDDNB(CPU)

VDDR(CPU)

+VCC_GFX_CORE

+1.1V_ALW

SI4634DY

G547F2P81U

+5V_USB2

+5V_ALW2

SI2301BDS

+3.3V_DELAY

AO4468

+3.3V_RUN

+3.3V_ALW

PA102FMG

+3.3V_LAN

+1.1V_RUN

AO4468

+1.1V_GFX_RUN

APL5930

+1.8V_RUN

+1.5V_SUS

AO4468

+1.5V_RUN

APL5930

+1.8V_DELAY

2 2

RESISTER

+PVDD

1 1

A

RESISTER

+AVDD

G5285T11U

+LCDVDD

B

RTS5138

+3.3V_RUN_CARD

RT9013-25PB

+2.5V_RUN

C

AR8152

+1.2V_LOM

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

D

Date: Sheet of

Power Block Diagram

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

3 89Friday, May 07, 2010

E

X01

5

4

3

2

1

SB820M SMBus Block Diagram

D D

+3.3V_RUN

SRN2K2J

SB820M

C C

SCL0

S

SCL1

SDA1

SCL3_LV/IMC_GPIO13

SDA3_LV/IMC_GPIO14

DA0

SB_SMBCLK

SB_SMBDATA

SMB_CLK

SMB_DATA

CPU_SIC

CPU_SID

+3.3V_ALW

SRN10K2J

SB_SMBCLK

SB_SMBDATA

SB_SMBCLK

SB_SMBDATA

SB_SMBCLK

SB_SMBDATA

DIMM 1

SCL

SDA

SMBus Address:A0

DIMM 2

SCL

SDA

SMBus Address:A4

CLOCK GEN

SCLK

SDATA

SMBus address:D2

NPCE781

KBC SMBus Block Diagram

+5V_RUN

SRN10KJ-5-GP

PSDAT1

KBC

GPIO61/SCL2

GPIO62/SDA2

PSCLK1

SCL1

SDA1

TPDATA

TPCLK

BAT_SCL

B

AT_SDA

KBC_SCL1

KBC_SDA1

+KBC_PWR

SRN4K7J-8-GP

SRN100J-3-GP

2N7002SPT

PBAT_SMBCLK1

PBAT_SMBDAT1

TPDATA

TPCLK

Battery Conn.

CLK_SMB

DAT_SMB

BQ24745RHDR

SCL

SDA

+3.3V_RUN

TouchPad Conn.

TPDATA

TPCLK

(In I/O Board)

SRN4K7J-8-GP

Thermal

THERM_SCL

SCL

THERM_SDA

SDA

SMBus address:16

SMBus address:12

SMBus address:7A

MINI CARD

SB_SMBCLK

B B

+1.5V_SUS

A A

5

4

SMB_CLK

SB_SMBDATA

SMB_DATA

SRN1K2J

SIC

CPU_SIC

SID

CPU_SID

SMBus address:98

CPU S1G4

ATI PARKLP-S3

3

DC1CLK

D

DDC1DATA

DDC2CLK

DDC2DATA

LDDC_CLK

LDDC_DATA

+3.3V_DELAY

M92CRT_DDCCLK

M92CRT_DDCDATA

SRN2K2J-8-GP

+3.3V_DELAY

2K2R2J-2-GP

2N7002SPT

LCD Conn.

+3.3V_DELAY

2

+5V_CRT_RUN

SRN2K2J-8-GP

DDC_CLK_CON

DDC_DATA_CON

CRT CONN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

SMBUS BLOCK DIAGRAM

Size Document Num ber Rev

A2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

1

4 89Friday, May 07, 2010

X01

5

4

3

2

1

D D

C C

Thermal Block Diagram

CPU

DP1

DN1

H_THERMDA

SC470P50V3JN-2GP

H_THERMDC

THERMDA

THERMDC

Thermal EMC2102

DP2

DN2

VGA_THERMDA

SC470P50V3JN-2GP

VGA_THERMDC

DPLUS

DMINUS

GPU

Audio Block Diagram

SPKR_PORT_D_L+

SPKR_PORT_D_L-

SPKR_PORT_D_R-

SPKR_PORT_D_R+

HP1_PORT_B_L

HP1_PORT_B_R

Codec 92HD81

VREFOUT_A_OR_F

HP0_PORT_A_L

HP0_PORT_A_R

AUD_SPK_L+

AUD_SPK_L-

AUD_SPK_R-

AUD_SPK_R+

AUD_HP1_JACK_L

UD_HP1_JACK_R

A

AUD_VREFOUT_B

AUD_EXT_MIC_L

AUD_EXT_MIC_R

60D4R2F

4K7R2J-2-GP

Bead

AUD_HP1_JACK_L1

AUD_HP1_JACK_R1

SPEAKER

60

HP

OUT

60

MIC

IN

60

B B

EMC2102_DP3

DP3

DN3

SC470P50V3JN-2GP

EMC2102_DN3

PMBS3904

System sensor, put between CPU and NB.

A A

5

4

3

DMIC_CLK/GPIO1

DMIC0/GPIO2

PORT_C_L

PORT_C_R

VREFOUT_C

AUD_DMIC_CLK

AUD_DMIC_IN0

AUD_INT_MIC_R_L

AUD_VREFOUT_C

30

33R2J-2-GP

4K7R2J-2-GP

SC1U10V3KX-3GP

2

33R2J-2-GP

AUD_DMIC_CLK_G

AUD_DMIC_IN0_R

INT_MIC_L_R

Title

THERMAL/AUDIO BLOCK DIAGRAM

Size Document Number Rev

Custom

Date: Sheet of

Digital MIC Array

Internal MIC

Arsenal DJ1 Discrete

54

60

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

5 89Friday, May 07, 2010

1

X01

5

4

3

2

1

SB820M Strapping

Capture from 45484 Rev. 1.02 AMD SB8xx-Series Southbridge Design Guide

Name Strap Name Schematic Note

LPCCLK0

D D

EC_PWM3 EC_PWM2

LPCCLK1

PCICLK1

C C

ECEnableStrap

{ROMTYPE_1, ROMTYPE_0 }

CLKGEN

BIF_GEN2_ COMPLIANCE_Strap

PCICLK2 BootFailTmrEn

PCICLK3 DefaultStrapMode

Embedded Controller (EC)

0 V – Disabled

*

3.3 V - Enabled

ROMTYPE_1 ROMTYPE_0 ROM TYPE

3.3V 0V

3.3V 3.3V

0V 0V

0V 3.3V

*

LPC ROM (supports both LPC and PMC ROM types)

Defines clock generator

External clock mode: Use 100-M Hz PCIeR

*

0V –

clock as reference clock and g enerate i nternal clocks only.

Integrated clock mode: Use 25- MHz crystal

3.3V–

clock and generate both intern al and external clocks

Set PCIe to Gen II mode

Force PCIe interface at Gen I mode

0V–

PCIe interfacce is at Gen II m ode

3.3V-

*

Not Applicable to SB820M but p rovision for pull-down is required.

Watchdog function

Disable the boot fail timer fu nction

0V–

*

Enable the boot fail timer fu nction

3.3V-

Default Debug Straps

Disable Debug Straps.

0V–

*

Select external Debug Straps

3.3V–

SPI ROM

Reserved

Firmware Hub

NB880M Strapping

Capture from 46113_rs880m_ds_nda_1.03

DAC_VSYNC

DAC_HSYNC

SUS_STAT#

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESE

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

If BIOS_ROM_EN (GPIO22) = 0

Size of the primary memory apertures

128MB 256MB

V

64MB 32MB 512MB 1GB 2GB 4GB

STRAP_DEBUG_BUS_GPIO _ENABLE#

SIDE_PORT_EN#

LOAD_EEPROM_STRAPS#

ATI RESERVED CONFIGURATION STRAPS

H2SYNC , V2SYNC

If BIOS_ROM_EN (GPIO22) = 1

GPIO[13,12,11]

x000 x001 x010 x x x x x

Manufacturer Part Number GPIO[13,12,11]

ST Microelectronics

Chingis (formerly PMC)

Enables debug bus access through memory I/O pads and GPIOs. 0: Enable 1: Disable

*

Indicates if memory side-port is available or not 0: Available

*

1: Not available

Selects loading of strap values from EEPROM. 0: I2C master can load strap values from EEPROM if connected, or use default values if EEPROM is not connected. Please refer to RS880M's reference schematics for system level implementation details. 1: Use default values

*

M25P05A M25P10A M25P20 M25P40 M25P80

Pm25LV512A Pm25LV010A

0100 0101 0101 0101 0101

0100 0101

Schematic NoteStrap FunctionName

CPU/NB HT Clock Selection

Reserved.

PCICLK4 CPUClkSel

*

0V–

Required setting for integrate d clock mode.

3.3V–

This strap is not used if the strap CLKGEN is configured for external clock generator mode.

Slow down core clock for low power platform.

AZ_SDOUT CoreSpeedMode

B B

*

0V–

3.3V-

Performance mode

Low Power mode

USB Table

Pair

0 1 2 3 4 5 6 7

A A

8 9 10 11 12 13

USB

Device

USB2 USB3 USB0 (I/O Board) USB1 (I/O Board, 17") WLAN Reserve Reserve Reserve Reserve BLUETOOTH CARD READER CAMERA Reserve Reserve

5

PCIE SB820M

PCI-E Port Device Remark

Device 21

PCI-E Port #0

PCI-E Port #1

Onboard LAN

Mini Card

4

STRAPS PIN DESCRIPTION

TX_PWRS_ENB

(Internal PD)

TX_DEEMPH_EN

(Internal PD)

BIF_GEN2_EN_A

ROMIDCFG[3:0]

(Internal PD)

BIOS_ROM_EN

(Internal PD)

AUD[1] AUD[0]

(Internal PD)

VGA_DIS

(Internal PD)

GPIO_VGA_00

GPIO_VGA_01

GPIO_VGA_02

GPIO[13,12,11]

GPIO_22_ROMCSB

VGA_HSYNC

VGA_VSYNC

GPIO_VGA_09

Tansmitter Power Savings Enable

V

0= 50% Tx output swing 1= Full Tx output swing

Transmitter De-emphasis Enable

V

0= Tx de-emphasis disabled 1= Tx de-emphasis enabled

0 = Advertises the PCI-E device

V

as 2.5GT/s 1 = Advertises the PCI-E device as 5GT/s

if BIOS_ROM_EN=1,then Config[3:0] defines the ROM type if BIOS_ROM_EN=0,then Config[3:0]

V

defines the primary memory apeture size

Enable external BIOS ROM device

V

0= Disable external BIOS ROM device 1= Enable external BIOS ROM device

AUD[1:0]

V

00:No audio function 01:Audio for DisplayPort and HDMI ( if adapter is detected) 10:Audio for DisplayPort only 11:Audio for both DisplayPort and HDMI

0: VGA Controller capacity enabled

V

1: The device will not be recognized as the system's VGA controller

ATHEROS AR8132

WLAN

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Table of Content

Size Document Num ber Rev

A2

Date: Sheet of

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

1

6 89Friday, May 07, 2010

X01

5

4

3

2

1

1'nd 68.00084.A31(MURATA) 2'nd

+3.3V_CLK_VDD+3.3V_RUN

R702

1 2

0R3J-0-U-GP

D D

SC10U6D3V5KX-1GP

C701

12

+3.3V_CLK_VDD (40 mils)

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

C703

C705

C704

12

SCD1U10V2KX-4GP

C706

12

SCD1U10V2KX-4GP

C707

C709

C708

12

+3.3V_RUN +3.3V_CLK_VDDIO

+3.3V_RUN +3.3V_CLK_VDDREF

C C

WLAN(100MHz)

LAN(100MHz)

B B

VGA(27MHz)

TP701TP701 TP702TP702 TP703TP703 TP704TP704 TP705TP705 TP706TP706 TP707TP707 TP708TP708 TP709TP709 TP710TP710

A A

EMI

EC704

SC4D7P50V2CN-1GPDYEC704

SC4D7P50V2CN-1GP

TP_CLK_SRC6

1

TP_CLK_SRC6#

1

TP_CLKREQ0#

1

TP_CLKREQ3#

1

TP_CLKREQ4#

1

TP_CLK_SRC4

1

TP_CLK_SRC4#

1

TP_CLKREQ2#

1

TP_CLK_SRC2

1

TP_CLK_SRC2#

1

12

DY

1 2

EC705

SC4D7P50V2CN-1GPDYEC705

SC4D7P50V2CN-1GP

DY

R703

0R3J-0-U-GP

R701

0R3J-0-U-GP

12

SC10U6D3V5KX-1GP

12

DY

SC2D2U6D3V3KX-GP

12

SB_PWRGD21,41

CLK_PCIE_MINI176 CLK_PCIE_MINI1#76

CLK_PCIE_LAN76 CLK_PCIE_LAN#76

CLK_VGA_27M_SS81 CLK_VGA_27M_NSS81

NB_GPPSB_CLK13 NB_GPPSB_CLK#13

SB_PCIE_CLK20 SB_PCIE_CLK#20

CLK_NBHT_CLK13 CLK_NBHT_CLK#13

CLK_VGA_27M_SS CLK_VGA_27M_NSS

5

SC2D2U6D3V3KX-GP

SCD1U10V2KX-4GP

C710

C711

12

SCD1U10V2KX-4GP

C721

C720

12

R706

1 2

0R2J-2-GP

2 3 1

X01

R713 47R2J-2-GPR713 47R2J-2-GP

1 2

R714 33R2J-2-GPR714 33R2J-2-GP

1 2

2 3 1

0923

SCD1U10V2KX-4GP

C712

DY

SCD1U10V2KX-4GP

C713

12

+3.3V_RUN

10KR2J-3-GP

12

4

SCD1U10V2KX-4GP

C714

12

+3.3V_CLK_VDDREF

R705

EC702

EC702 SC10P50V2JN-4GP

SC10P50V2JN-4GP

12

RN702

RN702 SRN0J-6-GP

SRN0J-6-GP

RN703

RN703 SRN0J-6-GP

SRN0J-6-GP

RN704

RN704 SRN0J-6-GP

SRN0J-6-GP

RN705

RN705 SRN0J-6-GP

SRN0J-6-GP

RN706

RN706 SRN0J-6-GP

SRN0J-6-GP

SCD1U10V2KX-4GP

C715

C716

12

+3.3V_CLK_VDDIO

CLKGEN_PD#

R_VGA_27M_SS_CLK R_VGA_27M_NSS_CLK

NB_GPPSB_CLK_R NB_GPPSB_CLK#_R

CLK_NBHT_CLK_R CLK_NBHT_CLK#_R

SCD1U10V2KX-4GP

C717

12

+3.3V_CLK_VDD

CLK_MINI1_R CLK_MINI1#_R TP_CLK_SRC2 TP_CLK_SRC2# LAN_CLK_R LAN_CLK#_R TP_CLK_SRC4 TP_CLK_SRC4# TP_CLK_SRC6 TP_CLK_SRC6#

SB_PCIE_CLK_R SB_PCIE_CLK#_R

4

0507

U701

26

VDDATIG

25

VDDATIG_IO

48

VDDCPU

47

VDDCPU_ IO

16

VDDSRC

17

VDDSRC_ IO

11

VDDSRC_ IO

35

VDDSB_S RC

34

VDDSB_S RC_IO

40

VDDSATA

4

VDD

55

VDDHTT

56

VDDREF

63

VDD48

51

PD#

22

SRC0T_L PRS

21

SRC0C_L PRS

20

SRC1T_L PRS

19

SRC1C_L PRS

15

SRC2T_L PRS

14

SRC2C_L PRS

13

SRC3T_L PRS

12

SRC3C_L PRS

9

SRC4T_L PRS

8

SRC4C_L PRS SRC6T/SA TAT_LPRS42GNDSATA

41

SRC6C/SA TAC_LPRS SRC7T_L PRS/27MHZ_SS6GND

5

SRC7C_L PRS/27MHZ_NS

37

SB_SRC0 T_LPRS

36

SB_SRC0 C_LPRS

32

SB_SRC1 T_LPRS

31

SB_SRC1 C_LPRS

54

HTT0T_L PRS/66M

53

HTT0C_L PRS/66M

ICS9LPRS480BKLFT-GP

1ST 71.08628.003

71.09480.A03

ATIG0T_LP RS ATIG0C_LP RS ATIG1T_LP RS ATIG1C_LP RS

CPUKG0T _LPRS

CPUKG0C _LPRS

REF0/SEL _HTT66

REF1/SEL _SATA

SMBCLK SMBDAT

CLKREQ0 # CLKREQ1 # CLKREQ2 # CLKREQ3 # CLKREQ4 #

48MHZ_0

REF2/SEL _27

GNDATIG

GNDHTT GNDREF

GNDCPU

GND48

GNDSRC GNDSRC

GNDSB_S RC

GND

XTAL 1'nd 82.30005.901 2'nd 82.30005.A51

X-14D31818M-37GP

C718 SC12P50V2JN-3GPC718 SC12P50V2JN-3GP

12

X701

CLKGEN_X1

61

X1

CLKGEN_X2

62

X2

2 3

30 29 28 27

23 45 44 39 38

50 49

64

59 58 57

43 24 7 52 60 46 1

10 18

33

65

GFX_CLKP GFX_CLKN

NB_GFX_CLK_R NB_GFX_CLK_R#

TP_CLKREQ0#

TP_CLKREQ2# TP_CLKREQ3# TP_CLKREQ4#

CPU_HT_CLK CPU_HT_CLK#

48M_CLK

FS0 FS1 FS2

1

4

2 3

1

4

2 3

1

4

2 3

R709 22R2J-2-GPR709 22R2J-2-GP

1 2

R710 22R2J-2-GPR710 22R2J-2-GP

1 2

SC4D7P50V2CN-1GP

12

DY

R715 158R2F-GPR715 158R2F-GP

RN709

RN709 SRN0J-6-GP

SRN0J-6-GP

RN710

RN710 SRN0J-6-GP

SRN0J-6-GP

RN708

RN708 SRN0J-6-GP

SRN0J-6-GP

SC4D7P50V2CN-1GP

EC703

12

DY

1 2

C719 SC12P50V2JN-3GPC719 SC12P50V2JN-3GP

EC701

For EMI

0423

1 2

SB_SMBCLK 18,19,21,76 SB_SMBDATA 18,19,21,76

CLK_PCIE_VGA 80 CLK_PCIE_VGA# 80

NB_GFX_CLK 13 NB_GFX_CLK# 13

MINI1_CLK_REQ# 76

CPU_CLK 10 CPU_CLK# 10

CLK_48M_CARD 32 USB_48M_CLK 21

90D9R2F-1-GP

12

R718

+3.3V_RUN

8K2R2J-3-GP

12

8K2R2J-3-GP

12

DY

R711

R717

VGA(100MHz)

1002

8K2R2J-3-GP

Place together

3

NB ALINK (100MHz)

SB PCIE (100MHz)

VGA Park (27MHz)

SEL_HTT66 FS0

SEL_SATA FS1

SEL_27MHz FS2

* default

66 MHz 3.3V single ended HTT clock

1

*0

100 MHz differential HTT clock

1*

100 MHz non-spreading differential SRC clock

100 MHz spreading differential SRC clock

0

27MHz non-spreading singled clock on pin 5

1

*

and 27MHz spread clock on pin 6

0

100MHz differential spreading SRC clock

2

CLKREQ# MAP

CLKREQ0# CLKREQ1# CLKREQ2# CLKREQ3# CLKREQ4#

CPU_CLK(200MHz)

CardReader(48MHz) SB820M_USB(48MHz)

12

R712

R716 33R2J-2-GPR716 33R2J-2-GP

1 2

Title

ize Document Number Rev

Size Document Number Rev

S

Custom

Date: Sheet of

No use CLKSRC1 MINI1 No use No use No use

+3.3V_RUN

R707

MINI1_CLK_REQ#

0824

NB_14M_CLK 13 SB_14M_CLK 21

Clock Generator ICS9LPRS480

Arsenal DJ1 Discrete

R707

1 2

10KR2J-3-GP

NB OSCIN(14MHz) SB OSCIN(14MHz)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

7 89Friday, May 07, 2010

1

X01

5

4

3

2

1

SSID = CPU

D D

+1.1V_RUN

SC22U6D3V5MX-2GP

12

C C

B B

Place close to socket 1.1V(1.5A) for VLDT

SC4D7U6D3V3KX-GP

C802

C801

12

SCD22U10V3KX-2GP

C803

C804

12

C804

12

SC180P50V2JN-1GP

SCD22U10V3KX-2GP

C805

12

HT_NB_CPU_CAD_H012 HT_NB_CPU_CAD_L012 HT_NB_CPU_CAD_H112 HT_NB_CPU_CAD_L112 HT_NB_CPU_CAD_H212 HT_NB_CPU_CAD_L212 HT_NB_CPU_CAD_H312 HT_NB_CPU_CAD_L312 HT_NB_CPU_CAD_H412 HT_NB_CPU_CAD_L412 HT_NB_CPU_CAD_H512 HT_NB_CPU_CAD_L512 HT_NB_CPU_CAD_H612 HT_NB_CPU_CAD_L612 HT_NB_CPU_CAD_H712 HT_NB_CPU_CAD_L712 HT_NB_CPU_CAD_H812 HT_NB_CPU_CAD_L812 HT_NB_CPU_CAD_H912 HT_NB_CPU_CAD_L912 HT_NB_CPU_CAD_H1012 HT_NB_CPU_CAD_L1012 HT_NB_CPU_CAD_H1112 HT_NB_CPU_CAD_L1112 HT_NB_CPU_CAD_H1212 HT_NB_CPU_CAD_L1212 HT_NB_CPU_CAD_H1312 HT_NB_CPU_CAD_L1312 HT_NB_CPU_CAD_H1412 HT_NB_CPU_CAD_L1412 HT_NB_CPU_CAD_H1512 HT_NB_CPU_CAD_L1512

HT_NB_CPU_CLK_H012 HT_NB_CPU_CLK_L012 HT_NB_CPU_CLK_H112 HT_NB_CPU_CLK_L112

HT_NB_CPU_CTL_H012 HT_NB_CPU_CTL_L012 HT_NB_CPU_CTL_H112 HT_NB_CPU_CTL_L112

SC180P50V2JN-1GP

C806

C807

12

C807

12

CPU1A

D1

VLDT_A0

D2

VLDT_A1

D3

VLDT_A2

D4

VLDT_A3

E3

L0_CADIN_ H0

E2

L0_CADIN_ L0

E1

L0_CADIN_ H1

F1

L0_CADIN_ L1

G3

L0_CADIN_ H2

G2

L0_CADIN_ L2

G1

L0_CADIN_ H3

H1

L0_CADIN_ L3

J1

L0_CADIN_ H4

K1

L0_CADIN_ L4

L3

L0_CADIN_ H5

L2

L0_CADIN_ L5

L1

L0_CADIN_ H6

M1

L0_CADIN_ L6

N3

L0_CADIN_ H7

N2

L0_CADIN_ L7

E5

L0_CADIN_ H8

F5

L0_CADIN_ L8

F3

L0_CADIN_ H9

F4

L0_CADIN_ L9

G5

L0_CADIN_ H10

H5

L0_CADIN_ L10

H3

L0_CADIN_ H11

H4

L0_CADIN_ L11

K3

L0_CADIN_ H12

K4

L0_CADIN_ L12

L5

L0_CADIN_ H13

M5

L0_CADIN_ L13

M3

L0_CADIN_ H14

M4

L0_CADIN_ L14

N5

L0_CADIN_ H15

P5

L0_CADIN_ L15

J3

L0_CLKIN_ H0

J2

L0_CLKIN_ L0

J5

L0_CLKIN_ H1

K5

L0_CLKIN_ L1

N1

L0_CTLIN_ H0

P1

L0_CTLIN_ L0

P3

L0_CTLIN_ H1

P4

L0_CTLIN_ L1

DANUBE

L0_CADO UT_H0 L0_CADO UT_L0 L0_CADO UT_H1 L0_CADO UT_L1 L0_CADO UT_H2 L0_CADO UT_L2 L0_CADO UT_H3 L0_CADO UT_L3 L0_CADO UT_H4 L0_CADO UT_L4 L0_CADO UT_H5 L0_CADO UT_L5 L0_CADO UT_H6 L0_CADO UT_L6 L0_CADO UT_H7 L0_CADO UT_L7 L0_CADO UT_H8 L0_CADO UT_L8 L0_CADO UT_H9 L0_CADO UT_L9

L0_CADO UT_H10

L0_CADO UT_L10

L0_CADO UT_H11

L0_CADO UT_L11

L0_CADO UT_H12

L0_CADO UT_L12

L0_CADO UT_H13

L0_CADO UT_L13

L0_CADO UT_H14

L0_CADO UT_L14

L0_CADO UT_H15

L0_CADO UT_L15

L0_CLKO UT_H0

L0_CLKO UT_L0

L0_CLKO UT_H1

L0_CLKO UT_L1

L0_CTLO UT_H0 L0_CTLO UT_L0 L0_CTLO UT_H1 L0_CTLO UT_L1

1 OF 6

VLDT_B0 VLDT_B1 VLDT_B2 VLDT_B3

AE2 AE3 AE4 AE5

AD1 AC1 AC2 AC3 AB1 AA1 AA2 AA3 W2 W3 V1 U1 U2 U3 T1 R1 AD4 AD3 AD5 AC5 AB4 AB3 AB5 AA5 Y5 W5 V4 V3 V5 U5 T4 T3

Y1 W1 Y4 Y3

R2 R3 T5 R5

HT_CPU_NB_CAD_H0 12 HT_CPU_NB_CAD_L0 12 HT_CPU_NB_CAD_H1 12 HT_CPU_NB_CAD_L1 12 HT_CPU_NB_CAD_H2 12 HT_CPU_NB_CAD_L2 12 HT_CPU_NB_CAD_H3 12 HT_CPU_NB_CAD_L3 12 HT_CPU_NB_CAD_H4 12 HT_CPU_NB_CAD_L4 12 HT_CPU_NB_CAD_H5 12 HT_CPU_NB_CAD_L5 12 HT_CPU_NB_CAD_H6 12 HT_CPU_NB_CAD_L6 12 HT_CPU_NB_CAD_H7 12 HT_CPU_NB_CAD_L7 12 HT_CPU_NB_CAD_H8 12 HT_CPU_NB_CAD_L8 12 HT_CPU_NB_CAD_H9 12 HT_CPU_NB_CAD_L9 12 HT_CPU_NB_CAD_H10 12 HT_CPU_NB_CAD_L10 12 HT_CPU_NB_CAD_H11 12 HT_CPU_NB_CAD_L11 12 HT_CPU_NB_CAD_H12 12 HT_CPU_NB_CAD_L12 12 HT_CPU_NB_CAD_H13 12 HT_CPU_NB_CAD_L13 12 HT_CPU_NB_CAD_H14 12 HT_CPU_NB_CAD_L14 12 HT_CPU_NB_CAD_H15 12 HT_CPU_NB_CAD_L15 12

HT_CPU_NB_CLK_H0 12 HT_CPU_NB_CLK_L0 12 HT_CPU_NB_CLK_H1 12 HT_CPU_NB_CLK_L1 12

HT_CPU_NB_CTL_H0 12 HT_CPU_NB_CTL_L0 12 HT_CPU_NB_CTL_H1 12 HT_CPU_NB_CTL_L1 12

SKT-BGA638H176

1'nd 62.10055.111 2'nd 62.10055.171

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU_HT_LINK I/F_(1/4)

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

8 89Friday, May 07, 2010

1

X01

5

4

3

2

1

SSID = CPU

M_A_DQ[63..0]18

D D

+CPU_VDDR

SC4D7U6D3V3KX-GP

12

Place near to CPU

SCD22U10V3KX-2GP

SC4D7U6D3V3KX-GP

C902

C901

12

SC4D7U6D3V3KX-GP

C903

C913

12

C913

12

SCD22U10V3KX-2GP

12

C914

C904

12

SCD22U10V3KX-2GP

12

C906

C905

12

SC1000P50V3JN-GP-U

SC1KP50V2KX-1GP

C907

C915

12

C915

12

SC1000P50V3JN-GP-U

SC1KP50V2KX-1GP

C908

C909

12

C909

12

SC180P50V2JN-1GP

12

C911

C910

12

SC180P50V2JN-1GP

C916

C912

12

C912

12

0.9V(1.25A) for VDDR

+CPU_VDDR

C C

+1.5V_SUS

R901 39D2R2F-L-GPR901 39D2R2F-L-GP

1 2

R903 39D2R2F-L-GPR903 39D2R2F-L-GP

1 2

12

B B

MEM_MA_ADD[0..15]18 MEM_MB_ADD[0..15] 19

DDR3_A_DRAMRST#18

C917

C917 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

MEM_MA0_ODT018 MEM_MA0_ODT118

MEM_MA0_CS#018 MEM_MA0_CS#118

MEM_MA_CKE018 MEM_MA_CKE118

MEM_MA_CLK0_P18 MEM_MA_CLK0_N18

MEM_MA_CLK1_N18

MEM_MA_BANK018 MEM_MA_BANK118 MEM_MA_BANK218

MEM_MA_RAS#18 MEM_MA_CAS#18 MEM_MA_WE#18

MEMZP MEMZN

S1G4

MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15

0.9V--DDR1066

1.05V---DDR1333 (1.75A)

CPU1B

D10

VDDR

C10

VDDR

B10

VDDR

AD10

VDDR

AF10

MEMZP

AE10

MEMZN

H16

MA_RESE T#

T19

MA0_ODT 0

V22

MA0_ODT 1

U21

MA1_ODT 0

V19

MA1_ODT 1

T20

MA0_CS# 0

U19

MA0_CS# 1

U20

MA1_CS# 0

V20

MA1_CS# 1

J22

MA_CKE0

J20

MA_CKE1

N19

MA_CLK_ H5

N20

MA_CLK_ L5

E16

MA_CLK_ H1

F16

MA_CLK_ L1

Y16

MA_CLK_ H7

AA16

MA_CLK_ L7

P19

MA_CLK_ H4

P20

MA_CLK_ L4

N21

MA_ADD0

M20

MA_ADD1

N22

MA_ADD2

M19

MA_ADD3

M22

MA_ADD4

L20

MA_ADD5

M24

MA_ADD6

L21

MA_ADD7

L19

MA_ADD8

K22

MA_ADD9

R21

MA_ADD1 0

L22

MA_ADD1 1

K20

MA_ADD1 2

V24

MA_ADD1 3

K24

MA_ADD1 4

K19

MA_ADD1 5

R20

MA_BANK 0

R23

MA_BANK 1

J21

MA_BANK 2

R19

MA_RAS#

T22

MA_CAS#

T24

MA_W E#

VDDR VDDR VDDR

DANUBE

VDDR VDDR

VDDR_SE NSE

MEMVREF

MB_RESE T#

MB0_ODT 0 MB0_ODT 1 MB1_ODT 0

MB0_CS# 0 MB0_CS# 1 MB1_CS# 0

MB_CKE0 MB_CKE1

MB_CLK_ H5 MB_CLK_ L5 MB_CLK_ H1 MB_CLK_ L1 MB_CLK_ H7 MB_CLK_ L7 MB_CLK_ H4 MB_CLK_ L4

MB_ADD0 MB_ADD1 MB_ADD2 MB_ADD3 MB_ADD4 MB_ADD5 MB_ADD6 MB_ADD7 MB_ADD8

MB_ADD9 MB_ADD1 0 MB_ADD1 1 MB_ADD1 2 MB_ADD1 3 MB_ADD1 4 MB_ADD1 5

MB_BANK 0 MB_BANK 1 MB_BANK 2

MB_RAS#

MB_CAS#

MB_W E#

2 OF 6

W10 AC10 AB10 AA10 A10

From VDDR SEL

TP_CPU_VDDR_SENSE

Y10

W17

B18

S1G4

W26 W23 Y26

V26 W25 U22

J25 H26

P22 R22 A17 A18 AF18 AF17 R26 R25

MEM_MB_ADD0

P24

MEM_MB_ADD1

N24

MEM_MB_ADD2

P26

MEM_MB_ADD3

N23

MEM_MB_ADD4

N26

MEM_MB_ADD5

L23

MEM_MB_ADD6

N25

MEM_MB_ADD7

L24

MEM_MB_ADD8

M26

MEM_MB_ADD9

K26

MEM_MB_ADD10

T26

MEM_MB_ADD11

L26

MEM_MB_ADD12

L25

MEM_MB_ADD13

W24

MEM_MB_ADD14

J23

MEM_MB_ADD15

J24

R24 U26 J26

U25 U24 U23

+1.5V_SUS

SCD1U10V2KX-4GP

1KR3F-GP

C918

12

+0.75V_SUS_CPU_M_VREF +V_DDR_REF

TP901TP901

1

DDR3_B_DRAMRST# 19

MEM_MB0_ODT0 19 MEM_MB0_ODT1 19

MEM_MB0_CS#0 19 MEM_MB0_CS#1 19

MEM_MB_CKE0 19 MEM_MB_CKE1 19

MEM_MB_CLK0_P 19 MEM_MB_CLK0_N 19

MEM_MB_CLK1_P 19 MEM_MB_CLK1_N 19

MEM_MB_BANK0 19 MEM_MB_BANK1 19 MEM_MB_BANK2 19

MEM_MB_RAS# 19 MEM_MB_CAS# 19 MEM_MB_WE# 19

SCD1U10V2KX-4GP

1KR3F-GP

SC1000P50V3JN-GP-U

C919

12

1KR3F-GP

C920

12

CLOSE TO CPU

12

R902

1 2

12

R905

R904

DY

0R3J-0-U-GP

M_A_DM[7..0]18

M_A_DQS018 M_A_DQS#018 M_A_DQS118 M_A_DQS#118 M_A_DQS218 M_A_DQS#218 M_A_DQS318 M_A_DQS#318 M_A_DQS418 M_A_DQS#418 M_A_DQS518 M_A_DQS#518 M_A_DQS618 M_A_DQS#618 M_A_DQS718 M_A_DQS#718

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

G12 F12 H14 G14 H11 H12 C13 E13 H15 E15 E17 H17 E14 F14 C17 G17 G18 C19 D22 E20 E18 F18 B22 C23 F20 F22 H24

E21 E22 H20 H22

Y24 AB24 AB22 AA21

W22 W21

Y22 AA22

Y20 AA20 AA18 AB18 AB21 AD21 AD19

Y18 AD17

W16 W14

Y14

Y17 AB17 AB15 AD15 AB13 AD13

Y12

W11 AB14 AA14 AB12 AA12

E12 C15 E19 F24

AC24

Y19

AB16

Y13

G13 H13 G16 G15 C22 C21 G22

G21 AD23 AC23 AB19 AB20

Y15

W15 W12 W13

J19

3 OF 6

MA_DATA 0 MA_DATA 1 MA_DATA 2 MA_DATA 3 MA_DATA 4 MA_DATA 5 MA_DATA 6 MA_DATA 7 MA_DATA 8 MA_DATA 9 MA_DATA 10 MA_DATA 11 MA_DATA 12 MA_DATA 13 MA_DATA 14 MA_DATA 15 MA_DATA 16 MA_DATA 17 MA_DATA 18 MA_DATA 19 MA_DATA 20 MA_DATA 21 MA_DATA 22 MA_DATA 23 MA_DATA 24 MA_DATA 25 MA_DATA 26 MA_DATA 27 MA_DATA 28 MA_DATA 29 MA_DATA 30 MA_DATA 31 MA_DATA 32 MA_DATA 33 MA_DATA 34 MA_DATA 35 MA_DATA 36 MA_DATA 37 MA_DATA 38 MA_DATA 39 MA_DATA 40 MA_DATA 41 MA_DATA 42 MA_DATA 43 MA_DATA 44 MA_DATA 45 MA_DATA 46 MA_DATA 47 MA_DATA 48 MA_DATA 49 MA_DATA 50 MA_DATA 51 MA_DATA 52 MA_DATA 53 MA_DATA 54 MA_DATA 55 MA_DATA 56 MA_DATA 57 MA_DATA 58 MA_DATA 59 MA_DATA 60 MA_DATA 61 MA_DATA 62 MA_DATA 63

MA_DM0 MA_DM1 MA_DM2 MA_DM3 MA_DM4 MA_DM5 MA_DM6 MA_DM7

MA_DQS_ H0 MA_DQS_ L0 MA_DQS_ H1 MA_DQS_ L1 MA_DQS_ H2 MA_DQS_ L2 MA_DQS_ H3 MA_DQS_ L3 MA_DQS_ H4 MA_DQS_ L4 MA_DQS_ H5 MA_DQS_ L5 MA_DQS_ H6 MA_DQS_ L6 MA_DQS_ H7 MA_DQS_ L7

DANUBE

CPU1C

MB_DATA 0 MB_DATA 1 MB_DATA 2 MB_DATA 3 MB_DATA 4 MB_DATA 5 MB_DATA 6 MB_DATA 7 MB_DATA 8

MB_DATA 9 MB_DATA 10 MB_DATA 11 MB_DATA 12 MB_DATA 13 MB_DATA 14 MB_DATA 15 MB_DATA 16 MB_DATA 17 MB_DATA 18 MB_DATA 19 MB_DATA 20 MB_DATA 21 MB_DATA 22 MB_DATA 23 MB_DATA 24 MB_DATA 25 MB_DATA 26 MB_DATA 27 MB_DATA 28 MB_DATA 29 MB_DATA 30 MB_DATA 31 MB_DATA 32 MB_DATA 33 MB_DATA 34 MB_DATA 35 MB_DATA 36 MB_DATA 37 MB_DATA 38 MB_DATA 39 MB_DATA 40 MB_DATA 41 MB_DATA 42 MB_DATA 43 MB_DATA 44 MB_DATA 45 MB_DATA 46 MB_DATA 47 MB_DATA 48 MB_DATA 49 MB_DATA 50 MB_DATA 51 MB_DATA 52 MB_DATA 53 MB_DATA 54 MB_DATA 55 MB_DATA 56 MB_DATA 57 MB_DATA 58 MB_DATA 59 MB_DATA 60 MB_DATA 61 MB_DATA 62 MB_DATA 63

MB_DM0 MB_DM1 MB_DM2 MB_DM3 MB_DM4 MB_DM5 MB_DM6 MB_DM7

MB_DQS_ H0

MB_DQS_ L0

MB_DQS_ H1

MB_DQS_ L1

MB_DQS_ H2

MB_DQS_ L2

MB_DQS_ H3

MB_DQS_ L3

MB_DQS_ H4

MB_DQS_ L4

MB_DQS_ H5

MB_DQS_ L5

MB_DQS_ H6

MB_DQS_ L6

MB_DQS_ H7

MB_DQS_ L7

C11 A11 A14 B14 G11 E11 D12 A13 A15 A16 A19 A20 C14 D14 C18 D18 D20 A21 D24 C25 B20 C20 B24 C24 E23 E24 G25 G26 C26 D26 G23 G24 AA24 AA23 AD24 AE24 AA26 AA25 AD26 AE25 AC22 AD22 AE20 AF20 AF24 AF23 AC20 AD20 AD18 AE18 AC14 AD14 AF19 AC18 AF16 AF15 AF13 AC12 AB11 Y11 AE14 AF14 AF11 AD11

A12 B16 A22 E25 AB26 AE22 AC16 AD12

C12 B12 D16 C16 A24 A23 F26 E26 AC25 AC26 AF21 AF22 AE16 AD16 AF12 AE12

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 19 M_B_DQS#0 19 M_B_DQS1 19 M_B_DQS#1 19 M_B_DQS2 19 M_B_DQS#2 19 M_B_DQS3 19 M_B_DQS#3 19 M_B_DQS4 19 M_B_DQS#4 19 M_B_DQS5 19 M_B_DQS#5 19 M_B_DQS6 19 M_B_DQS#6 19 M_B_DQS7 19 M_B_DQS#7 19

M_B_DQ[63..0] 19

M_B_DM[7..0] 19MEM_MA_CLK1_P18

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU_DDR_(2/4)

Size Document Number Rev

Custom

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

9 89Friday, May 07, 2010

1

X00

5

4

3

2

1

SSID = CPU

L1001

1 2

SC180P50V2JN-1GP

D D

+1.5V_RUN

4

RN1001

RN1001 SRN300J-3-GP

SRN300J-3-GP

1

CPU_LDT_RST#20

CPU_LDT_PWRGD20,42

CPU_LDT_STOP#13,20

C C

+1.5V_RUN

B B

0423

+1.5V_SUS

2 3

R1001 0R0402-PADR1001 0R0402-PAD

R1002 0R0402-PADR1002 0R0402-PAD

R1003 0R0402-PADR1003 0R0402-PAD

R1012 300R2J-4-GP

1 2

DY

R1013 300R2J-4-GP

1 2

DY

R1014 300R2J-4-GP

1 2

DY

R1016 300R2J-4-GP

1 2

DY

RN1002 SRN1KJ-7-GPRN1002 SRN1KJ-7-GP

1 2 3

RN1004 SRN1KJ-7-GPRN1004 SRN1KJ-7-GP

1 2 3

RN1003

1 2 3 4 5

SRN1KJ-4-GP

1 2

4

8 7 6

X01

CPU_CLK(200MHz)

For HDT DBG

CPU_R_LDT_RST#

CPU_R_LDT_PWRGD

CPU_R_LDT_STOP#

CPU_LDT_REQ#

CPU_DBRDY TP_CPU_TEST14 TP_CPU_TEST15

CPU_TEST18 CPU_TEST19

CPU_TEST24 CPU_TEST22

CPU_TEST23 CPU_TEST12 CPU_TEST20 CPU_TEST21

CPU_R_LDT_RST#

HDT_RST_R#

510R2F-L-GP

R1018

R1020

CPU_CLK7 CPU_CLK#7

R1009

1 2

DY

0R2J-2-GP

+1.5V_SUS

12

DY

12

SC180P50V2JN-1GP

PBY160808T-330Y-N-GP

C1001

12

Cloce To CPU

C1005 SC3900P50V2KX-2GPC1005 SC3900P50V2KX-2GP

1 2

C1006 SC3900P50V2KX-2GPC1006 SC3900P50V2KX-2GP

1 2

Close CPU

+1.1V_RUN

to power IC FB

12

R1019

R1019 510R2F-L-GP

510R2F-L-GP

12

R1022

DY

510R2F-L-GP

CPU_VDD0_RUN_FB_H47 CPU_VDD0_RUN_FB_L47

CPU_VDD1_RUN_FB_H47 CPU_VDD1_RUN_FB_L47

LYAOUT:ROUTE VDDA TRACE APPROX. 50mils WIDE(USE 2X25 mil TRACES TO EXIT BALL FIELD) AND 500 mils LONG.

+2.5V_RUN_VDDA+2.5V_RUN

2.5V(250mA) for VDDA

SC3300P50V2KX-1GP

SCD22U6D3V2KX-1GP

SC4D7U6D3V3KX-GP

C1002

12

R1008 169R2F-GPR1008 169R2F-GP

1 2

SCD1U16V2ZY-2GP

DY

R1010 44D2R2F-GPR1010 44D2R2F-GP

1 2

R1011 44D2R2F-GPR1011 44D2R2F-GP

1 2

0R2J-2-GP

12

R1023

C1007

CPU_R_LDT_PWRGD CPU_R_LDT_STOP# CPU_LDT_REQ#

CPU_SIC CPU_SID CPU_ALERT#

CPU_DBRDY CPU_TMS CPU_TCK CPU_TRST# CPU_TDI

CPU_TEST23

CPU_TEST18 CPU_TEST19

CPU_TEST25_H CPU_TEST25_L

CPU_TEST21 CPU_TEST20 CPU_TEST24 CPU_TEST22 CPU_TEST12 CPU_TEST27

CPU_TEST9

C1003

CPUCLK_IN CPUCLK_IN#

CPU_HTREF0 CPU_HTREF1

C1004

12

AC9 AD9

AD7

AC8

F10

AF4 AF5 AE6

AB6

G10 AA9

AF9

H10

AB8 AF7 AE7 AE8

AF8

AA6

G9

E9 E8

C2

A3 A5 B3 B5 C1

F8 F9

A9 A8

B7 A7

C6

R6 P6

F6 E6

Y6

CPU1D

VDDA VDDA

CLKIN_H CLKIN_L

RESET# PWRO K LDTSTOP # LDTREQ#

SIC SID ALERT#

HT_REF0 HT_REF1

VDD0_FB _H VDD0_FB _L

VDD1_FB _H VDD1_FB _L

DBRDY TMS TCK TRST# TDI

TEST23

TEST18 TEST19

TEST25_ H TEST25_ L

TEST21 TEST20 TEST24 TEST22 TEST12 TEST27

TEST9 TEST6

RSVD#A3 RSVD#A5 RSVD#B3 RSVD#B5 RSVD#C1

RSVD#W 18

DANUBE

THERMTR IP#

PROCHOT #

VDDIO_FB_ H

VDDIO_FB_ L

VDDNB_F B_H

VDDNB_F B_L

4 OF 6

VSS

SVC SVD

MEMHOT#

THERMDC THERMDA

DBREQ#

TDO

TEST28_ H TEST28_ L

TEST17 TEST16 TEST15 TEST14

TEST7

TEST10

TEST8

TEST29_ H TEST29_ L

RSVD#H1 8 RSVD#H1 9 RSVD#AA 7

RSVD#D5 RSVD#C5

0423

+1.5V_SUS

M11 W18

A6 A4

CPU_THERMTRIP#

AF6

CPU_PROCHOT#

AC7

CPU_MEMHOT#

AA8

W7 W8

TP_CPU_VDDIO_SUS_FB_H

W9

TP_CPU_VDDIO_SUS_FB_L

Y9

H6 G6

CPU_DBREQ#

E10

CPU_TDO

AE9

J7 H8

TP_CPU_TEST17

D7

TP_CPU_TEST16

E7

TP_CPU_TEST15

F7

TP_CPU_TEST14

C7

C3

CPU_TEST10

K8

C4

CPU_TEST29H

C9

CPU_TEST29L

C8

H18 H19 AA7 D5 C5

4

RN1006

RN1006 SRN1KJ-7-GP

SRN1KJ-7-GP

1

2 3

CPU_SVC 47 CPU_SVD 47

1

H_THERMDC 39 H_THERMDA 39

CPU_VDDNB_RUN_FB_H 47 CPU_VDDNB_RUN_FB_L 47

R1015

1 2

300R2J-4-GP

1 2

DY

R1021 300R3-GP

1 2

R1024 80D6R2F-L-GPR1024 80D6R2F-L-GP

+1.5V_SUS

1KR2J-1-GP

300R2J-4-GP

12

R1006

R1007

TP1002TP1002

S1G4 not support MEMHOT

+1.5V_SUS

+1.1V_RUN

LAYOUT: Route FBCLKOUT_H/L

differentially impedance 80

HDT Connectors

CPU_PROCHOT# 20

R1026

R1026 1KR2J-1-GP

1KR2J-1-GP

1 2

CPU_TEST27

R1029

R1029 300R2J-4-GP

300R2J-4-GP

DY

1 2

TP1001TP1001 TP1003TP1003 TP1006TP1006 TP1007TP1007 TP1008TP1008 TP1009TP1009

0423

A A

CPU_PROCHOT#_EC37

1 1 1 1 1 1

5

TP_CPU_VDDIO_SUS_FB_H TP_CPU_VDDIO_SUS_FB_L TP_CPU_TEST17 TP_CPU_TEST16 TP_CPU_TEST15 TP_CPU_TEST14

+3.3V_RUN

8K2R2J-3-GP

12

R1040

Q1005 PMBS3904-1-GPQ1005 PMBS3904-1-GP

+1.5V_RUN

2K2R2J-2-GP

12

1

2

R1039

CPU_PROCHOT#

3

CPU_SIC21

CPU_SID21

TALERT#21,39

For old HDT tool (3.3V level)

4

+1.5V_SUS

1

4

23

0423

RN1005

RN1005 SRN1KJ-7-GP

SRN1KJ-7-GP

10KR2J-3-GP

DY

2K2R2J-2-GP

12

312

Q1001

PMBS3904-1-GP

12

R1037

Q1004 PMBS3904-1-GP

R1032

+1.8V_RUN+3.3V_RUN

2K2R2J-2-GP

12

DY

312

DY

HDT1

1

2

DY

3

4

5

1KR2J-1-GP

12

R1033

CPU_SIC

CPU_SID

CPU_ALERT#

R1036

HDT_RST_R#HDT_RST#

3

H_THERMTRIP#21,37,39,42

CPU_PWRGD_SVID_REG47

+KBC_PWR

8K2R2J-3-GP

12

DY

10KR2J-3-GP

12

R1034

+1.5V_RUN

R1027

312

PMBS3904-1-GP

+1.8V_RUN+3.3V_RUN

2K2R2J-2-GP

312

Q1003

PMBS3904-1-GP

2K2R2J-2-GP

Q1002

12

R1028

12

R1035

2

X01

CPU_THERMTRIP#

CPU_R_LDT_PWRGD

CPU_DBREQ#

CPU_DBRDY

CPU_TCK CPU_TMS CPU_TDI

CPU_TRST#

CPU_TDOCPU_TDO

1.5V

CPU_R_LDT_RST#

HDT_RST#

3.3V

Title

Size Document Number Rev

Custom

Date: Sheet of

+1.5V_SUS

1 2

DY

R1038 0R2J-2-GP

CPU_Control&Debug_(3/4)

Arsenal DJ1 Discrete

SMC-CONN26A-FP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24 26

X01

10 89Friday, May 07, 2010

X01

5

4

3

2

1

SSID = CPU

D D

6 OF 6

CPU1F

AA4

VSS

AA11

VSS

AA13

VSS

AA15

VSS

AA17

VSS

AA19

VSS

AB2

VSS

AB7

VSS

AB9

VSS

AB23

VSS

AB25

VSS

AC11

VSS

AC13

VSS

AC15

VSS

AC17

VSS

AC19

VSS

AC21

VSS

AD6

C C

B B

AD8 AD25 AE11 AE13 AE15 AE17 AE19 AE21 AE23

B11

B13

B15

B17

B19

B21

B23

B25

D11

D13

D15

D17

D19

D21

D23

D25

H21

H23

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

B4

VSS

B6

VSS

B8

VSS

B9

VSS VSS VSS VSS VSS VSS VSS VSS VSS

D6

VSS

D8

VSS

D9

VSS VSS VSS VSS VSS VSS VSS VSS VSS

E4

VSS

F2

VSS

F11

VSS

F13

VSS

F15

VSS

F17

VSS

F19

VSS

F21

VSS

F23

VSS

F25

VSS

H7

VSS

H9

VSS VSS VSS

J4

VSS

VSS VSS VSS

DANUBE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

J6 J8 J10 J12 J14 J16 J18 K2 K7 K9 K11 K13 K15 K17 L6 L8 L10 L12 L14 L16 L18 M7 M9 AC6 M17 N4 N8 N10 N16 N18 P2 P7 P9 P11 P17 R8 R10 R16 R18 T7 T9 T11 T13 T15 T17 U4 U6 U8 U10 U12 U14 U16 U18 V2 V7 V9 V11 V13 V15 V17 W6 Y21 Y23 N6

+1.5V_SU S

(36A) for 35W S1G4 VDD

+VCC_CO RE +VCC_CO RE

+VDDNB

SC22U6D3V5MX-2GP

Bottom Side Decoupling Bottom Side Decoupling

SC22U6D3V5MX-2GP

12

SC22U6D3V5MX-2GP

12

SC22U6D3V5MX-2GP

C1103

C1101

12

22UF *4

0.22UF *1 180PF *1 10nF*1

0.9V(4A) for VDDNB

SC22U6D3V5MX-2GP

C1116

C1115

12

1.5V(3A) for VDDIO

Bottom Side Decoupling

SC22U6D3V5MX-2GP

SCD22U10V3KX-2GP

C1131

C1130

12

22UF *2

0.22UF *2 180PF *1

0.01UF *1

0.1UF *2

C1132

12

SCD22U10V3KX-2GP

SC22U6D3V5MX-2GP

C1104

C1105

12

C1117

22UF *3

SC180P50V2JN-1GP

SCD22U10V3KX-2GP

C1134

C1133

12

SC180P50V2JN-1GP

SCD01U50V2KX-1GP

C1106

C1107

C1102

SCD01U50V2KX-1GP

12

C1107

12

SCD1U10V2KX-4GP

C1121

C1120

12

CPU1E

G4

VDD

H2

VDD

J9

VDD

J11

VDD

J13

VDD

J15

VDD

K6

VDD

K10

VDD

K12

VDD

K14

VDD

L4

VDD

L7

VDD

L9

VDD

L11

VDD

L13

VDD

L15

VDD

M2

VDD

M6

VDD

M8

VDD

M10

VDD

N7

VDD

N9

VDD

N11

VDD

K16

VDDNB

M16

VDDNB

P16

VDDNB

T16

VDDNB

V16

VDDNB

H25

VDDIO

J17

VDDIO

K18

VDDIO

K21

VDDIO

K23

VDDIO

K25

VDDIO

L17

VDDIO

M18

VDDIO

M21

VDDIO

M23

VDDIO

M25

VDDIO

N17

VDDIO

C1135

12

5 OF 6

DANUBE

VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO VDDIO

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

P8 P10 R4 R7 R9 R11 T2 T6 T8 T10 T12 T14 U7 U9 U11 U13 U15 V6 V8 V10 V12 V14 W4 Y2 AC4 AD2

Y25 V25 V23 V21 V18 U17 T25 T23 T21 T18 R17 P25 P23 P21 P18

SCD22U10V3KX-2GP

SC180P50V2JN-1GP

12

Place near to CPU

SC180P50V2JN-1GP

SCD22U10V3KX-2GP

SC22U6D3V5MX-2GP

C1109

SCD22U10V3KX-2GP

C1119

12

SC22U6D3V5MX-2GP

C1110

12

22UF *4

0.22UF *1 180PF *1 10nF*1

C1122

12

SCD01U50V2KX-1GP

C1108

12

SC180P50V2JN-1GP

C1118

12

SCD22U10V3KX-2GP

SC22U6D3V5MX-2GP

C1111

12

SCD22U10V3KX-2GP

C1123

12

0.22UF *4

4.7UF *4 180PF *2

SC22U6D3V5MX-2GP

C1141

C1112

12

SC4D7U6D3V3KX-GP

SCD22U10V3KX-2GP

C1124

C1125

12

C1114

+1.5V_SU S

SC4D7U6D3V3KX-GP

C1126

12

SC4D7U6D3V3KX-GP

C1128

C1127

C1129

12

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU_Power_(4/4)

Size Document N umber Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

11 89Friday, May 07, 2010

1

of

X01

5

4

3

2

1

SSID = N.B

HT_CPU_NB_CAD_H08

HT_CPU_NB_CAD_L08

RS880M : 71.RS880.M05

D D

C C

Place < 100mils from pin C23 and A24 Place < 100mils from pin B25 and B24

B B

A A

LANE REVERSE

A-LINK

5

ALINK_NBRX_SBTX_P020 ALINK_NBRX_SBTX_N020 ALINK_NBRX_SBTX_P120 ALINK_NBRX_SBTX_N120 ALINK_NBRX_SBTX_P220 ALINK_NBRX_SBTX_N220 ALINK_NBRX_SBTX_P320 ALINK_NBRX_SBTX_N320

HT_CPU_NB_CAD_H18 HT_CPU_NB_CAD_L18 HT_CPU_NB_CAD_H28 HT_CPU_NB_CAD_L28 HT_CPU_NB_CAD_H38 HT_CPU_NB_CAD_L38 HT_CPU_NB_CAD_H48 HT_CPU_NB_CAD_L48 HT_CPU_NB_CAD_H58 HT_CPU_NB_CAD_L58 HT_CPU_NB_CAD_H68 HT_CPU_NB_CAD_L68 HT_CPU_NB_CAD_H78 HT_CPU_NB_CAD_L78

HT_CPU_NB_CAD_H88 HT_CPU_NB_CAD_L88 HT_CPU_NB_CAD_H98 HT_CPU_NB_CAD_L98 HT_CPU_NB_CAD_H108 HT_CPU_NB_CAD_L108 HT_CPU_NB_CAD_H118 HT_CPU_NB_CAD_L118 HT_CPU_NB_CAD_H128 HT_CPU_NB_CAD_L128 HT_CPU_NB_CAD_H138 HT_CPU_NB_CAD_L138 HT_CPU_NB_CAD_H148 HT_CPU_NB_CAD_L148 HT_CPU_NB_CAD_H158 HT_CPU_NB_CAD_L158

HT_CPU_NB_CLK_H08 HT_CPU_NB_CLK_L08 HT_CPU_NB_CLK_H18 HT_CPU_NB_CLK_L18

HT_CPU_NB_CTL_H08 HT_CPU_NB_CTL_L08 HT_CPU_NB_CTL_H18 HT_CPU_NB_CTL_L18

R1201 301R2F-GPR1201 301R2F-GP

1 2

PCIE_NRX_GTX_P0 PCIE_NRX_GTX_N0 PCIE_NRX_GTX_P1 PCIE_NRX_GTX_N1 PCIE_NRX_GTX_P2 PCIE_NRX_GTX_N2 PCIE_NRX_GTX_P3 PCIE_NRX_GTX_N3 PCIE_NRX_GTX_P4 PCIE_NRX_GTX_N4 PCIE_NRX_GTX_P5 PCIE_NRX_GTX_N5 PCIE_NRX_GTX_P6 PCIE_NRX_GTX_N6 PCIE_NRX_GTX_P7 PCIE_NRX_GTX_N7 PCIE_NRX_GTX_P8 PCIE_NRX_GTX_N8 PCIE_NRX_GTX_P9 PCIE_NRX_GTX_N9 PCIE_NRX_GTX_P10 PCIE_NRX_GTX_N10 PCIE_NRX_GTX_P11 PCIE_NRX_GTX_N11 PCIE_NRX_GTX_P12 PCIE_NRX_GTX_N12 PCIE_NRX_GTX_P13 PCIE_NRX_GTX_N13 PCIE_NRX_GTX_P14 PCIE_NRX_GTX_N14 PCIE_NRX_GTX_P15 PCIE_NRX_GTX_N15

HT_RXCALP HT_TXCALP HT_RXCALN

Y25 Y24 V22 V23 V25 V24 U24 U25 T25 T24 P22 P23 P25 P24 N24 N25

AC24 AC25

AB25 AB24 AA24 AA25

Y22

Y23 W21 W20

V21

V20

U20

U21

U19

U18

T22

T23

AB23 AA22

M22

M23

R21

R20

C23

A24

U1B

D4 C4

A3 B3

C2 C1

E5 F5

G5 G6 H5 H6

J6 J5 J7 J8 L5 L6

M8

L8 P7

M7

P5

M5 R8

P8

R6 R5

P4 P3 T4 T3

AE3

AD4

AE2 AD3 AD1 AD2

V5

W6

U5 U6 U8 U7

AA8

Y8

AA7

Y7 AA5 AA6

W5

Y5

RS880M-1-GP

4

U1A

HT_RXCA D0P HT_RXCA D0N HT_RXCA D1P HT_RXCA D1N HT_RXCA D2P HT_RXCA D2N HT_RXCA D3P HT_RXCA D3N HT_RXCA D4P HT_RXCA D4N HT_RXCA D5P HT_RXCA D5N HT_RXCA D6P HT_RXCA D6N HT_RXCA D7P HT_RXCA D7N

HT_RXCA D8P HT_RXCA D8N HT_RXCA D9P HT_RXCA D9N HT_RXCA D10P HT_RXCA D10N HT_RXCA D11P HT_RXCA D11N HT_RXCA D12P HT_RXCA D12N HT_RXCA D13P HT_RXCA D13N HT_RXCA D14P HT_RXCA D14N HT_RXCA D15P HT_RXCA D15N

HT_RXCL K0P HT_RXCL K0N HT_RXCL K1P HT_RXCL K1N

HT_RXCT L0P HT_RXCT L0N HT_RXCT L1P HT_RXCT L1N

HT_RXCA LP HT_RXCA LN

RS880M-1-GP

GFX_RX0 P GFX_RX0 N GFX_RX1 P GFX_RX1 N GFX_RX2 P GFX_RX2 N GFX_RX3 P GFX_RX3 N GFX_RX4 P GFX_RX4 N GFX_RX5 P GFX_RX5 N GFX_RX6 P GFX_RX6 N GFX_RX7 P GFX_RX7 N GFX_RX8 P GFX_RX8 N GFX_RX9 P GFX_RX9 N GFX_RX1 0P GFX_RX1 0N GFX_RX1 1P GFX_RX1 1N GFX_RX1 2P GFX_RX1 2N GFX_RX1 3P GFX_RX1 3N GFX_RX1 4P GFX_RX1 4N GFX_RX1 5P GFX_RX1 5N

GPP_RX0 P GPP_RX0 N GPP_RX1 P GPP_RX1 N GPP_RX2 P GPP_RX2 N GPP_RX3 P GPP_RX3 N GPP_RX4 P GPP_RX4 N GPP_RX5 P GPP_RX5 N

SB_RX0P SB_RX0N SB_RX1P SB_RX1N SB_RX2P SB_RX2N SB_RX3P SB_RX3N

PART 1 OF 6

HYPER TRANSPORT CPU I/F

PART 2 OF 6

PCIE I/F GFX

PCIE I/F GPP

PCIE I/F SB

HT_TXCA D0P HT_TXCA D0N HT_TXCA D1P HT_TXCA D1N HT_TXCA D2P HT_TXCA D2N HT_TXCA D3P HT_TXCA D3N HT_TXCA D4P HT_TXCA D4N HT_TXCA D5P HT_TXCA D5N HT_TXCA D6P HT_TXCA D6N HT_TXCA D7P HT_TXCA D7N

HT_TXCA D8P HT_TXCA D8N

HT_TXCA D9P

HT_TXCA D9N HT_TXCA D10P HT_TXCA D10N HT_TXCA D11P HT_TXCA D11N HT_TXCA D12P HT_TXCA D12N HT_TXCA D13P HT_TXCA D13N HT_TXCA D14P HT_TXCA D14N HT_TXCA D15P HT_TXCA D15N

HT_TXCL K0P HT_TXCL K0N HT_TXCL K1P HT_TXCL K1N

HT_TXCT L0P HT_TXCT L0N HT_TXCT L1P HT_TXCT L1N

HT_TXCA LP

HT_TXCA LN

GFX_TX0 P

GFX_TX0 N

GFX_TX1 P

GFX_TX1 N

GFX_TX2 P

GFX_TX2 N

GFX_TX3 P

GFX_TX3 N

GFX_TX4 P

GFX_TX4 N

GFX_TX5 P

GFX_TX5 N

GFX_TX6 P

GFX_TX6 N

GFX_TX7 P

GFX_TX7 N

GFX_TX8 P

GFX_TX8 N

GFX_TX9 P

GFX_TX9 N GFX_TX1 0P GFX_TX1 0N GFX_TX1 1P GFX_TX1 1N GFX_TX1 2P GFX_TX1 2N GFX_TX1 3P GFX_TX1 3N GFX_TX1 4P GFX_TX1 4N GFX_TX1 5P GFX_TX1 5N

GPP_TX0 P

GPP_TX0 N

GPP_TX1 P

GPP_TX1 N

GPP_TX2 P

GPP_TX2 N

GPP_TX3 P

GPP_TX3 N

GPP_TX4 P

GPP_TX4 N

GPP_TX5 P

GPP_TX5 N

SB_TX0P

SB_TX0N

SB_TX1P

SB_TX1N

SB_TX2P

SB_TX2N

SB_TX3P

SB_TX3N

PCE_CAL RP PCE_CAL RN

D24 D25 E24 E25 F24 F25 F23 F22 H23 H22 J25 J24 K24 K25 K23 K22

F21 G21 G20 H21 J20 J21 J18 K17 L19 J19 M19 L18 M21 P21 P18 M18

H24 H25 L21 L20

M24 M25 P19 R18

B24 B25

PCIE_NTX_GRX_C_P0

A5

PCIE_NTX_GRX_C_N0

B5

PCIE_NTX_GRX_C_P1

A4

PCIE_NTX_GRX_C_N1

B4

PCIE_NTX_GRX_C_P2

C3

PCIE_NTX_GRX_C_N2

B2

PCIE_NTX_GRX_C_P3

D1

PCIE_NTX_GRX_C_N3

D2

PCIE_NTX_GRX_C_P4

E2

PCIE_NTX_GRX_C_N4

E1

PCIE_NTX_GRX_C_P5

F4

PCIE_NTX_GRX_C_N5

F3

PCIE_NTX_GRX_C_P6

F1

PCIE_NTX_GRX_C_N6

F2

PCIE_NTX_GRX_C_P7

H4

PCIE_NTX_GRX_C_N7

H3

PCIE_NTX_GRX_C_P8

H1

PCIE_NTX_GRX_C_N8

H2

PCIE_NTX_GRX_C_P9

J2

PCIE_NTX_GRX_C_N9

J1

PCIE_NTX_GRX_C_P10

K4

PCIE_NTX_GRX_C_N10

K3

PCIE_NTX_GRX_C_P11

K1

PCIE_NTX_GRX_C_N11

K2

PCIE_NTX_GRX_C_P12

M4

PCIE_NTX_GRX_C_N12

M3

PCIE_NTX_GRX_C_P13

M1

PCIE_NTX_GRX_C_N13

M2

PCIE_NTX_GRX_C_P14

N2

PCIE_NTX_GRX_C_N14

N1

PCIE_NTX_GRX_C_P15

P1

PCIE_NTX_GRX_C_N15

P2

AC1 AC2 AB4 AB3 AA2 AA1 Y1 Y2 Y4 Y3 V1 V2

ALINK_NBTX_SBRX_C_P0

AD7

ALINK_NBTX_SBRX_C_N0

AE7

ALINK_NBTX_SBRX_C_P1

AE6

ALINK_NBTX_SBRX_C_N1

AD6

ALINK_NBTX_SBRX_C_P2

AB6

ALINK_NBTX_SBRX_C_N2

AC6

ALINK_NBTX_SBRX_C_P3

AD5

ALINK_NBTX_SBRX_C_N3

AE5

PCE_PCAL

AC8

PCE_NCAL

AB8

HT_NB_CPU_CAD_H0 8 HT_NB_CPU_CAD_L0 8 HT_NB_CPU_CAD_H1 8 HT_NB_CPU_CAD_L1 8 HT_NB_CPU_CAD_H2 8 HT_NB_CPU_CAD_L2 8 HT_NB_CPU_CAD_H3 8 HT_NB_CPU_CAD_L3 8 HT_NB_CPU_CAD_H4 8 HT_NB_CPU_CAD_L4 8 HT_NB_CPU_CAD_H5 8 HT_NB_CPU_CAD_L5 8 HT_NB_CPU_CAD_H6 8 HT_NB_CPU_CAD_L6 8 HT_NB_CPU_CAD_H7 8 HT_NB_CPU_CAD_L7 8

HT_NB_CPU_CAD_H8 8 HT_NB_CPU_CAD_L8 8 HT_NB_CPU_CAD_H9 8 HT_NB_CPU_CAD_L9 8 HT_NB_CPU_CAD_H10 8 HT_NB_CPU_CAD_L10 8 HT_NB_CPU_CAD_H11 8 HT_NB_CPU_CAD_L11 8 HT_NB_CPU_CAD_H12 8 HT_NB_CPU_CAD_L12 8 HT_NB_CPU_CAD_H13 8 HT_NB_CPU_CAD_L13 8 HT_NB_CPU_CAD_H14 8 HT_NB_CPU_CAD_L14 8 HT_NB_CPU_CAD_H15 8 HT_NB_CPU_CAD_L15 8

HT_NB_CPU_CLK_H0 8 HT_NB_CPU_CLK_L0 8 HT_NB_CPU_CLK_H1 8 HT_NB_CPU_CLK_L1 8

HT_NB_CPU_CTL_H0 8 HT_NB_CPU_CTL_L0 8 HT_NB_CPU_CTL_H1 8 HT_NB_CPU_CTL_L1 8

HT_TXCALN

R1203 1K27R2F-L-GPR1203 1K27R2F-L-GP R1204 2KR2F-3-GPR1204 2KR2F-3-GP

R1202 301R2F-GPR1202 301R2F-GP

1 2

C1201 SCD1U16V2KX-3GPC1201 SCD1U16V2KX-3GP

1 2

C1202 SCD1U16V2KX-3GPC1202 SCD1U16V2KX-3GP

1 2

C1203 SCD1U16V2KX-3GPC1203 SCD1U16V2KX-3GP

1 2

C1204 SCD1U16V2KX-3GPC1204 SCD1U16V2KX-3GP

1 2

C1205 SCD1U16V2KX-3GPC1205 SCD1U16V2KX-3GP

1 2

C1206 SCD1U16V2KX-3GPC1206 SCD1U16V2KX-3GP

1 2

C1207 SCD1U16V2KX-3GPC1207 SCD1U16V2KX-3GP

1 2

C1208 SCD1U16V2KX-3GPC1208 SCD1U16V2KX-3GP

1 2

C1209 SCD1U16V2KX-3GPC1209 SCD1U16V2KX-3GP

1 2

C1210 SCD1U16V2KX-3GPC1210 SCD1U16V2KX-3GP

1 2

C1211 SCD1U16V2KX-3GPC1211 SCD1U16V2KX-3GP

1 2

C1212 SCD1U16V2KX-3GPC1212 SCD1U16V2KX-3GP

1 2

C1213 SCD1U16V2KX-3GPC1213 SCD1U16V2KX-3GP

1 2

C1214 SCD1U16V2KX-3GPC1214 SCD1U16V2KX-3GP

1 2

C1215 SCD1U16V2KX-3GPC1215 SCD1U16V2KX-3GP

1 2

C1216 SCD1U16V2KX-3GPC1216 SCD1U16V2KX-3GP

1 2

C1217 SCD1U16V2KX-3GPC1217 SCD1U16V2KX-3GP

1 2

C1218 SCD1U16V2KX-3GPC1218 SCD1U16V2KX-3GP

1 2

C1219 SCD1U16V2KX-3GPC1219 SCD1U16V2KX-3GP

1 2

C1220 SCD1U16V2KX-3GPC1220 SCD1U16V2KX-3GP

1 2

C1221 SCD1U16V2KX-3GPC1221 SCD1U16V2KX-3GP

1 2

C1222 SCD1U16V2KX-3GPC1222 SCD1U16V2KX-3GP

1 2

C1223 SCD1U16V2KX-3GPC1223 SCD1U16V2KX-3GP

1 2

C1224 SCD1U16V2KX-3GPC1224 SCD1U16V2KX-3GP

1 2

C1225 SCD1U16V2KX-3GPC1225 SCD1U16V2KX-3GP

1 2

C1226 SCD1U16V2KX-3GPC1226 SCD1U16V2KX-3GP

1 2

C1227 SCD1U16V2KX-3GPC1227 SCD1U16V2KX-3GP

1 2

C1228 SCD1U16V2KX-3GPC1228 SCD1U16V2KX-3GP

1 2

C1229 SCD1U16V2KX-3GPC1229 SCD1U16V2KX-3GP

1 2

C1230 SCD1U16V2KX-3GPC1230 SCD1U16V2KX-3GP

1 2

C1231 SCD1U16V2KX-3GPC1231 SCD1U16V2KX-3GP

1 2

C1232 SCD1U16V2KX-3GPC1232 SCD1U16V2KX-3GP

1 2

C1237 SCD1U16V2KX-3GPC1237 SCD1U16V2KX-3GP

1 2

C1238 SCD1U16V2KX-3GPC1238 SCD1U16V2KX-3GP

1 2

C1239 SCD1U16V2KX-3GPC1239 SCD1U16V2KX-3GP

1 2

C1240 SCD1U16V2KX-3GPC1240 SCD1U16V2KX-3GP

1 2

C1241 SCD1U16V2KX-3GPC1241 SCD1U16V2KX-3GP

1 2

C1242 SCD1U16V2KX-3GPC1242 SCD1U16V2KX-3GP

1 2

C1243 SCD1U16V2KX-3GPC1243 SCD1U16V2KX-3GP

1 2

C1244 SCD1U16V2KX-3GPC1244 SCD1U16V2KX-3GP

1 2

1 2 1 2

Place < 100mils from pin AC8 and AB8

3

PCIE_NTX_GRX_P0 PCIE_NTX_GRX_N0 PCIE_NTX_GRX_P1 PCIE_NTX_GRX_N1 PCIE_NTX_GRX_P2 PCIE_NTX_GRX_N2 PCIE_NTX_GRX_P3 PCIE_NTX_GRX_N3 PCIE_NTX_GRX_P4 PCIE_NTX_GRX_N4 PCIE_NTX_GRX_P5 PCIE_NTX_GRX_N5 PCIE_NTX_GRX_P6 PCIE_NTX_GRX_N6 PCIE_NTX_GRX_P7 PCIE_NTX_GRX_N7 PCIE_NTX_GRX_P8 PCIE_NTX_GRX_N8 PCIE_NTX_GRX_P9 PCIE_NTX_GRX_N9 PCIE_NTX_GRX_P10 PCIE_NTX_GRX_N10 PCIE_NTX_GRX_P11 PCIE_NTX_GRX_N11 PCIE_NTX_GRX_P12 PCIE_NTX_GRX_N12 PCIE_NTX_GRX_P13 PCIE_NTX_GRX_N13 PCIE_NTX_GRX_P14 PCIE_NTX_GRX_N14 PCIE_NTX_GRX_P15 PCIE_NTX_GRX_N15

ALINK_NBTX_SBRX_P0 20 ALINK_NBTX_SBRX_N0 20 ALINK_NBTX_SBRX_P1 20 ALINK_NBTX_SBRX_N1 20 ALINK_NBTX_SBRX_P2 20 ALINK_NBTX_SBRX_N2 20 ALINK_NBTX_SBRX_P3 20 ALINK_NBTX_SBRX_N3 20

+1.1V_RUN

2

PCIE_NTX_GRX_P[0..15] PCIE_NTX_GRX_N[0..15]

PCIE_NRX_GTX_P[0..15] PCIE_NRX_GTX_N[0..15]

LANE REVERSE

A-LINK

Title

ize Document Number Rev

Size Document Number Rev

S

Custom

Date: Sheet of

PCIE_NTX_GRX_P[0..15] 80 PCIE_NTX_GRX_N[0..15] 80

PCIE_NRX_GTX_P[0..15] 80 PCIE_NRX_GTX_N[0..15] 80

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

RS880M_HT LINK&PCIe(1/4)

Arsenal DJ1 Discrete

12 89Friday, May 07, 2010

1

X01

5

SSID = N.B

RS880M : 71.RS880.M05

D D

+1.8V_RUN

1 2

BLM15AG221SS1D-GP

220 ohm 300mA

1 2

BLM15AG221SS1D-GP

SC22U6D3V5MX-2GP

220 ohm 300mA

C1301

12

C C

B B

CPU_LDT_STOP#10,20

ALLOW_LDTSTOP20

A A

Layout Note Trace at least 15 mil

L1301

+1.8V_VDDA18HTPLL

SC2D2U6D3V3KX-GP

12

L1302

+1.8V_VDDA18PCIEPLL

SC2D2U6D3V3KX-GP

12

R1309

300R2J-4-GP

R1316 0R0402-PADR1316 0R0402-PAD

20mA

SCD1U10V2KX-4GP

C1302

C1303

12

120mA

SCD1U10V2KX-4GP

C1305

C1304

12

R1322 0R2J-2-GP

1 2

U1301

1

1A

2

GND 2A32Y

SN74LVC2G07DCKR-GP

X01

1 2

5

+1.8V_RUN+1.5V_RUN

12

R1311

DY

6

1Y

5

VCC

4

+1.8V_RUN

12

R1315

R1315 1KR2J-1-GP

1KR2J-1-GP

ALLOW_LDTSTOP: 1 = LDTSTOP# can be asserted 0 = LDTSTOP# has to be de-asserted

R1311 2K2R2J-2-GP

2K2R2J-2-GP

NB_LDT_STOP#

12

C1306

SCD1U10V2KX-4GP

NB_ALLOW_LDTSTOP

4

UMA

GREEN/BLUE: Connected to GND through two separate 150-



1% resistors.

RED: Connected to GND through two separate 140resistors.

NB_VGA_HSYNC NB_VGA_VSYNC

Trace at least 10 mil

+1.8V_VDDA18HTPLL

+1.8V_VDDA18PCIEPLL

PLTRST#_NB_GPU20,37

R1312

4K7R2F-GP

R1313

4K7R2F-GP

4

+1.1V_RUN

1 2

NB_PWRGD_IN41

0423

NB_REFCLK_N

12

CLK_NBHT_CLK7 CLK_NBHT_CLK#7

NB_14M_CLK7

NB_GFX_CLK7 NB_GFX_CLK#7

NB_GPPSB_CLK7 NB_GPPSB_CLK#7

R1318

R1318 2KR2J-1-GP

2KR2J-1-GP

NB_LDT_STOP# NB_ALLOW_LDTSTOP

TP1307TP1307

1

TP1308TP1308

1

TP1301TP1301 TP1302TP1302 TP1303TP1303 TP1304TP1304

TP1305TP1305

1 2

R1319 150R2F-1-GPR1319 150R2F-1-GP

3



1%

DIS

TV_OUT

DIS

R1306

1 2

715R2F-GP

NB_GPP_CLK NB_GPP_CLK#

TP_NB_DDC_DATA0

1

TP_NB_DDC_CLK0

1

TP_NB_DDC_CLK1

1

TP_NB_DDC_DATA1

1

TP_NB_RESERVED

1

RS780_AUX_CAL

3

DAC_RSET

+3.3V_RUN

3KR2J-2-GP

12

3KR2J-2-GP

12

DY

U1C

F12

AVDD1

E12

AVDD2

F14

AVDDDI

G15

AVSSDI

H15

AVDDQ

H14

AVSSQ

E17

C_Pr

F17

Y

F15

COMP_Pb

G18

RED

G17

REDb

E18

GREEN

F18

GREENb

E19

BLUE

F19

BLUEb

A11

DAC_HSYNC

B11

DAC_VSYNC

F8

DAC_SCL

E8

DAC_SDA

G14

DAC_RSE T

A12

PLLVDD

D14

PLLVDD1 8

B12

PLLVSS

H17

VDDA18H TPLL

D7

VDDA18P CIEPLL1

E7

VDDA18P CIEPLL2

D8

SYSRESET#

A10

POWE RGOOD

C10

LDTSTOP #

C12

ALLOW _LDTSTOP

C25

HT_REFC LKP

C24

HT_REFC LKN

E11

REFCLK_ P/OSCIN

F11

REFCLK_ N

T2

GFX_REF CLKP

T1

GFX_REF CLKN

U1

GPP_REF CLKP

U2

GPP_REF CLKN

V4

GPPSB_R EFCLKP

V3

GPPSB_R EFCLKN

B9

I2C_CLK

A9

I2C_DATA

B8

DDC_DAT A0/AUX0N

A8

DDC_CLK 0/AUX0P

B7

DDC_CLK 1/AUX1P

A7

DDC_DAT A1/AUX1N

B10

STRP_DA TA

G11

RESERVE D

C8

AUX_CAL

RS880M-1-GP

2

1

STRAP_DEBUG_BUS_GPIO_ENABLE# ( RS880M use DAC_VSYNC)

Enables debug bus access thro ugh memory I/O pads and GPIOs. 1 : Disable

3KR2J-2-GP

12

R1303

R1302

NB_VGA_VSYNC NB_VGA_HSYNC

3KR2J-2-GP

12

R1305

R1304

DY

*

0 : Enable

SIDE_PORT_EN# ( RS880M use DAC_HSYNC)

1 = Memory Side port Not avai lable

*

0 = Memory Side port availabl e

LOAD_EEPROM_STRAPS#(RS880M use SUS_STAT#)

Selects Loading of STRAPS Fro m EEPROM 1 : use Default Values

*

0 : I2C Master can load strap values from EEPROM if connect ed, or use default values if not connected

*DEFAULT

TXCLK_L P TXCLK_L N TXCLK_U P

TXCLK_U N

VDDLTP1 8 VSSLTP1 8

VSSLT1 VSSLT2 VSSLT3 VSSLT4 VSSLT5 VSSLT6 VSSLT7

HPD

A22 B22 A21 B21 B20 A20 A19 B19

B18 A18 A17 B17 D20 D21 D18 D19

B16 A16 D16 D17

A13 B13

A15 B15 A14 B14

C14 D15 C16 C18 C20 E20 C22

E9 F7 G12

TMDS_HPD

D9

HPD

D10

NB_SUS_STAT#

D12

AE8 AD8

TESTMODE_NB

D13

Title

Size Document Number Rev

Custom

Date: Sheet of

1 1

R1317

1 2

DY

0R2J-2-GP

1K8R2F-GP

12

R1320

RS880M_LVDS&CRT_(2/4)

Arsenal DJ1 Discrete

NB_SUS_STAT#

TP1311TP1311 TP1306TP1306

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

+3.3V_RUN

DY

SUS_STAT# 21

13 89Friday, May 07, 2010

R1314

R1314 4K7R2J-2-GP

4K7R2J-2-GP

1 2

12

R1321

R1321 3KR2J-2-GP

3KR2J-2-GP

X01

20mA

120mA

PART 3 OF 6

CRT/TVOUT

PM

CLOCKs PLL PWR

MIS.

LVTM

TXOUT_U 0P TXOUT_U 0N TXOUT_U 1P TXOUT_U 1N TXOUT_U 2P TXOUT_U 2N TXOUT_U 3P TXOUT_U 3N

LVDS_DIGO N

LVDS_BL ON

LVDS_EN A_BL

THERMAL DIODE_P THERMAL DIODE_N

2

TXOUT_L 0P TXOUT_L 0N TXOUT_L 1P TXOUT_L 1N TXOUT_L 2P TXOUT_L 2N TXOUT_L 3P TXOUT_L 3N

VDDLT18 _1

VDDLT18 _2

VDDLT33 _1

VDDLT33 _2

TMDS_HP D

SUS_STA T#

TESTMOD E

5

4

3

2

1

SSID = N.B

RS880M : 71.RS880.M05

D D

U1D

AB12

MEM_A0

AE16

MEM_A1

V11

MEM_A2

AE15

MEM_A3

AA12

MEM_A4

AB16

MEM_A5

AB14

MEM_A6

AD14

MEM_A7

AD13

MEM_A8

AD15

MEM_A9

AC16

MEM_A10

AE13

MEM_A11

AC14

MEM_A12

Y14

MEM_A13

AD16

MEM_BA0

AE17

MEM_BA1

AD17

MEM_BA2

W12

MEM_RAS#

Y12

MEM_CAS#

AD18

C C

AB13 AB18

W14

AE12 AD12

V14

V15

MEM_WE# MEM_CS# MEM_CKE MEM_ODT

MEM_CKP MEM_CKN

MEM_COMPP MEM_COMPN

RS880M-1 -GP

PAR 4 OF 6

MEM_DQ0/DVO_VSYNC MEM_DQ1/DVO_HSYNC

MEM_DQ2/DVO_DE

MEM_DQ3/DVO_D0

MEM_DQ4 MEM_DQ5/DVO_D1 MEM_DQ6/DVO_D2 MEM_DQ7/DVO_D4 MEM_DQ8/DVO_D3 MEM_DQ9/DVO_D5

MEM_DQ10/DVO_D6 MEM_DQ11/DVO_D7

MEM_DQ12

MEM_DQ13/DVO_D9 MEM_DQ14/DVO_D10 MEM_DQ15/DVO_D11

MEM_DQS0P/DVO_IDCKP

MEM_DQS0N/DVO_IDCKN

MEM_DQS1P MEM_DQS1N

MEM_DM0

MEM_DM1/DVO_D8

SBD_MEM/DVO_I/F

IOPLLVDD18

IOPLLVDD

IOPLLVSS

MEM_VREF

AA18 AA20 AA19 Y19 V17 AA17 AA15 Y15 AC20 AD19 AE22 AC18 AB20 AD22 AC22 AD21

Y17 W18 AD20 AE21

W17 AE19

AE23 AE24

AD23

AE18

15mA

+1.8V_RU N

+1.1V_RU N

26mA

SBD MEM disable SBD MEM disable

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

RS880M_SidePort_(3/4)

Size Document N umber Rev

A3

Date: Sheet of

RS880M_SidePort_(3/4)

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

14 89Friday, May 07, 2010

1

X01

5

4

3

2

1

SSID = N.B

RS880M : 71.RS880.M05

D D

+1.1V_RU N

C C

+1.1V_RU N

+1.8V_RU N

220 ohm @ 100MHz,2A

B B

+1.8V_RU N

R1501

1 2

0R3J-0-U-G P

R1502

1 2

0R3J-0-U-G P

R1503

1 2

0R3J-0-U-G P

L1505

1 2

PBY160808 T-221Y-N-GP

40 mils

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

C1501

12

40 mils

SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP

C1511

12

20 mils

SCD1U10V2KX-4GP

SC4D7U6D3V3KX-GP

C1514

12

40 mils

SC4D7U6D3V3KX-GP

C1528

12

15 mils

SC1U6D3V2KX-GP

C1534

12

Layout Note

1.1V(0.6A) for VDDHT

+1.1V_RU N_VDDHT

SCD1U10V2KX-4GP

C1503

C1502

12

1.1V(0.7A) for VDDHTRX

+1.1V_RU N_VDDHTRX

SCD1U10V2KX-4GP

C1507

12

.2V(0.4A) for VDDHTTX

1

+1.2V_RU N_VDDHTTX

SCD1U10V2KX-4GP

C1515

12

1.8V(0.7A) for VDDA18PCIE

+1.8V_RU N_VDDA18PCIE

SCD1U10V2KX-4GP

C1529

12

C1503

C1506

12

SCD1U10V2KX-4GP

C1512

C1513

12

SCD1U10V2KX-4GP

C1516

C1517

12

SCD1U10V2KX-4GP

C1531

C1530

12

1.8V(0.01A) for VDD18

C1518

SCD1U10V2KX-4GP

C1533

C1532

12

SBD MEM disable

K16

M16 P16 R16 T16

H18 G19 F20 E21 D22 B23 A23

AE25 AD24 AC23 AB22 AA21

Y20

W19

V18 U17 T17 R17 P17 M17

P10 K10 M10

T10 R10

AA9 AB9 AD9 AE9 U10

AE11 AD11

J17

L16

J10

L10 W9

H9

Y9

F9

G9

U1E

VDDHT_1 VDDHT_2 VDDHT_3 VDDHT_4 VDDHT_5 VDDHT_6 VDDHT_7

VDDHTRX_1 VDDHTRX_2 VDDHTRX_3 VDDHTRX_4 VDDHTRX_5 VDDHTRX_6 VDDHTRX_7

VDDHTTX_1 VDDHTTX_2 VDDHTTX_3 VDDHTTX_4 VDDHTTX_5 VDDHTTX_6 VDDHTTX_7 VDDHTTX_8 VDDHTTX_9 VDDHTTX_10 VDDHTTX_11 VDDHTTX_12 VDDHTTX_13

VDDA18PCIE_1 VDDA18PCIE_2 VDDA18PCIE_3 VDDA18PCIE_4 VDDA18PCIE_5 VDDA18PCIE_6 VDDA18PCIE_7 VDDA18PCIE_8 VDDA18PCIE_9 VDDA18PCIE_10 VDDA18PCIE_11 VDDA18PCIE_12 VDDA18PCIE_13 VDDA18PCIE_14 VDDA18PCIE_15

VDD18_1 VDD18_2 VDD18_MEM1 VDD18_MEM2

RS880M-1 -GP

PART 5/6

POWER

VDDPCIE_1 VDDPCIE_2 VDDPCIE_3 VDDPCIE_4 VDDPCIE_5 VDDPCIE_6 VDDPCIE_7 VDDPCIE_8

VDDPCIE_9 VDDPCIE_10 VDDPCIE_11 VDDPCIE_12 VDDPCIE_13 VDDPCIE_14 VDDPCIE_15 VDDPCIE_16 VDDPCIE_17

VDDC_1 VDDC_2 VDDC_3 VDDC_4 VDDC_5 VDDC_6 VDDC_7 VDDC_8

VDDC_9 VDDC_10 VDDC_11 VDDC_12 VDDC_13 VDDC_14 VDDC_15 VDDC_16 VDDC_17 VDDC_18 VDDC_19 VDDC_20 VDDC_21 VDDC_22

VDD_MEM1 VDD_MEM2 VDD_MEM3 VDD_MEM4 VDD_MEM5 VDD_MEM6

VDD33_1 VDD33_2

A6 B6 C6 D6 E6 F6 G7 H8 J9 K9 M9 L9 P9 R9 T9 V9 U9

K12 J14 U16 J11 K15 M12 L14 L11 M13 M15 N12 N14 P11 P13 P14 R12 R15 T11 T15 U12 T14 J16

AE10 AA11 Y11 AD10 AB10 AC10

H11 H12

1.1V(2.5A) for VDDPCIE

SCD1U10V2KX-4GP

C1508

12

1.1V(10A) for VDDC

SCD1U10V2KX-4GP

C1519

12

SC1U6D3V2KX-GP

C1504

C1509

12

SCD1U10V2KX-4GP

12

C1509

12

SCD1U10V2KX-4GP

C1521

C1520

12

SBD MEM disable

3.3V(0.06A) for VDD33

SCD1U10V2KX-4GP

C1535

C1536

12

C1536

12

SC4D7U6D3V3KX-GP

C1510

SCD1U10V2KX-4GP

C1522

1

30 mils

C1505

12

550 mils

SCD1U10V2KX-4GP

C1523

12

15 mils

Layout Note

U1F

A25

G22 G24 G25 H19

M20 N22 P20 R19 R22 R24 R25 H20 U22

V19 W22 W24 W25

Y21

AD25

M14

N13

P12

P15

R11

R14

U14

U11

U15

V12 W11 W15

AC12 AA14

Y18

AB11 AB15 AB17 AB19 AE20 AB21

K11

D23 E22

J22 L17 L22 L24 L25

L12

T12

VSSAHT1 VSSAHT2 VSSAHT3 VSSAHT4 VSSAHT5 VSSAHT6 VSSAHT7 VSSAHT8 VSSAHT9 VSSAHT10 VSSAHT11 VSSAHT12 VSSAHT13 VSSAHT14 VSSAHT15 VSSAHT16 VSSAHT17 VSSAHT18 VSSAHT19 VSSAHT20 VSSAHT21 VSSAHT22 VSSAHT23 VSSAHT24 VSSAHT25 VSSAHT26 VSSAHT27

VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34

RS880M-1 -GP

PART 6/6

+1.1V_RU N

0423

+NB_VCORE

+1.1V_RU N

SCD1U10V2KX-4GP

C1525

C1524

12

SC10U6D3V5KX-1GP

C1527

C1526

12

+3.3V_RU N

GROUND

VSSAPCIE1 VSSAPCIE2 VSSAPCIE3 VSSAPCIE4 VSSAPCIE5 VSSAPCIE6 VSSAPCIE7 VSSAPCIE8

VSSAPCIE9 VSSAPCIE10 VSSAPCIE11 VSSAPCIE12 VSSAPCIE13 VSSAPCIE14 VSSAPCIE15 VSSAPCIE16 VSSAPCIE17 VSSAPCIE18 VSSAPCIE19 VSSAPCIE20 VSSAPCIE21 VSSAPCIE22 VSSAPCIE23 VSSAPCIE24 VSSAPCIE25 VSSAPCIE26 VSSAPCIE27 VSSAPCIE28 VSSAPCIE29 VSSAPCIE30 VSSAPCIE31 VSSAPCIE32 VSSAPCIE33 VSSAPCIE34 VSSAPCIE35 VSSAPCIE36 VSSAPCIE37 VSSAPCIE38 VSSAPCIE39 VSSAPCIE40

VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9

VSS10

A2 B1 D3 D5 E4 G1 G2 G4 H7 J4 R7 L1 L2 L4 L7 M6 N4 P6 R1 R2 R4 V7 U4 V8 V6 W1 W2 W4 W7 W8 Y6 AA4 AB5 AB1 AB7 AC3 AC4 AE1 AE4 AB2

AE14 D11 G8 E14 E15 J15 J12 K14 M11 L15

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

RS880M_PWR&GD_(4/4)

A3

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

15 89Friday, May 07, 2010

1

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

16 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

17 89Friday, May 07, 2010

X01

5

MEM_MA_ADD[0..15]9

D D

MEM_MA_BANK29

MEM_MA_BANK09 MEM_MA_BANK19

M_A_DQ[63..0]9

C C

M_A_DQS#09 M_A_DQS#19 M_A_DQS#29 M_A_DQS#39

MEM_MA0_ODT09 MEM_MA0_ODT19

DDR3_A_DR AMRST#9

M_A_DQS#49 M_A_DQS#59 M_A_DQS#69 M_A_DQS#79

M_A_DQS09 M_A_DQS19 M_A_DQS29 M_A_DQS39 M_A_DQS49 M_A_DQS59 M_A_DQS69 M_A_DQS79

0423

SCD1U10V2KX- 5GP

12

DY

C1822

+0.75V_DDR_VT T

B B

+V_DDR_RE F

SCD1U10V2KX-4GP

C1810

SCD1U10V2KX-4GP

C1811

12

MEM_MA_ADD0 MEM_MA_ADD1 MEM_MA_ADD2 MEM_MA_ADD3 MEM_MA_ADD4 MEM_MA_ADD5 MEM_MA_ADD6 MEM_MA_ADD7 MEM_MA_ADD8 MEM_MA_ADD9 MEM_MA_ADD10 MEM_MA_ADD11 MEM_MA_ADD12 MEM_MA_ADD13 MEM_MA_ADD14 MEM_MA_ADD15

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

4

98 97 96 95 92 91 90 86 89 85

107

84 83

119

80 78 79

109 108

5

7 15 17

4

6 16 18 21 23 33 35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68 70

129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

10 27 45 62

135 152 169 186

12 29 47 64

137 154 171 188

116 120

126

1

30

203 204

DM1

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2

BA0 BA1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12

2mA

DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

VREF_CA

18uA

VREF_DQ

RESET#

VTT1

500mA

VTT2

DDR3-204P- 41-GP-U

62.10017.N41

62.10017.N41 H =5.2mm

RAS#

CAS#

CKE0 CKE1

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

CS0# CS1#

CK0#

CK1#

3

NP1

NP2

110 113

WE#

115

114 121

73 74

101

CK0

103

102

CK1

104

M_A_DM0

11

DM0

M_A_DM1

28

DM1

M_A_DM2

46

DM2

M_A_DM3

63

DM3

M_A_DM4

136

DM4

M_A_DM5

153

DM5

M_A_DM6

170

DM6

M_A_DM7

187

DM7

200

SDA

202

SCL

PM_EXTTS#0

198

199

197

SA0

201

SA1

77 122 125

3.5A

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

+1.5V_SUS

MEM_MA_RAS# 9 MEM_MA_WE# 9 MEM_MA_CAS# 9

MEM_MA0_CS#0 9 MEM_MA0_CS#1 9

MEM_MA_CKE0 9 MEM_MA_CKE1 9

MEM_MA_CLK0_P 9 MEM_MA_CLK0_N 9

MEM_MA_CLK1_P 9 MEM_MA_CLK1_N 9

M_A_DM[7..0] 9

SB_SMBDATA 7,19,21,76 SB_SMBCLK 7,19,21,76

Layout Note: Place these Caps near SO-DIMMA.

12

C1802

C1802 SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

+3.3V_RUN

SODIMM A DECOUPLING (ONE CAP PER POWER PIN)

+1.5V_SUS

12

C1805

C1806

C1804

SCD1U16V2KX-3GP

C1814

C1813

C1812

SC10U10V5ZY-1GP

DY

12

DY

Note: If SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

12

C1808

C1807

C1809

SCD1U16V2KX-3GP

C1815

C1817

C1816

SC10U10V5ZY-1GP

12

DY

12

DY

PM_EXTTS#0

0423

12

TC1801

TC1801 SE330U2VDM-L- GP

SE330U2VDM-L- GP

2

1 2

DY

1

+1.5V_SUS

R18064K7R2J-2-GPDYR18064K7R2J-2-GP

Place these caps close to VTT1 and

A A

VTT2.

5

C1819

12

SC4D7U6D3V3KX-GP

C1820

12

C1821

SCD1U16V2KX-3GP

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Size Document Num ber Rev

Date: Sheet of

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

DDR3-SODIMM1

Arsenal DJ1 Discrete

1

X01

18 89Friday, May 07, 2010

X01

5

MEM_MB_ADD[0..15]9

D D

C C

B B

+V_DDR_RE F

SCD1U10V2KX-4GP

C1904

C1905

12

Place these caps close to VTT1 and VTT2.

A A

MEM_MB_BANK29

MEM_MB_BANK09 MEM_MB_BANK19

M_B_DQ[63..0]9

M_B_DQS#09 M_B_DQS#19 M_B_DQS#29 M_B_DQS#39 M_B_DQS#49 M_B_DQS#59 M_B_DQS#69 M_B_DQS#79

M_B_DQS09 M_B_DQS19 M_B_DQS29 M_B_DQS39 M_B_DQS49 M_B_DQS59 M_B_DQS69 M_B_DQS79

MEM_MB0_ODT09

SCD1U10V2KX-4GP

MEM_MB0_ODT19

DDR3_B_DR AMRST#9

C1921

SCD1U10V2KX- 5GP

0423

+0.75V_DDR_VT T

12

C1919

C1920

C1918

SC4D7U6D3V3KX-GP

C1920

SCD1U16V2KX-3GP

DY

12

DY

12

MEM_MB_ADD0 MEM_MB_ADD1 MEM_MB_ADD2 MEM_MB_ADD3 MEM_MB_ADD4 MEM_MB_ADD5 MEM_MB_ADD6 MEM_MB_ADD7 MEM_MB_ADD8 MEM_MB_ADD9 MEM_MB_ADD10 MEM_MB_ADD11 MEM_MB_ADD12 MEM_MB_ADD13 MEM_MB_ADD14 MEM_MB_ADD15

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

4

DM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P- 40-GP-U

62.10017.N11

H = 9.2mm

500mA

NP1

NP2

110

RAS#

113

WE#

115

CAS#

114

CS0#

121

CS1#

73

CKE0

74

CKE1

101

CK0

103

CK0#

102

CK1

104

CK1#

M_B_DM0

11

DM0

M_B_DM1

28

DM1

M_B_DM2

46

DM2

M_B_DM3

63

DM3

M_B_DM4

136

DM4

M_B_DM5

153

DM5

M_B_DM6

170

DM6

M_B_DM7

187

DM7

200

SDA

202

SCL

PM_EXTTS#1

198

EVENT#

199

VDDSPD

2mA

197

SA0

201

SA1

77

NC#1

122

NC#2

125

NC#/TEST

18uA

3.5A

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

SO-DIMMB is placed farther from the Processor than SO-DIMMA

Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34

+1.5V_SUS

MEM_MB_RAS# 9 MEM_MB_WE# 9 MEM_MB_CAS# 9

MEM_MB0_CS#0 9 MEM_MB0_CS#1 9

MEM_MB_CKE0 9 MEM_MB_CKE1 9

MEM_MB_CLK0_P 9 MEM_MB_CLK0_N 9

MEM_MB_CLK1_P 9 MEM_MB_CLK1_N 9

M_B_DM[7..0] 9

+3.3V_RUN

3

SB_SMBDATA 7,18,21,76 SB_SMBCLK 7,18,21,76

Layout Note: Place these Caps near SO-DIMMB.

12

C1902

C1902 SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

+3.3V_RUN

C1906

C1912

+1.5V_SUS

12

SCD1U16V2KX-3GP

SC10U10V5ZY-1GP

12

DY

2

+1.5V_SUS

PM_EXTTS#1

1 2

DY

R19064K7R2J-2-G PDYR19064K7R2J-2-G P

SODIMM B DECOUPLING (ONE CAP PER POWER PIN)

C1907

C1913

12

C1908

SCD1U16V2KX-3GP

C1914

SC10U10V5ZY-1GP

12

DY

12

C1910

C1909

C1911

SCD1U16V2KX-3GP

C1916

C1915

C1917

SC10U10V5ZY-1GP

12

DY

12

DY

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Size Document Num ber Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

DDR3-SODIMM2

Arsenal DJ1 Discrete

1

X01

19 89Friday, May 07, 2010

X01

5

SSID = S.B

C2001 SC150P5 0V2KX-GPC2001 SC150 P50V2KX-GP

1 2

ALINK_NBR X_SBTX_P012 ALINK_NBR X_SBTX_N012 ALINK_NBR X_SBTX_P112

LAN

WLAN

ALINK_NBR X_SBTX_N112 ALINK_NBR X_SBTX_P212 ALINK_NBR X_SBTX_N212 ALINK_NBR X_SBTX_P312 ALINK_NBR X_SBTX_N312

ALINK_NBT X_SBRX_P012 ALINK_NBT X_SBRX_N012 ALINK_NBT X_SBRX_P112 ALINK_NBT X_SBRX_N112 ALINK_NBT X_SBRX_P212 ALINK_NBT X_SBRX_N212 ALINK_NBT X_SBRX_P312 ALINK_NBT X_SBRX_N312

+1.1V_RU N_PCIE_VDDR

PCIE_TXN176

PCIE_TXN076

PCIE_TXP176

PCIE_TXP076

D D

Place R <100mils form p

ins AD29,AD28

SB820M: 71.SB820.M02

R2024 22R2J-2-GPR2024 22R2J-2-G P

C2002 SCD1U16 V2KX-3GPC2002 SCD1U16 V2KX-3GP

1 2

C2003 SCD1U16 V2KX-3GPC2003 SCD1U16 V2KX-3GP

1 2

C2004 SCD1U16 V2KX-3GPC2004 SCD1U16 V2KX-3GP

1 2

C2005 SCD1U16 V2KX-3GPC2005 SCD1U16 V2KX-3GP

1 2

C2006 SCD1U16 V2KX-3GPC2006 SCD1U16 V2KX-3GP

1 2

C2007 SCD1U16 V2KX-3GPC2007 SCD1U16 V2KX-3GP

1 2

C2008 SCD1U16 V2KX-3GPC2008 SCD1U16 V2KX-3GP

1 2

C2009 SCD1U16 V2KX-3GPC2009 SCD1U16 V2KX-3GP

1 2

R2002 590R2F-GPR2002 590R2F-GP

1 2

R2007 2KR2F-3-GPR200 7 2KR2F-3-G P

1 2

C2018SCD1U16 V2KX-3GP C2018SCD1U16 V2KX-3GP

12

C2019SCD1U16 V2KX-3GP C2019SCD1U16 V2KX-3GP

12

C2020SCD1U16 V2KX-3GP C2020SCD1U16 V2KX-3GP

12

C2021SCD1U16 V2KX-3GP C2021SCD1U16 V2KX-3GP

12

ALINK_NBR X_SBTX_C_P0 ALINK_NBR X_SBTX_C_N0 ALINK_NBR X_SBTX_C_P1 ALINK_NBR X_SBTX_C_N1 ALINK_NBR X_SBTX_C_P2 ALINK_NBR X_SBTX_C_N2 ALINK_NBR X_SBTX_C_P3 ALINK_NBR X_SBTX_C_N3

0423

LAN

C C

NOTE: SB8XX ONLY SUPPORTS 2 GPP PORT 2 AND 3 IS NOT SUPPORTED. (From CRB)

B B

WLAN

PCIE_RXP17 6 PCIE_RXN176 PCIE_RXP07 6 PCIE_RXN076

SB_PCIE_C LK7 SB_PCIE_C LK#7 SB_GPIO_A _RST#21

USE EXTERNAL CLKGEN

0824

1nd 82.30020.851 2nd 82.30020.791

A A

R2017 1MR2J-1-GPR 2017 1MR2J-1-G P

1 2

X2001

1 2

XTAL-25M HZ-102-GP

C2014

C2014 SC12P50 V2JN-3GP

SC12P50 V2JN-3GP

1 2

5

1 2

C2015

C2015 SC12P50 V2JN-3GP

SC12P50 V2JN-3GP

TP2009TP2009

25M_X1

25M_X2

4

PCIE_RST# _SB

A_RST#_ RA_RST#

SB_PCIE_C ALRP SB_PCIE_C ALRN

PCIE_C_TX P1

PCIE_C_TX N1

PCIE_C_TX P0

PCIE_C_TX N0

OSC_CLK

1

25M_X1

25M_X2

4

U2A

P1

PCIE_RST#

L1

A_RST#

AD26

A_TX0P

AD27

A_TX0N

AC28

A_TX1P

AC29

A_TX1N

AB29

A_TX2P

AB28

A_TX2N

AB26

A_TX3P

AB27

A_TX3N

AE24

A_RX0P

AE23

A_RX0N

AD25

A_RX1P

AD24

A_RX1N

AC24

A_RX2P

AC25

A_RX2N

AB25

A_RX3P

AB24

A_RX3N

AD29

PCIE_CALRP

AD28

PCIE_CALRN

AA28

GPP_TX0P

AA29

GPP_TX0N

Y29

GPP_TX1P

Y28

GPP_TX1N

Y26

GPP_TX2P

Y27

GPP_TX2N

W28

GPP_TX3P

W29

GPP_TX3N

AA22

GPP_RX0P

Y21

GPP_RX0N

AA25

GPP_RX1P

AA24

GPP_RX1N

W23

GPP_RX2P

V24

GPP_RX2N

W24

GPP_RX3P

W25

GPP_RX3N

M23

PCIE_RCLKP/NB_LNK_CLKP

P23

PCIE_RCLKN/NB_LNK_CLKN

U29

NB_DISP_CLKP

U28

NB_DISP_CLKN

T26

NB_HT_CLKP

T27

NB_HT_CLKN

V21

CPU_HT_CLKP

T21

CPU_HT_CLKN

V23

SLT_GFX_CLKP

T23

SLT_GFX_CLKN

L29

GPP_CLK0P

L28

GPP_CLK0N

N29

GPP_CLK1P

N28

GPP_CLK1N

M29

GPP_CLK2P

M28

GPP_CLK2N

T25

GPP_CLK3P

V25

GPP_CLK3N

L24

GPP_CLK4P

L23

GPP_CLK4N

P25

GPP_CLK5P

M25

GPP_CLK5N

P29

GPP_CLK6P

P28

GPP_CLK6N

N26

GPP_CLK7P

N27

GPP_CLK7N

T29

GPP_CLK8P

T28

GPP_CLK8N

L25

14M_25M_48M_OSC

L26

25M_X1

L27

25M_X2

SB820M-1-GP

Part 1 of 5

PCICLK4/14M_OSC/GPO39

PCI CLKS

PCI EXPRESS INTERFACES

REQ2#/CLK_REQ8#/GPIO41

PCI INTERFACELPC

REQ3#/CLK_REQ5#/GPIO42

GNT3#/CLK_REQ7#/GPIO46

LDRQ1#/CLK_REQ6#/GPIO49

ALLOW_LDTSTP/DMA_ACTIVE#

CLOCK GENERATOR

CPU

RTC

3

PCICLK0 PCICLK1/GPO36 PCICLK2/GPO37 PCICLK3/GPO38

PCIRST#

AD0/GPIO0 AD1/GPIO1 AD2/GPIO2 AD3/GPIO3 AD4/GPIO4 AD5/GPIO5 AD6/GPIO6 AD7/GPIO7 AD8/GPIO8

AD9/GPIO9 AD10/GPIO10 AD11/GPIO11 AD12/GPIO12 AD13/GPIO13 AD14/GPIO14 AD15/GPIO15 AD16/GPIO16 AD17/GPIO17 AD18/GPIO18 AD19/GPIO19 AD20/GPIO20 AD21/GPIO21 AD22/GPIO22 AD23/GPIO23 AD24/GPIO24 AD25/GPIO25 AD26/GPIO26 AD27/GPIO27 AD28/GPIO28 AD29/GPIO29 AD30/GPIO30 AD31/GPIO31

CBE0# CBE1# CBE2# CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#

PAR STOP# PERR# SERR# REQ0#

REQ1#/GPIO40

GNT0#

GNT1#/GPO44 GNT2#/GPO45

CLKRUN#

LOCK#

INTE#/GPIO32 INTF#/GPIO33 INTG#/GPIO34 INTH#/GPIO35

LPCCLK0 LPCCLK1

LAD0 LAD1 LAD2 LAD3

LFRAME#

LDRQ0#

SERIRQ/GPIO48

PROCHOT#

LDT_PG LDT_STP# LDT_RST#

32K_X1

32K_X2

RTCCLK

INTRUDER_ALERT#

VDDBT_RTC_G

3

W2 W1 W3 W4 Y1

PCI_RST#

V2

AA1 AA4 AA3 AB1 AA5 AB2 AB6 AB5 AA6 AC2 AC3 AC4 AC1 AD1 AD2 AC6 AE2 AE1 AF8 AE3 AF1 AG1 AF2 AE9 AD9 AC11 AF6 AF4 AF3 AH2 AG2 AH3 AA8 AD5 AD8 AA10 AE8 AB9 AJ3 AE7 AC5 AF5 AE6 AE4 AE11 AH5 AH4

SB_GPIO42

AC12 AD12 AJ5 AH6

SB_GPIO46

AB12 AB11 AD7

AJ6 AG6 AG4 AJ4

H24 H25

LPC_LAD 0_R

J27

LPC_LAD 1_R

J26

LPC_LAD 2_R

H29

LPC_LAD 3_R

H28 G28

TP_LPC_ LDRQ0#

J25

TP_LPC_ LDRQ1#

AA18 AB19

G21 H21 K19 G22 J24

32K_X1

C1

32K_X2_ R

C2

RTC_CLK

D2

INTRUDER_ ALERT#

B2 B1

1

TP2008TP2008

SB_GPIO_P CIE_RST#2 1

PCIE_RST# _SB

SB_GPIO28

1

SB_GPIO29

1

RN2009 SRN33J-4 -GPRN2009 SRN33J-4 -GP

1

1 2

R2009 22R2J-2-G PR2009 2 2R2J-2-GP

1'nd 73.01G08.DHG 2'nd 73.01G08.L04

PCI_AD23 24 VDDR_SE L 24,51 PCI_AD25 24 PCI_AD26 24 PCI_AD27 24

TP2010TP2010 TP2011TP2011

1'nd 73.01G08.DHG 2'nd 73.01G08.L04

A_RST#

TP2003TP2003

TP2004TP2004

RN2008

RN2008 SRN22-3-G P

SRN22-3-G P

1

4 2 3 1

8 2

7 3

6 4 5

1 1

0423

TP2005TP2005 TP2006TP2006

INT_SERIRQ 37

ALLOW _LDTSTOP 13

CPU_PRO CHOT# 10 CPU_LDT _PWRGD 10,4 2 CPU_LDT _STOP# 10,1 3 CPU_LDT _RST# 10

1 2

R2018 10R 2J-2-GPR20 18 10R2 J-2-GP

TP2007TP2007

SCD1U10V2KX-4GP

12

DY

2

PCI_CLK1 2 4 PCI_CLK2 2 4 PCI_CLK3 2 4,70 PCLK_FW H 24

0423

U2002

SNLVC1G 08DCKRG4-GP

1

A

VCC

2

B

DY

GND3Y

12

R202533R2J-2-G P R202533R2J-2 -GP

U2001

SNLVC1G 08DCKRG4-GP

1

A

VCC

2

B

DY

GND3Y

1 2

R2021 0R0402-PADR202 1 0R0 402-PAD

PCLK_KB C 24,37 LPCCLK1 2 4

LPC_LFR AME# 37 ,70

LPC Bus Routing first connects to MINICARD then connects to KBC

RTCCLK_ KBC 37

RTC_CLK 39

+RTC_CE LL

C2017

2

STRAP PIN

+3.3V_AL W

5

4

+3.3V_AL W

5

4

SCD1U10V2KX-4GP

DY

PLTRST#

12

1 2

C2010

0423

C2013

C2013 SC150P5 0V2KX-GP

SC150P5 0V2KX-GP

R2005

R2008

X01

PM_CLKR UN# 37

LPC_LAD 0 37,70 LPC_LAD 1 37,70 LPC_LAD 2 37,70 LPC_LAD 3 37,70

32K_X1

32K_X2_ R 32K_X2

0R2J-2-GP

Title

SB820M_PCIE&PCI_(1/5)

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

placed CAP closed SB820M

0423

+3.3V_RU N

12

R2026

R2026 10KR2J-3 -GP

10KR2J-3 -GP

0R2J-2-GP

1 2

0R2J-2-GP

1 2

12

R2014

20MR3-GP

R2016

12

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

1

PCI_CLK3

EC2002

PLTRST# _LAN_WLAN 70,76

PLTRST# _NB_GPU 1 3,37

PLTRST# _EC 37

SC12P50 V2JN-3GP

1 2

0423

X2002

X2002 X-32D768 KHZ-40GPU

X-32D768 KHZ-40GPU

4

1

2 3

1 2

C2012

C2012 SC12P50 V2JN-3GP

SC12P50 V2JN-3GP

20 89Friday, May 07, 2010

1

12

DY

SC10P50V2JN-4GP

GPU,NB

KBC

C2011

X01

5

SB820M: 71.SB820.M02

SSID = S.B

+3.3V_RUN

RN2101

1 2 3

SRN2K2J-1-GP

D D

C C

B B

A A

SRN2K2J-1-GP

1 2

R2127 10KR2J-3-GPR2127 10KR2J-3-GP

+3.3V_ALW

RN2103

1 2 3

SRN10KJ-5-GP

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

4K7R2J-2-GP

1 2

DY

R2118 10KR2J-3-GP

1 2

DY

R2119 10KR2J-3-GP

1 2

DY

R2133 10KR2J-3-GP

Close SB

1 2

DY

C2101 SCD1U10V2KX-4GP

+3.3V_ALW

1 2 3 4 5

SRN10KJ-6-GP

R2124 10KR2J-3-GPR2124 10KR2J-3-GP

1 2

1 2 3

TP_SB_GPIO64 TP_SB_GPIO63 TP_SB_GPIO62

USB_OC#2_3 USB_OC#0_1

4

R2108

R2108 2K2R2J-2-GP

2K2R2J-2-GP

R2110

R2110 2K2R2J-2-GP

2K2R2J-2-GP

R2112

R2112 2K2R2J-2-GP

2K2R2J-2-GP

R2113

R2113 10KR2J-3-GP

10KR2J-3-GP

R2114

R2114 10KR2J-3-GP

10KR2J-3-GP

R2115

R2115 10KR2J-3-GP

10KR2J-3-GP

R2116

R2116 10KR2J-3-GP

10KR2J-3-GP

R2117

R2117 10KR2J-3-GP

10KR2J-3-GP R2134

R2134

RN2102

RN2104

SRN10KJ-5-GP

4

1 1 1

1 1

SB_SMBCLK SB_SMBDATA

SUS_STAT#

SMB_DATA

SMB_CLK

SB_TEST2

SB_TEST1

SB_TEST0

PCIE_WAKE#

KBC_RSMRST#

SIO_EXT_WAKE#

SIO_EXT_SCI#

SIO_EXT_SMI#

TALERT#

SB_SDIN_CODEC

ACZ_BIT_CLK

SP_VRAM_SEL

PM_RSMRST#_R

8 7 6

GBE_RXERR

4

TP2121TP2121 TP2122TP2122 TP2127TP2127

TP2134TP2134

J

TP2135TP2135

JTAG_RST#

5

0423

GBE_MDIO GBE_CRS GBE_COL

GBE_PHY_INTR

SCL2 SDA2

TAG_TDI

SB_AZ_CODEC_BITCLK30 SB_AZ_CODEC_SDOUT30

SB_SDIN_CODEC30

SB_AZ_CODEC_SYNC30 SB_AZ_CODEC_RST#30

GbE Controller Not Enabled

EC Not Implemented

SIO_EXT_WAKE#37

PM_SLP_S3#37,41,42,49,52,86 PM_SLP_S5#37,49

PM_PWRBTN#37 SB_PWRGD7,41

SIO_A20GATE37 SIO_RCIN#37 SIO_EXT_SCI#37 SIO_EXT_SMI#37

PCIE_WAKE#76

H_THERMTRIP#10,37,39,42

NB_PWRGD41

KBC_RSMRST#37

SB_GPIO_A_RST#20 SB_GPIO_PCIE_RST#20

ACZ_SPKR30 SB_SMBCLK7,18,19,76 SB_SMBDATA7,18,19,76

SB_14M_CLK7

TALERT#10,39

ACZ_SDATAOUT_R24

1 2 1 2

4

R2111

1 2

0R0402-PAD

R2125

1 2

0R0402-PAD

1 2

R2126 0R0402-PADR2126 0R0402-PAD

X01

R2129 0R2J-2-GPR2129 0R2J-2-GP

1 2

R2130 0R2J-2-GPR2130 0R2J-2-GP

1 2

0423

1 2

USB_OC#2_363 USB_OC#0_163

33R2J-2-GPR2120 33R2J-2-GPR2120 33R2J-2-GPR2121 33R2J-2-GPR2121

33R2J-2-GPR2122 33R2J-2-GPR2122 33R2J-2-GPR2123 33R2J-2-GPR2123

4

TP2101TP2101

X01

1 2

SUS_STAT#13

TP2120TP2120

1 2

DY

R21090R2J-2-GPDYR21090R2J-2-GP

SB_GPIO_A_RST#_R SB_GPIO_PCIE_RST#_R

0423

TP2113TP2113

SBD DDR RESET

DY

R21280R2J-2-GP

TP2138TP2138 TP2139TP2139

TP2137TP2137 TP2132TP2132 TP2133TP2133

TP2128TP2128 TP2131TP2131 TP2116TP2116 TP2117TP2117

1

PM_PWRBTN#_R

R21060R0402-PAD R21060R0402-PAD

SYS_RESET#

1

SB_THERMTRIP#

PM_RSMRST#_R

TP_SB_GPIO64 TP_SB_GPIO63

TP_SB_GPIO62 SP_VRAM_SEL

SB_OSCIN

USB_OC7#

1

USB_OC6#

1

TALERT# USB_OC4#

1

TP_JTAG_TDO

1

TP_JTAG_TCK

1

USB_OC#2_3 USB_OC#0_1

ACZ_BIT_CLK

ACZ_SYNC_R ACZ_RST#_R

GBE_COL GBE_CRS

GBE_MDIO

GBE_RXERR

GBE_PHY_INTR

TP_DEBUG_DAT

1

TP_DEBUG_CLK

1

SPI_CS2#

1

GPO160

1

TP_PCI_PME#

SUS_STAT#

SB_TEST0 SB_TEST1 SB_TEST2

SCL0

SDA0 SMB_CLK SMB_DATA

SB_GPIO51

1

U2D

J2

PCI_PME#/GE VENT4#

K1

RI#/GEVENT 22#

D3

SPI_CS3#/G BE_STAT1/GEVEN T21#

F1

SLP_S3#

H1

SLP_S5#

F2

PWR_ BTN#

H5

PWR_ GOOD

G6

SUS_STA T#

B3

TEST0

C4

TEST1/TM S

F6

TEST2

AD21

GA20IN/GEVE NT0#

AE21

KBRST#/G EVENT1#

K2

LPC_PME #/GEVENT3#

J29

LPC_SMI#/GE VENT23#

H2

GEVENT5 #

J1

SYS_RESET #/GEVENT19#

H6

WAKE #/GEVENT8#

F3

IR_RX1/GEV ENT20#

J6

THRMTRIP# /SMBALERT#/GEVE NT2#

AC19

NB_PW RGD

G1

RSMRST#

AD19

CLK_REQ 4#/SATA_IS0#/GPIO64

AA16

CLK_REQ 3#/SATA_IS1#/GPIO63

AB21

SMARTVO LT1/SATA_IS2#/GPIO5 0

AC18

CLK_REQ 0#/SATA_IS3#/GPIO60

AF20

SATA_IS4# /FANOUT3/GPIO55

AE19

SATA_IS5# /FANIN3/GPIO59

AF19

SPKR/GPIO66

AD22

SCL0/GPIO43

AE22

SDA0/GPIO47

F5

SCL1/GPIO22 7

F4

SDA1/GPIO22 8

AH21

CLK_REQ 2#/FANIN4/GPIO62

AB18

CLK_REQ 1#/FANOUT4/GPIO61

E1

IR_LED#/LL B#/GPIO184

AJ21

SMARTVO LT2/SHUTDOW N#/GPIO51

H4

DDR3_RS T#/GEVENT7#

D5

GBE_LED 0/GPIO183

D7

GBE_LED 1/GEVENT9#

G5

GBE_LED 2/GEVENT10#

K3

GBE_STA T0/GEVENT11#

AA20

CLK_REQ G#/GPIO65/OSCIN/IDLEEXT #

H3

BLINK/USB_ OC7#/GEVENT18#

D1

USB_OC6 #/IR_TX1/GEVENT6#

E4

USB_OC5 #/IR_TX0/GEVENT17 #

D4

USB_OC4 #/IR_RX0/GEVENT16 #

E8

USB_OC3 #/AC_PRES/TDO/G EVENT15#

F7

USB_OC2 #/TCK/GEVENT14 #

E7

USB_OC1 #/TDI/GEVENT13#

F8

USB_OC0 #/TRST#/GEVENT 12#

M3

AZ_BITCLK

N1

AZ_SDOU T

L2

AZ_SDIN0/G PIO167

M2

AZ_SDIN1/G PIO168

M1

AZ_SDIN2/G PIO169

M4

AZ_SDIN3/G PIO170

N2

AZ_SYNC

P2

AZ_RST#

T1

GBE_COL

T4

GBE_CRS

L6

GBE_MDC K

L5

GBE_MDIO

T9

GBE_RXC LK

U1

GBE_RXD 3

U3

GBE_RXD 2

T2

GBE_RXD 1

U2

GBE_RXD 0

T5

GBE_RXC TL/RXDV

V5

GBE_RXE RR

P5

GBE_TXC LK

M5

GBE_TXD 3

P9

GBE_TXD 2

T7

GBE_TXD 1

P7

GBE_TXD 0

M7

GBE_TXC TL/TXEN

P4

GBE_PHY_P D

M9

GBE_PHY_R ST#

V7

GBE_PHY_INTR

E23

PS2_DAT /SDA4/GPIO187

E24

PS2_CLK /SCL4/GPIO188

F21

SPI_CS2#/G BE_STAT2/GPIO166

G29

FC_RST# /GPO160

D27

PS2KB_D AT/GPIO189

F28

PS2KB_C LK/GPIO190

F29

PS2M_DA T/GPIO191

E27

PS2M_CL K/GPIO192

SB820M-1-GP

3

Part 4 of 5

HD AUDIO

GBE LAN

3

USBCLK/1 4M_25M_48M_O SC

ACPI / WAKE UP EVENTS

GPIO

USB OC

EC_PW M0/EC_TIMER0/GP IO197 EC_PW M1/EC_TIMER1/GP IO198 EC_PW M2/EC_TIMER2/GP IO199 EC_PW M3/EC_TIMER3/GP IO200

EMBEDDED CTRL

USB_RCO MP

USB_FSD 1P/GPIO186

USB_FSD 0P/GPIO185

USB_HSD 13P USB_HSD 13N

USB 1.1USB MISCEMBEDDED CTRL

USB_HSD 12P USB_HSD 12N

USB_HSD 11P USB_HSD 11N

USB_HSD 10P USB_HSD 10N

USB_HSD 9N

USB_HSD 8N

USB_HSD 7N

USB 2.0

USB_HSD 6N

USB_HSD 5N

USB_HSD 4N

USB_HSD 3N

USB_HSD 2N

USB_HSD 1N

USB_HSD 0N

SCL2/GPIO19 3

SDA2/GPIO19 4

SCL3_LV /GPIO195

SDA3_LV /GPIO196

KSI_0/GPIO201 KSI_1/GPIO202 KSI_2/GPIO203 KSI_3/GPIO204 KSI_4/GPIO205 KSI_5/GPIO206 KSI_6/GPIO207 KSI_7/GPIO208

KSO_0/GP IO209 KSO_1/GP IO210 KSO_2/GP IO211 KSO_3/GP IO212 KSO_4/GP IO213 KSO_5/GP IO214 KSO_6/GP IO215 KSO_7/GP IO216 KSO_8/GP IO217

KSO_9/GP IO218 KSO_10/G PIO219 KSO_11/G PIO220 KSO_12/G PIO221 KSO_13/G PIO222 KSO_14/G PIO223 KSO_15/G PIO224 KSO_16/G PIO225 KSO_17/G PIO226

USB_FSD 1N

USB_FSD 0N

USB_HSD 9P

USB_HSD 8P

USB_HSD 7P

USB_HSD 6P

USB_HSD 5P

USB_HSD 4P

USB_HSD 3P

USB_HSD 2P

USB_HSD 1P

USB_HSD 0P

A10

G19

J10 H11

H9 J8

B12 A12

F11 E11

E14 E12

J12 J14

A13 B13

D13 C13

G12 G14

G16 G18

D16 C16

B14 A14

E18 E16

J16 J18

B17 A17

A16 B16

D25 F23 B26 E26 F25 E22 F22 E21

G24 G25 E28 E29 D29 D28 C29 C28

B28 A27 B27 D26 A26 C26 A24 B25 A25 D24 B24 C24 B23 A23 D22 C22 A22 B22

USB_RCOMP

TP_USB_PP8 TP_USB_PN8

TP_USB_PP5 TP_USB_PN5

USB_PP3 USB_PN3

SCL2 SDA2

2

TP2140TP2140 TP2141TP2141

USB_48M_CLK 7

USB_PP11 54 USB_PN11 54

USB_PP10 32 USB_PN10 32

USB_PP9 73 USB_PN9 73

1 2

R2102

R2102 11K8R2F-GP

11K8R2F-GP

1 1

0423

TP2142TP2142

1

TP2143TP2143

1

USB_PP4 76

TP2114TP2114 TP2115TP2115

USB_PN4 76

USB_PP2 76 USB_PN2 76

USB_PP1 63 USB_PN1 63

USB_PP0 63 USB_PN0 63

0423

1 1

Not use

CPU_SIC 10 CPU_SID 10

SB_GPO199 24 SB_GPO200 24

Strap Pin / define to use LPC or SPI ROM

EC Not Implemented

Title

SB820M_USB&GPIO_(2/5)

ize Document Number Rev

Size Document Number Rev

S

Custom

Date: Sheet of

2

Date: Sheet of

1

USB

Pair

0

1

2

3

4

5

6

7

8

9

10

11

12

13

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

Device

USB2

USB3

USB0 (I/O Board)

USB1 (I/O Board, 17")

WLAN

RESERVED

BLUETOOTH

CARD READER

CAMERA

RESERVED

21 89Friday, May 07, 2010

1

X01

SSID = S.B

SB820M: 71.SB820.M02

0916

XTAL 1'nd 82.30020.851

C2209

1 2

SC12P50V2JN-3GP

C2210

1 2

SC12P50V2JN-3GP

2'nd 82.30020.791

XTAL-25MHZ-102-GP

DY

XTAL-25MHZ-102-GP

12

DY

10MR2J-L-GP

12

X2201

R2204

DY

SATA HDD

SATA ODD

SATA_X1

SATA_X2

SATA_TXP059 SATA_TXN059

SATA_RXN059 SATA_RXP059

SATA_TXP159 SATA_TXN159

SATA_RXN159 SATA_RXP159

C2201 SCD01U50V2KX-1GPC2201 SCD01U50V2KX-1GP

1 2

C2202 SCD01U50V2KX-1GPC2202 SCD01U50V2KX-1GP

1 2

C2203 SCD01U50V2KX-1GPC2203 SCD01U50V2KX-1GP

1 2

C2204 SCD01U50V2KX-1GPC2204 SCD01U50V2KX-1GP

1 2

C2205 SCD01U50V2KX-1GPC2205 SCD01U50V2KX-1GP

1 2

C2206 SCD01U50V2KX-1GPC2206 SCD01U50V2KX-1GP

1 2

C2208 SCD01U50V2KX-1GPC2208 SCD01U50V2KX-1GP

1 2

C2207 SCD01U50V2KX-1GPC2207 SCD01U50V2KX-1GP

1 2

PLACE SATA AC DECOUPLING CAPS CLOSE TO SB820M

+1.1V_RUN_AVDD_SATA

SPI ROM in KBC side

Very Close to SB820

1KR2F-3-GP

R2201

1 2

R2202 931R2F-1-GPR2202 931R2F-1-GP

SATA_ACT#66

SATA_TXP0_C SATA_TXN0_C

SATA_RXN0_C SATA_RXP0_C

SATA_TXP1_C SATA_TXN1_C

SATA_RXN1_C SATA_RXP1_C

SATA_CALP

SATA_CALN

SATA_X1

SATA_X2

0423

U2B

AH9

SATA_TX 0P

AJ9

SATA_TX 0N

AJ8

SATA_RX 0N

AH8

SATA_RX 0P

AH10

SATA_TX 1P

AJ10

SATA_TX 1N

AG10

SATA_RX 1N

AF10

SATA_RX 1P

AG12

SATA_TX 2P

AF12

SATA_TX 2N

AJ12

SATA_RX 2N

AH12

SATA_RX 2P

AH14

SATA_TX 3P

AJ14

SATA_TX 3N

AG14

SATA_RX 3N

AF14

SATA_RX 3P

AG17

SATA_TX 4P

AF17

SATA_TX 4N

AJ17

SATA_RX 4N

AH17

SATA_RX 4P

AJ18

SATA_TX 5P

AH18

SATA_TX 5N

AH19

SATA_RX 5N

AJ19

SATA_RX 5P

AB14

SATA_CA LRP

AA14

SATA_CA LRN

AD11

SATA_AC T#/GPIO67

AD16

SATA_X1

AC16

SATA_X2

J5

SPI_DI/GPIO164

E2

SPI_DO/GPIO16 3

K4

SPI_CLK/GP IO162

K9

SPI_CS1#/G PIO165

G2

ROM_RST #/GPIO161

SB820M-1-GP

Part 2 of 5

SERIAL ATA

TEMPIN3/TA LERT#/GPIO174

HW MONITOR

SPI ROM

FC_CLK

FC_FBCL KOUT

FC_FBCL KIN

FC_OE#/G PIOD145

FC_AVD# /GPIOD146

FC_W E#/GPIOD148 FC_CE1# /GPIOD149 FC_CE2# /GPIOD150

FC_INT1/GP IOD144

FC_INT2/GP IOD147

FC_ADQ0 /GPIOD128 FC_ADQ1 /GPIOD129 FC_ADQ2 /GPIOD130 FC_ADQ3 /GPIOD131 FC_ADQ4 /GPIOD132 FC_ADQ5 /GPIOD133 FC_ADQ6 /GPIOD134 FC_ADQ7 /GPIOD135 FC_ADQ8 /GPIOD136

FC_ADQ9 /GPIOD137 FC_ADQ1 0/GPIOD138 FC_ADQ1 1/GPIOD139 FC_ADQ1 2/GPIOD140 FC_ADQ1 3/GPIOD141 FC_ADQ1 4/GPIOD142 FC_ADQ1 5/GPIOD143

FLASH

FANOUT0 /GPIO52 FANOUT1 /GPIO53 FANOUT2 /GPIO54

FANIN0/GPIO56 FANIN1/GPIO57 FANIN2/GPIO58

TEMPIN0/GP IO171 TEMPIN1/GP IO172 TEMPIN2/GP IO173

TEMP_CO MM

VIN0/GPIO175 VIN1/GPIO176 VIN2/GPIO177 VIN3/GPIO178 VIN4/GPIO179 VIN5/GPIO180

VIN6/GBE_S TAT3/GPIO181

VIN7/GBE_L ED3/GPIO182

NC#G27

NC2#Y2

AH28 AG28 AF26

AF28 AG29 AG26 AF27 AE29 AF29 AH27

AJ27 AJ26 AH25 AH24 AG23 AH23 AJ22 AG21 AF21 AH22 AJ23 AF23 AJ24 AJ25 AG25 AH26

W5 W6 Y9

W7 V9 W8

B6 A6 A5 B5 C7

A3 B4 A4 C5 A7 B7 B8 A8

G27 Y2

GPIOD[150:128] are open drain GPIO pins where as GPO160 is an open drain GPO pin. These pins are not programmed to GPIO mode by default.

If use as GPIO, need to pull up to 1.8V_RUN

TEMPIN0 TEMPIN1 TEMPIN2 TEMPIN3

VIN0 VIN1 VIN2 VIN3 MEM_1V5 VIN5 VIN6 VIN7

suggest not use HW monitor

MEM_1V5 51

TEMPIN2 TEMPIN3 TEMPIN1 TEMPIN0

VIN0 VIN1 VIN2

X01

VIN5 VIN3 VIN7 VIN6

1 2 3 4 5

RN2201

8 7 6

SRN10KJ-6-GP

RN2202

8 7 6

SRN10KJ-6-GP

RN2203

8 7 6

SRN10KJ-6-GP

+3.3V_ALW

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Number Rev

Size Document Number Rev

S

Custom

Date: Sheet of

SB820M_SATA-IDE_(3/5)

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

22 89Friday, May 07, 2010

X01

5

4

3

2

1

SSID = S.B

SB820M: 71.SB820.M02

+3.3V_RUN

D D

+1.8V_RUN

Flash Controller func, not supported by the SB 820M

+3.3V_RUN

BLM15AG221SS1D-GP

220 ohm 300mA

C C

+1.1V_RUN +1.1V_RUN_PCIE_VDDR

PBY160808T-330Y-N-GP

+3.3V_RUN

BLM15AG221SS1D-GP

220 ohm 300mA

+1.1V_RUN +1.1V_RUN_AVDD_SATA

1 2

PBY160808T-330Y-N-GP

B B

PBY160808T-330Y-N-GP

+3.3V_ALW +3.3V_AVDD_USB

1 2

PBY160808T-221Y-N-GP

220 ohm @ 100MHz,2A

+1.1V_ALW +1.1V_AVDD_USB

1 2

BLM15AG221SS1D-GP

220 ohm 300mA

R2301

1 2

0R3J-0-U-GP

R2302

1 2

0R3J-0-U-GP

L2301

1 2

L2303

1 2

33R 3A

L2304

1 2

L2305

L2307

L2309

+3.3V_SB_VDDIO

+1.8V_SB_VDDIO_FC

+3.3V_VDDPL_PCIE

+3.3V_VDDPL_SATA

SC22U6D3V5MX-2GP

12

SC4D7U6D3V3KX-GP

12

DY

SC2D2U6D3V3KX-GP

12

SC22U6D3V5MX-2GP

12

SC2D2U6D3V3KX-GP

12

SC22U6D3V5MX-2GP

12

SC1U6D3V2KX-GP

12

SC2D2U6D3V3KX-GP

12

C2301

TC2301

12

SCD1U10V2KX-4GP

C2305

C2306

12

DY

SCD1U10V2KX-4GP

C2313

C2314

12

DY

SC1U6D3V2KX-GP

TC2303

C2319

12

DY

SCD1U10V2KX-4GP

C2325

C2326

12

DY

SC1U6D3V2KX-GP

TC2304

C2337

C2343

SC1U6D3V2KX-GP

C2330

12

SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP

C2338

12

SCD1U10V2KX-4GP

C2344

12

C2320

C2331

C2339

C2302

12

SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP

71mA

43mA

600mA

SCD1U10V2KX-4GP

C2321

12

93mA

567mA

SCD1U10V2KX-4GP

C2332

12

658mA

C2340

12

TBDmA

C2303

12

U2E

Part 5 of 5

Y14

U2C

AH1

VDDIO_33_ PCIGP

V6

VDDIO_33_ PCIGP

Y19

VDDIO_33_ PCIGP

AE5

VDDIO_33_ PCIGP

AC21

VDDIO_33_ PCIGP

AA2

VDDIO_33_ PCIGP

AB4

VDDIO_33_ PCIGP

AC8

VDDIO_33_ PCIGP

AA7

VDDIO_33_ PCIGP

AA9

VDDIO_33_ PCIGP

AF7

VDDIO_33_ PCIGP

AA19

VDDIO_33_ PCIGP

AF22

VDDIO_18_ FC

AE25

VDDIO_18_ FC

AF24

VDDIO_18_ FC

AC22

VDDIO_18_ FC

POWER

AE28

VDDPL_3 3_PCIE

U26

VDDAN_1 1_PCIE

V22

VDDAN_1 1_PCIE

W22 W26

AD14

AJ20

AF18 AH20 AG19

AE18 AD18

AE16

V26 V27 V28 V29

A18 A19 A20 B18 B19 B20 C18 C20 D18 D19 D20 E19

C11 D11

VDDAN_1 1_PCIE VDDAN_1 1_PCIE VDDAN_1 1_PCIE VDDAN_1 1_PCIE VDDAN_1 1_PCIE VDDAN_1 1_PCIE

VDDPL_3 3_SATA

VDDAN_1 1_SATA VDDAN_1 1_SATA VDDAN_1 1_SATA VDDAN_1 1_SATA VDDAN_1 1_SATA VDDAN_1 1_SATA VDDAN_1 1_SATA

VDDAN_3 3_USB_S VDDAN_3 3_USB_S VDDAN_3 3_USB_S VDDAN_3 3_USB_S VDDAN_3 3_USB_S VDDAN_3 3_USB_S VDDAN_3 3_USB_S VDDAN_3 3_USB_S VDDAN_3 3_USB_S VDDAN_3 3_USB_S VDDAN_3 3_USB_S VDDAN_3 3_USB_S

VDDAN_1 1_USB_S VDDAN_1 1_USB_S

SB820M-1-GP

C2322

12

C2333

12

Part 3 of 5

PCI/GPIO I/O

FLASH I/O

GBE LAN

PCI EXPRESSSERIAL ATA

USB I/O

PLL CLKGEN I/O

VDDCR_1 1 VDDCR_1 1 VDDCR_1 1 VDDCR_1 1 VDDCR_1 1 VDDCR_1 1 VDDCR_1 1

CORE S03.3V_S5 I/O

VDDCR_1 1 VDDCR_1 1

VDDAN_1 1_CLK VDDAN_1 1_CLK VDDAN_1 1_CLK VDDAN_1 1_CLK VDDAN_1 1_CLK VDDAN_1 1_CLK VDDAN_1 1_CLK VDDAN_1 1_CLK

VDDRF_G BE_S

VDDIO_33_ GBE_S

VDDCR_1 1_GBE_S VDDCR_1 1_GBE_S

VDDIO_GBE _S VDDIO_GBE _S

VDDIO_33_ S VDDIO_33_ S VDDIO_33_ S VDDIO_33_ S VDDIO_33_ S VDDIO_33_ S VDDIO_33_ S VDDIO_33_ S

VDDCR_1 1_S VDDCR_1 1_S

VDDIO_AZ_ S

CORE S5

VDDCR_1 1_USB_S VDDCR_1 1_USB_S

VDDPL_3 3_SYS

VDDPL_1 1_SYS_S

VDDPL_3 3_USB_S

VDDAN_3 3_HWM_S

VDDXL_3 3_S

N13 R15 N17 U13 U17 V12 V18 W12 W18

K28 K29 J28 K26 J21 J20 K21 J22

V1

M10

L7 L9

M6 P8

A21 D21 B21 K10 L10 J9 T6 T8

F26 G26

M8

A11 B11

M21

L22

F19

D6

L20

510mA

SCD1U10V2KX-4GP

TBD mA

SCD1U10V2KX-4GP

GBE PHY not used

32mA

113mA

TBDmA

R2303 0R2J-2-GPR2303 0R2J-2-GP

+3.3VALW_VDDIO_AZ

197mA

3.3V_RUN_VDDPL

1.1V_ALW_VDDPL

3.3V_ALW_VDDXL

C2304

12

C2315

12

1 2

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

12

DY

C2309

C2308

12

SC1U6D3V2KX-GP

C2317

C2316

12

+3.3V_ALW

C2329

SC2D2U6D3V3KX-GP

C2329

SC2D2U6D3V3KX-GP

12

SCD1U10V2KX-4GP

C2334

12

17mA

+1.1V_RUN

SC10U10V5KX-2GP

SC1U6D3V2KX-GP

12

SC1U6D3V2KX-GP

12

DY

SC2D2U6D3V3KX-GP

12

SC1U6D3V2KX-GP

12

SCD1U10V2KX-4GP

12

C2311

C2310

12

+1.1V_RUN+1.1V_RUN_SB_CLKGEN

1 2

SC22U6D3V5MX-2GP

TC2302

C2318

+3.3V_ALW

SC2D2U6D3V3KX-GP

C2323

+1.1V_ALW

C2327

SC1U6D3V2KX-GP

SC10U10V5KX-2GP

C2335

SCD1U10V2KX-4GP

C2347

12

DY

C2324

12

C2328

12

C2336

12

+3.3V_ALW

SC2D2U6D3V3KX-GP

12

1 2

C2348

R2304

0R3J-0-U-GP

+1.1V_ALW+1.1V_ALW_VDDR_USB

L2306

BLM15AG221SS1D-GP

220 ohm 300mA

AB16 AC14 AE12 AE14

AF9 AF11 AF13 AF16

AG8

AH7 AH11 AH13 AH16

AJ7 AJ11 AJ13 AJ16

B10

K11

D10

D12

D14

D17

F12

F14

F16

G11

F18

H12

H14

H16

H18

K12

K18

H19

M19

P21

P20

M22 M24 M26

P22

P24

P26

T20

T22

T24

V20

Y16

A9

B9

E9 F9

C9

D9

J11 J19

K14 K16

Y4

D8

J23

VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A VSSIO_SAT A

VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB VSSIO_USB

EFUSE

VSSAN_H WM

VSSXL

VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K

SB820M-1-GP

Part 5 of 5

GROUND

VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K VSSIO_PCIECL K

VSSPL_S YS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AJ2 A28 A2 E5 D23 E25 E6 F24 N15 R13 R17 T10 P10 V11 U15 M18 V19 M11 L12 L18 J7 P3 V4 AD6 AD4 AB7 AC9 V8 W9 W10 AJ28 B29 U4 Y18 Y10 Y12 Y11 AA11 AA12 G4 J4 G8 G9 M12 AF25 H7 AH29 V10 P6 N4 L4 L8

M20

H23 H26 AA21 AA23 AB23 AD23 AA26 AC26 Y20 W21 W20 AE26 L21 K20

131mA

SCD1U10V2KX-4GP

SC22U6D3V5MX-2GP

WOL supported: Tied +3.3V_ALW not supported: Tied +3.3V_RUN

A A

TBDmA

3.3V_ALW_VDDXL

SCD1U10V2KX-4GP

DY

1 2

SC2D2U6D3V3KX-GP

C2342

C2341

12

5

+3.3V_ALW +3.3V_ALW

L2308

BLM15AG221SS1D-GP

220 ohm 300mA

WOL supported: Tied +1.1V_ALW not supported: Tied +1.1V_RUN

62mA 47mA

+1.1V_ALW +3.3V_RUN

L2312

1.1V_ALW_VDDPL 3.3V_RUN_VDDPL

SC2D2U6D3V3KX-GP

L2312

1 2

C2349

BLM15AG221SS1D-GP

12

220 ohm 300mA 220 ohm 300mA

4

SC2D2U6D3V3KX-GP

C2350

BLM15AG221SS1D-GP

12

L2313

1 2

5mA

3

SC2D2U6D3V3KX-GP

SCD1U10V2KX-4GP

12

DY

C2346

C2345

12

DY

2

Title

SB820M_POWER&GND_(4/5)

Size Document Number Rev

Custom

Date: Sheet of

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

23 89Friday, May 07, 2010

1

X01

5

SSID = S.B

4

3

2

1

REQUIRED STRAPS

D D

PCI_CLK120 PCI_CLK220 PCI_CLK320,70

PCLK_FW H20

C C

PCLK_KB C20,37 LPCCLK120

SB_GPO2 002 1 SB_GPO1 992 1

ACZ_SDA TAOUT_R2 1

+3.3V_RU N +3.3V_ ALW

R240110KR2J-3-GPDYR240110KR2J-3-GP

R240210KR2J-3-GPDYR240210KR2J-3-GP

DY

R240410KR2J-3-GP R240410KR2J-3-GP12R240310KR2J-3-GPDYR240310KR2J-3-GP

12

DY

R241910KR2J-3-GPDYR241910KR2J-3-GP

R241810KR2J-3-GP R241810KR2J-3-GP

R241710KR2J-3-GP R241710KR2J-3-GP

12

DY

12

R241610KR2J-3-GPDYR241610KR2J-3-GP

12

DY

R240610KR2J-3-GPDYR240610KR2J-3-GP

12

R242110KR2J-3-GP R242110KR2J-3-GP

12

1008

12

DY

12

R24082K2R2F-GP R24082K2R2F-GP

R24072K2R2F-GPDYR24072K2R2F-GP

12

DY

R242410KR2J-3-GP R242410KR2J-3-GP

R24222K2R2F-GP R24222K2R2F-GP

R24232K2R2F-GPDYR24232K2R2F-GP

12

R240510KR2J-3-GPDYR240510KR2J-3-GP

12

DY

R242010KR2J-3-GP R242010KR2J-3-GP

12

R240910KR2J-3-GPDYR240910KR2J-3-GP

DY

DEBUG STRAPS

PCI_AD23 2 0 VDDR_SE L 20,51 PCI_AD25 2 0 PCI_AD26 2 0 PCI_AD27 2 0

DY

R24112K2R2J-2-GPDYR24112K2R2J-2-GP

R24122K2R2J-2-GPDYR24122K2R2J-2-GP

12

DY

R24152K2R2J-2-GPDYR24152K2R2J-2-GP

R24142K2R2J-2-GPDYR24142K2R2J-2-GP

R24132K2R2J-2-GPDYR24132K2R2J-2-GP

12

DY

B B

REQUIRED SYSTEM STRAPS

PCI_CLK2

WatchDOG (NB_PWRGD) ENABLED

WatchDog (NB_PWRGD) DISABLED

DEFAULT

PCI_CLK3

USE DEBUG STRAPS

IGNORE DEBUG STRAPS

DEFAULT

(PCI_CLK4)

non_Fusion CLOCK mode

DEFAULT

Fusion CLOCK mode

PULL HIGH

PULL LOW

AZ_SDOUT#

LOW POWER MODE

PERFORMANCE MODE

DEFAULT

PCI_CLK1

Allow PCIE GEN2

DEFAULT

Force PCIE GEN1

USE this pin to determine INT/EXT CLK

PCLK_KBCPCLK_FWH

(LPCCLK0)

ENABLE EC

DISABLE EC

DEFAULT

LPCCLK1

DEFAULT

CLKGEN ENABLED

(Use Internal)

CLKGEN DISABLED

(Use External)

SB_GPO200 , SB_GPO199

ROM TYPE:

H, H = Reserved

H, L = SPI ROM

L, H = LPC ROM

L, L = FWH ROM

DEFAULT

PULL HIGH

PULL LOW

USE PCI PLL

BYPASS PCI PLL

PCI_AD26PCI_AD27

Disable ILA AUTORUN

Enable ILA AUTORUN

PCI_AD25 PCI_AD23

USE FC PLL

PCI_AD24

USE DEFAULT PCIE STRAPS

Disable PCI MEM BOOT

(DEFAULT)(DEFAULT)(DEFAULT)(DEFAULT)(DEFAULT)

BYPASS FC PLL

USE EEPROM PCIE STRAPS

Enable PCI MEM BOOT

Note: SB820 has 15K internal PU FOR PCI_AD[27:23]

Not Applicable to SB820M but provision for pull-down is required.

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Nu mber Rev

Size Document N umber Rev

S

Date: Sheet of

SB820M_STRAPPING_(5/5)

A3

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

24 89Friday, May 07, 2010

1

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_CORE)

Size Document N umber Rev

Date: Sheet of

CPU (VCC_CORE)

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

25 89Friday, May 07, 2010

1

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (VCC_GFXCORE)

Size Document N umber Rev

Date: Sheet of

CPU (VCC_GFXCORE)

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

26 89Friday, May 07, 2010

1

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

CPU (VSS)

1

27 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

28 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

29 89Friday, May 07, 2010

X01

SSID = AUDIO

5

4

3

2

1

D D

SB_AZ_CODEC_BITCLK

12

C3007

DY

SC4D7P50V2CN-1GP

+3.3V_RUN

C C

B B

12

R3008

R3008 10KR2J-3-GP

10KR2J-3-GP

AMP_MUTE#

+3.3V_RUN

12

+3.3V_RUN

Close to codec

12

C3002

C3001

SCD1U10V2KX-4GP

SB_AZ_CODEC_BITCLK21

SB_SDIN_CODEC21

SB_AZ_CODEC_SDOUT21

SB_AZ_CODEC_SYNC21

SB_AZ_CODEC_RST#21

C3002

SC1U6D3V2KX-GP

1 2

SC2D2U25V5KX-1GP

AMP_MUTE#37

Close to codec

AUD_DVDDCORE

12

SC10U6D3V5MX-3GP

C3004

SCD1U10V2KX-4GP

SB_AZ_CODEC_BITCLK

SB_SDIN_CODEC_C0

33R2J-2-GPR3001 33R2J-2-GPR3001

SB_AZ_CODEC_SDOUT

SB_AZ_CODEC_SYNC

SB_AZ_CODEC_RST#

20090929 Remove DMIC

AMP_MUTE#

PUMP_CAPN

12

C3014

PUMP_CAPP

C3003

AUD_AGND

2009/09/03 Version Changing to UA

U3001

1

DVDD_CORE

9

DVDD

25mA

3

DVDD_IO

6

HDA_BITCLK

8

HDA_SDI

5

HDA_SDO

10

HDA_SYNC

11

HDA_RST#

2

DMIC_CLK/GPIO1

4

DMIC0/GPIO2

46

DMIC1/GPIO0/SPDIF_OUT_1

48

SPDIF_OUT_0

47

EAPD

35

CAP-

36

CAP+

7

DVSS

33

AVSS

30

AVSS

26

AVSS

42

PVSS

49

GND

92HD79B1A5NLGXTAX-GP

84mA

HP0_PORT_A_L HP0_PORT_A_R

VREFOUT_A_OR_F

HP1_PORT_B _L

HP1_PORT_B _R

PORT_C_R

VREFOUT_C

SPKR_PORT_D _L+

SPKR_PORT_D _L-

SPKR_PORT_D _R-

SPKR_PORT_D _R+

MONO_OUT

AVDD AVDD

PVDD PVDD

SENSE_A SENSE_B

PORT_C_L

PORT_E_L PORT_E_R

PORT_F_L PORT_F_R

PC_BEEP

CAP2

VREFFILT

VREG

V-

27 38

39 45

13 14

28 29 23

31 32

AUD_INT_MIC_R_L

19 20

AUD_VREFOUT_C

24

40 41

43 44

15 16

17 18

12

25

22

21

34

37

AUD_SENSE_A AUD_SENSE_B

AUD_EXT_MIC_L AUD_EXT_MIC_R AUD_VREFOUT_B

AUD_HP1_JACK_L AUD_HP1_JACK_R

AUD_SPK_L+ AUD_SPK_L-

AUD_SPK_RAUD_SPK_R+

AUD_CAP2

AUD_VREFFLT

AUD_V_B

AUD_VREG

+AVDD

12

C3006

C3005

SC1U10V3KX-3GP

SCD1U10V2KX-4GP

AUD_AGND

AUD_EXT_MIC_L 60 AUD_EXT_MIC_R 60

R3005 60D4R2F-GPR3005 60D4R2F-GP

1 2

R3006 60D4R2F-GPR3006 60D4R2F-GP

1 2

C3011 SC1U10V3KX-3GPC3011 SC1U10V3KX-3GP

1 2

R3007 2K2R2J-2-GPR3007 2K2R2J-2-GP

1 2

0423

AUD_SPK_L+ 60

AUD_SPK_L- 60

AUD_SPK_R- 60

AUD_SPK_R+ 60

AUD_PC_BEEP

AUD_PC_BEEP Trace width>15 mils

12

C3016

SC4D7U6D3V3KX-GP

AUD_AGND AUD_AGND AUD_AGND AUD_AGND

12

C3017

SC10U6D3V5MX-3GP

Close to codec

R3002

1 2

0R3J-0-U-GP

12

C3018

SC10U6D3V5MX-3GP

C3008

SCD1U10V2KX-4GP

12

+5V_RUN

12

C3015

SC1U6D3V2KX-GP

C3009

SC1U10V3KX-3GP

AUD_AGND

+PVDD

12

C3010

SC10U6D3V5MX-3GP

AUD_VREFOUT_B 60

AUD_HP1_JACK_L2 60

AUD_HP1_JACK_R2 60

INT_MIC_L_R 60

C3012

SCD1U10V2KX-4GP

12

SCD1U10V2KX-4GP

12

C3013

R3003

1 2

0R3J-0-U-GP

R3004

1 2

0R3J-0-U-GP

+5V_RUN

SB_SPKR_R

KBC_BEEP_R

Reserve

R3009

R3009 120KR2F-L-GP

120KR2F-L-GP

1 2

R3010

R3010 499KR2F-1-GP

499KR2F-1-GP

+15V_ALW

DY

From SB

ACZ_SPKR 21

From EC

AUD_HP1_JACK_R2

Q3002

P8503BMG-GP

Q3004

12

R3013

100KR2J-1-GP

HP_CODEC_MUTE

KBC_BEEP 37

DY

DS

G

CODEC_Q2601_03

G

D S

DY

G

DY

AUD_HP1_JACK_L2

DS

Q3003

Q3003 P8503BMG-GP

P8503BMG-GP

CODEC_Q2602_04

P8503BMG-GP

P8503BMG-GP Q3005

Q3005

D S

Q3001

Azalia I/F EMI

SB_AZ_CODEC_SDOUT

12

R3015

R3015 47R2J-2-GP

47R2J-2-GP

DY

5

SB_AZ_CODEC_SDOUT1

12

C3020

DY

SCD1U10V2KX-4GP

AUD_SENSE_A

A A

+AVDD

AUD_AGND

12

R3018

R3018 2K49R2F-GP

2K49R2F-GP

12

C3019

C3019 SC1000P50V3JN-GP-U

SC1000P50V3JN-GP-U

Close to Pin13

4

R3016

R3016 20KR2F-L-GP

20KR2F-L-GP

1 2

R3022

R3022 39K2R2F-L-GP

39K2R2F-L-GP

AUD_HP1_JD# 60

AUD_SENSE_B

12

EXT_MIC_JD# 60

+AVDD

12

R3019

R3019 2K49R2F-GP

2K49R2F-GP

12

R3021

R3021 20KR2F-L-GP

20KR2F-L-GP

AUD_AGND

Close to Pin14

3

R3014

12

0R3J-0-U-GP

R3017

12

0R3J-0-U-GP

C3021

1 2

SCD1U10V2KX-4GP

AUD_AGND

2

AMP_MUTE#

Q3001

G

DY

2N7002A-7-GP

S D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

S

Date: Sheet of

Audio Codec 92HD79B1

ize Document Number Rev

Custom

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

30 89Friday, May 07, 2010

1

30 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

31 89Friday, May 07, 2010

X01

5

SSID = SDIO

4

3

2

1

D D

C C

SCD1U16V2KX-3GP

B B

SCD1U16V2KX-3GP

+3.3V_PHY

12

Plase close to u3201

CLK_48M_CARD7

SC10P50V2JN-4GP

+3.3V_RUN +3.3V_PHY

0R3J-0-U-GP

+3.3V_RUN_CARD

C3205

12

C3202

C3201

SCD1U16V2KX-3GP

C3206

R2_CLK_48M_CARD

12

DY

Place these close RTS5138

R3202

12

SCD1U16V2KX-3GP

XD_D7

XD_D6/MS_BS

XD_D5/SD_D2/MS_D5

XD_D4/SD_D3/MS_D1 XD_D3/SD_D4/MS_D4

R3203

12

DY

10R2F-L-GP

12

C3203

DY

1 2

C3204

SCD1U16V2KX-3GP

SC4D7U6D3V3KX-GP

2

50mA

C3207

RREF

1 2

DY

SC100P50V2JN-3GP

R3201

1 2

6K2R2F-GP

USB_PN10_1 USB_PP10_1

43mA

12

C3208

SC1U6D3V2KX-GP

U3201

1

RREF

2

DM

3

DP

4

3V3_IN

5

CARD_3V 3

6

V18

25

GND

RTS5138-GR-GP

24

23

22

XD_D7

CLK_IN

XD_CD#7SP18SP29SP310SP411SP5

SP1119SP1220SP1321SP14

SP10

GPIO0

SP9 SP8 SP7 SP6

12

XD_ALE/SD_D7/MS_D3 XD_CLE/SD_D0/MS_D7 XD_CE#/SD_D1 XD_RE#/MS_INS# XD_RDY/SD_WP/MS_CLK_R XD_CD#

XD_D2/SD_CMD

18

CR_GPIO0

17

XD_D1/SD_D5/MS_D0

16

XD_D0/SD_CLK/MS_D2

15

XD_WP/SD_D6/MS_D6

14

XD_WE#/SD_CD#

13

XD_D7 71 XD_D6/MS_BS 71 XD_D5/SD_D2/MS_D5 71

XD_D4/SD_D3/MS_D1 71 XD_D3/SD_D4/MS_D4 71

XD_D2/SD_CMD 71

1

TP3201 TPAD14-GPTP3201 TPAD14-GP

XD_D1/SD_D5/MS_D0 71 XD_D0/SD_CLK/MS_D2 71 XD_WP/SD_D6/MS_D6 71 XD_WE#/SD_CD# 71

XD_ALE/SD_D7/MS_D3 71 XD_CLE/SD_D0/MS_D7 71 XD_CE#/SD_D1 71 XD_RE#/MS_INS# 71

XD_CD# 71

R3206

12

22R2J-2-GP

XD_RDY/SD_WP/MS_CLK 71

R3204

0R3J-0-U-GP

USB_PN10_1

USB_PP10_1

0R3J-0-U-GP

1 2

R3205

0R3J-0-U-GP

USB_PN10 21

USB_PP10 21

Place R3204 and R3205 together

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Card Reader-RTS5138

ize Document Number Rev

Size Document Number Rev

S

Custom

Date: Sheet of

Card Reader-RTS5138

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

32 89Friday, May 07, 2010

1

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

33 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

34 89Friday, May 07, 2010

X01

A

4 4

3 3

B

C

D

E

(Blanking)

2 2

1 1

A

B

C

D

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

E

35 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

36 89Friday, May 07, 2010

X01

SSID = KBC

+KBC_PWR

0423

D D

DJ1 PU DJ2 PD

0423

+KBC_PWR

12

R3712

R3712 2K2R2J-2-GP

2K2R2J-2-GP

KB_DET_KBC

12

R3721

DY

2K2R2J-2-GP

UMA PD D

IS PU

C C

+KBC_PWR

12

DY

R3715

R3715 2K2R2J-2-GP

2K2R2J-2-GP

DISCRETE_DE T

R3720

R3720 2K2R2J-2-GP

2K2R2J-2-GP

0423

5

1 2

DY

R3701 0R5J-5-GP

L3701 BL M15AG601SS1D-GPL3701 BLM15AG601SS1D-GP

1 2

12

+KBC_PWR

C3704

C3701

DY

SCD1U10V2KX-4GP

SC2D2U10V3KX-1GP

R3707

1 2

10KR2J-3-GP

THERMTRIP_VG A#81

for Discrete

1.5V_RUN_EN4 2,49

PWRLED #66

BAT_LED_W HITE66

KBC_RSMRST #21

PM_SLP_S5#21,49

3V_5V_POK46,48 EC_RESET_OU T39,41 EC_SPI_WP#_R62

BLON_OUT54

IMVP_VR_ON47

PSID_DISABLE#76

GFX_CORE_E N86

1.1V_GFX_RUN _EN42 USB_PWR _EN#63

12

0423

C3705

SCD1U10V2KX-4GP

12

C3706

SCD1U10V2KX-4GP

CPU_PROC HOT#_EC10

PM_SLP_S3#21,41,42,49,52,86

LID_CLOSE#69

0423

R3747 0R2J-2-GPR3747 0R2J-2-G P

R3722 0R2J-2-GPR 3722 0R2J-2-GP

C3707

SCD1U10V2KX-4GP

PSID_EC76

TP3707TP3707

0423

TP3704TP3704

TP3705TP3705

TP3708TP3708

1 2

+3.3V_RTC_LD O

12

C3708

SCD1U10V2KX-4GP

KBC_AGND

1

12

1

KBC_PLTRST _DELAY#

CAP close to VCC-GND pin pair

VBAT

12

C3709

C3710

U3701A

SCD1U10V2KX-4GP

SC2D2U10V3KX-1GP

104

AD_IA_KBC S0_LKG_DET

NB_VDDC_E N KBC_THERM TRIP#

KB_DET_KBC KBC_SDA1 SUBWOO FER_MUTE# PCB_VER2

KBC_PWRBTN_EC# AC_IN#_KBC

PCB_VER0 DISCRETE_DE T

PCB_VER1

PWR_BTN _LED#

AD_OFF

SYS_PWRGD

EC_SHUTD OWN#

CPUCORE _ON_R

VREF

97

GPI90/AD0

98

GPI91/AD1

99

GPI92/AD2

100

GPI93/AD3

108

GPIO05

96

GPIO04

101

GPI94

105

GPI95

106

GPI96

107

GPI97

64

GPIO01/TB2

95

GPIO03

93

GPIO06

94

GPIO07

119

GPIO23

6

GPIO24

109

GPIO30

120

GPIO31

65

GPIO32/D_PWM

66

GPIO33/H_PWM

16

GPIO40/F_PWM

17

GPIO42/TCK

20

GPIO43/TMS

21

GPIO44/TDI

22

GPIO45/E_PWM

23

GPIO46/TRST#

24

GPIO47

25

GPIO50/TDO

26

GPIO51

27

GPIO52/RDY#

28

GPIO53

73

GPIO70

74

GPIO71

75

GPIO72

110

GPO82/TRIS#

NPCE781BA0DX -GP

0423

PSID_EC76

DY

RCID

B B

+3.3V_RUN

R3729

10KR2J-3-GP

PCB_VER0 PCB_VER1 PCB_VER2

R3733

10KR2J-3-GP

DY

G

2N7002A-7-GP

2N7002A-7-GP Q3706

Q3706

S D

0423

R3731

10KR2J-3-GPDYR3731

10KR2J-3-GP

12

R3730

DY

12

R3734

DY

1 2

R3735

10KR2J-3-GP

12

MB VERSION ID

X00 X01

10KR2J-3-GP

X02

A00

VER2

0 0 0 0 0

VER1

0

111

VER0

0 1 0

AD_IA76

4

102

A/D

D/A

GPIO

116

VCC19VCC46VCC76VCC

AD_IA_KBC

12

4

AVCC

LPC

SMB

SP

SPI

GPO83/SOUT_CR/BADDR1

SER/IR

GND5GND18GND45GND78GND89GND

R3732

Place close to KBC

88

115

VCC

23mA 2mA

R3757 0R2J-2-GPR3757 0R2J-2-GP

80

VDD

GPIO41

GPIO10/LPCPD#

GPIO11/CLKRUN#

ECSCI#/GPIO54

GPIO67/PWUREQ#

GPIO74/SDA2 GPIO73/SCL2 GPIO22/SDA1 GPIO17/SCL1

GPIO66/G_PWM

GPIO76/SHBM

GPIO87/SIN_CR GPO84/BADDR0

AGND

103

KBC_AGND

1 2

0R2J-2-GP

12

DY

SCD1U10V2KX- 4GP

1 OF 2

LRESET#

LCLK

LFRAME#

LAD0 LAD1 LAD2 LAD3

SERIRQ

KBRST#

GA20

GPIO65/SMI#

GPIO77

GPIO75 GPIO81

GPIO16 GPIO34 GPIO36

VCORF

C3724

C3724 SC10P50V2JN-4G P

SC10P50V2JN-4G P

C3702

124 7 2 3 126 127 128 1 125 8 122 121 29 9 123

68 67 69 70

81

84 83 82 91

111 113 112

114 14 15

44

+3.3V_RUN

12

VDDC_PW RGD

KBC_VCORF

12

TP_LPCPD# KBC_PLT_RST #

ECSCI#_KBC

ECSWI#_KBC

KBC_SDA1 KBC_SCL1

ECSMI#_KBC

RCID

E51_TxD E51_RxD

0504

12

C3703

DY

SC2D2U10V3KX- 1GP

TP3712TP3712

1

1 2

R3714 10KR2J-3-GPR3714 10KR2J-3-GP

0423

TP3709TP3709

1

C3711

C3711 SC1U10V3KX-3G P

SC1U10V3KX-3G P

BAT_IN# 76

PCLK_KBC 20,24 LPC_LFRAME# 20,70 LPC_LAD0 20,70 LPC_LAD1 20,70 LPC_LAD2 20,70 LPC_LAD3 20,70 INT_SERIRQ 20 PM_CLKRUN # 2 0 SIO_RCIN# 21 SIO_A20GATE 21

PANEL_BKEN 81

BAT_SDA 76 BAT_SCL 76

1.8V_DELAY_EN 52

BLUETOOTH _EN 73,76 WIFI_RF_EN 76

E51_TxD 76 E51_RxD 76

3.3V_DELAY_EN 42

PM_LAN_ENABLE 76

S5_ENABLE 42

3

THERM_SDA39

KBC_THERM TRIP#

KBC_SCL1

SIO_EXT_WAKE #21

SIO_EXT_SCI#21

SIO_EXT_SMI#21

KBC_PLT_RST #

1 2

DY

R3702 0R2J-2-GP

U3702

2345

1

6

DMN66D0LDW -7-GP

R3708

1 2

DY

0R2J-2-GP

1 2

R3751 0R2J-2-GPR3751 0R2J-2-GP

1

2

1

2

1

2

0R2J-2-GP

1 2

DY

1 2

R3746 0R2J-2-GPR3746 0R2J-2-GP

1 2

R3740 0R0402-PADR3740 0R0402-PAD

12

C3713

DY

SC470P50V2JN-G P

D3701

D3704

D3705

EC_SPI_DI62 EC_SPI_DO62 EC_SPI_CS#62 EC_SPI_CLK62

+3.3V_RUN

BAS16PT-GP

R3739

3

KBC_SDA1

THERM_SCL 39

H_THERMT RIP# 10,21 ,39,42

ECSWI#_KBC

ECSCI#_KBC

ECSMI#_KBC

KBC_PLTRST _DELAY#

PLTRST#_NB_G PU 13,20PLTRST_DELA Y#80

PLTRST#_EC 20

RTCCLK_KBC20

EC_SPI_DI EC_SPI_DO EC_SPI_CS# EC_SPI_CLK

2

KBC_PWR BTN#76

SI2301CDS-T1-G E3-GP

+KBC_PWR

Internal PU

0423

1 2

R3752 0R2J-2-GPR3752 0R2J-2-GP

TP3713TP3713

AMP_MUTE#30

IMVP_PWRGD41,42,47,51

PM_PWRBT N#21

LCD_TST_EN54

KBC_BEEP30

BATLOW_LE D66

BRIGHTNESS54

KB_DET#68

LCD_CBL_DE T#54

TP3706TP3706

LCD_TST54

TPDATA68

TPCLK68

R3737 33R2J-2-GPR 3737 33R2J-2-GP

1 2

0423

+3.3V_RTC_LD O

Q3703

D S

0917

For EC to detect leakage

KBC_XI

KBC_XO

1

THERMTRIP_VG A_GATE

1

EC_SPI_CLK_C

R3709

DY

0R2J-2-GP

BAT54C-U-G P

KBC_ON_R#

G

KBC_SCL1

BAT_SDA BAT_SCL

AC_IN#_KBC

LCD_CBL_DE T#

KB_DET#

E51_RxD

SIO_A20GATE

SIO_RCIN#

EC_RESET_OU T

S0_LKG_DET

KBC_PWR BTN#

77

79 30

63

117

31 32

118

62

13 12 11 10 71 72

86 87 90 92

+KBC_PWR

12

R3703

R3703 100KR2J-1-GP

100KR2J-1-GP

12

D3702

U3701B

32KX1/32KCLKIN

32KX2 GPIO55/CLKOUT

GPIO14/TB1 GPIO20/TA2 GPIO56/TA1 GPIO15/A_PWM GPIO21/B_PWM GPIO13/C_PWM

GPIO12/PSDAT3 GPIO25/PSCLK3 GPIO27/PSDAT2 GPIO26/PSCLK2 GPIO35/PSDAT1 GPIO37/PSCLK1

F_SDI F_SDO F_CS0# F_SCK

NPCE781BA0DX -GP

KBC_PWR BTN_EC#

3

1 2

KBC_ON#

0423

R3756

R3756 10KR2J-3-GP

10KR2J-3-GP

12

C3720

C3720 SCD1U10V2KX- 4GP

SCD1U10V2KX- 4GP

RN3704

1

4

23

SRN4K7J-8-G P

SRN4K7J-8-G P RN3701

RN3701

1

4

23

SRN4K7J-8-G P

12

R3749 10KR2J-3-GPR3749 10KR2J-3-G P

1 2

R3717 100KR2J-1-GPR3717 100KR2J-1-GP

1 2

R3718 100KR2J-1-GPR3718 100KR2J-1-GP

1 2

DY

R3710 10KR2J-3-GP

1 2

DY

R3711 10KR2J-3-GP

1 2

DY

R3713 10KR2J-3-GP

1 2

R3748 100KR2J-1-GPR3748 100KR2J-1-GP

1 2

R3753 100KR2J-1-GPR3753 100KR2J-1-GP

1 2

R3716 100KR2J-1-GPR3716 100KR2J-1-GP

PS/2

FIU

+3.3V_RTC_LD O

R3704

10KR2J-3-GP

1 2

12

+KBC_PWR

+3.3V_RUN

+3.3V_RTC_LD O

2 OF 2

KBSOUT0/JENK#

KBSOUT1/TCK KBSOUT2/TMS

KBSOUT3/TDI

KBSOUT4/JEN0#

KBSOUT5/TDO

KBSOUT6/RDY#

KBSOUT7

KBC

KBSOUT8

KBSOUT9 KBSOUT10 KBSOUT11

KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62

KBSOUT15/GPIO61/XOR_OUT

GPIO60/KBSOUT16 GPIO57/KBSOUT17

KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7

VCC_POR#

D3703

BAT54C-U-G P

S5_ENABLE

KCOL0

BLUETOOTH _EN

IMVP_VR_ON

53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35 34 33

54 55 56 57 58 59 60 61

85

1

+KBC_PWR

Q3705

2N7002A-7-GP

3

12

R3723 10KR2J-3-GPR3723 10KR2J-3-GP

R3724 10KR2J-3-GP

R3726 10KR2J-3-GPR3726 10KR2J-3-GP

R3727 10KR2J-3-GPR3727 10KR2J-3-GP

KCOL0 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16 KCOL17

1

KROW0 KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7

ECRST#

G

12

DY

1 2

DY

1 2

TP3701TP3701

EC_SHUTD OWN#

SD

R3750

R3750 0R2J-2-GP

0R2J-2-GP

AC_IN#_KBC

KCOL[0..16] 68

KROW[0..7] 68

AC_IN# 76

0423

Remove KBC crystal

KBC CLK

PCLK_KBC

EMI

R3738

DY

0R2J-2-GP

PCLK_KBC_RC

1 2

C3715

DY

SC4D7P50V2CN -1GP

1 2

5

4

DY

1 2

E51_TxD

R3741

R3741 4K7R2J-2-GP

4K7R2J-2-GP

A A

0423 reserve U3703

PURE_HW _SHUTDOW N#39,42

3

U3703

1

GND

2

RESET#

G690L293T73UF-G P

+KBC_PWR

4K7R2J-2-GP

R3743

3

VCC

DY

1 2

ECRST#_C

1 2

R3744 0R0402-PADR 3744 0R0402-PAD

2

Q3701

PMBS3906-GP

ECRST#

12

2

C3714

DY

SC1U10V3KX-3G P

1

SC1U10V3KX-3G P

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

KBC Nuvoton NPCE781BA0DX

Size Document Num ber Rev

A2

Arsenal DJ1 Discrete

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

37 89Friday, May 07, 2010

X01

1

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

38 89Friday, May 07, 2010

X01

5

SSID = Thermal

SC10U6D3V5MX-3GP

D D

1.For CPU Sensor

Pleace near to CPU side

H_THERMDC10

SC470P50V2JN-GP

H_THERMDA10

Layout notice : Both H_THERMDA and THERMDC routing 10 mil trace width and 10 mil spacing

12

C3910

DY

Pleace near to GPU side

VGA_THERMDC81

C C

0507

VGA_THERMDA81

SC470P50V2JN-GP

2.GPU Sensor

Layout notice : Both VGA_THERMDA and VGA_THERMDC routing 10 mil trace width and 10 mil spacing.

C3912

12

DY

C3907 must be near Q3902

C3906

Q3901

PMBS3904-1-GP

C3906

2

3

12

SC470P50V2JN-GP

1

SC470P50V2JN-GP

DY

12

C3907

C3907 SC470P50V2JN-GP

SC470P50V2JN-GP

3.HW T8 sensor

Layout notice : Both DN3 and DP3 routing 10 mil

B B

trace width and 10 mil spacing.

0507

+3.3V_RUN

R3921

R3921 63D4R2F

63D4R2F

DY

1 2

DY

12

DY

12

C3914

A A

C3914

SCD1U16V2KX-3GP

5

U3903

3

VCC

DY

G691L293T73UF-GP

R3920

R3920 NTC-100K-8-GP

NTC-100K-8-GP

Pleace near to NB side

+3.3V_RUN

12

C3904SC470P50V2JN-GPC3904SC470P50V2JN-GP

12

C3905

C3905 SC470P50V2JN-GP

SC470P50V2JN-GP

C3907 must be near EMC2102

2

RESET#

1

GND

+3.3V_RUN

4

+5V_RUN

12

C3901

R3902

49D9R2F-GP

SCD1U16V2KX-3GP

DY

12

C3902

C3902 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

EMC2102_VDD_3D3

12

C3903

1 2

EMC2102_DN3

EMC2102_DP3

GND = Channel 1 OPEN = Channel 3 +3.3V = Disabled

+3.3V_RUN

GND = Fan is OFF OPEN = Fan is at 60% full-scale +3.3V = Fan is at 75% full-scale

R3922

R3922 63D4R2F

63D4R2F

1 2

DY

G

R3923

R3923 63D4R2F

63D4R2F

4

R3916

R3916 0R2J-2-GP

0R2J-2-GP

S D

R3905

1 2

DY

10KR2J-3-GP

R3907

1 2

DY

10KR2J-3-GP

R3910

1 2

0R2J-2-GP

Q3904

Q3904 2N7002A-7-GP

2N7002A-7-GP

DY

U3901

1

2

3

4

5

6

7

+3.3V_RUN

12

R3901

10KR2J-3-GP

27

28

29

GND

TACH

VDD_5Va

VDD_3V

0.75mA

DN1

DP1

DN2

DP2

DN3

DP3

EMC2102_SHDN

EMC2102_FAN_mode

PURE_HW_SHUTDOWN# 37,42

0.2mA

EMC2102

SHDN_SEL9FAN_MODE10TRIP_SET11SYS_SHDN#12THERMTRIP#13POWER_OK#

NC#8

8

RTC_CLK20

RUN_ENABLE42

3

EMC2102_FAN_TACH_1

EMC2102_FAN_DRIVE

24

23

26

FANb25FANa

SMCLK

VDD_5Vb

+3.3V_RUN

THERM_SYS_SHDN#

S D

3

0429

1 2

0R2J-2-GP

RN3901

23 1

4

SRN4K7J-8-GP

THERM_SCL 37 THERM_SDA 37

22

SMDATA

21

NC#21

20

GND

19

ALERT#

18

CLK_IN

17

CLK_SEL

16

RESET#

15

NC#15

EMC2102-DZK-GP

14

THERM_POWER_OK# THERMTRIP#

12

R3908

R3908 10KR2J-3-GP

10KR2J-3-GP

THERMAL_P_HW_SHT

G

Q3902

Q3902 2N7002A-7-GP

2N7002A-7-GP

32K suspend clock output

Q3903

Q3903 2N7002A-7-GP

2N7002A-7-GP

G

R3915

+3.3V_RUN

TALERT_R#

CLK_32K

EMC2102_CLK_SEL

EM2102_RESET#

+KBC_PWR

0423

R3909

R3909 10KR2J-3-GP

10KR2J-3-GP

1 2

SD

12

DY

C3913

C3913 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

R3903 0R2J-2-GP

1 2

DY

R3904 0R2J-2-GPR3904 0R2J-2-GP

1 2

R3914 0R2J-2-GP

1 2

DY

+3.3V_RUN

1

23

RN3902

RN3902 SRN10KJ-5-GP

SRN10KJ-5-GP

4

R3906 0R2J-2-GPR3906 0R2J-2-GP

1 2

PURE_HW_SHUTDOWN# 37,42

R3913

1 2

10R2J-2-GP

CLK_32KCLK_32K_R

CLK_32K

12

DY

2

EMC2102_FAN_TACH 58

EMC2102_FAN_DRIVE 58

+3.3V_RUN

GND = Internal Oscillator Selected +3.3V = External 32.768kHz Clock Selected

V_DEGREE

C3911

C3911 SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

2

1

TALERT# 10,21

EC_RESET_OUT 37,41

H_THERMTRIP# 10,21,37,42

+3.3V_RUN

12

R3911

C3908

SCD1U16V2KX-3GP

C3909

SCD1U16V2KX-3GP

R3911 10KR2F-2-GP

10KR2F-2-GP

TRIP_SET Pin Voltage V_DEGREE=(((Degree-75)/21)

12

R3912

R3912 2K37R2F-GP

2K37R2F-GP

T8 shutdown is set 88 deg-C.

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal/Fan Controllor EMC2102

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

1

X01

39 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

40 89Friday, May 07, 2010

X01

5

4

3

2

1

SSID = Reset.Suspend

D D

+3.3V_RU N+3.3V_RU N

100KR2J-1-GP

10KR2J-3-GP

12

R4101

+3.3V_AL W

K A

D4101 SDMK0340L-7-F-GP

PM_SLP_ S3#21,37,42,49,5 2,86

C C

IMVP_PW RGD37,42,47 ,51

EC_RESE T_OUT37,39

0504

IMVP_PW RGD37,42,47 ,51

B B

D4103

BAT54A-3 -GP

D4102

BAT54A-3 -GP

DY

12

3

12

3

U4102

1

NC#1

2

A

DY

GND3Y

SNAUC1G 17DCKR-1GP

SB_PWRGD_C

1 2

R4106 0 R2J-2-GPR4106 0 R2J-2-GP

0423

VCC

5

4

D4101 SDMK0340L-7-F-GP

SB_PW RGD 7,21

DY

100KR2J-1-GP

12

DY

R4102

SB_PW RGD_D

NB_PW RGD21

U4101

1

NC#1

2

A GND3Y

SNAUC1G 17DCKR-1GP

1 2

R4104 0R0402-P ADR4104 0R0402-PA D

DY

VCC

5

4

+1.8V_RU N

300R2J-4-GP

12

R4103

NB_PW RGD_IN 13

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power On Logic

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

41 89Friday, May 07, 2010

1

X01

5

4

3

2

1

SSID = Reset.Suspend

R4201

H_PWRG D_R

D4201

B

DY

12

C4216

DY

3

CPU_LDT_PW RGD10,20

D D

3V_5V_EN46

DY

1 2

DY

1KR2J-1-GP

SCD1U10V2KX- 4GP

2

1

BAS16PT-GP

200KR2J-L1-GP

BAS16PT-GP

1 2

R4202 1KR2J-1-GPR4202 1KR2J-1-GP

12

R4203

E

Q4201

CHT2222APT- GP

C

PURE_HW _SHUTDOW N# 37,39

S5_ENABLE 37

H_THERMT RIP# 10,21,37,39

0506 +1.1V_ALW transfer to +1.1V_RUN

U4207

RUN_ENABL E

+15V_ALW

1 2

R4205

R4205 100KR2J-1-GP

100KR2J-1-GP

0423

R4206

1 2

0R2J-2-GP

X01

R4207

1 2

20KR2J-L2-GP

+5V_ALW +5V_RUN

U4201

D

8

D

7

D

6

AO4468-GP

+3.3V_ALW

8 7 6

AO4468-GP

U4202

D

D D

D

AO4468-GP

5V_RUN_ENA BLE

12

C4201

C4201 SC6800P25V2KX-1G P

SC6800P25V2KX-1G P

3.3V_RUN_EN ABLE

12

C4203

C4203 SCD1U10V2KX- 4GP

SCD1U10V2KX- 4GP

S

1

S

2

S

3

GD

45

12

C4202

C4202 SC10U6D3V5KX- 1GP

SC10U6D3V5KX- 1GP

+3.3V_RUN

S

1

S

2

S

3

GD

45

12

C4204

C4204 SC10U6D3V5KX- 1GP

SC10U6D3V5KX- 1GP

+3.3V_RTC_LD O

100KR2J-1-GP

100KR2J-1-GP R4227

R4227

1 2

IMVP_PWRGD37,41,47,51

PWR_GD #_1.1_RUN

6

123 4

5

GGDDSS

U4211

DMN66D0LDW -7-GP

R4229

100KR2J-1-GP

+15V_ALW

1 2

R4230

1 2

0R0402-PAD

X01

1.1V_RUN_EN ABLE_1.1V_RUN_EN ABLE_R

12

C4210

C4210 SCD01U50V2KX- 1GP

SCD01U50V2KX- 1GP

U4205

S

1

S

2

S

3

G D

4 5

SIR164DP-T1-GE 3-GP

U4208

S

1

S

2

S

3

G D

4 5

SIR164DP-T1-GE 3-GP

D

D D

D

D D

D

+1.1V_ALW

8 7 6

+1.1V_ALW

C4211

SC10U10V5KX-2GP

C4211

SC10U10V5KX-2GP

12

+1.1V_RUN

C4212

SC2200P50V2KX-2GP

12

C4213

SC10U10V5KX-2GP

Run Power

+3.3V_RTC_LD O

100KR2J-1-GP

100KR2J-1-GP R4204

R4204

RUN_ON_5V #

1 2

5

6

DMN66D0LDW -7-GP

123 4

GGDDSS

C C

PM_SLP_S3#21,37,41,49,52,86

RUN_ENABL E39

For Discrete

+3.3V_RTC_LD O

100KR2J-1-GP

100KR2J-1-GP R4211

R4211

RUN_ON_1.5 V#

1 2

B B

1.5V_RUN_EN3 7,49

+3.3V_RTC_LD O

100KR2J-1-GP

100KR2J-1-GP R4228

R4228

1 2

A A

1.1V_GFX_RUN _EN37

5

6

123 4

GGDDSS

PWR_GD #_1.1V_GFX_RUN

5

6

123 4

GGDDSS

U4209

DMN66D0LDW -7-GP

1.5V_RUN_EN ABLE_R

U4210

DMN66D0LDW -7-GP

+15V_ALW

1 2

+15V_ALW

1 2

R4212

R4212 100KR2J-1-GP

100KR2J-1-GP

R4213

1 2

0R2J-2-GP

0423

R4231

R4231 100KR2J-1-GP

100KR2J-1-GP

1 2

0R2J-2-GP

R4232

0423

1.5V_RUN_EN ABLE

12

C4207

C4207 SCD01U50V2KX- 1GP

SCD01U50V2KX- 1GP

12

+1.1V_ALW

1.1V_GFX_RUN _ENABLE1.1V_GFX_RUN _ENABLE_R

C4214

C4214 SCD01U50V2KX- 1GP

SCD01U50V2KX- 1GP

8 7 6

U4204

D

D D

D

AO4468-GP

8 7 6

4

U4206

D

D D

D

AO4468-GP

R4233 0R2J-2-GP

1 2

DY

+1.5V_RUN+1.5V_SUS

S

1

S

2

S

3

GD

45

12

C4208

C4208 SC10U6D3V5KX- 1GP

SC10U6D3V5KX- 1GP

+3.3V_ALW +3.3V_DELA Y

R4222

100KR2J-1-GP

12

0423

R4224

3.3V_DELAY_EN37

RUNPW ROK49,51,52,86

+1.1V_GFX_RUN

S

1

S

2

S

3

GD

45

TA=25 Id=11.6A PD=3.1W TA=70 Id= 9.2A PD= 2W

12

C4215

C4215 SC10U6D3V5KX- 1GP

SC10U6D3V5KX- 1GP

3

1 2

0R2J-2-GP

1 2

75KR2F-GP

R4225

DY

DMN66D0LDW -7-GP

12

DY

Optional RC network to fine tune PWR SEQ.

SI2301CDS-T1-G E3-GP

3.3V_ALW_1

U4212

3.3V_DELAY_EN_1

C4209

C4209 SCD1U16V2KX- 3GP

SCD1U16V2KX- 3GP

2

DY

Q4205

G

6

123 4

DS

Id: 2A Rds: 0.15ohm

5

3.3V_DELAY_1

12

R4223

R4223 100R2J-2-GP

100R2J-2-GP

For Discrete

RUN_ON_1.5 V#

Title

ize Document Num ber Rev

Size Document Num ber Rev

S

A2

Date: Sheet of

Power Plane Enable

Arsenal DJ1 Discrete

+1.5V_RUN

12

R4226

R4226 10R3J-3-GP

10R3J-3-GP

Q4207

Q4207 2N7002A-7-GP

2N7002A-7-GP

G

S D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

42 89Friday, May 07, 2010

1

42 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

43 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

44 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

45 89Friday, May 07, 2010

X01

A

+3D3V_PWR

+3.3V_ALW

PG4601

12

GAP-CLOSE-P WR

PG4602

12

GAP-CLOSE-P WR

PG4603

12

GAP-CLOSE-P WR

PG4606

4 4

3 3

2 2

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 3.3UH PCMC063T-3R3MN Cyntec 28mohm/30mohm Isat =13.5Arms 68.3R310.20A O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081 H/S: FDS8884 23mohm/[email protected]/ 84.08884.037 L/S: FDS6690AS 12mOhm/[email protected]/ 84.06690.E37

1 1

12

GAP-CLOSE-P WR

PG4607

12

GAP-CLOSE-P WR

PG4609

12

GAP-CLOSE-P WR

PG4611

1 2

GAP-CLOSE-P WR

PG4613

1 2

GAP-CLOSE-P WR

PG4614

1 2

GAP-CLOSE-P WR

PG4615

1 2

GAP-CLOSE-P WR

Design Current =7.57A

11.89A<OCP<14.053A

+3D3V_PWR +5V_PWR

12

PC4618

DY

SCD1U10V2KX-4GP

A

+PWR_SR C

1 2

GAP-CLOSE-P WR

1 2

GAP-CLOSE-P WR

1 2

GAP-CLOSE-P WR

1 2

GAP-CLOSE-P WR

12

PTC4601

PTC4602

ST100U6D3VBM-5GP

ST220U6D3VDM-15GP

DY

ST220U6D3VDM-15GP

6K65R2F-GP

10KR2F-2-GP

PR4609

PR4613

Close to VFB Pin (pin5)

+PWR_SR C_3D3V

PG4604

PG4605

PG4608

PG4610

IND-3D3UH- 57GP

GAP-CLOSE-PWR-3-GP

12

PG4623

SC330P50V3KX-GP

12

DY

12

DY

12

+PWR_SR C_3D3V

PC4609

SCD01U50V2KX-1GP

PL4601

PR4606

2D2R5F-2-G P

PC4621

PR4610

PR4610 0R2J-2-GP

0R2J-2-GP

51125_FB2_R

PC4623

PC4623 SC18P50V2JN-1- GP

SC18P50V2JN-1- GP

PC4610

12

SC10U25V6KX-1GP

DY

D

678

DDD

SSS

G D

SSS

G D

123

4 5

S G

12

D

678

DY

DDD

PU4604

12

SSS

G D

SSS

G D

123

4 5

DY

G

S

51125_VREF

+3.3V_ALW_2

51125_VREF

+3.3V_ALW_2

B

51125_ENTRIP

PQ4601

PQ4601 2N7002A-7-GP

2N7002A-7-GP

PR4604

PR4604 0R3J-0-U-G P

0R3J-0-U-G P

1 2

51125_DRVH2

1 2

DY

PC4622

12

51125_TONSEL

51125_SKIPSEL

+3.3V_ALW_2

PR4617 ASM

200kHz

245kHz

300kHz

365kHz

200kHz

300kHz

365kHz

74.51125.073

74.08208.A73

G

SC18P50V2JN-1- GP

S D

PR4622

1 2

DY

820KR3J-GP

51125_VBST2

51125_LL2

51125_DRVL2

51125_VO2

51125_FB2

51125_EN

51125_ENTIP2

TPS51125ARGER -GP

GAP-CLOSE-P WR-3-GP

TPS51125 RT8205B

DYPR4616

+PWR_SR C

PU4601

0.55mA

9

VBST2

10

DRVH2

11

LL2

12

DRVL2

7

VO2

5

VFB2

13

EN0

6

ENTRIP2

3

VREF

4

TONSEL

14

SKIPSEL

VREG3

8

PG4631

1 2

PC4625

3D3V_AUX_S5_5_51125

12

SC4D7U10V5KX-4GP

ASM DY

CH2CH1 VREF(2V)

SKIPSEL

Operating

265kHz

Mode

305kHz

375kHz

460kHz

Operating Mode

CH2CH1TONSEL

250kHz

375kHz

460kHz365kHz

460kHz

3V_5V_EN42

TPS51125 RT8205B

PR4622

DY ASM

51125_EN

TPS51125 RT8205B

PR4604

PU4602

PU4602 FDS8884-GP

FDS8884-GP

PC4616

SCD1U25V3KX- GP

FDS6690AS-GP

0R3J 4R7

51125_VBST2_1 51125_VBST1_1

12

PR4608 820KR2F-GP

51125_VREF

SCD22U10V2KX-1GP

PR4616

12

DY

0R2J-2-GP

0R2J-2-GP PR4617

PR4617

12

0R2J-2-GP

PR4618

12

0R2J-2-GP

PR4619

12

DY

0R2J-2-GP

PR4621

12

DY

0R2J-2-GP

TPS51125:

TONSEL

GND

VREF

VREG3

VREG5

RT8205B(74.08208.A73):

GND

VREF

VREG3

VREG5

TPS51125

RT8208BGQW

B

51125_ENTIP1

12

PC4601

DY

PC4611

PC4612

SC10U25V6KX-1GP

SCD01U50V2KX-1GP

12

DY

16

VIN

51125_VBST1

22

VBST1

51125_DRVH1

21

DRVH1

51125_LL1

20

LL1

51125_DRVL1

19

DRVL1

51125_VO1

24

VO1

51125_FB1

2

VFB1

3V_5V_POK

23

PGOOD

51125_ENTIP1

1

ENTRIP1

15

GND

25

GND

51125_VCLK51125_V CLK51125_VCLK51125_VCLK51125 _VCLK51125_VCLK51125_VCLK5112 5_VCLK51125_VCLK51125_VCLK

18

VCLK

VREG5

17

+5V_ALW2

0507

SC22U6D3V5MX-2GP

PC4627

12

PC4626

SC10U10V5KX-2GP

DY

VREG3 or VREG5

OOA Auto Skip

OpenEN0 820kΩ to GND

enable both LDOs, VCLK on and ready to turn on switcher channels

PR4601

PR4601 127KR2F-GP

127KR2F-GP

+3.3V_ALW_2

6

123 4

TPS51125 RT8205B

PR4605

0R3J 4R7

PR4605

0R3J-0-U-G P

1 2

+3.3V_ALW_2

1 2

0R2J-2-GP

Auto Skip

enable both LDOs, VCLK off and ready to turn on switcher channels

C

12

PR4602

PR4602 100KR2J-1-GP

100KR2J-1-GP

5

51125_ENTIP2

PC4605

PR4620

C

SC18P50V2JN-1-GP

PU4606

DMN66D0LDW -7-GP

12

DY

SCD1U25V3KX- GP

SCD1U25V3KX- GP PC4617

PC4617

0924

+KBC_PWR

12

PR4614

PR4614 100KR2J-1-GP

100KR2J-1-GP

+3.3V_RTC_LD O

GND

PWM only

D

51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_VCLK51125_V CLK51125_VCLK51125_VCLK51125 _VCLK51125_VCLK

12

PR4603

PR4603 127KR2F-GP

127KR2F-GP

+PWR_SR C_5V

PC4614

PC4613

PC4615

12

SC10U25V6KX-1GP

1 2

IND-2D2UH- 46-GP-U

12

DY

PR4607

PR4607 2D2R5F-2-G P

2D2R5F-2-G P

12

PC4620

PC4620 SC560P50V-GP

DY

SC560P50V-GP

DY

0R2J-2-GP

PC4624

SC18P50V2JN-1- GP

PL4602

12

DY

PR4611

PC4615

SCD01U50V2KX-1GP

DY

D

678

DDD

PU4603

1 2

PU4603

PU4605

3V_5V_POK 37,48

FDS8884-GP

SSS

GD

SSS

GD

123

4 5

G

S

D

678

DDD

FDS6690AS-GP

SSS

GD

SSS

GD

123

4 5

SG

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 2.2uH PCMC063T-2R2MN Cyntec 18mohm/20mohm Isat =14Arms 68.2R210.20B O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081 H/S: FDS8884 23mohm/[email protected]/ 84.08884.037 L/S: FDS6690AS 12mOhm/[email protected]/ 84.06690.E37

51125_VCLK51125_V CLK

12

PD4601

BAT54S-5-GP

PG4612

GAP-CLOSE-P WR-3-GP

1 2

GAP-CLOSE-PWR-3-GP

12

PG4626

12

PR4612

PR4612 33KR2F-GP

33KR2F-GP

51125_FB1_R

12

PR4615

PR4615 21K5R2F-GP

21K5R2F-GP

Close to VFB Pin (pin2)

12

PC4603

DY

12

PC4603

SCD1U25V3KX- GP

PD3903_1

3

1

2

PC4606

PC4606 SC1U25V3KX-1- GP

SC1U25V3KX-1- GP

12

PC4619

SCD1U10V2KX-4GP

ST330U6D3VDM-15GP

PC4602

SC1KP50V2KX-1GP

PC4602

SC1KP50V2KX-1GP

PD3903_2

Design Current = 7.3A

11.45A<OCP< 16A

GND

disable all circuit

D

2

PD3903_04

12

PTC4603

12

PC4604

SCD1U25V3KX- GP

PD3904_1

3

PD4602

PD4602 BAT54S-5-GP

BAT54S-5-GP

1

PC4608

SCD1U25V3KX- GP

E

+5V_PWR+15V_ALW

12

PC4607

SCD1U25V3KX- GP

+5V_PWR

+PWR_SR C

+PWR_SR C_5V

PG4616

1 2

GAP-CLOSE-P WR

PG4620

12

GAP-CLOSE-P WR

PG4622

12

GAP-CLOSE-P WR

PG4624

12

GAP-CLOSE-P WR

PG4628

12

GAP-CLOSE-P WR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

ize Document Num ber Rev

Size Document Num ber Rev

S

A2

Arsenal DJ1 Discrete

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O.C.

TPS51125_5V/3D3V

E

PG4618

1 2

GAP-CLOSE-P WR

PG4617

1 2

GAP-CLOSE-P WR

PG4619

1 2

GAP-CLOSE-P WR

PG4621

1 2

GAP-CLOSE-P WR

PG4625

1 2

GAP-CLOSE-P WR

PG4627

1 2

GAP-CLOSE-P WR

PG4629

1 2

GAP-CLOSE-P WR

PG4630

1 2

GAP-CLOSE-P WR

46 89Friday, May 07, 2010

+5V_ALW

X01

5

4

3

2

1

SSID = CPU.Regulator

PC4702

PR4702

1 2

44K2R2F-1-GP

PC4704

SC1KP50V2KX-1G P

PR4704

1 2

22KR2F-GP

6265_COMP_NB

6265_FSET_NB

CPU_VDDNB_RUN_FB_H_R

42

44

43

45

FB_NB

FSET_NB

VSEN_NB

COMP_NB

6265_FB1

6265_VDIFF1

6265_RTN1

6265_VSEN1

PC4727

SC180P50V2JN-1 GP

54K9R2F-L-GP

12

PR4743

DY

4

SC33P50V2JN-3G P

6265_FB_NB_R

1 2

PR4706

PR4706 0R2J-2-GP

0R2J-2-GP

PR4707

1 2

6K8R2F-2-GP

PHASE_NB_R

39

40

38

41

RTN_NB

PGND_NB

LGATE_NB

OCSET_NB

24

6265_VW1

6265_COMP1

1 2

DY

6265_FB1_R

1 2

CPU_VDDN B_RUN_FB_L_R

37

PHASE_NB

UGATE_NB

BOOT_NB

BOOT0 UGATE0 PHASE0

PGND0

LGATE0

LGATE1

PGND1 PHASE1 UGATE1

BOOT1

SC1200P50V2KX-1GP

12

DY

+5V_RUN

PR4701

1 2

D D

+3.3V_RUN

10KR2J-3-GP

12

PR4713

Please check with power team

IMVP_PWRGD37,41,42,51

CPU_PW RGD_SVID_REG10

CPU_SVD10 CPU_SVC10

C C

B B

A A

IMVP_VR_ON37

GNDA_VCOR E

6265_FB0_C

PR4737

1 2

249R2F-GP

1 2

1KR2F-3-GP

PC4723

1 2

SC4700P50V2KX-1G P

PR4739

54K9R2F-L-GP

0507

SC180P50V2JN-1 GP

12

PR4744

PR4719

1 2

0R2J-2-GP

PR4721

1 2

24KR2F-GP

CPU_VDD0_R UN_FB_H10 CPU_VDD0_R UN_FB_L10

CPU_VDD1_R UN_FB_L10 CPU_VDD1_R UN_FB_H10

PC4724

1 2

6265_FB0_R

5

+PWR_SR C

+5V_RUN +3.3V_ RUN

12

PR4709

PR4709 0R2J-2-GP

0R2J-2-GP

10KR2J-3-GP

12

PR4714

DY

PR4717 0R0402-PADPR4717 0R0402- PAD

1 2

PR4718 0R0402-PADPR4718 0R0402- PAD

1 2

1%

93K1R2F-L-GP

SCD01U50V2KX-1GP

PC4718

12

DY

+VCC_COR E

10R2J-2-GP

12

CPU_VDD1_R UN_FB_H

10R2J-2-GP

12

Close to CPU socket

PC4725

1 2

SC1KP50V2KX-1G P

PR4740

1 2

SC1200P50V2KX-1GP

PC4728

6K81R2F-1-GP

12

1 2

0R2J-2-GPDYPR4710

0R2J-2-GP

DY

0R2J-2-GP

DY

GNDA_VCOR E

PR4720

GAP-CLOSE-P WR

+VCC_COR E

10R2J-2-GP

PR4726

PR4735

1 2

10R2J-2-GP

2R3J-GP

PR4703

2R3J-GP

12

PG4701

12

PR4727

12

DY

PR4710

PR4715

CPU_SVD_R CPU_SVC_R VCC_CORE _EN 6265_RBIAS 6265_OCSET 6265_VDIFF0 6265_FB0 6265_COMP0 6265_VW0

PR4736

GNDA_VCOR E

+1.8V_RUN

SC1U16V3KX-2GP

PC4701

12

GNDA_VCOR E

SCD1U50V3KX-GP

PC4707

12

GNDA_VCOR E

PU4701

6265_OFS/VFIXEN

1

OFS/VFIXEN

2

PGOOD

3

PWROK

4

SVD

5

SVC

6

ENABLE

7

RBIAS

8

OCSET

9

VDIFF0

10

FB0

11

COMP0

12

VW0

ISL6265AHRTZ-T -GP

ISP0 ISN0

1KR2J-1-GP

12

PR4723

PR4729 0R2J-2-GPPR4729 0R2J-2-GP

1 2

PR4730 0R2J-2-GPPR4730 0R2J-2-GP

1 2

PR4733 0R2J-2-GPPR4733 0R2J-2-GP

1 2

PR4734 0R2J-2-GPPR4734 0R2J-2-GP

1 2

Parallel

PR4738

6265_FB1_C

1 2

DY

249R2F-GP

SC4700P50V2KX-1G P

PR4741

1 2

DY

1KR2F-3-GP

6265_VIN

6265_FB_NB

6265_VCC

47

46

49

48

VIN

VCC

GND

10mA

74.06265.B73

ISP013ISN014VSEN015RTN016RTN117VSEN118VDIFF119FB120COMP121VW122ISP123ISN1

6265_VSEN0

6265_RTN0

PC4726

1 2

DY

ISL6265HRTZ-T for +VCC_CORE&+VDDNB

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L

nductor:4.7uH PCMC063T-4R7MN 35mohm Isat =10Arms CYNTEC/68.4R710.20D

I

PC4703

1 2

SC1200P50V2KX-1G P

+VDDNB

10R2J-2-GP

PHASE_NB

LGATE_NB

PHASE_NB

UGATE_NB

36 35 34 33 32 31 30

PVCC

29 28 27 26 25

ISN1

PC4722

1 2

DY

SC1KP50V2KX-1G P

PR4742

1 2

DY

PC4733

6K81R2F-1-GP

12

BOOT_NB

O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3.0Arms Panasonic/79.33719.L01 H/S:VISHAY SIS412DN-T1-GE3/ 24mohm/[email protected]/ 84.00412.037 L/S:VISHAY SIS412DN-T1-GE3/ 24mohm/[email protected]/ 84.00412.037

GNDA_VCOR E

PR4705

BOOT0 UGATE0 PHASE0

LGATE0

LGATE1

PHASE1 UGATE1

BOOT1

CPU_VDDN B_RUN_FB_H 10

PR4712

PR4712 0R2J-2-GP

0R2J-2-GP

1 2

+5V_RUN

SC2D2U10V3KX-1GP

PC4712

12

10R2F-L-GP

12

PR4716

CPU_VDDN B_RUN_FB_L 10

BOOT0

1 2

1R3J-L1-GP

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 0.36UH PCMC104T-R36MN1R05J CYNTEC DCR 1.05(+5%~-5%)mohm Isat =60Arms 68.R3610.20C O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3.0Arms Panasonic/79.33719.L01 H/S:VISHAY SiR462DP/ POWERPAK-8.2/810mOhm/ 4.5Vgs/ 84.00462.037 L/S:VISHAY SI7658ADP/ POWERPAK-2.3/ 2.8mOhm/ 4.5Vgs/ 84.07658.037

UGATE1 PHASE1

PR4746

LGATE1

3

UGATE0 PHASE0ISP1

PR4724

1 2

1R3J-L1-GP

BOOT_NB B OOT_NB_R

BOOT0_R

LGATE0

PC4735

BOOT1_RBOOT1

1 2

SCD22U25V3KX- GP

PR4708

1 2

0R3J-0-U-G P

SIS406DN-T1-GE 3-GP

PC4719

1 2

SCD22U25V3KX- GP

PU4711

SIS406DN-T1-GE 3-GP

PU4709

SIS402DN-T1-GE3-GP

PU4710

PU4708

G S

UGATE_NB

PC4708

1 2

SCD22U25V3KX- GP

LGATE_NB

678

DDD

G

4 5

678

DDD

SIS402DN-T1-GE3-GP

G

4 5

G

678

DDD

D

DDD

D

SSS

G

123

4 5

D

678

DDD

D

DDD

D

SSS

G

123

4 5

D

SSS

123

D

SSS

123

S

DDD

G

4 5

G S

DDD

G

4 5

G S

678

DDD

G

4 5

G S

678

DDD

G

4 5

+PWR_SR C

SCD1U25V2ZY-1GP

SC10U25V6KX-1GP

PC4738

PC4705

12

DY

PC4730

12

DY

12

PR4711

2D2R5F-2-G P

PHASENB_RC

12

PC4711

PC4711 SC330P50V3KX-GP

SC330P50V3KX-GP

12

DY

PR4725

PHASE0_RC

12

DY

PC4721

SC10U25V6KX-1GP

PC4731

12

DY

PHASE1_RC

12

DY

2

12

1 2

IND-4D7UH- 88-GP

2D2R5F-2-GP

SC330P50V3KX-GP

SCD1U50V3KX-GP

PR4747

2D2R5F-2-GP

PC4737

SC330P50V3KX-GP

PL4702

16KR2F-GP

+PWR_SR C

PC4734

12

ISP0

SE100U25VM-14GP

DY

SC10U25V6KX-1GP

PR4722

PR4731

1 2

10R2F-L-GP

PTC4706

12

16KR2F-GP

12

ISP1

SC10U25V6KX-1GP

PC4713

12

SCD1U16V3KX- 3GP

DY

PR4748

PR4750

1 2

DY

10R2F-L-GP

1 2

+VDDNB Design Current: 2.8A Peak current: 4A

4.4A<OCP<5.6A

+VDDNB

SC4D7U6D3V5KX-3GP

SC1U10V2KX-1GP

PC4709

12

+PWR_SR C

SC10U25V6KX-1GP

SCD1U25V2ZY-1GP

PC4714

PC4715

12

PL4701

IND-D36UH- 9-GP

0907

PR4728

1 2

4K02R2F-GP

PC4720

1 2

ISP0_R

1 2

NTC-10K-9- GP

PL4703

1 2

IND-D36UH- 9-GP

0907

PR4749

1 2

4K02R2F-GP

4K02R2F-GP PC4736

PC4736

1 2

SCD1U16V3KX- 3GP

PR4751

ISP1_R

1 2

NTC-10K-9- GP

PTC4701

SE330U2VDM-L-GP

PTC4701

SE330U2VDM-L-GP

PC4710

12

PC4717

+VCC_CORE Design Current: 36A

39.6A<OCP<54A

+VCC_COR E

SE330U2VDM-L-GP

PTC4705

PTC4703

PTC4704

12

PG4702

GAP-CLOSE-PWR-3-GP

PR4732

DY

ISN0

SE330U2VDM-L-GP

12

PG4703

GAP-CLOSE-PWR-3-GP

DY

ISN1

Title

VREG : +VCC_CORE&+VDDNB

ize Document Num ber Rev

Size Document Num ber Rev

S

A2

Date: Sheet of

12

+VCC_COR E

SE330U2VDM-L-GP

PTC4707

PTC4708

PTC4709

12

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

1

X01

47 89Friday, May 07, 2010

X01

678

DDD

PU4702

SIS412DN-T1-GE3-GP

PU4702

SIS412DN-T1-GE3-GP

SSS

GD

SSS

GD

123

4 5

PHASE_NB

678

DDD

PU4703

SIS412DN-T1-GE3-GP

PU4703

SIS412DN-T1-GE3-GP

SSS

GD

SSS

GD

123

4 5

D

678

D

PU4704

SIS406DN-T1-GE3-GP

SSS

123

D

678

D

PU4705

SIS402DN-T1-GE3-GP

SSS

123

SC10U25V6KX-1GP

PC4729

D

12

D

PU4706

SIS406DN-T1-GE3-GP

SSS

123

D

PU4707

SIS402DN-T1-GE3-GP

SSS

123

SG

5

4

3

2

1

SSID = PWR.Plane.Regulator_+1.1V_ALW

D D

0222-3 Remove

+5V_ALW

RB551V30-GP

C C

3V_5V_P OK37 ,46

RB551V30-GP

PD5002

K A

PR5014 0R0402-PA DPR5 014 0R0402-PAD PR5015 300KR 2F-GPPR5015 300KR2 F-GP

SC1U10V3KX-3GP

12

1 2 1 2

+5V_ALW

PC5022

0504

B B

RT8209EGQW for +1.1V_RUN

PRb

PR5013

1 2

4D7R3J-L 1-GP

UGATE

LGATE

PHASE

VOUT

PGOOD

GND

PGND

NC#15

PRbPRa

4.7 ohmRT8209B 10 ohm

0 ohm

+1.1V_LL 1

+1.1V_DR VH

13

+1.1V_DR VL

9

+1.1V_LL+1.1V_VOUT_VF B

12

+1.1V_VO UT

3

1.1V_RUN _PWRGD

6 7 8 15

PC5020

SCD1U25 V3KX-GP

0504

10R3J-3-GP

SC1U10V3KX-3GP

SC4700P50V2KX-1GP

12

DY

PR5017

PC5025

PC5027

12

PWM TYPE

*

*DEFAULT

PRa

5V, 1.25mA

+1.1V_VO UT_V5FILT

+1.1V_VO UT_BST

+VDDC_E N +1.1V_VO UT_TON

+1.1V_VO UT_TRIP

12

PR5019

9K31R2F-GP

300 ohmTPS51117

PU4804

4

VDD

10

VDDP

5

FB

14

BOOT

1

EN/DEM

2

TON

11

CS

RT8209E GQW-GP

1 2

1

TP4801TP4801

+PWR _SRC

SC10U25V6KX-1GP

PC5021

12

678

DDD S

PU5003

SSGD

SI7686DP-T1-GP

123

4 5

0504

678

DDD

PU5008

SIR164DP-T1-GE3-GP

PU5008

SIR164DP-T1-GE3-GP

SSS

GD

SSS

GD

123

4 5

Close to VFB Pin (pin5)

PC5026

12

2D2R5F-2-GP

DY

SC330P50V2KX-3GPDYPC5029

SC330P50V2KX-3GP

DY

12

SCD1U50V3KX-GP

SC10U25V6KX-1GP

PC5028

12

PL5002

1 2

COIL-1D5UH -25-GP-U

PR5020

PC5029

+1.1V_VO UT

R1

+1.1V_VO UT_VFB

R2

PC5023

12

Design Current = 7.4A

11.65A<OCP < 15.89A

+1.1V_AL W

SCD1U10V2KX-4GP

SC4D7U6D3V5KX-3GP

PG5018

PR5016

12

DY

PR5018

PR5018 38K3R2F -GP

38K3R2F -GP

SC4D7U6D3V5KX-3GP

SC18P50V2JN-1-GP

PC5024

PC5030

PC5019

12

PTC5004

PTC5006

PTC5005

ST330U2VDM-3GP

PTC5005

ST330U2VDM-3GP

GAP-CLOSE-PWR-3-GP

12

18KR2F-GP

12

Vout=0.75V*(R1+R2)/R2

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 1.5UH PCMC104T-1R5MN 33Arms CYNTEC/ 68.1R510.10J O/P cap: 330U 2.5V EEFCX0E331QR 15mOhm 2.7Arms PANASONIC/ 79.3371V.20L H/S: SI7686DP/ POWERPAK-8/11mOhm/[email protected]/ 84.07686.037 L/S: SiR164DP/ POWERPAK-8/ 2.6mOhm/[email protected]/ 84.00164.037

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

RT8209E_+1.1VALW

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

48 89Friday, May 07, 2010

1

X01

5

4

3

2

1

SSID = PWR.Plane.Regulator_1p5v0p75v

+5V_ALW

PR4901

12

5D1R3J-GP

+5V_ALW

7K15R2F-L-GP

51116_VDD

D D

X01

+3.3V_ALW

PR4905

PR4905 100KR2J-1-GP

100KR2J-1-GP

DY

RUNPWROK42,51,52,86

+5116_PWR_SRC

RT: Non_ASM TI: ASM

C C

Design Current = 0.7A

+0D75V_DDR_P

12

B B

12

PC4914

PC4913

SCD1U10V2KX-4GP

State S3 S5 VDDR VTT REF VTT

S0

S3

S4/S5

VDDQSET VDDQ (V) VTTREF and VTT NOTE

A A

GND

V5IN

FB Resistors

1 2

0507

619KR2F-GP

+5V_ALW

PR4909 1M1R2J-GP

+1.5V_SUS_P

PR4910 0R2J-2-GPPR4910 0R2J-2-GP

+0D75V_DDR_P

12

PC4915

SC10U6D3V5MX-3GP

Hi Hi

Lo Lo

2.5

1.8

Adjustable

5

PR4906

DY

1 2

12

HiLo

1 2

PR4902

1 2

PC4902

SC1KP50V2KX-1GP

0622

PM_SLP_S5#21,37

+1.5V_SUS_P

SC1U10V3KX-3GP

DY

PC4906

SC1KP50V2KX-1GP

PC4916

SC10U6D3V5MX-3GP

OnOnOnOnOn

Off Off Of f

VVDDQSNS/2

12

13

PGD

12

NC#12

11

PG4901

PG4917

EN/PSV

10

VTTEN

23

VTTIN

7

NC#7

TPS51116RGER-GP-U

1

PGND2

4

TON

24

VTT

2

VTTS

GND

25

0D75V_EN

12

PC4905

DY

1 2

+0D75V_DDR_P +0.75V_DDR_VTT

1 2

GAP-CLOSE-PWR

1 2

GAP-CLOSE-PWR

Off(Hi-Z)

DDR

DDR2

1.5 V < VVDDQ < 3 V

SC1U10V3KX-3GP

PC4901

14

16

ILIM

VDDP

0.8mA

VSSA

3

+5V_ALW

12

PC4903

SC1U10V3KX-3GP

15

PU4901

PR4908

TPS51116_VBST1

VDDP

22

BST

TPS51116_UGT

21

DH

TPS51116_PHS

20

LX

TPS51116_LGT

19

DL

18

PGND1

17

PGND1

VDDQS

FB

VCCA

REF

5

+V_DDR_REF

PR4912

1 2

0R0603-PAD

12

PC4908

PC4908 SCD033U16V3KX-GP

SCD033U16V3KX-GP

TPS51116_UGT

TPS51116_VBST

TPS51116_LGT

4

TPS51116_VDDQSNS

8

51116_VDDQSET

9

6

I/P cap: 10U 25V K1206 X5R/ 78. 10622.52L Inductor: 1.5UHP CMC104T-1R5MN D CR:3.8/4.2mohm Isat =33Arms Cy ntec/ 68.1R510. 10J O/P cap: 220U 2 V EEFCX0D221R 1 5mOhm 2.7Arms P ANASONIC/ 79.22 719.20L H/S: SI7686DP/ P OWERPAK-8/11mOh m/[email protected] / 84.07686.037 L/S: SiR164DP/ P OWERPAK-8/ 2.6m Ohm/[email protected] Vgs/ 84.00164.0 37

1 2

PC4917

SCD1U25V3KX-GP

+5V_ALW

1 2

0R3J-0-U-GP

0R2J-2-GP

12

PC4907

DY

SC1U10V3KX-3GP

TPS51116_VBST

PR4911

1 2

DY

PD4901

DY

CH551H-30PT-GP

2 1

SI7686DP-T1-GP

SIR164DP-T1-GE3-GP

+5116_PWR_SRC

PU4902

4 5

PU4903

4 5

3

678

DDD S

678

DDD

GD

SSGD

123

TPS51116_PHS

SSS

123

PC4909

1 2

SC10U25V6KX-1GP

12

PR4913

DY

2D2R5F-2-GP

TPS51116_PHS_SET

12

DY

PC4920

PC4920 SC330P50V3KX-GP

SC330P50V3KX-GP

1 2

PL4901

1 2

IND-1D5UH-34-GP

PM_SLP_S3#21,37,41,42,52,86

PM_SLP_S5#21,37

1.5V_RUN_EN37,42

PC4922

PC4911

1 2

SC10U25V6KX-1GP

TPS51116_VDDQSNS

PR4914

30KR2F-GP

51116_VDDQSET

PR4915

30KR2F-GP

PR4903 0R2J-2-GPPR4903 0R2J-2-GP

PR4907 0R2J-2-GP

PR4904 0R2J-2-GP

12

PC4912

SCD1U50V3KX-GP

SC4D7U25V5KX-GP

1 2

PG4918

GAP-CLOSE-PWR-3-GP

12

DY

12

1 2

DY

1 2

DY

+PWR_SRC

12

PC4921

PC4921 SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

+5116_PWR_SRC

PG4903

12

GAP-CLOSE-PWR

PG4905

12

GAP-CLOSE-PWR

PG4907

12

GAP-CLOSE-PWR

PG4909

12

GAP-CLOSE-PWR

PG4911

12

GAP-CLOSE-PWR

Design Current = 18.45A

28.99A<OCP< 34.3 A

12

PC4918

PC4919

SCD1U10V2KX-4GP

SC4D7U6D3V5KX-3GP

Close to VFB Pin (pin5)

2

0D75V_EN

12

DY

+1.5V_SUS_P

12

PTC4902

SE220U2VDM-8GP

PC4904

PC4904 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

PTC4901

SE220U2VDM-8GP

+1.5V_SUS_P

Title

S

ize Document Number Rev

Size Document Number Rev

Custom

Date: Sheet of

+1.5V_SUS

PG4902

1 2

GAP-CLOSE-PWR

PG4904

1 2

GAP-CLOSE-PWR

PG4906

1 2

GAP-CLOSE-PWR

PG4908

1 2

GAP-CLOSE-PWR

PG4910

1 2

GAP-CLOSE-PWR

PG4912

1 2

GAP-CLOSE-PWR

PG4913

1 2

GAP-CLOSE-PWR

PG4914

1 2

GAP-CLOSE-PWR

PG4915

1 2

GAP-CLOSE-PWR

PG4916

1 2

GAP-CLOSE-PWR

PG4919

1 2

GAP-CLOSE-PWR

PG4920

1 2

GAP-CLOSE-PWR

PG4921

1 2

GAP-CLOSE-PWR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

TPS51116_+1.5V_SUS

Arsenal DJ1 Discrete

1

49 89Friday, May 07, 2010

X01

5

4

3

2

1

SSID = PWR.Plane.Regulator_VDDC

D D

C C

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51117 +VDDC

Size Document N umber Rev

Date: Sheet of

TPS51117 +VDDC

A3

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

50 89Friday, May 07, 2010

1

X01

5

4

3

2

1

SSID = PWR.Plane.Regulator_VDDR

D D

RT9025 for +VDDR

+5V_ALW

PC5101

SC1U10V3KX-3GP

PC5101

SC1U10V3KX-3GP

12

+1.5V_SU S

PC5106

SC10U6D3V5MX-3GP

PC5106

SC10U6D3V5MX-3GP

12

C C

1.2mA

RUNPW ROK42,49,5 2,86

Vo=0.8*(1+(R1/R2))

IMVP_PW RGD37,41,42 ,47

1 2

PR5101

2K2R2J-2 -GP

SC4700P50V2KX-1GP

PC5104

12

DY

Vout=0.8V*(R1+R2)/R2

X01

MEM_1V522

B B

VDDR_SE L20,24

VDDR_SEL

BAT54A-3 -GP

+CPU_VDDR

PD5101

12

PR5108 0R2J-2-GP

PR5105

10KR2F-2 -GP

3

1 2

DY

+3.3V_RU N

12

PR5103

10KR2F-2 -GP

12

VDDR_SE L_CNTL

SCD047U16V2KX-1-GP

VDD4NC#5

3

VIN

2

EN

1

PGOOD

PU5101

PU5101 RT9025-2 5PSP-GP

RT9025-2 5PSP-GP

12

DY

PC5102

9

5

GND

6

VOUT

ADJ

GND

PR5104

1 2

100KR2J-1-GP

7 8

2N7002-7 F-GP

+VDDR_A DJVDDR_EN

PQ5101

G

12

PR5107

PR5107 5K62R2F -GP

5K62R2F -GP

VDDRSEL_R

S D

1K05R2F-GP

PR5102

12

PR5106

PR5106 8K2R2F-1 -GP

8K2R2F-1 -GP

SCD01U16V2KX-3GP

12

DY

0429

PC5105

+VDDR_P

SC22U6D3V5MX-2GP

PC5107

12

DY

PC5103

GAP-CLOS E-PWR

PG5101

1 2

PG5102

1 2

+CPU_VD DR

1.05VH

0.95V L

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

RT9025 +VDDR

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

51 89Friday, May 07, 2010

1

X01

5

4

3

2

1

SSID = PWR.Plane.Regulator_1p8v

APL5930 for +1.8V_RUN

+3.3V_AL W +1.8V _RUN_VIN

D D

C C

PG5201

12

GAP-CLOS E-PWR

PG5202

12

GAP-CLOS E-PWR

+1.8V_RU N_VIN+5V_ALW

SC1U10V3KX-3GP

PC5201

12

1.5mA

6

PU5201

RUNPW ROK42,49,5 1,86

PM_SLP_ S3#21,37,41,42,4 9,86

1.8V_DEL AY_EN37

1 2

DY

PR5202 0R2J-2-GP

X01

PR5201

1 2

10KR2J-3 -GP

X01

1D8V_RU N_EN

12

7

POK

8

EN

APL5930 KAI-TRG-GP

PC5207

PC5207 SCD22U6 D3V2KX-1GP

SCD22U6 D3V2KX-1GP

VIN#5 VIN#9

VCNTL

VOUT#3 VOUT#4

GND

1

5 9

3 4

2

FB

SO-8-P

SC10U6D3V5MX-3GP

PC5202

PC5203

12

DY

SC68P50V2JN-1GP

12

PR5204

PR5204 13K3R2F -L1-GP

13K3R2F -L1-GP

PC5203

Design Current =0.92A

+1.8V_RU N_P

SC22U6D3V5MX-2GP

PC5204

SC22U6D3V5MX-2GP

PC5205

12

DY

PC5206

12

Vout=0.8V*(R1+R2)/R2

+1.8V_RU N_P +1.8V_RUN

PG5203

1 2

GAP-CLOS E-PWR

PG5204

1 2

GAP-CLOS E-PWR

12

PR5203

16K5R2F-2-GP

PR5203

16K5R2F-2-GP

12

5912_1.8V_RUN_FB

12

SSID = PWR.Plane.Regulator_1p8v

+1.8V_RU N +1.8V_DE LAY

APL5930 for +1.8V_DELAY

1 2

DY

PR5205

B B

+3.3V_AL W +1.8V _DELAY_VIN

PG5205

+3.3V_AL W

12

PR5206

PR5206 10KR2F-2 -GP

10KR2F-2 -GP

5

6

PU5203

DMN66D0 LDW-7-GP

PR5209

1 2

10R3F-GP

+1.8V_DE LAY

123 4

A A

1.8V_DEL AY_EN

12

GAP-CLOS E-PWR

PG5206

12

GAP-CLOS E-PWR

RUNPW ROK42,49,5 1,86

1.8V_DEL AY_EN37

Vo=0.8*(1+(R1/R2))

PR5207

1 2

2K2R2J-2 -GP

1D8V_DE LAY_EN

12

DY

SC4700P50V2KX-1GP

SC1U10V3KX-3GP

12

1.5mA

PU5202

7

POK

8

EN

PC5211

APL5930 KAI-TRG-GP

PC5208

6

VIN#5 VIN#9

VCNTL

VOUT#3 VOUT#4

GND

1

Vout=0.8V*(R1+R2)/R2

5

4

3

5 9

3 4

2

FB

SO-8-P

+1.8V_DE LAY_VIN+5V_ALW

SC10U6D3V5MX-3GP

12

PC5210

PC5209

12

DY

Design Current =1.15A

+1.8V_DE LAY_P

SC22U6D3V5MX-2GP

PC5212

SC68P50V2JN-1GP

PC5212

SC68P50V2JN-1GP

PR5208

16K5R2F-2-GP

PR5208

16K5R2F-2-GP

12

5912_1.8V_DELAY_FB

12

PR5210

PR5210 13K3R2F -L1-GP

13K3R2F -L1-GP

SC22U6D3V5MX-2GP

PC5213

12

2

DY

PC5214

12

Title

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

PR5205

0R5J-5-GP

+1.8V_DE LAY_P +1.8V_DELAY

PG5207

1 2

GAP-CLOS E-PWR

PG5208

1 2

GAP-CLOS E-PWR

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

APL5930_+1.8V_RUN

Arsenal DJ1 Discrete

1

X01

52 89Friday, May 07, 2010

X01

5

4

3

2

1

SSID = PWR.Plane.Regulator_0P9v

D D

C C

SSID = PWR.Plane.Regulator_2p5v

B B

RT9013-25PB for +2.5V_RUN

+3.3V_RUN +2.5V_RUN

SC4D7U6D3V3KX-GP

PC5301

1 2

12

PR5301

PR5301 1KR2J-1-GP

1KR2J-1-GP

2D5V_RUN_EN

SC1U6D3V2KX-GP

PC5302

12

X01

A A

5

4

PU5301

1

VIN

2

GND EN3NC#4

RT9013-25PB-GP

3

VOUT

5

4

SC4D7U6D3V3KX-GP

+2.5V_RUN +/- 5%

PC5303

Design Current: 175mA

12

Peak current 250mA

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

VREG : +CPU_VDDR&+2.5V_RUN

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

53 89Friday, May 07, 2010

1

X01

SSID = VIDEO

LVDS CONNECTOR

51 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2

1 50

GFX_PW R_SRC

LCD_BRIGH TNESS LCD_CBL _DET#_C BLON_OU T_C LCD_TST _C

LDDC_CL K LDDC_DA TA LCD_DET _G

VGA_TXA OUT0-VGA_TXAOUT 0VGA_TXA OUT0+

VGA_TXA OUT1VGA_TXA OUT1+

VGA_TXA OUT2VGA_TXA OUT2+

VGA_TXA CLKVGA_TXA CLK+

USB_CAM ERAUSB_CAM ERA+

0423

IPEX-CONN4 0-2R-GP-U

49

47

46

45

44

43

42

41

48

LCD1

20.F1093.040

20.F1289.040

+LCDVDD

12

C5401

+3.3V_DE LAY

LDDC_CL K 8 1 LDDC_DA TA 8 1

VGA_TXA OUT0- 81 VGA_TXA OUT0+ 81

VGA_TXA OUT1- 81 VGA_TXA OUT1+ 81

VGA_TXA OUT2- 81 VGA_TXA OUT2+ 81

VGA_TXA CLK- 81 VGA_TXA CLK+ 81

+3.3V_CA MERA

0929

SC10U6D3V5KX-1GP

C5404

12

DY

SCD1U10V2KX-4GP

R5409 0R3J-0-U-G PR5409 0R3J-0-U-GP

1 2

R5411 0R3J-0-U-G PR5411 0R3J-0-U-GP

1 2

Place R5409 and R5411 together

+3.3V_RU N

R5408

100KR2J -1-GP

1 2

DY

12

R5401

R5401 10KR2J-3 -GP

10KR2J-3 -GP

USB_PN1 1 21 USB_PP1 1 21

LCD_CBL _DET#_C BLON_OU T_C LCD_TST _C LCD_DET _G

LCD_BRIGH TNESS

LCD_TST

1 2

R5402 100 R2J-2-GPR 5402 10 0R2J-2-GP

1 2

DY

R5403 100 R2J-2-GP

R5405

R5405 100KR2J -1-GP

100KR2J -1-GP

DY

1 2

RN5401

1 2 3 4 5

8 7 6

SRN100J -4-GP

12

DY

EC5402

SC33P50V2JN-3GP

For EMI request

LCD_CBL _DET# 37

BLON_OU T 3 7

LCD_TST 37

EC5403

SC33P50V2JN-3GP

LBKLT_C TL 81

BRIGHTNES S 37

SSID = Inverter

INVERTER POWER

GFX_PW R_SRC +PWR _SRC

1 2

C5402

SC1KP50 V2KX-1GP

C5402

12

C5403

C5403 SCD1U50 V3KX-GP

SCD1U50 V3KX-GP

1 2

0423

use Poly-fuse

F5401

POLYSW -1D1A24V-1-GP

SSID = VIDEO

LCD POWER

LCDVDD_ EN81

LCD_TST _EN37

D5401

12

BAT54C-U -GP

3

12

R5412

1 2

0R0402-P AD

X01

R5413

49K9R2F-L-GP

ENVDDENV DD_D

12

DY

C5406

U5401

IN#5

4

5

OUT3IN#4

2

GND

1

EN

G5285T1 1U-GP

SCD1U16V2KX-3GP

+3.3V_RU N+LCDVDD

12

C5407

SCD1U10V2KX-4GP

R5414

1 2

0R3J-0-U-G P

EC5405

SCD1U16 V2KX-3GP

EC5405

Camera Power

+3.3V_CA MERA+3.3V_RU N

12

C5408

DY

C5408 SC10U6D 3V5MX-3GP

SC10U6D 3V5MX-3GP

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

LCD/Inverter Connector

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

LCD/Inverter Connector

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

54 89Friday, May 07, 2010

X01

5

4

3

2

1

SSID = VIDEO

+5V_CRT_RUN

1

D D

SRN2K2J-1-GP

Layout Note:

*Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT CONN. * RGB signal will hit 75 Ohm

DDC_DATA_CON81

DDC_CLK_CON81

SC22P50V2JN-4GP

first, then pi-filter, finally CRT CONN.

L5501

M_RED81

M_GREEN81

C C

B B

M_BLUE81

12

R5503

75R2F-2-GP

VGA_HSYNC81,83

VGA_VSYNC81,83

12

R5504

75R2F-2-GP

5 6

12

R5505

DY

75R2F-2-GP

14

4

U5501B

TSAHCT125PW-GP

7

DY

C5505

SC8P250V2CC-GP

R5501

1 2

DY

0R2J-2-GP

14

2 3

TSAHCT125PW-GP

7

12

C5506

+5V_CRT_RUN

1

U5501A

DY

SC8P250V2CC-GP

12

1 2

BLM15BB220SS1D-GP

L5502

1 2

BLM15BB220SS1D-GP

L5503

1 2

BLM15BB220SS1D-GP

12

C5507

SC8P250V2CC-GP

C5511

C5511 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

HSYNC_5

RN5502

VSYNC_5 JVGA_VS

4

SRN33J-5-GP-U

12

C5508

JVGA_HS

1 23

SC8P250V2CC-GP

CRT_R

CRT_G

CRT_B

12

C5509

C5510

SC8P250V2CC-GP

RN5501

C5501

CRT_R

CRT_G

CRT_B

23

4

DDC_DATA_CON

12

C5502

SC22P50V2JN-4GP

D5501

3

DY

BAV99PT-GP-U

D5503

3

DY

BAV99PT-GP-U

D5504

3

DY

BAV99PT-GP-U

DDC_CLK_CON

+5V_CRT_RUN

2

1

2

1

2

1

+5V_CRT_RUN

AFTP5501AFTP5501 AFTP5502AFTP5502 AFTP5503AFTP5503 AFTP5504AFTP5504 AFTP5505AFTP5505 AFTP5506AFTP5506 AFTP5507AFTP5507 AFTP5508AFTP5508

AFTP5509AFTP5509

CRT_R

CRT_G

CRT_B

+5V_CRT_RUN

1

DDC_DATA_CON

1

DDC_CLK_CON

1

CRT_R

1

CRT_G

1

CRT_B

1

JVGA_HS

1

JVGA_VS

1

+5V_CRT_RUN

12 11

1

14

10

9 8

U5501C

7

TSAHCT125PW-GP

14

13

U5501D

7

TSAHCT125PW-GP

CRT1

16

6 1

11

7 2 8 3 9 4

10

5

17

D-SUB-15-81-GP

DDC_DATA_CON

12

JVGA_HS

13

JVGA_VS

14

DDC_CLK_CON

15

20.20401.015

X01

C5512

SCD01U16V2KX-3GP

C5512

12

DY

C5504

C5503

SC33P50V2JN-3GP

+5V_CRT_RUN +5V_RUN

12

D5502

2 1

CH551H-30PT-GP

R5502

1 2

DY

0R2J-2-GP

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Number Rev

Size Document Number Rev

S

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

CRT Connector

1

55 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

56 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

HDMI (Reserved)

57 89Friday, May 07, 2010

1

X01

5

D D

C C

4

3

2

1

SSID = Thermal

Fan Connector

B B

3 1

*Layout* 15 mil

EMC2102 _FAN_TACH39

EMC2102 _FAN_DRIVE39

A A

5

4

EMC2102 _FAN_TACH

EMC2102 _FAN_DRIVE

SC10U6D 3V5MX-3GP

C5801

AFTP580 1AFTP 5801

21

12

D5801

D5801 CH551H-3 0PT-GP

CH551H-3 0PT-GP

1

3

FAN1

5 3 2

1 4

FOX-CON3 -6-GP-U

20.D0210.103

20.F1293.003

AFTP580 2AFTP 5802

AFTP580 3AFTP 5803

EMC2102 _FAN_TACH

1

EMC2102 _FAN_DRIVE

1

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ITP/Fan Connector

Size Document N umber Rev

A3

Date: Sheet of

ITP/Fan Connector

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

58 89Friday, May 07, 2010

1

X01

SSID = SATA

+3.3V_RU N

SC10U6D 3V5MX-3GP

+5V_RUN

SC10U6D 3V5MX-3GP

C5901

C5903

SATA HDD Connector

4/29

12

C5902

12

SATA_TX P022

SATA_TX N022

C5902

DY

SCD1U16 V2KX-3GP

12

C5904

C5904 SCD1U16 V2KX-3GP

SCD1U16 V2KX-3GP

X02

DY

SATA_RX P022

SATA_RX N022

HDD1

P1

V33

P2

V33

P3

V33

P7

V5

P8

V5

P9

V5

P13

V12

P14

V12

P15

V12

S2

A+

S3

A-

S6

B+

S5

B-

SKT-SATA 7P-15P-23-GP

NP1 NP2

GND GND GND GND GND GND GND GND

DAS/DSS

22.10300.961

23

24

NP1 NP2

S1 S4 S7 P4 P5 P6 P10 P12

P11

ODD Connector

4/29

X02

ODD1

8 NP1 S1

S2 S3 S4 S5 S6 S7

P1 P2 P3 P4 P5 P6 NP2 9

SKT-SATA 7P-6P-4-GP

22.10300.811

22.10300.471

SATA_TX P1 2 2 SATA_TX N1 22

SATA_RX N1 22 SATA_RX P1 22

SCD1U10 V2KX-4GP

SATA_RX- and SATA_RX+ Trace Length match within 20 mil

+5V_RUN

12

C5905

12

C5906

C5906 SC10U6D 3V5MX-3GP

SC10U6D 3V5MX-3GP

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

HDD/ODD

59 89Friday, May 07, 2010

X01

5

4

3

2

1

SSID = AUDIO

Speaker

LINE1

Connector

OUT

BLM18BD 601SN1D-GP

L6001

1 2

L6002

L6002 BLM18BD 601SN1D-GP

BLM18BD 601SN1D-GP

12

EC6006

EC6006 SC1KP50 V2KX-1GP

SC1KP50 V2KX-1GP

600ohm 100MHz 200mA 0.5ohm DC

G6009 GAP-OPE N-PWRG 6009 GAP-O PEN-PWR

1 2

G6010 GAP-OPE N-PWRG 6010 GAP-O PEN-PWR

1 2

G6011 GAP-OPE N-PWRG 6011 GAP-O PEN-PWR

1 2

G6012 GAP-OPE N-PWRG 6012 GAP-O PEN-PWR

1 2

D D

5

SPK1

SPK1 FOX-CON4 -19-GP

FOX-CON4 -19-GP

AUD_SPK _L-30

AUD_SPK _L+30 AUD_SPK _R-30 AUD_SPK _R+30

12

DY

12

DY

EC6003

SC100P50V2JN-3GP

X01

EC6004

20.F0711.004

20.F1561.004

20.F1621.004

SC100P50V2JN-3GP

12

DY

C C

AFTP600 1AFTP 6001 AFTP600 5AFTP 6005 AFTP600 7AFTP 6007 AFTP600 9AFTP 6009

AUD_SPK _L-

1

AUD_SPK _L+

1

AUD_SPK _R-

1

AUD_SPK _R+

1

EC6002

EC6001

SC100P50V2JN-3GP

1

2 3 4

6

1

AFTP600 2AFTP 6002

AFTP600 3AFTP 6003

AFTP600 4AFTP 6004

AFTP600 8AFTP 6008

1002 For EMI

G6001 GAP-OPE N-PWRG 6001 GAP-O PEN-PWR

G6002 GAP-OPE N-PWRG 6002 GAP-O PEN-PWR

G6003 GAP-OPE N-PWRG 6003 GAP-O PEN-PWR

G6004 GAP-OPE N-PWRG 6004 GAP-O PEN-PWR

JACK_AG ND

AUD_HP1 _JACK_L230

AUD_HP1 _JACK_R230

1 2

AUD_HP1 _JD#30

SC1KP50 V2KX-1GP

AUD_HP1 _JD#

1

AUD_HP1 _JACK_L1

1

AUD_HP1 _JACK_R1

1

G6005 GAP-OPE N-PWRG 6005 GAP-O PEN-PWR

G6006 GAP-OPE N-PWRG 6006 GAP-O PEN-PWR

G6007 GAP-OPE N-PWRG 6007 GAP-O PEN-PWR

G6008 GAP-OPE N-PWRG 6008 GAP-O PEN-PWR

JACK_AG ND JACK_AG ND JACK_AGND JACK_A GND

AUD_HP1 _JACK_L2

AUD_HP1 _JACK_R2

EC6005

JACK_AG ND JAC K_AGND

1 2

12

AUD_HP1 _JD#

AUD_HP1 _JACK_L1

AUD_HP1 _JACK_R1

12

EC6007

JACK_AG ND JAC K_AGND

SC100P50V2JN-3GP

AFTP600 6AFTP 6006

G6013 GAP-OPE N-PWRG 6013 GAP-O PEN-PWR

1 2

G6014 GAP-OPE N-PWRG 6014 GAP-O PEN-PWR

1 2

G6015 GAP-OPE N-PWRG 6015 GAP-O PEN-PWR

1 2

G6016 GAP-OPE N-PWRG 6016 GAP-O PEN-PWR

1 2

EC6008

SC100P50V2JN-3GP

PHONE-JK 383-GP

6 5 2

4 1 3 7 8

22.10133.K31

1

22.10133.K71

JACK_AG ND

LINEOUT1

G6017 GAP-OPE N-PWRG 6017 GAP-O PEN-PWR

1 2

G6018 GAP-OPE N-PWRG 6018 GAP-O PEN-PWR

1 2

G6019 GAP-OPE N-PWRG 6019 GAP-O PEN-PWR

1 2

G6020 GAP-OPE N-PWRG 6020 GAP-O PEN-PWR

1 2

Internal Microphone

B B

AUD_EXT _MIC_L30

MIC1 is in DIP

MIC1

INT_MIC_L_R30

EC6009

SC1KP50 V2KX-1GP

A A

1

MICROPHON E-40-GP-U1

12

2

23.42143.001

AUD_EXT _MIC_R30

AUD_VRE FOUT_B30

AUD_EXT _MIC_L

AUD_EXT _MIC_R

AFTP601 1AFTP 6011

AFTP601 2AFTP 6012

AFTP601 3AFTP 6013

RN6001

SRN4K7J -8-GP

C6001 SC1 U10V3KX-3GPC6 001 SC1 U10V3KX-3GP

C6003 SC1 U10V3KX-3GPC6 003 SC1 U10V3KX-3GP

12

MIC_IN_L_C

1

MIC_IN_R_C

1

EXT_MIC_J D#

1

23

1

4

MIC_IN_L_2

MIC_IN_R_2

12

C6002

SC1U10V3KX-3GP

JACK_AG ND

R6001 0R3J-0-U-G PR6001 0R3J-0-U-GP

1 2

R6002 0R3J-0-U-G PR6002 0R3J-0-U-GP

EXT_MIC_J D#30

12

MIC_IN_L_C

MIC_IN_R_C

12

EC6010

SC100P50V2JN-3GP

JACK_AG ND JACK_AGN D

MIC IN

22.10133.K51

22.10133.K71

8 7 3 1 4

2 5 6

PHONE-JK 383-GP

12

EC6011

SC100P50V2JN-3GP

AFTP601 0AFTP 6010

1

MICIN1

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

S

ize Document Nu mber Rev

Size Document N umber Rev

A3

Date: Sheet of

5

4

3

2

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Audio Jack

1

X01

60 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

61 89Friday, May 07, 2010

X01

5

4

3

2

1

SSID = Flash.ROM

D D

SPI FLASH ROM (16M bits) for KBC

12

+KBC_PW R

C6202

SCD1U16V2KX-3GP

12

C6203

SCD1U16V2KX-3GP

EC_SPI_CL K 37 EC_SPI_DO 37

+KBC_PW R

0423

R6201

100KR2J -1-GP

EC_SPI_CS #37

EC_SPI_DI37

C C

EC_SPI_W P#_R37

SC4D7P5 0V2CN-1GP

EC6201

X01

R6202 3 3R2J-2-GPR6202 33 R2J-2-GP

1 2

R6203 0 R2J-2-GPR6203 0 R2J-2-GP

1 2

12

DY

100KR2J -1-GP

R6207

12

DY

EC_SPI_W P#

12

0423

4

RN6201

RN6201 SRN100K J-6-GP

SRN100K J-6-GP

1

2 3

EC_SPI_CS #

EC_SPI_DI_R

EC_SPI_HO LD#

U6201

1

CS#

2

DO/IO1

3

WP#/IO2

4

GND

W25Q 16BVSSIG-GP

8

VCC

7

HOLD#/IO3

6

CLK

5

DI/IO0

SC4D7P5 0V2CN-1GP

SC10U6D 3V5MX-3GP

+KBC_PW R

EC_SPI_HO LD#

EC_SPI_DO _R

12

DY

EC6202

25mA

DY

12

C6201

DY

1 2

R6204 33R2J-2 -GPR6204 33R2J-2-GP

12

EC6203

EC6203 SC4D7P5 0V2CN-1GP

SC4D7P5 0V2CN-1GP

PN:72.25Q16.001

SSID = RBATT

B B

+3.3V_RT C_LDO

D6201

+RTC_CE LL

12

R6205

1 2

0R0402-P AD

X01

C6204

C6204 SC1U10V 3KX-3GP

SC1U10V 3KX-3GP

RTC_PW R_L

D6201

BAT54C-U -GP

12

3

RTC_PW R

1 2

X01

A A

5

4

Width=20mils

AFTP620 2AFTP 6202

RTC Connector

+RTC_VC C

R6206

1KR2J-1-G P

AFTP620 1AFTP 6201

1

3

+RTC_VC C

1

62.70001.011

NP1 NP2

4/29

RTC1

1

PWR

2

GND NP1 NP2

BAT-CON2 -1-GP-U

X02

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Flash/RTC

1

62 89Friday, May 07, 2010

X01

5

4

3

2

1

SSID = USB

IO Board USB Power

U6301

D D

12

DY

C6302

SCD1U10V2KX-4GP

at least 80 mil

USB_PW R_EN#37

1

GND

2

IN#2

3

IN#3

4

EN/EN#

G547F2P 81U-GP

OUT#8 OUT#7 OUT#6

OC#

8 7 6 5

at least 80 mil

USB_OC# 0_1 21

+5V_USB 1+5V_ALW

X01

C C

+5V_ALW

at least 80 mil

12

DY

B B

USB_PN021

USB_PP02 1

USB_PP0

USB_PW R_EN#37

C6303

SCD1U10V2KX-4GP

1 2

R6302 0R3J-0-U-G PR6302 0R3J-0-U-GP

1 2

R6303 0R3J-0-U-G PR6303 0R3J-0-U-GP

USB_P0-USB_PN0

USB_P0+

Place R6302 and R6303 together

USB_PN121

USB_PP12 1

A A

USB_PN1 USB_P1-

USB_PP1

1 2

R6304 0R3J-0-U-GPR6304 0R3J-0-U-GP

1 2

R6305 0R3J-0-U-GPR6305 0R3J-0-U-GP

USB_P1+

Right USB Power

U6302

1

GND

2

IN#2

3

IN#3

4

EN/EN#

G547F2P 81U-GP

USB_P0+

8

OUT#8

7

OUT#7

6

OUT#6

5

OC#

D6301

1

2 3

PRTR5V0 U2X-GP

D6302

1

2 3

PRTR5V0 U2X-GP

DY

at least 80 mil

USB_OC# 2_3 21

+5V_USB 2

4

USB_P0-

+5V_USB 2

4

USB_P1-USB_P1+

+5V_USB 2

12

DY

AFTP630 2AFTP 6302 AFTP630 3AFTP 6303 AFTP630 4AFTP 6304 AFTP630 5AFTP 6305

12

R6301

C6304

100KR2J-1-GP

SCD1U10V2KX-4GP

12

C6305

TC6301

SC1U10V3KX-3GP

ST100U6D3VBML1GP

+5V_USB 2

USB_P0USB_P0+

AFTP630 6AFTP 6306

USB1

1

2 3 4 6 8

SKT-USB8 -29-GP-U

+5V_USB 2

1

USB_P0-

1

USB_P0+

1

USB_P1-

1

USB_P1+

1

75

22.10254.451

USB3

75

+5V_USB 2

USB_P1USB_P1+

1

2 3 4 6 8

SKT-USB8 -29-GP-U

Place R6304 and R6305 together

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Nu mber Rev

Size Document N umber Rev

S

Date: Sheet of

5

4

3

2

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

USB

63 89Friday, May 07, 2010

1

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

MINICARD

1

64 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

65 89Friday, May 07, 2010

X01

5

SSID = User.Interface

4

3

2

1

Battery LED

POWER LED

LED-OW -3-GP

D D

0917

BAT_LED _WHITE37

Q6601

R1

B

R2

PDTC124 EU-1-GP

LED_PW R#

C

E

DY

1 2

330R2J-3 -GP

12

EC6601

EC6601 SC220P5 0V2KX-3GP

SC220P5 0V2KX-3GP

R6601

PWR_ LED_B

LED-OW -3-GP

3

2

LED1

1

+5V_ALW

White

83.00326.G70

83.01222.K70

Amber

BATT LED

R6602

Q6602

R1

BATLOW _LED37

C C

B

R2

PDTC124 EU-1-GP

LED_BAT #

C

E

DY

Power button LED

0907

1 2

330R2J-3 -GP

12

EC6602

EC6602 SC220P5 0V2KX-3GP

SC220P5 0V2KX-3GP

R6602

BAT_LED _B

BREATHE PWR LED (Front)

0929

PDTA144 VT-GP

R2

B

R1

PWRL ED#37

R1

Q6605

84.00144.P11

+5V_ALW

E

BREATHE _LED#_R POW ER_SW_L ED_FRONT

C

R6605 330R2J -3-GPR6 605 330R2J -3-GP

12

White

3

LED3

A K

1 2

LED-W -27-GP

83.01221.R70

B B

HDD LED

0929

PDTA144 VT-GP

R2

SATA_AC T#22

A A

5

4

SATA_AC T#

R2

B

R1

Q6604

84.00144.P11

+5V_RUN

E

C

3

R6604

12

330R2J-3 -GP

HDD_LEDHDD_LED_ R

LED2

A K

1 2

83.01221.R70

3

LED-W -27-GP

White

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

LED

66 89Friday, May 07, 2010

1

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

67 89Friday, May 07, 2010

X01

5

4

3

2

1

SSID = Touch.PadSSID = KBC

Internal KeyBoard Connector

KB1

D D

C C

KB1

31

1

2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

32

HRS-CON3 0-1-GP-U

20.K0259.030

20.K0421.030

KROW 7 KROW 6 KROW 4 KROW 2 KROW 5 KROW 1 KROW 3 KROW 0 KCOL5 KCOL4 KCOL7 KCOL6 KCOL8 KCOL3 KCOL1 KCOL2 KCOL0 KCOL12 KCOL16 KCOL15 KCOL13 KCOL14 KCOL9 KCOL11 KCOL10

1

AFTP680 1AFTP 6801

1

AFTP680 2AFTP 6802

1

AFTP680 3AFTP 6803

1

AFTP680 4AFTP 6804

1

AFTP680 5AFTP 6805

1

AFTP680 6AFTP 6806

1

AFTP680 7AFTP 6807

1

AFTP680 8AFTP 6808

1

AFTP680 9AFTP 6809

1

AFTP681 0AFTP 6810

1

AFTP681 1AFTP 6811

1

AFTP681 2AFTP 6812

1

AFTP681 3AFTP 6813

1

AFTP681 5AFTP 6815

1

AFTP681 6AFTP 6816

1

AFTP681 4AFTP 6814

1

AFTP681 7AFTP 6817

1

AFTP681 8AFTP 6818

1

AFTP681 9AFTP 6819

1

AFTP682 1AFTP 6821

1

AFTP682 2AFTP 6822

1

AFTP682 3AFTP 6823

1

AFTP682 4AFTP 6824

1

AFTP682 5AFTP 6825

1

AFTP682 6AFTP 6826

1

AFTP682 7AFTP 6827

1

AFTP682 8AFTP 6828

KB_DET# 3 7

KROW [0..7] 37

KCOL[0..16 ] 37

TPCLK37

TPDATA37

SC33P50 V2JN-3GP

C6803

+5V_RUN

1

23

4

12

TouchPad Connector

+5V_RUN

12

RN6801

RN6801 SRN10KJ -5-GP

SRN10KJ -5-GP

AFTP682 0AFTP 6820

1

C6801

C6801 SC33P50 V2JN-3GP

SC33P50 V2JN-3GP

C6802

SCD1U16V2KX-3GP

TP1

5

1

2 3 4

6

ACES-CON 4-10-GP-U

20.K0320.004

20.K0382.004

+5V_RUN

1

AFTP682 9AFTP 6829 AFTP683 0AFTP 6830 AFTP683 1AFTP 6831

1 1

TPCLK TPDATA

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Key Board/Touch Pad

S

ize Document Nu mber Rev

Size Document N umber Rev

A3

Date: Sheet of

Key Board/Touch Pad

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

68 89Friday, May 07, 2010

1

X01

5

4

3

2

1

D D

LID_CLOSE #37

C C

+3.3V_AL W

12

DY

12

R6901

R6901 100KR2J -1-GP

100KR2J -1-GP

C6902

C6902 SCD047U 16V2KX-1-GP

SCD047U 16V2KX-1-GP

+3.3V_AL W

1 2

R6902 10R2J-2-G PR690 2 10R 2J-2-GP

12

C6903

C6903 SCD1U10 V2KX-4GP

SCD1U10 V2KX-4GP

LID_CLOSE #_1LID_CL OSE#

LID_CLOSE #_1

0423

HSC1

2

VDD

VSS

3

OUT

S-5711AC DL-M3T1S-GP

1

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Hall Sensor

1

69 89Friday, May 07, 2010

X01

5

D D

+3.3V_RU N

GF1

1 2 3 4 5 6

DY

7 8 9 10 11

MLX-CON1 0-7-GP

C C

12

4

LPC_LAD 0 LPC_LAD 1 LPC_LAD 2 LPC_LAD 3 LPC_LFR AME#

LPC_LAD 0 20,37 LPC_LAD 1 20,37 LPC_LAD 2 20,37 LPC_LAD 3 20,37 LPC_LFR AME# 20 ,37

PLTRST# _LAN_WLAN 20,76

PCI_CLK3 20,24

0423

3

2

1

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

70 89Friday, May 07, 2010

X01

5

4

3

2

1

SSID = SDIO

D D

+3.3V_RU N_CARD

DY

12

DY

C7103

C7102

SCD1U16V2KX-3GP

12

DY

C7101

SCD1U16V2KX-3GP

C C

B B

SD/XD/MS Card Reader

12

C7104

C7105

SCD1U16V2KX-3GP

SC2D2U10V3KX-1GP

0430

+3.3V_RU N_CARD

1

AFTP710 1AFTP 7101

XD_D0/SD _CLK/MS_D232 XD_D1/SD _D5/MS_D032 XD_D2/SD _CMD32 XD_D3/SD _D4/MS_D432 XD_D4/SD _D3/MS_D132 XD_D5/SD _D2/MS_D532 XD_D6/MS _BS32 XD_D732

XD_RDY/SD_W P/MS_CLK32 XD_RE#/M S_INS#32 XD_CE#/S D_D132 XD_CLE/S D_D0/MS_D732 XD_ALE/S D_D7/MS_D332 XD_W E#/SD_CD#32 XD_W P/SD_D6/MS_D632 XD_CD#32

XD_D0/SD _CLK/MS_D2 XD_D1/SD _D5/MS_D0 XD_D2/SD _CMD XD_W E#/SD_CD# XD_D3/SD _D4/MS_D4 XD_D4/SD _D3/MS_D1 XD_D5/SD _D2/MS_D5 XD_D6/MS _BS XD_D7

XD_RDY/SD_W P/MS_CLK

XD_RE#/M S_INS#

XD_CE#/S D_D1 XD_CLE/S D_D0/MS_D7 XD_ALE/S D_D7/MS_D3

XD_W E#/SD_CD#

XD_W P/SD_D6/MS_D6

XD_CD#

CARD1

23

SD_VCC

14

MS_VCC

33

XD_VCC

8

XD_D0

9

XD_D1

26

XD_D2

27

XD_D3

28

XD_D4

30

XD_D5

31

XD_D6

32

XD_D7

1

XD_R/B

2

XD_RE

3

XD_CE

4

XD_CLE

5

XD_ALE

6

XD_WE

7

XD_WP

34

XD_CD_SW

NP1

NP2

CARDBUS 36P-1-GP

SD_DAT0 SD_DAT1 SD_DAT2 SD_DAT3

SD_CMD

SD_CLK SD_CD_SW SD_WP_SW

MS_DATA0 MS_DATA1 MS_DATA2 MS_DATA3

MS_BS

MS_INS

MS_SCLK

4IN1_GND 4IN1_GND 4IN1_GND 4IN1_GND

XD_CLE/S D_D0/MS_D7

25

XD_CE#/S D_D1

29

XD_D5/SD _D2/MS_D5

10

XD_D4/SD _D3/MS_D1

11

XD_D2/SD _CMD

12

XD_D0/SD _CLK/MS_D2

24 36

XD_RDY/SD_W P/MS_CLK

35

XD_D1/SD _D5/MS_D0

19

XD_D4/SD _D3/MS_D1

20

XD_D0/SD _CLK/MS_D2

18

XD_ALE/S D_D7/MS_D3

16

XD_D6/MS _BS

21

XD_RE#/M S_INS#

17

XD_RDY/SD_W P/MS_CLK

15

13 22 38

1

37

AFTP711 0AFTP 7110

1

AFTP710 2AFTP 7102

1

AFTP710 3AFTP 7103

1

AFTP710 4AFTP 7104

1

AFTP710 5AFTP 7105

XD_D2/SD _CMD 32 XD_D0/SD _CLK/MS_D2 32 XD_W E#/SD_CD# 32

XD_RDY/SD_W P/MS_CLK 3 2

XD_D4/SD _D3/MS_D1 32

AFTP710 7AFTP 7107

1

AFTP710 8AFTP 7108

1

AFTP710 9AFTP 7109

1

XD_RE#/M S_INS# 32 XD_RDY/SD_W P/MS_CLK 32

20.I0081.011

X01

XD_CLE/S D_D0/MS_D7 XD_CE#/S D_D1 XD_D5/SD _D2/MS_D5 XD_D4/SD _D3/MS_D1 XD_D2/SD _CMD XD_D0/SD _CLK/MS_D2 XD_W E#/SD_CD#

A A

5

XD_RDY/SD_W P/MS_CLK

12

DY

EC7101

For EMI

SC220P50V2KX-3GP

DY

12

DY

EC7102

SC220P50V2KX-3GP

12

DY

EC7104

EC7103

SC220P50V2KX-3GP

4

12

DY

EC7105

SC220P50V2KX-3GP

12

DY

EC7106

SC220P50V2KX-3GP

20.I0109.001

12

DY

EC7108

EC7107

SC220P50V2KX-3GP

XD_D1/SD _D5/MS_D0

1

AFTP711 1AFTP 7111 AFTP711 2AFTP 7112 AFTP711 3AFTP 7113 AFTP711 4AFTP 7114 AFTP711 5AFTP 7115 AFTP711 6AFTP 7116 AFTP711 7AFTP 7117 AFTP711 8AFTP 7118 AFTP711 9AFTP 7119 AFTP712 0AFTP 7120 AFTP712 1AFTP 7121

3

XD_D2/SD _CMD

1

XD_D3/SD _D4/MS_D4

1

XD_D7

1

XD_RDY/SD_W P/MS_CLK

1

XD_RE#/M S_INS#

1

XD_W E#/SD_CD#

1

XD_W P/SD_D6/MS_D6

1

XD_CD#

1

XD_D0/SD _CLK/MS_D2

1

XD_D2/SD _CMD

1

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CARD Reader CONN

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

2

Date: Sheet of

CARD Reader CONN

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

71 89Friday, May 07, 2010

1

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

RESERVED

1

72 89Friday, May 07, 2010

X01

5

4

3

2

1

SSID = User.Interface

D D

Bluetooth Module conn.

BT1

15

AFTP730 1AFTP 7301

AFTP730 2AFTP 7302 AFTP731 4AFTP 7314

C C

AFTP730 3AFTP 7303 AFTP730 4AFTP 7304 AFTP730 5AFTP 7305

BLUETOO TH_DET#

1

WLAN _ACT

1

BDC_ON

1

BLUETOO TH_EN BT_LED

1

BLUETOO TH_GPIO3

1

BLUETOO TH_GPIO5

1

11 13

HRS-CONN 14D-GP-U

NP1 2

1

4

3

6

5

8

7

10

9

12 14 NP2 16

BT_ACT

USB_PP9 USB_PN9

1

AFTP730 6AFTP 7306

20.F0987.014

20.F1500.014

+3.3V_RU N

12

C7301

SC2D2U10V3KX-1GP

AFTP730 8AFTP 7308 AFTP730 9AFTP 7309 AFTP731 0AFTP 7310 AFTP731 1AFTP 7311 AFTP731 2AFTP 7312

R7301

100KR2J-1-GP

USB_PP9 USB_PN9 BT_ACT BLUETOO TH_EN WLAN _ACT

12

DY

3

12

R7302

EC7301

10KR2J-3-GP

SC220P50V2KX-3GP

USB_PP921 USB_PN921

BT_ACT76

BLUETOO TH_EN37,7 6

WLAN _ACT76

DY

12

B B

A A

5

4

BLUETOO TH_EN

1

BT_ACT

1

+3.3V_RU N

1

USB_PP9

1

USB_PN9

1

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Bluetooth

1

73 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

74 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

75 89Friday, May 07, 2010

X01

5

SSID = PWR.Support

4

3

2

1

D D

C C

B B

0423

BATT SMBUS

WLAN CLK

WLAN PCIE

WLAN USB

LAN CLK

LAN PCIE

USB PORT

+PWR _SRC

BAT_SDA37 BAT_SCL37

SB_SMBD ATA7,18,1 9,21

SB_SMBC LK7,18,19,21 CLK_PCIE_ MINI1#7 CLK_PCIE_ MINI17

PCIE_RXN020 PCIE_RXP02 0

PCIE_TXN020 PCIE_TXP020

USB_PN421

USB_PP421

CLK_PCIE_ LAN#7 CLK_PCIE_ LAN7

PCIE_RXN120 PCIE_RXP12 0

PCIE_TXN120 PCIE_TXP120

USB_PN221

USB_PP22 1

IOBD1

65

64 66

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59

60

63

ACES-CON N60C-1-GP-U

20.F1563.060

30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2

1

61

62

NP1 NP2

E51_RXD

E51_TXD

+3.3V_RU N

+1.5V_RU N +5V_USB 1

+PWR _SRC

+5V_ALW +KBC_PW R +3.3V_AL W

E51_RXD 3 7 E51_TXD 37

BAT_IN# 37

AC_IN# 37 PSID_DISABLE # 37 PSID_EC 37 AD_IA 37 WIFI_RF_ EN 37

MINI1_CLK_RE Q# 7

PCIE_W AKE# 21

PLTRST# _LAN_WLAN 20,70 PM_LAN_ ENABLE 37 KBC_PW RBTN# 37

BT_ACT 73

WLAN _ACT 73

BLUETOO TH_EN 37,7 3

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

IO Board Connector

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

IO Board Connector

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

76 89Friday, May 07, 2010

1

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

77 89Friday, May 07, 2010

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

78 89Friday, May 07, 2010

X01

5

+PWR _SRC

4

3

+5V_ALW

2

1

SSID = Mechanical

12

EC7919

DY

EC7902

SCD1U10V2KX-4GP

EC7913

DY

SCD1U10V2KX-4GP

H18

H18 HOLE237 R95-GP

HOLE237 R95-GP

12

DY

EC7903

SCD1U10V2KX-4GP

12

EC7914

DY

SCD1U10V2KX-4GP

H21

H21 HOLE197 R166-GP

HOLE197 R166-GP

1

12

DY

EC7901

D D

C C

SCD1U10V2KX-4GP

+1.1V_RU N

EC7912

DY

SCD1U10V2KX-4GP

12

EC7904

DY

SCD1U10V2KX-4GP

H22

H22 HOLE197 R166-GP

HOLE197 R166-GP

1

H8

H8 HOLE237 R95-GP

HOLE237 R95-GP

1

12

EC7905

DY

SCD1U10V2KX-4GP

EC7915

12

EC7906

DY

SCD1U10V2KX-4GP

+3.3V_AL W

12

DY

SCD1U10V2KX-4GP

H23

H23 HOLE197 R166-GP

HOLE197 R166-GP

12

EC7907

DY

SCD1U10V2KX-4GP

12

EC7916

EC7917

DY

SCD1U10V2KX-4GP

1

12

DY

SCD1U10V2KX-4GP

12

EC7908

EC7909

DY

SCD1U10V2KX-4GP

12

EC7918

DY

SCD1U10V2KX-4GP

12

EC7910

DY

SCD1U10V2KX-4GP

12

EC7911

DY

SCD1U10V2KX-4GP

EC7919

DY

SCD1U10V2KX-4GP

EC7925

DY

SCD1U10V2KX-4GP

12

EC7921

EC7920

12

EC7926

DY

SCD1U10V2KX-4GP

DY

SCD1U10V2KX-4GP

DY

SCD1U10V2KX-4GP

12

EC7927

DY

SCD1U10V2KX-4GP

12

EC7922

DY

SCD1U10V2KX-4GP

12

EC7928

DY

SCD1U10V2KX-4GP

12

EC7923

DY

SCD1U10V2KX-4GP

12

EC7929

DY

SCD1U10V2KX-4GP

12

EC7924

DY

SCD1U10V2KX-4GP

12

EC7930

DY

SCD1U10V2KX-4GP

H7

H1

B B

A A

H1 HOLE355 X355R111-S1-GP

HOLE355 X355R111-S1-GP

1

5

H7 HOLE355 X355R111-S1-GP

HOLE355 X355R111-S1-GP

1

H2

H2 HT85BE9 5R29-U-5-GP

HT85BE9 5R29-U-5-GP

1

H6

H6 HT85BE9 5R29-U-5-GP

HT85BE9 5R29-U-5-GP

1

H20

HOLET31 5B236R95-GP

1

4

H3

H3 HTE95BE 95R29-R-5-GP

HTE95BE 95R29-R-5-GP

1

HMI2

HMI2 STF217R 128H83-GP

STF217R 128H83-GP

1

H13

H13 HT85BE9 5R29-U-5-GP

HT85BE9 5R29-U-5-GP

1

SPR3

SPRING-51-GP

1

3

H4

H4 HT85BE9 5R29-U-5-GP

HT85BE9 5R29-U-5-GP

1

SPR4

SPRING-51-GP

1

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

UNUSED PARTS/EMI Capacitors

Size Document N umber Rev

A3

Date: Sheet of

2

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

79 89Friday, May 07, 2010

1

X01

5

4

3

2

1

SSID = VIDEO

D D

U80A

PCIE_NTX_ GRX_P15 PCIE_NTX_ GRX_N15

PCIE_NTX_ GRX_P14 PCIE_NTX_ GRX_N14

PCIE_NTX_ GRX_P13 PCIE_NTX_ GRX_N13

PCIE_NTX_ GRX_P12 PCIE_NTX_ GRX_N12

PCIE_NTX_ GRX_P11

C C

B B

CLK_PCIE_ VGA7 CLK_PCIE_ VGA#7

PCIE_NTX_ GRX_N11

PCIE_NTX_ GRX_P10 PCIE_NTX_ GRX_N10

PCIE_NTX_ GRX_P9 PCIE_NTX_ GRX_N9

PCIE_NTX_ GRX_P8 PCIE_NTX_ GRX_N8

PCIE_NTX_ GRX_P7 PCIE_NTX_ GRX_N7

PCIE_NTX_ GRX_P6 PCIE_NTX_ GRX_N6

PCIE_NTX_ GRX_P5 PCIE_NTX_ GRX_N5

PCIE_NTX_ GRX_P4 PCIE_NTX_ GRX_N4

PCIE_NTX_ GRX_P3 PCIE_NTX_ GRX_N3

PCIE_NTX_ GRX_P2 PCIE_NTX_ GRX_N2

PCIE_NTX_ GRX_P1 PCIE_NTX_ GRX_N1

PCIE_NTX_ GRX_P0 PCIE_NTX_ GRX_N0

CLK_PCIE_ VGA CLK_PCIE_ VGA#

AF30 AE31

AE29 AD28

AD30 AC31

AC29 AB28

AB30 AA31

AA29

Y28

Y30

W31

W29

V28

V30 U31

U29 T28

T30 R31

R29 P28

P30 N31

N29

M28

M30

K30

AK30 AK32

L31

L29

PCIE_RX0P PCIE_RX0N

PCIE_RX1P PCIE_RX1N

PCIE_RX2P PCIE_RX2N

PCIE_RX3P PCIE_RX3N

PCIE_RX4P PCIE_RX4N

PCIE_RX5P PCIE_RX5N

PCIE_RX6P PCIE_RX6N

PCIE_RX7P PCIE_RX7N

PCIE_RX8P PCIE_RX8N

PCIE_RX9P PCIE_RX9N

PCIE_RX10P PCIE_RX10N

PCIE_RX11P PCIE_RX11N

PCIE_RX12P PCIE_RX12N

PCIE_RX13P PCIE_RX13N

PCIE_RX14P PCIE_RX14N

PCIE_RX15P PCIE_RX15N

CLOCK

PCIE_REFCLKP PCIE_REFCLKN

M92/Park Switch

L9

DVCNTL_1

PARK

1 2

R8002 10KR2F-2 -GP

A A

5

PLTRST_ DELAY#37

PWRG OOD

PLTRST_ DELAY#

4

N10

AL27

N9

NC#L9

DVCNTL_2

NC#N9 NC_PWRGOOD

PERSTB

M92-S2-GP

PCIE_TX0P

PCIE_TX0N

PCIE_TX1P

PCIE_TX1N

PCIE_TX2P

PCIE_TX2N

PCIE_TX3P

PCIE_TX3N

PCI EXPRESS INTERFACE

PCIE_TX4P

PCIE_TX4N

PCIE_TX5P

PCIE_TX5N

PCIE_TX6P

PCIE_TX6N

PCIE_TX7P

PCIE_TX7N

PCIE_TX8P

PCIE_TX8N

PCIE_TX9P

PCIE_TX9N

PCIE_TX10P

PCIE_TX10N

PCIE_TX11P

PCIE_TX11N

PCIE_TX12P

PCIE_TX12N

PCIE_TX13P

PCIE_TX13N

PCIE_TX14P

PCIE_TX14N

PCIE_TX15P

PCIE_TX15N

CALIBRATION

PCIE_CALRP

PCIE_CALRN

1 OF 7

PCIE_NRX_ GTX_C_P15

AH30

PCIE_NRX_ GTX_C_N15

AG31

PCIE_NRX_ GTX_C_P14

AG29

PCIE_NRX_ GTX_C_N14

AF28

PCIE_NRX_ GTX_C_P13

AF27

PCIE_NRX_ GTX_C_N13

AF26

PCIE_NRX_ GTX_C_P12

AD27

PCIE_NRX_ GTX_C_N12

AD26

PCIE_NRX_ GTX_C_P11

AC25 AB25

PCIE_NRX_ GTX_C_P10

Y23

PCIE_NRX_ GTX_C_N10

Y24

PCIE_NRX_ GTX_C_P9

AB27

PCIE_NRX_ GTX_C_N9

AB26

PCIE_NRX_ GTX_C_P8

Y27

PCIE_NRX_ GTX_C_N8

Y26

PCIE_NRX_ GTX_C_P7

W24

PCIE_NRX_ GTX_C_N7

W23

V27

PCIE_NRX_ GTX_C_N6

U26

PCIE_NRX_ GTX_C_P5

U24

PCIE_NRX_ GTX_C_N5

U23

PCIE_NRX_ GTX_C_P4

T26

PCIE_NRX_ GTX_C_N4

T27

PCIE_NRX_ GTX_C_P3

T24

PCIE_NRX_ GTX_C_N3

T23

P27

PCIE_NRX_ GTX_C_N2

P26

PCIE_NRX_ GTX_C_P1

P24

PCIE_NRX_ GTX_C_N1

P23

PCIE_NRX_ GTX_C_P0

M27

PCIE_NRX_ GTX_C_N0

N26

PCIE_CALR P

Y22

PCIE_CALR N

AA22

3

C8001 SCD 1U16V2KX-3GPC8001 SC D1U16V2KX-3GP

1 2

C8002 SCD 1U16V2KX-3GPC8002 SC D1U16V2KX-3GP

1 2

C8003 SCD 1U16V2KX-3GPC8003 SC D1U16V2KX-3GP

1 2

C8004 SCD 1U16V2KX-3GPC8004 SC D1U16V2KX-3GP

1 2

C8005 SCD 1U16V2KX-3GPC8005 SC D1U16V2KX-3GP

1 2

C8006 SCD 1U16V2KX-3GPC8006 SC D1U16V2KX-3GP

1 2

C8007 SCD 1U16V2KX-3GPC8007 SC D1U16V2KX-3GP

1 2

C8008 SCD 1U16V2KX-3GPC8008 SC D1U16V2KX-3GP

1 2

C8009 SCD 1U16V2KX-3GPC8009 SC D1U16V2KX-3GP

1 2

C8010 SCD 1U16V2KX-3GPC8010 SC D1U16V2KX-3GP

1 2

C8011 SCD 1U16V2KX-3GPC8011 SC D1U16V2KX-3GP

1 2

C8012 SCD 1U16V2KX-3GPC8012 SC D1U16V2KX-3GP

1 2

C8013 SCD 1U16V2KX-3GPC8013 SC D1U16V2KX-3GP

1 2

C8014 SCD 1U16V2KX-3GPC8014 SC D1U16V2KX-3GP

1 2

C8015 SCD 1U16V2KX-3GPC8015 SC D1U16V2KX-3GP

1 2

C8016 SCD 1U16V2KX-3GPC8016 SC D1U16V2KX-3GP

1 2

C8017 SCD 1U16V2KX-3GPC8017 SC D1U16V2KX-3GP

1 2

C8018 SCD 1U16V2KX-3GPC8018 SC D1U16V2KX-3GP

1 2

C8019 SCD 1U16V2KX-3GPC8019 SC D1U16V2KX-3GP

1 2

C8020 SCD 1U16V2KX-3GPC8020 SC D1U16V2KX-3GP

1 2

C8021 SCD 1U16V2KX-3GPC8021 SC D1U16V2KX-3GP

1 2

C8022 SCD 1U16V2KX-3GPC8022 SC D1U16V2KX-3GP

1 2

C8023 SCD 1U16V2KX-3GPC8023 SC D1U16V2KX-3GP

1 2

C8024 SCD 1U16V2KX-3GPC8024 SC D1U16V2KX-3GP

1 2

C8025 SCD 1U16V2KX-3GPC8025 SC D1U16V2KX-3GP

1 2

C8026 SCD 1U16V2KX-3GPC8026 SC D1U16V2KX-3GP

1 2

C8027 SCD 1U16V2KX-3GPC8027 SC D1U16V2KX-3GP

1 2

C8028 SCD 1U16V2KX-3GPC8028 SC D1U16V2KX-3GP

1 2

C8029 SCD 1U16V2KX-3GPC8029 SC D1U16V2KX-3GP

1 2

C8030 SCD 1U16V2KX-3GPC8030 SC D1U16V2KX-3GP

1 2

C8031 SCD 1U16V2KX-3GPC8031 SC D1U16V2KX-3GP

1 2

C8032 SCD 1U16V2KX-3GPC8032 SC D1U16V2KX-3GP

1 2

R8001 1K27R2 F-L-GPR8001 1K27R2 F-L-GP

1 2

R8003 2KR2F-3 -GPR8003 2KR2F-3-GP

1 2

PCIE_NTX_ GRX_P[0..15]

PCIE_NTX_ GRX_N[0..15]

PCIE_NRX_ GTX_P[0..15]

PCIE_NRX_ GTX_N[0..15]

+1.1V_GF X_RUN

2

PCIE_NTX_ GRX_P[0..15] 12

PCIE_NTX_ GRX_N[0..15] 12

PCIE_NRX_ GTX_P[0..15] 12

PCIE_NRX_ GTX_N[0..15] 12

PCIE_NRX_ GTX_P15 PCIE_NRX_ GTX_N15

PCIE_NRX_ GTX_P14 PCIE_NRX_ GTX_N14

PCIE_NRX_ GTX_P13 PCIE_NRX_ GTX_N13

PCIE_NRX_ GTX_P12 PCIE_NRX_ GTX_N12

PCIE_NRX_ GTX_P11 PCIE_NRX_ GTX_N11PCIE_NRX_ GTX_C_N11

PCIE_NRX_ GTX_P10 PCIE_NRX_ GTX_N10

PCIE_NRX_ GTX_P9 PCIE_NRX_ GTX_N9

PCIE_NRX_ GTX_P8 PCIE_NRX_ GTX_N8

PCIE_NRX_ GTX_P7 PCIE_NRX_ GTX_N7

PCIE_NRX_ GTX_P6PCIE_NRX_ GTX_C_P6 PCIE_NRX_ GTX_N6

PCIE_NRX_ GTX_P5 PCIE_NRX_ GTX_N5

PCIE_NRX_ GTX_P4 PCIE_NRX_ GTX_N4

PCIE_NRX_ GTX_P3 PCIE_NRX_ GTX_N3

PCIE_NRX_ GTX_P2PCIE_NRX_ GTX_C_P2 PCIE_NRX_ GTX_N2

PCIE_NRX_ GTX_P1 PCIE_NRX_ GTX_N1

PCIE_NRX_ GTX_P0 PCIE_NRX_ GTX_N0

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

S

ize Document Nu mber Rev

Size Document N umber Rev

A3

Date: Sheet of

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

VGA PCIE(1/4)

1

80 89Friday, May 07, 2010

X01

5

SSID = VIDEO

C8101

SC10U6D3V5KX-1GP

PARK

SC10U6D3V5MX-3GP

PARK

SC10U6D3V5MX-3GP

0

1

0

1

12

C8102

SC1U10V3KX-3GP

12

DY

PANEL_BKEN37

THERMTRIP_VGA#37

2N7002A-7-GP

PARK

1 2

DY

1 2

X01

PARK

1 2

Debug mode

5

+DPLL_VDDC

12

C8111

PARK

SC1U6D3V2KX-GP

PARK

C8114

SC1U6D3V2KX-GP

enable

SCD01U16V2KX-3GP

12

+1.1V_GFX_RUN

L8101

1 2

BLM15AG121SS1D-GP

D D

M92/Park Switch

+1.8V_DELAY

L8103

BLM15AG121SS1D-GP

1 2

PARK

12

C8103

PARK

+1.1V_GFX_RUN

L8105

1 2

BLM15AG121SS1D-GP

PARK

12

PARK

C8113

+3.3V_DELAY

C C

10KR2J-3-GP

GPIO_21_BB_EN internal PD

0503

B B

CLK_VGA_27M_NSS7

SIGNALS

JTAG_TESTEN

+3.3V_DELAY

R8128 10KR2J-3-GP

R8139 10KR2J-3-GPR8139 10KR2J-3-GP

R8127 10KR2J-3-GPR8127 10KR2J-3-GP

R8132 10KR2J-3-GP

R8138 10KR2J-3-GPR8138 10KR2J-3-GP

R8140 10KR2J-3-GPR8140 10KR2J-3-GP

R8133 0R2J-2-GP

Normal mode

JTAG_TRSTB

A A

JTAG_TCK

JTAG_TMS

JTAG_TDI

12

C8108

R8110

12

Q8102

JTAG_TMS

JTAG_TDI

JTAG_TRSTB

JTAG_TESTEN

JTAG_TCK

1

130mA

C8104

SCD1U16V2KX-3GP

110mA

C8115

SCD1U16V2KX-3GP

VGA_CLK_REQ#

PANEL_BKEN

S D

+1.8V_DELAY

G

CLK_VGA_27M_SS7

L8102

1 2

BLM15AG121SS1D-GP

DPC_VDD18_1

DPC_VDD10_1

R8141

R8141 10KR2J-3-GP

10KR2J-3-GP

1 2

JTAG_TESTEN83

+1.8V_DELAY

R8119

499R2F-2-GP

R8121

249R2F-GP

R8129 80D6R2F-L-GPR8129 80D6R2F-L-GP

1 2

+1.8V_DELAY

75mA125mA

12

C8105

C8106

SC10U6D3V5KX-1GP

DVPDATA083

DVPDATA283

0503

R8136 0R2J-2-GP

R8137 0R2J-2-GP

GPIO_VGA_0083 GPIO_VGA_0183 GPIO_VGA_0283

GPIO_VGA_0583

R8113

0R2J-2-GP

GPIO_VGA_0983

GPIO_VGA_1183

PWRCNTL_086

PWRCNTL_186

12

VREFG VOLTAGE DIVIDER IS (VREFG = VDDR4,5(1.8V) / 3 = .6V)

12

C8127

C8127 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

12

R8131

150R2F-1-GP

0507

L8109

1 2

BLM15AG121SS1D-GP

+DPLL_PVDD

C8107

SCD01U16V2KX-3GP

PARK

1 2

PARK

1 2

DVPDATA1983

DVPDATA2183

TP8101TP8101

1 2

TP8114TP8114

TP8118TP8118 TP8119TP8119

TP8122TP8122 TP8102TP8102 TP8103TP8103

TP8125TP8125 TP8120TP8120

TP8106TP8106

TP8108TP8108 TP8109TP8109

TP8110TP8110 TP8113TP8113

VGA_THERMDA39 VGA_THERMDC39

C8131

SC1U10V3KX-3GP

12

TP8111TP8111

TP8112TP8112

12

4

TP8116TP8116

TP8115TP8115 TP8117TP8117

1

1 1

1 1 1

1 1

1

1 1

1

+DPLL_VDDC

1

12

C8132

SCD1U16V2KX-3GP

4

DPC_VSSR_5

DPC_VSSR_1

DPC_VSSR_2

DPC_VDD18_1 DPC_PVDD

DPC_VDD10_1

DVPDATA_20

1

0503

1 1

VGA_GPIO_6 PANEL_BKEN_1 GPIO_VGA_08

GPIO_VGA_12 GPIO_VGA_13

GPIO16_SSIN VGA_THERM# VGA_GPIO_18 THERMTRIP_VGA

VGA_GPIO_21 GPIO_VGA_22 VGA_CLK_REQ#

JTAG_TRSTB JTAG_TDI JTAG_TCK JTAG_TMS JTAG_TDO JTAG_TESTEN

GENERICA GENERICB

GENERICE_HPD4

HPT1

VGA_VREFG

+DPLL_PVDD

XTALIN_R VGA_XTALOUT

FAN_PWM +TSVDD

U80B

AA1

DVPCNTL_MVP_0

Y4

DVPCNTL_MVP_1

AC7

DVPCNTL_0

Y2

DVPCNTL_1

U5

DVPCNTL_2

U1

DVPCLK

Y7

DVPDATA_0

V2

DVPDATA_1

Y8

DVPDATA_2

V4

DVPDATA_3

AB7

DVPDATA_4

W1

DVPDATA_5

AB8

DVPDATA_6

W3

DVPDATA_7

AB9

DVPDATA_8

W5

DVPDATA_9

AC6

DVPDATA_10

W6

DVPDATA_11

AD7

DVPDATA_12

AA3

DVPDATA_13

AC8

DVPDATA_14

AA5

DVPDATA_15

AE8

DVPDATA_16

AA6

DVPDATA_17

AE9

DVPDATA_18

AB4

DVPDATA_19

AD9

DVPDATA_20

AB2

DVPDATA_21

AC10

DVPDATA_22

AC5

DVPDATA_23

R1

SCL

R3

SDA

GENERAL PURPOSE I/O

U6

GPIO_0

U10

GPIO_1

T10

GPIO_2

U8

GPIO_3_SMBDATA

U7

GPIO_4_SMBCLK

T9

GPIO_5_AC_BATT

T8

GPIO_6

T7

GPIO_7_BLON

P10

GPIO_8_ROMSO

P4

GPIO_9_ROMSI

P2

GPIO_10_ROMSCK

N6

GPIO_11

N5

GPIO_12

N3

GPIO_13

Y9

GPIO_14_HPD2

N1

GPIO_15_PWRCNTL_0

M4

GPIO_16_SSIN

R6

GPIO_17_THERMAL_INT

W10

GPIO_18_HPD3

M2

GPIO_19_CTF

P8

GPIO_20_PWRCNTL_1

P7

GPIO_21_BB_EN

N8

GPIO_22_ROMCSB

N7

GPIO_23_CLKREQB

T11

GPIO_29_DRM_0

R11

GPIO_30_DRM_1

L6

JTAG_TRSTB

L5

JTAG_TDI

L3

JTAG_TCK

L1

JTAG_TMS

K4

JTAG_TDO

AF24

TESTEN

AB13

GENERICA

W8

GENERICB

W9

GENERICC

W7

GENERICD

AD10

GENERICE_HPD4

AC14

HPD1

AC16

VREFG

AF14

DPLL_PVDD

AE14

DPLL_PVSS

AD14

DPLL_VDDC

AM28

XTALIN

AK28

XTALOUT

T4

DPLUS

T2

DMINUS

R5

TS_FDO

AD17

TSVDD

AC17

TSVSS

M92-S2-GP

MUTI GFX

I2C

PLL/CLOCK

5mA

DPC_VSSR#5

TX1P_DPC1P

DVDATA_7 TX2M_DPC0N TXCCM_DPC3N DPC_VSSR DVDATA_0 TX0M_DPC2N

DVDATA_1 TXCCP_DPC3P DVDATA_4 DPC_VSSR DVDATA_5 TX0P_DPC2P DVDATA_6 TX1M_DPC1N DPC_VDD18#1 DPC_PVDD DVDATA_9 TX2P_DPC0P DVDATA_8 DPC_VDD10#1 DVDATA_12 DPC_VDD10#2 DVCNTL_0 DVDATA_3 DVDATA_11 DVDATA_2 DVDATA_10 DPC_VDD18#2

GND

75mA

125mA

THERMAL

DPA

DPB

DAC1

DAC2

DDC/AUX

2 OF 7

TXCAP_DPA3P TXCAM_DPA3N

TX0P_DPA2P

TX0M_DPA2N

TX1P_DPA1P

TX1M_DPA1N

TX2P_DPA0P

TX2M_DPA0N

TXCBP_DPB3P TXCBM_DPB3N

TX3P_DPB2P

TX3M_DPB2N

TX4P_DPB1P

TX4M_DPB1N

TX5P_DPB0P

TX5M_DPB0N

HSYNC VSYNC

70mA

AVDD

AVSSQ

45mA

VDD1DI VSS1DI

COMP

H2SYNC V2SYNC

50mA

VDD2DI VSS2DI

130mA

A2VDD

1.5mA

A2VDDQ

A2VSSQ

R2SET

DDC1CLK

DDC1DATA

AUX1P AUX1N

DDC2CLK

DDC2DATA

AUX2P AUX2N

NC#AB22 NC#AC22

DDCAUX5P DDCAUX5N

DDC6CLK

DDC6DATA

NC_DDCAUX7P

NC_DDCAUX7N

RSET

3

AF2 AF4

AG3 AG5

AH3 AH1

AK3 AK1

AK5 AM3

AK6 AM5

AJ7 AH6

AK8 AL7

AM26

R

AK26

RB

AL25

G

AJ25

GB

AH24

B

AG25

BB

AH26 AJ27

AD22

AG24 AE22

AE23 AD23

AM12

R2

AK12

R2B

AL11

G2

AJ11

G2B

AK10

B2

AL9

B2B

AH12

C

AM10

Y

AJ9

AL13 AJ13

AD19 AC19

AE20

AE17

AE19

AG13

AE6 AE5

AD2 AD4

AC11 AC13

AD13 AD11

AB22 AC22

AE16 AD16

AC1 AC3

AD20 AC20

3

VGA_RSET

DAC2_HSYNC DAC2_VSYNC

VGA_R2SET

XO_IN XO_IN2

+DAC1_AVDD

M_RED

M_GREEN

M_BLUE

1 2

R8115 499R2F-2-GPR8115 499R2F-2-GP

+DAC1_AVDD

+DAC1_VDD1DI

+DAC2_VDD2DI

+DAC2_A2VDD

+DAC2_A2VDDQ

1 2

M92CRT_DDCCLK M92CRT_DDCDATA

R8134 0R2J-2-GP

R8134 0R2J-2-GP R8135 0R2J-2-GP

R8135 0R2J-2-GP

70mA

12

C8109

12

C8112

C8110

SC1U6D3V2KX-GP

SCD01U16V2KX-3GP

45mA

12

C8117

C8116

SCD1U16V2KX-3GP

SCD01U16V2KX-3GP

R8109 150R2F-1-GP

1 2

DY

R8111 150R2F-1-GP

1 2

DY

R8112 150R2F-1-GP

1 2

DY

(Placed between this pin and AVSSQ)

+1.8V_DELAY

DAC2_HSYNC 83 DAC2_VSYNC 83

R8122

715R2F-GP

0503

1 2

PARK

1 2

PARK

+1.8V_DELAY

L8104

1 2

BLM15AG121SS1D-GP

SC4D7U6D3V3KX-GP

12

C8118

SC1U6D3V2KX-GP

L8106

1 2

BLM15AG121SS1D-GP

+1.8V_DELAY+DAC1_VDD1DI

M92/Park Switch

L8107

1 2

BLM15AG121SS1D-GP

PARK

+3.3V_DELAY

R8124

R8123

2K2R2J-2-GP

R8123

2K2R2J-2-GP

1 2

12

2

M_RED 55

M_GREEN 55

M_BLUE 55

VGA_HSYNC 55,83 VGA_VSYNC 55,83

20mA

12

PARK

C8123

SC10U6D3V5MX-3GP

LDDC_CLK 54 LDDC_DATA 54

DDC_CLK_CON55

2

U80F

M92-S2-GP

PARK

C8124

SC1U6D3V2KX-GP

LVDS CONTROL

LVTMDP

DPC_PVDD

12

6 OF 7

AB11

VARY_BL

AB12

DIGON

TXCLK_UP_DPF3P TXCLK_UN_DPF3N

TXOUT_U0P_DPF2P

TXOUT_U0N_DPF2N

TXOUT_U1P_DPF1P

TXOUT_U1N_DPF1N

TXOUT_U2P_DPF0P

TXOUT_U2N_DPF0N

TXCLK_LP_DPE3P

TXCLK_LN_DPE3N

TXOUT_L0P_DPE2P TXOUT_L0N_DPE2N

TXOUT_L1P_DPE1P TXOUT_L1N_DPE1N

TXOUT_L2P_DPE0P TXOUT_L2N_DPE0N

C8122

SCD1U16V2KX-3GP

AH20 AJ19

AL21 AK20

AH22 AJ21

AL23 AK22

AK24

TXOUT_U3P

AJ23

TXOUT_U3N

VGA_TXACLK+

AL15

VGA_TXACLK-

AK14

VGA_TXAOUT0+

AH16

VGA_TXAOUT0-

AJ15

VGA_TXAOUT1+

AL17

VGA_TXAOUT1-

AK16

VGA_TXAOUT2+

AH18

VGA_TXAOUT2-

AJ17

AL19

TXOUT_L3P

AK18

TXOUT_L3N

+DAC2_VDD2DI +1.8V_DELAY

50mA

12

DY

C8119

SCD01U16V2KX-3GP

+DAC2_A2VDDQ

1.5mA

12

C8125

SCD1U16V2KX-3GP

+DAC2_A2VDD

130mA

12

DY

C8128

SCD01U16V2KX-3GP

DY

12

C8120

12

C8129

SCD1U16V2KX-3GP

C8126

SC1U6D3V2KX-GP

VGA_TXACLK+ 54 VGA_TXACLK- 54

VGA_TXAOUT0+ 54 VGA_TXAOUT0- 54

VGA_TXAOUT1+ 54 VGA_TXAOUT1- 54

VGA_TXAOUT2+ 54 VGA_TXAOUT2- 54

12

DY

C8121

SC1U6D3V2KX-GP

5V @ CRT side

+3.3V_DELAY

U8102

M92CRT_DDCDATA

DDC_CLK_CON

U8102

5

6

DMN66D0LDW-7-GP

Title

Size Document Number Rev

C

Date: Sheet of

DDC_DATA_CON

34

2

M92CRT_DDCCLK

1

VGA LVDS/TV/CRT(2/4)

Arsenal DJ1 Discrete

1

LBKLT_CTL 54

LCDVDD_EN 54

12

R8103

R8102

10KR2J-3-GP

M92/Park Switch

RN8102

DPC_VSSR_5

1

8

DPC_VSSR_2

2

7

PARK

DPC_VSSR_1

3

6

4 5

SRN0J-7-GP

1 2

R8114 0R2J-2-GPR8114 0R2J-2-GP

+3.3V_DELAY

23 1

81 89Saturday, May 08, 2010

+1.8V_DELAY

+3.3V_DELAY

DDC_DATA_CON 55

L8108

1 2

BLM15AG121SS1D-GP

1 2

R8130 0R2J-2-GPR8130 0R2J-2-GP

RN8101

4

SRN2K2J-1-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

X01

5

U80E

SSID = VIDEO

D D

C C

B B

PARK-S3:[email protected] M92-S2:[email protected]

A A

5

U80E

AA27

PCIE_VSS

AB24

PCIE_VSS

AB32

PCIE_VSS

AC24

PCIE_VSS

AC26

PCIE_VSS

AC27

PCIE_VSS

AD25

PCIE_VSS

AD32

PCIE_VSS

AE27

PCIE_VSS

AF32

PCIE_VSS

AG27

PCIE_VSS

AH32

PCIE_VSS

K28

PCIE_VSS

K32

PCIE_VSS

L27

PCIE_VSS

M32

PCIE_VSS

N25

PCIE_VSS

N27

PCIE_VSS

P25

PCIE_VSS

P32

PCIE_VSS

R27

PCIE_VSS

T25

PCIE_VSS

T32

PCIE_VSS

U25

PCIE_VSS

U27

PCIE_VSS

V32

PCIE_VSS

W25

PCIE_VSS

W26

PCIE_VSS

W27

PCIE_VSS

Y25

PCIE_VSS

Y32

PCIE_VSS

M6

GND

N11

GND

N12

GND

N13

GND

N16

GND

N18

GND

N21

GND

P6

GND

P9

GND

R12

GND

R15

GND

R17

GND

R20

GND

T13

GND

T16

GND

T18

GND

T21

GND

T6

GND

U15

GND

U17

GND

U20

GND

U3

GND

DPC_VSSR

U9

GND

V13

GND

V16

GND

V18

GND

V6

GND

Y10

GND

Y15

GND

Y17

GND

Y20

GND

Y6

GND

DPC_VSSR

M92-S2-GP

+1.8V_DELAY

PARK-S3:[email protected] M92-S2:[email protected]

GND

+1.1V_GFX_RUN

5 OF 7

GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND

VSS_MECH VSS_MECH VSS_MECH

120 ohm 500mA

A3 A30 AA13 AA16 AB10 AB15 AB6 AC9 AD6 AD8 AE7 AG12 AH10 AH28 B10 B12 B14 B16 B18 B20 B22 B24 B26 B6 B8 C1 C32 E28 F10 F12 F14 F16 F18 F2 F20 F22 F24 F26 F6 F8 G10 G27 G31 G8 H14 H17 H2 H20 H6 J27 J31 K11 K2 K22 K6

A32 AM1 AM32

L8201

1 2

BLM15AG121SS1D-G P

L8208

1 2

BLM15AG121SS1D-G P

L8212

1 2

BLM15AG121SS1D-G P

L8213

1 2

BLM15AG121SS1D-G P

M92/Park Switch

+1.8V_DELAY

BLM15AG121SS1D-G P

+1.8V_DELAY

C82001

SC10U6D3V5KX-1GP

C82089

SC10U6D3V5KX-1GP

C82098

SC10U6D3V5KX-1GP

C82101

SC10U6D3V5KX-1GP

+DPE_VDD18

+DPF_VDD18

4

+1.5V_RUN

12

C82002

SC10U6D3V5KX-1GP

L8203

PARK

1 2

12

C82045

PARK

SCD1U16V2KX- 3GP

L8204

PARK

1 2

12

C82058

C82058 SCD1U16V2KX- 3GP

SCD1U16V2KX- 3GP

PARK

+1.8V_DELAY

L8206

1 2

BLM15AG121SS1D-G P

120 ohm 500mA

12

C82084

SC1U6D3V2KX-GP

12

C82090

SC1U6D3V2KX-GP

12

C82099

SC1U6D3V2KX-GP

12

C82102

SC1U6D3V2KX-GP

1 2

PARK

200mA

C82085

1 2

SCD1U16V2KX-3GP

120mA

C82091

1 2

SCD1U16V2KX-3GP

200mA

1 2

C82100

SCD1U16V2KX-3GP

120mA

C82103

1 2

SCD1U16V2KX-3GP

R8514

150R2F-1-GP

0R3J-0-U-G P

12

R8201 0R3J-0-U-GPR 8201 0R3J-0-U-GP

R8202 0R3J-0-U-GP

0504

4

+1.5V_RUN

12

C82005

DY

L8202

1 2

BLM15AG121SS1D-G P

120 ohm 500mA

+3.3V_DELAY

C82070

1 2

SCD1U16V2KX-3GP

40mA

12

C82080

SC1U6D3V2KX-GP

U80G

AG15

DPE_VDD18

AG16

DPE_VDD18

AG20

DPE_VDD10

AG21

DPE_VDD10

AG14

DPE_VSSR

AH14

DPE_VSSR

AM14

DPE_VSSR

AM16

DPE_VSSR

AM18

DPE_VSSR

AF16

DPF_VDD18

AG17

DPF_VDD18

AF22

DPF_VDD10

AG22

DPF_VDD10

AF23

DPF_VSSR

AG23

DPF_VSSR

AM20

DPF_VSSR

AM22

DPF_VSSR

AM24

DPF_VSSR

AF17

DPEF_CALR

20mA

AG18

DPE_PVDD

AF19

DPE_PVSS

20mA

AG19

NC_DPF_PVDD

AF20

NC_DPF_PVSS

M92-S2-GP

12

DY

SCD1U16V2KX-3GP

C82007

C82006

SC1U6D3V2KX-GP

C82013

1 2

SCD1U16V2KX-3GP

12

C82040

12

C82047

C82048

SC1U6D3V2KX-GP

C82071

1 2

SCD1U16V2KX-3GP

Y11 pin--DVCLK (not use) Y12 pin--VDDR4 U11 pin--NC U12 pin--VDDR4 V11 pin--NC V12 pin--VDDR4 AA11 pin--NC AA12 pin--NC

+PCIE_PVDD

12

C82081

SCD1U10V2KX-4GP

DP A/B POWERDP E/F POWER

NC_DPA_VDD18 NC_DPA_VDD18

200mA

130mA

DPA_VDD10 DPA_VDD10

120mA

110mA

130mA

NC_DPB_VDD18 NC_DPB_VDD18

200mA

130mA

DPB_VDD10 DPB_VDD10

120mA

110mA

DPAB_CALR

DP PLL POWER

DPA_PVDD

DPB_PVDD

C82014

SCD1U16V2KX-3GP

SC10U6D3V5KX-1GP

SC1U6D3V2KX-GP

7 of 7

DPA_VSSR DPA_VSSR DPA_VSSR DPA_VSSR DPA_VSSR

DPB_VSSR DPB_VSSR DPB_VSSR DPB_VSSR DPB_VSSR

20mA

DPA_PVSS

20mA

DPB_PVSS

1 2

12

C82004

C82003

SC10U6D3V5KX-1GP

SC22U6D3V5MX-2GP

+SPV18

12

C82046

PARK

SC1U6D3V2KX- GP

+MPV18

12

C82054

PARK

SC1U6D3V2KX- GP

12

C82068

C82069

1 2

SC1U6D3V2KX-GP

12

C82079

+DPE_VDD18

+DPE_VDD10

+DPF_VDD1 8

+DPF_VDD1 0

DPEF_CALR_ GND

+DPE_PVDD

20mA

1 2

+DPF_PVDD DPB_PVDD_R

+DPF_PVDD

R8209

SC10U6D3V5KX-1GP

50mA

75mA

SC10U6D3V5KX-1GP

12

M92

3

12

C8209

C82008

SCD1U10V2KX-4GP

C82016

1 2

SCD1U16V2KX-3GP

C8209

C82009

SCD1U10V2KX-4GP

C82017

1 2

SCD1U16V2KX-3GP

12

C82042

C82041

SC1U6D3V2KX-GP

M92/Park Switch

R8513 0R2J-2-GP C82059

C82059

SCD1U16V2KX-3GP

+1.5V_RUN

R8513 0R2J-2-GP

1 2

C82060

R8511 0R2J-2-GP

R8510 0R2J-2-GPR8510 0R2J- 2-GP

SCD1U16V2KX-3GP

R8515 0R2J-2-GP

R8516 0R2J-2-GP

R8517 0R2J-2-GP

L8214 BLM15BD 121SN1D-GP

1 2

M92

M92 USE

PARK S3

+VCC_GFX_CORE

130mA

+DPA_VDD18

AE11 AF11

110mA

AF6 AF7

AE1 AE3

R8203

AG1

0R3J-0-U-G P

AG6 AH5

DPB_VDD18_R

AE13 AF13

110mA

AF8 AF9

AF10 AG9 AH8 AM6 AM8

DPAB_CALR_G ND

AE10

+DPA_PVDD

20mA

AG8 AG7

20mA

AG10 AG11

3

2A

12

C82011

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

C82018

C82019

1 2

SCD1U16V2KX-3GP

+VDD_CT

SC1U6D3V2KX-GP

12

1 2

R8206 0R3J-0-U-G PR8206 0R3J -0-U-GP

R8205 0R3J-0-U-G PR8205 0R3J -0-U-GP

17mA

C82043

1 2

SCD1U16V2KX-3GP

M92

1 2

M92

1 2 1 2

1 2

M92

1 2

M92

1 2

M92

C82104

C82104 SC1U6D3V2KX- GP

SC1U6D3V2KX- GP

+SPV10

R8207 0R3J-0-U-GP

R8208 0R3J-0-U-GPR 8208 0R3J-0-U-GP

PARK-S3:[email protected] M92-S2:[email protected]

R8204

150R2F-1-GP

1 2

C82012

SCD1U10V2KX-4GP

C82020

1 2

SCD1U16V2KX-3GP

C82044

SCD1U16V2KX-3GP

60mA

VDDR5_M92

VDDR5_1

VDDR5_2

VDDR4_1 VDDR4_2

VDDR4_3

+VDDRHA

+PCIE_PVDD

+MPV18

+SPV18

1 2

PARK

1 2

0504

PARK-S3:[email protected] M92-S2:[email protected]

+1.8V_DELAY

AM30

H13 H16 H19

J10 J23 J24

J9 K10 K23 K24

K9 L11 L12 L13 L20 L21 L22

AA20 AA21 AB20 AB21

AA17 AA18 AB17 AB18

U11 U12 V11 V12

AA11 AA12

Y11 Y12

L17

L16

L8

H7

H8

J7

M11 M12

U80D

MEM I/O

VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1 VDDR1

LEVEL

LEVEL TRANSLATION

TRANSLATION

VDD_CT VDD_CT VDD_CT VDD_CT

I/O

VDDR3 VDDR3 VDDR3 VDDR3

VDDR5_NC VDDR5 VDDR5_NC VDDR5

VDDR4_NC VDDR4_NC VDDR4/DVCLK VDDR4

MEM CLK

VDDRHA_NC

VSSRHA_SS

PLL

PCIE_PVDD

NC_MPV18

NC_SPV18

SPV10

SPVSS

BACK BIAS

BBP#1 BBP#2

M92-S2-GP

+1.8V_DELAY

+1.1V_GFX_RUN

+DPA_PVDD

2A

VDDR4

17mA

60mA

40mA

75mA

50mA

100mA

170mA

PCIE

PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR PCIE_VDDR

400mA

PCIE_VDDR PCIE_VDDR

PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC

2A

PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC PCIE_VDDC

CORE

POWER

ISOLATED

ISOLATED CORE I/O

CORE I/O

2

4 OF 7

VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC VDDC

VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI VDDCI

2

AB23 AC23 AD24 AE24 AE25 AE26 AF25 AG26

L23 L24 L25 L26 M22 N22 N23 N24 R22 T22 U22 V22

AA15 N15 N17 R13 R16 R18 R21 T12 T15 T17 T20 U13 U16 U18 U21 V15 V17 V20 V21 Y13 Y16 Y18 Y21

M13 M15 M16 M17 M18 M20 M21 N20

400mA

12

C82032

12

C82061

SC1U6D3V2KX-GP

+VCC_GFX_CORE

12

C82082

SC1U6D3V2KX-GP

2A

11A

12

SC22U6D3V5MX-2GP

1

+1.8V_DELAY

12

C82021

C82015

SC1U6D3V2KX-GP

SCD1U16V2KX-3GP

12

DY

C82033

C82034

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

12

C82049

C82055

C82050

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

C82023

C82022

SC1U6D3V2KX-GP

12

C82035

C82038

SC1U6D3V2KX-GP

12

C82064

C82065

SC1U6D3V2KX-GP

SCD1U10V2KX-4GP

12

DY

C82024

C82025

C82031

SC1U6D3V2KX-GP

12

C82062

12

C82039

12

SC1U6D3V2KX-GP

+1.1V_GFX_RUN

SC10U6D3V5KX-1GP

12

C82066

C82051

SC1U6D3V2KX-GP

SC22U6D3V5MX-2GP

+VCC_GFX_CORE

12

DY

SC1U6D3V2KX-GP

C82056

SC1U6D3V2KX-GP

+VCC_GFX_CORE

C82067

C82052

SC1U6D3V2KX-GP

12

C82053

C82063

C82057

SC1U6D3V2KX-GP

2A

12

C82073

SC1U6D3V2KX-GP

+1.1V_GFX_RUN

12

DY

C82083

SC10U6D3V5KX-1GP

12

C82074

C82075

SC1U6D3V2KX-GP

L8211

1 2

BLM15AG121SS1D-G P

120 ohm 500mA

Title

Size Document Num ber Rev

A2

Date: Sheet of

12

C82076

C82077

C82078

SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP

+SPV10

100mA

12

C82096

C82095

SC10U6D3V5MX-3GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

VGA POWER/GND(3/4)

Arsenal DJ1 Discrete X01

1

82 89Friday, May 07, 2010

12

C82097

SCD1U16V2KX-3GP

SCD01U16V2KX-3GP

SC1U6D3V2KX-GP

5

SSID = VIDEO

MDA[0..63]84,85

( 0.5 * VDDR1 ) ( for SSTL-1.8/SSTL-2/DDR2 ) ( 0.7 * VDDR1 ) ( for GDDR3/GDDR4 )

DIVIDER RESISTORS DDR2/3 GDDR3

MVREF TO 1.8V 100R 40.2R

D D

MVREF TO GND 100R 100R

+1.5V_RUN

12

R8301

40D2R2F-GP

C C

+1.5V_RUN

12

R8303

40D2R2F-GP

12

R8308

100R2F-L1-GP-U

B B

R8302

100R2F-L1-GP-U

C8314

SCD01U16V2KX-3GP

MEM_RST84,85

12

C8315

SCD1U16V2KX-3GP

R8333

2K2R2J-2-GP

R8313

10KR2J-3-GP

+1.5V_RUN

12

M92

PARK

1 2

+1.5V_RUN

JTAG_TESTEN81

PARK

R8324 51D1R2F-GP

1 2

M92

12

C8301

SCD01U16V2KX-3GP

R8310

R8310 0R2J-2-GP

0R2J-2-GP

12

R8304

R8304 240R2F-1-GP

240R2F-1-GP

R8306

R8306 150R2F-1-GP

150R2F-1-GP R8307

R8307

240R2F-1-GP

12

C8316

C8316 SC68P50V2JN-1GP

SC68P50V2JN-1GP

C8313

SCD1U16V2KX-3GP

1 2

PARK

R8305

R8305 0R2J-2-GP

0R2J-2-GP

1 2

PARK

MEM_RST_R

PARK

MDA0 MDA1 MDA2 MDA3 MDA4 MDA5 MDA6 MDA7 MDA8

MDA10 MDA11 MDA12 MDA13 MDA14 MDA15 MDA16 MDA17 MDA18 MDA19 MDA20 MDA21 MDA22 MDA23 MDA24 MDA25 MDA26 MDA27 MDA28 MDA29 MDA30 MDA31 MDA32 MDA33 MDA34 MDA35 MDA36 MDA37 MDA38 MDA39 MDA40 MDA41 MDA42 MDA43 MDA44 MDA45 MDA46 MDA47 MDA48 MDA49 MDA50 MDA51 MDA52 MDA53 MDA54 MDA55 MDA56 MDA57 MDA58 MDA59 MDA60 MDA61 MDA62 MDA63

MVREFD MVREFS

VGA_CALRN0

VGA_CALRN1

VGA_CALRP1

VGA_CALRP0

VGA_CLKTSTA

12

M92

R8330

R8330 4K7R2J-2-GP

4K7R2J-2-GP

M92

K27

J29 H30 H32 G29 F28 F32 F30 C30 F27 A28 C28 E27 G26 D26 F25 A25 C25 E25 D24 E23 F23 D22 F21 E21 D20 F19 A19 D18 F17 A17 C17 E17 D16 F15 A15 D14 F13 A13 C13 E11 A11 C11 F11

A9 C9 F9 D8 E7 A7 C7 F7 A5 E5 C3 E1 G7 G6 G1 G3 J6 J1 J3 J5

K26

J26

J25

K7

J8

K25

L10

K8 L7

VGA_CLKTSTB

12

R8331

R8331 4K7R2J-2-GP

4K7R2J-2-GP

U80C

DQA_0 DQA_1 DQA_2 DQA_3 DQA_4 DQA_5 DQA_6 DQA_7 DQA_8 DQA_9 DQA_10 DQA_11 DQA_12 DQA_13 DQA_14 DQA_15 DQA_16 DQA_17 DQA_18 DQA_19 DQA_20 DQA_21 DQA_22 DQA_23 DQA_24 DQA_25 DQA_26 DQA_27 DQA_28 DQA_29 DQA_30 DQA_31 DQA_32 DQA_33 DQA_34 DQA_35 DQA_36 DQA_37 DQA_38 DQA_39 DQA_40 DQA_41 DQA_42 DQA_43 DQA_44 DQA_45 DQA_46 DQA_47 DQA_48 DQA_49 DQA_50 DQA_51 DQA_52 DQA_53 DQA_54 DQA_55 DQA_56 DQA_57 DQA_58 DQA_59 DQA_60 DQA_61 DQA_62 DQA_63

MVREFDA MVREFSA

NC_MEM_CALRN0 NC_MEM_CALRN1

MEM_CALRP1 NC_MEM_CALRP0

DRAM_RST

CLKTESTA CLKTESTB

M92-S2-GP

FOR M92

For R8306 : 2 40ohm For M92 1 50ohm For PAR K

For C8316 : 2 .2n For M92 6 8p For PARK

0504

4

3 OF 7

K17

MAA_0

J20

MAA_1

H23

MAA_2

G23

MAA_3

G24

MAA_4

H24

MAA_5

J19

MAA_6

K19

MAA_7

J14

MAA_8

K14

MAA_9

J11

MAA_10

J13

MAA_11

H11

MAA_12

G11

MAA_13/BA2

J16

MAA_14/BA0

L15

MAA_15/BA1

E32

DQMA_0

E30

DQMA_1

A21

DQMA_2

C21

DQMA_3

E13

DQMA_4

D12

DQMA_5

E3

DQMA_6

MEMORY INTERFACE

TESTEN

DPC_CALR

12

PARK

C8317

12

PARK

R8322

F4

DQMA_7

H28

RDQSA_0

C27

RDQSA_1

A23

RDQSA_2

E19

RDQSA_3

E15

RDQSA_4

D10

RDQSA_5

D6

RDQSA_6

G5

RDQSA_7

H27

WDQSA_0

A27

WDQSA_1

C23

WDQSA_2

C19

WDQSA_3

C15

WDQSA_4

E9

WDQSA_5

C5

WDQSA_6

H4

WDQSA_7

L18

ODTA0

K16

ODTA1

H26

CLKA0

H25

CLKA0B

G9

CLKA1

H9

CLKA1B

G22

RASA0B

G17

RASA1B

G19

CASA0B

G16

CASA1B

H22

CSA0B_0

J22

CSA0B_1

G13

CSA1B_0

K13

CSA1B_1

K20

CKEA0

J17

CKEA1

G25

WEA0B

H10

WEA1B

AB16

RSVD#1

G14

RSVD#2

G20

RSVD#3

route 50ohms

12

single-ended/100ohms diff and keep short

PARK

C8318

Use this option ONLY

SCD1U10V2KX-4GP

for Park-S3

12

PARK

R8323

51D1R2F-GP

FOR PARK

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9MDA9 MAA10 MAA11 MAA12 BA2 BA0 BA1

DQMA#0 DQMA#1 DQMA#2 DQMA#3 DQMA#4 DQMA#5 DQMA#6 DQMA#7

RDQSA0 RDQSA1 RDQSA2 RDQSA3 RDQSA4 RDQSA5 RDQSA6 RDQSA7

WDQSA0 WDQSA1 WDQSA2 WDQSA3 WDQSA4 WDQSA5 WDQSA6 WDQSA7

ODTA0 ODTA1

CLKA0 CLKA0#

CLKA1 CLKA1#

RASA0# RASA1#

CASA0# CASA1#

CSA0_0#

CSA1_0#

CKEA0 CKEA1

WEA0# WEA1#

1 2

R8309 0R2J-2-GPR8309 0R2J-2-GP

3

MAA[0..12] 84,85

RDQSA0 and WDQSA0 = differential pair RDQSA1 and WDQSA1 = differential pair

ETC

BA2 84,85 BA0 84,85 BA1 84,85

DQMA#[0..3] 84

DQMA#[4..7] 85

RDQSA[0..3] 84

RDQSA[4..7] 85

WDQSA[0..3] 84

WDQSA[4..7] 85 ODTA0 84 ODTA1 85

CLKA0 84 CLKA0# 84

CLKA1 85 CLKA1# 85

RASA0# 84 RASA1# 85

CASA0# 84 CASA1# 85

CSA0_0# 84

CSA1_0# 85

CKEA0 84 CKEA1 85

WEA0# 84 WEA1# 85

MAA13MAA13_R

MAA13 84,85

R8312 3KR2J-2-GP

GPIO_VGA_0081

GPIO_VGA_0181

GPIO_VGA_0281

GPIO_VGA_0581

GPIO_VGA_1181

DAC2_HSYNC81

DAC2_VSYNC81

GPIO_VGA_0981

1 2

DY

R8314 3KR2J-2-GP

1 2

DY

R8315 10KR2J-3-GP

1 2

DY

R8316 10KR2J-3-GP

1 2

DY

R8317 10KR2J-3-GPR8317 10KR2J-3-GP

1 2

R8318 10KR2J-3-GP

1 2

DY

R8320 10KR2J-3-GP

1 2

DY

R8321 10KR2J-3-GP

1 2

DY

+3.3V_DELAY

2

ATI RESERVED CONFIGURATION STRAPS

ALLOW FOR PULLUP PADS FOR THESE STRAPS AND IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESE

PULLUP PADS ARE NOT REQUIRED FOR THESE STRAPS BUT IF THESE GPIOS ARE USED, THEY MUST NOT CONFLICT DURING RESET

If BIOS_ROM_EN (GPIO22) = 0

Size of the primary memory apertures

128MB 256MB

V

64MB 32MB 512MB 1GB 2GB 4GB

STRAPS PIN DESCRIPTION

TX_PWRS_ENB

(Internal PD)

TX_DEEMPH_EN

(Internal PD)

BIF_GEN2_EN_A

ROMIDCFG[3:0]

(Internal PD)

BIOS_ROM_EN

(Internal PD)

AUD[1] AUD[0]

(Internal PD)

VGA_DIS

(Internal PD)

STRAPS PIN DESCRIPTION

MEM_TYPE

DVPDATA(19,21,2,0)

(Internal PD)

H2SYNC , V2SYNC

GPIO[13,12,11]

x000 x001 x010 x x x x x

GPIO_VGA_00

GPIO_VGA_01

GPIO_VGA_02

GPIO[13,12,11]

GPIO_22_ROMCSB

VGA_HSYNC

VGA_VSYNC

GPIO_VGA_09

If BIOS_ROM_EN (GPIO22) = 1

Manufacturer Part Number GPIO[13, 12,11]

ST Microelectronics

Chingis (formerly PMC)

Tansmitter Power Savings Enable 0= 50% Tx output swing

V

1= Full Tx output swing

Transmitter De-emphasis Enable 0= Tx de-emphasis disabled

V

1= Tx de-emphasis enabled

0 = Advertises the PCI-E device

V

as 2.5GT/s 1 = Advertises the PCI-E device as 5GT/s

if BIOS_ROM_EN=1,then Config[3:0] defines the ROM type if BIOS_ROM_EN=0,then Config[3:0]

V

defines the primary memory apeture size

Enable external BIOS ROM device 0= Disable external BIOS ROM device

V

1= Enable external BIOS ROM device

AUD[1:0]

V

00:No audio function 01:Audio for DisplayPort and HDMI ( if adapter is detected) 10:Audio for DisplayPort only 11:Audio for both DisplayPort and HDMI

0: VGA Controller capacity enabled

V

1: The device will not be recognized as the system's VGA controller

MEMORY TYPE,MAKE AND SIZE INFO 0000 - gDDR3 64Mx16 Hynix

V

0001 - gDDR3 64Mx16 Samsung 0010 - gDDR3 128Mx16 Hynix 0011 - gDDR3 128Mx16 Samsung

DVPDATA081

DVPDATA281

DVPDATA2181

DVPDATA1981

1

M25P05A M25P10A M25P20 M25P40 M25P80

Pm25LV512A Pm25LV010A

1 2

Samsung

R8319 10KR2J-3-GP

1 2

DY

R8325 10KR2J-3-GP

R8327 10KR2J-3-GP

1 2

DY

R8329 10KR2J-3-GP

1 2

DY

0100 0101 0101 0101 0101

0100 0101

+1.8V_DELAY

R8332 10KR2J-3-GP

VGA_VSYNC55,81

VGA_HSYNC55,81

A A

Title

VGA MEMORY/STRAPS(4/4)

Size Document Number Rev

C

Arsenal DJ1 Discrete

Date: Sheet of

5

4

3

2

Date: Sheet of

Arsenal DJ1 Discrete

1 2

DY

R8334 10KR2J-3-GP

1 2

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

83 89F riday, May 07, 2010

1

X01

5

4

3

2

1

SSID = VIDEO

Place blow decouping caps close VDD pin. Place blow decouping caps close VDD pin.

+1.5V_RUN

300mA 300mA

D D

12

C8401

SC1U6D3V2KX-GP

12

C8403

C8404

C8402

SC1U6D3V2KX-GP

C8404

SC1U6D3V2KX-GP

12

C8405

SC1U6D3V2KX-GP

12

C8406

C8407

C8408

SC1U6D3V2KX-GP

12

C8409

12

C8410

SC10U6D3V5MX-3GP

12

C8411

SC10U6D3V5MX-3GP

+1.5V_RUN

12

C8412

SC1U6D3V2KX-GP

12

C8414

C8413

SC1U6D3V2KX-GP

12

C8415

C8416

SC1U6D3V2KX-GP

12

C8417

SC1U6D3V2KX-GP

12

C8423

C8418

SC1U6D3V2KX-GP

12

C8419

SC10U6D3V5MX-3GP

12

C8421

C8420

SC10U6D3V5MX-3GP

+1.5V_RUN

12

R8401

VREF=0.75V

4K99R2F-L-GP

12

C C

+1.5V_RUN

12

R8403

4K99R2F-L-GP

VREF=0.75V

12

C8424

R8404

SCD1U10V2KX-4GP

4K99R2F-L-GP

B B

MAA1383,85

VREFDQ_0_2

12

C8422

R8402

SCD1U10V2KX-4GP

4K99R2F-L-GP

VREFCA_0_2

12

R8405

MAA[0..12]83,85

BA083,85 BA183,85 BA283,85

CLKA083

CLKA0#83

CKEA083

DQMA#083 DQMA#283

WEA0#83 CASA0#83 RASA0#83

+1.5V_RUN

ZQ_0_2

MAA0 MAA1 MAA2 MAA3

243R2F-2-GP

MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 MAA13

CLKA0

CLKA0#

CKEA0

DQMA#0 DQMA#2

WEA0# CASA0# RASA0#

BA0 BA1 BA2

U8401

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

H5TQ1G63BFR-12C-GP

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

ODT

RESET#

NC#T7 NC#L9 NC#L1

NC#J9 NC#J1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

CS#

MDA17

E3

MDA18

F7

MDA16

F2

MDA19

F8

MDA23

H3

MDA21

H8

MDA20

G2

MDA22

H7

MDA0

D7

MDA2

C3

MDA5

C8

MDA4

C2

MDA7

A7

MDA3

A2

MDA6

B8

MDA1

A3

RDQSA0

C7

WDQSA0

B7

RDQSA2

F3

WDQSA2

G3

ODTA0

K1

CSA0_0# CSA0_0#

L2

MEM_RST

T2

T7 L9 L1 J9 J1

J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1

G1 F9 E8 E2 D8 D1 B9 B1 G9

MDA[0..63]83,85

RDQSA[0..3]83

WDQSA[0..3]83

RDQSA0 83 WDQSA0 83

RDQSA2 83 WDQSA2 83

ODTA0 83

CSA0_0# 83

MEM_RST 83,85

DQMA#[0..3]83

MDA[0..63]

VREFDQ_0_2 VREFCA_0_2

12

MAA[0..12]83,85

MAA1383,85

BA083,85 BA183,85 BA283,85

CLKA083

CLKA0#83

CKEA083

DQMA#183 DQMA#383

WEA0#83 CASA0#83 RASA0#83

R8406

243R2F-2-GP

ZQ_1_3

MAA0 MAA1 MAA2 MAA3 MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12

CLKA0

CKEA0

DQMA#1 DQMA#3

CASA0# RASA0#

+1.5V_RUN

BA0 BA1 BA2

CLKA0#

WEA0#

U8402

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

M7

A15

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

H5TQ1G63BFR-12C-GP

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

ODT

CS#

RESET#

NC#T7 NC#L9 NC#L1 NC#J9 NC#J1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

MDA24

E3

MDA25

F7

MDA26

F2

MDA29

F8

MDA28

H3

MDA30

H8

MDA27

G2

MDA31

H7

MDA15

D7

MDA10

C3

MDA8

C8

MDA11

C2

MDA9

A7

MDA12

A2

MDA13

B8

MDA14

A3

RDQSA1

C7

WDQSA1

B7

RDQSA3

F3

WDQSA3

G3

ODTA0

K1

L2

MEM_RST

T2

T7 L9 L1 J9 J1

J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1

G1 F9 E8 E2 D8 D1 B9 B1 G9

RDQSA1 83 WDQSA1 83

RDQSA3 83 WDQSA3 83

ODTA0 83

CSA0_0# 83

MEM_RST 83,85

R8407

A A

5

4

CLKA0

CLKA0#

R8407

1 2

56R2J-4-GP

R8408

1 2

56R2J-4-GP

CLKA0_GND

12

C8425

C8425 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM (1/2)

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

GPU-VRAM (1/2)

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

84 89Friday, May 07, 2010

1

X01

5

SSID = VIDEO

4

3

2

1

Place blow decouping caps close VDD pin.

+1.5V_RUN

Place blow decouping caps close VDD pin.

+1.5V_RUN

300mA 300mA

D D

C8501

+1.5V_RUN

12

R8501

VREF=0.75V

4K99R2F-L-GP

12

C C

+1.5V_RUN

12

R8503

4K99R2F-L-GP

VREF=0.75V

12

C8524

R8504

SCD1U10V2KX-4GP

4K99R2F-L-GP

B B

VREFDQ_4_6

12

C8523

R8502

SCD1U10V2KX-4GP

4K99R2F-L-GP

VREFCA_4_6

MAA[0..12]83,84

MAA1383,84

BA083,84 BA183,84 BA283,84

CLKA183

CLKA1#83

CKEA183

DQMA#683 DQMA#483

WEA1#83 CASA1#83 RASA1#83

12

SC1U6D3V2KX-GP

12

R8505

12

C8505

BA0 BA1 BA2

C8505

C8504

SC1U6D3V2KX-GP

K8

K2 N1 R9

B2 D9 G7 R1 N9

A8

A1 C1 C9 D2

E9

F1 H9 H2

H1 M8

L8

N3

P7

P3 N2

P8

P2 R8 R2

T8 R3

L7 R7 N7

T3 M7

M2 N8 M3

J7

K7

K9

D3

E7

L3

K3

J3

C8502

C8503

SC1U6D3V2KX-GP

+1.5V_RUN

ZQ_4_6

MAA0 MAA1 MAA2 MAA3

243R2F-2-GP

MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12 MAA13 MAA13

CLKA1

CLKA1#

CKEA1

DQMA#6 DQMA#4

WEA1# CASA1# RASA1#

12

C8506

SC1U6D3V2KX-GP

U8501

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VREFDQ VREFCA ZQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A15

BA0 BA1 BA2

CK CK#

CKE

DMU DML

WE# CAS# RAS#

H5TQ1G63BFR-12C-GP

C8507

SC1U6D3V2KX-GP

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

ODT

RESET#

NC#T7 NC#L9 NC#L1

NC#J9 NC#J1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

CS#

12

C8508

SC1U6D3V2KX-GP

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

C7 B7

F3 G3

K1

L2 T2

T7 L9 L1 J9 J1

J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1

G1 F9 E8 E2 D8 D1 B9 B1 G9

12

SC10U6D3V5MX-3GP

12

C8511

SC10U6D3V5MX-3GP

RDQSA6 83 WDQSA6 83

RDQSA4 83 WDQSA4 83

ODTA1 83

MEM_RST 83,84

MDA[0..63]83,84

RDQSA[4..7]83

WDQSA[4..7]83

CSA1_0# 83 CSA1_0# 83

DQMA#[4..7]83

MDA[0..63]

MAA[0..12]83,84

MAA1383,84

C8509

C8510

SC10U6D3V5MX-3GP

MDA37 MDA33 MDA39 MDA36 MDA34 MDA35

MDA49 MDA52 MDA50 MDA51 MDA54 MDA48 MDA55 MDA53

RDQSA6 WDQSA6

RDQSA4 WDQSA4

ODTA1

CSA1_0# CSA1_0# MEM_RST

12

C8512

SC1U6D3V2KX-GP

VREFDQ_4_6 VREFCA_4_6

12

R8506

BA083,84 BA183,84 BA283,84

CLKA183

CLKA1#83

CKEA183

DQMA#783 DQMA#583

WEA1#83 CASA1#83 RASA1#83

C8513

243R2F-2-GP

SC1U6D3V2KX-GP

ZQ_5_7

12

C8514

MAA0 MAA1 MAA2 MAA3 MAA4MAA4 MAA5 MAA6 MAA7 MAA8 MAA9 MAA10 MAA11 MAA12

CLKA1

CKEA1

DQMA#7 DQMA#5

CASA1# RASA1#

12

SC1U6D3V2KX-GP

+1.5V_RUN

BA0 BA1 BA2

CLKA1#

WEA1#

12

C8515

SC1U6D3V2KX-GP

K8 K2 N1 R9 B2 D9 G7 R1 N9

A8 A1 C1 C9 D2 E9 F1 H9 H2

H1 M8

L8

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3

L7 R7 N7 T3 M7

M2 N8 M3

J7 K7

K9

D3 E7

L3 K3

J3

12

C8517

C8516

SC1U6D3V2KX-GP

U8502

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VREFDQ VREFCA ZQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A15

BA0 BA1 BA2

CK CK#

CKE

DMU DML

WE# CAS# RAS#

H5TQ1G63BFR-12C-GP

C8518

SC1U6D3V2KX-GP

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

RESET#

NC#T7 NC#L9 NC#L1 NC#J9 NC#J1

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

ODT

CS#

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

12

C8520

MDA46MDA38 MDA47MDA32 MDA45 MDA43 MDA40 MDA42 MDA44 MDA41

MDA56 MDA60 MDA59 MDA62 MDA58 MDA63 MDA57 MDA61

RDQSA7 WDQSA7

RDQSA5 WDQSA5

ODTA1

MEM_RST

12

SC10U6D3V5MX-3GP

12

C8519

SC1U6D3V2KX-GP

E3 F7 F2 F8 H3 H8 G2 H7

D7 C3 C8 C2 A7 A2 B8 A3

C7 B7

F3 G3

K1

L2 T2

T7 L9 L1 J9 J1

J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1

G1 F9 E8 E2 D8 D1 B9 B1 G9

12

C8522

C8521

SC10U6D3V5MX-3GP

RDQSA7 83 WDQSA7 83

RDQSA5 83 WDQSA5 83

ODTA1 83

MEM_RST 83,84

R8507

R8508

CLKA1_GND

12

C8525

C8525 SCD01U16V2KX-3GP

SCD01U16V2KX-3GP

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU-VRAM (2/2)

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

GPU-VRAM (2/2)

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

85 89Friday, May 07, 2010

1

X01

CLKA1

CLKA1#

1 2

56R2J-4-GP

1 2

56R2J-4-GP

A A

5

4

5

4

3

2

1

SSID = Video.PWR.Regulator

RT8208BGQW for +VCC_GFX_CORE

D D

+PWR _SRC

12

DY

X01

+3.3V_RU N

12

PR8606

100KR2F-L1-GP

C C

RUNPW ROK42,49,5 1,52

1 2

PC8604

PR8604

12

10R2F-L-G P

PR8605 18KR2 F-GPPR8605 18KR2F-GP

SC1U10V3KX-3GP

+5V_ALW

12

SC1U10V3KX-3GP

+GFX_CO RE_TON

PU8601

16

TON

9

VDDP

2

VDD

4

PGOOD

10

CS

15

EM/DEM

17

GND

RT8208B GQW-GP

BOOT

UGATE PHASE

LGATE

VOUT

PC8608

+GFX_CO RE_VDD

+GFX_CO RE_CS +GFX_CO RE_FB

1 2

+GFX_CO RE_EN_R

G0

FB

G1

D1 D0

PR8610

1 2

249KR2F -GP

+GFX_CO RE_BOOT

13

+GFX_CO RE_UGATE

12

+GFX_CO RE_PHASE

11

+GFX_CO RE_LGATE

8

7 3 14

PWRC NTL_1#

5

PWRC NTL_0#

6

+GFX_CO RE_VOUT

1

PR8602

0R3J-0-U-G P

PWRC NTL_0 81

PWRC NTL_1 81

PC8606

12

SCD1U25 V3KX-GP

1 2

5/3

PU8603

SI7686DP-T 1-GP

PU8602

4 5

DDD

G

4 5

678

DDD S

678

SSGD

123

SIR460DP-T1-GE3-GP

D

SSS

123

PC8607

12

PR8615

DY

2D2R5F-2 -GP

12

PC8609

DY

SC330P5 0V3KX-GP

DY

SC10U25V6KX-1GP

IND-2D2UH-46 -GP-U

12

PC8611

SC10U25V6KX-1GP

PL8601

1 2

+GFX_CO RE_VOUT

10KR2F-2 -GP

PC8603

SCD1U50V3KX-GP

PR8619

Vout=0.75V*(R1+R2)/R2

Design Current = 6.4A 8

.2A<OCP <11.16A

+VCC_GF X_CORE

12

PC8602

PG8601

GAP-CLOSE-PWR-3-GP

12

DY

12

DY

PC8602

SCD1U10V2KX-4GP

PC8613 SC10P50V2JN-4GPDYPC8613 SC10P50V2JN-4GP

12

DY

PTC8601

PTC8602

ST330U2VDM-3GP

PR8603 0R2J-2 -GPPR8 603 0R2J-2-GP

GFX_COR E_EN37

PM_SLP_ S3#21,37,41,42,49 ,52

B B

A A

5

1 2

PR8613 100KR2J-1 -GP

1 2

DY

PC8612

SC4700P 50V2KX-1GP

+GFX_CO RE_EN_R

12

DY

PWRCNTL_0 +VCC_GFX_CORE

PWRCNTL_1

H

L

H

L

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 2.2UH PCMC063T-2R2MN Cyntec DCR:18/20mohm Isat =14.5Arms 68.2R210.20B O/P cap: 330U 2.5VEEFCX0D331R 15mOhm 2.7Arms Panasonic/ 79.33719.20D H/S: FDS8880 9.6mohm/[email protected]/ 84.08880.037 L/S: FDS6676AS 5.9mOhm/[email protected]/ 84.06676.A37

4

3

PC8610 SC10P50V2JN-4GPDYPC8610 SC10P50V2JN-4GP

+GFX_CO RE_FB

12

PR8617

49K9R2F -L-GP

150KR2F -L-GP

H

L

0.9V

0.95V

1V

1.1V

*

150KR2F -L-GP

49K9R2F -L-GP

PWRCNTL_0#

2

12

PR8618

Title

RT8208_+VCC_GFXCORE

ize Document Nu mber Rev

Size Document N umber Rev

S

A3

Date: Sheet of

12

PR8607

PR8607 49K9R2F -L-GP

49K9R2F -L-GP

PWRCNTL_1#

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Arsenal DJ1 Discrete

1

86 89Friday, May 07, 2010

X01

5

D D

4

3

2

1

(Blanking)

C C

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet of

APL5930_+1.1V_RUN

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

87 89Friday, May 07, 2010

1

X01

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

Arsenal DJ1 Discrete

88 89Friday, May 07, 2010

1

X01

5

4

3

2

1

Change notes - Page 1

PAGE OWNERDATE VERSON Issue DescriptionModify ListITEM

1

11/06

D D

X01

51

812

3

7

81

4

86

5

42

PU5101 +1.5V_SUS and +5V_ALW change

Change R8133 form 10KΩ to 0Ω

Change R713 from 33Ω to 47Ω. Change R8129 from 124Ω to 80.6Ω

pull resistor R8606 to +3.3V_RUN

R4206 short RC delay for +5V_RUN

power plane change

GPU 27MHz to JTAG_CLK

Adjust GPU 27Mhz Vpp to 1.8V

aviod leakage cuurent

EE

R4207 change to 20K

426

C4203 change to 0.1uf

RC delay for +3.3V_RUN

EE

7 52

PC5207 change to 220nf

RC delay for +1.8V_RUN

EE

PR5301 change to 1K

PR5201 change to 10K

538

C C

9 37

11 22

13 7

14 49

15 62

B B

16 62

17 76

18 37

Pop R3703,R3704,D3702,D370 3,Q3705,Q3703, R3705,C3717 Depop R3709, R3705,R3701

5110

1012

PC5302 change to 1uf

RC delay for +2.5V_RUN

add 10mW schematic

Change PR5105 pull up from +3.3V_ALW to +3.3V_RUN

aviod leakage cuurent

Del MEM_1V5 pull up resister (RN2202) aviod leakage cuurent

R1028 pull to +1.5V_RUN aviod leakage current

C718,C719 change to 15pF

As crystal vendor suggest

Dummy PR4905 modify RUNPWROK PU plane EE

R6202 change to 33R For SPI_DI undershoot over spec EE

R6206 change from 510R to 1KR For Safty request EE

IOBD1 pin define modify For ME IO BD modify

Pop R3729 and depop R3733 For PCB version change

EE

04/29

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, H sin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, H sin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Change History

Arsenal DJ1 Discrete

Taipei Hsien 221, Taiwan, R.O.C.

89 89Friday, May 07, 2010

1

X01