Dell M6400 XM1 Schematics

5
D D
4
3
2
1
Quanta Project Name: XM1
C C
Dell Project Name: Nike
2008-03-18
REV : A1A
X01 Stage
B B
A A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Title
Title
Title
Cover Page
Cover Page
Cover Page
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
5
4
http://hobi-elektronika.net
3
2
Custom
Date: Sheet
Date: Sheet
Date: Sheet
?1A
?1A
?1A
1
Nike
Nike
Nike
155Wednesday, March 19, 2008
155Wednesday, March 19, 2008
155Wednesday, March 19, 2008
NB1
NB1
NB1
of
of
of
1
2
3
4
5
6
7
8
PWA XXX, PWB XXX,
GDDR3 512MB
XM1 M/B PCBXM1 M/B PCB
System Block Diagram of Nike
GPU G92/G94
16Mx32 x8
GPU DC/DC
LVDS Conn
A A
CLOCK
CK505
PG 07
Penryn
(35/45W)
(478 Micro-FCPGA)
POWER
CHARGER
PG 46
DDR3-SODIMM_A1
DDR3-SODIMM_A0
LDO
0.75V_DDR_VTT, 1.8V_RUN
DC/DC
+3.3V_ALW/+5V_ALW/+15V_ALW
DC/DC
1.1V_VCCP and 1.5V_MEM
VCORE
B B
VCC_VCORE
PG 47
PG 49
PG 48
PG 51
PG 22,23
DDR3-SODIMM_B0
PG 25,26
DDR3-SODIMM_B1
E-Module Bay
ODD
SATA - HDD0 Power Good Misc. Power
PG 45,52
SATA - HDD1
SPI FLASH 32mb
800/1067 MHz DDR III
800/1067 MHz DDR III
PG 31 PG 31
PG18
SATA[1] SATA[0]
SATA[4]
SPI
Eaglelake-PM
1254 FCBGA
C_Link
ICH9M-E
676 BGA
PG 19,20,21,22
IOL Board
92HD71B/TPA6040A
MIC/HP Jack
CODEC/AMP
Speaker X2
SSM2602
Azalia I/F
DAI
Azalia I/F
DAI S/PDIF
LPC
IOL
Cardbus Slot
C C
8-in-1 Reader
RICOH R5C847 R5531V002
Dual USB
73S8009CNSmart Card
PCI
RTC Battery
USB[0,1]
Smart Card Signals
Conn.
PG 30
PCI
RTC Signals
USB[0,1]
Smart Card Signals
TPM 1.2
SSX35BCB
1394 Port
IO Expander
D D
ECE1088
BC
PG 41
1
2
SIO SIO
BC
MEC5035 ECE5028
PG 42
PS/2
Touchpad/ Keyboard
3
BC
PG 38
LPC(Dock)
PS/2(Dock)
PG 8,9
1067 MHz FSB
PG 10~18
DMI
SATA[5]
Smart Card Signals
USB[7] PCIE[4]
USB[2,3]
PG 40
PCIE[6]
USB[11]
USB[6] PCIE[3]
USB[5]
PG 43
PCIE[1] USB[4]
PCIE[2]
PCIE[5]
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4
PEG DP
PEG
S/PDIF
CAMERA
MINI-CARD-1
BT/UWB
MINI-CARD-2
WWAN
Half MINI-CARD
WLAN/WiMAX
MINI-CARD-3
Robson
5
GFX Card Conn
PG 27 DP CRT
LOM
BCM5761E
PG 37,38,39
CRT SW
TS3DV520
DP SW
TS2DP512
SATA SW
PI2DBS212
IOR
Conn.
PG 30
LAN
PG 39
PG 33
PG 32
PG 32
PG 33
PG 29
PG 28
PG 31
USH TPM 1.2
BCM5880
USB
6
IOR Board
Flash 4mb
RFID antenna Conn.
Express Card Slot
USB/eSATA
Magnetics
RFID Antenna
Biometric
PowerOn Btn/LEDs Board
PG 34
FAN & THERMAL
EMC4002
PG 36
CRT
DP
RJ-45
SCHEM XXX. VER : XX
DisplayPort(1st.)
CRT(Dock)
DisplayPort(2nd.)
SATA
LAN(Dock)
PS2 LPC(Dock) USB[8,9] DAI SMbus
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Title
Title
Title
Block Diagram
Block Diagram
Block Diagram
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
7
Date: 071010
E DOCKING CONNECTOR
PG 44
Project Name:
Project Name:
Project Name:
?1A
?1A
?1A
Nike
Nike
Nike
8
255Wednesday, March 19, 2008
255Wednesday, March 19, 2008
255Wednesday, March 19, 2008
of
of
of
NB1
NB1
NB1
1
2
3
4
5
6
7
8
A A
INDEX
Pg# Description
CoverPage
01 02
MB Block Diagram
03
Index Config.
04
SMBus Topology
05
Power Sequence Diagram
06
Clock Generator
07
Penryn
08~09
Eaglelake
10~18
ICH9M
19~22
DDR3
23~26
GFX CARD CONN.
27 28
B B
C C
DisplayPort SWITCH CRT SWITCH
29
IOR and IOL connector.
30 31
SATA(HDD_ODD) eSATA SWITCH
32
MINI Card
33
MINI Card
34
TP PWR BUTTON CCD SNIFFER LED.
35 36
THERMAL EMC4002 BCM5761E_LOM
37~39
40
SSX35BCB (TPM for China)
41
IO EXPAND_ECE1088
42
SIO_MEC5035 SIO-ECE5028
43
E-DOCKING CONNECTOR.
44
45
System Power Good. Battery Charger.
46
0.75V_DDR_VTT, 1.8V_RUN
47
1.1V_VCCP and 1.5V_MEM
48
5V_ALW, 3V_ALW
49
DCIN, Battery Connector
50
CPU_VCORE (ADP3207A)
51 52
Power Misc
53
Screw hole
D D
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Project Name:
Project Name:
Title
Title
Title
Front Page
Front Page
Front Page
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
1
2
3
http://hobi-elektronika.net
4
5
6
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Project Name:
?1A
?1A
?1A
7
Nike
Nike
Nike
355Wednesday, March 19, 2008
355Wednesday, March 19, 2008
355Wednesday, March 19, 2008
NB1
NB1
NB1
of
of
of
8
5
4
3
2
1
D D
State
Signal
SLP S3#
SLP S4#
SLP S5#
SLPM#ALWAYS
PLANEMPLANE
SUS PLANE
RUN PLANE
CLOCKS
S0 HIGH HIGH HIGH HIGH ON ON ON ON ON
HIGHLOW HIGH LOW ON OFF ON OFF OFFS3 LOW LOW HIGH LOW ON OFF OFF OFF OFFS4 LOW LOW LOW LOW ON OFF OFF OFFS5 OFF
Power
+15V_ALW
Plane
+5V_ALW
C C
State
+3.3V_ALW_ICH +3.3V_RTC_LDO
+3.3V_SUS +1.5V_MEM
+5V_RUN +3.3V_RUN +1.5V_RUN +0.75V_DDR_VTT +1.1V_VCCP +VCC_CORE
S0 ON ON ON
S3
S5 S4/AC
S5 S4/AC don't exist
ON ON OFF
ON OFF OFF
OFF
USB PORT#
OFF
DESTINATION
OFF
0 Left Top
B B
1 Left Bot 2 Right Top 3 Right Bot
ICH9M-E
4 WLAN 5 WWAN 6 WPAN 7 Express card 8 DOCKING 9 DOCKING 10 USH 11 Camera
PCI EXPRESS
DESTINATION
Lane 1 WWAN
A A
ICH9M-E
Lane 3 Lane 4 Lane 5 Lane 6
Lane 2
5
4
WLAN BT/UWB Express Card Robson Giga Bit LOM
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3
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Project Name:
Project Name:
Title
Title
Title
Index and Config.
Index and Config.
Index and Config.
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Project Name:
?1A
?1A
?1A
Nike
Nike
Nike
455Wednesday, March 19, 2008
455Wednesday, March 19, 2008
455Wednesday, March 19, 2008
1
NB1
NB1
NB1
of
of
of
1
ICH9M-E
A A
G16 A13
2
ICH_SMBCLK ICH_SMBDATA
2.2K
2.2K
3
+3.3V_ALW_ICH
4
2N7002
5
LOM_SCLK LOM_SDATA
6
2.2K
2.2K
+3.3V_LAN
LOM
7
8
2N7002
2N7002
2.2K
2.2K
MEM_SCLK MEM_SDATA
+3.3V_RUN
JDIM1
A0
2N7002
8.2K
DOCK_SMBCLK
6
1A
DOCK_SMBDAT
5
1A
B B
1B 1B
8
LCD_SMBCLK LCD_SMBDAT
7
SIO
112
PBAT_SMBCLK
1C
111
PBAT_SMBDAT
1C
98
1F
C C
1F
CARD_SMBCLK
97
CARD_SMBDAT
8.2K
8.2K
8.2K
2.2K
2.2K
2.2K
2.2K
100 ohm
100 ohm
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
0x48 0x70 0x59 0x34
DOCKING
0x58
INVERTER (JLVDS)
0x16
Battery
2.2K
2N7002
2N7002
2.2K
2N7002
2N7002
2N7002
2.2K
2.2K
2.2K
2.2K
JDIM2
JDIM3
JDIM4
+3.3V_SUS
Express card
+3.3V_WLAN
WLAN
+3.3V_RUN
BT/UWB
A2
A4
A6
2N7002
2.2K
12 CKG_SMBDAT
1H
13
1H
D D
CKG_SMBCLK
2.2K
+3.3V_ALW
2N7002
2N7002
0x12 0x35
2.2K
2.2K
2.2K
2.2K
+3.3V_RUN
0xD2
CLK GEN
+3.3V_RUN
2N7002
Charger
DAI
2N7002
http://hobi-elektronika.net
1
2
3
4
5
6
WWAN
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Project Name:
Project Name:
Title
Title
Title
SMBus Topology
SMBus Topology
SMBus Topology
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Project Name:
?1A
?1A
?1A
7
Nike
Nike
Nike
555Wednesday, March 19, 2008
555Wednesday, March 19, 2008
555Wednesday, March 19, 2008
of
of
of
8
NB1
NB1
NB1
5
4
3
2
1
D D
ADAPTER
+PWR_SRC
BATTERY
ALWON
C C
SN0608098
ALWON
MAX8731 Charger
ALWON
ALWON
+5V_ALW2 +15V_ALW
ADP3207
RUNPWROK
(IMVP_VR_ON)
+VCC_CORE
Design current:32.9A
1.1V_VCCP_ON
+1.1V_VCCP
Design current:18.23A
SN0608098
DDR_ON
+1.5V_MEM
Design current:14.19A
B B
SI4356DV
HDDC_EN
+5V_HDD +5V_MOD +5V_RUN
A A
Design current:1.4A
Design current:1.05A
+5V_ALW
FDC655BN
MODC_EN
5
SI4336DY
RUN_ON
Design current:6.15A
FDC655BN
SUS_ON
+5V_SUS
SI4356DV
AUX_EN_WOWL
+3.3V_WLAN
Design current:1.925A
4
NTMFS4108NT1G
3.3V_RUN_ON
+3.3V_RUN
Design current:9.366A
SI4356DV
+3.3V_LAN
Design current:0.42A
http://hobi-elektronika.net
+3.3V_ALW
Design current:13.94ADesign current:11.64A
AUX_ON
SI4810DY
SUS_ON
+3.3V_SUS
Design current:1.598A
+3.3V_ALW_ICH
3
FDC655BN
ICH_ALW
MAX1935ETA+
1.8V_RUN_ON
+1.8V_RUN
Design current:84mA
2
1.5V_RUN_ON
TPS51100DGQR
0.75V_DDR_VTT_ON
+0.75V_DDR_VTT
Design current:1.4A
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Project Name:
Project Name:
Title
Title
Title
Screw hole
Screw hole
Screw hole
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Project Name:
?1A
?1A
?1A
1
SI4336DY
+1.5V_RUN
Design current:3.19A
Nike
Nike
Nike
of
of
of
655Wednesday, March 19, 2008
655Wednesday, March 19, 2008
655Wednesday, March 19, 2008
NB1
NB1
NB1
1
2
3
4
5
6
7
8
Y1
Y1
1 2
12
14.318MHZ
14.318MHZ
VDD_SRC_01 VDD_SRC_02 VDD_SRC_03 VDD_SRC_04
VDD_PCI_01 VDD_PCI_02
VDD_CPU VDD_48 VDD_REF XIN
XOUT 48M/FSA
FSB/TEST_MODE REF0/FSC_TEST_SEL
REF1 PCI1
PCI2/TME PCI3 PCI4/FCTSEL1
DOT96T/27M_NSS DOT96C/27M_SS
PCIF0/ITP_SEL VTT_PWRDG#/PD(CKPWRGD/PD#) SCLK
SDATA
VSS_01 VSS_02 VSS_03 VSS_04 VSS_05 VSS_06 VSS_07
CK505
CK505
C103
C103 33P/50V
33P/50V
+3.3V_RUN
3 1
2N7002W-7-F
2N7002W-7-F
+3.3V_RUN
3 1
2N7002W-7-F
2N7002W-7-F
R111 0_0402R111 0_0402
14.318MHz
PCI_STP#
CPU_STP#
CPUT1_MCH
CPUC1_MCH
CPUT2_ITP/SRCT_10
CPUC2_ITP/SRCC_10
PGMODE
SRCT_9
SRCC_9
CLKREQ9#
SRCT_8
SRCC_8
CLKREQ8#
SRCT_7
SRCC_7
CLKREQ7#
SRCT_6
SRCC_6
CLKREQ6#
SRCT_5
SRCC_5
CLKREQ5#
SRCT_4
SRCC_4
CLKREQ4#
SRCT_3
SRCC_3
CLKREQ3#
SRCT_2
SRCC_2
CLKREQ2#
SRCT_1/SATAT
SRCC_1/SATAC
CLKREQ1#
SRCT_0/LCD100MT
SRCC_0/LCD100MC
SLG8LP554
SLG8LP554
2
4
RP2
RP2 4P2R-2.2K
Q54
Q54
Q55
Q55
1
3
4P2R-2.2K
CLK_SDATA
CLK_SCLK
2
2
5
CLK_XTAL_OUT
VDDA VSSA
CPUT0 CPUC0
7 8
25 24
11 10
14 13
6 5
9 3
2 72 70 69 71 66 67 38 63 64 62 60 61 29 58 59 57 55 56 28 52 53 26 50 51 46
47 48
+CK_VDD_A
MCH_BCLK MCH_BCLK#
CPU_BCLK CPU_BCLK#
CPU_ITP CPU_ITP#
PCIE_MINI1 PCIE_MINI1#
PCIE_MINI2 PCIE_MINI2#
PCIE_ICH PCIE_ICH#
PCIE_MINI3 PCIE_MINI3#
PCIE_LOM PCIE_LOM#
PCIE_EXPCARD PCIE_EXPCARD#
MCH_3GPLL MCH_3GPLL#
R135 475/FR135 475/F
PCIE_MINI4 PCIE_MINI4#
PCIE_SATA PCIE_SATA#
DOT96_SSC DOT96_SSC#
6
CLK_3GPLLREQ# SATA_CLKREQ# LOM_CLKREQ# CARD_CLK_REQ# MINI1CLK_REQ# MINI2CLK_REQ# MINI3CLK_REQ# MINI4CLK_REQ#
RP4
4 2
4 2
4 2
4 2
4 2
2 4
2 4
2 4
2 4
2 4
2 4
2 4
3 1
RP4
3
4P2R-S-24
4P2R-S-24
1
RP3
RP3
3
4P2R-S-24
4P2R-S-24
1
RP5
RP5
3
4P2R-S-24
4P2R-S-24
1
RP6
RP6
3
4P2R-S-33
4P2R-S-33
1
RP7
RP7
3
4P2R-S-33
4P2R-S-33
1
RP8
RP8
1
4P2R-S-33
4P2R-S-33
3 1
4P2R-S-33
4P2R-S-33
3
RP9
RP9 RP10
RP10
1
4P2R-S-33
4P2R-S-33
3
RP11
RP11
1
4P2R-S-33
4P2R-S-33
3
RP12
RP12
1
4P2R-S-33
4P2R-S-33
3 12 1
4P2R-S-33
4P2R-S-33
3
RP15
RP15 RP14
RP14
1
4P2R-S-33
4P2R-S-33
3
RP13
RP13
4
4P2R-S-33
4P2R-S-33
2
PCI_LOM = FCTSEL1
FCTSEL1 (PIN34)
0=UMA 1 = Disc.
GRFX down
R137 10KR137 10K R155 10KR155 10K R132 10KR132 10K R145 10KR145 10K R112 10KR112 10K R114 10KR114 10K R134 10KR134 10K R124 10KR124 10K
MINI1CLK_REQ#
MINI2CLK_REQ#
MINI3CLK_REQ#
LOM_CLKREQ#
CARD_CLK_REQ#
CLK_3GPLLREQ#
MINI4CLK_REQ#
SATA_CLKREQ#
FSC FSB FSA CPU SRC PCI 1 0 0 0 00 1 1 1
PIN43 PIN44 PIN47 PIN48
DOT96T
27Mout
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Title
Title
Title
Clock Generator
Clock Generator
Clock Generator
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
7
FSB
5
+3.3V_RUN
R144
R144 10K
10K
1 2
PCI_DOCK
+CK_VDD_MAIN2
+CK_VDD_MAIN +CK_VDD_48 +CK_VDD_REF CLK_XTAL_IN
CLK_XTAL_OUT FSA
1K
FSC CLKREFCLK_ICH_14M PCI_SIOCLK_PCI_5035
PCI_PCCARDCLK_PCI_PCCARD PCI_DOCK PCI_TPMCLK_PCI_TPM
CLK_SCLK CLK_SDATA
CLK_XTAL_IN
19
12
C110
C110 33P/50V
33P/50V
U14
U14
1 49 54 65
30 36
12 40 18 20
19 41
R1691KR169
45 23
22 27
32 33 34
43 44
37 39 16
17
15 31 35 21
4 42 68
SMbus address D2
These are for backdrive issue.
CKG_SMBDAT30,42,46
CKG_SMBCLK30,42,46
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4
Add capacitor pads for improving WWAN.
+3.3V_RUN +3.3V_RUN
R166
A A
B B
C C
D D
R166 *10K_NC
*10K_NC
1 2
R154
R154 *10K_NC
*10K_NC
1 2
+3.3V_RUN
Non-iAMT
Enable ITP
10K
10K R152
R152
1 2
PCI_ICH
+3.3V_RUN
L6
L6
1 2
BLM21PG600SN1D
BLM21PG600SN1D
120 ohms@100Mhz
L7
L7
1 2
*BLM21PG600SN1D_NC
*BLM21PG600SN1D_NC
120 ohms@100Mhz
+CK_VDD_MAIN +CK_VDD_MAIN2
1
R153
R153 10K
10K
1 2
PCI_TPMFSA
R148
R148 *10K_NC
*10K_NC
1 2
0=UMA 1 = Disc. GRFX down
12
C159
C159
0.1U/10V
0.1U/10V
R354
R354
1 2
0_0805
0_0805
CLK_ICH_48M21
CPU_MCH_BSEL08,13 CPU_MCH_BSEL18,13 CPU_MCH_BSEL28,13 CLK_SIO_14M43 CLK_ICH_14M21 CLK_PCI_502843 CLK_PCI_503542 CLK_PCI_PCCARD30 CLK_PCI_DOCK44 CLK_PCI_TPM30 CLK_PCI_TPM_CHA40
CLK_PCI_ICH20 CLK_PWRGD21
12
C170
C170
0.1U/10V
0.1U/10V
R348 2.2R348 2.2
1 2
12
C158
C158
0.1U/10V
0.1U/10V
R165 0_0603R165 0_0603
1 2
R110 0_0603R110 0_0603
1 2
C176 *27P/50V_NCC176 *27P/50V_NC C125 *27P/50V_NCC125 *27P/50V_NC C112 *27P/50V_NCC112 *27P/50V_NC C133 *27P/50V_NCC133 *27P/50V_NC C135 *27P/50V_NCC135 *27P/50V_NC C148 *27P/50V_NCC148 *27P/50V_NC C145 *27P/50V_NCC145 *27P/50V_NC C149 *27P/50V_NCC149 *27P/50V_NC C165 *27P/50V_NCC165 *27P/50V_NC
+3.3V_RUN
R140 10KR140 10K
+CK_VDD_MAIN
12
C126
C126
0.1U/10V
0.1U/10V
+CK_VDD_A
+CK_VDD_MAIN2
12
C138
C138
0.1U/10V
0.1U/10V
+CK_VDD_48
12
C169
C169
0.047U/10V
0.047U/10V
+CK_VDD_REF
2
1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2
1 2
CLK_ICH_48M
L8
L8 BLM18AG601SN1D
BLM18AG601SN1D
1 2
CLK_SIO_14M CLK_PCI_5028
CLK_PCI_DOCK
CLK_PCI_ICH PCI_ICH
12
C104
C104
0.1U/10V
0.1U/10V
12
12
C177
C177 *10U/6.3V/0603_NC
*10U/6.3V/0603_NC
12
C172
C172
4.7U/6.3V
4.7U/6.3V
12
C107
C107
0.047U/10V
0.047U/10V
CLK_ICH_48M CLK_SIO_14M CLK_ICH_14M CLK_PCI_5028 CLK_PCI_5035 CLK_PCI_PCCARD CLK_PCI_DOCK CLK_PCI_TPM CLK_PCI_ICH
PCI_PCCARD
R168 33R168 33
1 2
FSA_C
1 2
R128 8.2KR128 8.2K
1 2
R121 22R121 22
1 2
R117 22R117 22
1 2
R129 22R129 22
1 2
R125 22R125 22
1 2
R143 33R143 33 R141 33R141 33 R149 22R149 22 R151 *22_NCR151 *22_NC
1 2
R162 33R162 33
12
C101
C101
0.1U/10V
0.1U/10V
12
C395
C102
C102
0.047U/10V
0.047U/10V
C395
4.7U/6.3V
4.7U/6.3V
3
R167
R167
2.2K_0402
2.2K_0402
12 12 12
12
12
C108
C108 10U/6.3V/0603
10U/6.3V/0603
+3.3V_RUN
12 12 12 12 12 12 12 12
H_STP_PCI# 21 H_STP_CPU# 21
CLK_MCH_BCLK 10 CLK_MCH_BCLK# 10
CLK_CPU_BCLK 8 CLK_CPU_BCLK# 8
CLK_CPU_ITP 8 CLK_CPU_ITP# 8
CLK_PCIE_MINI1 32 CLK_PCIE_MINI1# 32
MINI1CLK_REQ# 32 CLK_PCIE_MINI2 32 CLK_PCIE_MINI2# 32
MINI2CLK_REQ# 32 CLK_PCIE_ICH 20 CLK_PCIE_ICH# 20
CLK_PCIE_MINI3 33 CLK_PCIE_MINI3# 33
MINI3CLK_REQ# 33 CLK_PCIE_LOM 37 CLK_PCIE_LOM# 37
LOM_CLKREQ# 37 CLK_PCIE_EXPCARD 30 CLK_PCIE_EXPCARD# 30
CARD_CLK_REQ# 30 CLK_MCH_3GPLL 10 CLK_MCH_3GPLL# 10
CLK_3GPLLREQ# CLK_PCIE_MINI4 33 CLK_PCIE_MINI4# 33
MINI4CLK_REQ# 33 CLK_PCIE_SATA 19 CLK_PCIE_SATA# 19
SATA_CLKREQ# 21 CLK_PCIE_VGA 27
CLK_PCIE_VGA# 27
1
100
10 1 1
0 1 1
DOT96C
27MSSout
Project Name:
Project Name:
Project Name:
?1A
?1A
?1A
133
1
166
0
200
0
266
0
333
0
400
1
RSVD
96/ 100M_T
SRCT0 SRCC0
330
100 100
33
100
33
100
33
100
33
100
33
100
33
RSVD RSVD
96/ 100M_C
Nike
Nike
Nike
of
of
of
755Wednesday, March 19, 2008
755Wednesday, March 19, 2008
755Wednesday, March 19, 2008
8
NB1
NB1
NB1
1
H_A#[35..3]10
A A
H_ADSTB#010 H_REQ#[0..4]10
54
12
12
R41251R412 51
B B
H_ADSTB#110
H_A20M#19
H_FERR#19
H_IGNNE#19 H_STPCLK#19
H_INTR19 H_NMI19 H_SMI#19
+1.1V_VCCP
R92
R92
1K/F
1K/F
+1.1V_VCCP
1 2
R311:pullup only for quad core.
R91
1% R91
1%
1.91K
1.91K
ES1 -Resistor 412,316,411,406,312,404,405 and 407 are populated ES2 -Resistor 412,316,411 and 406 is not populated,
C C
Resistor 312,404,405 and 407 is populated Dual Core - Resistor 412,316,411,406,312,404,405 and 407 are depopulated
ITP_TDI ITP_TMS ITP_TCK ITP_TDO ITP_TRST#
H_RESET# ITP_DBRESET#
ITP_TCK
D D
CLK_CPU_ITP#7 CLK_CPU_ITP7
R378 27 1%R378 27 1%
R394 649R394 649
H_A#[35..3]10
+1.1V_VCCP
R31651R316 51
54
+1.1V_VCCP
1
H_REQ#[0..4]
12
R41151R411 51
ITP_BPM#1_R ITP_BPM#2_R ITP_BPM#0_R
R4040R404
1 2 1 2
R4050R405
1 2
R3120R312
GTLREF2
R311 51R311 51
ITP_TCK
12
ITP_TRST#
12
0
1 2
12
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16
H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4
H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
0
ITP_BPM#1_RITP_BPM#1
ITP_BPM#0_RITP_BPM#0 H_THERMDA_2_R H_THERMDC_2_R
ITP_BPM#2_RITP_BPM#2
0
12
R39639R396
R39051R390
39
51
R388 0R388 0
1 2
R374 124 1%R374 124 1%
1 2
12
R400
R400 150
150
2
U13A
U13A
J4
A[3]#
L5
A[4]#
L4
A[5]#
K5
A[6]#
M3
A[7]#
N2
A[8]#
J1
A[9]#
N3
A[10]#
P5
A[11]#
P2
A[12]#
L2
A[13]#
P4
A[14]#
P1
A[15]#
R1
A[16]#
M1
ADSTB[0]#
K3
REQ[0]#
H2
REQ[1]#
K2
REQ[2]#
J3
REQ[3]#
L1
REQ[4]#
Y2
A[17]#
U5
A[18]#
R3
A[19]#
W6
A[20]#
U4
A[21]#
Y5
A[22]#
U1
A[23]#
R4
A[24]#
T5
A[25]#
T3
A[26]#
W2
A[27]#
W5
A[28]#
Y4
A[29]#
U2
A[30]#
V4
A[31]#
W3
A[32]#
AA4
A[33]#
AB2
A[34]#
AA3
A[35]#
V1
ADSTB[1]#
A6
A20M#
A5
FERR#
C4
IGNNE#
D5
STPCLK#
C6
LINT0
B4
LINT1
A3
SMI#
M4
RSVD[01]
N5
RSVD[02]
T2
RSVD[03]
V3
RSVD[04]
B2
RSVD[05]
D2
RSVD[06]
D22
RSVD[07]
D3
RSVD[08]
F6
RSVD[09]
Penryn_uFCPGA478
Penryn_uFCPGA478
JITP1
JITP1
1
TDI
2
TMS
5
TCK
7
TDO
3
TRST#
12
RESET#
11
FBO
8
BCLKN
9
BCLKP
10
GND0
14
GND1
16
GND2
18
GND3
20
GND4
22
GND5
2
ADDR
GROUP_0
ADDR
GROUP_0
BPRI#
DEFER#
DRDY# DBSY#
IERR#
LOCK#
CONTROL
CONTROL
RESET#
RS[0]# RS[1]# RS[2]#
TRDY#
HITM#
ADDR GROUP_1
ADDR GROUP_1
BPM[0]# BPM[1]# BPM[2]# BPM[3]#
PRDY# PREQ#
TRST#
XDP/ITP SIGNALS
XDP/ITP SIGNALS
THERMAL
THERMAL
PROCHOT#
THRMDA THRMDC
ICH
ICH
THERMTRIP#
H CLK
H CLK
BCLK[0] BCLK[1]
RESERVED
RESERVED
1 of 4
1 of 4
SYM_REV = 070904GC
SYM_REV = 070904GC
ITP700Flex
ITP700Flex
3
H1
ADS#
E2
BNR#
G5 H5
F21 E1
F1
BR0#
INIT#
HIT#
TCK
TDO TMS
DBR#
p479
TDI
IERR#
D20 B3
H4 C1
F3 F4 G3 G2
G6 E4
ITP_BPM#0
AD4
ITP_BPM#1
AD3
ITP_BPM#2
AD1
ITP_BPM#3
AC4
ITP_BPM#4
AC2
ITP_BPM#5
AC1
ITP_TCK
AC5
ITP_TDI
AA6
ITP_TDO
AB3
ITP_TMS
AB5
ITP_TRST#
AB6 C20
1 2
R582 0R582 0
R32856R328
D21
H_THERMDA
A24
H_THERMDC
B25
H_THERMTRIP#
H_THERMTRIP#
C7
R306 51R306 51
1 2
CLK_CPU_BCLK
A22
CLK_CPU_BCLK#
A21
H_THERMDA H_THERMDC
B1
12
C342
C342 *0.1U_NC
*0.1U_NC
R317 51R317 51
R315 0R315 0
C335
C335
*2200P/50V_NC
*2200P/50V_NC
1 2
1 2
R367 51R367 51
ITP_DBRESET#
53
12
56
1 2
12
C332
C332 *0.1U_NC
*0.1U_NC
H_ADS# 10 H_BNR# 10 H_BPRI# 10
H_DEFER# 10 H_DRDY# 10 H_DBSY# 10
H_BR0# 10
+1.1V_VCCP
H_INIT# 19
H_LOCK# 10
H_RS#0 10
H_RS#1 10
H_RS#2 10
H_TRDY# 10 H_HIT# 10
H_HITM# 10
ITP_BPM#3 9
T134PAD T134PAD T132PAD T132PAD T135PAD T135PAD T133PAD T133PAD
+1.1V_VCCP
H_THERMDA 36
H_THERMDC 36 H_THERMTRIP# 36
+1.1V_VCCP
CLK_CPU_BCLK 7 CLK_CPU_BCLK# 7
H_THERMTRIP#
H_THERMDA
H_THERMDC
12
C333
C333 *0.1U/10V_NC
*0.1U/10V_NC
Populate ITP700Flex for bringup
Layout Note: Place couple 0.1uF Decoupling caps with in 0.1" ITP connector.
+1.1V_VCCP +3.3V_SUS
C376 0.1U/10VC376 0.1U/10V
VTT0 VTT1
VTAP
DBR#
DBA#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
NC0
NC1 GND_0 GND_1
27 28 26
25 24
ITP_BPM#0
23
ITP_BPM#1
21
ITP_BPM#2
19
ITP_BPM#3
17
ITP_BPM#4
15
ITP_BPM#5
13 4 6 29 30
12
C391 0.1U/10VC391 0.1U/10V
12
3
R350 10K_0402R350 10K_0402
T17PAD T17PAD
H_RESET#H_RESET#R
12
+1.1V_VCCP
ITP_DBRESET# 21,43
12
54
T136PAD T136PAD
4
+1.1V_VCCP
12
R326
R326 *62_NC
*62_NC
12
C344
C344 *0.1U_NC
*0.1U_NC
Layout Note: Place voltage divider within
0.5" of GTLREF pin
GTLREF2
BSS138_NL
BSS138_NL
Q48
Q48
Layout Note: Place R421 close to CPU.
H_RESET# 10
+1.1V_VCCP
1 2
1 2
3
1
MMST3904-7-F
MMST3904-7-F
R393
R393 1K/F
1K/F
R398
R398 2K/F
2K/F
2
+3.3V_RUN
1 2
Q49
Q49
1 3
R324
R324 100K_0402
100K_0402
2
R331 10KR331 10K
CLK_CPU_BCLK
R113
R113 100
100
1%
1%
1 2
CLK_CPU_BCLK#
5
H_D#[63..0]10
H_DSTBN#010 H_DSTBP#010 H_DINV#010
H_D#[63..0]10
H_DSTBN#110 H_DSTBP#110 H_DINV#110
CPU_MCH_BSEL07,13 CPU_MCH_BSEL17,13 CPU_MCH_BSEL27,13
+3.3V_ALW
12
12
T28
T28
PAD
PAD
T15
T15
PAD
PAD
T14
T14
PAD
PAD
R327
R327 100K_0402
100K_0402
42
H_THERMDA_2_R H_THERMDC_2_R
T137
T137 T138
T138
PAD
PAD PAD
PAD
ITP700 layout guidelines
Signal Resistor Value Connect To Resistor Placement
TDI
150 ohm ± 5%
TMS
39 ohm ± 1% 500 to 680
TRST#
ohm ± 5%
27 ohm ± 1%
TCK
TDO
51 ohm ± 5% Place the pull-up near ITP
22.6 ohm ± 1% series resistor
RESET# VCCP
and pullup 51 ohm ± 1%.
http://hobi-elektronika.net
4
VCCP
Place the pull-up near CPU Within 200ps of ITP connector
VCCP
Place the pull-down near CPU
GND
Connect to TCK pin of CPU and then connect it to FBO pin of ITP connector
GND
in daisy chain. Place the pull-down near TCK0 pin of ITP connector
VCCP
Connect to CPURST# pin of GMCH through the series resistor placed within 200ps of ITP connector. Place the pull-up after the series resistor from ITP connector.
5
6
U13B
E22
D[0]#
F24
D[1]#
E26
D[2]#
G22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
D[7]#
K24
D[8]#
G24
D[9]#
J24
D[10]#
J23
D[11]#
H22
D[12]#
F26
D[13]#
K22
D[14]#
H23
D[15]#
J26
DSTBN[0]#
H26
DSTBP[0]#
H25
DINV[0]#
N22
D[16]#
K25
D[17]#
P26
D[18]#
R23
D[19]#
L23
D[20]#
M24
D[21]#
L22
D[22]#
M23
D[23]#
P25
D[24]#
P23
D[25]#
P22
D[26]#
T24
D[27]#
R24
D[28]#
L25
D[29]#
T25
D[30]#
N25
D[31]#
L26
DSTBN[1]#
M26
DSTBP[1]#
N24
DINV[1]#
AD26
GTLREF
C23
TEST1
D25
TEST2
C24
TEST3
AF26
TEST4
AF1
TEST5
A26
TEST6
C3
TEST7
B22
BSEL[0]
B23
BSEL[1]
C21
BSEL[2]
Penryn_uFCPGA478
Penryn_uFCPGA478
CPU_TEST1 CPU_TEST2
6
U13B
SYM_REV = 070904GC
SYM_REV = 070904GC
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15
H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31
V_CPU_GTLREF CPU_TEST1 CPU_TEST2 CPU_TEST3 CPU_TEST4 CPU_TEST5 CPU_TEST6 CPU_TEST7
R298 *1K/F_NCR298 *1K/F_NC
1 2
R325 *1K/F_NCR325 *1K/F_NC
1 2
Place C close to the CPU_TEST4 pin. Make sure CPU_TEST4 routing is reference to GND and away from other noisy signal.
QUAD_GTLREF_EN 43
7
D[32]# D[33]# D[34]#
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
D[35]# D[36]# D[37]# D[38]# D[39]# D[40]# D[41]# D[42]#
DATA GRP 2DATA GRP 3
DATA GRP 2DATA GRP 3
D[43]# D[44]# D[45]# D[46]#
D[47]# DSTBN[2]# DSTBP[2]#
DINV[2]#
D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]# DSTBN[3]# DSTBP[3]#
DINV[3]# COMP[0]
MISC
MISC
COMP[1] COMP[2] COMP[3]
DPRSTP#
DPSLP#
DPWR#
PWRGOOD
SLP#
PSI#
2 of 4
2 of 4
T16
T16
PAD
PAD
T30
T30
PAD
PAD
For the purpose of testability, route these signals through a ground referenced Z0 = 55ohm trace that ends in a via that is near a GND via and is accessible through an oscilloscope connection.
FSB 533 0 0 667 800
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
H_D#33
AB24
H_D#34
V24
H_D#35
V26
H_D#36
V23
H_D#37
T22
H_D#38
U25
H_D#39
U23
H_D#40
Y25
H_D#41
W22
H_D#42
Y23
H_D#43
W24
H_D#44
W25
H_D#45
AA23
H_D#46
AA24
H_D#47
AB25 Y26 AA26 U22
H_D#48
AE24
H_D#49
AD24
H_D#50
AA21
H_D#51
AB22
H_D#52
AB21
H_D#53
AC26
H_D#54
AD20
H_D#55
AE22
H_D#56
AF23
H_D#57
AC25
H_D#58
AE21
H_D#59
AD21
H_D#60
AC22
H_D#61
AD23
H_D#62
AF22
H_D#63
AC23 AE25 AF24 AC20
COMP0
R26
COMP1
U26
COMP2
AA1
COMP3
Y1 E5
B5
H_DPWR#
D24
H_PWRGOOD
D6 D7 AE6
CPU_TEST3 CPU_TEST5
BSEL2 BSEL1 BSEL0
BCLK
133 166
0
200
COMP0 COMP1 COMP2 COMP3
Comp0,2 connect with Zo=27.4ohm,Comp1,3 connect with Zo=55ohm, make those traces length shorter than 0.5".Trace should be at least 25 mils away from any other toggling signal.
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Penryn (1 of 2)
Penryn (1 of 2)
Penryn (1 of 2)
?1A
?1A
?1A
7
H_D#32
Y22
H_D#[63..0] 10
H_DSTBN#2 10 H_DSTBP#2 10 H_DINV#2 10
H_D#[63..0] 10
H_DPWR#
DPWR# pulled low to enable input buffers.
H_PWRGOOD
H_DSTBN#3 10 H_DSTBP#3 10 H_DINV#3 10
Note: H_DPRTSTP need to daisy chain from ICH8 to IMVP6 to CPU.
H_DPRSTP# 13,19,51 H_DPSLP# 19
H_PWRGOOD 19 H_CPUSLP# 13 H_PSI# 51
12
C343
C343 *0.1U_NC
*0.1U_NC
1 1
1
00
1
R361
R361
R383
R383
R376
R376
49.9
49.9
1 2
Project Name:
Project Name:
Project Name:
49.9
49.9
24.9
24.9
1 2
1 2
Nike
Nike
Nike
855Wednesday, March 19, 2008
855Wednesday, March 19, 2008
855Wednesday, March 19, 2008
8
12
R100
R100
24.9
24.9
1%
1%
R349
R349
24.9
24.9
1 2
NB1
NB1
NB1
of
of
of
8
1
2
3
4
5
6
7
8
All use 22U 10V(+-20%,X5R,1210)Pb-Free.
+VCC_CORE
C72
C72 10U/4V/X6S
10U/4V/X6S
C116
C116 10U/4V/X6S
10U/4V/X6S
C353
C353
0.1U/10V
0.1U/10V
12
CC0805
CC0805
12
CC0805
CC0805
12
0805
0805
12
0805
0805
12
0805
0805
12
0805
0805
12
C68
C68 10U/4V/X6S
10U/4V/X6S
C67
C67 10U/4V/X6S
10U/4V/X6S
C416
C416 10U/4V/X6S
10U/4V/X6S
C122
C122 10U/4V/X6S
10U/4V/X6S
C71
C71 10U/4V/X6S
10U/4V/X6S
C121
C121 10U/4V/X6S
10U/4V/X6S
C366
C366
0.1U/10V
0.1U/10V
12
A A
CC0805
CC0805
+VCC_CORE
12
CC0805
CC0805
8 inside cavity, north side, secondary layer.
+VCC_CORE
12
0805
0805
B B
C C
D D
+VCC_CORE
12
0805
0805
8 inside cavity, south side, secondary layer.
+VCC_CORE
12
0805
0805
6 inside cavity, north side, primary layer.
+VCC_CORE
12
0805
0805
6 inside cavity, south side, primary layer.
+1.1V_VCCP
12
Layout out: Place these inside socket cavity on North side secondary.
C361
C361 10U/4V/X6S
10U/4V/X6S
C355
C355 10U/4V/X6S
10U/4V/X6S
C411
C411 10U/4V/X6S
10U/4V/X6S
C414
C414 10U/4V/X6S
10U/4V/X6S
C74
C74 10U/4V/X6S
10U/4V/X6S
C120
C120 10U/4V/X6S
10U/4V/X6S
C398
C398
0.1U/10V
0.1U/10V
12
CC0805
CC0805
12
CC0805
CC0805
12
0805
0805
12
0805
0805
12
0805
0805
12
0805
0805
12
C360
C360 10U/4V/X6S
10U/4V/X6S
C359
C359 10U/4V/X6S
10U/4V/X6S
C412
C412 10U/4V/X6S
10U/4V/X6S
C410
C410 10U/4V/X6S
10U/4V/X6S
C69
C69 10U/4V/X6S
10U/4V/X6S
C119
C119 10U/4V/X6S
10U/4V/X6S
C397
C397
0.1U/10V
0.1U/10V
12
CC0805
CC0805
12
CC0805
CC0805
12
0805
0805
12
0805
0805
12
0805
0805
12
0805
0805
12
C358
C358 10U/4V/X6S
10U/4V/X6S
C357
C357 10U/4V/X6S
10U/4V/X6S
C415
C415 10U/4V/X6S
10U/4V/X6S
C408
C408 10U/4V/X6S
10U/4V/X6S
C70
C70 10U/4V/X6S
10U/4V/X6S
C118
C118 10U/4V/X6S
10U/4V/X6S
C354
C354
0.1U/10V
0.1U/10V
12
CC0805
CC0805
12
CC0805
CC0805
12
0805
0805
12
0805
0805
12
0805
0805
12
0805
0805
12
C362
C362 10U/4V/X6S
10U/4V/X6S
C356
C356 10U/4V/X6S
10U/4V/X6S
C413
C413 10U/4V/X6S
10U/4V/X6S
C409
C409 10U/4V/X6S
10U/4V/X6S
C73
C73 10U/4V/X6S
10U/4V/X6S
C117
C117 10U/4V/X6S
10U/4V/X6S
C367
C367
0.1U/10V
0.1U/10V
0805
0805
0805
0805
12
12
12
+VCC_CORE +VCC_CORE
54
A7
VCC[001]
A9
VCC[002]
A10
VCC[003]
A12
VCC[004]
A13
VCC[005]
A15
VCC[006]
A17
VCC[007]
A18
VCC[008]
A20
VCC[009]
B7
VCC[010]
B9
VCC[011]
B10
VCC[012]
B12
VCC[013]
B14
VCC[014]
B15
VCC[015]
B17
VCC[016]
B18
VCC[017]
B20
VCC[018]
C9
VCC[019]
C10
VCC[020]
C12
VCC[021]
C13
VCC[022]
C15
VCC[023]
C17
VCC[024]
C18
VCC[025]
D9
VCC[026]
D10
VCC[027]
D12
VCC[028]
D14
VCC[029]
D15
VCC[030]
D17
VCC[031]
D18
VCC[032]
E7
VCC[033]
E9
VCC[034]
E10
VCC[035]
E12
VCC[036]
E13
VCC[037]
E15
VCC[038]
E17
VCC[039]
E18
VCC[040]
E20
VCC[041]
F7
VCC[042]
F9
VCC[043]
F10
VCC[044]
F12
VCC[045]
F14
VCC[046]
F15
VCC[047]
F17
VCC[048]
F18
VCC[049]
F20
VCC[050]
AA7
VCC[051]
AA9
VCC[052]
AA10
VCC[053]
AA12
VCC[054]
AA13
VCC[055]
AA15
VCC[056]
AA17
VCC[057]
AA18
VCC[058]
AA20
VCC[059]
AB9
VCC[060]
AC10
VCC[061]
AB10
VCC[062]
AB12
VCC[063]
AB14
VCC[064]
AB15
VCC[065]
AB17
VCC[066]
AB18
VCC[067]
Penryn_uFCPGA478
Penryn_uFCPGA478
U13C
U13C
VCC[068] VCC[069] VCC[070] VCC[071] VCC[072] VCC[073] VCC[074] VCC[075] VCC[076] VCC[077] VCC[078] VCC[079] VCC[080] VCC[081] VCC[082] VCC[083] VCC[084] VCC[085] VCC[086] VCC[087] VCC[088] VCC[089] VCC[090] VCC[091] VCC[092] VCC[093] VCC[094] VCC[095] VCC[096] VCC[097] VCC[098] VCC[099] VCC[100]
VCCP[01] VCCP[02] VCCP[03] VCCP[04] VCCP[05] VCCP[06] VCCP[07] VCCP[08] VCCP[09] VCCP[10] VCCP[11] VCCP[12] VCCP[13] VCCP[14] VCCP[15] VCCP[16]
VCCA[01] VCCA[02]
VCCSENSE
VSSSENSE
3 of 4
3 of 4
SYM_REV = 070904GC
SYM_REV = 070904GC
VID[0] VID[1] VID[2] VID[3] VID[4] VID[5] VID[6]
AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20
G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21
B26 C26
AD6 AF5 AE5 AF4 AE3 AF3 AE2
AF7
AE7
.
.
Pins AA7, AA8, AC8, D8 need to be NC for QC
VCCSENSE
VSSSENSE
Pins AA7, AA8, AC8, D8 need to be NC for QC
Pin F8 - Dual core: GND, Quad core: Floating
+1.1V_VCCP
55
12
+
+
C396
C396 270U
270U
2
2 ±20
±20 7343
7343 12m
12m
VID0 51 VID1 51 VID2 51 VID3 51 VID4 51 VID5 51 VID6 51
VCCSENSE 51
VSSSENSE 51
QUAD_CORE_DET43
и
и
+1.5V_RUN
12
C341
C341
0.01U/25V
0.01U/25V
Layout Note: Place C105 near PIN B26.
+VCC_CORE
12
VCCSENSE VSSSENSE
12
Route VCCSENSE and VSSSENSE traces at 27.4ohms and length matched to within 25 mil. Place PU and PD within 2 inch of CPU.
12
R172
R172 100/F
100/F
R171
R171 100/F
100/F
C339
C339 10U/4V
10U/4V
+3.3V_ALW
12
54
R380
R380 100K_0402
100K_0402
U13D
U13D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080] VSS[081]P3VSS[162]
4 of 4
4 of 4
SYM_REV = 070904GC
SYM_REV = 070904GC
Penryn_uFCPGA478
Penryn_uFCPGA478
ITP_BPM#38
P6
VSS[082]
P21
VSS[083]
P24
VSS[084]
R2
VSS[085]
R5
VSS[086]
R22
VSS[087]
R25
VSS[088]
T1
VSS[089]
T4
VSS[090]
T23
VSS[091]
T26
VSS[092]
U3
VSS[093]
U6
VSS[094]
U21
VSS[095]
U24
VSS[096]
V2
VSS[097]
V5
VSS[098]
V22
VSS[099]
V25
VSS[100]
W1
VSS[101]
W4
VSS[102]
W23
VSS[103]
W26
VSS[104]
Y3
VSS[105]
Y6
VSS[106]
Y21
VSS[107]
Y24
VSS[108]
AA2
VSS[109]
AA5
VSS[110]
AA8
VSS[111]
AA11
VSS[112]
AA14
VSS[113]
AA16
VSS[114]
AA19
VSS[115]
AA22
VSS[116]
AA25
VSS[117]
AB1
VSS[118]
AB4
VSS[119]
AB8
VSS[120]
AB11
VSS[121]
AB13
VSS[122]
AB16
VSS[123]
AB19
VSS[124]
AB23
VSS[125]
AB26
VSS[126]
AC3
VSS[127]
AC6
VSS[128]
AC8
VSS[129]
AC11
VSS[130]
AC14
VSS[131]
AC16
VSS[132]
AC19
VSS[133]
AC21
VSS[134]
AC24
VSS[135]
AD2
VSS[136]
AD5
VSS[137]
AD8
VSS[138]
AD11
VSS[139]
AD13
VSS[140]
AD16
VSS[141]
AD19
VSS[142]
AD22
VSS[143]
AD25
VSS[144]
AE1
VSS[145]
AE4
VSS[146]
AE8
VSS[147]
AE11
VSS[148]
AE14
VSS[149]
AE16
VSS[150]
AE19
VSS[151]
AE23
VSS[152]
AE26
VSS[153]
A2
VSS[154]
AF6
VSS[155]
AF8
VSS[156]
AF11
VSS[157]
AF13
VSS[158]
AF16
VSS[159]
AF19
VSS[160]
AF21
VSS[161]
A25 AF25
VSS[163]
.
.
54
R407 0R407 0
1 2
+1.1V_VCCP
12
ITP_BPM#3_RITP_BPM#3 ITP_BPM#3_R
Pins AA7, AA8, AC8, D8 need to be NC for QC
54
54
ITP_BPM#3_R
R40651R406 51
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Project Name:
Project Name:
Title
Title
Title
Penryn (2 of 2)
Penryn (2 of 2)
Penryn (2 of 2)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
1
2
3
http://hobi-elektronika.net
4
5
6
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Project Name:
?1A
?1A
?1A
7
Nike
Nike
Nike
955Wednesday, March 19, 2008
955Wednesday, March 19, 2008
955Wednesday, March 19, 2008
NB1
NB1
NB1
of
of
of
8
1
H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8
H_A#9 H_A#10 H_A#11 H_A#12
H_REQ#08 H_REQ#18 H_REQ#28 H_REQ#38 H_REQ#48
H_ADSTB#08 H_ADSTB#18
H_DSTBP#08 H_DSTBN#08
H_DINV#08 H_DSTBP#18 H_DSTBN#18
H_DINV#18 H_DSTBP#28 H_DSTBN#28
H_DINV#28 H_DSTBP#38 H_DSTBN#38
H_DINV#38
H_ADS#8
H_TRDY#8
H_DRDY#8
H_DEFER#8
H_HITM#8
H_HIT#8
H_LOCK#8
H_BNR#8
H_BPRI#8
H_DBSY#8
H_RS#08 H_RS#18 H_RS#28
1 2
R108 0R108 0
H_BR0#8
H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35
FSB_CPURSTB
A A
B B
C C
H_RESET#8
2
U17A
U17A
L36
FSB_AB_3
L37
FSB_AB_4
J38
FSB_AB_5
F40
FSB_AB_6
H39
FSB_AB_7
L38
FSB_AB_8
L43
FSB_AB_9
N39
FSB_AB_10
N35
FSB_AB_11
N37
FSB_AB_12
J41
FSB_AB_13
N40
FSB_AB_14
M45
FSB_AB_15
R35
FSB_AB_16
T36
FSB_AB_17
R36
FSB_AB_18
R34
FSB_AB_19
R37
FSB_AB_20
R39
FSB_AB_21
U38
FSB_AB_22
T37
FSB_AB_23
U34
FSB_AB_24
U40
FSB_AB_25
T34
FSB_AB_26
Y36
FSB_AB_27
U35
FSB_AB_28
AA35
FSB_AB_29
U37
FSB_AB_30
Y37
FSB_AB_31
Y34
FSB_AB_32
Y38
FSB_AB_33
AA37
FSB_AB_34
AA36
FSB_AB_35
G38
FSB_REQB_0
K35
FSB_REQB_1
J39
FSB_REQB_2
C43
FSB_REQB_3
G39
FSB_REQB_4
J40
FSB_ADSTBB_0
T39
FSB_ADSTBB_1
C39
FSB_DSTBPB_0
B39
FSB_DSTBNB_0
B40
FSB_DINVB_0
K31
FSB_DSTBPB_1
J31
FSB_DSTBNB_1
F33
FSB_DINVB_1
J25
FSB_DSTBPB_2
K25
FSB_DSTBNB_2
F26
FSB_DINVB_2
C32
FSB_DSTBPB_3
D32
FSB_DSTBNB_3
D30
FSB_DINVB_3
J42
FSB_ADSB
L40
FSB_TRDYB
J43
FSB_DRDYB
G44
FSB_DEFERB
K44
FSB_HITMB
H45
FSB_HITB
H40
FSB_LOCKB
L42
FSB_BREQ0B
J44
FSB_BNRB
H37
FSB_BPRIB
H42
FSB_DBSYB
G43
FSB_RSB_0
L44
FSB_RSB_1
G42
FSB_RSB_2
D27
FSB_CPURSTB
N25
RSVD_05
EAGLELAKE_FCBGA1254
EAGLELAKE_FCBGA1254
EAGLELAKE_DDR3
EAGLELAKE_DDR3
SYM_REV = 1.5GC
SYM_REV = 1.5GC
FSB
FSB
1 OF 9
1 OF 9
3
FSB_DB_0 FSB_DB_1 FSB_DB_2 FSB_DB_3 FSB_DB_4 FSB_DB_5 FSB_DB_6 FSB_DB_7 FSB_DB_8
FSB_DB_9 FSB_DB_10 FSB_DB_11 FSB_DB_12 FSB_DB_13 FSB_DB_14 FSB_DB_15 FSB_DB_16 FSB_DB_17 FSB_DB_18 FSB_DB_19 FSB_DB_20 FSB_DB_21 FSB_DB_22 FSB_DB_23 FSB_DB_24 FSB_DB_25 FSB_DB_26 FSB_DB_27 FSB_DB_28 FSB_DB_29 FSB_DB_30 FSB_DB_31 FSB_DB_32 FSB_DB_33 FSB_DB_34 FSB_DB_35 FSB_DB_36 FSB_DB_37 FSB_DB_38 FSB_DB_39 FSB_DB_40 FSB_DB_41 FSB_DB_42 FSB_DB_43 FSB_DB_44 FSB_DB_45 FSB_DB_46 FSB_DB_47 FSB_DB_48 FSB_DB_49 FSB_DB_50 FSB_DB_51 FSB_DB_52 FSB_DB_53 FSB_DB_54 FSB_DB_55 FSB_DB_56 FSB_DB_57 FSB_DB_58 FSB_DB_59 FSB_DB_60 FSB_DB_61 FSB_DB_62 FSB_DB_63
FSB_SWING
FSB_RCOMP
FSB_DVREF
FSB_ACCVREF
HPL_CLKINP HPL_CLKINN
F44 C44 D44 C41 E43 B43 D40 B42 B38 F38 A38 B37 D38 C37 D37 B36 E37 J35 H35 F37 G37 J33 L33 G33 L31 M31 M30 J30 G31 K30 M29 G30 J29 F29 H29 L25 K26 L29 J26 M26 H26 F25 F24 G25 H24 L24 J24 N24 C28 B31 F35 C35 B35 D35 D31 A34 B32 F31 D28 A29 C30 B30 E27 B28
B24 A23
C22 B23
P29 P30
H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8
H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63
H_SWING H_RCOMP
H_REF
4
H_D#[63..0] 8H_A#[35..3]8
CLK_MCH_BCLK 7 CLK_MCH_BCLK# 7
DMI_MRX_ITX_P020 DMI_MRX_ITX_N020 DMI_MRX_ITX_P120 DMI_MRX_ITX_N120 DMI_MRX_ITX_P220 DMI_MRX_ITX_N220 DMI_MRX_ITX_P320 DMI_MRX_ITX_N320
CLK_MCH_3GPLL7
CLK_MCH_3GPLL#7
5
PCIE_MRX_GTX_N[15..0]27 PCIE_MRX_GTX_P[15..0]27
PCIE_MRX_GTX_N0 PCIE_MRX_GTX_N1 PCIE_MRX_GTX_N2 PCIE_MRX_GTX_N3 PCIE_MRX_GTX_N4 PCIE_MRX_GTX_N5 PCIE_MRX_GTX_N6 PCIE_MRX_GTX_N7 PCIE_MRX_GTX_N8 PCIE_MRX_GTX_N9 PCIE_MRX_GTX_N10 PCIE_MRX_GTX_N11 PCIE_MRX_GTX_N12 PCIE_MRX_GTX_N13 PCIE_MRX_GTX_N14 PCIE_MRX_GTX_N15
PCIE_MRX_GTX_P0 PCIE_MRX_GTX_N0 PCIE_MRX_GTX_P1 PCIE_MRX_GTX_N1 PCIE_MRX_GTX_P2 PCIE_MRX_GTX_N2 PCIE_MRX_GTX_P3 PCIE_MRX_GTX_N3 PCIE_MRX_GTX_P4 PCIE_MRX_GTX_N4 PCIE_MRX_GTX_P5 PCIE_MRX_GTX_N5 PCIE_MRX_GTX_P6 PCIE_MRX_GTX_N6 PCIE_MRX_GTX_P7 PCIE_MRX_GTX_N7 PCIE_MRX_GTX_P8 PCIE_MRX_GTX_N8 PCIE_MRX_GTX_P9 PCIE_MRX_GTX_N9 PCIE_MRX_GTX_P10 PCIE_MRX_GTX_N10 PCIE_MRX_GTX_P11 PCIE_MRX_GTX_N11 PCIE_MRX_GTX_P12 PCIE_MRX_GTX_N12 PCIE_MRX_GTX_P13 PCIE_MRX_GTX_N13 PCIE_MRX_GTX_P14 PCIE_MRX_GTX_N14 PCIE_MRX_GTX_P15 PCIE_MRX_GTX_N15
T59 PADT59 PAD
N10
R10 U10
AA9
AA10
AA7 AA6
AB10
AB9 AB3
AA2 AD10 AD11
AD7
AD8
AE9 AE10
AE6
AE7
AF9
AF8
G13 AB13
AD13
F6
G7
H6
G4
J6 J7 L6 L7 N9
N7 N6 R7 R6 R9
U9 U6 U7
R4 P4
D9 E9
J13
U17B
U17B
PEG_RXP_0 PEG_RXN_0 PEG_RXP_1 PEG_RXN_1 PEG_RXP_2 PEG_RXN_2 PEG_RXP_3 PEG_RXN_3 PEG_RXP_4 PEG_RXN_4 PEG_RXP_5 PEG_RXN_5 PEG_RXP_6 PEG_RXN_6 PEG_RXP_7 PEG_RXN_7 PEG_RXP_8 PEG_RXN_8 PEG_RXP_9 PEG_RXN_9 PEG_RXP_10 PEG_RXN_10 PEG_RXP_11 PEG_RXN_11 PEG_RXP_12 PEG_RXN_12 PEG_RXP_13 PEG_RXN_13 PEG_RXP_14 PEG_RXN_14 PEG_RXP_15 PEG_RXN_15
DMI_RXP_0 DMI_RXN_0 DMI_RXP_1 DMI_RXN_1 DMI_RXP_2 DMI_RXN_2 DMI_RXP_3 DMI_RXN_3
EXP_CLKP EXP_CLKN
SDVO_CTRLDATA SDVO_CTRLCLK
RSVD_23 RSVD_22
EAGLELAKE_FCBGA1254
EAGLELAKE_FCBGA1254
EAGLELAKE_DDR3
EAGLELAKE_DDR3
SYM_REV = 1.5GC
SYM_REV = 1.5GC
PCIE_MRX_GTX_P0 PCIE_MRX_GTX_P1 PCIE_MRX_GTX_P2 PCIE_MRX_GTX_P3 PCIE_MRX_GTX_P4 PCIE_MRX_GTX_P5 PCIE_MRX_GTX_P6 PCIE_MRX_GTX_P7 PCIE_MRX_GTX_P8 PCIE_MRX_GTX_P9 PCIE_MRX_GTX_P10 PCIE_MRX_GTX_P11 PCIE_MRX_GTX_P12 PCIE_MRX_GTX_P13 PCIE_MRX_GTX_P14 PCIE_MRX_GTX_P15
PCIE
PCIE
DMI
DMI
2 OF 9
2 OF 9
6
PEG_TXP_0 PEG_TXN_0 PEG_TXP_1 PEG_TXN_1 PEG_TXP_2 PEG_TXN_2 PEG_TXP_3 PEG_TXN_3 PEG_TXP_4 PEG_TXN_4 PEG_TXP_5 PEG_TXN_5 PEG_TXP_6 PEG_TXN_6 PEG_TXP_7 PEG_TXN_7 PEG_TXP_8 PEG_TXN_8 PEG_TXP_9
PEG_TXN_9 PEG_TXP_10 PEG_TXN_10 PEG_TXP_11 PEG_TXN_11 PEG_TXP_12 PEG_TXN_12 PEG_TXP_13 PEG_TXN_13 PEG_TXP_14 PEG_TXN_14 PEG_TXP_15 PEG_TXN_15
DMI_TXP_0 DMI_TXN_0 DMI_TXP_1 DMI_TXN_1 DMI_TXP_2 DMI_TXN_2 DMI_TXP_3 DMI_TXN_3
EXP_RCOMPO
EXP_COMPI
EXP_ICOMPO
EXP_RBIAS
PCIE_MTX_GRX_P0
C11
PCIE_MTX_GRX_N0
B11
PCIE_MTX_GRX_P1
A10
PCIE_MTX_GRX_N1
B9
PCIE_MTX_GRX_P2
C9
PCIE_MTX_GRX_N2
D8
PCIE_MTX_GRX_P3
B8
PCIE_MTX_GRX_N3
C7
PCIE_MTX_GRX_P4
B7
PCIE_MTX_GRX_N4
B6
PCIE_MTX_GRX_P5
B3
PCIE_MTX_GRX_N5
B4
PCIE_MTX_GRX_P6
D2
PCIE_MTX_GRX_N6
C2
PCIE_MTX_GRX_P7
H2
PCIE_MTX_GRX_N7
G2
PCIE_MTX_GRX_P8
J2
PCIE_MTX_GRX_N8
K2
PCIE_MTX_GRX_P9
K1
PCIE_MTX_GRX_N9
L2
PCIE_MTX_GRX_P10
P2
PCIE_MTX_GRX_N10
M2
PCIE_MTX_GRX_P11
T2
PCIE_MTX_GRX_N11
R1
PCIE_MTX_GRX_P12
U2
PCIE_MTX_GRX_N12
V2
PCIE_MTX_GRX_P13
W4
PCIE_MTX_GRX_N13
V3
PCIE_MTX_GRX_P14
AA4
PCIE_MTX_GRX_N14
Y4
PCIE_MTX_GRX_P15
AC1
PCIE_MTX_GRX_N15
AB2 AC2
AD2 AD4 AE4 AE2 AF2 AF4 AG4
Y7
GRCOMP
Y8 Y6
GRBIAS
AG1
7
PCIE_MTX_GRX_N0 PCIE_MTX_GRX_N1 PCIE_MTX_GRX_N2 PCIE_MTX_GRX_N3 PCIE_MTX_GRX_N4 PCIE_MTX_GRX_N5 PCIE_MTX_GRX_N6 PCIE_MTX_GRX_N7 PCIE_MTX_GRX_N8 PCIE_MTX_GRX_N9 PCIE_MTX_GRX_N10 PCIE_MTX_GRX_N11 PCIE_MTX_GRX_N12 PCIE_MTX_GRX_N13 PCIE_MTX_GRX_N14 PCIE_MTX_GRX_N15
DMI_MTX_IRX_P0 20
DMI_MTX_IRX_N0 20
DMI_MTX_IRX_P1 20
DMI_MTX_IRX_N1 20
DMI_MTX_IRX_P2 20
DMI_MTX_IRX_N2 20
DMI_MTX_IRX_P3 20
DMI_MTX_IRX_N3 20
1 2
R402 49.9
R402 49.9
1 2
R446 750
R446 750
1%
1%
1%
1%
PCIE_MTX_GRX_P[15..0]27PCIE_MTX_GRX_N[15..0]27
+1.1V_VCCP
8
PCIE_MTX_GRX_P0 PCIE_MTX_GRX_P1 PCIE_MTX_GRX_P2 PCIE_MTX_GRX_P3 PCIE_MTX_GRX_P4 PCIE_MTX_GRX_P5 PCIE_MTX_GRX_P6 PCIE_MTX_GRX_P7 PCIE_MTX_GRX_P8 PCIE_MTX_GRX_P9 PCIE_MTX_GRX_P10 PCIE_MTX_GRX_P11 PCIE_MTX_GRX_P12 PCIE_MTX_GRX_P13 PCIE_MTX_GRX_P14 PCIE_MTX_GRX_P15
+1.1V_VCCP 8,9,13,14,16,17,19,22,36,48,51,53
+1.1V_VCCP
12
+1.1V_VCCP
12
R103
R103 301
D D
H_RCOMP
12
R104
R104
16.5 1%
16.5 1%
Layout Note: H_RCOMP trace should be 10-mil wide with 20-mil spacing.
1
301
1%
1%
R106 49.9 1%R106 49.9 1%
12
R107
R107 100
100
1%
1%
1 2
12
C89
C89
0.1U
0.1U
16
16 ±10
±10
и
и
X5R
X5R
2
H_SWING
H_REF
3
12
C96
C96
0.1U
0.1U
16
16
и
и
±10
±10 X5R
X5R
R101 51 5%R101 51 5%
1 2
C83
C83 *220P/50V_NC
*220P/50V_NC
1 2
Layout Note: Place the 0.1 uF decoupling capacitor within 100 mils from GMCH pins.
C79
C79 1U
1U
±20
±20
и
и
10
10 X5R
X5R
http://hobi-elektronika.net
4
R102
R102
57.6
57.6
1%
1% 0603
0603
12
12
R105
R105 100
100
1%
1%
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
5
6
Date: Sheet
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Project Name:
Project Name:
Eaglelake(1 of 10)
Eaglelake(1 of 10)
Eaglelake(1 of 10)
7
Project Name:
?1A
?1A
?1A
Nike
Nike
Nike
NB1
NB1
NB1
of
of
of
10 55Wednesday, March 19, 2008
10 55Wednesday, March 19, 2008
10 55Wednesday, March 19, 2008
8
1
A A
B B
C C
D D
1
2
DDR_A_MA[14..0]12,23,24
DDR_A_CAS#23,24 DDR_A_RAS#23,24
DDR_A_BS023,24 DDR_A_BS123,24 DDR_A_BS223,24
DDR_CS0_DIMMA#24 DDR_CS2_DIMMA#23
DDR_CS3_DIMMA#23 DDR_CKE0_DIMMA24
DDR_CKE1_DIMMA24 DDR_CKE2_DIMMA23 DDR_CKE3_DIMMA23
M_ODT_A024 M_ODT_A124 M_ODT_A223 M_ODT_A323
M_CLK_DDRA024
M_CLK_DDRA#024
M_CLK_DDRA224
M_CLK_DDRA#224
M_CLK_DDRA323
M_CLK_DDRA#323
M_CLK_DDRA523
M_CLK_DDRA#523
2
3
DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8
DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14
DDR_A_CAS#
DDR_A_RAS#
DDR_A_BS0
DDR_A_BS1
DDR_A_BS2
M_ODT_A0 M_ODT_A1 M_ODT_A2 M_ODT_A3
3
U17C
U17C
BC41
DDR_A_MA_0
BC35
DDR_A_MA_1
BB32
DDR_A_MA_2
BC32
DDR_A_MA_3
BD32
DDR_A_MA_4
BB31
DDR_A_MA_5
AY31
DDR_A_MA_6
BA31
DDR_A_MA_7
BD31
DDR_A_MA_8
BD30
DDR_A_MA_9
AW43
DDR_A_MA_10
BC30
DDR_A_MA_11
BB30
DDR_A_MA_12
AM42
DDR_A_MA_13
BD28
DDR_A_MA_14
AW42
DDR_A_WEB
AU42
DDR_A_CASB
AV42
DDR_A_RASB
AV45
DDR_A_BS_0
AY44
DDR_A_BS_1
BC28
DDR_A_BS_2
AU43
DDR_A_CSB_0
AR40
DDR_A_CSB_1
AU44
DDR_A_CSB_2
AM43
DDR_A_CSB_3
BB27
DDR_A_CKE_0
BD27
DDR_A_CKE_1
BA27
DDR_A_CKE_2
AY26
DDR_A_CKE_3
AR42
DDR_A_ODT_0
AM44
DDR_A_ODT_1
AR44
DDR_A_ODT_2
AL40
DDR_A_ODT_3
AY37
DDR_A_CK_0
BA37
DDR_A_CKB_0
AW29
DDR_A_CK_1
AY29
DDR_A_CKB_1
AU37
DDR_A_CK_2
AV37
DDR_A_CKB_2
AU33
DDR_A_CK_3
AT33
DDR_A_CKB_3
AT30
DDR_A_CK_4
AR30
DDR_A_CKB_4
AW38
DDR_A_CK_5
AY38
DDR_A_CKB_5
EAGLELAKE_FCBGA1254
EAGLELAKE_FCBGA1254
4
EAGLELAKE_DDR3
EAGLELAKE_DDR3
SYM_REV = 1.5GC
SYM_REV = 1.5GC
DDR_Channel_A
DDR_Channel_A
3 OF 9
3 OF 9
4
5
DDR_A_DQS0
DDR_A_DQS_0
DDR_A_DQSB_0
DDR_A_DM_0 DDR_A_DQ_0
DDR_A_DQ_1 DDR_A_DQ_2 DDR_A_DQ_3 DDR_A_DQ_4 DDR_A_DQ_5 DDR_A_DQ_6 DDR_A_DQ_7
DDR_A_DQS_1
DDR_A_DQSB_1
DDR_A_DM_1 DDR_A_DQ_8
DDR_A_DQ_9 DDR_A_DQ_10 DDR_A_DQ_11 DDR_A_DQ_12 DDR_A_DQ_13 DDR_A_DQ_14 DDR_A_DQ_15
DDR_A_DQS_2
DDR_A_DQSB_2
DDR_A_DM_2 DDR_A_DQ_16
DDR_A_DQ_17 DDR_A_DQ_18 DDR_A_DQ_19 DDR_A_DQ_20 DDR_A_DQ_21 DDR_A_DQ_22 DDR_A_DQ_23
DDR_A_DQS_3
DDR_A_DQSB_3
DDR_A_DM_3 DDR_A_DQ_24
DDR_A_DQ_25 DDR_A_DQ_26 DDR_A_DQ_27 DDR_A_DQ_28 DDR_A_DQ_29 DDR_A_DQ_30 DDR_A_DQ_31
DDR_A_DQS_4
DDR_A_DQSB_4
DDR_A_DM_4 DDR_A_DQ_32
DDR_A_DQ_33 DDR_A_DQ_34 DDR_A_DQ_35 DDR_A_DQ_36 DDR_A_DQ_37 DDR_A_DQ_38 DDR_A_DQ_39
DDR_A_DQS_5
DDR_A_DQSB_5
DDR_A_DM_5 DDR_A_DQ_40
DDR_A_DQ_41 DDR_A_DQ_42 DDR_A_DQ_43 DDR_A_DQ_44 DDR_A_DQ_45 DDR_A_DQ_46 DDR_A_DQ_47
DDR_A_DQS_6
DDR_A_DQSB_6
DDR_A_DM_6 DDR_A_DQ_48
DDR_A_DQ_49 DDR_A_DQ_50 DDR_A_DQ_51 DDR_A_DQ_52 DDR_A_DQ_53 DDR_A_DQ_54 DDR_A_DQ_55
DDR_A_DQS_7
DDR_A_DQSB_7
DDR_A_DM_7 DDR_A_DQ_56
DDR_A_DQ_57 DDR_A_DQ_58 DDR_A_DQ_59 DDR_A_DQ_60 DDR_A_DQ_61 DDR_A_DQ_62 DDR_A_DQ_63
http://hobi-elektronika.net
BC5 BD4 BC3
BC2 BD3 BD7 BB7 BB2 BA3 BE6 BD6
BB9 BC9 BD9
BB8 AY8 BD11 BB11 BC7 BE8 BD10 AY11
BD15 BB15 BD14
BB14 BC14 BC16 BB16 BC11 BE12 BA15 BD16
AR22 AT22 AV22
AW21 AY22 AV24 AY24 AU21 AT21 AR24 AU24
AH43 AH42 AK42
AL41 AK43 AG42 AG44 AL42 AK44 AH44 AG41
AD43 AE42 AE45
AF43 AF42 AC44 AC42 AF40 AF44 AD44 AC41
Y43 Y42 AA45
AB43 AA42 W42 W41 AB42 AB44 Y44 Y40
T44 T43 T42
V42 U45 R40 P44 V44 V43 R41 R44
DDR_A_DQS#0 DDR_A_DM0
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7
DDR_A_DQS1 DDR_A_DQS#1 DDR_A_DM1
DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15
DDR_A_DQS2 DDR_A_DQS#2 DDR_A_DM2
DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23
DDR_A_DQS3 DDR_A_DQS#3 DDR_A_DM3
DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31
DDR_A_DQS4 DDR_A_DQS#4 DDR_A_DM4
DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39
DDR_A_DQS5 DDR_A_DQS#5 DDR_A_DM5
DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47
DDR_A_DQS6 DDR_A_DQS#6 DDR_A_DM6
DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55
DDR_A_DQS7 DDR_A_DQS#7 DDR_A_DM7
DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
5
6
6
DDR_A_DM0 DDR_A_DM1 DDR_A_DM2 DDR_A_DM3 DDR_A_DM4 DDR_A_DM5 DDR_A_DM6 DDR_A_DM7
DDR_A_DQS0 DDR_A_DQS1 DDR_A_DQS2 DDR_A_DQS3 DDR_A_DQS4 DDR_A_DQS5 DDR_A_DQS6
DDR_A_DQS7 DDR_A_DQS#0 DDR_A_DQS#1 DDR_A_DQS#2 DDR_A_DQS#3 DDR_A_DQS#4 DDR_A_DQS#5 DDR_A_DQS#6 DDR_A_DQS#7
DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8
DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63
7
DDR_A_DM[7..0] 23,24
DDR_A_DQS[7..0] 23,24
DDR_A_DQS#[7..0] 23,24
DDR_A_D[63..0] 23,24
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Project Name:
Project Name:
Title
Title
Title
Eaglelake (2 of 10)
Eaglelake (2 of 10)
Eaglelake (2 of 10)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Project Name:
?1A
?1A
?1A
7
Nike
Nike
Nike
11 55Wednesday, March 19, 2008
11 55Wednesday, March 19, 2008
11 55Wednesday, March 19, 2008
8
of
of
of
8
NB1
NB1
NB1
1
A A
B B
,17,18,23,24,25,26,45,47,48,52,53
C C
8,23,24,25,26,45,47,48,52,53
,17,18,23,24,25,26,45,47,48,52,53
D D
+1.5V_MEM
+1.5V_MEM
+1.5V_MEM
1
12
R462
R462
80.6
80.6 R186
R186
249 1%
249 1%
1 2
1 2
2
R467 80.6 1%R467 80.6 1%
C547
C547 .1U/50V/0603
.1U/50V/0603
1 2
C518
C518 .1U/50V/0603
.1U/50V/0603
MCH_DDR_RPD
MCH_DDR_SPD
R185
R185 1K 1%
1K 1%
R183
R183 1K 1%
1K 1%
2
R464
R464
80.6
80.6
MCH_DDR_SPU
MCH_DDR_RPU+1.5V_MEM
MCH_DDR_VREF
DDR_CS1_DIMMA#24 DDR_A_MA023,24
DDR3_DRAM_PWROK18
DDR3_DRAMRST#23,24,25,26
3
DDR_B_MA[14..0]25,26
DDR_CS0_DIMMB#26 DDR_CS1_DIMMB#26 DDR_CS2_DIMMB#25 DDR_CS3_DIMMB#25
DDR_CKE0_DIMMB26 DDR_CKE1_DIMMB26 DDR_CKE2_DIMMB25 DDR_CKE3_DIMMB25
M_CLK_DDRB026
M_CLK_DDRB#026
M_CLK_DDRB226
M_CLK_DDRB#226
M_CLK_DDRB325
M_CLK_DDRB#325
M_CLK_DDRB425
M_CLK_DDRB#425
DDR_A_WE#23,24
M_ODT_B325
MCH_DDR_VREF
C191
C191
.1U/10V/0402
.1U/10V/0402
DDR_B_WE#25,26 DDR_B_CAS#25,26 DDR_B_RAS#25,26
DDR_B_BS025,26 DDR_B_BS125,26 DDR_B_BS225,26
M_ODT_B026 M_ODT_B126 M_ODT_B225
MCH_DDR_VREF
DDR_CS1_DIMMA# DDR_A_MA0 DDR_A_WE# M_ODT_B3 DDR3_DRAM_PWROK DDR3_DRAMRST#
DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8
DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14
DDR_B_WE# DDR_B_CAS# DDR_B_RAS#
DDR_B_BS0 DDR_B_BS1 DDR_B_BS2
M_ODT_B0 M_ODT_B1 M_ODT_B2
MCH_DDR_RPD MCH_DDR_RPU MCH_DDR_SPD MCH_DDR_SPU
4
Place 0.1UF (C191) close to MCH.
3
4
5
U17D
U17D
EAGLELAKE_DDR3
EAGLELAKE_DDR3
SYM_REV = 1.5GC
BD24
DDR_B_MA_0
BB23
DDR_B_MA_1
BB24
DDR_B_MA_2
BD23
DDR_B_MA_3
BB22
DDR_B_MA_4
BD22
DDR_B_MA_5
BC22
DDR_B_MA_6
BC20
DDR_B_MA_7
BB20
DDR_B_MA_8
BD20
DDR_B_MA_9
BC26
DDR_B_MA_10
BD19
DDR_B_MA_11
BB19
DDR_B_MA_12
BE38
DDR_B_MA_13
BA19
DDR_B_MA_14
BD36
DDR_B_WEB
BC37
DDR_B_CASB
BD35
DDR_B_RASB
BD26
DDR_B_BS_0
BB26
DDR_B_BS_1
BD18
DDR_B_BS_2
BB35
DDR_B_CSB_0
BD39
DDR_B_CSB_1
BB37
DDR_B_CSB_2
BD40
DDR_B_CSB_3
BC18
DDR_B_CKE_0
AY20
DDR_B_CKE_1
BE17
DDR_B_CKE_2
BB18
DDR_B_CKE_3
BD37
DDR_B_ODT_0
BC39
DDR_B_ODT_1
BB38
DDR_B_ODT_2
BD42
DDR_B_ODT_3
AY33
DDR_B_CK_0
AW33
DDR_B_CKB_0
AV31
DDR_B_CK_1
AW31
DDR_B_CKB_1
AW35
DDR_B_CK_2
AY35
DDR_B_CKB_2
AT31
DDR_B_CK_3
AU31
DDR_B_CKB_3
AP31
DDR_B_CK_4
AP30
DDR_B_CKB_4
AW37
DDR_B_CK_5
AV35
DDR_B_CKB_5
AR43
DDR3_A_CSB1
BB40
DDR3_A_MA0
AT44
DDR3_A_WEB
AV40
DDR3_B_ODT3
AR6
DDR3_DRAM_PWROK
BC24
DDR3_DRAMRSTB
AN29
RSVD_01
AN30
RSVD_02
AJ33
RSVD_03
AK33
RSVD_04
BB44
DDR_VREF
AY42
DDR_RPD
BA43
DDR_RPU
BC43
DDR_SPD
BC44
DDR_SPU
EAGLELAKE_FCBGA1254
EAGLELAKE_FCBGA1254
http://hobi-elektronika.net
SYM_REV = 1.5GC
DDR_Channel_B
DDR_Channel_B
4 OF 9
4 OF 9
DDR_B_DQS_0
DDR_B_DQSB_0
DDR_B_DM_0 DDR_B_DQ_0
DDR_B_DQ_1 DDR_B_DQ_2 DDR_B_DQ_3 DDR_B_DQ_4 DDR_B_DQ_5 DDR_B_DQ_6 DDR_B_DQ_7
DDR_B_DQS_1
DDR_B_DQSB_1
DDR_B_DM_1 DDR_B_DQ_8
DDR_B_DQ_9 DDR_B_DQ_10 DDR_B_DQ_11 DDR_B_DQ_12 DDR_B_DQ_13 DDR_B_DQ_14 DDR_B_DQ_15
DDR_B_DQS_2
DDR_B_DQSB_2
DDR_B_DM_2 DDR_B_DQ_16
DDR_B_DQ_17 DDR_B_DQ_18 DDR_B_DQ_19 DDR_B_DQ_20 DDR_B_DQ_21 DDR_B_DQ_22 DDR_B_DQ_23
DDR_B_DQS_3
DDR_B_DQSB_3
DDR_B_DM_3 DDR_B_DQ_24
DDR_B_DQ_25 DDR_B_DQ_26 DDR_B_DQ_27 DDR_B_DQ_28 DDR_B_DQ_29 DDR_B_DQ_30 DDR_B_DQ_31
DDR_B_DQS_4
DDR_B_DQSB_4
DDR_B_DM_4 DDR_B_DQ_32
DDR_B_DQ_33 DDR_B_DQ_34 DDR_B_DQ_35 DDR_B_DQ_36 DDR_B_DQ_37 DDR_B_DQ_38 DDR_B_DQ_39
DDR_B_DQS_5
DDR_B_DQSB_5
DDR_B_DM_5 DDR_B_DQ_40
DDR_B_DQ_41 DDR_B_DQ_42 DDR_B_DQ_43 DDR_B_DQ_44 DDR_B_DQ_45 DDR_B_DQ_46 DDR_B_DQ_47
DDR_B_DQS_6
DDR_B_DQSB_6
DDR_B_DM_6 DDR_B_DQ_48
DDR_B_DQ_49 DDR_B_DQ_50 DDR_B_DQ_51 DDR_B_DQ_52 DDR_B_DQ_53 DDR_B_DQ_54 DDR_B_DQ_55
DDR_B_DQS_7
DDR_B_DQSB_7
DDR_B_DM_7 DDR_B_DQ_56
DDR_B_DQ_57 DDR_B_DQ_58 DDR_B_DQ_59 DDR_B_DQ_60 DDR_B_DQ_61 DDR_B_DQ_62 DDR_B_DQ_63
5
AW8 AW9 AY6
AV7 AW4 BA9 AU11 AU7 AU8 AW7 AY9
AT15 AU15 AR15
AY13 AP15 AW15 AT16 AU13 AW13 AP16 AU16
AR20 AR17 AU17
AY17 AV17 AR21 AV20 AP17 AW16 AT20 AN20
AU26 AT26 AV25
AT25 AV26 AU29 AV29 AW25 AR25 AP26 AR29
AR38 AR37 AU39
AR36 AU38 AN35 AN37 AV39 AW39 AU40 AU41
AK34 AL34 AL37
AL35 AL36 AK36 AJ34 AN39 AN40 AK37 AL39
AF37 AF36 AJ35
AJ38 AJ37 AF38 AE37 AK40 AJ40 AF34 AE35
AB35 AD35 AD37
AD40 AD38 AB40 AA39 AE36 AE39 AB37 AB38
DDR_B_DQS0 DDR_B_DQS#0 DDR_B_DM0
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7
DDR_B_DQS1 DDR_B_DQS#1 DDR_B_DM1
DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15
DDR_B_DQS2 DDR_B_DQS#2 DDR_B_DM2
DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23
DDR_B_DQS3 DDR_B_DQS#3 DDR_B_DM3
DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31
DDR_B_DQS4 DDR_B_DQS#4 DDR_B_DM4
DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39
DDR_B_DQS5 DDR_B_DQS#5 DDR_B_DM5
DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47
DDR_B_DQS6 DDR_B_DQS#6 DDR_B_DM6
DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55
DDR_B_DQS7 DDR_B_DQS#7 DDR_B_DM7
DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
6
DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7
DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6
DDR_B_DQS7 DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7
DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9
DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
6
Date: Sheet
Custom
Custom
Custom
7
DDR_B_DM[7..0] 25,26
DDR_B_DQS[7..0] 25,26
DDR_B_DQS#[7..0] 25,26
DDR_B_D[63..0] 25,26
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Project Name:
Project Name:
Project Name:
Eaglelake (3 of 10)
Eaglelake (3 of 10)
Eaglelake (3 of 10)
?1A
?1A
?1A
7
Nike
Nike
Nike
12 55Wednesday, March 19, 2008
12 55Wednesday, March 19, 2008
12 55Wednesday, March 19, 2008
8
NB1
NB1
NB1
of
of
of
8
1
2
3
4
5
6
7
8
+1.1V_VCCP8,9,10,14,16,17,19,22,36,48,51,53 +1.1V_VCCP8,9,10,14,16,17,19,22,36,48,51,53
+1.1V_VCCP
R353
R353 *470_NC
PAD
PAD PAD
PAD PAD
PAD PAD
PAD PAD
PAD
25
9
*470_NC
1 2
TP_MCH_M20 TP_MCH_N17 RSVD_MTYPE EXP_SLR TP_MCH_G15 EXP_SM ITPM_EN
TP_MCH_M17 TCEN TP_MCH_G20 TP_MCH_J16 TP_MCH_M16 TP_MCH_J15 TP_MCH_J20 TP_MCH_F20
MCH_CLVREF
TP_MCH_AR7 TP_MCH_AN11
HPLLMON1_DP HPLLMON1_DN HPLLMON2_DP HPLLMON2_DN
DPLLMON1_DN DPLLMON1_DP DPLLMON2_DN DPLLMON2_DP
TP_MCH_AN17
A A
RSVD_MTYPE EXP_SLR TP_MCH_G15 EXP_SM ITPM_EN TCEN
TP_MCH_F20
R359 10KR359 10K R362 10KR362 10K R391 10KR391 10K
T67 PADT67 PAD T71 PADT71 PAD
T73 PADT73 PAD T57 PADT57 PAD
T20
T20 T60
T60 T68
T68 T61
T61 T58
T58
CL_DATA021
CL_CLK021
ICH_CL_RST0#21
ICH_CL_PWROK21,42
T98 PADT98 PAD T129 PADT129 PAD T91 PADT91 PAD T130 PADT130 PAD
T72 PADT72 PAD T70 PADT70 PAD T76 PADT76 PAD T79 PADT79 PAD
T77 PADT77 PAD T66 PADT66 PAD T78 PADT78 PAD T74 PADT74 PAD
T96 PADT96 PAD
CPU_MCH_BSEL07,8 CPU_MCH_BSEL17,8 CPU_MCH_BSEL27,8
1 2
R382 *1K_NCR382 *1K_NC
1 2
R352 *1K_NCR352 *1K_NC
1 2
R369 *1K_NCR369 *1K_NC
1 2
R373 *1K_NCR373 *1K_NC
1 2
R387 *1K_NCR387 *1K_NC
1 2
R377 *1K_NCR377 *1K_NC
B B
R366
R366 *10K_NC
*10K_NC
1 2
R357
R357 *470_NC
*470_NC
1 2
R392
R392 *470_NC
*470_NC
F17
G16
P15 M20 N17
K16
F15 G15 H17
L17 M17
J17 G20
J16 M16
J15
J20
F20
AY4 AY2
AN13
AW2
AN8 AR7
AN10 AN11
AN9
R31 R32 U30 U31
R15 R14
T15
T14
AN17
U17E
U17E
BSEL0 BSEL1 BSEL2 ALLZTEST XORTEST RSVD EXP_SLR RSVD_17 EXP_SM ITPM_EN
RSVD_10 CEN RSVD_11 RSVD_12 RSVD_13 RSVD_14 RSVD_15 DUALX8_ENABLE
CL_DATA CL_CLK CL_VREF CL_RSTB CL_PWROK
JTAG_TDI JTAG_TDO JTAG_TCK JTAG_TMS
RSVD_31 RSVD_30 RSVD_33 RSVD_32
RSVD_25 RSVD_26 RSVD_27 RSVD_28
NC_01
EAGLELAKE_DDR3
EAGLELAKE_DDR3
SYM_REV = 1.5GC
SYM_REV = 1.5GC
VGA
VGA
MISC
MISC
CRT_HSYNC CRT_VSYNC
CRT_RED
CRT_GREEN
CRT_BLUE
CRT_IRTN
CRT_DDC_DATA
CRT_DDC_CLK
DAC_IREF
DPL_REFCLKINP DPL_REFCLKINN
VCC_95
VSS_370
RSVD_35 RSVD_34
NC_19 RSTINB PWROK
ICH_SYNCB
HDA_BCLK HDA_RSTB
HDA_SDI
HDA_SDO
HDA_SYNC
DDPC_CTRLCLK
DDPC_CTRLDATA
DPRSTPB
SLPB
D14 C14
B18 D18 C18 F13
L15 M15
B15 E15
D15 G8 G9
L13 L11 B14 AN6 AR4 K15
AU4 AV4 AU2 AV1 AU3
J11 F11
P43 P42
TP_MCH_L13 TP_MCH_B14
PLTRST#_R PWRGD_3V_R
DPL_REFSSCLKIN_DP DPL_REFSSCLKIN_DN
DPL_REFSSCLKIN_DP
DPL_REFSSCLKIN_DN
MCH_DDC_DATA
MCH_DDC_CLK
CK_96M_DREF_DP CK_96M_DREF_DN
1 2
R177 0R177 0
H_DPRSTP# 8,19,51 H_CPUSLP# 8
T64PAD T64PAD T19PAD T19PAD
12
R363
R363 10K
10K
ICH_PWRGD 21,45 MCH_ICH_SYNC# 21
CK_96M_DREF_DP
CK_96M_DREF_DN
For non-graphics need to pull-up.For non-graphics need to pull-down.
PLTRST#_R
12
R368
R368 10K
10K
R456 100R456 100
1 2
R455 0R455 0
12
PLTRST# 20,27,30
AB15
RSVD_29
TP_MCH_CGC_BE45
2
MCH_NC_A44 MCH_NC_BD1 MCH_NC_BD45 MCH_NC_BE2 MCH_NC_BE44
TP_MCH_CGC_A45 TP_MCH_CGC_BE1
C526
C526 .01U/25V/0402
.01U/25V/0402
1 2
T18 PADT18 PAD T99 PADT99 PAD
C C
V_1P1_CL14,17
D D
1
T102 PADT102 PAD T101 PADT101 PAD T105 PADT105 PAD
T55 PADT55 PAD T100 PADT100 PAD
T104 PADT104 PAD
R448
R448
1%
1%
1K
1K
1 2
R458
R458 464 1%
464 1%
MCH_CLVREF
A44
NC_13
BD1
NC_12
BD45
NC_11
BE2
NC_10
BE44
NC_09
A45
RSVD_18
B2
RSVD_19
BE1
RSVD_20
BE45
RSVD_21
EAGLELAKE_FCBGA1254
EAGLELAKE_FCBGA1254
B45
NC_02
AK15
NC_18
AD42
NC_05
AN16
NC_04
W30
NC_06
AW44
NC_03
R42
NC_08
U32
5 OF 9
5 OF 9
3
NC_07
http://hobi-elektronika.net
4
MCH_DDC_DATA
MCH_DDC_CLK
5
+3.3V_RUN +3.3V_RUN
R381
R381
2.2K
2.2K
1 2
1 2
6
R385
R385
2.2K
2.2K
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Project Name:
Project Name:
Title
Title
Title
Eaglelake (4 of 10)
Eaglelake (4 of 10)
Eaglelake (4 of 10)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Project Name:
?1A
?1A
?1A
7
Nike
Nike
Nike
of
of
of
13 55Wednesday, March 19, 2008
13 55Wednesday, March 19, 2008
13 55Wednesday, March 19, 2008
8
NB1
NB1
NB1
1
+1.1V_VCCP +1.1V_VCCP
+1.1V_VCCP8,9,10,13,16,17,19,22,36,48,51,53
+1.1V_VCCP
A A
12
C465
C465 .1U
.1U
12
12
C464
C464 .1U
.1U
C418
C418 .1U
.1U
As close as these pins.
B B
VCCA_MPLL
C86
C86 .1U/50V/0603
.1U/50V/0603
1 2
VCCA_HPLL
C88
C88 .1U/50V/0603
.1U/50V/0603
1 2
C C
VCCA_GPLLD16
V_1P1_CL13,17 VCCA_GPLL16
VCCA_HPLL16
VCCA_MPLL16 VCCA_DPLLA16 VCCA_DPLLB16
+3.3V_RUN
+1.5V_RUN9,22,30,32,33,45,52
D D
1
1 2
R397 0R397 0
1 2
R355 *0_NCR355 *0_NC
1 2
R356 0R356 0
VCCA_HPLL VCCA_MPLL
VCC_AZA
V_1P1_HPL
2
AA19 AA21 AA23 AA25 AA27 AA29 AA30 AB20 AB22 AB24 AB26 AB29
AB30 AC16 AC17 AC19 AC21 AC23 AC25 AC27 AC29 AD16 AD17 AD20 AD22 AD24 AD26 AD29
AE16
AE17
AE19
AE21
AE23
AE25
AE27
AE29
AF16
AF17
AF19
AF20
AF21
AF22
AF23
AF24
AF25
AF26
AF27
AF29 AG16 AG17 AG20 AG22 AG24 AG26 AG29
AJ16
AJ17
AJ19
AJ21
B12
U33
B16 B22
A21 D20 C20
AR2
E19
EAGLELAKE_FCBGA1254
EAGLELAKE_FCBGA1254
VCC_AZA
2
U17F
U17F
VCC_01 VCC_02 VCC_03 VCC_04 VCC_05 VCC_06 VCC_07 VCC_08 VCC_09 VCC_10 VCC_11 VCC_12 VCC_13 VCC_14 VCC_15 VCC_16 VCC_17 VCC_18 VCC_19 VCC_20 VCC_21 VCC_22 VCC_23 VCC_24 VCC_25 VCC_26 VCC_27 VCC_28 VCC_29 VCC_30 VCC_31 VCC_32 VCC_33 VCC_34 VCC_35 VCC_36 VCC_37 VCC_38 VCC_39 VCC_40 VCC_41 VCC_42 VCC_43 VCC_44 VCC_45 VCC_46 VCC_47 VCC_48 VCC_49 VCC_50 VCC_51 VCC_52 VCC_53 VCC_54 VCC_55 VCC_56 VCC_57 VCC_58 VCC_59
VCCDPLL_EXP VCCD_HPLL VCCAPLL_EXP
VCCA_HPLL VCCA_MPLL VCCA_DPLLA VCCA_DPLLB
VCC3_HDA VCC3_3
EAGLELAKE_DDR3
EAGLELAKE_DDR3
SYM_REV = 1.5GC
SYM_REV = 1.5GC
Core Power
Core Power
POWER
POWER
PCIE and DMI Power
PCIE and DMI Power
VCCAVRM_EXP
6 OF 9
6 OF 9
3
VCC_76 VCC_75 VCC_74 VCC_73 VCC_72 VCC_71 VCC_70 VCC_69 VCC_66 VCC_65 VCC_64 VCC_63 VCC_62 VCC_61 VCC_60 VCC_85 VCC_84 VCC_83 VCC_82 VCC_81 VCC_80
Core Power
Core Power
VCC_79 VCC_78 VCC_77 VCC_97 VCC_96 VCC_91 VCC_90 VCC_89 VCC_88 VCC_87 VCC_86
VCC_102 VCC_101 VCC_100
VCC_99
VCC_98 VCC_EXP_31 VCC_EXP_32 VCC_EXP_33
VCC_104
VCC_103 VCC_EXP_26 VCC_EXP_27 VCC_EXP_28 VCC_EXP_29 VCC_EXP_30 VCC_EXP_17 VCC_EXP_18 VCC_EXP_23 VCC_EXP_24 VCC_EXP_25 VCC_EXP_21 VCC_EXP_22 VCC_EXP_14 VCC_EXP_15 VCC_EXP_16
VCC_EXP_2
VCC_EXP_1 VCC_EXP_34 VCC_EXP_35 VCC_EXP_36 VCC_EXP_37 VCC_EXP_38 VCC_EXP_10 VCC_EXP_11 VCC_EXP_12 VCC_EXP_13 VCC_EXP_06 VCC_EXP_07 VCC_EXP_08 VCC_EXP_09 VCC_EXP_19 VCC_EXP_20
VCC_EXP_5
VCC_EXP_4
VCC_EXP_3
VCC_CL_85 VCC_CL_83 VCC_CL_84
3
U23 U22 U21 T29 T27 T26 T25 T24 T21 R29 R27 R26 R25 AJ25 AJ23 W25 W23 W21 W19 U29 U27 U26 U25 U24 T23 T22 Y26 Y24 Y22 Y20 W29 W27
L3 H4 F9 AF3 AC4 AB14 AA15 AA14 V4 P3 AE15 AE14 AD15 AD14 AC15 AJ11 AJ10 AG15 AF15 AF14 AJ7 AJ6 AJ14 AJ13 AJ12 AJ2 AJ1 Y15 Y14 W15 U15 U14 AK9 AK8 AK7 AK6 AK13 AK12 AK11 AK10 AJ9 AJ8 AK4 AK3 AK2
AG2 W31 Y30 Y29
As close as these pins.
+1.1V_VCCP
+3.3V_RUN
V_1P5_EXP_FB
C486
C486
4.7U/6.3V
4.7U/6.3V
1 2
V_1P1_CL
4
+1.1V_VCCP8,9,10,13,16,17,19,22,36,48,51,53
+1.1V_VCCP
12
12
1 2
R432 0_0402R432 0_0402
1 2
R441 *0_0402_NCR441 *0_0402_NC
C423
C423
C430
C430
.1U
.1U
.1U
.1U
+1.1V_VCCP 8,9,10,13,16,17,19,22,36,48,51,53
C439
C439 .1U/50V/0603
.1U/50V/0603
1 2
L17
L17 BLM18PG181SN1D
BLM18PG181SN1D
R297
R297
40.2 1%
40.2 1%
V_1P5_EXP_FB
+1.1V_VCCP
+1.5V_RUN
V_1P5_EXP_FB
V_1P1_CL 13,17
http://hobi-elektronika.net
4
R295
R295
39.2
39.2
1%
1%
V_1P5_EXP_FB
1 2
+1.5V_MEM12,17,18,23,24,25,26,45,47,48,52,53
R358 0_0402R358 0_0402
5
+1.1V_VCCP V_1P1_CL
C431
C431 .1U/50V/0603
.1U/50V/0603
+1.5V_MEM
12
C328
C328 1U/10V/0603
1U/10V/0603
1 2
1 2
R344 1R344 1
12
R1090 R1090
5
U17G
U17G
R22
VTT_FSB_36
R24
VTT_FSB_35
R23
VTT_FSB_34
R21
VTT_FSB_32
R20
VTT_FSB_31
P24
VTT_FSB_30
P22
VTT_FSB_29
P21
VTT_FSB_28
P20
VTT_FSB_27
N22
VTT_FSB_26
N21
VTT_FSB_25
N20
VTT_FSB_24
M22
VTT_FSB_23
M21
VTT_FSB_22
L22
VTT_FSB_21
L21
VTT_FSB_20
K22
VTT_FSB_19
K21
VTT_FSB_18
J22
VTT_FSB_17
J21
VTT_FSB_16
H22
VTT_FSB_15
H21
VTT_FSB_14
G22
VTT_FSB_13
G21
VTT_FSB_12
F22
VTT_FSB_11
F21
VTT_FSB_10
E23
VTT_FSB_09
D24
VTT_FSB_08
D23
VTT_FSB_07
D22
VTT_FSB_06
C26
VTT_FSB_05
C24
VTT_FSB_04
B26
VTT_FSB_03
B25
VTT_FSB_02
A25
VTT_FSB_01
BE36
VCC_SM_15
BE31
VCC_SM_14
BE27
VCC_SM_13
BE23
VCC_SM_12
BD38
VCC_SM_11
BD34
VCC_SM_10
BD29
VCC_SM_09
BD25
VCC_SM_08
BD21
VCC_SM_07
BB39
VCC_SM_06
BA41
VCC_SM_05
AY40
VCC_SM_04
AV44
VCC_SM_03
AT45
VCC_SM_02
AP44
VCC_SM_01
D19
VCCA_DAC_01
B19
VCCA_DAC_02
A17
VCC_EXP
B20
VCC_CRT
B17
VSS_369
EAGLELAKE_FCBGA1254
EAGLELAKE_FCBGA1254
6
EAGLELAKE_DDR3
EAGLELAKE_DDR3
SYM_REV = 1.5GC
SYM_REV = 1.5GC
Host Bus PowerSystem Memory Power
Host Bus PowerSystem Memory Power
POWER
POWER
Controller Link Aux Power
Controller Link Aux Power
System Memory
System Memory CLK Power
CLK Power
VCC_SMCLK_04 VCC_SMCLK_03 VCC_SMCLK_02 VCC_SMCLK_01
VCCCML_DDR
7 OF 9
7 OF 9
6
7
V_1P1_CL 13,17
VCC_CL_24 VCC_CL_23 VCC_CL_22 VCC_CL_21 VCC_CL_20 VCC_CL_19 VCC_CL_18 VCC_CL_17 VCC_CL_16 VCC_CL_15 VCC_CL_14 VCC_CL_13 VCC_CL_12 VCC_CL_11 VCC_CL_10 VCC_CL_09 VCC_CL_08 VCC_CL_07 VCC_CL_06 VCC_CL_05 VCC_CL_04 VCC_CL_03 VCC_CL_28 VCC_CL_27 VCC_CL_26 VCC_CL_25 VCC_CL_80 VCC_CL_79 VCC_CL_78 VCC_CL_77 VCC_CL_76 VCC_CL_75 VCC_CL_74 VCC_CL_73 VCC_CL_72 VCC_CL_71 VCC_CL_70 VCC_CL_69 VCC_CL_68 VCC_CL_67 VCC_CL_66 VCC_CL_65 VCC_CL_64 VCC_CL_63 VCC_CL_62 VCC_CL_61 VCC_CL_60 VCC_CL_59 VCC_CL_58 VCC_CL_57 VCC_CL_56 VCC_CL_48 VCC_CL_47 VCC_CL_46 VCC_CL_45 VCC_CL_44 VCC_CL_43 VCC_CL_42 VCC_CL_41 VCC_CL_55 VCC_CL_40 VCC_CL_39 VCC_CL_38 VCC_CL_37 VCC_CL_36 VCC_CL_35 VCC_CL_34 VCC_CL_33 VCC_CL_32 VCC_CL_54 VCC_CL_53 VCC_CL_52 VCC_CL_51 VCC_CL_50 VCC_CL_49 VCC_CL_31 VCC_CL_30 VCC_CL_29 VCC_CL_02 VCC_CL_01 VCC_CL_82 VCC_CL_81
AA32 AA33 AB32 AB33 AD32 AD33 AE32 AE33 AF32 AJ32 AK31 AL30 AM15 AM16 AM17 AM20 AM21 AM22 AM24 AM25 AM26 AM29 AP1 AP2 Y32 Y33 Y31 AA31 AB31 AC31 AD31 AE31 AF31 AG30 AG31 AJ30 AJ31 AK16 AK17 AK19 AK20 AK21 AK22 AK23 AK24 AK25 AK26 AK27 AK29 AK30 AL1 AL10 AL11 AL12 AL14 AL15 AL16 AL17 AL19 AL2 AL20 AL21 AL22 AL23 AL24 AL25 AL26 AL27 AL29 AL4 AL5 AL6 AL7 AL8 AL9 AM2 AM3 AM4 AJ15
VCCCK_DDR
AK14 AJ27 AJ29
AK32 AL31 AL32 AM31
VCCCML_DDR
AM30
Title
Title
Title
Eaglelake (5 of 10)
Eaglelake (5 of 10)
Eaglelake (5 of 10)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
7
L9 FBM2125HM300-TL9 FBM2125HM300-T
C456
C456 .1U/50V/0603
.1U/50V/0603
1 2
+1.5V_MEM
L35
L35
1 2
и
и
0.15uH
±5
0.15uH
±5
300m
300m
0603
0603
12
C500
C500 *0.1U_NC
*0.1U_NC
и
и
±10
±10 10
10 0402
0402 X5R
X5R
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
?1A
?1A
?1A
1 2
12
R442 0_0402R442 0_0402
C499
C499
1 2
R440 *1_NCR440 *1_NC
22U
22U
и
и
±20
±20
6.3
6.3 0805
0805 X5R
X5R
L34
L34
1 2
0.1uH
±5
0.1uH
±5 0603
0603
300m
300m
Project Name:
Project Name:
Project Name:
и
и
8
+1.1V_VCCP
+1.5V_MEM 12,17,18,23,24,25,26,45,47,48,52,53
V_1P1_CL 13,17
Nike
Nike
Nike
14 55Wednesday, March 19, 2008
14 55Wednesday, March 19, 2008
14 55Wednesday, March 19, 2008
8
NB1
NB1
NB1
of
of
of
1
A12
AJ22
BD43
AJ24
BA5
A15
AJ26
A19
BB21
BB25
A27
AJ36
AJ39
BB28
A31
VSS_183
VSS_004
VSS_094
VSS_327
VSS_178
VSS_088
B29
U44
VSS_095
VSS_184
VSS_087
VSS_177
B27
AH2
AJ44
VSS_005
VSS_096
VSS_086
VSS_176
B21
AG5
A A
VSS_001
VSS_091
VSS_371
VSS_092
VSS_181
VSS_002
VSS_093
VSS_003
VSS_182
EAGLELAKE_DDR3
EAGLELAKE_DDR3
VSS_328
VSS_089
VSS_329
VSS_179
VSS_090
VSS_330
VSS_180
VSS_219
VSS_331
F8
W17
BA23
B B
C C
D D
W16
U8
W1
B34
AH3
AH4
AJ20
BB6
A36
VSS_185
VSS_006
VSS_085
VSS_326
U39
AG45
BD12
A40
VSS_186
VSS_007
VSS_325
VSS_175
B10
U36
2
AJ45
AK35
VSS_097
VSS_098
VSS_174
VSS_324
U20
AY45
BD17
AK38
VSS_008A8VSS_187
VSS_099
VSS_083
VSS_173
VSS_084
AY30
AG25
AG27
BD8
AA1
VSS_189
VSS_009
VSS_322
VSS_323
U17
U19
BE10
AA11
VSS_190
VSS_010
VSS_172
VSS_082
AY25
AG23
AK39
BE15
VSS_100
VSS_191
VSS_171
VSS_081
AY21
AG21
AL38
AA12
VSS_101
VSS_011
VSS_080
VSS_321
U16
AG19
AA13
BE19
VSS_012
VSS_192
VSS_170
VSS_320
U13
AY16
AL44
AA16
VSS_102
VSS_013
VSS_169
VSS_079
AF7
AY15
AL45
BE21
VSS_103
VSS_193
GND
GND
VSS_318
VSS_319
U11
U12
BE25
AN21
VSS_194
VSS_104
VSS_168
VSS_078
AF6
AY1
3
AA17
BE29
VSS_014
VSS_195
VSS_077
VSS_167
AF39
AW30
AA20
AN22
VSS_015
VSS_105
VSS_257
VSS_258
L16
L20
AA22
AN24
VSS_016
VSS_106
VSS_076
VSS_166
AW3
AF35
BE34
AA24
VSS_196
VSS_017
VSS_256
VSS_075
L10
AF33
AN25
BE40
VSS_107
VSS_197
VSS_255
VSS_165
K45
AW26
AN26
AA26
VSS_108
VSS_018
VSS_074
VSS_164
AF13
AW24
C16
AA34
VSS_372
VSS_019
VSS_163
VSS_254
K33
AW22
N16 N13
F1 N11 C45
C1 M44 M25
BE43
M24 BE3
BD44
M1 BD2
L9
BC45
L8
BC1
L4 L39 B44
A6 L35 A43 L30
A3 L26
Y9 Y39 Y35
Y3 Y27 Y25 Y23 Y21
Y2 Y19 Y17 Y16 Y13 Y12 Y11 Y10 W5
W45 W44 W26 W24
AF12
4
AN33
AN36
AA38
AN38
D11
AA40
AA44
AN7
VSS_199C3VSS_109
VSS_110
VSS_020
VSS_200C5VSS_111
VSS_201
VSS_021
VSS_022
VSS_070
VSS_251
VSS_071
VSS_161
VSS_252
VSS_253
VSS_072
VSS_162
VSS_073
K20
K24
K29
AE8
AF10
AF11
AW20
U17I
U17I
VSS_272 VSS_271 VSS_362 VSS_270 VSS_363 VSS_364 VSS_269 VSS_268 VSS_356 VSS_267 VSS_357 VSS_358 VSS_266 VSS_359 VSS_265 VSS_360 VSS_264 VSS_361 VSS_263 VSS_262 VSS_365 VSS_367 VSS_261 VSS_366 VSS_260 VSS_368 VSS_259 VSS_355 VSS_354 VSS_353 VSS_352 VSS_351 VSS_350 VSS_349 VSS_348 VSS_347 VSS_346 VSS_345 VSS_344 VSS_343 VSS_342 VSS_341 VSS_340 VSS_339 VSS_338 VSS_337 VSS_336 VSS_335
EAGLELAKE_FCBGA1254
EAGLELAKE_FCBGA1254
AW11
AW17
EAGLELAKE_DDR3
EAGLELAKE_DDR3
SYM_REV = 1.5GC
SYM_REV = 1.5GC
GND
GND
9 OF 9
9 OF 9
D16
AP20
VSS_112
VSS_202
VSS_113
VSS_069
VSS_250
VSS_160
K17
AE44
VSS_273 VSS_274 VSS_275 VSS_276 VSS_277 VSS_278 VSS_279 VSS_280 VSS_281 VSS_282 VSS_283 VSS_284 VSS_285 VSS_286 VSS_287 VSS_288 VSS_289 VSS_290 VSS_291 VSS_292 VSS_293 VSS_294 VSS_295 VSS_296 VSS_297 VSS_298 VSS_299 VSS_300 VSS_301 VSS_302 VSS_303 VSS_304 VSS_305 VSS_306 VSS_307 VSS_308 VSS_309 VSS_310 VSS_311 VSS_312 VSS_313 VSS_314 VSS_315 VSS_316 VSS_317 VSS_332 VSS_333 VSS_334
NC_14 NC_15 NC_16 NC_17
AA8
D21
VSS_023
VSS_203
VSS_068
VSS_159
AV9
AE40
D25
AP21
VSS_204
VSS_114
VSS_158
VSS_249
K13
AV8
AB11
AP22
VSS_024
VSS_157
K11
AV6
N26 N29 N30 N33 N36 N38 N8 P16 P17 P25 P26 P31 R11 R12 R16 R17 R19 R2 R30 R38 R45 R5 R8 T10 T11 T12 T13 T16 T17 T19 T20 T3 T30 T31 T32 T33 T35 T38 T4 T40 T6 T7 T8 T9 U1 W2 W20 W22
AD30 AC30 AF30 AE30
AB12
D26
VSS_115
VSS_025
VSS_205
VSS_066
VSS_067
VSS_248
AE34
AE38
D39
AP24
VSS_206
VSS_116
VSS_247
VSS_156
J9
AV38
AB16
AB17
VSS_026
VSS_027
VSS_246
VSS_155
J8
AV33
5
AP25
AP29
VSS_207D6VSS_117
VSS_118
VSS_064
VSS_154
VSS_065
AE24
AV30
AE26
AB19
VSS_028
VSS_208D7VSS_029
VSS_244
VSS_245
J4
J5
AB21
AP45
VSS_209E3VSS_119
VSS_063
VSS_153
AE20
AE22
AV21
AB23
AR10
VSS_030
VSS_120
VSS_152
VSS_243
VSS_062
J37
AV2
E31
AR11
E41
VSS_210
VSS_121
VSS_061
VSS_151
J3
AE13
AV16
AB25
VSS_211
VSS_031
VSS_212E5VSS_122
VSS_241
VSS_060
VSS_242
H9
AE12
AR13
AB27
VSS_032
VSS_059
VSS_150
AE11
AV15
AB34
AR16
VSS_033
VSS_123
VSS_240
VSS_149
H8
AV13
F16
VSS_213
VSS_214F2VSS_124
VSS_148
VSS_239
H7
AV11
6
AR26
AB36
VSS_034
VSS_147
VSS_058
AE1
AU9
F30
AR3
VSS_215
VSS_125
VSS_057
VSS_238
H44
AD9
AB39
AR31
VSS_035
VSS_126
VSS_237
VSS_056
H38
AD6
AB4
VSS_036
VSS_216F4VSS_217
VSS_145
VSS_146
AU5
AU6
F42
AR33
VSS_127
VSS_236
VSS_055
H33
AD39
AB6
AR35
VSS_037
VSS_128
VSS_235
VSS_144
H31
AU35
F45
AB7
VSS_218
VSS_038
VSS_234
VSS_054
H30
AD36
AB8
G11
VSS_039
VSS_220
VSS_143
VSS_053
AU30
AD34
AR39
AR8
VSS_129
VSS_130
VSS_142
VSS_052
AD3
AU25
AC20
G17
AC22
VSS_040
VSS_221
VSS_141
VSS_233
H20
H25
AU22
7
AR9
G24
VSS_041
VSS_131
VSS_222
VSS_050
VSS_051
VSS_232
AD25
AD27
AT1
G26
VSS_132
VSS_223
VSS_231
VSS_140
H16
AU20
AC24
AC26
VSS_042
VSS_043
VSS_230
VSS_139
H15
AT35
G29
AT11
VSS_224
VSS_133
VSS_229
VSS_049
H13
AD23
AT13
AC45
VSS_225G3VSS_134
VSS_044
VSS_137
VSS_048
VSS_138
AT24
AT29
AD21
AT17
G35
VSS_135
VSS_226
VSS_047
VSS_228
H11
AD19
AC5
H1
VSS_045
VSS_227
VSS_136
VSS_046
AT2
AD12
8
U17H
U17H EAGLELAKE_FCBGA1254
EAGLELAKE_FCBGA1254
SYM_REF = 1.5GC
SYM_REF = 1.5GC 8 OF 9
8 OF 9
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Project Name:
Project Name:
Title
Title
Title
Eaglelake (6 of 10)
Eaglelake (6 of 10)
Eaglelake (6 of 10)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
1
2
3
http://hobi-elektronika.net
4
5
6
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Project Name:
?1A
?1A
?1A
7
Nike
Nike
Nike
NB1
NB1
NB1
of
of
of
15 55Wednesday, March 19, 2008
15 55Wednesday, March 19, 2008
15 55Wednesday, March 19, 2008
8
1
2
3
4
5
6
7
8
A A
B B
L19 1uH/300MAL19 1uH/300MA
L20 1uH/300MAL20 1uH/300MA
C C
L3
0.27uHL30.27uH
L21 2.2uHL21 2.2uH
R338 1R338 1
R337 1R337 1
R340 1R340 1
R339 1R339 1
C87
C87
12
2.2U
2.2U
X5R
X5R ±10
±10
6.3
6.3 0603
0603
R3351R335 1
C371
C371 10U/6.3V/0805
10U/6.3V/0805
C372
C372 10U/6.3V/0805
10U/6.3V/0805
и
и
C364
C364 10U/6.3V/0805
10U/6.3V/0805
VCCA_HPLL 14
R3361R336 1
C378
C378 .1U/50V/0603
.1U/50V/0603
1 2
C379
C379 .1U/50V/0603
.1U/50V/0603
1 2
VCCA_MPLL 14
VCCA_GPLLD 14
VCCA_GPLL 14
L25 0_0805L25 0_0805
C392
C392 *.1U/50V/0603_NC
*.1U/50V/0603_NC
1 2
L26 0_0805L26 0_0805
C393
C393 *.1U/50V/0603_NC
*.1U/50V/0603_NC
1 2
+1.1V_VCCP8,9,10,13,14,17,19,22,36,48,51,53
D D
1
2
3
http://hobi-elektronika.net
4
5
VCCA_DPLLA 14
VCCA_DPLLB 14
6
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
Project Name:
Project Name:
Title
Title
Title
Eaglelake (7 of 10)
Eaglelake (7 of 10)
Eaglelake (7 of 10)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Project Name:
?1A
?1A
?1A
7
Nike
Nike
Nike
of
of
of
16 55Wednesday, March 19, 2008
16 55Wednesday, March 19, 2008
16 55Wednesday, March 19, 2008
8
NB1
NB1
NB1
1
,
6
2
3
4
5
6
7
8
14,16,19,22,36,48,51,53
A A
,19,22,36,48,51,53
B B
+1.1V_VCCP
C428
C428
12
2.2U
2.2U
X5R
X5R ±10
±10
и
и
6.3
6.3 0603
0603
+1.1V_VCCP
C505
C505 22U
22U
0805
0805
+1.5V_MEM12,14,18,23,24,25,26,45,47,48,52,53
C537
C521
и
и
C447
C447 10U/6.3V/0805
10U/6.3V/0805
C521
12
2.2U
2.2U
X5R
X5R ±10
±10
и
и
6.3
6.3 0603
0603
C427
C427
12
2.2U
2.2U
X5R
X5R ±10
±10
и
и
6.3
6.3 0603
0603
C504
C504 22U
22U
0805
0805
C429
C429
12
2.2U
2.2U
X5R
X5R ±10
±10
и
и
6.3
6.3 0603
0603
C506
C506 22U
22U
0805
0805
C541
C541
12
2.2U
2.2U
X5R
X5R ±10
±10
6.3
6.3 0603
0603
+1.1V_VCCP8,9,10,13,14,16,19,22,36,48,51,53
12
C494
C494 10U/6.3V/0805
10U/6.3V/0805
C537
2.2U
2.2U
X5R
X5R ±10
±10
6.3
6.3 0603
0603
и
и
C507
C507 10U/6.3V/0805
10U/6.3V/0805
C536
C532
C538
C538
12
2.2U
2.2U
X5R
X5R ±10
±10
6.3
6.3 0603
0603
C532
12
2.2U
2.2U
X5R
X5R ±10
±10
и
и
и
и
6.3
6.3 0603
0603
+1.1V_VCCP8,9,10,13,14,16,19,22,36,48,51,53
+1.1V_VCCP8,9,10,13,14,16,19,22,36,48,51,53
C536
12
2.2U
2.2U
X5R
X5R ±10
±10
6.3
6.3 0603
0603
+1.1V_VCCP8,9,10,13,14,16,19,22,36,48,51,53
C450
и
и
C483
C483 .1U/50V/0603
.1U/50V/0603
1 2
C436
C436 .1U/50V/0603
.1U/50V/0603
1 2
C450
12
2.2U
2.2U
X5R
X5R ±10
±10
и
и
6.3
6.3 0603
0603
C445
C445
12
2.2U
2.2U
X5R
C449
C449 .1U/50V/0603
.1U/50V/0603
C435
C435 .1U/50V/0603
.1U/50V/0603
X5R ±10
±10
6.3
6.3 0603
0603
и
и
C461
C460
C460 10U/6.3V/0805
10U/6.3V/0805
C433
C433 10U/6.3V/0805
10U/6.3V/0805
C461 10U/6.3V/0805
10U/6.3V/0805
C434
C434 .1U/50V/0603
.1U/50V/0603
1 2
1 2
1 2
C451
C451
12
2.2U
2.2U
X5R
X5R ±10
±10
и
и
6.3
6.3 0603
0603
12
12
12
C399
C399 22U
22U
±20
±20
6.3
6.3 0805
0805 X5R
X5R
C479
C479 22U
22U
±20
±20
6.3
6.3 0805
0805 X5R
X5R
C438
C438 22U
22U
и
и
±20
±20
6.3
6.3 0805
0805 X5R
X5R
и
и
+1.1V_VCCP 8,9,10,13,14,16,19,22,36,48,51,53
и
и
PCI-E signal transition stitching caps.
+1.1V_VCCP8,9,10,13,14,16,19,22,36,48,51,53
C417
C386
C386 .1U/50V/0603
.1U/50V/0603
1 2
C C
+1.1V_VCCP9,22,36,48,51,53
12
C442
C495
C495 10U/6.3V/0805
10U/6.3V/0805
D D
1
C484
C484 10U/6.3V/0805
10U/6.3V/0805
2
C496
C496 10U/6.3V/0805
10U/6.3V/0805
C487
C487 10U/6.3V/0805
10U/6.3V/0805
C442 1U/10V/0603
1U/10V/0603
3
C417
.1U/50V/0603
.1U/50V/0603
1 2
12
C475
C475
1U/10V/0603
1U/10V/0603
C424
C424 .1U/50V/0603
.1U/50V/0603
1 2
12
C481
C481 1U/10V/0603
1U/10V/0603
4
12
C457
C457 1U/10V/0603
1U/10V/0603
http://hobi-elektronika.net
12
C458
C458 1U/10V/0603
1U/10V/0603
V_1P1_CL 13,14
C184
C184 10U/6.3V/0805
10U/6.3V/0805
12
C443
C443 1U/10V/0603
1U/10V/0603
5
12
C444
C444 1U/10V/0603
1U/10V/0603
C183
C183 10U/6.3V/0805
10U/6.3V/0805
12
C459
C459 1U/10V/0603
1U/10V/0603
6
C452
C476
C476
12
2.2U
2.2U
X5R
X5R ±10
±10
6.3
6.3 0603
0603
C452
12
2.2U
2.2U
X5R
X5R ±10
±10
и
и
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6.3
6.3 0603
0603
Title
Title
Title
Eaglelake (9 of 10)
Eaglelake (9 of 10)
Eaglelake (9 of 10)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
+3.3V_RUN +3.3V_RUN
C400
Nike
Nike
Nike
C400
4.7U/10V
4.7U/10V
1 2
NB1
NB1
NB1
of
of
of
17 55Wednesday, March 19, 2008
17 55Wednesday, March 19, 2008
17 55Wednesday, March 19, 2008
8
C407
C407 .1U/50V/0603
.1U/50V/0603
1 2
C482
C482
12
2.2U
2.2U
X5R
X5R ±10
±10
6.3
6.3 0603
0603
Quanta Computer Inc.
Quanta Computer Inc.
Quanta Computer Inc.
?1A
?1A
?1A
7
C474
C474
12
2.2U
2.2U
X5R
X5R ±10
±10
и
и
Project Name:
Project Name:
Project Name:
6.3
6.3 0603
0603
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