Dell KAT00 Schematics

http://mycomp.su/x/

A

B

C

D

E

odel Name:

M

1 1

PCB NO:

BOM P/N:

2 2

KAT00 UMA
LA-5152P
43169631L01

Compal Confidential

Schematic Document

POITIER Montevina

3 3

2008 / 06 / 15

MB PCB

MB PCB

Part Number Description

4 4

Part Number Description

DA80000E510

DA80000E510

A

PCB 080 LA-5152P

PCB 080 LA-5152P
REV1 UMA M/B

REV1 UMA M/B

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

B

C

Rev:1.0

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

D

Date: Sheet of

Compal Electronics, Inc.

Cover Sheet

Cover Sheet

Cover Sheet

LA-5152P

LA-5152P

LA-5152P

1 51Monday, June 15, 2009

1 51Monday, June 15, 2009

1 51Monday, June 15, 2009

E

A00

A00

A00

http://mycomp.su/x/

5

lock Diagram

B
C

ompal confidential

Model : KAT00

D D

CRT CONN

+5VS

LVDS CONN

+LCDVDD
+3.3V_ALW

P.35

P.35

F

AN

5V_ALW

+
+3V_ALW

P

.7

3.3V_ALW

+

DP CONN

+5VS

HDMI CONN

+5VS

C C

To Card-reader subboard

8 IN 1 CONN

+3VS

IEEE1394

B B

Mini Card 3

TV Tunner

+3VS

DC IN

DC/DC Interface

P.37~44 P.44

A A

P.37

HDMI
Level shift

P.36

+5VS

P.36

P.30

CardBus

OZ888GS0

+3VS
+1.8VS

Express Card

P.29

Mini Card 2

WLAN

P.28 P.27 P.27

+3VS
+1.5VS+1.5VS

USB[x]

P.38

BATT IN

ME & LEDPower Sequence

P.34

5

CHARGER

4

T

hermal

MC1402

E

VGA

LVDS

DPB

DPC

PCI Express BUS

PCIE1PCIE2PCIE3

Mini Card 1

WWAN

+3VS
+1.5VS

USB[x]USB[x]

1.5V/0.75V

3V/5V

1.05V/1.8V

4

P.7

P

entium-M

P

+

1.5VS

+1.05V_VCCP

+

VCC_CORE

H

_A#(3..35) H_D#(0..63)

enryn -4MB (Socket P)

u

FCPGA CPU

4

78pin

System Bus

FSB 1066 MHz

INTEL

Cantiga

+1.5VS

+1.05V_VCCP

+3.3VS

1329pin BGA

P.10,11,12,13,14,15,16

DMI

+1.5VS
100MHz

+5V_ALW

+5VS

+RTC_CELL

+3.3VS

+3.3V_ALW_ICH

+1.5VS

+1.05V_VCCP

GPIO5

INTEL

ICH9-M

676pin BGA

P.19,20,21,22,23

LPC BUS

FFS

P.20

+3VS
33MHz

ENE KBC

KB926QFD3

+RTC_CELL

+3.3V_ALW

P.42

Int.KBD &
BL

P.40P.39

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT

P.41

BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

3

P.7,8,9

USB2.0

S-ATA(1)

PCI-E

Azalia I/F

S-ATA(3)

SATA2

E-ODD

+3VS

+5VS

P.30

Touch Pad

P.31P.31

+

+1.5V 1066 MHz

S-HDD-2

+3VS

P.28

SPI

P.28 P.28

+5VS

Flash ROM

16Mx1sector

MMB

To MMB subboard

2

C

PU ITP Port

1.05VS_CK505

M

emory BUS (DDR3)

Right Front Side.

Right behind side.

SATA0SATA1

S-HDD-1

+3VS

+5VS

P.30

P.32

+3.3VS

2

P

.7

+3.3V_ALW

Azalia Codec

92HD73C

+3.3VS
+VDDA

AMP

MAX4411x2

P.25

HeadPhone &
MIC Jack

1

C

lock Generator

C

K505

I

CS9LPRS387AKLFT

+

3VS_CK505

+1.05VS_CK505

DRIII-DIMM X2

D

B

ANK 0, 1, 2, 3, 4 ,5 ,6 ,7 ,8

+1.5V

USB Port X1

+5V_ALW

USB Port1 X1

+5V_ALW

Bluetooth

Touch Screen

Camera

P.6

P.17,18

To Card-reader
subboard

To Single USB
subboard

P.29

P.32

P.30

Charge USB/E-SATA
Ports X1

+5V_ALW

RTL8111DL

P.25

P.24

AMP

MAX9736A

B+

AMP

MAX9736A

B+

P.26

P.26

P.30

RJ45

Speaker

Subwoofer

Dig. MIC

P.29

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Block Diagram

Block Diagram

Block Diagram

LA-5152P

LA-5152P

LA-5152P

2 51Monday, June 15, 2009

2 51Monday, June 15, 2009

2 51Monday, June 15, 2009

1

P.30

P.30

A00

A00

A00

http://mycomp.su/x/

A

Voltage Rails

O MEANS ON X MEANS OFF

Symbol Note :

power
plane

+B

State

1 1

S0

S1

S3

S5 S4/AC

S5 S4/ Battery only

S5 S4/AC & Battery
don't exist

O

O

O

O

O

X

+5VALW

+3VALW

O

O

O

O

X

X X X

+1.5V

O

X X

X

+5VS

+3VS

+1.8VS

+1.5VS

+1.1VS

+VCCP

+0.75VS

+CPU_CORE

OO

OO

X

X

: means Digital Ground

: means Analog Ground

@ : means just reserve , no build
DEBUG@ : means just reserve for debug.

USB Port

0

1

2

3

4

5

6

7

8

9

10

11

Device

USB&ESATA
Reader/BD

USB board
NC

WLAN
WWAN
WPAN
Express

NC
Touch screen
Bluetooth

Camera

SATA Port

0

1

2

3

Device

JSATA2
JSATA1

JESA1
JODD

PCIE Port

1

2

3

4

5

6

Device

JWWAN1
JWLAN1

JWPAN1

Reader/BD (OZ888)

JEXP1
RTL8111DL

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Note List

Note List

Note List

LA-5152P

LA-5152P

LA-5152P

3 45Monday, June 15, 2009

3 45Monday, June 15, 2009

3 45Monday, June 15, 2009

1A

1A

1A

http://mycomp.su/x/

5

4

3

2

1

D D

V

R_ON

SL6266ACRZ-T

I
(PU10)

4

4000mA

CPU_CORE

+

I4392DY

S

(Q45)

7700mA

1.5VS

+

ADAPTER

B+

SYSON

BATTERY

SUSP#

CHARGER

C C

SUSP#

TPS51117RGYR
(PU8)

TPS51117RGYR
(PU6)

TPS51427

9794mA

9857mA

+1.5V

+1.05V_VCCPP

SUSP#

0 Ohm

RT9026
(PU11)

+1.05VS_CK505

?mA

+0.75VS

(PU5)

+5VALW

R03 modify

4400mA

SUSP

4800BDY

(Q5)

2000mA 7700mA 669mA160mA 20mA

USB_EN#

TPS2062ADR
(U17)

EN_EOL#

SI3456BDY
(Q3)

+LAN_IO

+5VS

+5V_CHGUSB

EN_EOL#

RTL8111DL

B B

FUSE

0 Ohm

0 Ohm

+CRT_VCC

+AVDD_AUDIO

+5VS_KBL

(U9)

+LAN_VDD

+3VALW

SUSP

FBM-11-160808-601-T
(L29)

+EC_AVCC

R03 modify

SUSP

SI4392DY

(Q50)

+3VS

0 Ohm

0 Ohm

0 Ohm

0 Ohm

+3VS_CK505

+DVDD_AUDIO

+3V_WLAN

+3V_WLAN

SUSP#

RT9025
(PU13)

+1.8VS

VDDEN

SI2310BDS-T1-E3

(Q25)

+LCDVDD

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Power Rail

Power Rail

Power Rail

LA-5152P

LA-5152P

LA-5152P

4 51Monday, June 15, 2009

4 51Monday, June 15, 2009

4 51Monday, June 15, 2009

1

A00

A00

A00

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

http://mycomp.su/x/

5

D D

G16

A

13

ICH9-M

4

ICH_SMBCLK

I

CH_SMBDATA

2

.2K

2.2K

10K

3VALW

+

3

2

N7002

2N7002

I

CH_SM_DA

ICH_SM_CLK

2

.2K

2.2K

2

202

200

202

00

+

3.3VS

D

IMMA

DIMMB

2

S

MBUS Address 0xA0

SMBUS Address 0XA4

1

10

9

CLK GEN

SMBUS Address Read D3 (H)
SMBUS Address Write D2 (H)

FFS

4.7K

C C

77

78

EC_SMB_CK1

EC_SMB_DA1

SCL1

SDA1

4.7K

+3VALW

100 ohm

100 ohm

7

6

BATTERY

CONN

4.7K

4.7K

KBC

SCL2

SDA2

KB926QFD3

112

111

EC_SMB_CK2

EC_SMB_DA2

4.7K

4.7K

17

EC_FB_SCLK

18

B B

EC_FB_DATA

+3VS

+3VS

MMB

Need make sure EC will disable this SMB port in S5 /AC mode.

32

30

32

30

32

30

32

30

8

7

WLAN

WPAN

WWAN

EXPRESS
CARD

Thermal
Sensor

SMBUS Address [TBD]

SMBUS Address [TBD]

SMBUS Address [TBD]

SMBUS Address [TBD]

SMBUS Address: 100_1100 b

I2C / SMBUS ADDRESSING

DEVICE

DDR SO-DIMM 0

HEX

A0

DDR SO-DIMM 1

CLOCK GENERATOR (EXT.)

A A

D2

ADDRESS

1 0 1 0 0 0 0 0

1 0 1 0 0 1 0 0A4

1 1 0 1 0 0 1 0

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

SMBUS TOPOLOGY

SMBUS TOPOLOGY

SMBUS TOPOLOGY

LA-5152P

LA-5152P

LA-5152P

5 45Monday, June 15, 2009

5 45Monday, June 15, 2009

5 45Monday, June 15, 2009

1

3.0

3.0

3.0

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

http://mycomp.su/x/

5

outing the trace at least 10mil

R

@

@

R

R

2

2

0_0402_5%

0_0402_5%

1 2

14.318MHZ_16PF_7A14300083

14.318MHZ_16PF_7A14300083

22P_0402_50V8J~D

22P_0402_50V8J~D

2

C

D D

C
8

8

1

CPU_STP

CLK_DEBUG_PORT<27>

CLK_PCI_EC<31>

C C

B B

PCI_CLK<20>

CK_PWRGD<21>

CLK_48M_ICH<21>

CLK_14M_ICH<21>

R02 RF reserve part.

FSC FSB REF

CLKSEL1

CLKSEL2

*

LK_XTAL_OUT

C

C

LK_XTAL_IN

Y

Y

1

1

12

22P_0402_50V8J~DC922P_0402_50V8J~D

2

C9

1

10K_0402_5%

10K_0402_5%

H_STP_CPU#<21>

H_STP_PCI#<21>

R941 33_0402_1%R941 33_0402_1%

1 2

R20 33_0402_1%R20 33_0402_1%

1 2

R24 33_0402_1%R24 33_0402_1%

1 2

10P_0402_50V8J~D

10P_0402_50V8J~D

10P_0402_50V8J~D

10P_0402_50V8J~D

C

C
1534

1534

@

@

1

2

C1533

C1533

1

1

2

2

@

@

R38 33_0402_1%R38 33_0402_1%

1 2

(14.318 reference output)

R41 33_0402_1%R41 33_0402_1%

1 2

10P_0402_50V8J~D

10P_0402_50V8J~D

10P_0402_50V8J~D

10P_0402_50V8J~D

@

@

@

@

1

C

C

C

C

1540

1540

1531

1531

2

FSA

CLKSEL0

0

+

3VS_CK505

+

1.05VS_CK505

+3VS_CK505

12

12

R548

@R548

@

R02 RF reserve part.

CPU
MHz

266

@R549

@

10K_0402_5%

10K_0402_5%

SRC
MHz

1000

R549

PCI2_TME

R_CLK_PCI_EC

27_SEL

ITP_EN

CLK_XTAL_IN

CLK_XTAL_OUT

FSB

H_STP_CPU#

H_STP_PCI#

FSA

FSC

T1PAD T1PAD

PCI
MHz

33.30

U

U

1

1

6

DDREF

V

19

DD48

V

72

V

DDCPU

12

V

DDPCI

27

V

DDPLL3

55

DDSRC

V

52

V

DDSRC_IO

38

VDDSRC_IO

62

VDDSRC_IO

31

VDDPLL3_IO

66

VDDCPU_IO

23

VDD96_IO

53

CPU_STOP#

54

PCI_STOP#

13

PCI1

14

PCI2/TME

15

PCI3

16

PCI4/27_SELECT

17

PCI_F5/ITP_EN

1

CK_PWRGD/PD#

5

X1

4

X2

11

NC

20

USB_48MHz/FSLA

2

FSLB/TEST_MODE

7

FSLC/TEST_SEL/REF0

8

REF1

69

GNDCPU

3

GNDREF

18

GNDPCI

22

GND48

30

GND

26

GND

34

GNDSRC

59

GNDSRC

42

GNDSRC

ICS9LPRS387BKLFT_MLF72_10x10

ICS9LPRS387BKLFT_MLF72_10x10

DOT_96

MHz

MHz

14.318 96.0 48.0

0 1000 133 33.31 14.318 96.0 48.0

0 1001 200 33.30 14.318 96.0 48.0

A A

0 1001 166 33.31 14.318 96.0 48.0

1 1000 333 33.30 14.318 96.0 48.0

1 1000 100 33.31 14.318 96.0 48.0

1 1001 400 33.30 14.318 96.0 48.0

1 1 1

5

Reserved

4

S

SRCC0_LPR/DOTC_96_LPR

27MHz_NonSS/SRCT1_LPR/SE1

27MHz_SS/SRCC1_LPR/SE2

CPUT2_ITP_LPR/SRCT8_LPR

CPUC2_ITP_LPR/SRCC8_LPR

B version P/N :
SA000020H10

USB
MHz

4

S

DATA

S

CLK

C

PUT0_LPR_F

C

PUC0_LPR_F

PUT1_LPR_F

C

C

PUC1_LPR_F

RCT0_LPR/DOTT_96_LPR

SRCT2_LPR/SATAT_LPR

SRCC2_LPR/SATAC_LPR

SRCT3_LPR

SRCC3_LPR

SRCT4_LPR

SRCC4_LPR

SRCT6_LPR

SRCC6_LPR

SRCT7_LPR

SRCC7_LPR

SRCT9_LPR

SRCC9_LPR

SRCT10_LPR

SRCC10_LPR

SRCT11_LPR

SRCC11_LPR

CR#3

CR#4

CR#6

CR7#

CR#9

CR10#

CR#11

CR#A

FSA

R48 2.2K_0402_5%R48 2.2K_0402_5%

CPU_BSEL0<8>

FSB

CPU_BSEL1<8>

FSC

CPU_BSEL2<8>

LK_SMBDATA

C

9

C

LK_SMBCLK

10

R

_CPU_BCLK

71

R

_CPU_BCLK#

70

R

_MCH_BCLK

68

R

_MCH_BCLK#

67

R

_MCH_DREFCLK

24

R_MCH_DREFCLK#

25

28

29

R_CLK_SATA

32

R_CLK_SATA#

33

R_CLK_EXPR

35

R_CLK_EXPR#

36

R_CLK_PCIE_WLAN

39

R_CLK_PCIE_WLAN#

40

R_CLK_WAN

57

R_CLK_WAN#

56

R_CLK_CB

61

R_CLK_CB#

60

R_DMI_ICH

64

R_DMI_ICH#

63

R_CLK_PCIE_GLAN

44

R_CLK_PCIE_GLAN#

45

R_CLK_WPAN

50

R_CLK_WPAN#

51

R_MCH_3GPLL

48

R_MCH_3GPLL#

47

37

41

58

65

43

49

46

21

1 2

R54 0_0402_5%R54 0_0402_5%

1 2

R55 10K_0402_5%R55 10K_0402_5%

1 2

3

evel shift on ICH side.

L

4

4

R

R

@

@

R

R

3

3

@

@

5

5

R

R

@

@

R

R

6 0_040 2_5%

6 0_040 2_5%

@

@

R

R

7 0_040 2_5%

7 0_040 2_5%

@

@

R

R

8 0_0402_5%

8 0_0402_5%

@

@

R

10

@R10

@

R12 0_0402_5%@R12 0_0402_5%@

R42 0_0402_5%

R42 0_0402_5%

@

@

R43

R43

@

@

R16

R16

@

@

R17

R17

@

@

R18 0_0402_5%

R18 0_0402_5%

@

@

R19 0_0402_5%

R19 0_0402_5%

@

@

R21 0_0402_5%

R21 0_0402_5%

@

@

R23

R23

@

@

R26

R26

@

@

R28

R28

@

@

R31

@ R31

@

R33

@ R33

@

R35 0_0402_5%

R35 0_0402_5%

@

@

R37 0_0402_5%

R37 0_0402_5%

@

@

R40

R40

@

@

R39

R39

@

@

R14 0_0402_5%

R14 0_0402_5%

@

@

R15 0_0402_5%

R15 0_0402_5%

@

@

R44 0_0402_5%

R44 0_0402_5%

@

@

R49 1K_0402_5%R49 1K_0402_5%

R53 1K_0402_5%R53 1K_0402_5%

R56 1K_0402_5%R56 1K_0402_5%

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

3

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

12

12

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

0_0402_5%

CH_SM_DA <17,18,20,21>

I

I

CH_SM_CLK <17,18,20,21>

C

LK_CPU_BCLK <7>

C

LK_CPU_BCLK# <7>

C

LK_MCH_BCLK <10>

C

LK_MCH_BCLK# <10>

C

LK_MCH_DREFCLK <11>

CLK_MCH_DREFCLK# <11>

MCH_SSCDREFCLK <11>

MCH_SSCDREFCLK# <11>

CLK_PCIE_SATA <19>

CLK_PCIE_SATA# <19>

CLK_PCIE_EXPR <28>

CLK_PCIE_EXPR# <28>

CLK_PCIE_WLAN <27>

CLK_PCIE_WLAN# <27>

CLK_PCIE_WAN <27>

CLK_PCIE_WAN# <27>

CLK_PCIE_CB <30>

CLK_PCIE_CB# <30>

CLK_DMI_ICH <22>

CLK_DMI_ICH# <22>

CLK_PCIE_GLAN <24>

CLK_PCIE_GLAN# <24>

CLK_PCIE_WPAN <28>

CLK_PCIE_WPAN# <28>

CLK_MCH_3GPLL <11>

CLK_MCH_3GPLL# <11>

EXP_CLKREQ# <28>

WLAN_CLKREQ# <27>

WWAN_CLK REQ# <27>

CB_CLKREQ# <30>

GLAN_CLKREQ# <24>

WPAN_CLKREQ# <28>

MCH_CLKREQ# <11>

CLKSATAREQ# <21>

MCH_CLKSEL0 <11>

MCH_CLKSEL1 <11>

MCH_CLKSEL2 <11>

C

Cardbus

DMI (ICH)

PU

MCH

VGA (UMA)

SATA

Express Card

WLAN

WWAN

GLAN

WPAN

MCH_3GPLL

2

+

3VS_CK505

1

1

R

R

1 2

3VS

+

0_0805_5%

0_0805_5%

+

1.05V_VCCP

R

R

13

13

1 2

0_0805_5%

0_0805_5%

+

1.05VS_CK505

ITP_EN

27_SEL 0 = PIN 24/25 : DOT96 / DOT96#

PCI2_TME

+3VS_CK505 +3VS_CK505 +3VS_CK505

12

R45
10K_0402_5%

10K_0402_5%

ITP_EN 27_SEL PCI2_TME

12

R50

R50
10K_0402_5%

10K_0402_5%

2

0.1U_0402_10V7K~DC20.1U_0402_10V7K~D

22U_0805_6.3V6M~DC122U_0805_6.3V6M~D

1

1

C1

2

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

1

C10

C10

2

2

EXP_CLKREQ#

WLAN_CLKREQ#

WWAN_CLK REQ#

CB_CLKREQ#

GLAN_CLKREQ#

WPAN_CLKREQ#

MCH_CLKREQ#

CLKSATAREQ#

Port Device REQ#

SRC0

SRC2

SRC3

SRC4

SRC6

SRC7

SRC8

SRC9

SRC10

SRC11

PCIE_VGA

PCIE_SATA

PCIE_EXPR

PCIE_WLAN

PCIE_WWAN

PCIE_CB

DMI_ICH

PCIE_GLAN

PCIE_WPAN

MCH_3GPLL

0 = SRC8/SRC8#

*

1 = ITP/ITP#

*

PIN 28/29 : LCDCLK / LCDCLK#
1 = PIN 24/25 : SRC_0 / SRC_0#
PIN 28/29 : 27M / 27M_SS

0.1U_0402_10V7K~DC30.1U_0402_10V7K~D

1

C2

C3

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C11

C11

C12

C12

2

R34

R34

R32 10K_0402_5%R32 10K_0402_5%

R25 10K_0402_5%R25 10K_0402_5%

R22

R22

R30

R30

R27

R27

R36 10K_0402_5%R36 10K_0402_5%

R29 10K_0402_5%R29 10K_0402_5%

1

2

1

2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

1 2

REQ_A#

REQ#3

REQ#4

REQ#6

REQ#7

REQ#9

REQ#10

REQ#11

0.1U_0402_10V7K~DC40.1U_0402_10V7K~D

1

C4

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C13

C13

2

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

10K_0402_5%

REQ#_NAME

CLKSATAREQ#

EXP_CLKREQ#

WLAN_CLKREQ#

WAN_CLKREQ#

CB_CLKREQ#

GLAN_CLKREQ#

WPAN_CLKREQ#

MCH_CLKREQ#

0 = Overclocking of CPU and SRC Allowed

1 = Overclocking of CPU and SRC NOT allowed

*

12

R46

@R46

@R45

@

@

10K_0402_5%

10K_0402_5%

12

R51

R51
10K_0402_5%

10K_0402_5%

0103 modify it.

1 2

1 2

R47

R47
10K_0402_5%

10K_0402_5%

R52

@R52

@

10K_0402_5%

10K_0402_5%

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Clock Generator CK505

Clock Generator CK505

Clock Generator CK505

LA-5152P

LA-5152P

LA-5152P

1

0.1U_0402_10V7K~DC50.1U_0402_10V7K~D

C5

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C14

C14

+3VS

0103 modify it.

1

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

C7

C6

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C15

C15

C16

C16

2

A00

A00

6 51Monday, June 15, 2009

6 51Monday, June 15, 2009

6 51Monday, June 15, 2009

A00

0.1U_0402_10V7K~DC70.1U_0402_10V7K~D

0.1U_0402_10V7K~DC60.1U_0402_10V7K~D

1

http://mycomp.su/x/

5

D D

4

3

DP / ITP

X

2

X

DP_TDI

R

R

57 54.9_0402_1 %

57 54.9_0402_1 %

X

DP_TMS

X

DP_TRST#

X

DP_TCK

T

his shall place near CPU

1 2

R

R

58 54.9_0402_1 %

58 54.9_0402_1 %

1 2

R

R

59 54.9_0402_1 %

59 54.9_0402_1 %

1 2

60 54.9_0402_1 %

60 54.9_0402_1 %

R

R

1 2

1.05V_VCCP

+

1

3 1

@

@

8

7

6

5

R237

R237

1 2

0_0402_5%

0_0402_5%

+FAN1_POWER

+5VS

40mil

+FAN1_POWER

+1.05V_VCCP

12

R61

@R61

@

56_0402_5%

56_0402_5%

B

B

2

E

E

C

C

Q1

Q1
MMBT3904_SOT23

MMBT3904_SOT23

EC_SMB_CK2

EC_SMB_DA2

MAINPWON <40,44>

1
2
3
4

OCP# <21>

EC_SMB_CK2 <27,28,31>

EC_SMB_DA2 <27,28,31>

1 2

C21 10U_0805_10V4 Z~DC21 10U_0805_10V4Z~D

U3

U3

VEN
VIN
VO
VSET

RT9027BPS_SO8

RT9027BPS_SO8

1
2

MOLEX_53261-0371~D

MOLEX_53261-0371~D

JFAN1

JFAN1

1
2
33G

CONN@

CONN@

8

GND

7

GND

6

GND

5

GND

4

G

5

CONN@

H_A#[3..16]<10>

H_ADSTB#0<10>

H_REQ#0<10>
H_REQ#1<10>
H_REQ#2<10>
H_REQ#3<10>

C C

B B

A A

H_REQ#4<10>

H_A#[17..35]<10>

H_ADSTB#1<10>

H_A20M#<19>

H_FERR#<19>

H_IGNNE#<19>

H_STPCLK#<19>

H_INTR<19>

H_NMI<19>

H_SMI#<19>

H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_ADSTB#0

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_ADSTB#1

H_A20M#
H_FERR#
H_IGNNE#

H_STPCLK#
H_INTR
H_NMI
H_SMI#

CONN@

JCPU1A

JCPU1A

J4

ADDR GROUP 0 ADDR GROUP 1

ADDR GROUP 0 ADDR GROUP 1

A[3]#

L5

A[4]#

L4

A[5]#

K5

A[6]#

M3

A[7]#

N2

A[8]#

J1

A[9]#

N3

A[10]#

P5

A[11]#

P2

A[12]#

L2

A[13]#

P4

A[14]#

P1

A[15]#

R1

A[16]#

M1

ADSTB[0]#

K3

REQ[0]#

H2

REQ[1]#

K2

REQ[2]#

J3

REQ[3]#

L1

REQ[4]#

Y2

A[17]#

U5

A[18]#

R3

A[19]#

W6

A[20]#

U4

A[21]#

Y5

A[22]#

U1

A[23]#

R4

A[24]#

T5

A[25]#

T3

A[26]#

W2

A[27]#

W5

A[28]#

Y4

A[29]#

U2

A[30]#

V4

A[31]#

W3

A[32]#

AA4

A[33]#

AB2

A[34]#

AA3

A[35]#

V1

ADSTB[1]#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD[01]

N5

RSVD[02]

T2

RSVD[03]

V3

RSVD[04]

B2

RSVD[05]

C3

RSVD[06]

D2

RSVD[07]

D22

RSVD[08]

D3

RSVD[09]

F6

RSVD[10]

Penryn

Penryn

DEFER#

DRDY#
DBSY#

IERR#

LOCK#

CONTROL

CONTROL

RESET#

RS[0]#
RS[1]#
RS[2]#

TRDY#

HITM#

BPM[0]#
BPM[1]#
BPM[2]#
BPM[3]#

PRDY#
PREQ#

TRST#

XDP/ITP SIGNALS

XDP/ITP SIGNALS

THERMAL

THERMAL

PROCHOT#

THERMDA

THERMDC

ICH

ICH

THERMTRIP#

H CLK

H CLK

BCLK[0]
BCLK[1]

RESERVED

RESERVED

ADS#
BNR#
BPRI#

BR0#

INIT#

HIT#

TCK

TDO
TMS

DBR#

TDI

H1
E2
G5

H5
F21
E1

F1

D20
B3

H4

C1
F3
F4
G3
G2

G6
E4

AD4
AD3
AD1
AC4
AC2
AC1
AC5
AA6
AB3
AB5
AB6
C20

D21
A24
B25

H_THERMTRIP#

C7

A22
A21

H_ADS#
H_BNR#
H_BPRI#

H_DEFER#
H_DRDY#
H_DBSY#

H_BR0#

H_IERR#
H_INIT#

H_LOCK#

H_RESET#
H_RS#0
H_RS#1
H_RS#2
H_TRDY#

H_HIT#
H_HITM#

XDP_TCK
XDP_TDI
XDP_TDO
XDP_TMS
XDP_TRST#
XDP_DBRESET#

H_PROCHOT#

CLK_CPU_BCLK

12

R932

R932
100_0402_1%

100_0402_1%

CLK_CPU_BCLK#

H_ADS# <10>
H_BNR# <10>
H_BPRI# <10>

H_DEFER# <10>

H_DRDY# <10>
H_DBSY# <10>

H_BR0# < 10>

H_INIT# <19>

H_LOCK# <10>

H_RESET# <10>
H_RS#0 < 10>
H_RS#1 < 10>
H_RS#2 < 10>

H_TRDY# <10>

H_HIT# <10>
H_HITM# <10>

T2T2

XDP_DBRESET# <21>

R63 68_0402_5%R63 68_0402_5%

H_THERMDA
H_THERMDC

H_THERMTRIP# <11,19>

CLK_CPU_BCLK <6>

Qual core request

CLK_CPU_BCLK# <6>

12

H_THERMDA, H_THERMDC
routing together,Trace width /
Spacing = 10 / 10 mil

+1.05V_VCCP

Control

+1.05V_VCCP

Qual core 50 ohm

H_IERR#

+3VS

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C17

C17

2

2200P_0402_50V7K~D

2200P_0402_50V7K~D

C18

C18

1 2

+3VS

CPU_THERM_STP#

R64

R64

1 2

10K_0402_5%

10K_0402_5%

To power

FAN Control circuit

EN_DFAN1<31>

FAN_SPEED1<31>

R62

R62

49.9_0402_1%

49.9_0402_1%

1 2

H_THERMDA

H_THERMDC

CPU_THERM_STP#

CPU_THERM_STP#

VR_ON<31,43>

EN_DFAN1

+3VS

12

2

1

Thermal

H_PROCHOT# OCP#

Thermal Sensor EMC1402-1-ACZL-TR

U2

U2

1

VDD

2

DP

3

DN

4

THERM#

EMC1402-1-ACZL-TR_MSOP8

EMC1402-1-ACZL-TR_MSOP8

Address:100_1100

VR_ON

R65

R65
10K_0402_5%

10K_0402_5%

C22

C22

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

SMCLK

SMDATA

ALERT#

GND

Q29

Q29

2N7002W-7-F_SOT323-3~D

2N7002W-7-F_SOT323-3~D

D

S

D

S

13

G

G

2

C19

C19

10U_0805_10V4Z~D

10U_0805_10V4Z~D

12

C20

C20

12

1000P_0402_50V7K~D

1000P_0402_50V7K~D

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Penryn(1/3)-AGTL+/ITP-XDP

Penryn(1/3)-AGTL+/ITP-XDP

Penryn(1/3)-AGTL+/ITP-XDP

LA-5152P

LA-5152P

LA-5152P

7 51Monday, June 15, 2009

7 51Monday, June 15, 2009

7 51Monday, June 15, 2009

1

A00

A00

A00

http://mycomp.su/x/

5

4

3

2

1

CPU_CORE

+

CONN@

G22

G25

G24

M24

M23

M26

AD26

AF26

E22
F24
E26

F23

E25
E23
K24

H22
F26
K22
H23

H26
H25

N22
K25
P26
R23
L23

L22

P25
P23
P22
T24
R24
L25
T25
N25
L26

N24

C23
D25
C24

AF1
A26

B22
B23
C21

J24
J23

J26

CONN@

J

J

CPU1B

CPU1B

D

[0]#

D

[1]#
[2]#

D

[3]#

D
D

[4]#
[5]#

D
D

[6]#

D

[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#

D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#

GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

BSEL[0]
BSEL[1]
BSEL[2]

Penryn

Penryn

DATA GRP 1

DATA GRP 1

MISC

MISC

DATA GRP 0

DATA GRP 0

D

[32]#

D

[33]#
[34]#

D

[35]#

D
D

[36]#
[37]#

D
D

[38]#

D

[39]#
D[40]#
D[41]#
D[42]#
D[43]#
D[44]#
D[45]#

DATA GRP 2DATA GRP 3

DATA GRP 2DATA GRP 3

D[46]#
D[47]#

DSTBN[2]#
DSTBP[2]#

DINV[2]#

D[48]#
D[49]#
D[50]#
D[51]#
D[52]#
D[53]#
D[54]#
D[55]#
D[56]#
D[57]#
D[58]#
D[59]#
D[60]#
D[61]#
D[62]#
D[63]#

DSTBN[3]#
DSTBP[3]#

DINV[3]#

COMP[0]
COMP[1]
COMP[2]
COMP[3]

DPRSTP#

DPSLP#
DPWR#

PWRGOOD

SLP#

PSI#

Y22
AB24
V24
V26
V23
T22
U25
U23
Y25
W22
Y23
W24
W25
AA23
AA24
AB25
Y26
AA26
U22

AE24
AD24
AA21
AB22
AB21
AC26
AD20
AE22
AF23
AC25
AE21
AD21
AC22
AD23
AF22
AC23
AE25
AF24
AC20

R26
U26
AA1
Y1

E5
B5
D24
D6
D7
AE6

H

_D#32
_D#33

H
H

_D#34

H

_D#35

H

_D#36

H

_D#37

H

_D#38

H

_D#39
_D#40

H
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_DSTBN#2
H_DSTBP#2
H_DINV#2

H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
H_DSTBN#3
H_DSTBP#3
H_DINV#3

COMP0
COMP1
COMP2
COMP3

H_DPRSTP#
H_DPSLP#
H_DPWR#
H_PWRGOOD
H_CPUSLP#
H_PSI#

_D#[32..47] <10>

H

H_DSTBN#2 <10>
H_DSTBP#2 <10>
H_DINV#2 <10>
H_D#[48..63] <10>

H_DSTBN#3 <10>
H_DSTBP#3 <10>
H_DINV#3 <10>

H_DPRSTP# <11,19,43>
H_DPSLP# <19>
H_DPWR# <10>
H_PWRGOOD <19>
H_CPUSLP# <10>
H_PSI# <43>

24.9_0402_1%

24.9_0402_1%

49.9_0402_1%

49.9_0402_1%

24.9_0402_1%

49.9_0402_1%

49.9_0402_1%

12

12

R67

R67

R66

R66

24.9_0402_1%

12

12

R69

R69

R68

R68

_D#[0..15]<10>

H

D D

H_DSTBN#0<10>
H_DSTBP#0<10>

H_DINV#0<10>

H_D#[16..31]<10>

C C

H_DSTBN#1<10>
H_DSTBP#1<10>

H_DINV#1<10>

T3T3
T4T4
T5T5
T6T6
T7T7
T8T8

CPU_BSEL0<6>
CPU_BSEL1<6>
CPU_BSEL2<6>

H

_D#0
_D#1

H
H

_D#2

H

_D#3

H

_D#4

H

_D#5

H

_D#6

H

_D#7
_D#8

H
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_DSTBN#0
H_DSTBP#0
H_DINV#0

H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_DSTBN#1
H_DSTBP#1
H_DINV#1

+V_CPU_GTLREF

TEST1
TEST2
TEST3
TEST4
TEST5
TEST6

CPU_BSEL0
CPU_BSEL1
CPU_BSEL2

layout note: Rout H_DPRSTP# from ICH9 to IMVP6 then to GMCH & CPU

layout note: Route TEST3 & TEST5 traces on ground referenced layer to the TPs

B B

FSB

BCLK BSEL2 BSEL1 BSEL0

533

133

0 0 1

667

166

800

200

110

1 00

Qual core value

1067 266 0 0 0

CONN@

CONN@

J

J

CPU1C

CPU1C

A7

CC[001]
CC[002]
CC[003]
CC[004]
CC[005]
CC[006]
CC[007]
CC[008]
CC[009]
CC[010]
CC[011]
CC[012]
CC[013]

CC[068]

V
V

CC[069]

V

CC[070]

V

CC[071]

V

CC[072]

V

CC[073]

V

CC[074]
CC[075]

V

CC[076]

V
V

CC[077]
CC[078]

V
V

CC[079]

V

CC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]

VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]

VCCA[01]
VCCA[02]

VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]

VCCSENSE

VSSSENSE

AA10
AA12
AA13
AA15
AA17
AA18
AA20

AC10
AB10
AB12
AB14
AB15
AB17
AB18

V

A9

V

A10

V

A12

V

A13

V

A15

V

A17

V

A18

V

A20

V

B7

V

B9

V

B10

V

B12

V

B14

VCC[014]

B15

VCC[015]

B17

VCC[016]

B18

VCC[017]

B20

VCC[018]

C9

VCC[019]

C10

VCC[020]

C12

VCC[021]

C13

VCC[022]

C15

VCC[023]

C17

VCC[024]

C18

VCC[025]

D9

VCC[026]

D10

VCC[027]

D12

VCC[028]

D14

VCC[029]

D15

VCC[030]

D17

VCC[031]

D18

VCC[032]

E7

VCC[033]

E9

VCC[034]

E10

VCC[035]

E12

VCC[036]

E13

VCC[037]

E15

VCC[038]

E17

VCC[039]

E18

VCC[040]

E20

VCC[041]

F7

VCC[042]

F9

VCC[043]

F10

VCC[044]

F12

VCC[045]

F14

VCC[046]

F15

VCC[047]

F17

VCC[048]

F18

VCC[049]

F20

VCC[050]

AA7

VCC[051]

AA9

VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]

AB9

VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]

Penryn

Penryn

For 8 layer condition.
Length match within 25 mils.
The trace width/space/other
is 20/7/25. Zo = 27.4 ohm.

+CPU_CORE

R70 100_0402_1%R70 10 0_0402_1%

1 2

R71 100_0402_1%R71 10 0_0402_1%

1 2

CPU_CORE

+

AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20

G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21

B26
C26

AD6
AF5
AE5
AF4
AE3
AF3
AE2

VCCSENSE

AF7

VSSSENSE

AE7

.

.

VCCSENSE

VSSSENSE

+1.05V_VCCP

220U_D2_4VY_R15M~D

220U_D2_4VY_R15M~D

1

+

+

2

CPU_VID0 <43>
CPU_VID1 <43>
CPU_VID2 <43>
CPU_VID3 <43>
CPU_VID4 <43>
CPU_VID5 <43>
CPU_VID6 <43>

VCCSENSE <43>

VSSSENSE <43>

C23

C23

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

1

C24

C24

2

2

Near pin B26

+1.5VS

10U_0805_6.3V6M~D

10U_0805_6.3V6M~D

C25

C25

Close to CPU pin

Close to CPU pin AD26
within 500mils. Zo = 55 ohm

+V_CPU_GTLREF

+V_CPU_GTLREF

A A

Cpu Quad Core, R=1.74K_0402_1%

Cpu Dual Core, R=2K_0402_1%

5

+1.05V_VCCP

12

R72

R72
1K_0402_1%

1K_0402_1%

12

R73

R73

1.74K_0402_1%

1.74K_0402_1%

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

4

3

within 500mils.

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Penryn(2/3)-AGTL+/ITP-XDP

Penryn(2/3)-AGTL+/ITP-XDP

Penryn(2/3)-AGTL+/ITP-XDP

LA-5152P

LA-5152P

LA-5152P

8 51Monday, June 15, 2009

8 51Monday, June 15, 2009

8 51Monday, June 15, 2009

1

A00

A00

A00

http://mycomp.su/x/

5

H

igh Frequence Decoupling

1

0uF 0805 X5R -> 85 degree.

D D

C C

B B

CONN@

CONN@

J

J

CPU1D

CPU1D

A4

V

SS[001]

A8

VSS[002]

A11

VSS[003]

A14

VSS[004]

A16

VSS[005]

A19

VSS[006]

A23

VSS[007]

AF2

VSS[008]

B6

VSS[009]

B8

VSS[010]

B11

VSS[011]

B13

VSS[012]

B16

VSS[013]

B19

VSS[014]

B21

VSS[015]

B24

VSS[016]

C5

VSS[017]

C8

VSS[018]

C11

VSS[019]

C14

VSS[020]

C16

VSS[021]

C19

VSS[022]

C2

VSS[023]

C22

VSS[024]

C25

VSS[025]

D1

VSS[026]

D4

VSS[027]

D8

VSS[028]

D11

VSS[029]

D13

VSS[030]

D16

VSS[031]

D19

VSS[032]

D23

VSS[033]

D26

VSS[034]

E3

VSS[035]

E6

VSS[036]

E8

VSS[037]

E11

VSS[038]

E14

VSS[039]

E16

VSS[040]

E19

VSS[041]

E21

VSS[042]

E24

VSS[043]

F5

VSS[044]

F8

VSS[045]

F11

VSS[046]

F13

VSS[047]

F16

VSS[048]

F19

VSS[049]

F2

VSS[050]

F22

VSS[051]

F25

VSS[052]

G4

VSS[053]

G1

VSS[054]

G23

VSS[055]

G26

VSS[056]

H3

VSS[057]

H6

VSS[058]

H21

VSS[059]

H24

VSS[060]

J2

VSS[061]

J5

VSS[062]

J22

VSS[063]

J25

VSS[064]

K1

VSS[065]

K4

VSS[066]

K23

VSS[067]

K26

VSS[068]

L3

VSS[069]

L6

VSS[070]

L21

VSS[071]

L24

VSS[072]

M2

VSS[073]

M5

VSS[074]

M22

VSS[075]

M25

VSS[076]

N1

VSS[077]

N4

VSS[078]

N23

VSS[079]

N26

VSS[080]
VSS[081]P3VSS[162]

Penryn

Penryn

V

SS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]

VSS[163]

P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25

+1.05V_VCCP

1

C62

C62

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

4

+

CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

2

+CPU_CORE

1

C58

C58

2

1

C63

C63

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

C

C

26

26

10U_0805_4VAM~D

10U_0805_4VAM~D

C36

C36
10U_0805_4VAM~D

10U_0805_4VAM~D

C46

C46
10U_0805_4VAM~D

10U_0805_4VAM~D

C52

C52
10U_0805_4VAM~D

10U_0805_4VAM~D

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

1

C59

C59

+

+

2

1

2

1

C

C
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

2

1

2

1

2

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

C60

C60

+

+

C64

C64

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

27

27

C37

C37
10U_0805_4VAM~D

10U_0805_4VAM~D

C47

C47
10U_0805_4VAM~D

10U_0805_4VAM~D

C53

C53
10U_0805_4VAM~D

10U_0805_4VAM~D

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

1

C61

C61

+

+

2

1

2

1

C

C

28

28

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C38

C38
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C48

C48
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C54

C54
10U_0805_4VAM~D

10U_0805_4VAM~D

2

330U_D2E_2.5VM_R9~D

330U_D2E_2.5VM_R9~D

1

+

+

2

C65

C65

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C66

C66

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

3

1

C

C

C

29

29

C39

C39

C49

C49

C55

C55

C

30

30

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C40

C40
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C50

C50
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C56

C56
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C

C

31

31

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C41

C41
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C51

C51
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C57

C57
10U_0805_4VAM~D

10U_0805_4VAM~D

2

2

1

C

C

32

32

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C42

C42
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C

C

33

33

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C43

C43
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C

C

34

34

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C44

C44
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C

C

35

35

10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

C45

C45
10U_0805_4VAM~D

10U_0805_4VAM~D

2

1

ESR <= 1.5m ohm

Capacitor > 880 uF

1

C67

C67

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Penryn(3/3)-AGTL+/ITP-XDP

Penryn(3/3)-AGTL+/ITP-XDP

Penryn(3/3)-AGTL+/ITP-XDP

LA-5152P

LA-5152P

LA-5152P

9 51Monday, June 15, 2009

9 51Monday, June 15, 2009

9 51Monday, June 15, 2009

1

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

A00

A00

A00

http://mycomp.su/x/

5

D D

C C

Layout Note :
H_RCOMP / H_VREF / H_SWNG
Trace width and spacing is 10 / 20

+1.05V_V CCP

12

R74

R74
221_040 2_1%

221_040 2_1%

H_SW NG

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

75_0402_1%

Near C5 pin

R76 16.9_0 402_1%R7 6 16 .9_0402_1%

1 2

75_0402_1%

12

1

R75

R75

C68

C68

2

Qual core

H_RCOMP

Qual core

+1.05V_V CCP

12

R77

R77
1K_0402 _1%

1K_0402 _1%

+H_VREF

12

1

@

@

C69

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

B B

C69

R78

R78

2K_0402 _1%

2K_0402 _1%

2

Within 100 mils from NB

H_RCOMP Dual core 24.9 ohm_1% pull down
Qual core 16.9 ohm_1% pull down
H_SWNG Dual core 100 ohm_1% pull down
Qual core 75 ohm_1% pull down

4

_D#[0..63]<8>

H

H_RESET #<7>

H_CPUSL P#<8>

H

_D#0

H

_D#1

H

_D#2
_D#3

H
H

_D#4
_D#5

H
H

_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63

H_SW NG
H_RCOMP

H_RESET #
H_CPUSL P#

+H_VREF

3

U

U

4A

4A

F2

H

_D#_0

G8

H

_D#_1

F8

H

_D#_2

E6

_D#_3

H

G2

H

_D#_4

H6

_D#_5

H

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA ES _FCBGA1329

CANTIGA ES _FCBGA1329

H_ADSTB#_0
H_ADSTB#_1

H_BREQ#

H_DEFER#

HOST

HOST

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_LOCK#
H_TRDY#

H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3

H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3

H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3

H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4

H

_A#_3

H

_A#_4

H

_A#_5

H

_A#_6
_A#_7

H
H

_A#_8
_A#_9

H
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35

H_ADS#

H_BNR#

H_BPRI#

H_HIT#
H_HITM#

H_RS#_0
H_RS#_1
H_RS#_2

A14
C15
F16
H13
C18
M16
J13
P16
R16
N17
M13
E17
P17
F17
G20
B19
J16
E20
H16
J20
L17
A17
B17
L16
C21
J17
H20
B18
K17
B20
F21
K21
L20

H12
B16
G17
A9
F11
G12
E9
B10
AH7
AH6
J11
F9
H9
E12
H11
C9

J8
L3
Y13
Y1

L10
M7
AA5
AE6

L9
M8
AA6
AE5

B15
K13
F13
B13
B14

B6
F12
C8

H

_A#3

H

_A#4

H

_A#5

H

_A#6
_A#7

H
H

_A#8
_A#9

H
H

_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35

H_ADS#
H_ADSTB #0
H_ADSTB #1
H_BNR#
H_BPRI#
H_BR0#
H_DEFER #
H_DBSY#
CLK_MCH _BCLK
CLK_MCH _BCLK#
H_DPW R#
H_DRDY#
H_HIT#
H_HITM#
H_LOCK#
H_TRDY#

H_DINV#0
H_DINV#1
H_DINV#2
H_DINV#3

H_DSTBN #0
H_DSTBN #1
H_DSTBN #2
H_DSTBN #3

H_DSTBP #0
H_DSTBP #1
H_DSTBP #2
H_DSTBP #3

H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4

H_RS#0
H_RS#1
H_RS#2

2

_A#[3..35] <7>

H

H_ADS# <7>
H_ADSTB #0 <7>
H_ADSTB #1 <7>
H_BNR# <7>

H_BPRI# <7>
H_BR0# <7>
H_DEFER # <7>

H_DBSY# <7>
CLK_MCH _BCLK <6>
CLK_MCH _BCLK# <6>

H_DPW R# <8>

H_DRDY# <7>

H_HIT# <7>
H_HITM# <7>

H_LOCK# <7>

H_TRDY# <7>

H_DINV#0 <8>

H_DINV#1 <8>

H_DINV#2 <8>

H_DINV#3 <8>

H_DSTBN #0 <8>

H_DSTBN #1 <8>

H_DSTBN #2 <8>

H_DSTBN #3 <8>

H_DSTBP #0 <8>

H_DSTBP #1 <8>

H_DSTBP #2 <8>

H_DSTBP #3 <8>

H_REQ#0 <7>
H_REQ#1 <7>
H_REQ#2 <7>
H_REQ#3 <7>
H_REQ#4 <7>

H_RS#0 <7 >
H_RS#1 <7 >
H_RS#2 <7 >

1

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: S heet o f

Date: S heet o f

3

2

Date: S heet o f

Compal Electronics, Inc.

Cantiga(1 of 7)

Cantiga(1 of 7)

Cantiga(1 of 7)

LA-5152P

LA-5152P

LA-5152P

A00

A00

10 51Monday, June 15 , 2009

10 51Monday, June 15 , 2009

10 51Monday, June 15 , 2009

1

A00

http://mycomp.su/x/

5

FG

C

C

79 2.21K_0402_1%@R79 2.21K_0402_1%@

R

D D

R

85 2.21K_0402_1%@R85 2.21K_0402_1%@

R

80 2.21K_0402_1%@R80 2.21K_0402_1%@

R86 2.21K_0402_1%@R86 2.21K_0402_1%@

R81 2.21K_0402_1%@R81 2.21K_0402_1%@

1 2

1 2

1 2

1 2

1 2

FG5

C

FG6

C

FG7

CFG9

CFG16

CFG[5:16] have internal pullup

+3VS

R87 4.02K_0402_1%@ R87 4.02K_0402_1%@

R88 4.02K_0402_1%@ R88 4.02K_0402_1%@

1 2

1 2

CFG19

CFG20

CFG[19:20] have internal pulldown

Strap Pin Table

CFG5

C C

B B

DMI X2 Select

iTPM Host

CFG6

Interface

Management

CFG7

Engine Crypto
Strap

PCI Express

CFG9

Graphic Lane

FSB Dynamic

CFG16

ODT

CFG19

DMI Lane
Reversal

Digital Display

CFG20

Port
Concurrent
Operation

SDVO_CRTL_DATA Low=No SDVO Device Present

DDPC_CTRLDATA

PM

+3VS

+3VS

ICH_PWROK<21,31>

VGATE<21,31,43>

PLT_RST#<20,27,30,31>

A A

Low = DMI x 2

High = DMI x 4 (Default)

Low = iTPM enable

High = iTPM disable(Defult)

Low = TLS cipher suite with no confidentiality

High = TLS cipher suite with
confidentiality(Default)
Low = Reverse Lane

High = Normal Operation(Default)

Low=Dynamic ODT Disable

High=Dynamic ODT Enable(default)

Low=Normal (default)

High=Lane Reversed

Low=Only digital display port (SDVO/DP/iHDMI) or
PCIe is operational (default)
High = Digital display port (SDVO/DP/iHDMI) and
PCIe are operating simultaneously via the PEG
port

(default)
High=SDVO Device Present

Low=DisplayPort disabled (default)

High=DisplayPort device present

R96 10K_0402_5%R96 10K_0402_5%

R97 10K_0402_5%R97 10K_0402_5%

R99 0_0402_5%

R99 0_0402_5%

R100

@R100

@

R102 100_0402_5%R102 100_0402_5%

C957 0.1U_0402_10V7K~D@C957 0.1U_0402_10V7K~D@

@

@

1 2

12

12

12

0_0402_5%

0_0402_5%

12

12

PM_EXTTS#0

PM_EXTTS#1

PM_PWROK_R

PLT_RST#_NB

H_DPRSTP#

Reserve for CPU, reference HPB

5

4

10

T10T
T11T

11

T12T

12

T20T

20

T21T

21

T22T

22

T23T

23

T13T

13

T24T

24

T14T

14

T25T

25

T15T

15

T26T

26
27

T27T

T28T28
T16T16
T17T17

T18T18

T29T29
T19T19
T30T30
T31T31

MCH_CLKSEL0<6>
MCH_CLKSEL1<6>
MCH_CLKSEL2<6>

PM_SYNC#<21>

H_DPRSTP#<8,19,43>
PM_EXTTS#0<17>
PM_EXTTS#1<18>

H_THERMTRIP#<7,19>

DPRSLPVR<21,43>

4

T32T32
T33T33

T34T34

T35T35
T36T36
T37T37
T38T38
T39T39
T40T40

T41T41
T42T42

PM_SYNC#
H_DPRSTP#
PM_EXTTS#0
PM_EXTTS#1
PM_PWROK_R

PLT_RST#_NB

H_THERMTRIP#
DPRSLPVR

CFG5
CFG6
CFG7

CFG9

CFG16

CFG19
CFG20

U

U

4B

4B

M36

SVD1

R

N36

R

SVD2

R33

SVD3

R

T33

R

SVD4

AH9

SVD5

R

AH10

R

SVD6

AH12

R

SVD7

AH13

R

SVD8

K12

R

SVD9

AL34

R

SVD10

AK34

R

SVD11

AN35

SVD12

R

AM35

SVD13

R

T24

R

SVD14

B31

RSVD15

B2

RSVD16

M1

RSVD17

AY21

RSVD20

BG23

RSVD22

BF23

RSVD23

BH18

RSVD24

BF18

RSVD25

T25

CFG_0

R25

CFG_1

P25

CFG_2

P20

CFG_3

P24

CFG_4

C25

CFG_5

N24

CFG_6

M24

CFG_7

E21

CFG_8

C23

CFG_9

C24

CFG_10

N21

CFG_11

P21

CFG_12

T21

CFG_13

R20

CFG_14

M20

CFG_15

L21

CFG_16

H21

CFG_17

P29

CFG_18

R28

CFG_19

T28

CFG_20

R29

PM_SYNC#

B7

PM_DPRSTP#

N33

PM_EXT_TS#_0

P32

PM_EXT_TS#_1

AT40

PWROK

AT11

RSTIN#

T20

THERMTRIP#

R32

DPRSLPVR

BG48

NC_1

BF48

NC_2

BD48

NC_3

BC48

NC_4

BH47

NC_5

BG47

NC_6

BE47

NC_7

BH46

NC_8

BF46

NC_9

BG45

NC_10

BH44

NC_11

BH43

NC_12

BH6

NC_13

BH5

NC_14

BG4

NC_15

BH3

NC_16

BF3

NC_17

BH2

NC_18

BG2

NC_19

BE2

NC_20

BG1

NC_21

BF1

NC_22

BD1

NC_23

BC1

NC_24

F1

NC_25

A47

NC_26

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

3

_CLK_DDR0

M

AP24

A_CK_0

S
S

A_CK_1
B_CK_0

S
S

B_CK_1

S

A_CK#_0

S

A_CK#_1

S

B_CK#_0

S

B_CK#_1

S

A_CKE_0
A_CKE_1

S

B_CKE_0

S
S

B_CKE_1

S

A_CS#_0

S

A_CS#_1

SB_CS#_0

RSVD CFG PM NC

RSVD CFG PM NC

DDR CLK/ CONTROL/ COMPENSATIONHDA

DDR CLK/ CONTROL/ COMPENSATIONHDA

CLKDMIGRAPHICS VIDMEMISC

CLKDMIGRAPHICS VIDMEMISC

SB_CS#_1

SA_ODT_0
SA_ODT_1

SB_ODT_O

SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST#

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3

DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3

DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3

DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3

GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VID_4

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#
CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK

HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

_CLK_DDR1

M

AT21

_CLK_DDR2

M

AV24

M

_CLK_DDR3

AU20

M

_CLK_DDR#0

AR24

M

_CLK_DDR#1

AR21

M

_CLK_DDR#2

AU24

M

_CLK_DDR#3

AV20

DR_CKE0_DIMMA

D

BC28

D

DR_CKE1_DIMMA

AY28

D

DR_CKE2_DIMMB

AY36

D

DR_CKE3_DIMMB

BB36

D

DR_CS0_DIMMA#

BA17

D

DR_CS1_DIMMA#

AY16

DR_CS2_DIMMB#

D

AV16

DDR_CS3_DIMMB#

AR13

M_ODT0_DIMMA

BD17

M_ODT1_DIMMA

AY17

M_ODT2_DIMMB

BF15

M_ODT3_DIMMB

AY13

SMRCOMP

BG22

SMRCOMP#

BH21

SMRCOMP_VOH

BF28

SMRCOMP_VOL

BH28

+V_DDR_MCH_REF

AV42

SM_PWROK

AR36
BF17

DDR3_DRAMRST#

BC36

CLK_MCH_DREFCLK

B38

CLK_MCH_DREFCLK#

A38

MCH_SSCDREFCLK

E41

MCH_SSCDREFCLK#

F41

CLK_MCH_3GPLL

F43

CLK_MCH_3GPLL#

E43

AE41
AE37
AE47
AH39

AE40
AE38
AE48
AH40

AE35
AE43
AE46
AH42

AD35
AE44
AF46
AH43

GFX_VID0

B33

GFX_VID1

B32

GFX_VID2

G33

GFX_VID3

F33

GFX_VID4

E33

GFX_VR_ON

C34

AH37
AH36
AN36
AJ35
AH34

N28
M28
G36
E36
K36

MCH_ICH_SYNC#

H36

B12

MCH_HDA_BITCLK

B28

MCH_HDA_RST#

B30

MCH_HDA_SDIN2_R

B29

MCH_HDA_SDOUT

C29

MCH_HDA_SYNC

A28

DMI_MRX_ITX_N0
DMI_MRX_ITX_N1
DMI_MRX_ITX_N2
DMI_MRX_ITX_N3

DMI_MRX_ITX_P0
DMI_MRX_ITX_P1
DMI_MRX_ITX_P2
DMI_MRX_ITX_P3

DMI_MTX_IRX_N0
DMI_MTX_IRX_N1
DMI_MTX_IRX_N2
DMI_MTX_IRX_N3

DMI_MTX_IRX_P0
DMI_MTX_IRX_P1
DMI_MTX_IRX_P2
DMI_MTX_IRX_P3

CL_CLK0
CL_DATA0

M_PWROK
CL_RST#
+CL_VREF

HDMI_C_CLK
HDMI_C_DATA
HDMI_B_CLK
HDMI_B_DATA
MCH_CLKREQ#

MCH_TSATN#

M
M
M
M

M

_CLK_DDR#0 <17>

M

_CLK_DDR#1 <17>
_CLK_DDR#2 <18>

M
M

_CLK_DDR#3 <18>

D

DR_CKE0_DIMMA <17>
DR_CKE1_DIMMA <17>

D

DR_CKE2_DIMMB <18>

D
D

DR_CKE3_DIMMB <18>

D

DR_CS0_DIMMA# <17>

D

DR_CS1_DIMMA# <17>
DDR_CS2_DIMMB# <18>
DDR_CS3_DIMMB# <18>

M_ODT0_DIMMA <17>
M_ODT1_DIMMA <17>
M_ODT2_DIMMB <18>
M_ODT3_DIMMB <18>

R90 499_0402_1%R90 499_0402_1%

1 2

DDR3_DRAMRST# <17,18>

CLK_MCH_DREFCLK <6>

CLK_MCH_DREFCLK# <6>

MCH_SSCDREFCLK <6>

MCH_SSCDREFCLK# <6>

CLK_MCH_3GPLL <6>

CLK_MCH_3GPLL# <6>

DMI_MRX_ITX_N0 <22>
DMI_MRX_ITX_N1 <22>
DMI_MRX_ITX_N2 <22>
DMI_MRX_ITX_N3 <22>

DMI_MRX_ITX_P0 <22>
DMI_MRX_ITX_P1 <22>
DMI_MRX_ITX_P2 <22>
DMI_MRX_ITX_P3 <22>

DMI_MTX_IRX_N0 <22>
DMI_MTX_IRX_N1 <22>
DMI_MTX_IRX_N2 <22>
DMI_MTX_IRX_N3 <22>

DMI_MTX_IRX_P0 <22>
DMI_MTX_IRX_P1 <22>
DMI_MTX_IRX_P2 <22>
DMI_MTX_IRX_P3 <22>

T43T43
T44T44
T45T45
T46T46
T47T47

T48T48

MCH_CLKREQ# <6>

MCH_ICH_SYNC# < 21>

R101 56_0402_5%R101 56_0402_5%

R103 33_0402_1%R 103 33_0402_1%

R104 33_0402_1%R 104 33_0402_1%

R105 0_0402_5%R105 0_0402_5 %
R106 33_0402_1%R 106 33_0402_1%

R107

R107

2

_CLK_DDR0 <17>
_CLK_DDR1 <17>
_CLK_DDR2 <18>
_CLK_DDR3 <18>

CL_CLK0 <21>

CL_DATA0 <21>

M_PWROK <21>

CL_RST# <21>

R03 modify it.

HDMI_C_CLK <36>
HDMI_C_DATA <36>
HDMI_B_CLK <37>
HDMI_B_DATA <37>

1 2

12
12
12
12

33_0402_1%

33_0402_1%

12

12.30 modify it

+V_DDR_MCH_REF

Reserve for UMA

Use for DDR3 signls,
if support DDR2 need
connect to GND

+1.05V_VCCP

HDA_BITCLK_NB <19>
HDA_RST_NB# <19>

HDA_SDIN1 <19>
HDA_SDOUT_NB <19>
HDA_SYNC_NB <19>

For HDA UMA support 1.5V

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

SM_PWROK

1

ompensation

C

S

MRCOMP

S

MRCOMP#

R

R

83 80.6_0402_1%

83 80.6_0402_1%

R

R

84 80.6_0402_1%

84 80.6_0402_1%

DDR3

+

1.5V

12

12

DDR3

+1.5V

1K_0402_1%

1K_0402_1%

12

R82

R82

SMRCOMP_VOH

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

3.01K_0402_1%

C70

C70

2

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

C74

C74

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

R94

R94

0_0402_5%

0_0402_5%

3.01K_0402_1%

12

12

@

@

12

C71

C71

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

C73

C73

C75

C75

1 2

5

U5

U5

1

P

IN1

2

IN2

G

3

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

R89

R89

1K_0402_1%

1K_0402_1%

R91

R91

C72

C72

R92

R92

12K_0402_1%

12K_0402_1%

1 2

10K_0402_5%

10K_0402_5%

12

R93

R93

1

2

SMRCOMP_VOL

1

2

+3VALW

4

O

Follow MiniCooper

+1.05V_VCCP

12

R95

R95
1K_0402_1%

1K_0402_1%

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

511_0402_1%

511_0402_1%

R98

R98

1

C76

C76

2

1 2

Thermal Sensor Aux Trip Notification: Output from the
(G)MCH to the EC indicating the Aux2 trip point (SW
programmable) has been crosse d.
(If not used, terminated 56 ohm pull up to VCCP)

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cantiga(2 of 7)

Cantiga(2 of 7)

Cantiga(2 of 7)

LA-5152P

LA-5152P

LA-5152P

1

1.5V_PGOOD <42>

SLP_S4# <21,31>

11 51Monday, June 15, 2009

11 51Monday, June 15, 2009

11 51Monday, June 15, 2009

A00

A00

A00

http://mycomp.su/x/

5

D D

c

heck it

For Cantiga:2.4kohm

R02 modify

C C

For UMA use

Layout Note: Place 150 Ω termination
resistors close to GMCH

R113 150_0402_1%R113 150_0402_1%

1 2

R114 150_0402_1%R114 150_0402_1%

B B

1 2

R115 150_0402_1%R115 150_0402_1%

1 2

CRT_HSYNC_R<35>

CRT_VSYNC_R<35>

30_0402_1%

30_0402_1%

30_0402_1%

30_0402_1%

R116

R116

R117

R117

4

VGA_PWM<35>

GMCH_ENBKL<31>

+3VS

LVDS_DDC_CLK<35>

LVDS_DDC_DATA<35>

GM_ENVDD<35>

LVDS_ACLK-< 35>
LVDS_ACLK+<35>
LVDS_BCLK-< 35>
LVDS_BCLK+<35>

LVDS_A0-<35>
LVDS_A1-<35>
LVDS_A2-<35>

LVDS_A0+<35>
LVDS_A1+<35>
LVDS_A2+<35>

LVDS_B0-<35>
LVDS_B1-<35>
LVDS_B2-<35>

LVDS_B0+<35>
LVDS_B1+<35>
LVDS_B2+<35>

R1536 75_0402_1%R1536 75 _0402_1%

1 2

R1537 75_0402_1%R1537 75 _0402_1%

1 2

R1538 75_0402_1%R1538 75 _0402_1%

1 2

12.30 modify it

VGA_CRT_R
VGA_CRT_G
VGA_CRT_B

CRT_DDC_CLK<35>
CRT_DDC_DATA<35>

CRT_VSYNC

GA_PWM

V

GMCH_ENBKL

R551 10K_0402_5%R551 10K_040 2_5%

1 2

R550 10K_0402_5%R550 10K_040 2_5%

1 2

GM_ENVDD

R109 2.4K_0402_1%R109 2.4K_0402_1%

1 2

LVDS_ACLK­LVDS_ACLK+
LVDS_BCLK­LVDS_BCLK+

LVDS_A0­LVDS_A1­LVDS_A2-

LVDS_A0+
LVDS_A1+
LVDS_A2+

LVDS_B0­LVDS_B1­LVDS_B2-

LVDS_B0+
LVDS_B1+
LVDS_B2+

VGA_CRT_B<35>

VGA_CRT_G<35>

VGA_CRT_R<35>

VGA_CRT_B

VGA_CRT_G

VGA_CRT_R

CRT_DDC_CLK
CRT_DDC_DATA
CRT_HSYNC

20mil

TVA_DAC
TVB_DAC
TVC_DAC

CRT_IREF

12

R118

R118
1K_0402_1%

1K_0402_1%

M32
M33

M29

3

ote: All LVDS data

N
signals/and it's compliments
should be routed
Differentially

U

U

4C

4C

L32

L_BKLT_CTRL

G32

L_BKLT_EN
L_CTRL_CLK
L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA
L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

PEG_RX#_0
PEG_RX#_1
PEG_RX#_2
PEG_RX#_3
PEG_RX#_4
PEG_RX#_5
PEG_RX#_6
PEG_RX#_7
PEG_RX#_8
PEG_RX#_9

PEG_RX_0
PEG_RX_1
PEG_RX_2
PEG_RX_3
PEG_RX_4
PEG_RX_5
PEG_RX_6
PEG_RX_7
PEG_RX_8

PEG_RX_9
PEG_RX_10
PEG_RX_11
PEG_RX_12
PEG_RX_13
PEG_RX_14
PEG_RX_15

PEG_TX#_0
PEG_TX#_1
PEG_TX#_2
PEG_TX#_3
PEG_TX#_4
PEG_TX#_5
PEG_TX#_6
PEG_TX#_7
PEG_TX#_8
PEG_TX#_9

PEG_TX_0
PEG_TX_1
PEG_TX_2
PEG_TX_3
PEG_TX_4
PEG_TX_5
PEG_TX_6
PEG_TX_7
PEG_TX_8

PEG_TX_9
PEG_TX_10
PEG_TX_11
PEG_TX_12
PEG_TX_13
PEG_TX_14
PEG_TX_15

T37
T36

H44
J46
L44
L40
N41
P48
N44
T43
U43
Y43
Y48
Y36
AA43
AD37
AC47
AD39

H43
J44
L43
L41
N40
P47
N43
T42
U42
Y42
W47
Y37
AA42
AD36
AC48
AD40

J41
M46
M47
M40
M42
R48
N38
T40
U37
U40
Y40
AA46
AA37
AA40
AD43
AC46

J42
L46
M48
M39
M43
R47
N37
T39
U36
U39
Y39
Y46
AA36
AA39
AD42
AD46

DPB_LANE_N0
DPB_LANE_N1
DPB_LANE_N2
DPB_LANE_N3
HDC_DATA_N2
HDC_DATA_N1
HDC_DATA_N0
HDC_CLK_N

PEG_COMPI

PEG_COMPO

LVDS TV VGA

LVDS TV VGA

PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15

PCI-EXPRESS GRAPHICS

PCI-EXPRESS GRAPHICS

PEG_TX#_10
PEG_TX#_11
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

PEGCOMP

DPB_AUX#

DPB_AUX
DPB_HPD#

HDC_HPD#

DPB_LANE_P0
DPB_LANE_P1
DPB_LANE_P2
DPB_LANE_P3
HDC_DATA_P2
HDC_DATA_P1
HDC_DATA_P0
HDC_CLK_P

2

+

VCC_PEG

1 2

C78 0.1U_0402_10V 7K~DC78 0.1U_0402_10V 7K~D
C80 0.1U_0402_10V 7K~DC80 0.1U_0402_10V 7K~D
C82 0.1U_0402_10V 7K~DC82 0.1U_0402_10V 7K~D
C84 0.1U_0402_10V 7K~DC84 0.1U_0402_10V 7K~D
C86 0.1U_0402_10V 7K~DC86 0.1U_0402_10V 7K~D
C88 0.1U_0402_10V 7K~DC88 0.1U_0402_10V 7K~D
C90 0.1U_0402_10V 7K~DC90 0.1U_0402_10V 7K~D
C92 0.1U_0402_10V 7K~DC92 0.1U_0402_10V 7K~D

C77

C77
C79

C79
C81 0.1U_0402_10V7K~DC81 0.1U_0402_10V7K~D
C83 0.1U_0402_10V7K~DC83 0.1U_0402_10V7K~D
C85

C85
C87 0.1U_0402_10V7K~DC87 0.1U_0402_10V7K~D
C89

C89
C91 0.1U_0402_10V7K~DC91 0.1U_0402_10V7K~D

lace the resistor within 500mils of the GMCH

P
PEGCOMP trace widht and spacing is 20/25 mils.

R

R

108

108

49.9_0402_1%

49.9_0402_1%

DPB_AUX# <37>

DPB_AUX <37>
DPB_HPD# <37>

HDC_HPD# <36>

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2
1 2
1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2
1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2
1 2

DPB_LANE_N0_C <37>
DPB_LANE_N1_C <37>
DPB_LANE_N2_C <37>
DPB_LANE_N3_C <37>
HDC_DATA_N2_C <36>
HDC_DATA_N1_C <36>
HDC_DATA_N0_C <36>
HDC_CLK_N_C <36>

DPB_LANE_P0_C <37>
DPB_LANE_P1_C <37>
DPB_LANE_P2_C <37>
DPB_LANE_P3_C <37>
HDC_DATA_P2_C <36>
HDC_DATA_P1_C <36>
HDC_DATA_P0_C <36>
HDC_CLK_P_C <36>

1

01.06 modify it

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Cantiga(3 of 7)

Cantiga(3 of 7)

Cantiga(3 of 7)

LA-5152P

LA-5152P

LA-5152P

A00

A00

12 51Monday, June 15, 2009

12 51Monday, June 15, 2009

12 51Monday, June 15, 2009

1

A00

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

http://mycomp.su/x/

5

D D

4

3

2

1

DDR_A_D[0..63]<17>

C C

B B

DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8

DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63

AJ38
AJ41

AN38

AM38

AJ36

AJ40
AM44
AM42

AN43
AN44
AU40
AT38
AN41
AN39
AU44
AU42
AV39
AY44
BA40
BD43
AV41
AY43
BB41
BC40
AY37
BD38
AV37
AT36
AY38
BB38
AV36

AW36

BD13
AU11
BC11
BA12
AU13
AV13
BD12
BC12

AU10

BA11

BD9
AY8
BA6
AV5
AV7
AT9
AN8
AU5
AU6
AT5

AN10

AM11

AM5

AN12

AM13

AJ11

AJ12

BB9
BA9

AV9

AJ9
AJ8

U4D

U4D

SA_DQ_0
SA_DQ_1
SA_DQ_2
SA_DQ_3
SA_DQ_4
SA_DQ_5
SA_DQ_6
SA_DQ_7
SA_DQ_8
SA_DQ_9
SA_DQ_10
SA_DQ_11
SA_DQ_12
SA_DQ_13
SA_DQ_14
SA_DQ_15
SA_DQ_16
SA_DQ_17
SA_DQ_18
SA_DQ_19
SA_DQ_20
SA_DQ_21
SA_DQ_22
SA_DQ_23
SA_DQ_24
SA_DQ_25
SA_DQ_26
SA_DQ_27
SA_DQ_28
SA_DQ_29
SA_DQ_30
SA_DQ_31
SA_DQ_32
SA_DQ_33
SA_DQ_34
SA_DQ_35
SA_DQ_36
SA_DQ_37
SA_DQ_38
SA_DQ_39
SA_DQ_40
SA_DQ_41
SA_DQ_42
SA_DQ_43
SA_DQ_44
SA_DQ_45
SA_DQ_46
SA_DQ_47
SA_DQ_48
SA_DQ_49
SA_DQ_50
SA_DQ_51
SA_DQ_52
SA_DQ_53
SA_DQ_54
SA_DQ_55
SA_DQ_56
SA_DQ_57
SA_DQ_58
SA_DQ_59
SA_DQ_60
SA_DQ_61
SA_DQ_62
SA_DQ_63

SA_BS_0
SA_BS_1
SA_BS_2

SA_RAS#
SA_CAS#

SA_WE#

SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7

SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7

SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7

SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3

DDR SYSTEM MEMORY A

DDR SYSTEM MEMORY A

SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8

SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_MA_14

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

BG18
AT25

BB20
BD20
AY20

AM37
AT41
AY41
AU39
BB12
AY6
AT7
AJ5

AJ44
AT44
BA43
BC37
AW12
BC8
AU8
AM7

AJ43
AT43
BA44
BD37
AY12
BD8
AU9
AM8

BA21
BC24
BG24
BH24
BG25
BA24
BD24
BG27
BF25
AW24
BC21
BG26
BH26
BH17
AY25

DDR_A_BS1
DDR_A_BS2

DDR_A_RAS#
DDR_A_CAS#
DDR_A_WE#

DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7

DDR_A_DQS0
DDR_A_DQS1

DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7

DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7

DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8

DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_MA14

DDR_A_BS0

BD21

DDR_A_BS0 <17>
DDR_A_BS1 <17>
DDR_A_BS2 <17>

DDR_A_RAS# <17>
DDR_A_CAS# <17>

DDR_A_WE# <17>

DDR_A_DM[0..7] <17>

DDR_A_DQS[0..7] <17>

DDR_A_DQS#[0..7] <17 >

DDR_A_MA[0..14] <17>

DDR_B_D[0..63]<18>

DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8

DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63

AK47
AH46
AP47
AP46

AJ46

AJ48
AM48
AP48
AU47
AU46
BA48

AY48

AT47
AR47
BA47
BC47
BC46
BC44
BG43

BF43
BE45
BC41

BF40

BF41
BG38

BF38
BH35
BG35
BH40
BG39
BG34
BH34
BH14
BG12
BH11

BG8

BH12

BF11

BF8
BG7
BC5
BC6
AY3
AY1
BF6
BF5
BA1
BD3
AV2
AU3
AR3
AN2
AY2
AV1
AP3
AR1

AH1
AM2
AM3
AH3

AL1
AL2
AJ1

AJ3

U4E

U4E

SB_DQ_0
SB_DQ_1
SB_DQ_2
SB_DQ_3
SB_DQ_4
SB_DQ_5
SB_DQ_6
SB_DQ_7
SB_DQ_8
SB_DQ_9
SB_DQ_10
SB_DQ_11
SB_DQ_12
SB_DQ_13
SB_DQ_14
SB_DQ_15
SB_DQ_16
SB_DQ_17
SB_DQ_18
SB_DQ_19
SB_DQ_20
SB_DQ_21
SB_DQ_22
SB_DQ_23
SB_DQ_24
SB_DQ_25
SB_DQ_26
SB_DQ_27
SB_DQ_28
SB_DQ_29
SB_DQ_30
SB_DQ_31
SB_DQ_32
SB_DQ_33
SB_DQ_34
SB_DQ_35
SB_DQ_36
SB_DQ_37
SB_DQ_38
SB_DQ_39
SB_DQ_40
SB_DQ_41
SB_DQ_42
SB_DQ_43
SB_DQ_44
SB_DQ_45
SB_DQ_46
SB_DQ_47
SB_DQ_48
SB_DQ_49
SB_DQ_50
SB_DQ_51
SB_DQ_52
SB_DQ_53
SB_DQ_54
SB_DQ_55
SB_DQ_56
SB_DQ_57
SB_DQ_58
SB_DQ_59
SB_DQ_60
SB_DQ_61
SB_DQ_62
SB_DQ_63

SB_BS_0
SB_BS_1
SB_BS_2

SB_RAS#
SB_CAS#

SB_WE#

SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7

SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7

SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7

SB_MA_0
SB_MA_1
SB_MA_2

DDR SYSTEM MEMORY B

DDR SYSTEM MEMORY B

SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8

SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_MA_14

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

BB17
BB33

AU17
BG16
BF14

AM47
AY47
BD40
BF35
BG11
BA3
AP1
AK2

AL47
AV48
BG41
BG37
BH9
BB2
AU1
AN6

AL46
AV47
BH41
BH37
BG9
BC2
AT2
AN5

AV17
BA25
BC25
AU25
AW25
BB28
AU28
AW28
AT33
BD33
BB16
AW33
AY33
BH15
AU33

DDR_B_BS1
DDR_B_BS2

DDR_B_RAS#
DDR_B_CAS#

DDR_B_WE#

DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7

DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7

DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7

DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8

DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_MA14

DDR_B_RAS# < 18>
DDR_B_CAS# < 18>

DDR_B_WE# <18>

DDR_B_BS0

BC16

DDR_B_BS0 <18>
DDR_B_BS1 <18>
DDR_B_BS2 <18>

DDR_B_DM[0..7] <18>

DDR_B_DQS[0..7] <18>

DDR_B_DQS#[0..7] <18>

DDR_B_MA[0..14] <18>

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Cantiga(4 of 7)

Cantiga(4 of 7)

Cantiga(4 of 7)

LA-5152P

LA-5152P

LA-5152P

A00

A00

13 51Monday, June 15, 2009

13 51Monday, June 15, 2009

13 51Monday, June 15, 2009

1

A00

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

http://mycomp.su/x/

5

1

+

+

2

2

2

1U_0603_10V6K~D

1U_0603_10V6K~D

1

C121

C121

2

1067M 4140mA
800M 3162mA

330U_D2_2.5VY_R9M~D

330U_D2_2.5VY_R9M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

C109

C109

C110

C110

2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

C123

C123

2

1

2

1

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C114

C114

10U_0805_10V4Z~D

10U_0805_10V4Z~D

C124

C124

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

2

C115

C115

1

+AXG_CORE

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

T53PAD T53PAD
T54PAD T54PAD

C125

C125

8700mA

D

DR3

+

1.5V

D D

C C

+1.05V_VCCP +AXG_CORE

B B

A A

J1

J1

112

JUMP_43X118

JUMP_43X118

J2

J2

112

JUMP_43X118

JUMP_43X118

4

4F

4F

U

U

AP33

V

CC_SM_1

AN33

V

CC_SM_2

BH32

V

CC_SM_3

BG32

V

CC_SM_4

BF32

V

CC_SM_5

BD32

CC_SM_6

V

BC32

CC_SM_7

V

BB32

V

CC_SM_8

BA32

CC_SM_9

V

AY32

V

CC_SM_10

AW32

V

CC_SM_11

AV32

VCC_SM_12

AU32

VCC_SM_13

AT32

VCC_SM_14

AR32

VCC_SM_15

AP32

VCC_SM_16

AN32

VCC_SM_17

BH31

VCC_SM_18

BG31

VCC_SM_19

BF31

VCC_SM_20

BG30

VCC_SM_21

BH29

VCC_SM_22

BG29

VCC_SM_23

BF29

VCC_SM_24

BD29

VCC_SM_25

BC29

VCC_SM_26

BB29

VCC_SM_27

BA29

VCC_SM_28

AY29

VCC_SM_29

AW29

VCC_SM_30

AV29

VCC_SM_31

AU29

VCC_SM_32

AT29

VCC_SM_33

AR29

VCC_SM_34

AP29

VCC_SM_35

BA36

VCC_SM_36/NC

BB24

VCC_SM_37/NC

BD16

VCC_SM_38/NC

BB21

VCC_SM_39/NC

AW16

VCC_SM_40/NC

AW13

VCC_SM_41/NC

AT13

VCC_SM_42/NC

Y26

VCC_AXG_1

AE25

VCC_AXG_2

AB25

VCC_AXG_3

AA25

VCC_AXG_4

AE24

VCC_AXG_5

AC24

VCC_AXG_6

AA24

VCC_AXG_7

Y24

VCC_AXG_8

AE23

VCC_AXG_9

AC23

VCC_AXG_10

AB23

VCC_AXG_11

AA23

VCC_AXG_12

AJ21

VCC_AXG_13

AG21

VCC_AXG_14

AE21

VCC_AXG_15

AC21

VCC_AXG_16

AA21

VCC_AXG_17

Y21

VCC_AXG_18

AH20

VCC_AXG_19

AF20

VCC_AXG_20

AE20

VCC_AXG_21

AC20

VCC_AXG_22

AB20

VCC_AXG_23

AA20

VCC_AXG_24

T17

VCC_AXG_25

T16

VCC_AXG_26

AM15

VCC_AXG_27

AL15

VCC_AXG_28

AE15

VCC_AXG_29

AJ15

VCC_AXG_30

AH15

VCC_AXG_31

AG15

VCC_AXG_32

AF15

VCC_AXG_33

AB15

VCC_AXG_34

AA15

VCC_AXG_35

Y15

VCC_AXG_36

V15

VCC_AXG_37

U15

VCC_AXG_38

AN14

VCC_AXG_39

AM14

VCC_AXG_40

U14

VCC_AXG_41

T14

VCC_AXG_42

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

V

CC_AXG_NTCF_1

V

CC_AXG_NCTF_2

V

CC_AXG_NCTF_3

V

CC_AXG_NCTF_4

V

CC_AXG_NCTF_5

V

CC_AXG_NCTF_6
CC_AXG_NCTF_7

V

CC_AXG_NCTF_8

V

VCC SM

VCC SM

V

CC_AXG_NCTF_9

CC_AXG_NCTF_10

V
V

CC_AXG_NCTF_11

V

CC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43

VCC GFX NCTF

VCC GFX NCTF

VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52

POWER

POWER

VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60

VCC GFX

VCC GFX

VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7

VCC SM LF

VCC SM LF

W28
V28
W26
V26
W25
V25
W24
V24
W23
V23
AM21
AL21
AK21
W21
V21
U21
AM20
AK20
W20
U20
AM19
AL19
AK19
AJ19
AH19
AG19
AF19
AE19
AB19
AA19
Y19
W19
V19
U19
AM17
AK17
AH17
AG17
AF17
AE17
AC17
AB17
Y17
W17
V17
AM16
AL16
AK16
AJ16
AH16
AG16
AF16
AE16
AC16
AB16
AA16
Y16
W16
V16
U16

AV44
BA37
AM40
AV21
AY5
AM10
BB13

AXG_CORE

+

VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7

3

22U_0805_6.3V6M~D

0.47U_0402_10V4Z~D

0.47U_0402_10V4Z~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C1502

C1502

C111

C111

2

2

22U_0805_6.3V6M~D

1U_0603_10V6K~D

1U_0603_10V6K~D

1

1

C1503

C1503

C1506

C1506

2

2

Layout Note: Inside GMC

330U_D2_2.5VY_R15M

330U_D2_2.5VY_R15M

330U_D2_2.5VY_R15M

330U_D2_2.5VY_R15M

@

@

@

@

1

C1500

C1500

+

+

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C126

C126

2

1

C1501

C1501

+

+

2

0.22U_0402_10V4Z~D

0.22U_0402_10V4Z~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C127

C127

2

2

Layout Note:

Place close to GMCH

0.22U_0402_10V4Z~D

0.22U_0402_10V4Z~D

C128

C128

C129

C129

1

1

2

2

2

xtnal Graphic: 3060mA

E

+

1.05V_VCCP

AG34
AC34
AB34
AA34

Y34
V34
U34

AM33
AK33

AJ33
AG33
AF33

220U_D2_4VY_R15M~D

220U_D2_4VY_R15M~D

1

C116

C116

+

+

2

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

1U_0402_6.3V4Z~D

.47U_0402_6.3V6-K~D

.47U_0402_6.3V6-K~D

C130

C130

1U_0402_6.3V4Z~D

1

1

C131

C131

C132

C132

2

2

0.22U_0402_10V4Z~D

0.22U_0402_10V4Z~D

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

1

C117

C117

C118

C118

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.22U_0402_10V4Z~D

0.22U_0402_10V4Z~D

1

1

C119

C119

2

2

AE33
AC33
AA33

Y33

W33

V33

C120

C120

U33
AH28
AF28
AC28
AA28

AJ26
AG26
AE26
AC26
AH25
AG25
AF25
AG24

AJ23
AH23
AF23

T32

integrated Graphic: 2898mA

4G

4G

U

U

V

CC_1
CC_2

V
V

CC_3

V

CC_4
VCC_5
VCC_6
VCC_7
VCC_8
VCC_9
VCC_10
VCC_11
VCC_12

VCC_13
VCC_14
VCC_15
VCC_16
VCC_17
VCC_18
VCC_19
VCC_20
VCC_21
VCC_22
VCC_23
VCC_24
VCC_25
VCC_26
VCC_27
VCC_28
VCC_29
VCC_30
VCC_31
VCC_32
VCC_33
VCC_34
VCC_35

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

VCC CORE

VCC CORE

POWER

POWER

1

VCC_NCTF_1
VCC_NCTF_2
VCC_NCTF_3
VCC_NCTF_4
VCC_NCTF_5
VCC_NCTF_6
VCC_NCTF_7
VCC_NCTF_8

VCC_NCTF_9
VCC_NCTF_10
VCC_NCTF_11
VCC_NCTF_12
VCC_NCTF_13
VCC_NCTF_14
VCC_NCTF_15
VCC_NCTF_16
VCC_NCTF_17
VCC_NCTF_18
VCC_NCTF_19
VCC_NCTF_20
VCC_NCTF_21
VCC_NCTF_22
VCC_NCTF_23
VCC_NCTF_24
VCC_NCTF_25
VCC_NCTF_26
VCC_NCTF_27
VCC_NCTF_28

VCC NCTF

VCC NCTF

VCC_NCTF_29
VCC_NCTF_30
VCC_NCTF_31
VCC_NCTF_32
VCC_NCTF_33
VCC_NCTF_34
VCC_NCTF_35
VCC_NCTF_36
VCC_NCTF_37
VCC_NCTF_38
VCC_NCTF_39
VCC_NCTF_40
VCC_NCTF_41
VCC_NCTF_42
VCC_NCTF_43
VCC_NCTF_44

AM32
AL32
AK32
AJ32
AH32
AG32
AE32
AC32
AA32
Y32
W32
U32
AM30
AL30
AK30
AH30
AG30
AF30
AE30
AC30
AB30
AA30
Y30
W30
V30
U30
AL29
AK29
AJ29
AH29
AG29
AE29
AC29
AA29
Y29
W29
V29
AL28
AK28
AL26
AK26
AK25
AK24
AK23

+1.05V_VCCP

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Cantiga(5 of 7)

Cantiga(5 of 7)

Cantiga(5 of 7)

LA-5152P

LA-5152P

LA-5152P

A00

A00

14 51Monday, June 15, 2009

14 51Monday, June 15, 2009

14 51Monday, June 15, 2009

1

A00

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

http://mycomp.su/x/

5

+

3VS

1 2

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

D D

+

3.3V_CRT_DAC

L

L

1

1

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C140

C140

C135

C135

2

2

3.3V_CRT_DAC

+

1

2

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C136

C136

C141

C141

2

Place close to U4H.A25Place close to U4H.B27 and A26

Place close to U4H.F47

+1.05V_M_DPLLA

0.1U_0402_10V7K~D

64.8mA Max.

C C

64.8mA Max.

0.1U_0402_10V7K~D

1

2

+1.05V_M_DPLLB

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

220U_D2_4VY_R15M~D

220U_D2_4VY_R15M~D

10UH_LB2012T100MR_20%_0805~D

10UH_LB2012T100MR_20%_0805~D

1

+

+

C

C
1505

1505

2

220U_D2_4VY_R15M~D

220U_D2_4VY_R15M~D

10UH_LB2012T100MR_20%_0805~D

10UH_LB2012T100MR_20%_0805~D

1

+

+

C

C

C1509

C1509

1510

1510

2

+1.05V_VCCP

L1500

L1500

12

C1504

C1504

+1.05V_VCCP

L1503

L1503

12

Place close to U4H.J48

+1.8VS +VCC_TX_LVDS

L1501

L1501

HK1608R10J-T_0603~D

HK1608R10J-T_0603~D

Place close to U4H.L48

B B

Place close to U4H.M25

+1.5VS +1.5VS_TVDAC

R1539

R1539

12

0_0603_5%

0_0603_5%

0103 modify it.

Place close to U4H.B24 and A24

+3VS

A A

L1502

L1502

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

1 2

0103 modify it.

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

+3VS_TVDAC

1

2

5

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

1

C1525

C1525

C1526

C1526

2

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1524

C1524

1

C1523

C1523

2

+1.05V_VCCP

4

1.05V_VCCP

+

12

1

2

+1.5VS +1.5VS_QDAC

119

119

R

R
0_0603_5%

0_0603_5%

1 2

+

1.05V_VCCP

1 2

BLM18AG121SN1D_0603~D

BLM18AG121SN1D_0603~D

1000P_0402_50V7K~D

1000P_0402_50V7K~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

C1508

C1508

C1507

C1507

2

+1.05V_VCCP

100U_D2E_6.3VM_R18M~D

100U_D2E_6.3VM_R18M~D

C150

C150

+1.05V_VCCP

L3

L3

1 2

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

R130 0_0402_5%R13 0 0_0402_5%

+1.05V_VCCP

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

1 2

C171

C171

10U_0805_4VAM~D

10U_0805_4VAM~D

12

4

2

2

L

L

+1.5VS

1

+

+

2

R126 0_0603_5%R126 0_0603_5%

1

2

12

L4

L4

R131

R131

1_0402_5%

1_0402_5%

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

C133

C133

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

R123

R123

0_0603_5%

0_0603_5%

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C160

C160

1

2

1

2

1.05V_M_HPLL

+

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C134

C134

2

2

1.05V_M_MPLL

+

0_0603_5%

0_0603_5%

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

R120

R120

1

C137

C137

1 2

2

1

C145

C145

2

R121

R121

12

0_0402_5%

0_0402_5%

+1.05V_A_SM

12

1

2

12

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

+1.5VS

C161

C161

C166

C166

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+1.05V_M_PEGPLL

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

+1.05V_M_DPLLA

+1.05V_M_DPLLB

+VCC_TX_LVDS

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C147

C147

2

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C152

C152

1

C151

C151

2

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

C156

C156

2

2

C159

C159

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

+1.8VS

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C172

C172

C173

C173

2

3

U

U

4H

4H

3.3V_CRT_DAC

+

+

3.3V_CRT_DAC

+VCCA_PEG_BG

+1.05V_M_PEGPLL

1U_0603_10V6K~D

1U_0603_10V6K~D

1

C153

C153

2

+1.05V_A_SM_CK

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C157

C157

2

TVA_DAC 24.15mA
TVB_DAC 39.48mA
TVC_DAC 24.15mA

+3VS_TVDAC

+1.5VS_TVDAC

1U_0603_10V6K~D

1U_0603_10V6K~D

1

2

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

64.8mA

64.8mA

24mA

139.2mA

13.2mA

50mA

747mA

50mA

1mA

157.2mA

50mA

60.31mA

C170

C170

414uA

37.95mA

35mA

AD48

AA48

AR20
AP20
AN20
AR17
AP17
AN17
AT16
AR16
AP16

AP28
AN28
AP25
AN25

AN24
AM28
AM26
AM25

AL25

AM24

AL24

AM23

AL23

AA47

B27

V

CCA_CRT_DAC_1

A26

V

CCA_CRT_DAC_2

A25

CCA_DAC_BG

V

B25

SSA_DAC_BG

V

F47

VCCA_DPLLA

L48

VCCA_DPLLB

AD1

VCCA_HPLL

AE1

VCCA_MPLL

J48

VCCA_LVDS

J47

VSSA_LVDS

VCCA_PEG_BG

VCCA_PEG_PLL

VCCA_SM_1
VCCA_SM_2
VCCA_SM_3
VCCA_SM_4
VCCA_SM_5
VCCA_SM_6
VCCA_SM_7
VCCA_SM_8
VCCA_SM_9

VCCA_SM_CK_1
VCCA_SM_CK_2
VCCA_SM_CK_3
VCCA_SM_CK_4
VCCA_SM_CK_5
VCCA_SM_CK_NCTF_1
VCCA_SM_CK_NCTF_2
VCCA_SM_CK_NCTF_3
VCCA_SM_CK_NCTF_4
VCCA_SM_CK_NCTF_5
VCCA_SM_CK_NCTF_6
VCCA_SM_CK_NCTF_7
VCCA_SM_CK_NCTF_8

B24

VCCA_TV_DAC_1

A24

VCCA_TV_DAC_2

A32

VCC_HDA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

VCCD_PEG_PLL

M38

VCCD_LVDS_1

L37

VCCD_LVDS_2

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

POWER

POWER

A SM

A SM

HDA

HDA

LVDS D TV/CRT

LVDS D TV/CRT

CRTPLLA LVDSA PEG

CRTPLLA LVDSA PEG

TV

TV

VTT

VTT

VCC_AXF_1
VCC_AXF_2
VCC_AXF_3

AXF

AXF

VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4

SM CK

SM CK

VCC_TX_LVDS

A CK

A CK

VCC_HV_1
VCC_HV_2
VCC_HV_3

HV

HV

VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5

VCC_DMI_1
VCC_DMI_2
VCC_DMI_3
VCC_DMI_4

DMI PEG

DMI PEG

VTTLF

VTTLF

V

TT_1

V

TT_2

V

TT_3

V

TT_4

V

TT_5
TT_6

V

TT_7

V
V

TT_8
TT_9

V

V

TT_10

V

TT_11
VTT_12
VTT_13
VTT_14
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VTT_23
VTT_24
VTT_25

VTTLF1
VTTLF2
VTTLF3

U13
T13
U12
T12
U11
T11
U10
T10
U9
T9
U8
T8
U7
T7
U6
T6
U5
T5
V3
U3
V2
U2
T2
V1
U1

321.35mA

B22
B21
A21

149mA

BF21
BH20
BG20
BF20

118.8mA

K47

105.3mA

C35
B35
A35

1782mA

V48
U48
V47
U47
U46

456mA

AH48
AF48
AH47
AG47

GMCH_VTTLF1

A8

GMCH_VTTLF2

L1

GMCH_VTTLF3

AB2

2

852mA

+VCC_AXF

+1.5V_SM_CK

+VCC_TX_LVDS

2

+

1.05V_VCCP

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

C138

C138

1

2

.47U_0402_6.3V6-K~D

.47U_0402_6.3V6-K~D

1

C142

C142

2

+VCC_AXF

R129 0_0603_5%R129 0_0603_5%

1

C165

C165

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

1

2

1U_0603_10V6K~D

1U_0603_10V6K~D

1

2

1 2

.47U_0402_6.3V6-K~D

.47U_0402_6.3V6-K~D

C167

C167

10U_0805_4VAM~D

10U_0805_4VAM~D

1

C148

C148

2

1

2

+3VS

1

2

.47U_0402_6.3V6-K~D

.47U_0402_6.3V6-K~D

C168

C168

1

2

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

1

220U_D2_4VY_R15M~D

220U_D2_4VY_R15M~D

1

C139

C139

+

+

2

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

2.2U_0603_10V6K~D

@

@

C149

C149

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C158

C158

R122

R122

C154

C154

2.2U_0603_10V6K~D

1

2

1 2

10_0402_5%

10_0402_5%

.47U_0402_6.3V6-K~D

.47U_0402_6.3V6-K~D

C169

C169

C143

C143

0_0603_5%

0_0603_5%

12

1_0402_5%

1_0402_5%

R125

R125

10U_0805_4VAM~D

10U_0805_4VAM~D

@

@

R127

R127

+VCC_PEG+VCC_DMI

C144

C144

1

2

R124

R124

0_0805_5%

0_0805_5%

C155

C155

1 2

+VCC_PEG

+1.05V_VCCP

12

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

2

DDR3 connect to 1.5V

+1.5VS

CRB schematic
HPB & Avia no draw.

D1

D1

@

@

21

CH751H-40PT_SOD323-2~D

CH751H-40PT_SOD323-2~D

220U_D2_4VY_R15M~D

220U_D2_4VY_R15M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

C162

C162

C164

C164

1

C163

C163

1

+

+

2

2

+1.05V_VCCP

R02 modify

1 2

JP2@ JP2@

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cantiga(6 of 7)

Cantiga(6 of 7)

Cantiga(6 of 7)

LA-5152P

LA-5152P

LA-5152P

15 51Monday, June 15, 2009

15 51Monday, June 15, 2009

15 51Monday, June 15, 2009

1

+1.05V_VCCP

A00

A00

A00

http://mycomp.su/x/

5

D D

C C

B B

A A

4

4I

4I

U

U

AU48

V

SS_1

AR48

SS_2

V

AL48

V

SS_3

BB47

V

SS_4

AW47

V

SS_5

AN47

V

SS_6

AJ47

V

SS_7

AF47

V

SS_8

AD47

SS_9

V

AB47

SS_10

V

Y47

V

SS_11

T47

SS_12

V

N47

V

SS_13

L47

V

SS_14

G47

VSS_15

BD46

VSS_16

BA46

VSS_17

AY46

VSS_18

AV46

VSS_19

AR46

VSS_20

AM46

VSS_21

V46

VSS_22

R46

VSS_23

P46

VSS_24

H46

VSS_25

F46

VSS_26

BF44

VSS_27

AH44

VSS_28

AD44

VSS_29

AA44

VSS_30

Y44

VSS_31

U44

VSS_32

T44

VSS_33

M44

VSS_34

F44

VSS_35

BC43

VSS_36

AV43

VSS_37

AU43

VSS_38

AM43

VSS_39

J43

VSS_40

C43

VSS_41

BG42

VSS_42

AY42

VSS_43

AT42

VSS_44

AN42

VSS_45

AJ42

VSS_46

AE42

VSS_47

N42

VSS_48

L42

VSS_49

BD41

VSS_50

AU41

VSS_51

AM41

VSS_52

AH41

VSS_53

AD41

VSS_54

AA41

VSS_55

Y41

VSS_56

U41

VSS_57

T41

VSS_58

M41

VSS_59

G41

VSS_60

B41

VSS_61

BG40

VSS_62

BB40

VSS_63

AV40

VSS_64

AN40

VSS_65

H40

VSS_66

E40

VSS_67

AT39

VSS_68

AM39

VSS_69

AJ39

VSS_70

AE39

VSS_71

N39

VSS_72

L39

VSS_73

B39

VSS_74

BH38

VSS_75

BC38

VSS_76

BA38

VSS_77

AU38

VSS_78

AH38

VSS_79

AD38

VSS_80

AA38

VSS_81

Y38

VSS_82

U38

VSS_83

T38

VSS_84

J38

VSS_85

F38

VSS_86

C38

VSS_87

BF37

VSS_88

BB37

VSS_89

AW37

VSS_90

AT37

VSS_91

AN37

VSS_92

AJ37

VSS_93

H37

VSS_94

C37

VSS_95

BG36

VSS_96

BD36

VSS_97

AK15

VSS_98

AU36

VSS_99

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

VSS

VSS

V

SS_100
SS_101

V
V

SS_102

V

SS_103

V

SS_104

V

SS_105

V

SS_106

V

SS_107
SS_108

V

SS_109

V
V

SS_110
SS_111

V
V

SS_112

V

SS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
VSS_199

AM36
AE36
P36
L36
J36
F36
B36
AH35
AA35
Y35
U35
T35
BF34
AM34
AJ34
AF34
AE34
W34
B34
A34
BG33
BC33
BA33
AV33
AR33
AL33
AH33
AB33
P33
L33
H33
N32
K32
F32
C32
A31
AN29
T29
N29
K29
H29
F29
A29
BG28
BD28
BA28
AV28
AT28
AR28
AJ28
AG28
AE28
AB28
Y28
P28
K28
H28
F28
C28
BF26
AH26
AF26
AB26
AA26
C26
B26
BH25
BD25
BB25
AV25
AR25
AJ25
AC25
Y25
N25
L25
J25
G25
E25
BF24
AD12
AY24
AT24
AJ24
AH24
AF24
AB24
R24
L24
K24
J24
G24
F24
E24
BH23
AG23
Y23
B23
A23
AJ6

3

4J

4J

U

U

BG21

V

SS_199

L12

SS_200

V

AW21

V

SS_201

AU21

V

SS_202

AP21

V

SS_203

AN21

V

SS_204

AH21

V

SS_205

AF21

V

SS_206

AB21

SS_207

V

R21

SS_208

V

M21

V

SS_209

J21

SS_210

V

G21

V

SS_211

BC20

V

SS_212

BA20

VSS_213

AW20

VSS_214

AT20

VSS_215

AJ20

VSS_216

AG20

VSS_217

Y20

VSS_218

N20

VSS_219

K20

VSS_220

F20

VSS_221

C20

VSS_222

A20

VSS_223

BG19

VSS_224

A18

VSS_225

BG17

VSS_226

BC17

VSS_227

AW17

VSS_228

AT17

VSS_229

R17

VSS_230

M17

VSS_231

H17

VSS_232

C17

VSS_233

BA16

VSS_235

AU16

VSS_237

AN16

VSS_238

N16

VSS_239

K16

VSS_240

G16

VSS_241

E16

VSS_242

BG15

VSS_243

AC15

VSS_244

W15

VSS_245

A15

VSS_246

BG14

VSS_247

AA14

VSS_248

C14

VSS_249

BG13

VSS_250

BC13

VSS_251

BA13

VSS_252

AN13

VSS_255

AJ13

VSS_256

AE13

VSS_257

N13

VSS_258

L13

VSS_259

G13

VSS_260

E13

VSS_261

BF12

VSS_262

AV12

VSS_263

AT12

VSS_264

AM12

VSS_265

AA12

VSS_266

J12

VSS_267

A12

VSS_268

BD11

VSS_269

BB11

VSS_270

AY11

VSS_271

AN11

VSS_272

AH11

VSS_273

Y11

VSS_275

N11

VSS_276

G11

VSS_277

C11

VSS_278

BG10

VSS_279

AV10

VSS_280

AT10

VSS_281

AJ10

VSS_282

AE10

VSS_283

AA10

VSS_284

M10

VSS_285

BF9

VSS_286

BC9

VSS_287

AN9

VSS_288

AM9

VSS_289

AD9

VSS_290

G9

VSS_291

B9

VSS_292

BH8

VSS_293

BB8

VSS_294

AV8

VSS_295

AT8

VSS_296

CANTIGA ES_FCBGA1329

CANTIGA ES_FCBGA1329

VSS

VSS

VSS_NCTF_10

VSS NCTF

VSS NCTF

VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16

VSS SCB

VSS SCB

NC

NC

2

V

SS_297
SS_298

V
V

SS_299

V

SS_300

V

SS_301

V

SS_302

V

SS_303

V

SS_304
SS_305

V

SS_306

V
V

SS_307
SS_308

V
V

SS_309

V

SS_310
VSS_311
VSS_312
VSS_313
VSS_314
VSS_315
VSS_316
VSS_317
VSS_318
VSS_319
VSS_320
VSS_321
VSS_322
VSS_323
VSS_324
VSS_325

VSS_327
VSS_328
VSS_329
VSS_330
VSS_331
VSS_332
VSS_333
VSS_334
VSS_335
VSS_336
VSS_337
VSS_338
VSS_339
VSS_340
VSS_341
VSS_342
VSS_343
VSS_344
VSS_345
VSS_346
VSS_347
VSS_348
VSS_349
VSS_350

VSS_351
VSS_352
VSS_353
VSS_354

VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9

VSS_SCB_1
VSS_SCB_2
VSS_SCB_3
VSS_SCB_4
VSS_SCB_5

NC_26
NC_27
NC_28
NC_29
NC_30
NC_31
NC_32
NC_33
NC_34
NC_35
NC_36
NC_37
NC_38
NC_39
NC_40
NC_41
NC_42

AH8
Y8
L8
E8
B8
AY7
AU7
AN7
AJ7
AE7
AA7
N7
J7
BG6
BD6
AV6
AT6
AM6
M6
C6
BA5
AH5
AD5
Y5
L5
J5
H5
F5
BE4

BC3
AV3
AL3
R3
P3
F3
BA2
AW2
AU2
AR2
AP2
AJ2
AH2
AF2
AE2
AD2
AC2
Y2
M2
K2
AM1
AA1
P1
H1

U24
U28
U25
U29

AF32
AB32
V32
AJ30
AM29
AF29
AB29
U26
U23
AL20
V20
AC19
AL17
AJ17
AA17
U17

BH48
BH1
A48
C1
A3

E1
D2
C3
B4
A5
A6
A43
A44
B45
C46
D47
B47
A46
F48
E48
C48
B48

1

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Cantiga(7 of 7)

Cantiga(7 of 7)

Cantiga(7 of 7)

LA-5152P

LA-5152P

LA-5152P

16 51Monday, June 15, 2009

16 51Monday, June 15, 2009

16 51Monday, June 15, 2009

1

A00

A00

A00

http://mycomp.su/x/

5

1.5V

+

V_DDR_MCH_REF

+3VS

+

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

1

2

DDR_CKE0_DIMMA<11>

DDR_A_BS2<13>

M_CLK_DDR0<11>
M_CLK_DDR#0<11>

DDR_A_BS0<13>

DDR_A_WE#<13>
DDR_A_CAS#<13>

DDR_CS1_DIMMA#<11>

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C194

C194

1

1

C193

C193

2

2

C175

C175

12

10K_0402_5%

10K_0402_5%

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

R135

R135

+

V_DDR_MCH_REF

D

DR_A_D0

D

DR_A_D1

C174

C174

DR_A_DM0

D

D

DR_A_D2

D

DR_A_D3

D

DR_A_D8

D

DR_A_D9

DDR_A_DQS#1
DDR_A_DQS1

DDR_A_D10
DDR_A_D11

DDR_A_D16
DDR_A_D17

DDR_A_DQS#2

DDR_A_DQS2

DDR_A_D18
DDR_A_D19

DDR_A_D24
DDR_A_D25

DDR_A_DM3

DDR_A_D26
DDR_A_D27

DDR_CKE0_DIMMA

DDR_A_BS2

DDR_A_MA12
DDR_A_MA9

DDR_A_MA8
DDR_A_MA5

DDR_A_MA3
DDR_A_MA1

M_CLK_DDR0
M_CLK_DDR#0

DDR_A_MA10

DDR_A_BS0

DDR_A_WE#
DDR_A_CAS#

DDR_A_MA13

DDR_CS1_DIMMA#

T56T56

DDR_A_D32
DDR_A_D33

DDR_A_DQS#4
DDR_A_DQS4

DDR_A_D34
DDR_A_D35

DDR_A_D40
DDR_A_D41

DDR_A_DM5

DDR_A_D42
DDR_A_D43

DDR_A_D48
DDR_A_D49

DDR_A_DQS#6
DDR_A_DQS6

DDR_A_D50
DDR_A_D51

DDR_A_D56
DDR_A_D57

DDR_A_DM7

DDR_A_D58
DDR_A_D59

10K_0402_5%

10K_0402_5%

R136

R136

1 2

12

R

R

132

132

1K_0402_1%

1K_0402_1%

D D

C C

B B

A A

12

R

R

133

133

1K_0402_1%

1K_0402_1%

+

V_DDR_MCH_REF

V_DDR_MCH_REF

+

DDR3 SO-DIMM/Standard Type

5

4

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86
88
90
92
94
96
98
100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

1.5V

+

D

DR_A_D4

D

DR_A_D5

D

DR_A_DQS#0
DR_A_DQS0

D

D

DR_A_D6

D

DR_A_D7

D

DR_A_D12

D

DR_A_D13

DDR_A_DM1
DDR3_DRAMRST#

DDR_A_D14
DDR_A_D15

DDR_A_D20
DDR_A_D21

DDR_A_DM2

DDR_A_D22
DDR_A_D23

DDR_A_D28
DDR_A_D29

DDR_A_DQS#3
DDR_A_DQS3

DDR_A_D30
DDR_A_D31

DDR_CKE1_DIMMA

DDR_A_MA14

DDR_A_MA11
DDR_A_MA7

DDR_A_MA6
DDR_A_MA4

DDR_A_MA2
DDR_A_MA0

M_CLK_DDR1
M_CLK_DDR#1

DDR_A_BS1
DDR_A_RAS#

DDR_CS0_DIMMA#
M_ODT0_DIMMA

M_ODT1_DIMMA

+V_DDR_MCH_REF

DDR_A_D36
DDR_A_D37

DDR_A_DM4

DDR_A_D38
DDR_A_D39

DDR_A_D44
DDR_A_D45

DDR_A_DQS#5
DDR_A_DQS5

DDR_A_D46
DDR_A_D47

DDR_A_D52
DDR_A_D53

DDR_A_DM6

DDR_A_D54
DDR_A_D55

DDR_A_D60
DDR_A_D61

DDR_A_DQS#7
DDR_A_DQS7

DDR_A_D62
DDR_A_D63

PM_EXTTS#0_R
ICH_SM_DA
ICH_SM_CLK

1.5V

+

J

J

DIMM1

DIMM1

1

V

REF_DQ

3

V

SS2

5

D

Q0

7

D

Q1

9

V

SS4

11

D

M0

13

SS5

V

15

Q2

D

17

D

Q3

19

SS7

V

21

D

Q8

23

D

Q9

25

VSS9

27

DQS#1
DQS129RESET#

31

VSS11

33

DQ10

35

DQ11

37

VSS13

39

DQ16

41

DQ17

43

VSS15

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3

65

VSS23

67

DQ26

69

DQ27

71

VSS25

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

+0.75VS +0.75VS

203

VTT1

205

G1

FOX_AS0A626-U4RN-7F

FOX_AS0A626-U4RN-7F

CONN@

CONN@

4

V

V

D

QS#0

D

V

V
D
D

VSS10

VSS12

DQ14
DQ15

VSS14

DQ20
DQ21

VSS16

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

VSS24

DQ30
DQ31

VSS26

CKE1
VDD2

VDD4

VDD6

VDD8

VDD10

CK1#

VDD12

RAS#

VDD14

ODT0

VDD16

ODT1

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

VSS31

DQ38
DQ39

VSS33

DQ44
DQ45

VSS35

DQS#5

DQS5

VSS38

DQ46
DQ47

VSS40

DQ52
DQ53

VSS42

VSS43

DQ54
DQ55

VSS45

DQ60
DQ61

VSS47

DQS#7

DQS7

VSS50

DQ62
DQ63

VSS52

EVENT#

VTT2

D
D
SS3

QS0
SS6
D
D
SS8

DM1

DM2

CK1

BA1

NC2

DM4

DM6

SDA
SCL

SS1

Q4
Q5

Q6
Q7

Q12
Q13

A15
A14

A11

A7

A6
A4

A2
A0

S0#

G2

3

DDR3_DRAMRST# <11,18>

DDR_CKE1_DIMMA <11>

T55T55

M_CLK_DDR1 <11>
M_CLK_DDR#1 <11>

DDR_A_BS1 <13>
DDR_A_RAS# <13>

DDR_CS0_DIMMA# <11>
M_ODT0_DIMMA <11>

M_ODT1_DIMMA <11>

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

1

C187

C187

2

+V_DDR_MCH_REF

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

C188

C188

2

N

ote :
DDR3 command & contorl signals need no termination.
DDR2 command & command signals 56 ohm pull up to VccSus0_9

DDR_A_D[0..63]<13>

DDR_A_DQS[0..7]<13>

DDR_A_DQS#[0..7]<13>

DDR_A_DM[0..7]<13>

DDR_A_MA[0..14]<13>

Place close to SO-DIMM

+1.5V

330U_D2_2.5VY_R15M

330U_D2_2.5VY_R15M

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

1

C176

C176

C177

C177

+

+

2

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

1

C183

C183

C186

C186

2

2

2

+0.75VS

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C189

C189

2

1

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C190

C190

2

2

1

1

Place close to JDIMM pin 203 and 204

@

@

R134

R134

0_0402_5%

0_0402_5%

1 2

ICH_SM_DA <6,18,20,21>
ICH_SM_CLK <6,18,20,21>

PM_EXTTS#0 <11>

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

1

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

C180

C180

C179

C179

C178

C178

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C185

C185

C184

C184

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

C191

C191

2

C192

C192

1

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

C181

C181

C182

C182

2

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DDRIII SO-DIMM A SLOT

DDRIII SO-DIMM A SLOT

DDRIII SO-DIMM A SLOT

LA-5152P

LA-5152P

LA-5152P

A00

A00

17 51Monday, June 15, 2009

17 51Monday, June 15, 2009

17 51Monday, June 15, 2009

1

A00

http://mycomp.su/x/

5

4

3

2

1

1.5V

V_DDR_MCH_REF

+

1

DDR_CKE2_DIMMB<11>

DDR_CS3_DIMMB#<11>

+3VS

2

DDR_B_BS2<13>

M_CLK_DDR2<11>
M_CLK_DDR#2<11>

DDR_B_BS0<13>

DDR_B_WE#< 13>
DDR_B_CAS#<13>

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

D D

C C

B B

R138

R138

1 2

A A

+3VS

10K_0402_5%

10K_0402_5%

+

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

D
D

1

C196

C196

C195

C195

D

D

2

D

D
D

DDR_B_DQS#1
DDR_B_DQS1

DDR_B_D10
DDR_B_D11

DDR_B_D16
DDR_B_D17

DDR_B_DQS#2

DDR_B_DQS2

DDR_B_D18
DDR_B_D19

DDR_B_D24
DDR_B_D25

DDR_B_DM3

DDR_B_D26
DDR_B_D27

DDR_CKE2_DIMMB

DDR_B_BS2

DDR_B_MA12
DDR_B_MA9

DDR_B_MA8
DDR_B_MA5

DDR_B_MA3
DDR_B_MA1

M_CLK_DDR2
M_CLK_DDR#2

DDR_B_MA10
DDR_B_BS0

DDR_B_WE#
DDR_B_CAS#

DDR_B_MA13
DDR_CS3_DIMMB#

T58T58

DDR_B_D32
DDR_B_D33

DDR_B_DQS#4
DDR_B_DQS4

DDR_B_D34
DDR_B_D35

DDR_B_D40
DDR_B_D41

DDR_B_DM5

DDR_B_D42
DDR_B_D43

DDR_B_D48
DDR_B_D49

DDR_B_DQS#6
DDR_B_DQS6

DDR_B_D50
DDR_B_D51

DDR_B_D56
DDR_B_D57

DDR_B_DM7

DDR_B_D58
DDR_B_D59

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

12

1

C214

C214

C215

C215

2

V_DDR_MCH_REF

DR_B_D0
DR_B_D1

DR_B_DM0

DR_B_D2
DR_B_D3

DR_B_D8
DR_B_D9

+0.75VS

10K_0402_5%

10K_0402_5%

R139

R139

+

INK OK

L

J

J

DIMM2

DIMM2

1

V

REF_DQ

3

V

SS2

5

D

Q0

7

D

Q1

9

V

SS4

11

D

M0

13

SS5

V

15

Q2

D

17

D

Q3

19

SS7

V

21

D

Q8

23

D

Q9

25

VSS9

27

DQS#1
DQS129RESET#
VSS1131VSS12

33

DQ10

35

DQ11
VSS1337VSS14

39

DQ16

41

DQ17
VSS1543VSS16

45

DQS#2

47

DQS2

49

VSS18

51

DQ18

53

DQ19

55

VSS20

57

DQ24

59

DQ25
VSS2261DQS#3

63

DM3
VSS2365VSS24

67

DQ26

69

DQ27
VSS2571VSS26

73

CKE0

75

VDD1

77

NC1

79

BA2

81

VDD3

83

A12/BC#

85

A9

87

VDD5

89

A8

91

A5

93

VDD7

95

A3

97

A1

99

VDD9

101

CK0

103

CK0#

105

VDD11

107

A10/AP

109

BA0

111

VDD13

113

WE#

115

CAS#

117

VDD15

119

A13

121

S1#

123

VDD17

125

NCTEST

127

VSS27

129

DQ32

131

DQ33

133

VSS29

135

DQS#4

137

DQS4

139

VSS32

141

DQ34

143

DQ35

145

VSS34

147

DQ40

149

DQ41

151

VSS36

153

DM5

155

VSS37

157

DQ42

159

DQ43

161

VSS39

163

DQ48

165

DQ49

167

VSS41

169

DQS#6

171

DQS6

173

VSS44

175

DQ50

177

DQ51

179

VSS46

181

DQ56

183

DQ57

185

VSS48

187

DM7

189

VSS49

191

DQ58

193

DQ59

195

VSS51

197

SA0

199

VDDSPD

201

SA1

203

VTT1

205

G1

FOX_AS0A626-U8RN-7F

FOX_AS0A626-U8RN-7F

CONN@

CONN@

V

SS1
D
D

V

SS3

D

QS#0

D

QS0
SS6

V

D
D
SS8

V
D
D

VSS10

DM1

DQ14
DQ15

DQ20
DQ21

DM2

VSS17

DQ22
DQ23

VSS19

DQ28
DQ29

VSS21

DQS3

DQ30
DQ31

CKE1
VDD2

VDD4

VDD6

VDD8

VDD10

CK1

CK1#

VDD12

BA1

RAS#

VDD14

ODT0

VDD16

ODT1

NC2

VDD18

VREF_CA

VSS28

DQ36
DQ37

VSS30

DM4

VSS31

DQ38
DQ39

VSS33

DQ44

DQ45
VSS35
DQS#5

DQS5

VSS38

DQ46

DQ47
VSS40

DQ52

DQ53
VSS42

DM6

VSS43

DQ54

DQ55
VSS45

DQ60

DQ61
VSS47
DQS#7

DQS7

VSS50

DQ62

DQ63
VSS52

EVENT#

SDA
SCL

VTT2

Q12
Q13

A15
A14

A11

S0#

DDR3 SO-DIMM/Standard Type

5

4

1.5V

+

2

D

4

Q4

6

Q5

8
10
12
14
16

Q6

18

Q7

20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72

74
76
78
80
82
84
86

A7

88
90

A6

92

A4

94
96

A2

98

A0

100
102
104
106
108
110
112
114
116
118
120
122
124
126
128
130
132
134
136
138
140
142
144
146
148
150
152
154
156
158
160
162
164
166
168
170
172
174
176
178
180
182
184
186
188
190
192
194
196
198
200
202
204

206

G2

DR_B_D4

D

DR_B_D5

D

DR_B_DQS#0
DR_B_DQS0

D

D

DR_B_D6

D

DR_B_D7

D

DR_B_D12

D

DR_B_D13

DDR_B_DM1
DDR3_DRAMRST#

DDR_B_D14
DDR_B_D15

DDR_B_D20
DDR_B_D21

DDR_B_DM2

DDR_B_D22
DDR_B_D23

DDR_B_D28
DDR_B_D29

DDR_B_DQS#3
DDR_B_DQS3

DDR_B_D30
DDR_B_D31

DDR_CKE3_DIMMB

DDR_B_MA14

DDR_B_MA11
DDR_B_MA7

DDR_B_MA6
DDR_B_MA4

DDR_B_MA2
DDR_B_MA0

M_CLK_DDR3
M_CLK_DDR#3

DDR_B_BS1
DDR_B_RAS#

DDR_CS2_DIMMB#
M_ODT2_DIMMB

M_ODT3_DIMMB

+V_DDR_MCH_REF

DDR_B_D36
DDR_B_D37

DDR_B_DM4

DDR_B_D38
DDR_B_D39

DDR_B_D44
DDR_B_D45

DDR_B_DQS#5
DDR_B_DQS5

DDR_B_D46
DDR_B_D47

DDR_B_D52
DDR_B_D53

DDR_B_DM6

DDR_B_D54
DDR_B_D55

DDR_B_D60
DDR_B_D61

DDR_B_DQS#7
DDR_B_DQS7

DDR_B_D62
DDR_B_D63

PM_EXTTS#1_R
ICH_SM_DA
ICH_SM_CLK

+0.75VS

DDR3_DRAMRST# <11,17>

DDR_CKE3_DIMMB <11>

T57T57

M_CLK_DDR3 <11>
M_CLK_DDR#3 <11>

DDR_B_BS1 <13>
DDR_B_RAS# <13>

DDR_CS2_DIMMB# <11>
M_ODT2_DIMMB <11>

M_ODT3_DIMMB <11>

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C208

C208

2

@

@

R137

R137

0_0402_5%

0_0402_5%

1 2

ICH_SM_DA <6,17,20,21>
ICH_SM_CLK <6,17,20,21>

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

+V_DDR_MCH_REF

1

C209

C209

2

PM_EXTTS#1 <11>

D

DR_B_D[0..63]<13>

DDR_B_DQS[0..7]<13>

DDR_B_DQS#[0..7]<13>

DDR_B_DM[0..7]<13>

DDR_B_MA[0..14]<13>

Place close to SO-DIMM

+1.5V

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

C198

C198

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C205

C205

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

C212

C212

1

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

C199

C199

C200

C200

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C207

C207

C206

C206

2

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

C213

C213

1

+0.75VS

330U_D2_2.5VY_R15M

330U_D2_2.5VY_R15M

1

C197

C197

+

+

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C204

C204

2

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

2

C210

C210

C211

C211

1

1

Place close to JDIMM pin 203 and 204

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

C201

C201

2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

C203

C203

C202

C202

2

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

DDRIII SO-DIMM B SLOT

DDRIII SO-DIMM B SLOT

DDRIII SO-DIMM B SLOT

LA-5152P

LA-5152P

LA-5152P

A00

A00

18 51Monday, June 15, 2009

18 51Monday, June 15, 2009

18 51Monday, June 15, 2009

1

A00

http://mycomp.su/x/

5

4

3

2

1

12

R

R
10M_040 2_5%

10M_040 2_5%

ICH_RTCRS T#
SRTCRST #
INTRUDER#

R157

R157

1 2

332K_04 02_1%

332K_04 02_1%

+1.5VS

33_0402 _5%

33_0402 _5%

33_0402 _5%

33_0402 _5%

HDA_SDIN0<25>
HDA_SDIN1<11>

I

CH_RTCX 1

140

140

ICH_RTCX2

ICH_INTVRMEN

R149

R149

24.9_040 2_1%

24.9_040 2_1%

1 2

HDA_BITCL K_ICH
HDA_SYNC_ICH

HDA_RST _ICH#

HDA_SDO UT_ICH

SATA_AC T#_R

SATA_ITX_ DRX_N0
SATA_ITX_ DRX_P0

SATA_ITX_ DRX_N1
SATA_ITX_ DRX_P1

HDA_SDIN0
HDA_SDIN1

6A

6A

U

U

C23

RTCX1

C24

RTCX2

A25

RTCRST#

F20

SRTCRST#

C22

INTRUDER#

B22

INTVRMEN

A22

LAN100_SLP

E25

GLAN_CLK

C13

LAN_RSTSYNC

F14

LAN_RXD0

G13

LAN_RXD1

D14

LAN_RXD2

D13

LAN_TXD0

D12

LAN_TXD1

E13

LAN_TXD2

B10

GPIO56

B28

GLAN_COMPI

B27

GLAN_COMPO

AF6

HDA_BIT_CLK

AH4

HDA_SYNC

AE7

HDA_RST#

AF4

HDA_SDIN0

AG4

HDA_SDIN1

AH3

HDA_SDIN2

AE5

HDA_SDIN3

AG5

HDA_SDOUT

AG7

HDA_DOCK_EN#/GPIO33

AE8

HDA_DOCK_RST#/GPIO34

AG8

SATALED#

AJ16

SATA0RXN

AH16

SATA0RXP

AF17

SATA0TXN

AG17

SATA0TXP

AH13

SATA1RXN

AJ13

SATA1RXP

AG14

SATA1TXN

AF14

SATA1TXP

ICH9M_FCB GA676~D

ICH9M_FCB GA676~D

RTCLAN / GLANIHDASATA

LPCCPU

RTCLAN / GLANIHDASATA

LPCCPU

FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3

FWH4/LFRAME#

LDRQ0#

LDRQ1#/GPIO23

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

CPUPWRGD

IGNNE#

INIT#
INTR

RCIN#

NMI

SMI#

STPCLK#

THRMTRIP#

TP12

SATA4RXN
SATA4RXP
SATA4TXN
SATA4TXP

SATA5RXN
SATA5RXP
SATA5TXN
SATA5TXP

SATA_CLKN
SATA_CLKP

SATARBIAS#

SATARBIAS

K5
K4
L6
K2

K3

J3
J1

N7
AJ27

AJ25
AE23

AJ26

AD22

AF25

AE22
AG25
L3

AF23
AF24

AH27

AG26

AG27

AH11
AJ11
AG12
AF12

AH9
AJ9
AE10
AF10

AH18
AJ18

AJ7
AH7

LPC_AD0
LPC_AD1
LPC_AD2
LPC_AD3

LPC_FRA ME#

GATEA20
H_A20M#

H_DPRST P#
H_DPSLP #

R148

R148

12

56_0402 _5%

56_0402 _5%

H_PW RGOOD

H_IGNNE#

H_INIT#
H_INTR
KB_RST#

H_NMI
H_SMI#

H_STPCL K#

THERMTR IP_ICH#

ICH_TP12

SATA_ITX_ DRX_N4
SATA_ITX_ DRX_P4

SATA_ITX_ DRX_N5
SATA_ITX_ DRX_P5

CLK_PCIE_ SATA#
CLK_PCIE_ SATA

R156 2 4.9_0402_1%R156 2 4.9_0402_1%

Within 500 mils

PC_AD[0..3 ] <2 7,31>

L

LPC_FRA ME# <27 ,31>

T59T59
T60T60

GATEA20 < 31>
H_A20M# <7>

H_DPRST P# <8,11,43>
H_DPSLP # <8>

H_FERR# <7>

H_PW RGOOD <8>

H_IGNNE# <7>

H_INIT# <7>
H_INTR <7>
KB_RST# <31>

H_NMI <7>
H_SMI# <7 >

H_STPCL K# < 7>

R154 54.9_040 2_1%R154 54.9_040 2_1%

1 2

T61T61

C220 0.01U_0402 _16V7K~DC220 0.01U_0402 _16V7K~D
C221 0.01U_0402 _16V7K~DC221 0.01U_0402 _16V7K~D

C222 0.01U_0402 _16V7K~DC222 0.01U_0402 _16V7K~D
C223 0.01U_0402 _16V7K~DC223 0.01U_0402 _16V7K~D

CLK_PCIE_ SATA <6>

12

placed within 2" from
ICH9M

12
12

12
12

R142

R142

GATEA20

R145 10 K_0402_5%R145 1 0K_0402_5%

KB_RST#

H_FERR#

R147 49.9_04 02_1%R147 49.9_04 02_1%

dual core 56_5%
quad core 50_5%

+1.05V_V CCP

12

R151

R151

49.9_040 2_1%

49.9_040 2_1%

SATA_IRX_ DTX_N4 <30>
SATA_IRX_ DTX_P4 < 30>

SATA_ITX_ C_DRX_N4 <30 >

SATA_ITX_ C_DRX_P4 <30>

SATA_IRX_ DTX_N5 <29>
SATA_IRX_ DTX_P5 < 29>

SATA_ITX_ C_DRX_N5 <29 >

SATA_ITX_ C_DRX_P5 <29>

10K_040 2_5%

10K_040 2_5%

12

12

+1.05V_V CCP

12

dual core 56_5%
quad core 50_5%

H_THERM TRIP# < 7,11>

To ESATA

To ODD

+

3VS

C

C

864 1 5P_0402_50V8 J

864 1 5P_0402_50V8 J

D D

S

hunt

Open

Shunt

Open

C C

B B

Delete when UMA net in

HDA_BITCL K_NB<11>

HDA_SYNC_ NB<11>

HDA_RST _NB#<11>

HDA_SDO UT_NB<11>

C

MOS settingCMOS_CLR1

Clear CMOS

Keep CMOS

R143 20K_040 2_5%R143 20K_040 2_5%

+RTCVCC

1 2

R144 20K_040 2_5%R144 20K_040 2_5%

1 2

R146 1K_0402 _5%R146 1K_0402 _5%

1 2

TPM settingME_CLR1

Clear ME RTC Registers

Keep ME RTC Registers

1 2

R874

R874

1 2

R875

R875

1 2

R876 33_040 2_5%R876 33_0 402_5%

1 2

R877 33_0 402_5%R8 77 33_ 0402_5%

HDA_BITCL K_ICH

33_0402 _5%

33_0402 _5%

HDA_SYNC_ ICH

33_0402 _5%

33_0402 _5%

HDA_RST _ICH#

HDA_SDO UT_ICH

To JSATA1

To JSATA2

32.768KH Z_12.5PF_1TJS 125BJ4A421P

32.768KH Z_12.5PF_1TJS 125BJ4A421P

C217 15P_040 2_50V8JC217 1 5P_0402_50V8 J

12

@

ME1@ME1

SATA_IRX_ DTX_N0<29>
SATA_IRX_ DTX_P0<29>
SATA_ITX_ C_DRX_N0< 29> CLK_PCIE_ SATA# <6>
SATA_ITX_ C_DRX_P0<29>

SATA_IRX_ DTX_N1<29>
SATA_IRX_ DTX_P1<29>
SATA_ITX_ C_DRX_N1< 29>
SATA_ITX_ C_DRX_P1<29>

Y

Y

2

2

2

N

C

3

N

C

1U_0603_10V6K~D

1U_0603_10V6K~D

CMOS1@CMOS1

2

C218

C218

1

@

R02 RF reserve part.

C1532

@C 1532

@

10P_040 2_50V8J~D

10P_040 2_50V8J~D

HDA_BITCL K_AUDIO<2 5>
HDA_SYNC_ AUDIO<25>

HDA_RST _AUDIO#<25>

HDA_SDO UT_AUDIO<2 5>

1

I

N

4

O

UT

R141

R141

1 2

0_0402_ 5%

0_0402_ 5%

+RTCVCC

1U_0603_10V6K~D

1U_0603_10V6K~D

2

12

C219

C219

1

12

R150

R150

1 2

R152 33_0 402_5%R152 33_0 402_5%

1 2

R153

R153

1 2

R155 33_0 402_5%R155 3 3_0402_5%

1 2

T62 PAD~ DT62 PAD~D
T63 PAD~ DT63 PAD~D

T84 PAD~ DT84 PAD~D

C224 0.01U_0402 _16V7K~DC224 0.01U_0402 _16V7K~D

12

C225 0.01U_0402 _16V7K~DC225 0.01U_0402 _16V7K~D

12

C226 0.01U_0402 _16V7K~DC226 0.01U_0402 _16V7K~D

12

C227 0.01U_0402 _16V7K~DC227 0.01U_0402 _16V7K~D

12

P/N : SA00002G12L (S IC AF82801IEM SLB8P A3 PBGA676P ICH9ME )

+3VS

XOR Chain Entrance Strap

DescriptionICH TP3 HDA SDOUT

0 0

0

1

A A

1 1

1

0

RSVD

Enter XOR Chain

Normal Operation (Default)

Set PCIE port config bit 1

12

R158

@R 158

@

1K_0402 _5%

1K_0402 _5%

HDA_SDO UT_ICH

12

R160

@R 160

@

1K_0402 _5%

1K_0402 _5%

ICH_TP3 <21>

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: S heet o f

Date: S heet o f

3

2

Date: S heet o f

Compal Electronics, Inc.

ICH9-M(1/5)

ICH9-M(1/5)

ICH9-M(1/5)

LA-5152P

LA-5152P

LA-5152P

A00

A00

19 51Monday, June 15 , 2009

19 51Monday, June 15 , 2009

19 51Monday, June 15 , 2009

1

A00

http://mycomp.su/x/

5

+

3VS

@

@

R185

R185

33_0402 _5%

33_0402 _5%

P

CI_REQ0#

P

CI_REQ1#

P

CI_REQ2#

P

CI_REQ3#

PCI_IRDY#

PCI_DEVSE L#

PCI_PERR#

PCI_PLOCK #

PCI_SERR#

PCI_STOP#

PCI_TRDY#

PCI_FRAME #

PCI_PME#

PCI_PIRQA#

PCI_PIRQB#

PCI_PIRQC#

PCI_PIRQD#

PCI_PIRQH#

PCI_PIRQF#

PCI_PIRQG#

ACCEL_INT #

PCI_CLK

R

R

161 8.2K_0402 _5%

161 8.2K_0402 _5%

1 2

R

R

162 8.2K_0402 _5%

162 8.2K_0402 _5%

1 2

R

R

163 8.2K_0402 _5%

163 8.2K_0402 _5%

D D

C C

B B

1 2

R

R

164 8.2K_0402 _5%

164 8.2K_0402 _5%

1 2

R165 8.2K_040 2_5%R165 8.2K_0402_ 5%

1 2

R166 8.2K_040 2_5%R166 8.2K_0402_ 5%

1 2

R167 8.2K_040 2_5%R167 8.2K_0402_ 5%

1 2

R168 8.2K_040 2_5%R168 8.2K_0402_ 5%

1 2

R169 8.2K_040 2_5%R169 8.2K_0402_ 5%

1 2

R170 8.2K_040 2_5%R170 8.2K_0402_ 5%

1 2

R171 8.2K_040 2_5%R171 8.2K_0402_ 5%

1 2

R173 8.2K_040 2_5%R173 8.2K_0402_ 5%

1 2

R174 8.2K_040 2_5%R174 8.2K_0402_ 5%

1 2

R176 8.2K_040 2_5%R176 8.2K_0402_ 5%

1 2

R177 8.2K_040 2_5%R177 8.2K_0402_ 5%

1 2

R178 8.2K_040 2_5%R178 8.2K_0402_ 5%

1 2

R179 8.2K_040 2_5%R179 8.2K_0402_ 5%

1 2

R180 8.2K_040 2_5%R180 8.2K_0402_ 5%

1 2

R181 8.2K_040 2_5%R181 8.2K_0402_ 5%

1 2

R182 8.2K_040 2_5%R182 8.2K_0402_ 5%

1 2

R183 8.2K_040 2_5%R183 8.2K_0402_ 5%

@

@

22P_040 2_50V8J

22P_040 2_50V8J

C228

C228

12

12

1 2

4

6B

6B

U

C14

F1
G4
B6

A7
F13
F12

E6

F6

D8

B4

D6

A5

D3

E3

R1

C6

E4

C2

J4
A4
F5
D7

D4
R2

U

REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55

C/BE0#
C/BE1#
C/BE2#
C/BE3#

IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#

PLTRST#
PCICLK
PME#

P

CI_REQ0#
PCI_GNT0#
PCI_REQ1#

PCI_REQ2#

PCI_REQ3#
PCI_GNT3#

PCI_IRDY#

PCI_PCIRST#
PCI_DEVSE L#
PCI_PERR#
PCI_PLOCK #
PCI_SERR#
PCI_STOP#
PCI_TRDY#
PCI_FRAME #

PCI_PLTRS T#

PCI_CLK<6>

PCI_CLK
PCI_PME#

R03 Modify

Interrupt I/F

ACCEL_INT #
PCI_PIRQF#
PCI_PIRQG#
PCI_PIRQH#

Interrupt I/F

H4

PIRQE#/GPIO2

K6

PIRQF#/GPIO3

F2

PIRQG#/GPIO4

G2

PIRQH#/GPIO5

ICH9M_FCB GA676~D

ICH9M_FCB GA676~D

Free Fall Sensor

+3VS +3 VS_ACL_IO

1 2

R1004 0_0603_5%

R1004 0_0603_5%

+3VS_AC L_IO

ICH_SM_DA<6,17,18,21 >

ICH_SM_CL K<6,17,18,2 1>

@

@

+3VS

1 2

+3VS

R1005 10K_040 2_5%R1005 10K_04 02_5%

ACCEL_INT #

3

AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31

PIRQA#
PIRQB#
PIRQC#
PIRQD#

C961

C961

U43

U43

DE351DLTR

DE351DLTR

VDD_IO
VDD

INT 1
INT 29GND

SDO
SDA / SDI / SDO
SCL / SPC

CS

AD0
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9

RSVD
RSVD

PCI

PCI

0.1U_040 2_16V4Z~D

0.1U_040 2_16V4Z~D

1
6

8

12
13
14

7

DE351DL TR_LGA14_3X5

DE351DL TR_LGA14_3X5

GND
GND
GND

D11
C8
D9
E12
E9
C9
E10
B7
C7
C5
G11
F8
F11
E7
A3
D2
F10
D5
D10
B3
F7
C3
F3
F4
C1
G7
H7
D1
G5
H6
G1
H3

J5
E1
J6
C4

2

1

2
4
5
10

3
11

PCI_PIRQA#

PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#

+3VS

1

C962

C962
10U_080 5_10V4Z~D

10U_080 5_10V4Z~D

2

+3VS

2

B

oot BIOS Strap

PCI_GNT0# SPI_CS#1

0

SPI_CS1#R

PCI_GNT0#

1

2

C955

0

1

R172 1K_0402 _5%@R 172 1K_0 402_5%@

R175 1K_0402 _5%@R 175 1K_0 402_5%@

+3VALW

5

2

P

B

1

A

G

3

12

+3VALW

1

@

@

2

5

MC74VHC 1G08DFT2G SC7 0 5P

MC74VHC 1G08DFT2G SC7 0 5P

2

P

B

1

A

G

3

0_0402_ 5%

0_0402_ 5%

12

1

1

SPI_CS1#R<22>

GNT0 & SPI_CS#1 have a weak internal pull up

@

@

C954

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

PCI_PCIRST#

PCI_PLTRS T#

C954

R184 0_0402_ 5%R184 0_0402_5%

@C 955

@

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

R187

R187

A16 swap override Strap

Low= A16 swap override Enble

PCI_GNT3#

PCI_GNT3#

High= Default

R186 1K_0402 _5%@ R186 1K_0402 _5%@

1 2

B

oot BIOS Location

SPI1

P

CI

LPC

1 2

1 2

U7

@ U7

@

MC74VHC 1G08DFT2G SC7 0 5P

MC74VHC 1G08DFT2G SC7 0 5P

4

Y

U8

U8

PLT_RST #

4

Y

*

1

*

+3VALW

PCI_RST# <24,27,28>

PLT_RST # <11 ,27,30,31>

A A

Must be placed i n the center of the system.

P/N : SA000039C0 0 (S IC DE351DL TR LGA 14P MOTIO N SENSOR)

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: S heet o f

Date: S heet o f

3

2

Date: S heet o f

Compal Electronics, Inc.

ICH9-M(2/5)

ICH9-M(2/5)

ICH9-M(2/5)

LA-5152P

LA-5152P

LA-5152P

A00

A00

20 51Monday, June 15 , 2009

20 51Monday, June 15 , 2009

20 51Monday, June 15 , 2009

1

A00

http://mycomp.su/x/

5

3VS

+

Change PN: SB00000AR00 (S TR 2N7002DW T/R7 2N SOT-363-6) to
SB57002528L (S TR 2N7002DW-7-F 2N SOT-363)

12

12

R

R

R

2.2K_040 2_5%

2.2K_040 2_5%

CH_SM_D A<6,17 ,18,20>

I

D D

I

CH_SM_C LK<6,17,18 ,20>

+3VS

R194

R194

1 2

R198 8.2K_ 0402_5%R 198 8.2 K_0402_5%

1 2

R199

R199

1 2

R200

R200

1 2

R201 8.2K_040 2_5%@ R201 8.2 K_0402_5%@

1 2

C C

+3VALW

R206 10K_0 402_5%R206 10K _0402_5%

1 2

R211 10K_0 402_5%R211 10K _0402_5%

1 2

R213

R213

1 2

R209 10K_040 2_5%R209 10K_0 402_5%

1 2

R210 10K_0402_5%R210 10K_0402_5%

1 2

R214

R214

1 2

R208 1K_0402 _5%R208 1K_0402 _5%

1 2

R216 8.2K_040 2_5%R216 8.2K_0402_ 5%

1 2

R

189

189

188

188

2.2K_040 2_5%

+3VS

2.2K_040 2_5%

2

10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

R

03 memo modify

I

CH_SMBD ATA

61

Q

Q

2A

2A

2N7002D W-7-F_SOT36 3-6~D

2N7002D W-7-F_SOT36 3-6~D

I

CH_SMBC LK

3

4

2B

2B

Q

Q
2N7002D W-7-F_SOT36 3-6~D

2N7002D W-7-F_SOT36 3-6~D

5

SERIRQ

EC_THER M#

LAN_CAB DT

OCP#

EC_SCI#

LINKALERT #

ICH_SMLINK0

ICH_SMLINK1

ICH_RI#

XDP_DBR ESET#

EC_LID_OU T#

ICH_PCIE_W AKE#

EC_SMI#

VGATE<1 1,31,43>

R204 100K_0402 _5%R204 100K_0402 _5%

GPIO49 has a wea k internal pull -up

@

@

R218 10K_0402_5%

R218 10K_0402_5%

+3VS

1 2

SB_SPKR

low --> default

B B

High -->No reboo t

1 2

R02 add

4

192

192

R

R

2.2K_040 2_5%

2.2K_040 2_5%

XDP_DBR ESET#< 7>

PM_SYNC#< 11>

EC_LID_OU T#<31>

H_STP_P CI#<6 >
H_STP_C PU#<6>

ICH_PCIE_W AKE#<24,27,28,31>

SERIRQ<31>
EC_THER M#<31>

LAN_LOP WEN<24>

EC_SMI#<31>
EC_SCI#<31>

CLKSATA REQ#<6>

SB_SPKR<2 5>

MCH_ICH_S YNC#<11>

ICH_TP3<19>

+

3VALW

12

T64T64

R203

R203

1 2

0_0402_ 5%

0_0402_ 5%

T67

T67

PAD

PAD

OCP#< 7>

T69PAD T69PAD

T81PAD T81PAD

T70PAD T70PAD
T71PAD T71PAD

T72PAD T72PAD
T73PAD T73PAD
T74PAD T74PAD

12

193

193

R

R

2.2K_040 2_5%

2.2K_040 2_5%

ICH_SMBCL K
ICH_SMBDA TA
LINKALERT #
ICH_SMLINK0
ICH_SMLINK1

ICH_RI#

SUS_STA T#
XDP_DBR ESET#

PM_SYNC#

EC_LID_OU T#

H_STP_P CI#
H_STP_C PU#

ICH_PCIE_W AKE#
SERIRQ
EC_THER M#

VRMPW RGDVRMPW RGD

OCP#
LAN_LOP WEN

EC_SMI#
EC_SCI#

CLKSATA REQ#

SB_SPKR
MCH_ICH_S YNC#
ICH_TP3

U

U

6C

6C

G16

SMBCLK

A13

SMBDATA

E17

LINKALERT#/GPIO60/CLGPIO4

C17

SMLINK0

B18

SMLINK1

F19

RI#

R4

SUS_STAT#/LPCPD#

G19

SYS_RESET#

M6

PMSYNC#/GPIO0

A17

SMBALERT#/GPIO11

A14

STP_PCI#

E19

STP_CPU#

L4

CLKRUN#

E20

WAKE#

M5

SERIRQ

AJ23

THRM#

D21

VRMPWRGD

A20

TP11

AG19

GPIO1

AH21

GPIO6

AG21

GPIO7

A21

GPIO8

C12

GPIO12

C21

GPIO13

AE18

GPIO17

K1

GPIO18

AF8

GPIO20

AJ22

SCLOCK/GPIO22

A9

GPIO27

D19

GPIO28

L1

SATACLKREQ#/GPIO35

AE19

SLOAD/GPIO38

AG22

SDATAOUT0/GPIO39

AF21

SDATAOUT1/GPIO48

AH24

GPIO49

A8

GPIO57/CLGPIO5

M7

SPKR

AJ24

MCH_SYNC#

B21

TP3

AH20

TP8

AJ20

TP9

AJ21

TP10

ICH9M_FCB GA676~D

ICH9M_FCB GA676~D

3

f not used, pull-u p to

I
Vcc3_3 or pull-down to GND

GPIO21

CLK14
CLK48

SUSCLK

SLP_S3#
SLP_S4#
SLP_S5#

PWROK

BATLOW#

PWRBTN#

LAN_RST#

RSMRST#

CLPWROK

SLP_M#

CL_CLK0
CL_CLK1

CL_DATA0
CL_DATA1

CL_VREF0
CL_VREF1

CL_RST0#
CL_RST1#

AH23

GPIO19

AF19

GPIO36

AE21

GPIO37

AD20

CLK_14M _ICH

H1

CLK_48M _ICH

AF3

ICH_SUSCL K

P1

SLP_S3#

C16

SLP_S4#

E16

SLP_S5#

G17

C10

ICH_PW ROK

G20

M2

ICH_LOW _BAT#

B13

PBTN_OU T#

R3

D20

R_EC_RS MRST#

D22

CK_PW RGD

R5

M_PW ROK

R6

B16

CL_CLK0

F24
B19

CL_DATA 0

F22
C19

CL_VREF 0_ICH

C25
A19

CL_RST#

F21
D18

A16
C18
C11
C20

R217 0_0402_5%

R217 0_0402_5%

1 2

SATA0GP/GPIO21
SATA1GP/GPIO19
SATA4GP/GPIO36
SATA5GP/GPIO37

SATA

GPIO

SATA

GPIO

SMBSYS GPIO

SMBSYS GPIO

Clocks

Clocks

S4_STATE#/GPIO26

DPRSLPVR/GPIO16

Power MGTController Link

Power MGTController Link

GPIO

GPIO

MEM_LED/GPIO24

GPIO10/SUS_PWR_ACK

GPIO14/AC_PRESENT

MISC

MISC

CK_PWRGD

WOL_EN/GPIO9

2

R996

R996

1 2

10K_040 2_5%

10K_040 2_5%

CLK_14M _ICH <6>
CLK_48M _ICH <6>

T65 PADT65 PAD

SLP_S3# <31>
SLP_S4# <11,31>
SLP_S5# <31>

T66 PADT66 PAD

ICH_PW ROK <11,31 >

DPRSLPV R <11,43>

PBTN_OU T# <31>

R205

R205

1 2

10K_040 2_5%

10K_040 2_5%

CK_PW RGD <6>

M_PW ROK < 11> EC_RSMR ST# <31>POK<40>

T68 PADT68 PAD

CL_CLK0 < 11>

CL_DATA 0 <11>

CL_RST# <11 >

@

@

1

P

lace closely pin AF3

C

LK_48M_ ICH

12

@

@

R

R

190

190

10_0402 _5%

10_0402 _5%

1

@

@

C229

C229

4.7P_040 2_50V8C~D

4.7P_040 2_50V8C~D

2

ICH_PW ROK

ICH_LOW _BAT#

R195 100_040 2_5%R1 95 100_0 402_5%

12

10K_0402_5%

10K_0402_5%

R197

R197

1 2

P

lace closely pin H1

12

@

@

R

R

191

191

10_0402 _5%

10_0402 _5%

1

@

@

C230

C230

4.7P_040 2_50V8C~D

4.7P_040 2_50V8C~D

2

R207

R207

8.2K_040 2_5%

8.2K_040 2_5%

RSMRST circuit

R219

@ R219

@

0_0402_ 5%

0_0402_ 5%

R_EC_RS MRST#

R212

R212

1 2

453_0402_1%

453_0402_1%

12

1

C231

C231

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

ACIN <25,31,38 ,39>
LAN_CAB DT <24>

Maybach CL_CLK1/DATA1 connect to WLAN card
to support iAMT

2

R215

R215

12

R220

R220

0_0402_ 5%

0_0402_ 5%

3.24K_04 02_1%

3.24K_04 02_1%

C

LK_14M_ ICH

12

12

+3VS

M_PW ROK < 11>

+3VALW

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: S heet o f

Date: S heet o f

3

2

Date: S heet o f

Compal Electronics, Inc.

ICH9-M(3/5)

ICH9-M(3/5)

ICH9-M(3/5)

LA-5152P

LA-5152P

LA-5152P

A00

A00

21 51Monday, June 15 , 2009

21 51Monday, June 15 , 2009

21 51Monday, June 15 , 2009

1

A00

http://mycomp.su/x/

5

D D

PCIE_IRX_W ANTX_N1<27 >

PCIE_IRX_W PANTX_N3<28>
PCIE_IRX_W PANTX_P3<28>
PCIE_ITX_C_W PANRX_N3<28>
PCIE_ITX_C_W PANRX_P3<28>

1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2

PCIE_IRX_W ANTX_P1<27>
PCIE_ITX_C_W ANRX_N1<27>
PCIE_ITX_C_W ANRX_P1<27>

PCIE_IRX_W LANTX_N2<2 7>

PCIE_IRX_W LANTX_P2<27>
PCIE_ITX_C_W LANRX_N2<27>
PCIE_ITX_C_W LANRX_P2<27>

PCIE_IRX_CBT X_N4<30 >
PCIE_IRX_CBT X_P4<30>
PCIE_ITX_C_C BRX_N4< 30>
PCIE_ITX_C_C BRX_P4<30>

PCIE_IRX_EXP TX_N5<28>
PCIE_IRX_EXP TX_P5<28>
PCIE_ITX_C_E XPRX_N5<28>
PCIE_ITX_C_E XPRX_P5<28>

PCIE_IRX_GLA NTX_N6<2 4>

PCIE_IRX_GLA NTX_P6<24>
PCIE_ITX_C_G LANRX_N6<24 >
PCIE_ITX_C_G LANRX_P6<24>

10K_040 2_5%

10K_040 2_5%
10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

10K_040 2_5%
10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

10K_040 2_5%

ESATA_U SB_OC#
USB_OC1 #
USB_OC2 #
USB_OC3 #
USB_OC4 #
USB_OC5 #
USB_OC6 #
USB_OC7 #
USB_OC8 #
USB_OC9 #
USB_OC1 0#
USB_OC1 1#

MiniWWAN (Mini Card 1)--->

MiniWLAN (Mini Card 2)--->

MiniWPAN (Mini Card 3)--->

Cardbus--->

C C

Express card--->

10/100/1G LAN --->

+3VALW

R222

R222
R223

R223
R882 10 K_0402_5%R882 1 0K_0402_5%
R224

R224
R225

R225
R226 10K_ 0402_5%R226 10 K_0402_5%
R227 10K_ 0402_5%R227 10 K_0402_5%
R228 10K_ 0402_5%R228 10 K_0402_5%
R229

B B

R229
R230

R230
R231 10K_040 2_5%R231 10K_04 02_5%
R883 10K _0402_5%R883 1 0K_0402_5%

4

C232 0 .1U_0402_10V7 K~DC232 0.1U_040 2_10V7K~D

1 2

C233 0 .1U_0402_10V7 K~DC233 0.1U_040 2_10V7K~D

1 2

C234

C234
C235 0.1U_0 402_10V7K~DC 235 0.1U_0402_10 V7K~D

C236

C236
C237 0.1U_0402_10 V7K~DC 237 0.1U_04 02_10V7K~D

C238 0.1U_ 0402_10V7K~DC238 0.1U _0402_10V7K~ D
C239

C239

C240 0.1U_0402_10 V7K~DC 240 0.1U_04 02_10V7K~D
C241 0.1U_ 0402_10V7K~DC241 0.1U _0402_10V7K~ D

C242 0.1U_0402_ 10V7K~DC242 0.1U_040 2_10V7K~D
C243 0.1U_0402_ 10V7K~DC243 0.1U_040 2_10V7K~D

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

0.1U_040 2_10V7K~D

SPI_CS1#R< 20>

ESATA_U SB_OC#<30>

USB_OC1 #<30>
USB_OC2 #<30>

R232

R232

22.6_040 2_1%

22.6_040 2_1%

Within 500 mils

PCIE_IRX_W ANTX_N1
PCIE_IRX_W ANTX_P1
PCIE_ITX_W ANRX_N1
PCIE_ITX_W ANRX_P1

PCIE_IRX_W LANTX_N2
PCIE_IRX_W LANTX_P2
PCIE_ITX_W LANRX_N2
PCIE_ITX_W LANRX_P2

PCIE_IRX_W PANTX_N3
PCIE_IRX_W PANTX_P3
PCIE_ITX_W PANRX_N3
PCIE_ITX_W PANRX_P3

PCIE_IRX_CBP TX_N4
PCIE_IRX_CBP TX_P4
PCIE_ITX_CBP RX_N4
PCIE_ITX_CBP RX_P4

PCIE_IRX_EXP TX_N5
PCIE_IRX_EXP TX_P5
PCIE_ITX_EXP RX_N5
PCIE_ITX_EXP RX_P5

PCIE_IRX_GLA NTX_N6
PCIE_IRX_GLA NTX_P6
PCIE_ITX_GLA NRX_N6
PCIE_ITX_GLA NRX_P6

SPI_CS1#R

ESATA_U SB_OC#
USB_OC1 #
USB_OC2 #
USB_OC3 #
USB_OC4 #
USB_OC5 #
USB_OC6 #
USB_OC7 #
USB_OC8 #
USB_OC9 #
USB_OC1 0#
USB_OC1 1#

USBRBIAS

12

3

U6D

U6D

N29

PERN1

N28

PERP1

P27

PETN1

P26

PETP1

L29

PERN2

L28

PERP2

M27

PETN2

M26

PETP2

J29

PERN3

J28

PERP3

K27

PETN3

K26

PETP3

G29

PERN4

G28

PERP4

H27

PETN4

H26

PETP4

E29

PERN5

E28

PERP5

F27

PETN5

F26

PETP5

C29

PERN6/GLAN_RXN

C28

PERP6/GLAN_RXP

D27

PETN6/GLAN_TXN

D26

PETP6/GLAN_TXP

D23

SPI_CLK

D24

SPI_CS0#

F23

SPI_CS1#/GPIO58/CLGPIO6

D25

SPI_MOSI

E23

SPI_MISO

N4

OC0#/GPIO59

N5

OC1#/GPIO40

N6

OC2#/GPIO41

P6

OC3#/GPIO42

M1

OC4#/GPIO43

N2

OC5#/GPIO29

M4

OC6#/GPIO30

M3

OC7#/GPIO31

N3

OC8#/GPIO44

N1

OC9#/GPIO45

P5

OC10#/GPIO46

P3

OC11#/GPIO47

AG2

USBRBIAS

AG1

USBRBIAS#

ICH9M_FCB GA676~D

ICH9M_FCB GA676~D

USB

USB

DMI0RXN
DMI0RXP
DMI0TXN

DMI0TXP

DMI1RXN
DMI1RXP
DMI1TXN

DMI1TXP

DMI2RXN
DMI2RXP
DMI2TXN

DMI2TXP

DMI3RXN
DMI3RXP
DMI3TXN

DMI3TXP

DMI_CLKN
DMI_CLKP

PCI-Express

PCI-Express

Direct Media Interface

Direct Media Interface

DMI_ZCOMP

DMI_IRCOMP

SPI

SPI

USBP10N
USBP10P
USBP11N
USBP11P

USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P

V27
V26
U29
U28

Y27
Y26
W29
W28

AB27
AB26
AA29
AA28

AD27
AD26
AC29
AC28

T26
T25

AF29
AF28

AC5
AC4
AD3
AD2
AC1
AC2
AA5
AA4
AB2
AB3
AA1
AA2
W5
W4
Y3
Y2
W1
W2
V2
V3
U5
U4
U1
U2

DMI_MTX_IRX_ N0
DMI_MTX_IRX_ P0
DMI_MRX_ITX_ N0
DMI_MRX_ITX_ P0

DMI_MTX_IRX_ N1
DMI_MTX_IRX_ P1
DMI_MRX_ITX_ N1
DMI_MRX_ITX_ P1

DMI_MTX_IRX_ N2
DMI_MTX_IRX_ P2
DMI_MRX_ITX_ N2
DMI_MRX_ITX_ P2

DMI_MTX_IRX_ N3
DMI_MTX_IRX_ P3
DMI_MRX_ITX_ N3
DMI_MRX_ITX_ P3

CLK_DMI_ICH#
CLK_DMI_ICH

DMI_IRCOMP

USBP0­USBP0+
USBP1­USBP1+
USBP2­USBP2+

USBP4­USBP4+
USBP5­USBP5+
USBP6­USBP6+
USBP7­USBP7+

USBP9­USBP9+
USBP10­USBP10+
USBP11­USBP11+

2

DMI_MTX_IRX_ N0 <11>
DMI_MTX_IRX_ P0 <1 1>

DMI_MRX_ITX_ N0 <11>
DMI_MRX_ITX_ P0 <1 1>

DMI_MTX_IRX_ N1 <11>
DMI_MTX_IRX_ P1 <1 1>

DMI_MRX_ITX_ N1 <11>
DMI_MRX_ITX_ P1 <1 1>

DMI_MTX_IRX_ N2 <11>
DMI_MTX_IRX_ P2 <1 1>

DMI_MRX_ITX_ N2 <11>
DMI_MRX_ITX_ P2 <1 1>

DMI_MTX_IRX_ N3 <11>
DMI_MTX_IRX_ P3 <1 1>

DMI_MRX_ITX_ N3 <11>
DMI_MRX_ITX_ P3 <1 1>

CLK_DMI_ICH# <6>
CLK_DMI_ICH <6>

R221 24.9_040 2_1%R221 24.9_0 402_1%

1 2

USBP0- <30>
USBP0+ <30>

USBP1- <30>
USBP1+ <30>
USBP2- <30>
USBP2+ <30>

USBP4- <27>
USBP4+ <27>

USBP5- <27>
USBP5+ <27>

USBP6- <28>
USBP6+ <28>
USBP7- <28>
USBP7+ <28>

USBP9- <32>
USBP9+ <32>

USBP10- <30>
USBP10+ <30>

USBP11- <30>
USBP11+ <30>

Within 500 mils

+1.5VS

USB Port

0

1

2

3

4

5

6

7

8

9

10

11

1

Device

USB&ESATA
Reader board

USB board
NC

WLAN
WWAN
WPAN
Express

NC
Touch screen
Bluetooth

Camera

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: S heet o f

Date: S heet o f

3

2

Date: S heet o f

Compal Electronics, Inc.

ICH9-M(4/5)

ICH9-M(4/5)

ICH9-M(4/5)

LA-5152P

LA-5152P

LA-5152P

22 51Monday, June 15 , 2009

22 51Monday, June 15 , 2009

22 51Monday, June 15 , 2009

1

A00

A00

A00

http://mycomp.su/x/

5

RTCVCC

5VS+3VS

+

12

R

R

233

233

100_0402_5%

100_0402_5%

D D

R234

R234

100_0402_5%

100_0402_5%

C C

B B

A A

1UH_GLF2012T1R0M_20%_0805~D

1UH_GLF2012T1R0M_20%_0805~D

D

D

2

2

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

1 2

ICH_V5REF_RUN

+

20 mils

1

C

C

246

246

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+3VALW+5VALW

12

D3

D3
SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

1 2

+ICH_V5REF_SUS

20 mils

1

C252

C252
1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

2

+1.5VS +1.5VS_PCIE_ICH

+1.5VS

10UH_LB2012T100MR_20%_0805~D

10UH_LB2012T100MR_20%_0805~D

1 2

L7

L7

0805

1 2

BLM21PG331SN1D_2P~D

BLM21PG331SN1D_2P~D

L8

L8

1 2

L9

L9

5

+

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C244

C244

2

220U_D2_4VY_R15M~D

220U_D2_4VY_R15M~D

1

1

C256

C256

+

+

2

2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

1

C268

C268

2

2

C279 0.1U_0402_10V7K~DC279 0.1U_0402_10V 7K~D

1 2

+3VS

+VCCGLANPLL

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D

10U_0805_10V4Z~D

10U_0805_10V4Z~D

C282

C282

1

1

2

C283

C283

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C248

C248

2

40 mils

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

22U_0805_6.3V6M~D

1

C257

C257

2

+VCCSATAPLL

1U_0603_10V6K~D

1U_0603_10V6K~D

+1.5VS

C266

C266

1U_0603_10V6K~D

1U_0603_10V6K~D

+1.5VS

1U_0603_10V6K~D

1U_0603_10V6K~D

+1.5VS

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+1.5VS

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C280

C280

2

C258

C258

1

2

C274

C274

C276

C276

+1.5VS_PCIE_ICH

0 mils

2

+

ICH_V5REF_RUN

+

ICH_V5REF_SUS

2.2U_0603_6.3V6K~D

2.2U_0603_6.3V6K~D
C260

C260

1

C267

C267

2

1

C270

C270

2

1

2

1

2

+VCCLAN1_05_INT_ICH

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

1

C281

C281

2

646mA

1342mA

11mA

11mA

47mA

+3VS+1.5VS

2mA

2mA

23mA

80mA

4

6F

6F

U

U

A23

V

CCRTC

A6

V

5REF

AE1

V

5REF_SUS

AA24

V

CC1_5_B[1]

AA25

V

CC1_5_B[2]

AB24

V

CC1_5_B[3]

AB25

V

CC1_5_B[4]

AC24

CC1_5_B[5]

V

AC25

CC1_5_B[6]

V

AD24

V

CC1_5_B[7]

AD25

CC1_5_B[8]

V

AE25

V

CC1_5_B[9]

AE26

V

CC1_5_B[10]

AE27

VCC1_5_B[11]

AE28

VCC1_5_B[12]

AE29

VCC1_5_B[13]

F25

VCC1_5_B[14]

G25

VCC1_5_B[15]

H24

VCC1_5_B[16]

H25

VCC1_5_B[17]

J24

VCC1_5_B[18]

J25

VCC1_5_B[19]

K24

VCC1_5_B[20]

K25

VCC1_5_B[21]

L23

VCC1_5_B[22]

L24

VCC1_5_B[23]

L25

VCC1_5_B[24]

M24

VCC1_5_B[25]

M25

VCC1_5_B[26]

N23

VCC1_5_B[27]

N24

VCC1_5_B[28]

N25

VCC1_5_B[29]

P24

VCC1_5_B[30]

P25

VCC1_5_B[31]

R24

VCC1_5_B[32]

R25

VCC1_5_B[33]

R26

VCC1_5_B[34]

R27

VCC1_5_B[35]

T24

VCC1_5_B[36]

T27

VCC1_5_B[37]

T28

VCC1_5_B[38]

T29

VCC1_5_B[39]

U24

VCC1_5_B[40]

U25

VCC1_5_B[41]

V24

VCC1_5_B[42]

V25

VCC1_5_B[43]

U23

VCC1_5_B[44]

W24

VCC1_5_B[45]

W25

VCC1_5_B[46]

K23

VCC1_5_B[47]

Y24

VCC1_5_B[48]

Y25

VCC1_5_B[49]

AJ19

VCCSATAPLL

AC16

VCC1_5_A[1]

AD15

VCC1_5_A[2]

AD16

VCC1_5_A[3]

AE15

VCC1_5_A[4]

AF15

VCC1_5_A[5]

AG15

VCC1_5_A[6]

AH15

VCC1_5_A[7]

AJ15

VCC1_5_A[8]

AC11

VCC1_5_A[9]

AD11

VCC1_5_A[10]

AE11

VCC1_5_A[11]

AF11

VCC1_5_A[12]

AG10

VCC1_5_A[13]

AG11

VCC1_5_A[14]

AH10

VCC1_5_A[15]

AJ10

VCC1_5_A[16]

AC9

VCC1_5_A[17]

AC18

VCC1_5_A[18]

AC19

VCC1_5_A[19]

AC21

VCC1_5_A[20]

G10

VCC1_5_A[21]

G9

VCC1_5_A[22]

AC12

VCC1_5_A[23]

AC13

VCC1_5_A[24]

AC14

VCC1_5_A[25]

AJ5

VCCUSBPLL

AA7

VCC1_5_A[26]

AB6

VCC1_5_A[27]

AB7

VCC1_5_A[28]

AC6

VCC1_5_A[29]

AC7

VCC1_5_A[30]

A10

VCCLAN1_05[1]

A11

VCCLAN1_05[2]

A12

VCCLAN3_3[1]

B12

VCCLAN3_3[2]

A27

VCCGLANPLL

D28

VCCGLAN1_5[1]

D29

VCCGLAN1_5[2]

E26

VCCGLAN1_5[3]

E27

VCCGLAN1_5[4]

A26

VCCGLAN3_3

1mA

ICH9M_FCBGA676~D

ICH9M_FCBGA676~D

4

CORE

CORE

VCCA3GP ATXARX

VCCA3GP ATXARX

VCCP_CORE

VCCP_CORE

PCI

PCI

VCCSUS1_05[1]
VCCSUS1_05[2]

VCCSUS1_5[1]

VCCSUS1_5[2]

VCCSUS3_3[1]
VCCSUS3_3[2]
VCCSUS3_3[3]
VCCSUS3_3[4]

VCCPSUSVCCPUSB

VCCPSUSVCCPUSB

VCCSUS3_3[5]

VCCSUS3_3[6]
VCCSUS3_3[7]
VCCSUS3_3[8]

VCCSUS3_3[9]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
VCCSUS3_3[20]

USB CORE

USB CORE

GLAN POWER

GLAN POWER

V

CC1_05[1]
CC1_05[2]

V
V

CC1_05[3]
CC1_05[4]

V
V

CC1_05[5]

V

CC1_05[6]

V

CC1_05[7]

V

CC1_05[8]

V

CC1_05[9]

V

CC1_05[10]
CC1_05[11]

V

CC1_05[12]

V
V

CC1_05[13]
CC1_05[14]

V
V

CC1_05[15]

V

CC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]

VCCDMIPLL

VCC_DMI[1]
VCC_DMI[2]

V_CPU_IO[1]
V_CPU_IO[2]

VCC3_3[1]

VCC3_3[2]

VCC3_3[7]

VCC3_3[3]
VCC3_3[4]
VCC3_3[5]
VCC3_3[6]

VCC3_3[8]

VCC3_3[9]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]

VCCHDA

VCCSUSHDA

VCCCL1_05

VCCCL1_5

VCCCL3_3[1]
VCCCL3_3[2]

A15

1634mA

B15
C15
D15
E15
F15
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18

+VCCDMIPLL

R29

23mA

+VCC_DMI_ICH

W23
Y23

AB23
AC23

2mA

AG29

AJ6

AC10

AD19
AF20
AG24
AC20

308mA

B9
F9
G3
G6
J2
J7
K7

AJ4

11mA

AJ3

11mA

AC8
F17

+VCCSUS1_5_ICH_1

AD8

+VCCSUS1_5_ICH_2

F18

+3VALW_ICH

A18
D16
D17
E22

212mA

+3VALW_USB_ICH

AF1

T1
T2
T3
T4
T5
T6
U6
U7
V6
V7
W6
W7
Y6
Y7
T7

+VCCCL1_05_ICH

G22

+VCCCL1_5_ICH

G23

19/73/73mA

A24
B24

3

1.05V_VCCP

+

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C249

C249

C245

C245

2

2

L

L

6

6

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

C247

C247

2

1

C251

C251

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

2

1 2

1UH_GLF2012T1R0M_20%_0805~D

1UH_GLF2012T1R0M_20%_0805~D

1

C

C

250

250

10U_0805_10V4Z~D

10U_0805_10V4Z~D

2

L5

L5

1 2

BLM18PG600SN1_0603~D

BLM18PG600SN1_0603~D

1.5VS

+

+1.05V_VCCP

48mA

+3VS

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C262

2

R881

R881

1 2

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C273

C273

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

@

@

C278

C278

2

C262

0_0402_5%

0_0402_5%

R975

R975

0_0603_5%

0_0603_5%

+3VS

1

C261

C261

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

+3VS

1

C263

C263

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

T75T75
T76T76

1 2

0_0603_5%

0_0603_5%

C275 0.1U_0402_10V7K~DC275 0.1U_0402_10V7K~D

+3VS

1

C265

C265

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

T77T77

1 2

C269

C269

0.1U_0402_10V7K~D

1

2

1 2

3

0.022U_0402_16V7K~D

0.022U_0402_16V7K~D

C271

C271

1U_0603_10V6K~D

1U_0603_10V6K~D

@

@

C277

C277

0.1U_0402_10V7K~D

+3VALW_S5_ICH

0.022U_0402_16V7K~D

0.022U_0402_16V7K~D

1

C272

C272

2

1

2

R974

R974

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C259

C259

2

+1.5V

+3VALW_S5_ICH

Reduce ICH power consumptionat S5 mode.

SYSON#<33>

+3VS

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

2

R879 0_0402_5%R879 0_0402_5%

1 2

1

C264

C264

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

B+_BIAS

300K_0402_5%

300K_0402_5%

R972

R972

1 2

13

D

D

Q46

Q46

2

G

SSM3K7002FU_SC70-3~D

G

SSM3K7002FU_SC70-3~D

S

S

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C253

C253

+3VALW

1U_0603_10V6K~D

1U_0603_10V6K~D

R03 Modify

C966

C966

2

+1.05V_VCCP

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C254

C254

2

2

@

@

1 2

R1022 0_0805_5%

R1022 0_0805_5%

D

D

6

1

2
1

G

2

G

2

C255

C255

+1.5VS

S

S

3

2M_0402_5%

2M_0402_5%

1 2

+3VALW_S5_ICH

Q47

Q47

20mil

45

SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

R973

R973

1

U

U

6E

6E

AA26

SS[1]

V

AA27

SS[2]

V

AA3

V

SS[3]

AA6

SS[4]

V

AB1

V

SS[5]

AA23

SS[6]

V

AB28

V

SS[7]

AB29

V

SS[8]

AB4

V

SS[9]

AB5

V

SS[10]

AC17

V

SS[11]

AC26

V

SS[12]

AC27

SS[13]

V

AC3

SS[14]

V

AD1

V

SS[15]

AD10

SS[16]

V

AD12

V

SS[17]

AD13

V

SS[18]

AD14

VSS[19]

AD17

VSS[20]

AD18

VSS[21]

AD21

VSS[22]

AD28

VSS[23]

AD29

VSS[24]

AD4

VSS[25]

AD5

VSS[26]

AD6

VSS[27]

AD7

VSS[28]

AD9

VSS[29]

AE12

VSS[30]

AE13

VSS[31]

AE14

VSS[32]

AE16

VSS[33]

AE17

VSS[34]

AE2

VSS[35]

AE20

VSS[36]

AE24

VSS[37]

AE3

VSS[38]

AE4

VSS[39]

AE6

VSS[40]

AE9

VSS[41]

AF13

VSS[42]

AF16

VSS[43]

AF18

VSS[44]

AF22

VSS[45]

AH26

VSS[46]

AF26

VSS[47]

AF27

VSS[48]

AF5

VSS[49]

AF7

VSS[50]

AF9

VSS[51]

AG13

VSS[52]

AG16

VSS[53]

AG18

VSS[54]

AG20

VSS[55]

AG23

VSS[56]

AG3

VSS[57]

AG6

VSS[58]

AG9

VSS[59]

AH12

VSS[60]

AH14

VSS[61]

AH17

VSS[62]

AH19

VSS[63]

AH2

VSS[64]

AH22

VSS[65]

AH25

VSS[66]

AH28

VSS[67]

AH5

VSS[68]

AH8

VSS[69]

AJ12

VSS[70]

AJ14

VSS[71]

AJ17

VSS[72]

AJ8

VSS[73]

B11

VSS[74]

B14

VSS[75]

B17

VSS[76]

B2

VSS[77]

B20

VSS[78]

B23

VSS[79]

B5

VSS[80]

B8

VSS[81]

C26

VSS[82]

C27

VSS[83]

E11

VSS[84]

E14

VSS[85]

E18

VSS[86]

E2

VSS[87]

E21

VSS[88]

E24

VSS[89]

E5

VSS[90]

E8

VSS[91]

F16

VSS[92]

F28

VSS[93]

F29

VSS[94]

G12

VSS[95]

G14

VSS[96]

G18

VSS[97]

G21

VSS[98]

G24

VSS[99]

G26

VSS[100]

G27

VSS[101]

G8

VSS[102]

H2

VSS[103]

H23

VSS[104]

H28

VSS[105]

H29

VSS[106]

ICH9M_FCBGA676~D

ICH9M_FCBGA676~D

VSS_NCTF[1]
VSS_NCTF[2]
VSS_NCTF[3]
VSS_NCTF[4]
VSS_NCTF[5]
VSS_NCTF[6]
VSS_NCTF[7]
VSS_NCTF[8]

VSS_NCTF[9]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]

SS[107]

V

SS[108]

V
V

SS[109]
SS[110]

V
V

SS[111]
SS[112]

V
V

SS[113]

V

SS[114]

V

SS[115]

V

SS[116]

V

SS[117]

V

SS[118]
SS[119]

V

SS[120]

V
V

SS[121]
SS[122]

V
V

SS[123]

V

SS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
VSS[185]
VSS[186]
VSS[187]
VSS[188]
VSS[189]
VSS[190]
VSS[191]
VSS[192]
VSS[193]
VSS[194]
VSS[195]
VSS[196]
VSS[197]
VSS[198]

H5
J23
J26
J27
AC22
K28
K29
L13
L15
L2
L26
L27
L5
L7
M12
M13
M14
M15
M16
M17
M23
M28
M29
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
P12
P13
P14
P15
P16
P17
P2
P23
P28
P29
P4
P7
R11
R12
R13
R14
R15
R16
R17
R18
R28
T12
T13
T14
T15
T16
T17
T23
B26
U12
U13
U14
U15
U16
U17
AD23
U26
U27
U3
V1
V13
V15
V23
V28
V29
V4
V5
W26
W27
W3
Y1
Y28
Y29
Y4
Y5
AG28
AH6
AF2
B25

A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

ICH9M (5/5)

ICH9M (5/5)

ICH9M (5/5)

LA-5152P

LA-5152P

LA-5152P

23 51Monday, June 15, 2009

23 51Monday, June 15, 2009

23 51Monday, June 15, 2009

1

A00

A00

A00

http://mycomp.su/x/

A

3

3

Q

3VALW

+

W

=60mils

1U_0603_10V6K~D

1U_0603_10V6K~D

236

236

R

N_WOL#<31>

PCI_RST#<20,27,28>

LAN_CKTAL1

LAN_CKTAL2

2

C319

C319
27P_0402_50V8J~D

27P_0402_50V8J~D

1

V_DAC
LAN_MDIN3
LAN_MDIP3

V_DAC
LAN_MDIN2
LAN_MDIP2

V_DAC
LAN_MDIN1
LAN_MDIP1

V_DAC
LAN_MDIN0
LAN_MDIP0

R

300K_0402_5%

300K_0402_5%

12

12

R242

R242

15K_0402_5%

15K_0402_5%

B

1 1

PCIE_IRX_GLANTX_P6<22>

PCIE_IRX_GLANTX_N6<22>

PCIE_ITX_C_GLANRX_P6<22>

PCIE_ITX_C_GLANRX_N6<22>

2 2

+3VS

LAN_LOPWEN<21>

R02 Modify

1

25MHZ_20P_1BX25000CK1A

25MHZ_20P_1BX25000CK1A

C318

C318

33P_0402_50V8J~D

33P_0402_50V8J~D

3 3

2

C320 0.01U_0402_16V7K~DC 320 0.01U_0402_16V7K~D

1 2

C321 0.01U_0402_16V7K~DC 321 0.01U_0402_16V7K~D

1 2

C322 0.01U_0402_16V7K~DC 322 0.01U_0402_16V7K~D

1 2

C324 0.01U_0402_16V7K~DC 324 0.01U_0402_16V7K~D

1 2

+_BIAS

E

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

C304 0.1U_0402_10V7K~DC304 0.1U_0402_10V7K~D

C305 0.1U_0402_10V7K~DC305 0.1U_0402_10V7K~D

CLK_PCIE_GLAN<6>
CLK_PCIE_GLAN#<6>

GLAN_CLKREQ#<6>

ICH_PCIE_WAKE#<21,27,28,31>

R240 1K_0402_5%R240 1K_0402_5%

1 2

R241 0_0402_5%

R241 0_0402_5%

1 2

@

@

Y3

Y3

1 2

C

C

12

13

2

G

G

1 2

TS1

TS1

1
2
3

4
5

7
8
9

10
11
12

BOTH_GST5009-LF

BOTH_GST5009-LF

1

284

284

2

D

D

Q

Q

4

4

S

S

1 2

TCT1
TD1+
TD1-

TCT2
TD2+
TD2-6MX2-

TCT3
TD3+
TD3-

TCT4
TD4+
TD4-

Q

SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

D

D

6

2
1

G

G

E

N_WOL

2M_0402_5%

2M_0402_5%

12

R1540

R1540

PCIE_IRX_C_GLANTX_P6

PCIE_IRX_C_GLANTX_N6

PCIE_ITX_C_GLANRX_P6

PCIE_ITX_C_GLANRX_N6

R239

R239

2.49K_0402_1%

2.49K_0402_1%

ISOLATEB

LAN_CKTAL1
LAN_CKTAL2

LAN_CABDT<21>

24

MCT1
MX1+

MX1-

MCT2
MX2+

MCT3
MX3+

MX3-

MCT4
MX4+

MX4-

RJ45_TX3-

23

RJ45_TX3+

22

21

RJ45_TX2-

20

RJ45_TX2+

19

18

RJ45_RX1-

17

RJ45_RX1+

16

15

RJ45_TX0-

14

RJ45_TX0+

13

B

FBMA-L11-322513-201LMA40T_1210

FBMA-L11-322513-201LMA40T_1210

S

S

3

1

2

1 2

45

2200P_0402_50V7K~D

2200P_0402_50V7K~D

C958

C958

U9

U9

20

HSOP

21

HSON

15

HSIP

16

HSIN

17

REFCLK_P

18

REFCLK_N

25

CLKREQB

27

PERSTB

46

RSET

26

LANWAKEB

28

ISOLATEB

41

CKTAL1

42

CKTAL2

23

GPO

24

NC

7

GND

14

GND

31

GND

47

GND

22

EGND

RTL8111DL-GR_LQFP48_7X7

RTL8111DL-GR_LQFP48_7X7

L

L

10

10

RP1

RP1

75_1206_8P4R_5%

75_1206_8P4R_5%

W

=60mils

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

C285

C285

1

2

@

@

RTL8111DL

RTL8111DL

45
36
27
18

2

C323

C323
1000P_1206_2KV7~D

1000P_1206_2KV7~D

1

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

1

2

LAN_IO

+

C286

C286

1

2

LED3/EEDO

LED2/EEDI/AUX

LED1/EESK

EECS

MDIP0
MDIN0
MDIP1
MDIN1
MDIP2
MDIN2
MDIP3
MDIN3

SROUT12

EVDD12
DVDD12
DVDD12
DVDD12
AVDD12

AVDD12

VDDSR
VDDSR

VDD33
VDD33

AVDD33
AVDD33

ENSR

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

LED0

FB12

C287

C287

3.6K_0402_5%

3.6K_0402_5%

LAN_LED3

33

LAN_LED2

34

LAN_LED1

35
32

LAN_LED0

38

LAN_MDIP0

2

LAN_MDIN0

3

LAN_MDIP1

5

LAN_MDIN1

6

LAN_MDIP2

8

LAN_MDIN2

9

LAN_MDIP3

11

LAN_MDIN3

12

4

48

19
30
36
13
10

39

44
45

29
37

1
40
43

+LAN_IO

12

R947

R947

+LAN_DVDD12

W=60mils

W=40mils

+LAN_IO

LAN_LED2

LAN_LED3

C

=60mils

W

11

11

L

L

4.7UH_1008HC-472EJFS-A_5%_1008

4.7UH_1008HC-472EJFS-A_5%_1008

1 2

These components close to U9: Pin 48

( Should be place within 200 mils )

W=30mils W=30mils

1 2

C310 1U_0 603_16V6K~DC310 1U_0603_16V6K~D

1 2

C311 1U_0 603_16V6K~DC311 1U_0603_16V6K~D

These caps close to U9: Pin 19

+LAN_DVDD12

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C296

C296

C295

C295

2

2

These caps close to U9: Pin 10, 13, 30, 36, 39

These caps close to U9: Pin 44.45

( Should be place within 200 mils )

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

1

2

These caps close to U9: Pin 1.29, 37, 40

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C288

C288

2

D4

D4

1 2

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

D5

D5

1 2

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

1

2

R884

@R884

@

0_0603_5%

0_0603_5%

1

2

C308

C308

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C306

C306

12

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C294

C294

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

1

C289

C289

2

LAN_LED1

LAN_LED3

22U_1206_6.3V6M~D

22U_1206_6.3V6M~D

1

2

+LAN_DVDD12

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C293

C293

R942

R942

C309

C309

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C290

C290

1 2

1 2

D

+

LAN_VDD

C307

C307

+LAN_VDD

@

@

R235

R235

12

0_0603_5%

0_0603_5%

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C292

C292

2

12

0_0805_5%@

0_0805_5%@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C291

C291

2

D6

D6

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

D7

D7

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

+LAN_IO

+LAN_IO

LED1_LED3LED2_LED3

+LAN_VDD

These caps close to U9: Pin 4

+LAN_DVDD12

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

C303

C303

C302

C302

2

1

R246

LAN_LED0 LA N_ACTIVITY#

LED1_LED3 LINK_100_1000#

+LAN_IO

LED2_LED3 LINK_10 _1000#

R246

1 2

220_0402_5%

220_0402_5%

R244

R244

1 2

220_0402_5%

220_0402_5%

R245

R245

1 2

220_0402_5%

220_0402_5%

+LAN_IO

RJ45_TX3-

RJ45_TX3+

RJ45_RX1-

RJ45_TX2-

RJ45_TX2+

RJ45_RX1+

RJ45_TX0-

RJ45_TX0+

12/11 reserve for EMI as Dell Tony request.

LAN_MDIN3

LAN_MDIP3

LAN_MDIN1

LAN_MDIN2

LAN_MDIP2

LAN_MDIP1

LAN_MDIN0

LAN_MDIP0

C873 6.8P_0402_50V8C~DC873 6.8P_0402_50V8C~D

1 2

C874 6.8P_0402_50V8C~DC874 6.8P_0402_50V8C~D

1 2

C875 6.8P_0402_50V8C~DC875 6.8P_0402_50V8C~D

1 2

C876 6.8P_0402_50V8C~DC876 6.8P_0402_50V8C~D

1 2

C877 6.8P_0402_50V8C~DC877 6.8P_0402_50V8C~D

1 2

C878 6.8P_0402_50V8C~DC878 6.8P_0402_50V8C~D

1 2

C879 6.8P_0402_50V8C~DC879 6.8P_0402_50V8C~D

1 2

C880 6.8P_0402_50V8C~DC880 6.8P_0402_50V8C~D

1 2

E

LINK OK

JRJ45

JRJ45

13

Yellow LED-

12

Yellow LED+

8

PR4-

7

PR4+

6

PR2-

5

PR3-

4

PR3+

3

PR2+

2

PR1-

1

PR1+

11

Orange LED-

10

Yellow LED+

9

Green LED-

FOX_JM3611A-R4953B-7F

FOX_JM3611A-R4953B-7F

CONN@

CONN@

GND

GND

14

15

4 4

A

LEDS1-0

LED0

LED1

LED2

LED3

0 0 0 1 1 0 1 1

Tx / Rx

LINK100

LINK10

LINK1000

Tx / Rx

LINK10 /100 / 1000

LINK10 / 100

LINK1000

B

Tx

LINK

Rx

FULL

LINK10 / ACT

LINK100 / ACT

FULL

LINK1000 / ACT

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

Gigabit LAN_RTL8111DL

Gigabit LAN_RTL8111DL

Gigabit LAN_RTL8111DL

LA-5152P

LA-5152P

LA-5152P

24 45Monday, June 15, 2009

24 45Monday, June 15, 2009

24 45Monday, June 15, 2009

E

1A

1A

1A

http://mycomp.su/x/

A

3VS

+

R

R

1549 20K_0402_5%

1549 20K_0402_5%

+

3VS

C_SPK_HP_MUTE#<31>

E

1 1

EC_SUB_MUTE#<31>

EA_EC_SPK_MUTE#

HP_JD

2 2

EA_EC_SUB_MUTE#

HP_JD

3 3

SENSE_B

1000P_0402_50V7K~D

1000P_0402_50V7K~D

2

1

MIC_JD

2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

SENSE_A

4 4

1

2

HP1_JD

1 2

E

APD#

E

C_SPK_HP_MUTE#

1 2

+

3VS

R

R

1550 10K_0402_5%

1550 10K_0402_5%

APD#

E

EC_SUB_MUTE# HP1_CD_L2

1 2

+3VS

R1551 10K_0402_5%R 1551 10K_0402_5%

+3VS

C949

C949

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

5

U42

U42

1

P

IN1

O

2

IN2

G

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

3

+3VS

C950

C950

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

5

U48

U48

1

P

IN1

O

2

IN2

G

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

3

+3VS

R1552

R1552

10K_0402_5%

10K_0402_5%

HP_JD

2

G

G

39.2K_0402_1%

100K_0402_5%

100K_0402_5%

+3VS

A

39.2K_0402_1%

12

R

R
978

978

61

Q42A

Q42A

2

100K_0402_5%

100K_0402_5%

12

R

R
971

971

2

G

G

C

C
866

866

+3VS

12

1000P_0402_50V7K~D

1000P_0402_50V7K~D

C

C
865

865

1

2

1

2

SPK_AMP_MUTE#

4

SUB_AMP_MUTE#

4

EA_EC_SPK_MUTE#

HP_JD#

12

13

D

D

Q48

Q48
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

R545

R545

1 2

5.1K_0402_1%

5.1K_0402_1%
20K_0402_1%

20K_0402_1%

12

R546

R546

R

R
547

547

3

Q42B

Q42B

5

2N7002DW-7-F_SOT363-6~D

2N7002DW-7-F_SOT363-6~D

4

R543

R543

1 2

5.1K_0402_1%

5.1K_0402_1%

39.2K_0402_1%

39.2K_0402_1%

12

R544

R544

13

D

D

Q43

Q43
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

I

N1

I

N2

+

3VS

IN1

IN2

+AVDD_AUDIO

B

968

968

C

C

1 2

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

5

U

U

46

46

P

E

A_EC_SPK_MUTE#

4

O

G

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

3

C

C

969

969

1 2

5

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

P

EA_EC_SUB_MUTE#

4

O

G

U47

U47

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

3

SPK_AMP_MUTE# <26>

SUB_AMP_MUTE# <26>

+3VS

C948

C948

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

5

U41

U41

1

P

IN1

O

2

IN2

G

74AHC1G08GW_SOT353-5~D

74AHC1G08GW_SOT353-5~D

3

+3VS

100K_0402_5%

100K_0402_5%

12

R979

R979

HP2_JD

+AVDD_AUDIO

B

+

3VS

R02 Modify

H

P1_JD

1

I

NB

P2_JD

H

2

INA

HDA_BITCLK_AUDIO<19>

HDA_SDIN0<19>

HDA_SDOUT_AUDIO<19>

HDA_SYNC_AUDIO<19>

HDA_RST_AUDIO#<19>

DMIC_CLK<30>

DMIC0<30>

HP_AMP_MUTE#

4

100P_0402_50V8J~D

100P_0402_50V8J~D

1

2

Reserved for TEST

R268 0_0805_5%R268 0_0805_5%

1 2

R269

R269

1 2

R270

R270

1 2

GND AGND

R02 Modify

2.2U_0805_10V7K~D

2.2U_0805_10V7K~D

HP2_CD_R

C354

C354

HP2_CD_L

1 2

C355

C355

1 2

2.2U_0805_10V7K~D

2.2U_0805_10V7K~D

EC Beep

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

SB_SPKR<21>

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

ICH Beep

C

@

@

+

1.5VS

R

R

250

250

0_0603_5%

0_0603_5%

C

C

952

952

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

5

U

U

108

108

P

H

P_JD

4

Y

G

TC7SZ02FU_SSOP5

TC7SZ02FU_SSOP5

3

R249

R249

1 2

33_0402_5%

33_0402_5%

100P_0402_50V8J~D

100P_0402_50V8J~D

1

@

@

@

@

C341

C341

C342

C342

2

EAPD#

Int. 60k pull down.

0_0805_5%@

0_0805_5%@
0_0805_5%@

0_0805_5%@

HP2_CD_R1

HP2_CD_L1

C945

C945

BEEP_C#

1 2

SB_SPKR_C

1 2

C946

C946

C

DVDD_AUDIO

+

12

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C326

C326

2

HDA_SDIN0_R

10

11

30

SENSE_A

13

SENSE_B

34
32

PC_BEEP

2K_0402_1%

2K_0402_1%

2K_0402_1%

2K_0402_1%

12

47

18
19
20

26
42

R1548

R1548

1 2

1 2

R1547

R1547

C358 1U_0603_10V6K~DC358 1 U_0603_10V6K~D

R264

R264

499K_0402_1%

499K_0402_1%

1 2

1 2

R266

R266

499K_0402_1%

499K_0402_1%

D

3VS

+

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1

C330

C330

2

75mA

U11

U11

6

BITCLK

8

SDI_CODEC

5

SDO

SYNC

RESET#

2

VOL_UP/DMIC_CLK/GPIO1

4

VOL_DN/DMIC_0/GPIO2

DMIC1/GPIO5

SENSE_A
SENSE_B
SENSE_C

PCBEEP

EAPD/SPDIF IN/GPIO0

PORTI_L
PORTI_C
PORTI_R

7

DVSS
AVSS1
AVSS2

92HD73C1X5PRGXC1X8_QFP48_7X7

92HD73C1X5PRGXC1X8_QFP48_7X7

C1529 270P_0402_50V7K~DC1529 270P_0402_50V7K~D

1 2

HP2_CD_R2

HP2_CD_L2

C1530 270P_0402_50V7K~DC1530 270P_0402_50V7K~D

1 2

1 2

PC_BEEP

R267

R267
10K_0402_5%

10K_0402_5%

@

@

1 2

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C331

C331

2

3

9

DVDD_IO

DVDD_CORE1DVDD_CORE

PC_BEEP <26>BEEP#<31>

D

C332

C332

1

2

132mA

38

AVDD125AVDD2

PORTA_R

VREFOUT-A

PORTB_R

VREFOUT-B

PORTC_L
PORTC_R

VREFOUT-C

PORTD_L
PORTD_R

PORTE_R

VREFOUT-E

PORTF_R

PORTG_L

PORTG_R

PORTH_L
PORTH_R

SPDIF OUT0

SPDIF OUT1/GPIO3

VREFFILT

U12

U12

14

SHDNR#

18

SHDNL#

15

INR

13

INL

1

C1P

3

C1N

1U_0603_10V6K~D

1U_0603_10V6K~D

E

AVDD_AUDIO

+

AVDD_AUDIO

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C333

C333

C327

C327

2

2

HP1_CD_L

39

PORTA_L

PORTB_L

PORTE_L

PORTF_L

CAP2

19

PVDD

PVss

5

1

C360

C360

2

HP1_CD_R

41
37

21
22
28

23
24
29

SPK_CD_L

35

SPK_CD_R

36

MIC_CD_L

14

MIC_CD_R

15
31

HP2_CD_L

16

HP2_CD_R

17

43
44

45
46

48

ACIN_R

40

27
33

+3VS

2

C351

C351
1U_0603_10V6K~D

1U_0603_10V6K~D

1

10

OUTR

SVDD

OUTL

NC-12

NC-16

NC-20

PGND

SVss

SGND

MAX4411ETP+T_TQFN20_4X4

MAX4411ETP+T_TQFN20_4X4

2

7

17

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

+

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

C334

C334

2

SPK_CD_L <26>
SPK_CD_R <26>

+MIC1_VREFO

1

C335

C335

2

1

2

Int. Speaker and
Sub woofer

R02 Modify

@

@

R1006

R1006

1 2

0_0402_5%

0_0402_5%

<21,31,38,39>

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

10U_0603_6.3V6M~D

10U_0603_6.3V6M~D

1

1

C348

C348

C347

C347

2

2

HP2_AMP_R

11

HP2_AMP_LHP_AMP_MUTE#

9

21

PAD

4

NC-4

6

NC-6

8

NC-8

12

16

20

E

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

ACIN

5VS

+

@

@

R

R

248

248

12

0_0603_5%

0_0603_5%

C328

C328

P1_CD_R

H

Front

HP1_AMP_L HP1_AMP_L1_JKHP1_AMP_L1

HP1_AMP_R

D31

D31

1

PACDN042Y3R_SOT23-3~D@

PACDN042Y3R_SOT23-3~D@

+MIC1_VREFO

+MIC1_VREFO W=10 mil

Rear or MIC

2.2U_0603_10V6K~D

2.2U_0603_10V6K~D

1 2

MIC_CD_R

1 2

2.2U_0603_10V6K~D

2.2U_0603_10V6K~D

D32

D32

1

PACDN042Y3R_SOT23-3~D@

PACDN042Y3R_SOT23-3~D@

Center

HP2_AMP_L HP2_AMP_L1_JKHP2_AMP_L1

HP2_AMP_R

1

1 2

1 2

D33

D33

68_0603_1%

68_0603_1%

68_0603_1%

68_0603_1%

PACDN042Y3R_SOT23-3~D@

PACDN042Y3R_SOT23-3~D@

F

02 Modify

R

R

P1_CD_R1

2K_0402_1%

2K_0402_1%

2K_0402_1%

2K_0402_1%

R

1 2

1 2

R1546

R1546

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

1 2

1 2

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

2.2U_0805_10V7K~D

2.2U_0805_10V7K~D

C

C

336

336

1 2

1 2

C337

C337

2.2U_0805_10V7K~D

2.2U_0805_10V7K~D

R251

R251
68_0603_1%

68_0603_1%

1 2

1 2

R252

R252
68_0603_1%

68_0603_1%

H

HP1_CD_L1HP1_CD_L

HP1_AMP_R1 HP1_AMP_R1_JK

Place close to Jack

HP1_AMP_L1_JK

3

HP1_AMP_R1_JK

2

12

12

R257

R257

R256

R256

4.7K_0402_5%

C349

C349

C350

C350

4.7K_0402_5%

4.7K_0402_5%

MIC_CD_L1

MIC_CD_R1

4.7K_0402_5%

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

Place close to Jack

MIC_CD_L1_JK

3

MIC_CD_R1_JK

2

R261

R261

HP2_AMP_R1 HP2_AMP _R1_JK

R262

R262

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

1 2

1 2

BLM18BD601SN1D_0603~D

BLM18BD601SN1D_0603~D

Place close to Jack

HP2_AMP_L1_JK

3

HP2_AMP_R1_JK

2

F

H

P_AMP_MUTE#

C

C

1527 270P_0402_50V7K~D

1527 270P_0402_50V7K~D

1545

1545

1 2

1 2

L18

L18

1 2

P1_CD_R2

H

C1528 270P_0402_50V7K~DC1528 270P_0402_50V7K~D

1 2

C338 1U_0603_10V6K~DC338 1 U_0603_10V6K~D

1 2

L14

L14

L15

L15

1 2

C345 1000P_0402_50V 7K~DC345 1000P_0402_50V7K~D

L16

L16

L17

L17

L19

L19

HP1_JD

MIC_CD_L1_JKMIC_CD_L

MIC_CD_R1_JK

HP2_JD

DELL CONFIDENTIAL/PROPRIETARY

G

U

U

10

10

14

S

HDNR#

18

HDNL#

S

15

INR

13

INL

1

C1P

3

C1N

C339

C339

12

1U_0603_10V6K~D

1U_0603_10V6K~D

1000P_0402_50V7K~D

1000P_0402_50V7K~D

C343

C343

MIC_JD

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

2

100P_0402_50V8J~D

100P_0402_50V8J~D

1

C352

C352

2

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1

2

LA-5152P

LA-5152P

LA-5152P

G

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1

2

1

2

1

C356

C356

2

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

+

3VS

2

C

C
1U_0603_10V6K~D

1U_0603_10V6K~D

1

10

19

SVDD

PVDD

PGND

PVss

SVss

SGND

2

5

7

17

JHP1

JHP1

1
2
6
3

4

5

C344

C344

FOX_JA6333L-B5S4-7F

FOX_JA6333L-B5S4-7F

CONN@

CONN@

JMIC1

JMIC1

1
2
6
3

4

5

100P_0402_50V8J~D

100P_0402_50V8J~D

C353

C353

1000P_0402_50V7K~D

1000P_0402_50V7K~D

C357

C357

FOX_JA6333L-B5S4-7F

FOX_JA6333L-B5S4-7F

CONN@

CONN@

JHP2

JHP2

1
2
6
3

4

5

FOX_JA6333L-B5S4-7F

FOX_JA6333L-B5S4-7F

CONN@

CONN@

Codec IDT 92HD73C

Codec IDT 92HD73C

Codec IDT 92HD73C

H

325

325

H

P1_AMP_R

11

O

UTR

UTL

O

AD

P

N

C-4

NC-6

NC-8

NC-12

NC-16

NC-20

MAX4411ETP+T_TQFN20_4X4

MAX4411ETP+T_TQFN20_4X4

H

P1_AMP_L

9

21

4

6

8

12

16

20

7

SHLD1

SHLD1

8

SHLD2

SHLD2

9

NPTH1

NPTH1

10

NPTH2

NPTH2

SHLD1

SHLD1
SHLD2

SHLD2
NPTH1

NPTH1
NPTH2

NPTH2

SHLD1

SHLD1
SHLD2

SHLD2
NPTH1

NPTH1
NPTH2

NPTH2

25 51Monday, June 15, 2009

25 51Monday, June 15, 2009

25 51Monday, June 15, 2009

H

7
8
9
10

7
8
9
10

A00

A00

A00

http://mycomp.su/x/

5

igh-Pass Filiter,fc=500Hz, Av=1.45V/V

H

D D

9V

1

+

B

A/40mil

1

2

C

C

901

901

22U_1210_25V6K~D

22U_1210_25V6K~D

1

2

C

C

902

902

22U_1210_25V6K~D

22U_1210_25V6K~D

1

A00 Modify

R903

SPK_CD_L1

SPK_CD_L<25>

PC_BEEP<25>

SPK_CD_R<25>

PC_BEEP<25>

C C

SPK_AMP_MUTE#<25>

R10 Modify

B B

SUB_FB_L SUB_FB _L1

R02 memo modify

SPK_CD_R<25>

SPK_CD_L<25>

SPK_CD_L

1 2

C911

C911

1U_0603_10V6K~D

1U_0603_10V6K~D

PC_BEEP

C908 0.1U_0402_10V7K~DC908 0.1U_0402_10V7K~D

SPK_CD_R SPK_CD_R4

C915

C915

PC_BEEP PC_BEEP_2

C912 0.1U_0402_10V7K~DC912 0.1U_0402_10V7K~D

C979

C979

1 2

1U_0603_10V6K~D

1U_0603_10V6K~D

1 2

C973 0.47U_0603_10V7K~DC973 0.47U_0603_10V7K~D

1 2

C970 0.47U_0603_10V7K~DC970 0.47U_0603_10V7K~D

PC_BEEP_1

1 2

1 2

1U_0603_10V6K~D

1U_0603_10V6K~D

1 2

D1507

D1507

1 2

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

R1558

R1558

1 2

330K_0402_5%

330K_0402_5%

B+

2

1

1 2

10K_0402_1%

10K_0402_1%

SUB_CD_R

SUB_CD_L

R903

1 2

16.5K_0402_1%

16.5K_0402_1%

R901

R901

1 2

182K_0402_1%

182K_0402_1%

R908

R908

1 2

16.5K_0402_1%

16.5K_0402_1%

R906

R906

1 2

182K_0402_1%

182K_0402_1%

1

2

1A/40mil

C977

C977
22U_1210_25V6K~D

22U_1210_25V6K~D

R993

R993

R943

R943

1 2

9.09K_0402_1%

9.09K_0402_1%
R986

R986

1 2

9.09K_0402_1%

9.09K_0402_1%

R904 17.8K_0402_1%R904 17.8K_0402_1%

SPK_AMP_MUTE_R#

C1547

C1547

2.2U_0603_10V6K~D

2.2U_0603_10V6K~D

2

C918

C918
22U_1210_25V6K~D

22U_1210_25V6K~D

1

SUB_FB_L2

C988

C988

1 2

0.047U_0402_16V7K~D

0.047U_0402_16V7K~D

2

1

R02 memo modify

Band-Pass Filiter,fc=100 Hz, 500Hz, Av=1.45V/V

A A

5

4

2

C

C

903

903

22U_1210_25V6K~D

22U_1210_25V6K~D

1

R

S

PK_CD_L2

C909

C909

2200P_0402_25V7K~D

2200P_0402_25V7K~D

1 2

1 2

SPK_CD_R2

C913

C913

2200P_0402_25V7K~D

2200P_0402_25V7K~D

1 2

1 2

R909 17.8K_0402_1%R909 17.8K_0402_1%

SUB_FB_L3

1 2

C981

C981
.1U_0402_16V7K~D

.1U_0402_16V7K~D

R

1 2

11K_0402_1%

11K_0402_1%

SPK_CD_L3

0.022U_0402_25V7K~D

0.022U_0402_25V7K~D

R905

R905

1 2

11K_0402_1%

11K_0402_1%

SPK_CD_R3SPK_CD_R1

0.022U_0402_25V7K~D

0.022U_0402_25V7K~D

+3VS

For filterless modualation/spread-spectrum mode

2

C916

C916
22U_1210_25V6K~D

22U_1210_25V6K~D

1

C989

C989

1 2

0.047U_0402_16V7K~D

0.047U_0402_16V7K~D
R998

R998
20K_0402_1%

20K_0402_1%

R989 6.49K_0402_1%R989 6.49K_0402_1%

R987

R987

1 2

15.8K_0402_1%

15.8K_0402_1%

SUB_AMP_MUTE#<25>

+3VS

4

1

C

C

904

904

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

2

900

900

S

PKER_CD_L2_FBL

C910

C910

1 2

SPK_CD_R2_FBL

C914

C914

1 2

R910 0_0402_5%R910 0_0402_5%

1 2

Mono Select. Set MONO high for mono mode.

Internal Regulator Output.

1U_0603_25V6-K~D

1U_0603_25V6-K~D

1U_0603_25V6-K~D

1U_0603_25V6-K~D

1

1

C925

C925

C923

C923

2

2

1

C967

C967

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

2

R999

R999

1 2

11.5K_0402_1%

11.5K_0402_1%

1 2

SUB_CD_R2SUB_CD_R1SPK_CD_R

For filterless modualation/spread-spectrum mode

R988 0_0402_5%R988 0_0402_5%

Internal Regulator Output.

1U_0603_25V6-K~D

1U_0603_25V6-K~D

1U_0603_25V6-K~D

1U_0603_25V6-K~D

1

1

C965

C965

C975

C975

2

2

1

C

C

905

905

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

2

R902

R902

1 2

182K_0402_1%

182K_0402_1%

SPK_CD_L4SPK_CD_L

R907

R907

1 2

182K_0402_1%

182K_0402_1%

SPK_AMP_MUTE#

SPK_AMP_MUTE_R#

Internal 2V Bias.

1U_0603_25V6-K~D

1U_0603_25V6-K~D

1

C924

C926

C926

1

C980

C980

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

2

SUB_FB_L4

R1000

R1000

SUB_IN_L

SUB_FB_L

1 2

SUB_IN_R

SUB_AMP_MUTE#

1

C983

C983

2

C924

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

2

C971

C971

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

1

2

1 2

100K_0402_1%

100K_0402_1%

C976 0.01U_0402_16V7K~DC976 0.01U_0402_16V7K~D

1 2

Internal 2V Bias.

1U_0603_25V6-K~D

1U_0603_25V6-K~D

1

2

3

13

13

U

U

27

P

VDD1

30

VDD2

P

28

P

GND2

29

P

GND1

5

FB_L

6

IN_L

19

FB_R

18

IN_R

10

SHDN#

11

REGEN

9

MUTE#

20

MODE

4

MONO

16

VS

15

REG

12

COM

21

C1N

22

C1P

13

AGND

14

AGND

MAX9736AETJ+T_TQFN32_7X7

MAX9736AETJ+T_TQFN32_7X7

U14

U14

27

PVDD1

30

PVDD2

28

PGND2

29

PGND1

5

FB_L

6

IN_L

19

FB_R

18

IN_R

10

SHDN#

11

REGEN

9

MUTE#

20

MODE

4

MONO

16

VS

15

REG

12

COM

21

C1N

22

C1P

13

AGND

14

AGND

MAX9736AETJ+T_TQFN32_7X7

MAX9736AETJ+T_TQFN32_7X7

3

O

UTL-1
UTL-2

O

UTL+1

O
O

UTL+2

OUTR+1
OUTR+2

OUTR-1
OUTR-2

BOOT

NC1
NC2
NC3

EP

OUTL-1
OUTL-2

OUTL+1
OUTL+2

OUTR+1
OUTR+2

OUTR-1
OUTR-2

BOOT

67

67

L

L

1 2

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

L

L

68

68

1 2

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

L69

L69

1 2

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

L70

L70

1 2

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

C922

C922

12

L65

AMP_SW-

AMP_SW+ AMP_SW_JK+

AMP_SW+

AMP_SW-

1U_0805_50V4Z~D

1U_0805_50V4Z~D

L65

1 2

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

L66

L66

1 2

BLM18PG181SN1_0603~D

BLM18PG181SN1_0603~D

C953

C953

12

NC1
NC2
NC3

1
2

31
32

7
8
17

25
26

23
24

3

33

EP

A

MP_SPKL-

A

MP_SPKL+

AMP_SPKR+

AMP_SPKR-

1U_0805_50V4Z~D

1U_0805_50V4Z~D

1
2

31
32

7
8
17

25
26

23
24

3

33

2

A

MP_SPK_JK_L-

1

C

C

906

906

330P_0402_50V7K~D

330P_0402_50V7K~D

2

A

MP_SPKL+_L

1

C

C

907

907

330P_0402_50V7K~D

330P_0402_50V7K~D

2

AMP_SPKR+_L

1

C917

C917
330P_0402_50V7K~D

330P_0402_50V7K~D

2

AMP_SPK_JK_R-

1

C921

C921
330P_0402_50V7K~D

330P_0402_50V7K~D

2

S

peaker amp impedance of JBL is 4 ohm.

L

L

1508

1508

A

1 2

22UH_LQH55PN220MR0L_0.85A_20%~D

22UH_LQH55PN220MR0L_0.85A_20%~D

L1509

L1509

1 2

22UH_LQH55PN220MR0L_0.85A_20%~D

22UH_LQH55PN220MR0L_0.85A_20%~D

MP_SPK_JK_L+

AMP_SPK_JK_R+

AMP_SPK_JK_L­AMP_SPK_JK_L+
AMP_SPK_JK_R­AMP_SPK_JK_R+

15 mils trace

PESD24VS2UT_SOT23-3~D

PESD24VS2UT_SOT23-3~D

2

3

D20

D20

1

1

Speaker Connector

PESD24VS2UT_SOT23-3~D

PESD24VS2UT_SOT23-3~D

2

3

D21

D21

1

R03 Modify

AMP_SW_JK-

1

C892

C892
330P_0402_50V7K~D

330P_0402_50V7K~D

2

1

C894

C894
330P_0402_50V7K~D

330P_0402_50V7K~D

2

X01 modify

JWFER1

JWFER1

1

1

2

2

3

G1

4

G2

MOLEX_53398-0271~D

MOLEX_53398-0271~D

SUB WOOFER amp impedance of JBL is 4 ohm.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Compal Electronics, Inc.

Speaker

Speaker

Speaker

LA-5152P

LA-5152P

LA-5152P

1

JSPK1

JSPK1

1

1

2

2

3

5

3

G5

4

6

4

G6

MOLEX_53261-0471

MOLEX_53261-0471

CONN@

CONN@

26 51Monday, June 15, 2009

26 51Monday, June 15, 2009

26 51Monday, June 15, 2009

A00

A00

A00

http://mycomp.su/x/

A

3VS

02 RF reserve part.

R

W

WAN

1 1

ICH_PCIE_W AKE#<21,24,28,31>

WW AN_CLKREQ#<6>

CLK_PCIE_ WAN#<6>
CLK_PCIE_ WAN<6>

PCIE_IRX_W ANTX_N1<22>
PCIE_IRX_W ANTX_P1< 22>

PCIE_ITX_C_W ANRX_N1<22>
PCIE_ITX_C_W ANRX_P1<22 >

2 2

EC_TX_P 80_DATA<31>

EC_RX_P 80_CLK<31 >

+

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

47P_0402_50V8J~D

47P_0402_50V8J~D

C1535

C1535

1

1

2

2

@

@

PCIE_IRX_W ANTX_N1
PCIE_IRX_W ANTX_P1

PCIE_ITX_C_W ANRX_N1
PCIE_ITX_C_W ANRX_P1

R1010 0_0402_5%R1010 0_0402_5%
R1011 0_0402_5%R1011 0_0402_5%

.1U_0402_16V7K~D

.1U_0402_16V7K~D

C403

C403

1

2

ICH_PCIE_W AKE#

WW AN_CLKREQ#

CLK_PCIE_ WAN#
CLK_PCIE_ WAN

1 2
1 2

C404

C404

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

C405

C405

1

1

2

2

+3VS

02 RF reserve part.

R

330U_D2E_6.3VM_R25~D

330U_D2E_6.3VM_R25~D

C956

C956

+

+

JWW AN1

JWW AN1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

TYCO_1775 838-1~D

TYCO_1775 838-1~D

B

1.5VS

+

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

.1U_0402_16V7K~D

.1U_0402_16V7K~D

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

47P_0402_50V8J~D

47P_0402_50V8J~D

C1536

C1536

1

2

@

@

+1.5VS +3VS

C407

C407

1

1

2

2

C409

C409

C408

C408

1

2

Don't forget to remove R287 or
disble debug port when doing

GND2

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

UIM_DATA
UIM_CLK
UIM_RST

SIM Pre-test and before RTS.

+UIM_PW R

R285 0_0402_ 5%@ R285 0_0402_5%@

1 2

WW AN_RADIO_OFF #
PCI_RST#

R911 0_0402_ 5%R911 0_04 02_5%

1 2

R912 0_0402_ 5%R912 0_04 02_5%

1 2

USBP5_D ­USBP5_D +

C

UIM_VPP

WW AN_RADIO_OFF # < 31>

PCI_RST# <20,24 ,28>

EC_SMB_ CK2 <7 ,28,31>
EC_SMB_ DA2 <7 ,28,31>

USBP5_D +

USBP5_D -

R913

R913

R914

R914

@

@

L71

@L71

@

DLW2 1SN121SQ2L_4 P~D

DLW2 1SN121SQ2L_4 P~D

2

2

3

3

1 2

1 2

1

4

0_0402_ 5%@

0_0402_ 5%@

0_0402_ 5%

0_0402_ 5%

UIM_DATA

33P_040 2_50V8J~D

33P_040 2_50V8J~D

1

4

D

U

U

109

109

C410

C410

1

2

3

SRV05-4.T CT_SOT23-6~D

SRV05-4.T CT_SOT23-6~D

JSIM1

JSIM1

5

GND

6

VPP

7

I/O

8

NC

9

GND

10

GND

MOLEX_4 75531001

MOLEX_4 75531001

CONN@

CONN@

Link ok

VCC
RST
CLK

6

5

4

1
2
3
4

NC

UIM_RSTUIM_VPP

UIM_CLK

C411

C411
33P_040 2_50V8J~D

33P_040 2_50V8J~D

4.7U_080 5_10V4Z~D

4.7U_080 5_10V4Z~D

Place as close as JSIM1

Wireless Radios (on/off) use Fn Key controll ?

USBP5+ <2 2>

USBP5- <22>

E

+UIM_PW R +3VS

D10

@D1 0

@

1

DAN217_ SC59-3

DAN217_ SC59-3

1

1

C413

2

C413
.1U_0402 _16V7K~D

.1U_0402 _16V7K~D

2

C412

C412

3

2

WLAN

ICH_PCIE_W AKE#<21,24,28,31>

COEX2_W LAN_ACTIVE<28,30>

3 3

WPAN _ACTIVE<28>

BT_ACTIVE<3 0>

4 4

WPAN _ACTIVE

BT_ACTIVE

WLAN _CLKREQ#< 6>

CLK_PCIE_ WLAN#<6>
CLK_PCIE_ WLAN<6>

PLT_RST #<11 ,20,30,31>

CLK_DEB UG_PORT< 6>

PCIE_IRX_W LANTX_N2<22 >
PCIE_IRX_W LANTX_P2< 22>

PCIE_ITX_C_W LANRX_N2< 22>
PCIE_ITX_C_W LANRX_P2<22>

D40

D40

2

3

BAT54C-7 -F_SOT23-3~D

BAT54C-7 -F_SOT23-3~D

ICH_PCIE_W AKE#

R291 0_0402_ 5%@ R291 0_0402_5%@

COEX1_W LAN_ACTIVE
WLAN _CLKREQ#

CLK_PCIE_ WLAN#
CLK_PCIE_ WLAN

R918 0_0402_ 5%@ R918 0_0402_5%@

R921 0_0402_ 5%@ R921 0_0402_5%@

PCIE_IRX_W LANTX_N2
PCIE_IRX_W LANTX_P2

PCIE_ITX_C_W LANRX_N2
PCIE_ITX_C_W LANRX_P2

COEX1_W LAN_ACTIVE

1

12

1 2

1 2
1 2

R997

R997
10K_040 2_5%

10K_040 2_5%

+3V_W LAN

JWLA N1

JWLA N1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

TYCO_1775 838-1~D

TYCO_1775 838-1~D

GND2

2
4
6

8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

+1.5VS +3V_W LAN

2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52

54

R919 0_0402_ 5%@R919 0_0402 _5%@
R920 0_0402_ 5%@R920 0_0402 _5%@
R915 0_0402_ 5%@R915 0_0402 _5%@
R916 0_0402_ 5%@R916 0_0402 _5%@
R917 0_0402_ 5%@R917 0_0402 _5%@

WLAN _RADIO_OFF#

R922 0_0402_ 5%@ R922 0_0402_5%@

1 2

R923 0_0402_ 5%@ R923 0_0402_5%@

1 2

USBP4_D ­USBP4_D +

USBP4_D +

USBP4_D -

1 2
1 2
1 2
1 2
1 2

WLAN _RADIO_OFF# <31>
PCI_RST# <20,24 ,28>

L72

@L7 2

@

DLW2 1SN121SQ2L_4 P~D

DLW2 1SN121SQ2L_4 P~D

2

2

3

3

R924 0_0402_5%

R924 0_0402_5%

@

@

1 2

R925

R925

@

@

1 2

LPC_AD3

LPC_AD2
LPC_AD1
LPC_AD0

EC_SMB_ CK2 <7 ,28,31>
EC_SMB_ DA2 <7 ,28,31>

1

1

4

4

0_0402_ 5%

0_0402_ 5%

LPC_FRA ME# <19,31>

LPC_AD[0 ..3] <19,31>

R02 RF reserve part.

USBP4+ <2 2>

USBP4- <22>

+3V_W LAN

47P_0402_50V8J~D

47P_0402_50V8J~D

1

2

R02 modify

1 2

47P_0402_50V8J~D

47P_0402_50V8J~D

C1538

C1538

1

2

@

@

JP1@ J P1@

R02 RF reserve part.

.1U_0402_16V7K~D

.1U_0402_16V7K~D

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

C1537

C1537

1

C414

C414

2

@

@

+1.5VS

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

C417

C417

2

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

1

1

C415

C415

C416

C416

2

2

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

1

C418

C418

2

+3VS

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

A

B

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: S heet o f

Date: S heet o f

C

D

Date: S heet o f

Compal Electronics, Inc.

Mini Card_WLAN/WWAN

Mini Card_WLAN/WWAN

Mini Card_WLAN/WWAN

LA-5152P

LA-5152P

LA-5152P

A00

A00

27 51Monday, June 15 , 2009

27 51Monday, June 15 , 2009

27 51Monday, June 15 , 2009

E

A00

http://mycomp.su/x/

5

D D

I

CH_PCIE_WAKE#<21,24,27,31>

COEX2_WLAN_ACTIVE<27,30>

WPAN_ACTIVE<27>

WPAN_CLKREQ#<6>

CLK_PCIE_WPAN#<6>
CLK_PCIE_WPAN<6>

PCIE_IRX_WPANTX_N3<22>
PCIE_IRX_WPANTX_P3<22>

PCIE_ITX_C_WPANRX_ N3<22>
PCIE_ITX_C_WPANRX_ P3<22>

C C

I

CH_PCIE_WAKE#

R292 0_0402_5%@ R292 0_0402_5%@

1 2

R293 0_0402_5%@ R293 0_0402_5%@

1 2

WPAN_CLKREQ#

CLK_PCIE_WPAN#
CLK_PCIE_WPAN

PCIE_IRX_WPANTX_N3
PCIE_IRX_WPANTX_P3

PCIE_ITX_C_WPANRX_ N3
PCIE_ITX_C_WPANRX_ P3

4

WPAN_ACTIVE_R

W

PAN Card

+

3VS

J

J

WPAN1

WPAN1

1

1

3

3

5

5

7

7

9

9

11

11

13

13

15

15

17

17

19

19

21

21

23

23

25

25

27

27

29

29

31

31

33

33

35

35

37

37

39

39

41

41

43

43

45

45

47

47

49

49

51

51

53

GND1

TYCO_1775838-1~D

TYCO_1775838-1~D

GND2

3

+

1.5VS

+

1.5VS

+

3VS

2

2

4

4

6

6

8

8

10

10

12

12

14

14

16

16

18

18

20

20

22

22

24

24

26

26

28

28

30

30

32

32

34

34

36

36

38

38

40

40

42

42

44

44

46

46

48

48

50

50

52

52

54

WPAN_RADIO_OFF#
PCI_RST#

R294 0_0402_5%@ R294 0_0402_5%@

1 2

R298 0_0402_5%@ R298 0_0402_5%@

1 2

USBP6_D­USBP6_D+

USBP6_D-

USBP6_D+

WPAN_RADIO_OFF# <31>
PCI_RST# <20,24,27>

EC_SMB_CK2 <7,27,31>
EC_SMB_DA2 <7,27,31>

L26

@L26

DLW21SN121SQ2L_4P~D

DLW21SN121SQ2L_4P~D

@

2

2

3

3

R295 0_0402_5%@R295 0_0402_5%@

R296 0_0402_5%@R296 0_0402_5%@

12

12

1

1

4

4

1

2

USBP6- <22>

USBP6+ <22>

2

+

3VS

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

1

C420

C420

C419

C419

2

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.047U_0402_16V4Z~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

1

1

C421

C421

C422

C422

C423

C423

2

2

4.7U_0603_6.3V6M~D

4.7U_0603_6.3V6M~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

1

C424

C424

C425

C425

2

2

1

Express Card Power
Switch (1A)

+3VALW

B B

A A

5

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C433

C433

2

PCI_RST#<20,24,27>

SYSON<31,33,42>

SUSP#<31,33,41,42>

+3VS+1.5VS

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C431

C431

C432

C432

2

U16

U16

2

3.3Vin

17

3.3Vin

PCI_RST#

CPPE#

EXPR_CPUSB#

+1.5V_CARD Max. 650mA , Average 500mA
+3V_CARD Max. 1300mA, Average 1000mA

AUX_IN12AUX_OUT

6

SYSRST#

20

SHDNZ

1

STBYZ

10

CPPE#

9

CPUSB#

18

RCLKEN

P2231NL E2_QFN20_4X4

P2231NL E2_QFN20_4X4

4

3.3Vout

3.3Vout

PERSTZ

GND

OCZ

3
15

11

19

PERST#

8

4

NC

5

NC

13

NC

14

NC

16

NC

7

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

+1.5VS_CARD

(0.5A)

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

2

+3VS_CARD

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

1

C429

C429

2

+3VS_CARD_AUX

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

1

C434

C434

2

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

1

C427

C427

2

Express Card

+3VS_CARD

EXP_CLKREQ#
CPPE#
CLK_PCIE_EXPR#
CLK_PCIE_EXPR

PCIE_IRX_EXPTX_N5
PCIE_IRX_EXPTX_P5

PCIE_ITX_C_EXPRX_N5
PCIE_ITX_C_EXPRX_P5

USBP7­USBP7+
EXPR_CPUSB#

EC_SMB_CK2
EC_SMB_DA2

PERST#

2

EXP_CLKREQ#<6>

CLK_PCIE_EXPR#<6>
CLK_PCIE_EXPR<6>

EC_SMB_CK2<7,27,31>
EC_SMB_DA2<7,27,31>

ICH_PCIE_WAKE#<21,24,27,31>

+3VS_CARD_AUX

USBP7-<22>
USBP7+<22>

+1.5VS_CARD

C430

C430

C435

C435

PCIE_IRX_EXPTX_N5<22>
PCIE_IRX_EXPTX_P5<22>

PCIE_ITX_C_EXPRX_N5<22>
PCIE_ITX_C_EXPRX_P5<22>

C428

C428

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

JEXP1

JEXP1

1

GND

2

USB-

3

USB+

4

CPUSB#

5

REV

6

REV

7

SMBCLK

8

SMBDATE

9

+1.5V

10

+1.5V

11

WAKE#

12

+3.3VAUX

13

PERST#

14

+3.3V

15

+3.3V

16

CLKREQ#

17

CPPE#

18

REFCLK-

19

REFCLK+

20

GND

21

PERn0

22

PERp0

23

GND

24

PETn0

25

PETp0

26

GND

27

G1

28

G2

29

G3

30

G4

TAITW_PXPXAE-000LBS2Z Z4N0_NR

TAITW_PXPXAE-000LBS2Z Z4N0_NR

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

WPAN / Express Card

WPAN / Express Card

WPAN / Express Card

LA-5152P

LA-5152P

LA-5152P

1

A00

A00

28 51Monday, June 15, 2009

28 51Monday, June 15, 2009

28 51Monday, June 15, 2009

A00

http://mycomp.su/x/

A

S

ATA_ITX_C _DRX_P5<19>

1 1

S
S

ATA_ITX_C _DRX_N5< 19>

C

C

437 0.01U_ 0402_16V7K~D

S

ATA_IRX_D TX_N5<19 >
ATA_IRX_D TX_P5< 19>

S

437 0.01U_ 0402_16V7K~D
436 0.01U_ 0402_16V7K~D

436 0.01U_ 0402_16V7K~D

C

C

B

ATA ODD CONN

S

ATA_ITX_C _DRX_P5

S

ATA_ITX_C _DRX_N5

S

1 2
1 2

ATA_IRX_C _DTX_N5
ATA_IRX_C _DTX_P5

S

+5VS

J

J

ODD1

ODD1

1

G

ND

2

A

+

3

A

-

4

ND

G

5

B

-

6

+

B

7

GND

8

DP

9

V5

10

V5

11

MD
GND
GND

G1
G2
G3

12
13

MOLEX_4 7639-3000_13P

MOLEX_4 7639-3000_13P

C

+

5VS

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1U_0603_10V6K~D

1U_0603_10V6K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C438

C438

C439

1

2

14
15
16

C439

1

1

C440

C440

2

2

D

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1

C441

C441

2

E

Close to ODD Con n

R02 Follow ME request.

SATA HDD (On board)

SATA_ITX_ C_DRX_P1<19>
SATA_ITX_ C_DRX_N1<19>

2 2

SATA_IRX_ DTX_N1<1 9>
SATA_IRX_ DTX_P1<19>

C449 0.01U _0402_25V7K~ DC449 0.01U_0402 _25V7K~D
C450 0.01U _0402_25V7K~ DC450 0.01U_0402 _25V7K~D

12
12

R02 modify. JSATA1 with JSATA2 swap

SATA_ITX_ C_DRX_P1
SATA_ITX_ C_DRX_N1

SATA_IRX_ C_DTX_N1
SATA_IRX_ C_DTX_P1

+5VS

JSATA1

JSATA1

1

GND

2

A+

3

A-

4

GND

5

B-

6

B+

7

GND

8

V33

9

V33

10

V33

11

GND

12

GND

13

GND

14

V5

15

V5

16

V5

17

GND

18

Reserved

19

GND

20

V12

21

V12

22

V12

MOLEX_4 7662-2000

MOLEX_4 7662-2000

CONN@

CONN@

GND
GND
GND

+5VS

Close to JSATA1.

10U_0805_10V4Z~D

10U_0805_10V4Z~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C445

C445

1

1

1

C446

C446

2

2

2

23
24
25

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1

C448

C447

C447

C448

2

SATA HDD

JSATA2

3 3

4 4

由由由由由由由由

Kink pin

尺尺尺尺尺尺尺尺尺尺尺尺由由由由

kink hole

因因因因因因因因將將將將 原

HDD Conn.(REV.) –FOXCONN–SP01000LC0L layout

原

原

原

即即即即即即即即即即即即即即即即即即即即改改改改

pin

腳腳腳腳腳腳腳腳腳腳腳腳腳腳腳腳腳腳腳腳腳腳腳腳

，，，，將將將將將將將將將將將將將將將將將將將將將將將將將將將將，，，，也也也也也也也也也也也也也也也也也也也也

A

SATA_ITX_ C_DRX_P0<19>
SATA_ITX_ C_DRX_N0<19>

SATA_IRX_ DTX_N0<1 9>
SATA_IRX_ DTX_P0<19>

C442 0.01U _0402_25V7K~ DC442 0.01U_0402 _25V7K~D
C443 0.01U _0402_25V7K~ DC443 0.01U_0402 _25V7K~D

pin

改

改

改改改改改

12
12

腳腳腳腳腳腳腳腳腳腳腳腳。。。。

Tyco–SP01000E70L layout

改

B

SATA_ITX_ C_DRX_P0
SATA_ITX_ C_DRX_N0

SATA_IRX_ C_DTX_N0
SATA_IRX_ C_DTX_P0

+5VS

JSATA2

1

GND

2

RX+

3

RX-

4

GND

5

TX-

6

TX+

7

GND

8

3.3V

9

3.3V

10

3.3V

11

GND

12

GND

13

GND

14

5V

15

5V

16

5V

17

GND

18

Reserved

19

GND

20

12V

21

12V

22

12V

TYCO_1770 615-3~D

TYCO_1770 615-3~D

CONN@

CONN@

GND1
GND2

23
24

+5VS

Close to JSATA2.

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

C452

C452

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1

1

C453

C453

2

1

C454

C454

C455

C455

2

2

R02 Modify

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: S heet o f

Date: S heet o f

Date: S heet o f

Compal Electronics, Inc.

ODD / SATA CONN

ODD / SATA CONN

ODD / SATA CONN

LA-5152P

LA-5152P

LA-5152P

29 51Monday, June 15 , 2009

29 51Monday, June 15 , 2009

29 51Monday, June 15 , 2009

E

A00

A00

A00

http://mycomp.su/x/

+

1.8VS

utput De-emphasis Adjustment

Output Swing Control

S

EL2_ [A:B]

0

*

1

SATA_ITX_C_DRX_P4<19>
SATA_ITX_C_DRX_N4<19>

SATA_IRX_DTX_P4<19>

SATA_IRX_DTX_N4<19>

R954 0_0402_5%R954 0_0402_5%
R955 0_0402_5%R955 0_0402_5%

R956 0_0402_5%@ R956 0_0402_5%@
R957 0_0402_5%@ R957 0_0402_5%@

R958 0_0402_5%@ R958 0_0402_5%@
R959 0_0402_5%@ R959 0_0402_5%@

R961 0_0402_5%R961 0_0402_5%

+1.8VS

R965 10K_0402_1%R965 10K_0402_1 %
R967 10K_0402_1%R967 10K_0402_1 %

R968 470_0402_5%@ R968 470_0402_5%@

+1.8VS

Swing

1

1.2x

SATA_ITX_C_DRX_P4
SATA_ITX_C_DRX_N4

SATA_IRX_C_DTX_P4

1 2

C942 0.01U_0402_16V7K~DC942 0.01U_0402_16V7K~D

SATA_IRX_C_DTX_N4

1 2

C943 0.01U_0402_16V7K~DC943 0.01U_0402_16V7K~D

1 2
1 2

1 2
1 2

1 2
1 2

1 2

R963 0_0402_5%R963 0_0402_5%

1 2

1 2
1 2

USB_DETECT

1 2

R969 0_0402_5%@ R969 0_0402_5%@

1 2

R970 0_0402_5%@ R970 0_0402_5%@

1 2

O

S

x

EL3_ [A:B]

0

*

1

U40

U40

2

AI+

3

AI-

7

BO+

8

BO-

34

SEL0_A

13

SEL0_B

33

SEL1_A

14

SEL1_B

32

SEL2_A

15

SEL2_B

31

SEL3_A

16

SEL3_B

30

EN_A

29

EN_B

19

IREF

11

CLKIN+

12

CLKIN-

PI2EQX3201BZFEX_TQFN36_6X5

PI2EQX3201BZFEX_TQFN36_6X5

De-emphasis

0dB

-3.5dB

1

VDD

6

VDD

10

VDD

23

VDD

28

VDD

5

AVDD

27

AO+

26

AO-

21

BI-

22

BI+

17

OUT+

18

OUT-

36

SD_A

35

SD_B

25

GND

20

GND

9

GND

4

GND

24

AGND

37

PAD

1

2

ESATA_ITX_DRX_P4
ESATA_ITX_DRX_N4

ESATA_IRX_DTX_N4
ESATA_IRX_DTX_P4

R960 0_0402_5%@R960 0_0402_5%@

1 2

R962 0_0402_5%@R962 0_0402_5%@

1 2

R964 0_0402_5%@R964 0_0402_5%@

1 2

R966 0_0402_5%@R966 0_0402_5%@

1 2

1

1

1

C935

C935

C936

C936

2

2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

12

R953

R953
390_0402_5%

390_0402_5%

1

C938

C938

C937

C937

2

2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D
C941

C941
4700P_0402_25V7K~D

4700P_0402_25V7K~D

ESATA_ITX_C_DRX_P4

12

C944

C944
4700P_0402_25V7K~D

4700P_0402_25V7K~D

ESATA_ITX_C_DRX_N4

12

C939

C939

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

A00 change to SA00002YQ0 L (S IC PI2EQX3201BLZFEX TQFN 36P)

R10 Delete

USB_DETECT#

13

D

D

2

G

G

S

S

USB_DETECT

@

@

Q11

Q11
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

SEL0_ [A:B] SEL1_ [A:B]

*

0 0

0 1

1
1 1

Equalizer Selection

Compliance Channel

no equalization

[0:2.5dB] @ 1.6 GHz

0

[2.5:4.5dB] @ 1.6 GHz

[4.5:6.5dB] @ 1.6 GHz

Place close JESA1

Camera Conn

L27 WCM2012F2S-900T 04_0805@ L27 WCM2012F2S-900T04_0805@

USBP11+

USBP11+<22>

USBP11-

USBP11-<22>

+3VS

DMIC_CLK<25>

DMIC0<25>

Layout note: Pin5 thru
individual via to GND layer

USBP_P11

USBP_N11

1

1

4

4

R297

R297

R299 0_0402_5%R299 0_0402_5%

L28 BLM18BB221SN1D 0603L28 BLM18BB221SN1D 0603

D35

D35

1

2

3

CH4

CH1

Vn

CH3

CH2

CM1293-04SO_SOT23-6@

CM1293-04SO_SOT23-6@

Place close JCAM1

0_0402_5%

0_0402_5%

12
12
12

100P_0402_50V8J~D

100P_0402_50V8J~D

C458

C458

AS CLOSE AS JCA1

4

5

Vp

6

2

3

1

@

@

2

DMIC_CLK

DMIC0

2

3

+3VS

DMIC_CLK

DMIC0

100P_0402_50V8J~D

100P_0402_50V8J~D

1
@

@

2

USBP_P11
USBP_N11

C459

C459

JCAM1

JCAM1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

GND

9

GND

MOLEX_48227-0701

MOLEX_48227-0701

CONN@

CONN@

COEX2_WLAN_ACTIVE<27,28>

BT_RADIO_OFF#<31>

BT_DET#<31>

BT_OFF#<31>

R995

@R995

@

10K_0402_5%

10K_0402_5%

1 2

Bluetooth

JBT1

BT_DET#
COEX2_WLAN_ACTIVE
BT_OFF# USBP10+
BT_RADIO_OFF# USBP10-

BT_ACTIVE

JBT1

112
334
556
778
9910
111112
131314

GND15GND

HRS_CL537-0918-4-86

HRS_CL537-0918-4-86

USBP10-

USBP10+

C456

C456

@

@

47P 50V J NPO 0402

47P 50V J NPO 0402

1

2

BT_ACTIVE

2
4
6
8
10
12
14

16

C457

C457

@

@

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

1

2

C940

C940

D34

D34

1

2

3

47P 50V J NPO 0402

47P 50V J NPO 0402

1

2

CH1

Vn

CH2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

CM1293-04SO_SOT23-6@

CM1293-04SO_SOT23-6@

43.2K_0402_1%

43.2K_0402_1%

49.9K_0402_1%

49.9K_0402_1%

4

CH4

5

Vp

6

CH3

BT_ACTIVE <27>

+3VS

USBP10+ <22>
USBP10- <22>

P

WRSHARE_EN#<31>

+5V_CHGUSB

R301

R301

1 2

R304

R304

1 2

USBP0_D-

USBP0_D+

+

5VALW

10U_0805_10V4Z~D

10U_0805_10V4Z~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C463

C463

C462

C462

1

1

2

2

R302

R302
75K_0402_1%

75K_0402_1%

1 2

R305

R305

49.9K_0402_1%

49.9K_0402_1%

1 2

+5V_CHGUSB

USBP0+<22>

USBP0-<22>

USB_CHARGE_D+

USB_CHARGE_D- USBP0_D-

+5V_CHGUSB

1

+

+

C460

C460
150U_D _10VM_R40M~D

150U_D _10VM_R40M~D

2

R03 modify

ESATA_IRX_DTX_N4

ESATA_IRX_DTX_P4

Cardreader Connector

USB_EN#<31>

USB_OC1#<22>

+5VALW

+3VS

PCIE_ITX_C_CBRX_P4<22>
PCIE_ITX_C_CBRX_N4<22>

PCIE_IRX_CBTX_P4<22 >
PCIE_IRX_CBTX_N4<22>

CLK_PCIE_CB<6>
CLK_PCIE_CB#<6>

CB_CLKREQ#<6>

PLT_RST#<11,20,27,31>

PCIE_ITX_C_CBRX_P4
PCIE_ITX_C_CBRX_N4

PCIE_IRX_CBTX_P4
PCIE_IRX_CBTX_N4

CLK_PCIE_CB
CLK_PCIE_CB#

CB_CLKREQ#
PLT_RST#

U

U

17

17

1

G

O

ND

2
3
4

R

03 modify

C1#

I

O

N

UT1

E

O

N1#

UT2

E

O

N2#

C2#

TPS2062ADR_SO8~D

TPS2062ADR_SO8~D

U18

U18

1

1D+

2

1D-

3

2D+

4

2D-

GND5OE#

TS3USB221RSER_QFN10_2x1P5~D

TS3USB221RSER_QFN10_2x1P5~D

S Logic"1" Work from BKT

1

C461

C461

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

ESATA_ITX_C_DRX_P4
ESATA_ITX_C_DRX_N4

ESATA_IRX_C_DTX_N4

12

C464 4700 P_0402_25V7K~DC464 4700P_0402_25V7K~D

ESATA_IRX_C_DTX_P4

12

C465 4700 P_0402_25V7K~DC465 4700P_0402_25V7K~D

USB_DETECT#<32>

USBP1+<22>
USBP1-<22>

USB_DETECT#

5V_CHGUSB

+

E

SATA_USB_OC#

8
7
6
5

10

VCC

9

S

8

D+

7

D-

6

USBP0_D­USBP0_D+

JCARD1

JCARD1

30

34

30

G4

29

33

29

G3

28

32

28

G2

27

31

27

G1

26

26

25

25

24

24

23

23

22

22

21

21

20

20

19

19

18

18

17

17

16

16

15

15

14

14

13

13

12

12

11

11

10

10

9

9

8

8

7

7

6

6

5

5

4

4

3

3

2

2

1

1

FOX_GS12301-1011A-9F~D

FOX_GS12301-1011A-9F~D

CONN@

CONN@

DELL CONFIDENTIAL/PROPRIETARY

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

E

SATA_USB_OC# <22>

C466

C466

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

+3VALW

PWRSHARE_OE#

USBP0_D+

S Function

OE#

X

L
H

H

L
L

12

Disconnect

D=1D

D=2D

R303

R303
100K_0402_5%

100K_0402_5%

ESATA

JESA1

JESA1

USB

USB

1

VBUS

2

D-

3

D+

4

GND

5

GND

6

A+

ESATA

ESATA

7

A-

8

9
10
11

12
13

FOX_3Q3813C-RB1C3B-7F

FOX_3Q3813C-RB1C3B-7F

CONN@

CONN@

LA-5152P

LA-5152P

LA-5152P

14

GND

GND

15

B-

GND

16

B+

GND

17

GND

GND

DET1
DET2

USBP2-<22>
USBP2+<22>

USB_EN#<31>

USB_OC2#<22>

BATT_CHG_LED#<31>
BATT_LOW_LED#<31>

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

USB / ESATA / BT / CAMARA

USB / ESATA / BT / CAMARA

USB / ESATA / BT / CAMARA

PWRSHARE_OE# <31>

to Single USB board

+5VALW

FCI_10089709-010010-LF

FCI_10089709-010010-LF

JSUSB1

JSUSB1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

9

9

10

10

11

G1

12

G2

CONN@

CONN@

30 51Monday, June 15, 2009

30 51Monday, June 15, 2009

30 51Monday, June 15, 2009

A00

A00

A00

http://mycomp.su/x/

+

3VALW

324

324

R

R

1 2

306 10K_0402_5%

306 10K_0402_5%

R

R

R307 47K_0402_5%R 307 47K_0402_5%

1 2

R308 47K_0402_5%R 308 47K_0402_5%

1 2

R309 47K_0402_5%R 309 47K_0402_5%

1 2

R926

R926

R314 4.7K_0402_5%R314 4.7K_0402_5%

R315 4.7K_0402_5%R315 4.7K_0402_5%

+3VS

R317 4.7K_0402_5%R317 4.7K_0402_5%

R318 4.7K_0402_5%R318 4.7K_0402_5%

R319 4.7K_0402_5%@R319 4.7K_0402_5%@

R320 4.7K_0402_5%R320 4.7K_0402_5%

R339 4.7K_0402_5%R339 4.7K_0402_5%

R342 4.7K_0402_5%R342 4.7K_0402_5%

+5VS

R325 4.7K_0402_5%R325 4.7K_0402_5%

R326 4.7K_0402_5%R326 4.7K_0402_5%

R948 200K_0402_5%R948 200K_0402_5%

12

12

1 2

EC Adam_Yang request

SLP_S3#

T78T78

SLP_S5#

T79T79

SLP_S4#

T80T80

ICH_PCIE_WAKE#<21,24,27,28>

CLK_PCI_EC

12

R327

@ R327

@

10_0402_5%

10_0402_5%

1

C478

@C478

@

15P_0402_50V8J

15P_0402_50V8J

2

10K_0402_5%

10K_0402_5%

12

10K_0402_5%

10K_0402_5%

12

12

12

12

12

12

12

12

12

22P_0402_50V8J~D

22P_0402_50V8J~D

C

C
479

479

M

SEN#

P

CIE_PME#

EC_RST#

C475

C475

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

12

KSO0

KSO1

EN_KBL#

EC_SMB_DA1

EC_SMB_CK1

EC_SMB_DA2

EC_SMB_CK2

LCD_TST

BT_RADIO_OFF#

EC_FB_SCLK

EC_FB_SDATA

TP_DATA

TP_CLK

KSO5

R977 0_0402_5%R977 0_0402_5%

R328

R328

1 2

20M_0603_5%

20M_0603_5%

XCLKO

1

2

32.768KHZ_12.5PF_QTFM28-32768K1

32.768KHZ_12.5PF_QTFM28-32768K1

1

2

1 2

@

@

Y4

Y4

XCLKI

+

3VALW

1000P_0402_50V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C467

C467

2

LPC_FRAME#<19,27>

LPC_AD3<19,27>
LPC_AD2<19,27>
LPC_AD1<19,27>
LPC_AD0<19,27>

CLK_PCI_EC<6>

TOUCHKEY_TINT<32>

KSI[0..7]<32>

KSO[0..18]<32>

EC_SMB_CK1<44>

EC_SMB_DA1<44>

EC_SMB_CK2<7,27,28>

EC_SMB_DA2<7,27,28>

SLP_S3#<21>
SLP_S5#<21>

EC_SMI#<21>

LID_SW#<32>

EC_FB_SCLK<32>

EC_FB_SDATA<32>

KB_BL_PWM#<32>
FAN_SPEED1<7>

WLAN_RADIO_OFF#<27>

EC_TX_P80_DATA<27>

EC_RX_P80_CLK<27>

ON_OFF<32>

PWR_BTN_LED#<32>

EN_KBL#<32>

4

3

GG

GG

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

C468

C468

2

G

ATEA20<19>

KB_RST#<19>

SERIRQ<21>

PLT_RST#<11,20,27,30>

EC_SCI#<21>

KSI[0..7]

KSO[0..18]

22P_0402_50V8J~D

22P_0402_50V8J~D

1

C481

C481

2

1

1

C469

C469

C470

C470

2

2

G

ATEA20

B_RST#

K
SERIRQ
LPC_FRAME#LPC_FRAME#
LPC_AD3
LPC_AD2
LPC_AD1
LPC_AD0

CLK_PCI_EC

PLT_RST#
EC_RST#
EC_SCI#

TOUCHKEY_TINT

KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
KSO17
KSO18

EC_SMB_CK1

EC_SMB_DA1

EC_SMB_CK2

EC_SMB_DA2

SLP_S3# EC_RSMRST#
SLP_S5#
EC_SMI# EC_ON
LID_SW# BT_RADIO_OFF#
EC_FB_SCLK

EC_FB_SDATA

PCIE_PME#

KB_BL_PWM#

FAN_SPEED1

WLAN_RADIO_OFF#
EC_TX_P80_DATA
EC_RX_P80_CLK
ON_OFF

PWR_BTN_LED#
EN_KBL#

XCLKI
XCLKO

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1

1

2

10

12
13
37
20
38

55
56
57
58
59
60
61
62
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
81
82

77
78
79
80

14
15
16
17
18
19
25
28
29
30
31
32
34
36

122
123

C472

C472

C471

C471

2

19

19

U

U

1

G

A20/GPIO00

2

KBRST#/GPIO01

3

SERIRQ#

4

LFRAME#

5

LAD3

7

LAD2

8

LAD1

LPC & MISC

LPC & MISC

LAD0

PCICLK
PCIRST#/GPIO05
ECRST#
SCI#/GPIO0E
CLKRUN#/GPIO1D

KSI0/GPIO30
KSI1/GPIO31
KSI2/GPIO32
KSI3/GPIO33
KSI4/GPIO34
KSI5/GPIO35
KSI6/GPIO36
KSI7/GPIO37
KSO0/GPIO20
KSO1/GPIO21
KSO2/GPIO22
KSO3/GPIO23
KSO4/GPIO24

Int. K/B

Int. K/B

KSO5/GPIO25

Matrix

Matrix

KSO6/GPIO26
KSO7/GPIO27
KSO8/GPIO28
KSO9/GPIO29
KSO10/GPIO2A
KSO11/GPIO2B
KSO12/GPIO2C
KSO13/GPIO2D
KSO14/GPIO2E
KSO15/GPIO2F
KSO16/GPIO48
KSO17/GPIO49

SCL1/GPIO44
SDA1/GPIO45
SCL2/GPIO46
SDA2/GPIO47

6

PM_SLP_S3#/GPIO04
PM_SLP_S5#/GPIO07
EC_SMI#/GPIO08
LID_SW#/GPIO0A
SUSP#/GPIO0B
PBTN_OUT#/GPIO0C
EC_PME#/GPIO0D
EC_THERM#/GPIO11
FAN_SPEED1/FANFB1/GPIO14
FANFB2/GPIO15
EC_TX/GPIO16
EC_RX/GPIO17
ON_OFF/GPIO18
PWR_LED#/GPIO19
NUMLED#/GPIO1A

XCLK1
XCLK0

KB926QFD3_LQFP128

KB926QFD3_LQFP128

9

22

33

VCC

VCC

PWM Output

PWM Output

DA Output

DA Output

PS2 Interface

PS2 Interface

SPI Device Interface

SPI Device Interface

SM Bus

SM Bus

GPIO

GPIO

GND

11

24

+

EC_AVCC

96

111

125

VCC

VCC

VCC

VCC

I

NVT_PWM/PW M1/GPIO0F

ACOFF/FANPWM2/GPIO13

AD Input

AD Input

TP_DATA/PSDAT3/GPIO4F

SPI Flash ROM

SPI Flash ROM

BATT_CHGI_LED#/GPIO52

GPIO

GPIO

BATT_LOW_LED#/GPIO54

GPO

GPO

GPI

GPI

GND

GND

GND

GND

35

94

113

67

AVCC

BEEP#/PWM2/GPIO10

FANPWM1/GPIO12

BATT_TEMP/AD0/GPIO38

BATT_OVP/AD1/GPIO39

ADP_I/AD2/GPIO3A

SELIO2#/AD5/GPIO43

DAC_BRIG/DA0/GPIO3C

EN_DFAN1/DA1/GPIO3D

IREF/DA2/GPIO3E

PSCLK1/GPIO4A
PSDAT1/GPIO4B
PSCLK2/GPIO4C
PSDAT2/GPIO4D

TP_CLK/PSCLK3/GPIO4E

SDICS#/GPXOA00
SDICLK/GPXOA01

SDIDO/GPXOA02

SPICLK/GPIO58

CIR_RX/GPIO40

CIR_RLC_TX/GPIO41

FSTCHG/SELIO#/GPIO50

CAPS_LED#/GPIO53

SUSP_LED#/GPIO55

SYSON/GPIO56

VR_ON/XCLK32K/GPIO57

EC_RSMRST#/GPXO03
EC_LID_OUT#/GPXO04

EC_ON/GPXO05

EC_SWI#/GPXO06

ICH_PWROK/GPXO06

BKOFF#/GPXO08

WL_OFF#/GPXO09

PM_SLP_S4#/GPXID1

AGND

69

ECAGND

D3 Version : P/N : SA00001J580

EC_AVCC

+

1000P_0402_50V7K~D

1000P_0402_50V7K~D

AD3/GPIO3B
AD4/GPIO42

DA3/GPIO3F

SDIDI/GPXID0

SPIDI/RD#

SPIDO/WR#

SPICS#

AC_IN/GPIO59

GPXO10
GPXO11

ENBKL/GPXID2

GPXID3
GPXID4
GPXID5
GPXID6
GPXID7

V18R

1

C

C

473

473

E

2

CAGND

E

C_PWM

21

EEP#

B

23

PWRSHARE_EN #

26

ACOFF

27

63
64
65
66
75
76

68
70
71
72

83
84
85
86
87
88

97
98
99
109

119
120
126
128

73
74
89
90
91
92
93
95
121
127

100
101
102
103
104
105
106
107
108

110
112
114
115
116
117
118

124

C522 0.01U_0402_16V7K~DC 522 0.01U_0402_16V7K~D

C476 0.01U_0402_16V7K~DC 476 0.01U_0402_16V7K~D

BATT_TEMP
BATT_OVP

ADP_I
AD_BID
MSEN#

EC_SUB_MUTE#
EN_DFAN1
IREF

LCD_TST
USB_EN#

KSO5
TP_CLK
TP_DATA

WPAN_RADIO_OFF#
EN_WOL#
BT_OFF#
VGATE

FRD#SPI_SO
FWR#SPI_SI
SPI_CLK
FSEL#SPICS#

EC_SPK_HP_MUTE#
USB_DET_DELAY#
FSTCHG
BATT_CHG_LED#

BATT_LOW_LED#
BKLT_KB_DET#
SYSON
VR_ON
ACIN

EC_LID_OUT#

ICH_PWROK
BKOFF#
WWAN_RAD IO_OFF#
LCD_VCC_TEST_EN
CP_SEL

SLP_S4#
EC_ENBKL
BT_DET#
EC_THERM#
SUSP#

PBTN_OUT#

PS_ID

C480 1U_0603_10V6K~DC480 1 U_0603_10V6K~D

1 2

1 2
1 2

C482

C482

12

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

L

L

29

29

FBM-11-160808-601-T_0603

FBM-11-160808-601-T_0603

2

C

C

474

474

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1

L

L

30

30

FBM-11-160808-601-T_0603

FBM-11-160808-601-T_0603

E

C_PWM <35>
BEEP# <25>
PWRSHARE_EN # <30 >
ACOFF <39>

BATT_TEMP <44>
BATT_OVP <44>
ADP_I <39>

MSEN# <35>
POW_MON <43>

EC_SUB_MUTE# <25>
EN_DFAN1 <7>
IREF <39>
CHGVADJ <39>

LCD_TST <35>
USB_EN# <30>

KSO5 <32>
TP_CLK <32>

TP_DATA <32>

WPAN_RADIO_OFF# <28>

EN_WOL# <24>
BT_OFF# <30>
VGATE <11,21,43>

EC_SPK_HP_MUTE# <25>
USB_DET_DELAY# <32>
FSTCHG <39>
BATT_CHG_LED# <30>
PWRSHARE_OE# <30>
BATT_LOW_LED# <30>
BKLT_KB_DET# <32>
SYSON <28,33,42>
VR_ON <7,43>
ACIN <21,25,38,39>

EC_RSMRST# <21>
EC_LID_OUT# <21>
EC_ON <32>
BT_RADIO_OFF# <30>
ICH_PWROK <11,21>
BKOFF# <35>
WWAN_RAD IO_OFF# <27>
LCD_VCC_TEST_EN <35>

CP_SEL <39>

SLP_S4# <11,21>

BT_DET# <30>
EC_THERM# <21>
SUSP# <28,33,41,42>
PBTN_OUT# <2 1>
PS_ID <38>

12

12

ECAGND
ECAGND

3VALW

+

R03 add

R333

R333

15_0402_5%

15_0402_5%

SPI_CLK_R

12

1

R03 add

2

SPI Flash (16Mb*1)

R331

R331
15_0402_5%

FSEL#SPICS#

15_0402_5%

1 2

R332

R332
15_0402_5%

15_0402_5%

+

R

Rb

VCC

Ra

Board ID

0

1

2

3

4

5

3VALW

a

1 2

12

R

R

311

311

100K_0402_5%

100K_0402_5%

A

D_BID

312

312

R

R
33K_0402_5%

33K_0402_5%

3.3V+/-5%

100K

Rb

0 +/- 5%

8.2K+/- 5%

18K +/- 5%

33K +/- 5%

56K +/- 1%

100K +/- 1%

R10 add

B

oard ID

*

Follow the suggestion of EC team to
follow JAT10 setting.

@

@

C1539

C1539
22P_0402_50V8J~D

22P_0402_50V8J~D

SPI_CLK_R

SPI_CS#

12

SPI_SOFRD#SPI_SO

EC_ENBKL

100K_0402_5%

100K_0402_5%

R02 Delete

@

@

R330

R330

12

0_0402_5%

0_0402_5%

20mils

U20

U20

1

CS#

2

SO

3

WP#

4

GND

MX25L1605AM2C-12G_SO8~D

MX25L1605AM2C-12G_SO8~D

R383

R383

10K_0402_5%

10K_0402_5%

+SPI_R

C483

12

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

R329

R329

12

VCC

HOLD#

SCLK

SI

R422

R422

1 2

0_0402_5%

0_0402_5%

@C483

@

8
7
6
5

1

C

C

477

477

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

0.6V~1.6V

0 V

0.250V

0.503V

0.819V

1.185V

1.650V

+3VALW

2

1

SPI_CLK_R

GMCH_ENBKL <12>

C484

C484

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

R334

R334
15_0402_5%

15_0402_5%

FWR#SPI_SISPI_SI

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

BIOS & EC I/O Port

BIOS & EC I/O Port

BIOS & EC I/O Port

LA-5152P

LA-5152P

LA-5152P

31 51Monday, June 15, 2009

31 51Monday, June 15, 2009

31 51Monday, June 15, 2009

A00

A00

A00

http://mycomp.su/x/

A

ower Button Circuit

P

T

o power board

R

R

896

896

200_0402_5%

200_0402_5%

P

1 2

+

5VALW

WR_BTN_LED#<31>

P

1 1

D30

D30

1

PESD24VS2UT_SOT23-3~D

PESD24VS2UT_SOT23-3~D

WR_LED+

P

WR_BTN_LED#

P

WR_ON-OFF_BTN#

PWR_ON-OFF_BTN#

3

2

J

J

PBTN1

PBTN1

1

1

2

2

3

3

G

5

4

6

4

G

MOLEX_53261-0471

MOLEX_53261-0471

CONN@

CONN@

5
6

EC_ON<31>

Place close JPBTN1

R02 add

2 2

USB_DETECT#<30>

RTCVREF RTCV REF RTCVREF RTCVR EF

USB_DETECT#

10K_0402_1%

10K_0402_1%

R1007

R1007

12

2.2U_0603_10V6K~D

2.2U_0603_10V6K~D

R02 modify

C964

C964

12

220K_0402_1%

220K_0402_1%

R1008

R1008

12

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

12

D46

D46

U44

TC7SZ14FU_SSOP5~D

TC7SZ14FU_SSOP5~D

U44

Power share

3 3

Keyboard back light

+5VS

Q38

B+_BIAS

EN_KBL#<31>

4 4

2

G

G

1U_0603_10V6K~D

300K_0402_5%

300K_0402_5%

R

R

C928

C928

928

928

1 2

EN_KBL

13

D

D

Q40

Q40
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

S

S

A

D

D

6

S

S

1

2

45

2

20mil

1

G

G

3

R931

R931

2M_0402_5%

2M_0402_5%

1 2

Q38

SI3456BDV-T1-E3_TSOP6~D

SI3456BDV-T1-E3_TSOP6~D

1U_0603_10V6K~D

@

@

F1

F1

0.75A_24V_1812L075-24DR

0.75A_24V_1812L075-24DR

12

1 2

R929 0_0805_5%R929 0_0805_5%

KB_BL_PWM#<31>

B

P

WR_ON-OFF_BTN#

BAT54C-7-F_SOT23-3~D

BAT54C-7-F_SOT23-3~D

EC_ON

12

R337

R337
10K_0402_5%

10K_0402_5%

1

2

5

1

P

NC

2

4

Y

A

G

3

D47

D47

12

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

+5VS_KBL

BKLT_KB_DET

2

G

G

B

D

D

1

R336

R336

1 2

0_0402_5%

0_0402_5%

CLOSE TO U44

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

@

@

C963

C963

100K_0402_5%

100K_0402_5%

12

R1009

R1009

20mil

12

R930

R930
100K_0402_5%

100K_0402_5%

BKLT_KB_DET

KB_BL_PWM

20mil

13

D

D

Q41

Q41
MMBF170LT1G_SOT23-3~D

MMBF170LT1G_SOT23-3~D

S

S

20mil

3VALW

+

1 2

11

11

2

3

13

D

D

2

G

G

S

S

13

D

D

Q44

Q44

2

G

2N7002_SOT23-3~D

G

2N7002_SOT23-3~D

S

S

USB_DET_DELAY#

+3VS

2

G

G

+5VS_KBL

JKBL1

JKBL1

1
2
3

TYCO_2041084-4

TYCO_2041084-4

CONN@

CONN@

100K_0402_5%

100K_0402_5%

R335

R335

5

1ON#

Q6

Q6
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

51ON#

12

13

1
2
3

GND

44GND

51ON# <38>

USB_DET_DELAY# <31>

R927

R927
10K_0402_5%

10K_0402_5%

BKLT_KB_DET#

D

D

Q39

Q39
MMBF170LT1G_SOT23-3~D

MMBF170LT1G_SOT23-3~D

S

S

5
6

N_OFF <31>

O

5

1ON# <38>

BKLT_KB_DET# <31>

C

NT_KB_Conn.1

I

SI[0..7]<31>

K

SO[0..18]<31>

K

Touch Screen Connector

1

2

3

J

J

KB1

KB1

30

0

3

K

SI7

29

2

SI6
SI4
SI2
SI5
SI1
SI3
SI0
SO5
SO4
SO7
SO6
SO8

USBP9-

USBP9+

28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

+3VS

9
8
7
6
5
4
3
2
1

9

2

8

2

7

2

6

2

5

2

4
3

2

2

2
2

1
0

2
1

9

1

8
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

JAE_FL4S030HB3R3000

JAE_FL4S030HB3R3000

CONN@

CONN@

K
K

CH4

CH3

K
K
K
K
K
K
K
K
K
K
KSO3
KSO1
KSO2
KSO0
KSO12
KSO16
KSO15
KSO13
KSO14
KSO9
KSO11
KSO10
KSO17
KSO18

4

5

Vp

6

K

SI[0..7]

K

SO[0..18]

D36

D36

CH1

Vn

CH2

CM1293-04SO_SOT23-6@

CM1293-04SO_SOT23-6@

D

32

ND

G

31

G

ND

K

SI0

C

485 100P_0402_50V8J~D@C485 100P_0402_50V8J~D@

SI1

K

C

487 100P_0402_50V8J~D@C487 100P_0402_50V8J~D@

K

SI2

489 100P_0402_50V8J~D@C489 100P_0402_50V8J~D@

C

K

SI3

C

491 100P_0402_50V8J~D@C491 100P_0402_50V8J~D@

K

SI4

C

493 100P_0402_50V8J~D@C493 100P_0402_50V8J~D@

KSI5

C495 100P_0402_50V8J~D@ C495 1 00P_0402_50V8J~D@

KSI6

C497 100P_0402_50V8J~D@ C497 1 00P_0402_50V8J~D@

KSI7

C499 100P_0402_50V8J~D@ C499 1 00P_0402_50V8J~D@

KSO0

C501 100P_0402_50V8J~D@ C501 1 00P_0402_50V8J~D@

KSO1

C503 100P_0402_50V8J~D@ C503 1 00P_0402_50V8J~D@

KSO2

C505 100P_0402_50V8J~D@ C505 1 00P_0402_50V8J~D@

KSO3

C507 100P_0402_50V8J~D@ C507 1 00P_0402_50V8J~D@

KSO4

C509 100P_0402_50V8J~D@ C509 1 00P_0402_50V8J~D@

KSO5

C511 100P_0402_50V8J~D@ C511 1 00P_0402_50V8J~D@

R03 modify

+3VS

USBP9-<22>
USBP9+<22>

R935 0_0402_5%R935 0_0402_5%

1 2

VBUS

USBP9-

USBP9+

Place close JTCH1

Touch PAD/B Conn.

+HALL_VCC

+3VALW

1 2

R933 0_0402_5%R933 0_0402_5%

R934 10K_0402_5%R934 10K_0402_5%

1

C521

C521

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

1 2

LID_SW#

+5VS

1

2

R10:change to DELL AVL part.

Cap Sensor

L77 BLM18AG601SN1D_0603~DL77 BLM18AG601SN1D_0603~D

EC_FB_SDATA<31>

EC_FB_SCLK<31>

C959

C959
33P_0402_50V8J~D

33P_0402_50V8J~D

FB_SDATA

1 2

FB_SCLK

1 2

C960

C960
33P_0402_50V8J~D

33P_0402_50V8J~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

1 2

L78 BLM18AG601SN1D_0603~DL78 BLM18AG601SN1D_0603~D

1 2

D

TP_CLK<31>
LID_SW#<31>
TP_DATA<31>

C512

C512

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

R10:change to DELL AVL part.

D1504

PESD5V2S2UT_SOT23-3~D

PESD5V2S2UT_SOT23-3~D

D1504

TOUCHKEY_TINT<31>

E

K

SO6

C

486 100P_0402_50V8J~D@C486 100P_0402_50V8J~D@

SO7

K

C

488 100P_0402_50V8J~D@C488 100P_0402_50V8J~D@

K

SO8

490 100P_0402_50V8J~D@C490 100P_0402_50V8J~D@

C

K

SO9

C

492 100P_0402_50V8J~D@C492 100P_0402_50V8J~D@

K

SO10

C

494 100P_0402_50V8J~D@C494 100P_0402_50V8J~D@

KSO11

C496 100P_0402_50V8J~D@ C496 1 00P_0402_50V8J~D@

KSO12

C498 100P_0402_50V8J~D@ C498 1 00P_0402_50V8J~D@

KSO13

C500 100P_0402_50V8J~D@ C500 1 00P_0402_50V8J~D@

KSO14

C502 100P_0402_50V8J~D@ C502 1 00P_0402_50V8J~D@

KSO15

C504 100P_0402_50V8J~D@ C504 1 00P_0402_50V8J~D@

KSO16

C506 100P_0402_50V8J~D@ C506 1 00P_0402_50V8J~D@

KSO17

C508 100P_0402_50V8J~D@ C508 1 00P_0402_50V8J~D@

KSO18

C510 100P_0402_50V8J~D@ C510 1 00P_0402_50V8J~D@

For EMI

JTCH1

JTCH1

1

1

2

2

3

3

4

4

5

5

6

6

7

7

8

8

JST_SM08B-SURS-TF(LF)(SN)~D

JST_SM08B-SURS-TF(LF)(SN)~D

CONN@

CONN@

TP_CLK
LID_SW#
TP_DATA
+HALL_VCC

PESD5V2S2UT_SOT23-3~D

PESD5V2S2UT_SOT23-3~D

D1505

D1505

2

3

1

TOUCHKEY_TINT

10

G2

G1

9

3

1

2

R1003

R1003

1 2

0_0402_5%

0_0402_5%

100P_0402_50V8J~D

100P_0402_50V8J~D

C513

C513

+5VS +3VS

FB_SDATA
FB_SCLK

+3VS

1

C927

C927

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

100P_0402_50V8J~D

100P_0402_50V8J~D

C514

C514

1

1

2

2

JTP1

JTP1

1

1

2

2

3

3

4

4

5

5

G1

6

6

G2

TYCO_2041084-6

TYCO_2041084-6

CONN@

CONN@

JCAP1

JCAP1

6

6

5

5

4

4

3

3

2

2

1

1

TYCO_2041084-6

TYCO_2041084-6

CONN@

CONN@

7
8

8

G2

7

G1

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWROK/BTN/KB/Touch Pad

PWROK/BTN/KB/Touch Pad

PWROK/BTN/KB/Touch Pad

LA-5152P

LA-5152P

LA-5152P

E

32 51Monday, June 15, 2009

32 51Monday, June 15, 2009

32 51Monday, June 15, 2009

A00

A00

A00

http://mycomp.su/x/

A

B

C

D

E

+3VALW to +3VS Transfer

+

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

Q7

Q7

3VALW

1

C

C

515

515

2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

12

R340

R340
2M_0402_5%

2M_0402_5%

Q

Q

50

50

SI4392DY-T1-E3_SO8~D

SI4392DY-T1-E3_SO8~D

8
7

5

4

3

VS_GATE

1

2

B

+_BIAS

12

R

R

338

338

300K_0402_5%

1 1

300K_0402_5%

SUSP

13

D

D

2

G

G

S

S

+

3VS

3
2
16

1

2

C524

C524

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

B

343

343

R

R

300K_0402_5%

300K_0402_5%

2

G

G

+_BIAS

12

13

D

D

S

S

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

10U_0805_10V4Z~D

10U_0805_10V4Z~D

1

C516

C516

C517

C517

2

SUSP

5VALW to +5VS Transfer

+

5VALW

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

Q8

Q8

+

1

518

518

C

C

2

10U_0805_10V4Z~D

10U_0805_10V4Z~D

4

.4A

Q

Q

5

5

SI4800BDY-T1-E3_SO8~D

SI4800BDY-T1-E3_SO8~D

8
7

5

4

VS_GATE

5

1

C525

C525

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

2

+

1.5V to +1.5VS Transfer

5VS

+

1
2
36

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

10U_0805_10V4Z~D

10U_0805_10V4Z~D

C519

C519

C520

C520

1

1

2

2

SUSP

2

G

G

B

+_BIAS

12

344

344

R

R
470K_0402_5%

470K_0402_5%

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

13

D

D

S

S

+

Q

Q

1.5V

45

45

SI4392DY-T1-E3_SO8~D

SI4392DY-T1-E3_SO8~D

8
7

5

12

R346

R346

Q10

Q10

2M_0402_5%

2M_0402_5%

3
2
16

4

1

C532

C532
470P_0402_50V7K~D

470P_0402_50V7K~D

2

+

1.5VS

20K_0402_5%

20K_0402_5%

10U_0805_10V4Z~D

10U_0805_10V4Z~D

12

R345

R345

C531

C531

1

2

R03 Modify

+3VALW

12

R354

R354

100K_0402_5%

SYSON<28,31,42>

SUSP#<28,31,41,42>

SYSON#<23>

100K_0402_5%

SYSON

SUSP#

R361

R361

10K_0402_5%

10K_0402_5%

SYSON#

R355

R355
10K_0402_5%

10K_0402_5%

1 2

1 2

13

D

D

2

G

G

S

S

+5VALW

12

13

D

D

2

G

G

S

S

Q16

Q16
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

R360

R360
100K_0402_5%

100K_0402_5%

SUSP

Q21

Q21
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

Discharge Circuit

+1.5V

12

R353

R353
470_0402_5%

470_0402_5%

13

D

SYSON#

D

Q15

Q15

2

G

SSM3K7002FU_SC70-3~D

G

SSM3K7002FU_SC70-3~D

S

S

R03 Delete +3V_WLAN discharge circuit.

SUSP

SUSP

+1.05V_VCCP

12

13

D

D

2

G

G

S

S

R352

R352
470_0402_5%

470_0402_5%

Q12

Q12
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

SUSP

2

G

G

+0.75VS

12

R358

R358
470_0402_5%

470_0402_5%

13

D

D

S

S

Q19

Q19
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

+5VS

12

R359

R359
470_0402_5%

470_0402_5%

13

D

SUSP S USP

D

2

G

G

S

S

Q20

Q20
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

2

G

G

+3VS

12

470_0402_5%

470_0402_5%

13

D

D

S

S

R356

R356

Q17

Q17
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

2 2

3 3

4 4

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

DC/DC Circuits

DC/DC Circuits

DC/DC Circuits

LA-5152P

LA-5152P

LA-5152P

33 51Monday, June 15, 2009

33 51Monday, June 15, 2009

33 51Monday, June 15, 2009

E

A

B

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

D

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

A00

A00

A00

http://mycomp.su/x/

5

F

F
FIDUCAL

FIDUCAL

@

@

D D

H2

H_1P6N

HOLEA@H2HOLEA@

F

F

D1

D1

FIDUCAL

FIDUCAL

@

@

1

1

F

F

D3

D2

D2

D3

FIDUCAL

FIDUCAL

@

@

1

1

F

F
FIDUCAL

FIDUCAL

@

@

4

D4

D4

1

3

2

1

C C

B B

H_2P6

H_3P0

H_3P2

H_4P0

H_3P0X4P0

H7
HOLEA@H7HOLEA@

H17

H17
HOLEA@

HOLEA@

H3
HOLEA@H3HOLEA@

H25

H25
HOLEA@

HOLEA@

H29

H29
HOLEA@

HOLEA@

H6
HOLEA@H6HOLEA@

1

H11

H8
HOLEA@H8HOLEA@

1

H18

H18
HOLEA@

HOLEA@

1

H4
HOLEA@H4HOLEA@

1

H26

H26
HOLEA@

HOLEA@

1

1

1

H9
HOLEA@H9HOLEA@

1

1

1

H27

H27
HOLEA@

HOLEA@

1

H19

H19
HOLEA@

HOLEA@

1

H22

H22
HOLEA@

HOLEA@

1

H28

H28
HOLEA@

HOLEA@

1

1

H10

H10
HOLEA@

HOLEA@

H5
HOLEA@H5HOLEA@

H11

H12

H12

HOLEA@

HOLEA@

HOLEA@

HOLEA@

1

1

H21

H21
HOLEA@

HOLEA@

1

1

H23

H23
HOLEA@

HOLEA@

1

1

H14

H14
HOLEA@

HOLEA@

H24

H24
HOLEA@

HOLEA@

H15

H15

H16

H16

HOLEA@

HOLEA@

HOLEA@

HOLEA@

1

1

H35

H35
HOLEA@

HOLEA@

1

1

H36

H36
HOLEA@

HOLEA@

1

1

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: S heet o f

Date: S heet o f

3

2

Date: S heet o f

Compal Electronics, Inc.

Screw

Screw

Screw

LA-5152P

LA-5152P

LA-5152P

A00

A00

34 51Monday, June 15 , 2009

34 51Monday, June 15 , 2009

34 51Monday, June 15 , 2009

1

A00

http://mycomp.su/x/

5

R T

C

V

GA_CRT_R<12>

D D

C C

V

V

GA_CRT_G<12>

VGA_CRT_B<12>

CRT_DDC_DATA<12>

CRT_DDC_CLK<12>

GA_CRT_R

V

GA_CRT_G

VGA_CRT_B

1 2

R

R

893 0_0603_5%

893 0_0603_5%

1 2

R

R

894 0_0603_5%

894 0_0603_5%

1 2

R895 0_0603_5%R895 0_0603_5%

+3VS +3VS +3V S

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

2.2K_0402_5%

R370

R370

R369

R369

1 2

1 2

G

G

S

S

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

G

G

2

13

D

S

D

S

Q23

Q23
SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

150_0402_1%

150_0402_1%

R366

R366

12

2

Q22

Q22

13

D

D

150_0402_1%

150_0402_1%

150_0402_1%

150_0402_1%

R367

R367

12

12

+CRT_VCC +CRT_VCC

2K_0402_5%

2K_0402_5%

1 2

R368

R368

1

2

R371

R371

1 2

CRT_DDC_DATA_C

CRT_DDC_CLK_C

4

31 BLM18BB050SN1D_0 603~D

31 BLM18BB050SN1D_0 603~D

L

L

1 2

L

L

32 BLM18BB050SN1D_0 603~D

32 BLM18BB050SN1D_0 603~D

1 2

L

L

33 BLM18BB050SN1D_0 603~D

33 BLM18BB050SN1D_0 603~D

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

22P_0402_50V8J

@

@

@

@

C538

C538

C537

C537

1

2

2K_0402_5%

2K_0402_5%

R372

R372

1 2

22P_0402_50V8J

22P_0402_50V8J

@

@

C539

C539

1

2

For EMI

CRT_HSYNC_R<12>

CRT_VSYNC_R<12>

C

RT_R_L

C

RT_G_L

CRT_B_L

74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

@D14

@

DAN217_SC59-3

DAN217_SC59-3

3VS

+

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

1

2

C545

C545

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

CRT_HSYNC_R

C546

C546

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

CRT_VSYNC_R

D

14

1

2

3

C540

C540

+CRT_VCC

U26

U26

+CRT_VCC

5

A2Y

3

5

A2Y

3

3

D

15

@D15

@

DAN217_SC59-3

DAN217_SC59-3

1

2

1

P

OE#

G

1

P

OE#

G

U27

U27
74AHCT1G125GW_SOT353-5

74AHCT1G125GW_SOT353-5

@D16

@

1

2

3

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

C541

C541

4

4

4.7P_0402_50V8C~D

4.7P_0402_50V8C~D

1

2

R373

R373

1 2

10K_0402_5%

10K_0402_5%

D

16

DAN217_SC59-3

DAN217_SC59-3

1

2

3

C542

C542

2

+

5VS

M

SEN#<31>

CRT_DDC_CLK_C

D_CRT_HSYNC HSYNC_L

D_CRT_VSYNC

1 2

1 2

R1543

R1543

0_0603_5%

0_0603_5%

R1544

R1544

0_0603_5%

0_0603_5%

02 Modify

R

M

SEN#

C

RT_R_L

C

RT_DDC_DATA_C
RT_G_L

C

HSYNC_L
CRT_B_L

VSYNC_L

100P_0402_50V8J~D

100P_0402_50V8J~D

C543

C543

VSYNC_L

15P_0402_50V8J

15P_0402_50V8J

C547

C547

1

2

17

17

D

D

2 1
3

C

C

N

N

RB491D_SC59-3~D

RB491D_SC59-3~D

100P_0402_50V8J~D

100P_0402_50V8J~D

C544

C544

1

1

2

2

15P_0402_50V8J

15P_0402_50V8J

C548

C548

1

2

1

+

CRT_VCC

W

=40milsW=40mils

02 memo modify

R

1

C

C

535

535

1U_0603_10V6K~D

1U_0603_10V6K~D

2

CRT1

CRT1

J

J

6

1

1
1
7
2

1

2
8

13

3
9

14

4
10
15

5

TYCO_1775763-2

TYCO_1775763-2

CONN@

CONN@

16

G

G

17

G

G

JAE_FI-G40SB-VF25-DT

JAE_FI-G40SB-VF25-DT

+LCDVDD +5VALW

R376

R376
100_0603_5%

L C D

B B

12.30 modify it

GM_ENVDD<12>

LCD_VCC_TEST_EN<31>

BKOFF#< 31>

A A

GM_ENVDD

LCD_VCC_TEST_EN

BKOFF# DISPOFF#

5

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

D37

D37

2

3

BAT54C-7-F_SOT23-3~D

BAT54C-7-F_SOT23-3~D

+3VS

12

D19

D19

1 2

SDMK0340L-7-F_SOD323-2~D

SDMK0340L-7-F_SOD323-2~D

1

R382

R382

4.7K_0402_5%

4.7K_0402_5%

100_0603_5%

1 2
13

D

D

Q24

Q24

S

S

12

R380

R380
10K_0402_5%

10K_0402_5%

R377

R377
47K_0402_5%

47K_0402_5%

1 2

R378

R378

2

G

G

13

D

D

2

G

G

S

S

VGA_PWM<12>

EC_PWM<31>

12

56K_0402_5%

56K_0402_5%

Q26

Q26
BSS138_SOT23~D

BSS138_SOT23~D

4

W=60mils

+3VS

S

S

G

G

2

D

D

1 3

0.1U_0402_16V4Z~D

0.1U_0402_16V4Z~D

C549

C549

1

2

+LCDVDD

1

@

@

C550

C550

4.7U_0805_10V4Z~D

4.7U_0805_10V4Z~D

2

+3VS +3VS

5

U45

U45

1

P

INA

O

2

INB

G

3

74AHC1G32GW_SOT353-5~D

74AHC1G32GW_SOT353-5~D

R944

@R944

@

0_0402_5%

0_0402_5%

R945

@R945

@

0_0402_5%

0_0402_5%

Q25

Q25
SI2301BDS-T1-E3_SOT23-3~D

SI2301BDS-T1-E3_SOT23-3~D

+LCDVDD

1

C551

C551

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

2

12

R394

@R394

@

10K_0402_5%

10K_0402_5%

4

12

12

INVT_PWM

W=60mils

@

@

R384

R03: Add

W=40mils

B+

100K_0402_5%

100K_0402_5%

12

1000P_0402_50V7K~D

1000P_0402_50V7K~D

1

C1546

C1546

2

PWR_SRC_ONPWR_SRC_ON

100K_0402_5%

100K_0402_5%

12

+LCDVDD

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

13

D

D

2

G

G

S

S

3

R384

1 2

0_0805_5%

0_0805_5%

Q202

Q202
SI3457BDV-T1-E3_TSOP6~D

SI3457BDV-T1-E3_TSOP6~D

D

D

6

S

S

4 5

2
1

G

G

R1555

R1555

3

R1556

R1556

Q203

Q203
2N7002W-7-F_SOT323-3~D

2N7002W-7-F_SOT323-3~D

+INV_PWR_SRC

W=60mils

1

C1545

C1545

0.1U_0603_50V4Z~D

0.1U_0603_50V4Z~D

2

LCD_TST<31>

LVDS_DDC_CLK<12>

LVDS_DDC_DATA<12>

@

@

C1541 5P_0402_50V8C

C1541 5P_0402_50V8C

12

C1542 5P_0402_50V8C

C1542 5P_0402_50V8C

12

@

@

R03: Reserve for EMI
Place close to JLVDS1

@

@

C1544 5P_0402_50V8C

C1544 5P_0402_50V8C

12

C1543 5P_0402_50V8C

C1543 5P_0402_50V8C

12

@

@

2

R374 0_0402_5%R374 0_0402_5%
R375 0_0402_5%R375 0_0402_5%

DELL CONFIDENTIAL/PROPRIETARY

+LCDVDD

+3VS

12
12

LVDS_A0-<12>
LVDS_A0+<12>

LVDS_A1-<12>

LVDS_A1+<12>

LVDS_A2-<12>
LVDS_A2+<12>

LVDS_ACLK-< 12>

LVDS_ACLK+<12>

LVDS_B0-<12>
LVDS_B0+<12>

LVDS_B1-<12>

LVDS_B1+<12>

LVDS_B2-<12>
LVDS_B2+<12>

LVDS_BCLK-< 12>

LVDS_BCLK+<12>

+INV_PWR_SRC

LCD_TST
EDID_CLK_LCD

EDID_DATA_LCD
LVDS_A0­LVDS_A0+

LVDS_A1­LVDS_A1+

LVDS_A2­LVDS_A2+

LVDS_ACLK-

LVDS_ACLK­LVDS_ACLK+

LVDS_B0­LVDS_B0+

LVDS_B1­LVDS_B1+

LVDS_B2­LVDS_B2+

LVDS_BCLK-

LVDS_BCLK­LVDS_BCLK+

INVT_PWM
DISPOFF#

W=60mils

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

CRT / LVDS CONN

CRT / LVDS CONN

CRT / LVDS CONN

LA-5152P

LA-5152P

LA-5152P

40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10

9
8
7
6
5
4
3
2
1

JLVDS1

JLVDS1

CONN@

CONN@

1

51

40

G11

50

39

G10

49

38

G9

48

37

G8

47

36

G7

46

35

G6

45

34

G5

44

33

G4

43

32

G3

42

31

G2

41

30

G1
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1

A00

A00

35 51Monday, June 15, 2009

35 51Monday, June 15, 2009

35 51Monday, June 15, 2009

A00

http://mycomp.su/x/

5

ecommended Equalization: [PC1,PC0]=01, 4dB

R

D D

0_0402_5%

0_0402_5%

HDMI_OE#

C C

+3VS

B B

HDMI_SCL_SINK

HDMI_SDA_SINK

HDMI_HPD_SINK

R1502 4.7K_0402_1%R1502 4.7K_0402_1%

1 2

R1526 0_0402_5%

R1526 0_0402_5%

X76@

X76@

R1527 0_0402_5%

R1527 0_0402_5%

X76@

X76@

HDC_CLK_P_C<12>
HDC_CLK_N_C<12>

HDC_DATA_P2_C<12>
HDC_DATA_N2_C<12>

HDC_DATA_P1_C<12>
HDC_DATA_N1_C<12>

HDC_DATA_P0_C<12>
HDC_DATA_N0_C<12>

UMA use

X76@

X76@

R1524

R1524

12

12

+

3VS

0_0402_5%

0_0402_5%

12

X76@

X76@

R1523

R1523

@

@

R1500 4.7K_ 0402_1%

R1500 4.7K_ 0402_1%

12

R1501 4.7K_ 0402_1%R1501 4.7K_0402_1%

25

OE#

28

SCL_SINK

29

SDA_SINK

30

HPD_SINK

32

DDC_EN

34

CFG0

35

CFG1

48

IN_D4+

47

IN_D4-

45

IN_D3+

44

IN_D3-

42

IN_D2+

41

IN_D2-

39

IN_D1+

38

IN_D1-

1 2

1 2

HDMI_PC1

HDMI_PC0

PS8101TQFN48G_QFN48_7X7X76@

PS8101TQFN48G_QFN48_7X7X76@

4

OUT_D4+
OUT_D4-

OUT_D3+
OUT_D3-

OUT_D2+
OUT_D2-

OUT_D1+
OUT_D1-

1523

R
R1524 V

1503 4.3K 499

R
R1525 V X
R1526
R1527
R1528
R1529
U100
R1500 V X
R1516
R1511
R1512
R1513
C1513
C1514
C1515
C1516

U100

U100

2

VCC

11

VCC

15

VCC

21

VCC

26

VCC

33

VCC

40

VCC

46

VCC

4

PC1

3

PC0

6

REXT

7

HPD#

8

SDA

9

SCL

10

RT_EN#

13
14

16
17

19
20

22
23

1

GND

5

GND

12

GND

18

GND

24

GND

27

GND

31

GND

36

GND

37

GND

43

GND

49

PAD

ST

Parade

XXV

V X
V X
V X
V X
V V

V
V
V
V
V
V
V
V

HDC_HPD#

X
X
X
X
X
X
X
X

HDMI_PC1
HDMI_PC0

X76@

X76@

R1503 499_0402_1%

R1503 499_0402_1%

1 2

HDC_HPD#

X76@

X76@

R1525

R1525

12

0_0402_5%

0_0402_5%

HDMI_OUT_CLK+
HDMI_OUT_CLK-

HDMI_OUT_D2+
HDMI_OUT_D2-

HDMI_OUT_D1+
HDMI_OUT_D1-

HDMI_OUT_D0+
HDMI_OUT_D0-

+

3VS

12

X76@

X76@

R1528

R1528
20K_0402_1%

20K_0402_1%

12

X76@

X76@

R1529

R1529

7.5K_0402_1%

7.5K_0402_1%

+3VS

1

1

2

2

C1511

C1511

C1512

C1512

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

HDC_HPD# <12>

HDMI_C_DATA <11>

HDMI_C_CLK <11>

0.01U_0402_16V7K~D

0.01U_0402_16V7K~D

3

+

5VS

1225 modify it.

R1504 2.2K_0402_5%R1504 2.2K_0402_5%

1 2

R1505 2.2K_0402_5%R1505 2.2K_0402_5%

1 2

R1506 2.2K_0402_5%R1506 2.2K_0402_5%

1 2

R1520 2.2K_0402_5%R1520 2.2K_0402_5%

1 2

HDMI_OUT_D2+

HDMI_OUT_D2-

HDMI_OUT_D1+

HDMI_OUT_D1-

HDMI_OUT_D0+

HDMI_OUT_D0-

HDMI_OUT_CLK+

HDMI_OUT_CLK-

HDMI_SCL_SINK

HDMI_SDA_SINK

HDMI_C_DATA

HDMI_C_CLK

R1517 0_0402_5%@R1517 0_0402_5%@

1 2

L1504

L1504

1

1

4

4

DLW21SN900HQ2L_0805_4P~D

DLW21SN900HQ2L_0805_4P~D

1 2

R1515 0_0402_5%@R1515 0_0402_5%@

R1514 0_ 0402_5%@R1514 0_0402_5%@

1 2

L1505

L1505

1

1

4

4

DLW21SN900HQ2L_0805_4P~D

DLW21SN900HQ2L_0805_4P~D

1 2

R1507 0 _0402_5%@R1507 0_0402_5%@

R1509

R1509

1 2

L1507

L1507

1

1

4

4

DLW21SN900HQ2L_0805_4P~D

DLW21SN900HQ2L_0805_4P~D

1 2

R1508 0_0402_5%@R1508 0_0402_5%@

R1522 0_0402_5%

R1522 0_0402_5%

1 2

L1506

L1506

1

1

4

4

DLW21SN900HQ2L_0805_4P~D

DLW21SN900HQ2L_0805_4P~D

1 2

R1510

R1510

2

2

3

3

2

2

3

3

0_0402_5%

0_0402_5%

@

@

2

2

3

3

@

@

2

2

3

3

0_0402_5%@

0_0402_5%@

HDMI_OUT_D2+_CONN

HDMI_OUT_D2-_CONN

HDMI_OUT_D1+_CONN

HDMI_OUT_D1-_CONN

HDMI_OUT_D0+_CONN

HDMI_OUT_D0-_CONN

HDMI_OUT_CLK+_CONN

HDMI_OUT_CLK-_CONN

2

1

Vendor's suggestion for power saving.

+3VS+3VS

12

R1519

R1519
10K_0402_1%

10K_0402_1%

HDMI_OE#

@ R1518

@

0_1206_5%

0_1206_5%

C1517

C1517

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

1 2

+5VS

12

R1518

HDMI_SDA_SINK
HDMI_SCL_SINK

T9PADT9PAD

HDMI_OUT_CLK-_CONN

HDMI_OUT_CLK+_CONN
HDMI_OUT_D0-_CONN

HDMI_OUT_D0+_CONN
HDMI_OUT_D1-_CONN

HDMI_OUT_D1+_CONN
HDMI_OUT_D2-_CONN

HDMI_OUT_D2+_CONN

Q200

Q200

13

D

D

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

2

G

G

S

S

F1500

F1500

1.5A_6V_1206L150PR~D

1.5A_6V_1206L150PR~D

Co_Lay

1 2

HDMI_HPD_SINK
+5VS_HDMI

HDMI_HPD_SINK

LINK OK

JHDMI1

JHDMI1

19

HP_DET

18

+5V

17

DDC/CEC_GND

16

SDA

15

SCL

14

Reserved

13

CEC

12

CK-

11

CK_shield

10

CK+

9

D0-

8

D0_shield

7

D0+

6

D1-

5

D1_shield

4

D1+

3

D2-

2

D2_shield

1

D2+

FOX_QJ5119L-NVBT-7F

FOX_QJ5119L-NVBT-7F

GND
GND
GND
GND

20
21
22
23

HDMI_OUT_D2+

A A

R1516

@R1516

@

R1511

@R1511

@

R1513

@R1513

@

R1512

@R1512

@

1 2

300_0402_1%

300_0402_1%

1 2

300_0402_1%

300_0402_1%

1 2

300_0402_1%

300_0402_1%

1 2

300_0402_1%

300_0402_1%

HDMI_OUT_D2+-

HDMI_OUT_D1+- HDMI_OUT_D1-HDMI_OUT_D1+

HDMI_OUT_D0+- HDMI_OUT_D0-HDMI_OUT_D0+

HDMI_OUT_CLK+- HDMI_OUT_C LK-HDMI_OUT_CLK+

C1514

@C1514

@

C1513

@C1513

@

C1516

@C1516

@

C1515

@C1515

@

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

HDMI_OUT_D2-

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

HDMI CONN

HDMI CONN

HDMI CONN

LA-5152P

LA-5152P

LA-5152P

A00

A00

36 51Monday, June 15, 2009

36 51Monday, June 15, 2009

36 51Monday, June 15, 2009

1

A00

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

http://mycomp.su/x/

5

D D

DPB_HPD#<12>

12

R1535

R1535

7.5K_0402_5%

7.5K_0402_5%

C C

3VS

+

12

R1534

R1534

20K_0402_5%

20K_0402_5%

Q201

Q201

13

D

D

SSM3K7002FU_SC70-3~D

SSM3K7002FU_SC70-3~D

2

G

G

S

S

GCH:Level voltage 0.9V

DPB_HPDDPB_HPD

12

R1530

R1530
100K_0402_5%

100K_0402_5%

SW for MB side

C1521

C1521

0.1U_0402_10V7K~D

DPB_AUX<12>

DPB_AUX#<12>

B B

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

C1522

C1522

12

12

DPB_AUX_C
DPB_AUX#_C

4

DPB_CA_DET= 1 TMDS Signaling
DPB_CA_DET= 0 DP Signaling

U105

U105

2

1
7

SN74CBTD3306CPW R_TSSOP8~D

SN74CBTD3306CPW R_TSSOP8~D

1A

VCC
2A51B
1OE#

GND

2OE#

8
3
6

2B

4

+5VS

C1518

C1518

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

12

DPB_AUX_SW
DPB_AUX#_SW

3

P

lace close JDP1

D

D

150

@

150

D

PB_LANE_P0_C

D

PB_LANE_N0_C

DPB_LANE_N1_C DPB_LANE_N1_C

DPB_LANE_P2_C DPB_LANE_P2_C

DPB_LANE_N2_C DPB_LANE_N2_C

DPB_LANE_P3_C DPB_LANE_P3_C

DPB_LANE_N3_C DPB_LANE_N3_C

R1553 100K_0402_ 5%R1553 100K_0402_5%

1 2

R1554 100K_0402_ 5%R1554 100K_0402_5%

1 2

1

2

4

5

3

1

2

4

5

3

RCLAMP0524P.TCT~D

RCLAMP0524P.TCT~D

R03 modify it.

@

8

8

RCLAMP0524P.TCT~D

RCLAMP0524P.TCT~D

D151

@8D151

@

8

+3VS

D

1

0

D

9

DPB_LANE_P1_CDPB_LANE_P1_C

7

6

10

9

7

6

PB_LANE_P0_C

PB_LANE_N0_C

2

+3VS

1.5A_6V_1206L150PR~D

1.5A_6V_1206L150PR~D

F1501

F1501

1 2

DPB_LANE_P0_C<12>

DPB_LANE_N0_C<12>
DPB_LANE_P1_C<12>

DPB_LANE_N1_C<12>
DPB_LANE_P2_C<12>

DPB_LANE_N2_C<12>
DPB_LANE_P3_C<12>

DPB_LANE_N3_C<12>

R416 5.1M_0402_5%R416 5.1M_0402_5%

R1531 1M_0402_5%R1531 1M_0402_5%

12

12

DPB_LANE_P0_C

DPB_LANE_N0_C
DPB_LANE_P1_C

DPB_LANE_N1_C
DPB_LANE_P2_C

DPB_LANE_N2_C
DPB_LANE_P3_C

DPB_LANE_N3_C
DPB_CA_DET
DISP_CEC
DPB_AUX_SW

DPB_AUX#_SW
DPB_HPD

+3VS_DP2

C573 22U_0805_6.3V6M~DC573 22U_0805_6.3V6M~D

1

2

1

@

@

0_1206_5%

0_1206_5%

12

R1521

R1521

CO_Lay

JDP1

JDP1

1

LANE0_P

LANE0_P

2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19
20

21
22
23

C572 0.1U_0402_10V7K~DC572 0.1U_0402_10V7K ~D

24

1

2

GND

GND

LANE0_N

LANE0_N

LANE1_P

LANE1_P

GND

GND

LANE1_N

LANE1_N

LANE2_P

LANE2_P

GND

GND

LANE2_N

LANE2_N

LANE3_P

LANE3_P

GND

GND

LANE3_N

LANE3_N

CONFIG1

CONFIG1

CONFIG2

CONFIG2

AUXCH_P

AUXCH_P

GND

GND

AUXCH_N

AUXCH_N

HPD

HPD

RETURN

RETURN

DP_PWR

DP_PWR

GROUND

GROUND

FOX_3V102P1-RB2BT-8F

FOX_3V102P1-RB2BT-8F

U106

HDMI_B_CLK<11>
HDMI_B_DATA<11>

+3VS

R1533

R1533

1 2

2.2K_0402_5%

2.2K_0402_5%
R1532

R1532

1 2

2.2K_0402_5%

2.2K_0402_5%

A A

HDMI_B_CLK
HDMI_B_DATA

HDMI_B_CLK

HDMI_B_DATA

1225 modify it.

U106

2

1A

VCC

2A51B

1

1OE#

7

GND

2OE#

SN74CBTD3306CPW R_TSSOP8~D

SN74CBTD3306CPW R_TSSOP8~D

DPB_CA_DET#

+5VS

8
3
6

2B

4

4

NC7SZ04P5X_NL_SC70-5~D

NC7SZ04P5X_NL_SC70-5~D

U107

U107

+3VS

1

NC

C1519

C1519

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

1 2

C1520

C1520

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

12

5

P

DPB_CA_DET

A2Y

G

3

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

Display Port

Display Port

Display Port

LA-5152P

LA-5152P

LA-5152P

A00

A00

37 51Monday, June 15, 2009

37 51Monday, June 15, 2009

37 51Monday, June 15, 2009

1

A00

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

http://mycomp.su/x/

5

4

3

2

1

5VALW

+

A

DPIN

7

7

6

6

5

D D

C C

B B

A A

5

4

4

3

3

2

2

1

1

MOLEX_87438-0743

MOLEX_87438-0743

PJPDC1

@PJPDC1

@

RTCVREF

C13

C13
P

P

12

12

PL2

PL2

BLM18BD102SN1D_0603~D

BLM18BD102SN1D_0603~D

BATT+

CHGRTCP

100K_0402_5%~D

100K_0402_5%~D

22K_0402_5%~D

22K_0402_5%~D

1 2

51ON#<32>

PU3

PU3

3

OUT

12

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

4

5/3+

5

1

IN

MAX1615_#SHDN

5

#SHDN

GND

MAX1615EUK+_SOT23-5~D

MAX1615EUK+_SOT23-5~D

2

12

PD3

PD3

12

RLS4148_LL34-2

RLS4148_LL34-2

12

PR11

PR11

PR12

PR12

MAX1615_IN

DOCK_PSIDPSID

1 2

PR14 0_0402_5%~DPR14 0_0402_5%~D

PC3

PC3

PC2

PC2

100P_0402_50V8J~D

100P_0402_50V8J~D

PJP1

PJP1
JUMP_43X118@

JUMP_43X118@

112

12

PC11

PC11

0.22U_1206_25V7K

0.22U_1206_25V7K

1000P_0402_50V7K~D

1000P_0402_50V7K~D

2

2

12

PC14

PC14
1U_0805_25V4Z~D

1U_0805_25V4Z~D

4

12

12

PC4

PC4

100P_0402_50V8J~D

100P_0402_50V8J~D

VIN

1 2
12

PQ1

PQ1

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

13

32.8

32.8
12

SMB3025500YA_2P

SMB3025500YA_2P

1 2

PC5

PC5

1000P_0402_50V7K~D

1000P_0402_50V7K~D

PD2

PD2

RLS4148_LL34-2

RLS4148_LL34-2

PR10

PR10
68_1206_5%~D

68_1206_5%~D

PC12

PC12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

P

P

L1

L1

PC6

PC6

12

PR208

PR208
68_1206_5%~D

68_1206_5%~D

12

PR13

PR13
200_0805_5%

200_0805_5%

12

100P_0402_50V8J~D

100P_0402_50V8J~D

V

IN

2

P

R15 0_0402_5%~D@PR15 0_0402_5%~D@

1 2

P

P

Q2

Q2

FDV301N_NL_SOT23-3~D

PC193

PC193

2200P_0402_50V7K~D

2200P_0402_50V7K~D

@

@

VinDe_IN3N41

VinDe_Ref

PC191

@PC191

@

FDV301N_NL_SOT23-3~D

D

D

1 3

2

B

B

E

E

1 2

PR202

PR202
1M_0402_1%~D@

1M_0402_1%~D@

1 2

3

2

PR201

@PR201

@

10K_0402_5%~D

10K_0402_5%~D

Vin Detector

D

12

PC7

PC7

1000P_0402_50V7K~D

1000P_0402_50V7K~D

VS

OCK_PSID

2

1

PC194

PC194

@

@

3

@

@

PD5

PD5
SM24_SOT23

SM24_SOT23

12

.1U_0402_16V7K~D

.1U_0402_16V7K~D

5

6

PR18

PR18

100K_0402_1%~D

100K_0402_1%~D

PR20

PR20

15K_0402_1%~D

15K_0402_1%~D

VIN

PR206

PR206

@

@

19.6K_0402_1%~D

19.6K_0402_1%~D

8

+

-

4

1 2

1 2

12

PR191

@PR191

@

82.5K_0402_1%~D

82.5K_0402_1%~D

PR193

PR193
22K_0402_1%~D@

22K_0402_1%~D@

1 2

12

12

1000P_0402_50V7K~D

1000P_0402_50V7K~D

PU17B

@ PU17B

@

P

7

O

G

LM393DR_SO8

LM393DR_SO8

33_0402_5%~D

33_0402_5%~D

S

S

1 2

G

G

2

C

C

PQ3

PQ3
MMST3904-7-F_SOT323~D

MMST3904-7-F_SOT323~D

3 1

PR204

@PR204

@

56K_0402_5%~D

56K_0402_5%~D

1 2

VS

12

PC192

PC192

@

@

8

@

@

PU17A

PU17A

P

0.01U_0402_25V7K~D

O

G

LM393DR_SO8

LM393DR_SO8

4

12

0.01U_0402_25V7K~D

1

RLZ4.3B_LL34

RLZ4.3B_LL34

RTCVREF

+

-

3.3V

3

PD4

PD4

DA204U_SOT323~D

DA204U_SOT323~D

P

P

R17

R17

1

+5VALW

12

VIN

12

PR205

@PR205

@

10K_0402_5%~D

10K_0402_5%~D

12

PD1

@PD1

@

Max. typ. Min.

L-->H 18.234 17.841 17.449
H-->L 17.597 17.210 16.813

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

LA-5152P

LA-5152P

LA-5152P

Date: Sheet of

Date: Sheet of

Date: Sheet of

3VALW

+

PR16

PR16

1 2

2.2K_0402_5%~D

2.2K_0402_5%~D

+5VALW

2

3

PD6

PD6

PR19

PR19

@

@

DA204U_SOT323~D

DA204U_SOT323~D

10K_0402_1%~D

10K_0402_1%~D

PR21

PR21

1 2

10K_0402_1%~D@

10K_0402_1%~D@

1 2

VinDe_Out

12

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

1

PR192

@PR192

@

1K_0402_5%~D

1K_0402_5%~D

ACIN <21,25,31,39>

PR203

@ PR203

@

10K_0402_5%~D

10K_0402_5%~D

DCIN/Precharge

DCIN/Precharge

DCIN/Precharge

1

S_ID <31>

P

38 51Monday, June 15, 2009

38 51Monday, June 15, 2009

38 51Monday, June 15, 2009

A00

A00

A00

http://mycomp.su/x/

A

Q4

Q4

P

C16

C16

PR34

PR34
340K_0402_1%~D

340K_0402_1%~D

1 2

1 2

ACGOOD#

P
FDS6675BZ_SO8

FDS6675BZ_SO8

8
7

5

P

P

R28

R28

340K_0402_1%~D

340K_0402_1%~D

1 2

ACDET

PR31

PR31

54.9K_0402_1%

54.9K_0402_1%

1 2

CP_SEL<31>

OVPSET

PR35

PR35

54.9K_0402_1%

54.9K_0402_1%

PR36

PR36

100K_0402_1%~D

100K_0402_1%~D

1 2

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

4

ACDRV_CHG#

CP_SEL

PC190

PC190

@

@

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

SI2301BDS-T1-E3_SOT23-3

SI2301BDS-T1-E3_SOT23-3

GATE

PC40

PC40

REGN

IN

V

12

R23

R23
P

P

1 1

3.3_1210_5%~D

3.3_1210_5%~D

12

R27

R27
P

P

3.3_1210_5%~D

3.3_1210_5%~D

1 2

C19

C19
P

P

2.2U_0805_25V6K

2.2U_0805_25V6K

2 2

P

P

0.01U_0603_50V7K~D

0.01U_0603_50V7K~D

1 2

90W adapter

Icharge=(Vsrset/Vvdac)*(0.1/PR29)=3.3A

Iadapter=(Vacset/Vvdac)*(0.1/PR22)=4.16A

Input OVP : 22.3V

PR44

Input UVP : 16.98V

3 3

Fsw : 300KHz

CHGVADJ<31>

PR44

210K_0402_1%~D

210K_0402_1%~D

1 2

65W adapter(CP_SEL high)

Iadapter=(Vacset/Vvdac)*(0.1/PR22)=3A

PR46

PR46

1 2

B+

100_0805_5%~D

100_0805_5%~D

+5VALW

R52

R52
P

P

1 2

12

4 4

C47

C47
P

P

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

R48

R48
P

P

12

PD8

PD8

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

220K_0402_5%

220K_0402_5%

R54

R54
P

P

1 2

220K_0402_5%

220K_0402_5%

1 2

470K_0402_5%~D

470K_0402_5%~D

PQ15

PQ15

2

G

G

A

PQ12

PQ12

TP0610K-T1-E3_SOT23-3

TP0610K-T1-E3_SOT23-3

13

32.8

32.8

PC44

PC44

2

13

D

D

RHU002N06_SOT323-3

RHU002N06_SOT323-3

S

S

B+_BIAS

1 2

100K_0402_1%~D

0.1U_0805_25V7M~N

0.1U_0805_25V7M~N

100K_0402_1%~D

ACOFF

1 2

PC45

PC45

.1U_0402_16V7K~D

.1U_0402_16V7K~D

P

VCC_CHG

1
2
36

12

PC25

PC25

1 2

0.022U_0603_50V7~D

0.022U_0603_50V7~D

PC100 0.022U_0603_50V7~D@PC100 0.022U_0603_50V7~D@

PR37 0_0603_5%~D

PR37 0_0603_5%~D

2

G

G

12

2

12

ACSET

12

12

PR45

PR45
499K_0402_1%~D

499K_0402_1%~D

VREF

12

PR50

PR50

12

340K_0402_1%~D

340K_0402_1%~D

B

Q5

Q5

P

P
FDS6675BZ_SO8

FDS6675BZ_SO8

1
2
3 6

4

PR26

PR26

100K_0402_1%~D

100K_0402_1%~D

12

12

CP setting

PR89

PR89

97.6K_0402_1%~D

97.6K_0402_1%~D

1 2

13

D

D

PQ25

PQ25

S

S

PR30

PR30

1 2

60.4K_0402_1%

60.4K_0402_1%

SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

+3VALW

PQ9

PQ9

PR43

PR43
0_0402_5%~D@

0_0402_5%~D@

VADJ

PR53

PR53

B

2

G

G

1U_0603_10V6K~D

1U_0603_10V6K~D

+3VALW

1 3

VREF

12

PR49

PR49
200K_0402_1%~D

200K_0402_1%~D

13

D

D

PQ14

PQ14
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

0.015_2512_1%

0.015_2512_1%

8
7

1

5

2

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1 2

12

P

P

C26

C26

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

12

12

PC33

@ PC33

@

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

PC39

PC39

1 2

PR87

PR87

0_0402_5%~D

0_0402_5%~D

13

D

D

2

G

G

S

S

P

P

R90 0_1206_5%~D

R90 0_1206_5%~D

R22

R22

P

P

4

3

C24

C24

P

P

12

ACN
ACP

ACSET

PR33

PR33
100K_0402_1%~D

100K_0402_1%~D

1 2

PC34

PC34

0.47U_0603_16V7K~D

0.47U_0603_16V7K~D

VREF

12

12

VADJ

/BATDRV

GATE

PQ13

PQ13
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

C

12

U4

U4

P

P

CHGEN#

1

C

HGEN

P

P

C27

C27

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

2

ACN

3

ACP

4

ACDRV

5

ACDET

6

ACSET

7

ACOP

8

OVPSET

9

AGND

10

VREF

PR86

PR86
0_0402_5%~D@

0_0402_5%~D@

11

VDAC

12

VADJ

13

ACGOOD

14

BATDRV

BQ24751ARHDR_QFN28_5X5

BQ24751ARHDR_QFN28_5X5

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

P

VCC

BTST

HIDRV

PH

REGN

LODRV

PGND

LEARN

CELLS

SRP

SRN

BAT

TP

SRSET

IADAPT

ADP_I<31>

+COINCELL

RTCVREF

2

PD9

PD9

1

BAT54CW_SOT323~D

BAT54CW_SOT323~D

C

28

27

26

25

24

23

22

21

20

19

18

17

29

16

15

100P_0402_50V8J~D

100P_0402_50V8J~D

Z4012

2.2_0603_5%~D

2.2_0603_5%~D

1 2

DH_CHG

LX_CHG

PD7

PD7

RLS4148_LL34-2

RLS4148_LL34-2

REGN

12

PC29

PC29
1U_0603_10V6K~D

1U_0603_10V6K~D

DL_CHG

CELLS

SRP

SRN

12

SRSET

1 2

PR39

PR39

10_0603_5%~D

10_0603_5%~D

PC43

PC43

12

PR47

PR47
1K_0402_5%~D

1K_0402_5%~D

3

1

2

+

B

P

P

JP17

JP17

2

JUMP_43X118@

JUMP_43X118@

C20

C20

P

P

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

P

P

R25

R25

12

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

ACOFF <31>

PR88

PR88

0_0402_5%~D

0_0402_5%~D

1 2

PC41

PC41

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

ICHG setting

12

+RTCVCC

PC46

PC46
1U_0603_10V4Z~D

1U_0603_10V4Z~D

112

578

P

P

Q6

Q6

FDS8884_SO8

FDS8884_SO8

3 6

241

1 2

PC28

PC28

578

PQ8

PQ8

FDS6690AS_NL_SO8

FDS6690AS_NL_SO8

3 6

241

PR38

PR38

51.1K_0402_1%~D

12

PR40

PR40
100K_0402_1%~D

100K_0402_1%~D

51.1K_0402_1%~D

12

PC42

@PC42

@

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

IREF Current

3.3V

COIN RTC Battery

+COINCELL

D

12

PC189

PC189

2200P_0402_50V7K~D

2200P_0402_50V7K~D

PR32

PR32

@

@

4.7_1206_5%~D

4.7_1206_5%~D

PC35

PC35

@

@

680P_0603_50V7K~D

680P_0603_50V7K~D

12

IREF <31>

3.3A

PJPRTC

PJPRTC

1

1

2

2

3

G1

4

G2

MOLEX_53261-0271_2P

MOLEX_53261-0271_2P

@

@

D

C

HG_B+

12

PC188

PC188

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

10UH_SIL1045RA-100PF_4.5A_30%

10UH_SIL1045RA-100PF_4.5A_30%

1 2

12

12

PC171000P_0402_50V7K~D PC171000P_0402_50V7K~D

PC214.7U_ 1206_25V6K~D PC214.7U_1206_25V6K~D

1 2

1 2

12

PL3

PL3

PC30

PC30

1 2

10U_1206_25V6M~D

10U_1206_25V6M~D

12

PC37

PC37

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

47K_0402_1%~D

47K_0402_1%~D

FSTCHG<31>

DELL CONFIDENTIAL/PROPRIETARY

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

PC181000P_0402_50V7K~D PC181000P_0402_50V7K~D

PC224.7U_ 1206_25V6K~D PC224.7U_1206_25V6K~D

1 2

12

0.02_2512_1%~D

0.02_2512_1%~D

1

2

.1U_0402_16V7K~D.1U_0402_16V 7K~D

PR41

PR41

ACGOOD#

LA-5152P

LA-5152P

LA-5152P

E

12

P

P

R24

R24

100K_0402_1%~D

PC234.7U_ 1206_25V6K~D PC234.7U_1206_25V6K~D

100K_0402_1%~D

1 2

PC15

PC15

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

/BATDRV

PR29

PR29

4

3

1 2

12

PC38

PC38

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

VREF

RTCVREF

12

2

G

G

2

G

G

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PR42

PR42

47K_0402_1%~D

47K_0402_1%~D

1 2

13

D

D

PQ11

PQ11
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

VREF

PR51

PR51
47K_0402_1%~D

47K_0402_1%~D

1 2

CHGEN#

13

D

D

PQ16

PQ16
SSM3K7002F_SC59-3

SSM3K7002F_SC59-3

S

S

SCHEMATIC,MB A5152

SCHEMATIC,MB A5152

SCHEMATIC,MB A5152

E

36

241

P

P

Q7

Q7

FDS6675BZ_SO8

FDS6675BZ_SO8

578

BATT+

12

12

ACIN <21,25,31,38>

PC32

PC32

PC31

PC31

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

10U_1206_25V6M~D

39 51Monday, June 15, 2009

39 51Monday, June 15, 2009

39 51Monday, June 15, 2009

A00

A00

A00

http://mycomp.su/x/

5

+

B

D D

+3VALWP

PC60

PC60

330U_D_ 6.3VM_R18M~D

330U_D_ 6.3VM_R18M~D

C C

B B

P

P

JP19

JP19

JUMP_43 X118@

JUMP_43 X118@

2

112

12

PC84

PC84

PC48

PC48

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

2.2UH_FD VE1040-2R2M=P 3_14.2A_20%~D

2.2UH_FD VE1040-2R2M=P 3_14.2A_20%~D

1 2

1

+

+

2

12

PR57

PC79

PC79

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

PR57

0_0402_5%~D

0_0402_5%~D

1 2

PR62

PR62

@

@

1 2

10K_0402_1%~D

10K_0402_1%~D

VS

12

PC49

PC49

PL4

PL4

PD10

PD10

RLZ5.1B_ LL34

RLZ5.1B_ LL34

1 2

12

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D

3.3VALWP
Thermal Design Current=8.21A
Peak Current=10.27A
OCP min=12.32A
Fsw=300K
Output Ripple current=

Rds(on) = 11.5m ohm(max)
Rds(on) = 9m ohm(typical)

PJP5

PJP5
JUMP_43 X118@

JUMP_43 X118@

+5VALW P

A A

+3VALW P

112

PJP7

PJP7
JUMP_43 X118@

JUMP_43 X118@

112

PJP11

PJP11
JUMP_43 X118@

JUMP_43 X118@

112

PJP9

PJP9
JUMP_43 X118@

JUMP_43 X118@

112

5

2

2

2

2

+5VALW

1 3

+3VALW

4

T

12

PC50

PC50

2200P_0402_50V7K~D

2200P_0402_50V7K~D

8

12

PR56

PR56

4.7_1206_5%~D

4.7_1206_5%~D

12

PC58

PC58

680P_0603_50V7K~D

680P_0603_50V7K~D

2

PD11

PD11

1 2

1SS355T E-17_SOD323-2

1SS355T E-17_SOD323-2

1

PR66

PR66

100K_04 02_1%~D

100K_04 02_1%~D

1 2

MAINPW ON<7,44>

PQ21

PQ21

TP0610K -T1-E3_SOT23-3

TP0610K -T1-E3_SOT23-3

4

PS51427_B+

578

PQ17

PQ17
SI4686DY-T1-E3 _SO8

SI4686DY-T1-E3 _SO8

3 6

241

PQ19

PQ19

D6D5D7D

FDS6670 AS_NL_SO8

FDS6670 AS_NL_SO8

4

G

S

S

S

3

2

PR67

PR67

1 2

200K_0402_5%~D

200K_0402_5%~D

PR73

PR73

0_0402_ 5%~D

0_0402_ 5%~D

PC57

PC57

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

1 2

PC65

PC65

0.22U_06 03_25V7-K

0.22U_06 03_25V7-K

1 2

VL

PR72

PR72

1 2

806K_0603_1%

806K_0603_1%

12

12

3

P

P

R55

R55

0_0805_ 5%

0_0805_ 5%

1 2

L

V

PC54

PC54

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

PR59

PR59

12

0_0603_ 5%~D

0_0603_ 5%~D

BST3A

LX3

DL3

FB3

VL

1 2

PU5

PU5

33

TP

26

DRVH2

24

VBST2

25

LL2

23

DRVL2

30

VOUT2

32

REFIN2

1 2

PC55

PC55

3

6

VIN

V5FILT

2VREF_TPS51427

TPS5142 7_EN2

1 2

1 2

12

2VREF_TPS51427

PR71

PR71

20

14

27

1

8

4

0_0402_5%~D

0_0402_5%~D

3

VREF2

LDOREFIN

NC

EN_LDO

EN1

EN2

VREF3

5

12

PC66

PC66

1U_0603_10V6K~D

1U_0603_10V6K~D

TONSE

2

12

@

@

0_0402_ 5%~D

0_0402_ 5%~D

2VREF_TPS51427

1 2

PC64 0.22 U_0603_10V7K ~DPC6 4 0.22U _0603_10V7K~ D

EN_LDO

TPS5142 7_EN1

PR70

@P R70

@

0_0402_ 5%~D

0_0402_ 5%~D

PR74

@P R74

@

47K_040 2_5%~D

47K_040 2_5%~D

1 2

PC67

PC67

PC68

PC68

@

@

0.047U_0402_16V7K~N

0.047U_0402_16V7K~N

0.047U_0603_16V7K~D

0.047U_0603_16V7K~D

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

PC56

PC56

1U_0603_10V6K~D

1U_0603_10V6K~D

7

LDO

V5DRV

DRVH1

VBST1

LL1

DRVL1

PGND

VOUT1

FB1

VSW

SKIPSEL

PGOOD2

PGOOD1

TRIP1

TRIP2

GND

TPS5142 7_QFN32_5X5

TPS5142 7_QFN32_5X5

21

PR75

PR75

12

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

19

15

17

16

18

22

10

11

9

29

28

13

12

31

PC59

PC59

1U_0603 _10V6K~D

1U_0603 _10V6K~D

1 2

DH5DH3

PR60

PR60

BST5A

0_0603_ 5%~D

0_0603_ 5%~D

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

LX5

DL5

FB5

ILM1

ILIM2

12

PC61

PC61

1 2

PR64 0_04 02_5%~D@P R64 0_0 402_5%~D@

PR65 0_04 02_5%~DPR6 5 0_0402 _5%~D

1 2

12

205K_04 02_1%~D

205K_04 02_1%~D

243K_04 02_1%~D

243K_04 02_1%~D

5VALWP
Thermai Design Current=6.88A
Peak Current=8.6A
OCP min=10.32A
Fsw=400K
Output Ripple current=
Rds(on) = 11.5m ohm(max) ; Rds(on) = 9m ohm(typical)

PR68

PR68

PR69

PR69

2

T

PS51427_B+

578

3 6

241

8

D6D5D7D

4

G

S

S

S

3

2

1

12

12

PC53

PC51

PC51

PQ18

PQ18

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D

SI4686DY-T1-E3_SO8

SI4686DY-T1-E3_SO8

2.2UH_FD VE1040-2R2M=P 3_14.2A_20%~D

2.2UH_FD VE1040-2R2M=P 3_14.2A_20%~D

12

PR58

PR58

4.7_1206_5%~D

4.7_1206_5%~D

PQ20

PQ20

12

FDS6670AS_NL_SO8

FDS6670AS_NL_SO8

PC62

PC62

680P_0603_50V7K~D

680P_0603_50V7K~D

PC53

PC52

PC52

4.7U_1206_25V6K~D

4.7U_1206_25V6K~D

PL5

PL5

12

2200P_0402_50V7K~D

2200P_0402_50V7K~D

1

<

<

BOM Structu re>

BOM Structu re>

12

12

PC197

PC197

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PR61

PR61

1 2

61.9K_0402_1%~D

61.9K_0402_1%~D

PR63

PR63

1 2

10K_0402_1%~D

10K_0402_1%~D

PC80

PC80

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

+5VALWP

1

12

+

+

2

PC63

PC63

330U_D_6.3VM_R18M~D

330U_D_6.3VM_R18M~D

VL

POK <2 1>

12

12

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: S heet o f

Date: S heet o f

2

Date: S heet o f

Compal Electronics, Inc.

+3VALWP/+5VALWP

+3VALWP/+5VALWP

+3VALWP/+5VALWP

LA-5152P

LA-5152P

LA-5152P

A00

A00

40 51Monday, June 15 , 2009

40 51Monday, June 15 , 2009

40 51Monday, June 15 , 2009

1

A00

http://mycomp.su/x/

A

+1.05V_VCCP
Thermal Desig Current=15.81A
Peak Current=19.77A
OCP min=23A
Fsw=300KHz

Vo=1.05V> VFB=0.75V

1 1

2 2

<
Vo=VFB*(1+PR430/PR433)=0.75*(1+8.66K/21.5K)=1.052V

PR77

PR77

0_0402_5%~D

0_0402_5%~D

12

PR79

PR79

30.1K_0402_1%~D

30.1K_0402_1%~D

12

PC76

PC76

1U_0603_10V6K~D

1U_0603_10V6K~D

21.5K_0402_1%~D

21.5K_0402_1%~D

12

@PC7 2

@

.1U_0402_16V7K~D

.1U_0402_16V7K~D

12

PR85

PR85

+5VS

SUSP#<28,31,33,42>

PR80

PR80
300_0603_5%~D

300_0603_5%~D

1 2

12

PC72

PC78

@PC7 8

@

47P_0402_50V8J~D

47P_0402_50V8J~D

12

PR84

PR84

8.66K_0402_1%~D

8.66K_0402_1%~D

TON_VCCP

V5FILT_VCCP

FB_VCCP

12

2

3

4

5

6

EN_VCCP

PU6

PU6

TON

VOUT

V5FILT

VFB

PGOOD

B

PR76

PR76

267K_0402_1%~D

267K_0402_1%~D

1 2

1

EN_PSV

GND7PGND

PR78

PR78

BST_VCCP

1 2

0_0603_5%~D

0_0603_5%~D

14TP15

DRVH

TRIP

DRVL

UG_VCCP

13

LX_VCCP

12

LL

TRIP_VCCP

11

V5DRV_VCCP

10

LG_VCCP

9

VBST

V5DRV

TPS51117RGYR_QFN14_3. 5x3.5

TPS51117RGYR_QFN14_3. 5x3.5

8

1 2

PC71 0.1U_0603_25V7K~DPC71 0.1U_0603_25V7K~D

PR81

PR81

1 2

7.87K_0402_1%~D

7.87K_0402_1%~D

+5VS

12

PR82

PR82
0_0603_5%~D

0_0603_5%~D

12

PC77

PC77

4.7U_0805_10V6K~D

4.7U_0805_10V6K~D

C

4

4

CCP_B++

V

PQ22

PQ22
FDMS8692_POW ER56-8-5

FDMS8692_POW ER56-8-5

123 5

PQ23

PQ23

SI4634DY_SO8

SI4634DY_SO8

123 5

D

JP20

@PJP20

@

P

12

PAD-OPEN 4x4m

12

4

12

PC69

PC69

10U_1206_25V6M~D

10U_1206_25V6M~D

PQ24

PQ24

SI4634DY_SO8

SI4634DY_SO8

123 5

12

PC70

PC70

PC85

PC85

10U_1206_25V6M~D

10U_1206_25V6M~D

1UH_FDUE1040D-1R0M -P3_21.3A_20%

1UH_FDUE1040D-1R0M -P3_21.3A_20%

PR83

@PR8 3

@

4.7_1206_5%~D

4.7_1206_5%~D

1 2

PC75

@PC7 5

@

680P_0603_50V8J~D

680P_0603_50V8J~D

1 2

PC86

PC86

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

PL6

PL6

1 2

12

2200P_0402_50V7K~D

2200P_0402_50V7K~D

PAD-OPEN 4x4m

1

+

+

PC73

PC73

2

220U_D2_4VM

220U_D2_4VM

1

1

+

+

+

+

PC99

PC99

PC83

PC83

220U_D2_4VM

220U_D2_4VM

PC74

PC74

2

2

@

@

220U_D2_4VM

220U_D2_4VM

+

B

+1.05V_VCCPP

12

12

PC81

PC81

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

PJP18

@PJ P18

@

JUMP_43X118

3 3

+3VALW

SUSP#<28,31,33,42>

PJP4

@PJ P4

@

JUMP_43X118

JUMP_43X118

+1.05V_VCCPP

4 4

+1.8VSP

PAD-OPEN 2x2m~D

PAD-OPEN 2x2m~D

112

PJP6

@PJ P6

@

JUMP_43X118

JUMP_43X118

112

PJP27

@PJ P27

@

2 1

A

2

2

+1.05V_VCCP

+1.8VS

JUMP_43X118

112

1 2

PR93 0_0402_5%~DPR93 0_0402_5%~D

PC171

@PC1 71

@

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

2

+5VALW

12

12

B

12

PC172

PC172

10U_1206_25V6M~D

10U_1206_25V6M~D

5

PU13 RT9025PU13 RT9025

NC

PGOOD

GND

8

ADJ

6

7

1

1000P_0402_50V7K~D

1000P_0402_50V7K~D

PC87

PC87

12

12

PR94

PR94

PR95

PR95

12

1K_0402_1%~D

1K_0402_1%~D

806_0402_1%~D

806_0402_1%~D

12

VIN3VOUT

2

EN

4

VDD

GND

9

PC170

PC170

1U_0402_6.3V6K~D

1U_0402_6.3V6K~D

+1.8VSP
Imax=0.67A
Vout=0.8*(PR94+PR95)/PR95=0.8*(1k+806)/806=1.79V

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

C

+1.8VSP

12

PC88

PC126

PC126

10U_1206_25V6M~D

10U_1206_25V6M~D

PC88
10U_1206_25V6M~D

10U_1206_25V6M~D

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

+1.05V_VCCP/+1.8VSP

+1.05V_VCCP/+1.8VSP

+1.05V_VCCP/+1.8VSP

LA-5152P

LA-5152P

LA-5152P

D

A00

A00

41 51Monday, June 15, 2009

41 51Monday, June 15, 2009

41 51Monday, June 15, 2009

A00

http://mycomp.su/x/

A

1.5V
Thermal Design Current=10.56A
Peak Current=13.2A
OCP min=15.84A
Fsw=298KHz

<

Vo=1.5V> VFB=0.75V

1 1

Vo=VFB*(1+PR104/PR105)=0.75*(1+22.1K/22.1K)=1.5V

PR97

PR97

0_0402_5%~D

0_0402_5%~D

SYSON<28,31,33>

PR100

PR100

300_0603_5%~D

300_0603_5%~D

+5VALW

2 2

1 2

12

PR99

PR99

30.1K_0402_1%~D

30.1K_0402_1%~D

12

PC96

PC96

1U_0603_10V6K~D

1U_0603_10V6K~D

22.1K_0402_1%~D

22.1K_0402_1%~D

12

.1U_0402_16V7K~D

.1U_0402_16V7K~D

PR105

PR105

PC92

@PC9 2

@

PC98

@PC9 8

@

47P_0402_50V8J~D

47P_0402_50V8J~D

PR104

PR104

22.1K_0402_1%~D

22.1K_0402_1%~D

12

12

TON_1.5

V5FILT_1.5

FB_1.5

1.5V_PGOOD<11>

12

12

B

EN_1.5

PU8

PU8

2

TON

3

VOUT

4

V5FILT

5

VFB

6

PGOOD

PR207

PR207

100K_0402_1%~D

100K_0402_1%~D

1 2

+5VALW

PR96

PR96

267K_0402_1%~D

267K_0402_1%~D

1 2

1

EN_PSV

GND7PGND

8

PR98

PR98

0.1U_0603_25V7K~D

1 2

UG_1.5

13

LX_1.6

12

TRIP_1.5

11

V5DRV_1.5

10

LG_1.5

9

0.1U_0603_25V7K~D

1 2

6.49K_0402_1%~D

6.49K_0402_1%~D

0_0603_5%~D

0_0603_5%~D

BST_1.5

14TP15

VBST

DRVH

LL

TRIP

V5DRV

DRVL

TPS51117RGYR_QFN14_3. 5x3.5

TPS51117RGYR_QFN14_3. 5x3.5

PR101

PR101

PC91

PC91

1 2

+5VALW

12

PR102

PR102
0_0603_5%~D

0_0603_5%~D

12

PC97

PC97

4.7U_0805_10V6K~D

4.7U_0805_10V6K~D

C

1.5VSP_B++

+

12

4

4

G

12

PC183

PC183

PQ27

PQ27

FDMS8692_POW ER56-8-5

FDMS8692_POW ER56-8-5

123 5

8

D6D5D7D

4

PQ28

PQ28

S

S

S

FDS6670AS_NL_SO8

FDS6670AS_NL_SO8

3

2

1

10U_1206_25V6M~D

10U_1206_25V6M~D

D6D5D7D

G

S

3

2

12

PC89

PC89

8

S

S

1

PC90

PC90

10U_1206_25V6M~D

10U_1206_25V6M~D

PQ42

PQ42

10U_1206_25V6M~D

10U_1206_25V6M~D

1UH_FDUE1040D-1R0M -P3_21.3A_20%

1UH_FDUE1040D-1R0M -P3_21.3A_20%

PR103

@PR1 03

@

4.7_1206_5%~D

4.7_1206_5%~D

1 2

680P_0603_50V8J~D

680P_0603_50V8J~D

1 2

FDS6670AS_NL_SO8

FDS6670AS_NL_SO8

PC184

PC184

2200P_0402_50V7K~D

2200P_0402_50V7K~D

PL8

PL8

1 2

PC95

@PC9 5

@

12

PC185

PC185

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

D

P

JP22

@PJP22

@

12

+

B

PAD-OPEN 4x4m

PAD-OPEN 4x4m

12

1

1

+

+

PC93

PC93

2

PC177

PC177

220U_D2_4VM

220U_D2_4VM

12

+

+

PC94

PC94

2

220U_D2_4VM

220U_D2_4VM

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

+1.5VP

12

PC82

PC82

0.1U_0402_10V7K~D

0.1U_0402_10V7K~D

PU11

3 3

PJP24

@PJ P24

@

+1.5VP

+0.75VSP

PC157

PC157

112

JUMP_43X118

JUMP_43X118

12

10U_0805_10V6K~D

10U_0805_10V6K~D

2

12

PC158

PC158

10U_0805_10V6K~D

10U_0805_10V6K~D

12

12

PC155

PC155

PC154

PC154

@

@

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

4.7U_0805_6.3V6K~D

RT9026_MSOP10

RT9026_MSOP10

1

VDDQSNS

2

VLDOIN

3

VTT

5

VTTSNS

4

PGND

PU11

GND

VTTREF

GND

11

10

VIN

PC156

8
6

PR174

9

S5

7

S3

PR174

0_0402_5%~D

0_0402_5%~D

12

PC160

@PC1 60

@

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

12

SUSP# <28,31, 33,41>

PC156

1U_0603_10V6K~D

1U_0603_10V6K~D

12

PC159

PC159

0.1U_0402_16V7K~D

0.1U_0402_16V7K~D

+3VALW

12

+0.75VSP
Thermal Design Current:0.7A
Peak current:1A
Vout=VDDQSNS/2=1.5V/2=0.75V

PJP15

@PJ P15

@

JUMP_43X118

JUMP_43X118

2

4 4

+1.5VP

+0.75VSP

112

PJP16

@PJ P16

@

JUMP_43X118

JUMP_43X118

112

PJP29

@PJ P29

@

2 1

PAD-OPEN 2x2m~D

PAD-OPEN 2x2m~D

A

2

+1.5V

+0.75VS

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

B

C

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

+1.5VSP/+0.75VSP

+1.5VSP/+0.75VSP

+1.5VSP/+0.75VSP

LA-5152P

LA-5152P

LA-5152P

D

A00

A00

42 51Monday, June 15, 2009

42 51Monday, June 15, 2009

42 51Monday, June 15, 2009

A00

http://mycomp.su/x/

5

@

@

P

P

R131 499_0 402_1%~D

D D

+3VS

+3VS

PR145

@P R145

@

499_040 2_1%~D

499_040 2_1%~D

VGATE<1 1,21,31>

POW_ MON< 31>

C C

B B

A A

H_PSI#<8>

VR_TT#

PR153 4 .22K_0402_1%@ PR153 4.22K _0402_1%@

1 2

PC132 0 .015U_0402_16 V7K@PC132 0.015U_04 02_16V7K@

1 2

PC136 0.022 U_0603_25V7K

PC136 0.022 U_0603_25V7K

1000P_0 402_50V7K~D

1000P_0 402_50V7K~D

PR163 9 7.6K_0402_1%~ DPR163 97.6K_040 2_1%~D

1 2

R194

R194
P

P

1 2

@

@

100K_0402_1%~D

100K_0402_1%~D

VCCSENS E<8>

1 2

PC1311U_060 3_10V6K~D PC1311U_0603_ 10V6K~D

1 2

PR152 1 47K_0402_1%~ DP R152 147K_04 02_1%~D

1 2

PH1 100 K_0603_1%_TH 11-4H104FT@ PH1 100K_06 03_1%_TH11-4H1 04FT@

1 2

1 2

PR154 1 1.5K_0402_1%~ DPR154 11.5K_040 2_1%~D

PC138

PC138

PC144 1 00P_0402_50V 8J~DPC144 100P_040 2_50V8J~D

1 2

100_040 2_1%~D

100_040 2_1%~D

1 2

1 2

PR156 1 1.3K_0402_1%~ DPR156 11.3K_040 2_1%~D

1 2

1 2

PC139 1 000P_0402_50 V7K~DPC1 39 1000P_040 2_50V7K~D

PC141 2 70P_0402_50V 7K~DPC14 1 270P_0402_ 50V7K~D

1 2

PR165

PR165

1 2

PR167 1K _0402_1%~DPR1 67 1K_0402_1 %~D

PR168

PR168

1 2

0_0402_ 5%~D

0_0402_ 5%~D

VSSSENS E<8 >

VCC_PRM

D

PRSLPVR<11,2 1>

H_DPRST P#<8,11,19>

12

PR143

PR143

1.91K_0402_1%~D

1.91K_0402_1%~D

PR151 10K_ 0402_1%~DP R151 1 0K_0402_1%~D

1 2

RBIAS_CPU

NTC_CPU

SOFT_CP U

OCSET_C PU

VW_C PU

12

PC145 2 200P_0402_50 V7K~DPC1 45 2200P_040 2_50V7K~D

1 2

12

PR172 1 K_0402_1%~DPR17 2 1K_0402_1% ~D

R131 499_0 402_1%~D

1 2

R132 0_040 2_5%~D

R132 0_040 2_5%~D

P

P

1 2

PR141 0_04 02_5%~DPR1 41 0_0 402_5%~D

PC127

PC127

1U_0603_10V6K~D

1U_0603_10V6K~D

PMON_CP U

COMP_CP U

FB_CPU

PC147 3 30P_0402_50V 7K~DPC14 7 330P_0402_ 50V7K~D

330P_04 02_50V7K~D

330P_04 02_50V7K~D

0.22U_06 03_16V7K~D

0.22U_06 03_16V7K~D

PT1PA D PT1PA D

1 2

12

1

PGOOD

2

PSI#

3

PMON

4

RBIAS

5

VR_TT#

6

NTC

7

SOFT

8

OCSET

9

VW

10

COMP

11

FB

12

FB2

FB2_CPU

12

PR164

PR164

1K_0402 _1%~D

1K_0402 _1%~D

1 2

PC149

PC149

1 2

PR170 0_04 02_5%~DPR1 70 0_0 402_5%~D

PC150 1 80P_0402_50V 8J~DPC150 180P_040 2_50V8J~D

1 2

1 2

PC152

PC152

4

P

P

C118

C118

12

5600P_0 402_25V7K

5600P_0 402_25V7K

CPU_VID6

CPU_VID5

CPU_VID4

CPU_VID3

12

PR135 0_0402_5%~DPR135 0_0402_5%~D12PR136 0_0402_5%~DPR136 0_0402_5%~D

VID5

VID6

43

VSUM

12

<7,31>

12

12

PR142 0_0402_5%~DPR142 0_0402_5%~D

VID4

VID3

VIN_CPU

12

PC146

PC146

0.1U_060 3_25V7K~D

0.1U_060 3_25V7K~D

12

PR171

PR171

VR_ON

12

PR134 0_0402_5%~DPR134 0_0402_5%~D

VR_ON_CPU

DPRSLPVR_CPU

CLK_EN#_CPU

DPRSTP#_CPU

3V3_CPU

44

45

46

47

49

48

3V3

GND

VDIFF13VSEN14RTN15DROOP16DFB17VO18VSUM19VIN20GND21VDD22ISEN223ISEN1

VDIFF_CPU

VSEN_CPU

12

1 2

PR173 3 .74K_0402_1%~ D

PR173 3 .74K_0402_1%~ D

VR_ON

CLK_EN#

DPRSTP#

DPRSLPVR

ISL6266AC RZ-T_QFN48_7X 7

ISL6266AC RZ-T_QFN48_7X 7

DROOP_CPU

DFB_CPU

RTN_CPU

PC148

PC148

0.01U_04 02_25V7K~D

0.01U_04 02_25V7K~D

PC151 0 .1U_0603_50V4 Z~D

PC151 0 .1U_0603_50V4 Z~D

1 2

PC153 0 .22U_0603_10V 7K~DP C153 0.22U_06 03_10V7K~D

12

<8>

<8>

<8>

CPU_VID2

CPU_VID1

CPU_VID0

12

12

12

PR140 0_0402_5%~DPR140 0_0402_5%~D

PR137 0_0402_5%~DPR137 0_0402_5%~D

PR138 0_0402_5%~DPR138 0_0402_5%~D

PR139 0_0402_5%~DPR139 0_0402_5%~D

VID2

VID1

VID0

VID037VID138VID239VID340VID441VID542VID6

BOOT1

UGATE1

PHASE1

PGND1

LGATE1

PVCC

LGATE2

PGND2

PHASE2

UGATE2

BOOT2

NC

24

VDD_CPU

1 2

12

PR162 1 _0603_5%~DPR162 1_ 0603_5%~D

PC142

PC142

1U_0603 _10V6K~D

1U_0603 _10V6K~D

PR166

PR166

10_0603 _5%~D

10_0603 _5%~D

1 2

12

PR169

PR169

2.61K_0402_1%~D

2.61K_0402_1%~D

PH2

PH2

11K_0402_1%~D

11K_0402_1%~D

10KB_06 03_ERTJ1VR10 3J

10KB_06 03_ERTJ1VR10 3J

1 2

3

5VS

+

P

P

R130

R130

1_0603_ 5%~D

1_0603_ 5%~D

PC121

PC121

PR144

PR144

12

PC137

PC137

1 2

1 2

12

PC122

PC122

1U_0603_10V6K~D

1U_0603_10V6K~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

PC128

PC128

0.22U_06 03_10V7K~D

0.22U_06 03_10V7K~D

1 2

PQ39

PQ39

SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

3 5

241

3 5

241

3 5

241

3 5

241

3 5

241

PQ35

PQ35

3 5

241

SI4634DY-T1-E3 1N SO8

SI4634DY-T1-E3 1N SO8

PQ41

PQ41

3 5

241

SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

PQ36

PQ36

3 5

241

SI4634DY-T1-E3 1N SO8

SI4634DY-T1-E3 1N SO8

<8>

<8>

<8>

<8>

12

12

PC120

PC120

PC119

PC119

1U_0603_10V6K~D

1U_0603_10V6K~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

36

35

34

33

32

31

30

29

28

27

26

25

PU10

PU10

29.1

29.1

ISEN1
ISEN2

BOOT_CP U1

UGATE_C PU1

PHASE_C PU1

PVCC_CP U

BOOT_CP U2

+CPU_B+

2.2_0603 _5%~D

2.2_0603 _5%~D

LGATE_C PU1

LGATE_C PU2

PHASE_C PU2

PR155

PR155

1 2

2.2_0603 _5%~D

2.2_0603 _5%~D

+5VS

1 2

UGATE_C PU2

0.22U_06 03_10V7K~D

0.22U_06 03_10V7K~D

2

+

CPU_B+

12

12

PC124

PC124

PC125

PC123

PC123

10U_1206_25VAK~D

10U_1206_25VAK~D

PQ38

PQ38

@

@

SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

12

PR146

PR146

PQ34

PQ34

12

PC129

PC129

SI4634DY-T1-E3 1N SO8

SI4634DY-T1-E3 1N SO8

PC180

PC180

PQ40

PQ40

@

@

SI7686DP-T1-E3_SO8

SI7686DP-T1-E3_SO8

12

12

PQ37

PQ37

SI4634DY-T1-E3 1N SO8

SI4634DY-T1-E3 1N SO8

PC125

10U_1206_25VAK~D

10U_1206_25VAK~D

10U_1206_25VAK~D

10U_1206_25VAK~D

4.7_1206_5%~D

4.7_1206_5%~D

680P_0603_50V8J~D

680P_0603_50V8J~D

12

12

PC179

PC179

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

2200P_0402_50V7K~D

2200P_0402_50V7K~D

PR157

PR157

4.7_1206 _5%~D

4.7_1206 _5%~D

PC140

PC140
680P_06 03_50V8J~D

680P_06 03_50V8J~D

1

12

+

+

PC175

PC175

PC173

PC173

2

100U_25V_M~D

100U_25V_M~D

@

@

0.36UH_F DU1040D-R36M_ 26A_20%

0.36UH_F DU1040D-R36M_ 26A_20%

4

3

12

PR147

PR147

PR158

PR158

12

PR148

PR148

3.65K_1206_1%

3.65K_1206_1%
10K_0402_1%~D

10K_0402_1%~D

VSUM

ISEN1

0.22U_06 03_16V7K~D

0.22U_06 03_16V7K~D

12

PC133

PC133

PC134

PC134

10U_1206_25VAK~D

10U_1206_25VAK~D

10U_1206_25VAK~D

10U_1206_25VAK~D

0.36UH_F DU1040D-R36M_ 26A_20%

0.36UH_F DU1040D-R36M_ 26A_20%

4

3

12

PR159

PR159

3.65K_1206_1%

3.65K_1206_1%

10K_0402_1%~D

10K_0402_1%~D

VSUM

0.22U_06 03_16V7K~D

0.22U_06 03_16V7K~D

100U_25V_M~D

100U_25V_M~D

@P R150

@

0_0402_ 5%~D

0_0402_ 5%~D

1 2

12

12

0_0402_ 5%~D

0_0402_ 5%~D

ISEN2

1

+

+

PC174

PC174

2

PL11

PL11

PR150

PC130

PC130

1 2

PC135

PC135

10U_1206_25VAK~D

10U_1206_25VAK~D

PL12

PL12

PR161

@P R161

@

1 2

PC143

PC143

1 2

1

+

+

2

100U_25V_M~D

100U_25V_M~D

1

2

12

1

2

1

FBMA-L18 -453215-900LMA 90T_1812

FBMA-L18 -453215-900LMA 90T_1812

12

PC176

PC176

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

12

PR149

PR149

1_0402_ 5%~D

1_0402_ 5%~D

VCC_PRM

+CPU_B+

12

PR160

PR160

1_0402_ 5%~D

1_0402_ 5%~D

VCC_PRM

12

P

P

L10

L10

1 2

PC178

PC178

2200P_0402_50V7K~D

2200P_0402_50V7K~D

+CPU_CORE

B

+

Fsw=290KHz

DELL CONFIDENTIAL/PROPRIETARY

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Documen t Number Rev

Size Documen t Number Rev

Size Documen t Number Rev

Date: S heet o f

Date: S heet o f

3

2

Date: S heet o f

Compal Electronics, Inc.

CPU_CORE

CPU_CORE

CPU_CORE

LA-5152P

LA-5152P

LA-5152P

A00

A00

43 51Monday, June 15 , 2009

43 51Monday, June 15 , 2009

43 51Monday, June 15 , 2009

1

A00

http://mycomp.su/x/

5

D D

BATT+

PL13

PL13

ATT+

SMB3025500YA_2P

SMB3025500YA_2P

B

1 2

12

12

C161

C161
P

P

100P_0402_50V8J~D

100P_0402_50V8J~D

PC163

PC163

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

PJPB1 battery connector

SMART

SMART

SMARTSMART
Battery:

Battery:

Battery:Battery:

C C

1.BAT+

1.BAT+

1.BAT+1.BAT+

2.BAT+

2.BAT+

2.BAT+2.BAT+

3.ID

3.ID

3.ID3.ID

4.B/I

4.B/I

4.B/I4.B/I

5.TS

5.TS

5.TS5.TS

6.SMD

6.SMD

6.SMD6.SMD

7.SMC

7.SMC

7.SMC7.SMC

8.GND

8.GND

8.GND8.GND

9.GND

9.GND

9.GND9.GND

BATT++

12

PC162

PC162
1000P_0402_50V7K~D

1000P_0402_50V7K~D

GND
GND

9
8
7
6
5
4
3
2
1

PJPB1

PJPB1

SUYIN_200275MR009F50PZR~D

SUYIN_200275MR009F50PZR~D

BATT++

12

PC164

PC164

100P_0402_50V8J~D

100P_0402_50V8J~D

11
10
9
8
7
6
5
4
3
2
1

1 2

1 2

PR179

PR179

100_0402_5%~D

100_0402_5%~D

1 2

PR180

PR180

100_0402_5%~D

100_0402_5%~D

4

PD12

PD12

@

@

PR175

PR175
1K_0402_5%~D

1K_0402_5%~D

3VALWP

+

3

DA204U_SOT323~D

DA204U_SOT323~D

1

BATT_B/I

EC_SMB_CK1 <31>

2

PD13

PD13

@

@

BATT_SMD

BATT_SMC

1K_0402_5%~D

1K_0402_5%~D

EC_SMB_DA1 <31>

DA204U_SOT323~D

DA204U_SOT323~D

PR177

PR177

3

2

2

3

1

3

PD14

PD14

@

@

DA204U_SOT323~D

DA204U_SOT323~D

1

2

3

PD15

PD15

@

@

DA204U_SOT323~D

DA204U_SOT323~D

1

2

attery Connect/OTP

B

CPU

1

PH3 under CPU botten side :

CPU thermal protection at 90 +-3 degree C
Recovery at 50 +-3 degree C

Place clsoe to EC pin

BATT_TEMP

1 2

PR176

PR176

1K_0402_5%~D

1K_0402_5%~D

12

1 2

BATT_TEMP <3 1>

PC165

@PC165

@

.1U_0402_16V7K~D

.1U_0402_16V7K~D

1 2

+3VALWP

PR178

PR178

6.49K_0402_1%~D

6.49K_0402_1%~D

PC168

PC168

1000P_0402_50V7K~D

1000P_0402_50V7K~D

VL VS

12

CPU

12

PR182

PR182

10.7K_0402_1%~D

10.7K_0402_1%~D

PR186

PR186

61.9K_0402_1%~D

OTP_IN OTP_IN+

61.9K_0402_1%~D

1 2

1 2

VL

PR188

12

PH3

PH3
100K_0603_1%_TH11-4H104FT

100K_0603_1%_TH11-4H104FT

PR188

150K_0402_1%~D

150K_0402_1%~D

150K_0402_1%~D

150K_0402_1%~D

PR190

PR190

PR184

PR184

147K_0402_1%~D

147K_0402_1%~D

1 2

OTP_IN-

12

12

8

3

P

+

0

2

-

G

PU12A

PU12A

4

LM358ADR_SO8

LM358ADR_SO8

PC169

PC169
1U_0603_10V6K~D

1U_0603_10V6K~D

PC166

PC166

0.1U_0603_25V7K~D

0.1U_0603_25V7K~D

1 2

OTP_OUT

1

1 2

VL

PR185

PR185
205K_0402_1%~D

205K_0402_1%~D

1 2

PD16

PD16

1SS355TE-17_SOD323-2

1SS355TE-17_SOD323-2

MAINPWON <7,40>

BATT+

12

PR181

PR181
453K_0402_1%~D

0.01U_0402_25V7K~D

0.01U_0402_25V7K~D

453K_0402_1%~D

12

PR183

PR183

499K_0402_1%~D

499K_0402_1%~D

BATT_IN

12

PR189

PR189

86.6K_0402_1%

86.6K_0402_1%

B B

PR187

PR187

10K_0402_1%~D

10K_0402_1%~D

BATT_OUT

7

PU12B

PU12B

LI-3S :13.5V----BATT_OVP=1.126V

BATT_OVP<31>

A A

1 2

VS

12

PC167

PC167

8

LM358ADR_SO8

LM358ADR_SO8

5

P

+

0

6

-

G

4

BATT_OVP=0.08338*BATT+

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

BATTERY CONN

BATTERY CONN

BATTERY CONN

LA-5152P

LA-5152P

LA-5152P

A00

A00

44 51Monday, June 15, 2009

44 51Monday, June 15, 2009

44 51Monday, June 15, 2009

1

A00

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

http://mycomp.su/x/

5

R e qu est

R e qu est

I

Ite m Issu e D escr ip tion

Ite mI tem

D D

P

ag e #

P a ge # T itle

tem

P a ge #P a ge#

1

2

3 30 Rev02 (X01)

4 32 Rev02 (X01)

06 Clock Generator 2009/03/03 Benson_Tung Error connection of clock gne I2C.

Title

TitleTitle

Clock Generator 2009/03/0306 Correct WPAN CLK +/- signal of U1.

JCARD1

Keyboard Keyboard connector Pin 1 location is different with Keyboard module. Correct keyboard pin 1 location to fit keyboard module.2009/03/03

D ate

D ateD ate

2009/03/03

R e qu estRequ est

O w ner

O w ner

O w nerO wn er

Benson_Tung

COMPAL

Benson_Tung

4

ersion C hange L ist ( P . I . R . L ist )

V ersion C ha n g e L ist ( P . I. R . L ist )

V

V ersion C ha n g e L ist ( P . I. R . L ist )V ersion C ha n g e L ist ( P . I. R . L ist )

Issu e D escr ip tionD ate

Issu e D escr ip tionIss u e D escr ip tion

Error connection of CLK_PCIE_WPAN & CLK_PCIE_WPAN#

1. Change JCARD1 pin 1 location to prevent cable twist.

2. Connect contact current rating is only 0.3 Ampere max.

3

2

ag e 1

Page 1

P

Page 1Pag e 1

S

olu t io n D esc r ip tion

So l u tion D es crip t io n R ev .

So l u tion D es crip t io nSo l u tion D es crip t io n

orrect CLK_SMBDATA connect to U1.9 , CLK_SMBCLK connect to U1.10. Rev02 (X01)

C

1. Modify JCARD1 symbol

2. Add +5VALW pin count from 2 to 7 pins.

1

R

ev02 (X01)

R e v.

R e v.R ev .

5 32

6 12

7 33

C C

8

9 4 Power Rail 2009/02/25 Bill_Huang Correct error item. Correct +3VS, +5VS Power consumption. Rev02 (X01)

10

11 Rev02 (X01)

12

13

B B

15

17

22

23

24

25

26 Compal

A A

20 FFS Compal Add FFS function Add FFS circuit in page 20

35

35

35
26

31
19
24

25 Rev02 (X01)

27 2009/03/06 Compal

30

32 Add powershare schematic. Rev02 (X01)

33 DC/DC

Power share Power share didn't w ork. Add power share schematic.

ICH9M19-23 Bill_Huang2009/03/04 Change ICH to consign P/N. Change U6 P/N: form SA00002G11L to SA00002G12L.

CRT RGB EA CRT RGB signals EA failed on Rising / Falling time. Change L31~L33 from SM01000AL00 (S SUPPRE_ CHENG-HANN MBK1608301YZF

CRT Diode CRT diode forward current is about 1Amp, need to change part to prevent

Display Port
VGA / LVDS
Sub woofer / Speaker AMP

EC_KB926/BIOS/Reed SW
ICH9M(1/5)_LAN,HD,SATA,LPC
Gigabit LAN_RTL8111DL

HD Audio_IDT92HD73C

Mini Card_WLAN/WWAN

USB/BlueTooth/Camera 2009/03/06 Compal To prevent antenna effect at E-SATA re-driver.

PWROK/BTN/KB/Touch Pad 2009/03/06

2009/03/03

2009/03/03 1.Correct LVDS_ACLK+ connect to U4C.C40

2009/03/03DC/DC Interface

2009/03/03

2009/03/10

2009/03/03 Benson_Tung

2009/03/04 Jan_Chang

2009/03/04 Benson_Tung

2009/03/06 Compal

2009/03/06ICH9M(5/5)_POWER&GND ICH coneect to ALW power rail have power wastage at S5 mode Add MOSFET control circuit to reduce ICH power wastage at S5 mode. Rev02 (X01)23

Benson_Tung

Benson_Tung

Benson_Tung

Benson_Tung Error connection of Q200.3 and C1517.1 GND net name.HDMI36 2009/03/03

Benson_Tung

Benson_Tung2009/03/0416

Compal Add powershare schematic.

Error connection of LVDS CLK +/-.Cantiga (3 of 7)

Change DC to DC transfer of MOS parts

damage.

Change JDP1,JLVDS1 and JWOOFER1 symbol.14 37

Meet Xtal EA spec. 1.Change C479,C481 from 15P_0402_50V8J to 22P_0402_50V8J

1. SPK_MUTE# change to controlled by HP1_JD or HP2_JD.

2. Meet HP EA spec.

To supprot EC TX/RX debug card. Change EC_TX_P80_DATA & EC_RX_P80_CLK connect to JWWAN1 pin 49 & 51

1. To fit power budget

2.Correct LVDS_ACLK- connect to U4C.C41

3.Correct LVDS_BCLK+ connect to U4C.A37

4.Correct LVDS_BCLK- connect to U4C.B37

1. +3VALW to +3VS Ttransfer MOS change to U21 SI4800BDY-TI-E3

2. +5VALW to +5VS Ttransfer MOS change to U22 SI4800BDY-TI-E3

3. +1.5V to +1.5VS Ttransfer MOS change to Q45 SI4392DY-T1-E3

1.Change Q200.3 net form GND SIGNAL to GND.

2.Change C1517.1 net form GND SIGNAL to GND.

0603) to SM01000BP0L (BLM18BB050SN1D_0603~D)

Change D17 from SC1B411D010 ( S DIO RB411DT146 SOT23 ) to SCSB491DA0L
(S SCH DIO RB491D SC59-3 ROHM)

1. Update JDP1 symbol.

2. Change JLVDS1 symbol to JAE_FI-G40SB-VF25-DT

3. Change JWOOFER1 symbol to MOLEX_53398-0271~D

2.Change C217,C864 from 12P_0402_50V8J to 15P_0402_50V8J

3.Change C318 from 27P_0402_50V8J to 33P_0402_50V8J

1. Add U108 OR gate.

2. Change C336, C337, C349, C350 , C354, C355 from 1U_0603 to 2.2U_0805.

Add R1012 & R1013 place close U40 Pin2 & Pin3
Add R1014 & R1015 place close U40 Pin 21 & Pin22

1a. Change U21 & U22 from DMN3030LSS-13 to SI4800BDY
1b. Change U25 SI4800BDY to Q45 SI4329DY

change C133,C138,C144,C152,C163,C251,C255,C281,C425 from SE000009W0L to
SE107475M0L

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)

Rev02 (X01)Due to Janpan produce Y5V no more in the fucture.Compal2009/03/06Market / Capacitor

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

EE PIR-1

EE PIR-1

EE PIR-1

LA-5152P

LA-5152P

LA-5152P

45 51Monday, June 15, 2009

45 51Monday, June 15, 2009

45 51Monday, June 15, 2009

1

A00

A00

A00

http://mycomp.su/x/

5

R e qu est

R e qu est

I

Ite m Issu e D escr ip tion

Ite mI tem

D D

C C

P

ag e #

P a ge # T itle

tem

P a ge #P a ge#

27

31 26 Speaker/Sub woofer AMP Gain setting to 20.6dB

4 2009/03/06 Compal

2

3528

25 Meet audio HP EA spec30 HD Audio_IDT92HD73C Compal Rev02 (X01)

Title

TitleTitle

igabit LAN_RTL8111DL 1. Prevent B+_BIAS damage Q3

G

D ate

D ateD ate

2009/03/06VGA / LVDS

2009/03/11

2009/03/11

R e qu estRequ est

O w ner

O w ner

O w nerO wn er

4

ersion C hange L ist ( P . I . R . L ist )

V ersion C ha n g e L ist ( P . I. R . L ist )

V

V ersion C ha n g e L ist ( P . I. R . L ist )V ersion C ha n g e L ist ( P . I. R . L ist )

Issu e D escr ip tionD ate

Issu e D escr ip tionIss u e D escr ip tion

2. Correct +LAN_DVDD12 power name

3. Meet LAN EMI test.

Compal

Compal Rev02 (X01)

DELL Rev02 (X01)

1. LCD panel need to be turned backlight under this crisis recovery mode.

2. when FN+ D is pressed during POST, the LCD will perform the LCD
BIST test and boot to PSA directly

Error net name PBTN_OUT#2128 ICH9M(3/5)_PM,GPIO 2009/03/06

3

ag e 2

Page 2

P

Page 2Pag e 2

1. Add R1006 (1.5M_0402)

2. Correct C302 & C303 power source from +LAN_VDD12 to +LAN_DVDD12

3. Pop C873 ~ C880 , SE07168AC0L(S CER CAP 6.8P 50V C NPO 0402)

add a gate to OR VGA_PWM and EC_PWM signals Rev02 (X01)

Correct U6C.R3 net to PBTN_OUT#

Form 4800BDY change to SI4392DY4 Correct +1.5V to +1.5VS.DC/DC Interface chip name29 Power Rail 2009/03/06 Compal Rev02 (X01)

1.C354,C355,C336,C337 change to 2.2uF 0805 size X7R

2.Add a series 2k ohm resistor between these caps and the maxim amp U10,U12,.

3.At the pin of the maxim amp U10,U12 Pin 15 and U10,U12 Pin13 add a 220pF
cap 0603 NPO to ground.

1. C913,C914,C910,C909 form 6800P_0402_16V7K~D change to
2200P_0402_25V7K~D

2. R907,R902 100K_0402_1% to 280K

3. Delete C951,C952 0.015U_0402_16V7K part.

4.R900,R905 form 4.87K_0402 change to 43.2K_0402

5. U14 form MAX9736B change to MAX9736A

5.R901,R903,R906,R908 form 20K_0402 change to 25.5K_0402

2

S

olu t io n D esc r ip tion

So l u tion D es crip t io n R ev .

So l u tion D es crip t io nSo l u tion D es crip t io n

1

Rev02 (X01)

R e v.

R e v.R ev .

32 34 Screws/LED/Switch Modify MB drawing. 1. H2 change to NON-PTH 1.6mm.

33

37 Follow RF request.Compal RF2009/03/13

B B

43 Cantiga (2 of 7) 2009/04/27 Correct HDMI CLK/DATA part B and C connect DDPC_CTRLCOK should be connecting HDMI_C_CLK. =>Port C

A A

26
31
32

6
19
27
31

33

11 COMPAL Rev03 (X02)

Speaker/Sub woofer AMP
EC_KB926/BIOS/Reed SW
PWROK/BTN/KB/Touch Pad

ODD/SATA HDD2934

Speaker/Sub woofer AMP

Display Port27 Rev02 (X01)

Clock Generator CK505
ICH9M(1/5)_LAN,HD,SATA,LPC
Mini Card_WLAN/WWAN
EC_KB926/BIOS/Reed SW

HD Audio_IDT92HD73C

DC/DC Interface

HDMI 2009/03/1636 COMPAL Rev02 (X01)

2009/03/11 ME Rev02 (X01)

2009/03/11 Follow EMC request.

2009/03/11 COMPAL Band-Pass Filiter,fc=100 Hz, 500Hz, Av=1.45V/V35 form MAX9737 change to MAX9736A. please see page 26

2009/03/11 COMPAL Meet HDMI test36 1. R1518 0_1206 change to non-pop.

2009/03/13

2009/03/13

2009/03/13

2009/03/14 COMPAL31 Rev02 (X01)

EMC Rev02 (X01)

ME Follow ME request.2009/03/11

COMPAL Delete E-SATA by-pass R.USB/BlueTooth/Camera Delete R1012,R1013,R949,R950,R951,R952,R1014,R1015 part .2738 Rev02 (X01)

COMPAL Modify Audio control circuit. 2539 please see page 25 about U46,U42,U108,U48,U47,U41,Q48 parts. Rev02 (X01)

COMPAL40 Rev02 (X01)1.R344 change to 470K.

For reduce power consumption

correct SPI_CLK_R non_pop parts.41 EC_KB926/BIOS/Reed SW

PARTS S-(SA00002C610) KAT00

2,. Delete H13 part

1. D20,D21 (PACDN042Y3R_SOT23-3) change to POP.

2. R330 (0_0402), C483 (0.1U_0402) change to POP.

3. Reserve ESD diode D1505 PJDLC05_SOT23-3 on touchpad

4. Change D1504 part to PJDLC05_SOT23-3.

JODD1 form MOLEX_47639-4000_NR change to MOLEX_47639-3000_13P

2. F1500 1.5A_6V_1206L150PR~D change to POP.

RF reserve

1.C1531 part. CLK_14M_ICH need close U1

2.C1532 part. HDA_BITCLK_AUDIO need close U6

3.C1533 part.PCI_CLK need close U1

4.c1534 part. CLK_PCI_EC need close U1

5. C1535,C1536 part. Reserve 47 pF for +1.5V and +3V

6. C1537, C1538 part. Reserve 47 pF for +1.5V and +3V

7. Move R333 close to U19 and need reserve C1539 part.

2.R346 change to 2M.

R330,C483 change to non_pop.

R1500 change to pop part..42 Meet HDMI chip spec. X7616831L04 ALT. GROUP

DDPC_CTRLDATA should be connecting HDMI_C_DATA. =>Port C
SDVO_CTRLCLK should be connecting HDMI_B_CLK. =>Port B
SDVO_CTRLDATA should be connecting HDMI_B_DATA. =>Port B

Rev02 (X01)

Rev02 (X01)26

Rev02 (X01)

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

EE PIR-2

EE PIR-2

EE PIR-2

LA-5152P

LA-5152P

LA-5152P

A00

A00

46 51Monday, June 15, 2009

46 51Monday, June 15, 2009

46 51Monday, June 15, 2009

1

A00

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

http://mycomp.su/x/

5

R e qu est

R e qu est

009/04/27

R e qu estRequ est

O w ner

O w ner

O w nerO wn er

I

Ite m Issu e D escr ip tion

Ite mI tem

D D

C C

P

ag e #

P a ge # T itle

tem

P a ge #P a ge#

4

4 HDMI Conn 2009/04/27 Follow EMI request of HDMI 36 COMPAL L1504,L1505, L1506, L1507 parts change to DLW21SN900HQ2L Rev03 (X02)

45

53 07

37

33 COMPAL Rev03 (X02)Delete +3V_WLAN discharge circuit.

2847 2009/04/28 COMPAL Chagne JEXP1 symbol.Mini Card_WPAN / Express JEXP1 change to TAITW_PXPXAE-000LBS2ZZ4N0_NR part. Rev03 (X02)

24
35

30

Title

TitleTitle

Display Port

DC/DC Interface

ICH9M(5/5)_POWER&GND
Gigabit LAN_RTL8111DL
CRT / LVDS CONN

Penryn(1/3)-AGTL+/ITP-XDP
USB/BlueTooth/Camera

D ate

D ateD ate

2

2009/04/2846

2009/04/29

2009/04/29

2009/04/3051 32 PWROK/BTN/KB/Touch Pad COMPAL follow EMC request.

2009/04/3052 23

2009/04/30 C19,C21,C463,C935 form S CER CAP 10U 16V Z F(Y5V) 1206 H1.15 change to

4

ersion C hange L ist ( P . I . R . L ist )

V ersion C ha n g e L ist ( P . I. R . L ist )

V

V ersion C ha n g e L ist ( P . I. R . L ist )V ersion C ha n g e L ist ( P . I. R . L ist )

Issu e D escr ip tionD ate

Issu e D escr ip tionIss u e D escr ip tion

COMPAL Follow INTEL Design Guide DP AUX circuit. DPB_AUX_SW need connect R1553 (100kohm) to pull down.

Delete +3V_WLAN discharge circuit.

COMPAL Change to PSL parts

COMPAL

SE053106Z8L S CER CAP 10U 10V Z Y5V0805 H1.25

3

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Page 3

P

Page 3Pag e 3

DPB_AUX#_SW need connect R1554 (100Kohm) to pull up +3VS.

1.Change L77 and L78 from 120 ohms to 600 ohms bead.

2. Implement ESD diode on cap sensor D1504 PJDLC05_SOT23-3

3. Implement ESD diode on TP_CLK and TP_DATA for touchpad D1505
PJDLC05_SOT23-3

4. Reserve PES24VS2UT_SOT23-3 ESD diode for speaker connector of D20, D21

D2,D3,D4,D5,D6,D7,D19 form SC1H751H01L S DIO CH751H-40PT SOD-323 Change
to SCS0340L01L SDMK0340L-7-F_SOD323-2~D

2

S

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So l u tion D es crip t io n R ev .

So l u tion D es crip t io nSo l u tion D es crip t io n

1

R e v.

R e v.R ev .

Rev03 (X02)

Rev03 (X02)3448 Delete H1 part.Original H1 is fan alignment pin , but now cancel this function.COMPAL2009/04/29Screws/LED/Switch

Rev03 (X02)2549 Change R1549.1, U46.5 and U47.5 to +3VALW powerChange EAPD# pull up to (+3VALW).COMPALHD Audio_IDT92HD73C

Rev03 (X02)2350 Change +ICH_V5REF_RUN and SUS resistanceCOMPALICH9M(5/5)_POWER&GND R233,R234 form 10_0402_5% change to 100_0402_5%

Rev03 (X02)

Rev03 (X02)

Rev03 (X02)

53 07

B B

59 25 HD Audio_IDT92HD73C 2009/05/04 COMPAL C1527, C1528, C1529, C1530 Change to 270P_0402_50V7K~DChange package form 0603 to 0402. Rev03 (X02)

60 35 VGA / LVDS 2009/05/05 Add MOSFET circuit for LVDS converter power Rev03 (X02)COMPAL

61 24 ICH9M(5/5)_POWER&GND 2009/05/06 COMPAL Modify +3VALW_S5_ICH circuit. R972 form 470Kohm change to 300Kohm.

62 VGA / LVDS35 2009/05/06 COMPAL Modify Keyboard back light circuit. R928 form 470Kohm change to 300Kohm.

63 24 Gigabit LAN_RTL8111DL

64 26 Speaker/Sub woofer AMP COMPAL For Part source2009/06/04

A A

65 30 USB/BlueTooth/Camera 2009/06/04 COMPAL De_pop SB00000960L (S TR SSM3K7002FU 1N SC70-3)

30

Penryn(1/3)-AGTL+/ITP-XDP
USB/BlueTooth/Camera

2009/04/30

2009/05/01 Reduce ICH power consumption at S5 mode.ICH9M (5/5)2354 Rev03 (X02)COMPAL

COMPAL

COMPALUSB/BlueTooth/Camera56 30 2009/05/01

COMPAL57 31 EC_KB926/BIOS/Reed SW 2009/05/04 Support S5 Power on when CRT insert Pull-up MSEN# from +3VS to +3VALW Rev03 (X02)

COMPAL58 31 EC_KB926/BIOS/Reed SW 2009/05/04 FFS alert signal w ill change to other GPIO.

2009/05/07

COMPAL Modify LAN_IO power circuit. R236 form 470Kohm change to 300Kohm.

Modify +3VALW to +3VS and +5VALW to +5VS circuit. Modify DC to DC circuit. Rev03 (X02)COMPAL

Populate Q47 and non-populate R1022

1.Non-populate R958, R959 2. R953 change to 390 ohm.USB/BlueTooth/Camera 2009/05/01 Change E-SATA Output Swing Control TO 1.2x55 30

Solve USB Power Share fail issue.

Because original PIRQH is by USB controller used.

due to E-SATA connector doesn't sopport E-SATA detect function. Rev10 (A00)

Swap GPIO for USB_DET_DELAY# and EC_SPK_HP_MUTE#.

FFS change int to PIRQ setting from PIRQH to PIRQE Rev03 (X02)

R973 form 1.5Mohm change to 2M ohm.

R931 form 1.5Mohm change to 2M ohm.

R1540 form 1.5Mohm change to 2M ohm.

C901, C902, C903, C916, C918, C977 form SE00000NZ0L (S CER CAP 22U 25V
K X7R 1210 H2.5) change to SE00000GF8L (S CER CAP 22U 25V K X5R 1210 H2.5)

Location: Q11

Rev03 (X02)

Rev03 (X02)

Rev03 (X02)

Rev03 (X02)

Rev03 (X02)

Rev10 (A00)

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

EE PIR-3

EE PIR-3

EE PIR-3

LA-5152P

LA-5152P

LA-5152P

A00

A00

47 51Monday, June 15, 2009

47 51Monday, June 15, 2009

47 51Monday, June 15, 2009

1

A00

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

http://mycomp.su/x/

5

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TitleTitle

2 2009/06/04 Compal

3

2567 Solve S0 to S3 pop noise of HP.HD Audio_IDT92HD73C R1549 change to De_POP.

WROK/BTN/KB/Touch Pad Change to DELL AVL Part Change PN: SCA00000A00 (S ZEN ROW PJDLC05 3P C/A SOT23) to

P

D ate

D ateD ate

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O w ner

O w nerO wn er

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ersion C hange L ist ( P . I . R . L ist )

V ersion C ha n g e L ist ( P . I. R . L ist )

V

V ersion C ha n g e L ist ( P . I. R . L ist )V ersion C ha n g e L ist ( P . I. R . L ist )

Issu e D escr ip tionD ate

Issu e D escr ip tionIss u e D escr ip tion

Compal2009/06/04

3

2

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So l u tion D es crip t io nSo l u tion D es crip t io n

SCA00000J0L (S ZEN ROW PESD5V2S2UT 3P C/A SOT23 ESD)
Location: D1504, D1505

1

R e v.

R e v.R ev .

Rev10 (A00)

Rev10 (A00)

68 12 CRT_HSYNC and CRT_VSYNC net name errorCANTIGA((3/7)-VGA/LVDS/TV Compal 1. R116.1 net change to CRT_HSYNC_R

HDMI Compal Cancel solder mask of by pass 0 ohm 36 2009/06/0469 Rev10 (A00)

71 short parts of R2,R4,R3,R5,R6,R7,R8,R10,R12,R42,R43,R16,R17,R18,R19,R21,R23,

72 26 Speaker/Sub woofer AMP Compal 1. Change C908,C912 form 0.22uF to 0.1uF.

C C

73 26 Speaker/Sub woofer AMP 2009/06/08 Compal 1. Add D1507, R1558, C1547 diode and RC delay time of MUTE# pin.Modify Main speaker AMP SHDN and mute # control circuit Rev10 (A00)

74 30 USB/BlueTooth/Camera 2009/06/08 Compal Chagne U40 from SA00002D80L (S IC PI2EQX3201BZFEX TQFN 36P) to

75 25 HD Audio_IDT92HD73C 2009/06/08 Compal Support unboot pc-beep sound function Pop R1549 Rev10 (A00)

B B

2009/06/04 Short by-pass 0 ohm

2009/06/08 Main speaker AMP gain setting to 13dB

Compal

Solve E-SATA re-driver issue Rev10 (A00)

2. R117.1 net change to CRT_VSYNC_R

1. Cancel solder mask R1517,R1515,R1514,R1507,R1509,R1508,R1522,R1510 parts.

2. Cancel solder mask R1521 part.

3. Cancel solder mask L26,L71,L72,L27 parts.

R312 change to 33KohmEC_KB926/BIOS/Reed SW Compal70 31 2009/06/04 Change Board ID Rev10 (A00)

R26,R28,R31,R33,R35,R37,R40,R39,R14,R15,R44,R99,R94,R134,R1004,R884,R235,
R942,R248,R250,R285,R911,R912,R913,R914,R291,R918,R921,R91 9,R920,R915,R916,
R917,R922,R923,R924,R925,R292,293,R292,R293,R294,R298,R295,R296

2. Change R903,R908 form 25.5Kohm to 16.5Kohm

3. Change R901,R906,R902,R907 form 280Kohm to 182Kohm

4. Change R904,R909 form 16.9ohm to 17.8Kohm

5. Change R900,R905 form 43.2K ohm to 11Kohm

SA00002YQ0L (S IC PI2EQX3201BLZFEX TQFN 36P)

Rev10 (A00)2009/06/04

Rev10 (A00)

Rev10 (A00)

Rev10 (A00)76 27 Mini Card_WLAN/WWAN 2009/06/15 Compal delete short trace of jump Delete R1010,R1011,R911,R912 pin1 and pin2 connect trace.

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

5

4

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

3

2

Date: Sheet of

Compal Electronics, Inc.

EE PIR-4

EE PIR-4

EE PIR-4

LA-5152P

LA-5152P

LA-5152P

A00

A00

48 51Monday, June 15, 2009

48 51Monday, June 15, 2009

48 51Monday, June 15, 2009

1

A00

http://mycomp.su/x/

5

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Title

TitleTitle

D ate

D ateD ate

+3VALWP/+5VALWP 01/22

01/22+3VALWP/+5VALWP40

+1.05V_VCCP/
+1.8VSP

01/22

R e qu estRequ est

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4

ersion C hange L ist ( P . I . R . L ist )

V ersion C ha n g e L ist ( P . I. R . L ist )

V

V ersion C ha n g e L ist ( P . I. R . L ist )V ersion C ha n g e L ist ( P . I. R . L ist )

Issu e D escr ip tionD ate

Issu e D escr ip tionIss u e D escr ip tion

Compal
Mike

Compal
Mike

Setiing +5VALW OCP to 13.56A

Setiing +3VALW OCP to 14.26A

3

Compal
Mike Setiing +1.05V_VCCP OCP to 23A

2

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C

hange PR68 from P/N:SD03429438L (294K +-1% 0402) to

SD03433238L (332K +-1% 0402)

Change PR69 from P/N: SD03424938L (249K +-1% 0402) to
SD03434038L (340K +-1% 0402)

Change PR81 from P/N: SD03480618L (8.06K +-1% 0402) to
SD03493118L (9.31K +-1% 0402)

1

R e v.

R e v.R ev .

X

X01

X01

01

04

05

06

C C

07

08

09

10

11

B B

12

13

14

15

16

A A

42 +1.5VSP/+0.75VSP

38

DCIN/Precharger 01/22

01/22

42 +1.5VSP/0.75VSP 01/22

46

02/09Charger X01

Compal
Mike

Compal
Mike

Compal
Mike

Compal
Mike

43 CPU_CORE 02/24 Compal

Mike

43 CPU_CORE 02/24 Compal

Mike

02/24CPU_CORE43

Compal
Mike

40 +3VALWP/+5VALWP 02/24

44

02/24BATTERY CONN

02/24Charger39

Compal
Mike

Compal
Mike

Compal
Mike

41 +1.05V_VCCP 02/24

+3VALWP/+5VALWP

02/2440

03/03DCIN / Precharge38

Compal
Mike

Compal
Mike

Compal
Antony

Setiing +1.5VSP OCP to 15.84A

Common circuit design modify

HW need to use +1.5VSP PGOOD signal,so need
to add a pull high resister.

Take off Cells selector function.

Change CPU_CORE low-side MOSFET

HW don't need to use VR_TT# signal,so
depopulate pull high resister.

Change input cap from X7R(85 ) to X6S(105 )

℃ ℃

Take off Manufacturer:COMPOSTAR from PC64

Take off non-PSL Manufacturer:Panjit

Take off non-Lead Free material.

Change choke setting

Change choke reated current from 11A to 14.2A

Prevent diode breakdown from battery inrush
current

Change PR101 from P/N: SD03413728L (13.7K +-1% 0402) to
SD03410528L (10.5K +-1% 0402)

Change PR10 from P/N: SD00103308L (33 +-5% 1206) to
SD011680A8L (68 +-5% 1206)
Add PR208 SD011680A8L (68 +-5% 1206) parallel with PR10

Add PR207 SD03410038L (100K +-1% 0402) between PU8 pin6
and PR97 pin 2.

Populate PR88,take off PR37 and PQ10,change PR175 from
47K to SD02810018L(1K +-5% 0402)

Change PQ34,PQ35,PQ36,PQ37 from
(SI4430BDY-T1-E3 1N SO-8) to
SB00000DA00(SI4634DY-T1-E3 1N SO8)

Depopulate PR145 SD03449908L(499 +-1% 0402)

Change PC123,PC124,PC125,PC133,PC134,PC135
from (10U 25V M X5R1206 H1.6) to
SE153106K8L(10U 25V K X6S 1206 H1.6)

Change PC64 from P/N: SE080224K8L (.22U 10V K X7R 0603)
to SE080224M8L (.22U 10V K X7R 0603)

Change PQ45,PQ46 from P/N:
SB000006800 (2N7002W T/R7 1N SOT-323)
to SB00000B30L (PMF3800SN 1N SC70-3)

Change PR29 from P/N:
SD021200D0L (S RES 1W .02 +-1% 2512)
to SD000001F0L (S RES 1W .02 +-1% 2512 50PPM/C)

Change PL6 from
SH00000BQ0L (2.2UH +-20% MPLC1040L2R2 11A)
to SH000009U00 (1UH +-20% FDUE1040D-1R0M=P3 21.3A)

Change PL4,PL5 from
SH00000BQ0L (2.2UH +-20% MPLC1040L2R2 11A)
to SH00000CG0L (2.2UH 20% FDVE1040-2R2M=P3 14.2A)

Change PD3 from SCS00002G00 to SC11N414880

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

Compal Electronics, Inc.

PWR PIR-1

PWR PIR-1

PWR PIR-1

LA-5152P

LA-5152P

LA-5152P

49 51Monday, June 15, 2009

49 51Monday, June 15, 2009

49 51Monday, June 15, 2009

1

A00

A00

A00

http://mycomp.su/x/

5

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1

3

7

4

8

Title

TitleTitle

D ate

D ateD ate

8 DCIN / Precharge 03/03

0

+3VALWP/+5VALWP 03/03 Compal

R e qu estRequ est

O w ner

O w ner

O w nerO wn er

Compal
Antony

4

ersion C hange L ist ( P . I . R . L ist )

V ersion C ha n g e L ist ( P . I. R . L ist )

V

V ersion C ha n g e L ist ( P . I. R . L ist )V ersion C ha n g e L ist ( P . I. R . L ist )

Issu e D escr ip tionD ate

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3

Change part number to L-end

C

hange Rtrip resistance to meet OCP setting

2

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olu t io n D esc r ip tion

So l u tion D es crip t io n R ev .

So l u tion D es crip t io nSo l u tion D es crip t io n

C

hange PD4 part number from

SC1A204U000 to SC1A204U00L

C

hange PR68 from 332K ohm to 205K ohm

1

R e v.

R e v.R ev .

01

X

X01

Antony

19

03/03+3VALWP/+5VALWP40

Compal

Change Rtrip resistance to meet OCP setting

Change PR69 from 340K ohm to 243K ohm

X01

Antony

20

21

22

C C

23

24

25

26

27

B B

28

29

41 +1.05V_VCCP/

03/03 Compal

+1.8VSP

41

+1.05V_VCCP/

03/03 Compal

+1.8VSP

42 +1.5VSP/+0.75VSP 03/03

43

43

43

43

CPU_CORE43

CPU_CORE

CPU_CORE

CPU_CORE

CPU_CORE

03/03

03/03

03/03

03/16

03/16

44 BATTERY CONN 03/16

39 Charger 03/20

Antony

Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Change Rtrip resistance to meet OCP setting

Stabilize output voltage

Change Rtrip resistance to meet OCP setting

To avoid noise

To avoid noise

Reserve space for load line shift control

To improve transient response

Let difference of CPU Load Line and
Spec smaller than 2mV

Disable Hardware CPU OTP circuit

Change 65W CP setting

Change PR81 from 9.31K ohm to 7.87K ohm

Add PC83 220uF Capand Reserve PC99 Cap space
to output

Change PR101 from 10.5K ohm to 6.49K ohm

Add PC176、PC179 0.1uF Cap to +CPU_B+

Add PC178、PC180 2200pF Cap to +CPU_B+

Reserve PR194 space

Change PC151 from 0.068uF to 0.1uF

Change PR173 from 3.57K ohm to 3.74K ohm

Reserve PQ45、PQ46、PR199、PR200 space

Changer PR89 from PR89 from 143K ohm to 97.6K ohm

X01

X01

X01

X01

X01

X01

X01

X01

X01

X01

30

31

32

A A

41

41

+1.8VSP

+1.05V_VCCP/
+1.8VSP

39 Charger 05/06

+1.05V_VCCP/

03/20 Compal

Antony

03/20

Compal
Antony

Compal
Antony

For phash margin improved

For phash margin improved

TI FAE request

Add PC87 1000pF capacitor between PU13 pin6 and pin7

Add PC126 10uF capacitor between PU13 pin6 and GND

Reserve PQ26,PD19,PD20,PC203,PR115,PR133 space

X01

X01

X02

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PWR PIR-1

PWR PIR-1

PWR PIR-1

LA-5152P

LA-5152P

LA-5152P

A00

A00

50 51Monday, June 15, 2009

50 51Monday, June 15, 2009

50 51Monday, June 15, 2009

1

A00

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

http://mycomp.su/x/

5

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TitleTitle

harger 05/06

C

D ate

D ateD ate

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O w nerO wn er

4

ersion C hange L ist ( P . I . R . L ist )

V ersion C ha n g e L ist ( P . I. R . L ist )

V

V ersion C ha n g e L ist ( P . I. R . L ist )V ersion C ha n g e L ist ( P . I. R . L ist )

Issu e D escr ip tionD ate

Issu e D escr ip tionIss u e D escr ip tion

Compal
Antony

love PQ5 design margin issue

s

3

2

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P

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So l u tion D es crip t io n R ev .

So l u tion D es crip t io nSo l u tion D es crip t io n

Change PQ4,PQ5,PQ7 from FDS4435 to

DS6675 (SB966750080)

F

1

R e v.

R e v.R ev .

02

X

34

35

36 39

37 39

38 39

C C

39 38

B B

43

39

CPU_CORE

Charger

Charger 06/04

Charger 06/04

Charger 06/04 Compal

DCIN/Precharge 06/04

05/06

05/06

Compal
Antony

Compal
Antony

Compal
Antony

Compal
Antony

Antony

Compal
Antony

Montavina platform design Change PC136 from 15nF to 22nF

TI FAE request

TI FAE request Delete PQ26,PD19,PD20,PC203,PR115,PR133

TI request to reserve protection circuit

Recover a correct component recover correct component PR89 to 97.6K ohm

DELL command

Reserve PQ26,PD19,PD20,PC203,PR115,PR133,PC25
space

Reserve PR90 0ohm , PR37 0ohm , PC100 space
,PC25 0.022uF ,PC20 change to 0603 size

Change PQ2 from SB502060000 (RHU002N06_SOT323-3)
to SB50301008L (FDV301N 1N SOT23-3)

X02

X02

X03

X03

X03

X03

A A

DELL CONFIDENTIAL/PROPRIETARY

Compal Electronics, Inc.

Compal Electronics, Inc.

Compal Electronics, Inc.

PWR PIR-3

PWR PIR-3

PWR PIR-3

LA-5152P

LA-5152P

LA-5152P

51 51Monday, June 15, 2009

51 51Monday, June 15, 2009

51 51Monday, June 15, 2009

1

5

4

PROPRIETARY NOTE: THIS SHEET OF ENGINEERING DRAWING AND SPECIFICATIONS CONTAINS CONFIDENTIAL
TRADE SECRET AND OTHER PROPRIETARY INFORMATION OF DELL INC. ("DELL") THIS DOCUMENT MAY NOT
BE TRANSFERRED OR COPIED WITHOUT THE EXPRESS WRITTEN AUTHORIZATION OF DELL. IN ADDITION,
NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS WAY BE USED BY OR DISCLOSED TO ANY THIRD
PARTY WITHOUT DELL'S EXPRESS WRITTEN CONSENT.

3

2

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

Date: Sheet of

A00

A00

A00