Dell Inspiron 1525 Schematic

5

4

3

2

1

CPU DC/DC

Spears Intel UMA Block Diagram

D D

C C

1394

26

SD/SDIO/MMC MS/MS Pro/xD

RJ11 CONN (Option)

B B

Digital Mic Array

26

31

MIC IN

HP1

HP2

Internal Analog MIC

CLK GEN

ICS9LPRS365

DDRII

Slot 0

533/667

DDRII

Slot 1

533/667

1394

25,26

Ricoh R5C833

CardReader

MDC MODEM (Option)

Azalia CODEC

Sigmatel STAC 9228

4

14

15

31

32

DDRII 667 Channel A

DDR II 667 Channel B

PCI

AZALIA

2CH SPEAKER

A A

OP AMP

MAX9789A

33 37

Merom 4M FSB:667MHz/800MHz

Crestline-GM

AGTL+ CPU I/F INTEGRATED GRAHPICS LVDS, CRT I/F

INTEL

ICH8-M

10 USB 2.0/1.1 ports

(10/100/1000Mb)ETHERNET

High Definition Audio

ATA 66/100

ACPI 1.1 LPC I/F

PCI/PCI BRIDGE

SATA

HDD

24 24

PATA

ODD

5,6,7

Host BUS 533/667MHz

DDR I/F

8,9,10,11,12,13

DMI I/F 100MHz

19,20,21,22

Capacity Button

PCIE x 16

Intel CPU

Project code : 91.4W001.001 PCB P/N : 07211 Revision : -1

RGB CRT

LVDS

SVIDEO

SDVO

AZALIA

PCIE

USB 2.0

LPC Bus

KBC

Winbond WPC8763L

Touch Pad

Int. KB

37

37 36

PCIE x 1

34

S/W CIR

CRT

LCD

S-Vedio (Upsell)

SiI 1392 (Upsell)

PCIE x 1 & USB 2.0 x 1

10/100 NIC

Marvell 88E8040

PCIE x 2 & USB 2.0 x 1

PCIE x 1 & USB 2.0 x 1

SPI

Thermal & Fan

G792

2007/08/29

17

18

16

23

27

USB 2.0 x 1

Flash ROM

1MB

HDMI (Upsell)

RJ45 CONN

Mini-Card X2

802.11a/b/g BT/UWB/Robson

Mini-Card X1

WWAN(Upsell)

CAMERA (Option)

Lift Side: USB x 2 Right Side:

USB x 1 USB x 1(Upsell)

35

Power SW

TI TPS2231

New Card

ISL6262A

INPUTS

DCBATOUT

OUTPUTS

VCC_CORE

SYSTEM DC/DC

TPS5117

INPUTS

DCBATOUT

OUTPUTS

1D05V_S0 1D8V_S3

SYSTEM DC/DC

TPS51120

INPUTS

16

28

SYSTEM DC/DC

OUTPUTS

5V_AUX_S5 5V_S5DCBATOUT 3D3V_S5

TPS51100

INPUTS

28

29 30

30

1D8V_S3

SYSTEM DC/DC

INPUTS

1D8V

OUTPUTS

0D9V_S3

LDO

OUTPUTS

2D5V3D3V 1D5V_S0

SYSTEM DC/DC

24

INPUTS

DCBATOUT

24

LDO

OUTPUTS

3D3V_AUX_S5 1D5V_S0

MAXIM CHARGER

MAX8731A

INPUTS

AD+ BAT+

OUTPUTS

DCBATOUT

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

DS2 System Block Diagram

Spears-Intel -1

147Wednesday, September 12, 2007

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TI TPS51120

CPU_CORE ISL6262A

VID0

D D

VID1

VID2

VID3

VID4

VID5

VID Setting

VID0(I / 3.3V)

VID1(I / 3.3V)

VID2(I / 3.3V)

VID3(I / 3.3V)

VID4(I / 3.3V)

VID5(I / 3.3V)

Output Signal

VROK()

Output Power

VCC_CORE_PWR(O)

VRPWRGD

VCC_CORE_S0(Imax=35A)

3V/5V_EN

DCBATOUT

Input Signal

CPUCORE_ON

VCC_SENSE

C C

VSS_SENSE

EN (I / 3.3V)

Voltage Sense

VSEN(I / Vcore)

RGND(I / Vcore)

DCBATOUT

5V_AUX_S5

Input Power

DCBATOUT

5V_S0

3D3V_S0

VCC(I)

AD_OFF

AD_JK

B B

5V_AUX_S5

TI TPS51100

Input Signal

51120_EN2

51120_EN1

VIN

Input Power

VIN

V5FILT(I / 5V)

Input Signal

(I)

Input Power

VCC(I)

0.9V/DDR_VREF_S3

PM_SLP_S4# PM_SLP_S3#

Input Signal

S5 S3

PM_SLP_S4#

EN_PSV(I / 5V)

Output Power

Input Power

DCBATOUT

5V_S5

A A

VCC(I)

5

VCC(O)

0D9V_DDR_VTT

DDR_VREF_S3

4

VCC

DCBATOUT

PM_SLP_S3#

5V_S5 Output Power

DCBATOUT

VIN

EN_PSV(I / 5V)

VCC

VIN

TPS51117_1D8V_S3

Input Signal

Input Power Output Power5V_S5

TPS51117_1D05V

Input Signal

Input Power

3D3V/5V

FOR

3.3V FOR

5.0V

Adapter

Output Signal

3

Output Signal

PGOUT1(OD / 5V)

PGOUT2(OD / 3D3V)

Output Power

(O)

Output Power

VCC(O)

Output Signal

PGOUT(OD / 5V)

1D8V_PWR

Output Signal

PGOUT(OD / 5V)

1D05V_PWR

5V(O)

3D3V(O)

AD_IN

AD+

CPUCORE_ON

1D8V_S3

CPUCORE_ON

1D05V_S0 (15A)

CPUCORE_ON(Pull High 3D3V)

PM_SLP_S3#

5V_AUX_S5

3D3V_S0

3D3V_AUX_S5

5V_S5 (6A)

3D3V_S5 (5A)

1D8V_S3

PM_SLP_S3#

Charger_MAX8731A

CHARGE_OFF

BAT+SENSE

BT_SCL

BT_SDA

AC_IN

AD+

2

CLS (I / 3.3V)

BATT (I / 3.3V)

SCL (IO / 5V)

SDA (IO / 5V)

PB0/MOSI/AIN0

Input Power

DCIN (I)

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

1D5V_S0

5V_S5

1D8V_S3

VCNTL

VIN

EN

APL5915

2D5V_S0

INPUT OUT

G9131

1D25V_S0

5V_S5

VCNTL

VIN

G971

Output SignalInput Signal

LDO (O / 5.4V)

XTAL2/PB4 (O/5V)

XTAL1/PB3 (O/5V)

Output Power

Power Block Diagram

DS2-Intel -1

CPUCORE_ON

POK

1D5V_S0

VOUT(O)

2D5V_S0

CPUCORE_ON

POKEN

1D5V_S0

VOUT(O)

MAX8731_LDO

VCC (O)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DCBATOUT

BT+

247Wednesday, September 12, 2007

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INTEL ICH8-M STRAP PIN

Signal Usage/When Sampled

HDA_SDOUT XOR Chain Entrance/

4 4

HDA_SYNC

GNT2#

GPIO20

GNT3#

GNT0# SPI_CS1#

INTVRMEN

3 3

LAN100_SLP

SATALED#

SPKR

TP3

GPIO33/ HDA_DOCK_EN#

PCIE Port Config 1 bit1, Rising Edge of PWROK

PCIE Port Config 1 bit0, Rising Edge of PWROK.

PCIE Port Config 2 bit0, Rising Edge of PWROK.

Reserved

Top-Block Swap Override. Rising Edge of PWROK.

Boot BIOS Destination Selection. Rising Edge of PWROK.

Integrated VccSus1_05 VccSus1_5 and VccCL1_5 VRM Enable/Disable.Always sampled.

Integrated VccLAN1_05 VccCL1_05 VRM enable /Disable. Always sampled.

PCIE LAN REVERSAL.Rising Edge of PWROK.

No Reboot. Rising Edge of PWROK.

XOR Chain Entrance. Rising Edge of PWROK.

Flash Descriptor Security Override Strap Rising Edge of PWROK.

Allows entrance to XOR Chain testing when TP3 pulled low at rising edge of PWROK.When TP3 not pulled low at rising edge of PWROK,sets bit1 of RPC.PC(Config Registers:offset 224h) Sets bit0 of RPC.PC(Config Registers:Offset 224h)

Sets bit2 of RPC.PC(Config Registers:Offset 224h)

Weak Internal PULL-DOWN.NOTE:This signal should not be pull HIGH.

Sampled low:Top-Block Swap mode(inverts A16 for all cycles targeting FWH BIOS space). Note: Software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down.

Controllable via Boot BIOS Destination bit (Config Registers:Offset 3410h:bit 11:10). GNT0# is MSB, 01-SPI, 10-PCI, 11-LPC.

Enables integrated VccSus1_05,VccSus1_5 and VccCL1_5 VRM when sampled high

Enables integrated VccLAN1_05,VccCL1_05 VRM when sampled high

This signal has weak internal pull-up. set bit27 of MPC.LR(Device28:Function0:Offset D8)

If sampled high, the system is strapped to the "No Reboot" mode(ICH8M will disable the TCO Timer system reboot feature). The status is readable via the NO REBOOT bit.(Offset:3410h:bit5)

This signal should not be pull low unless using XOR Chain testing.

Internal Pull-Up.If sampled low,the Flash Descriptor Security will be overidden.if high,the Security measures defined in the Flash Descriptor will be in effect. This should only be used in manufacturing environments

Comment

2 2

INTEL CRESTLINE STRAP PIN

CFG Strap HIGH 1LOW 0

CFG 5 CFG 8

Low Power PCI Express Normal Low Power mode

CFG 9

PCI Express Graphics Lane Reversal

CFG 16

FSB Dynamic ODT Disabled Enabled

CFG 19

DMI Lane Reserved Normal Operation Reserved Lane

CFG 20

Concurrent SDVO/PCIE

SDVO_CTRL_DATA

SDVO Present

1 1

CFG 12 CFG 13

LL(00) LH(01) HL(10) HH(11)

DMI X 2 DMI X 4

★

Lane Reversal Normal Mode(Lanes

Only PCIE or SDVO is operation

NO SDVO Card Present

★

number in order)

★

PCIE and SDVO are operation simultaneous

SDVO Card Present

XOR/ALL-Z

Reserved XOR Mode Enabled All Z Mode Enabled Normal Operation

★

XOR Chain Entrance Strap

ICH_RSVD

A16 swap override strap

PCI_GNT#3

BOOT BIOS Strap

PCI_GNT#0 BOOT BIOS Location

integrated VccSus1_05,VccSus1_5,VccCL1_5

SM_INTVRMEN

integrated VccLan1_05VccCL1_05

LAN100_SLP

AZ_DOUT_ICH

tp3

0 0 10

10 1

0 1

11

low = A16 swap override enable high = default

SPI_CS#1

1

Description

Normal Operation(default) Set PCIE port cofig bit1

SPI10 PCI LPC(Default)

High=Enable Low=Disable

RSVD Enter XOR Chain

DEFAULE HIGH

No Reboot Strap

LOW = DefauleSPKR

High=No Reboot

INTEL ICH8-M INTEGRATED

8.2K PULL HIGH

PULL-UPS and PULL-DOWNS

SIGNAL Resistor Type/Value

HDA_BIT_CLK HDA_RST# HDA_SDIN[3:0] HDA_SDOUT HDA_SYNC GNT[3:0] GPIO[20] LDA[3:0]#/FHW[3:0]# LAN_RXD[2:0] LDRQ[0] LDRQ[1]/GPIO23 PME# PWRBTN# SATALED# SPI_CS1# SPI_CLK SPI_MOSI SPI_MISO TACH_[3:0] SPKR TP[3] USB[9:0][P,N] CL_RST#

PULL-DOWN 20K NONE PULL-DOWN 20K PULL-DOWN 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 15K TBD

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

Date: Sheet of

+RTCVCC20,22

1D05V_S05,6,7,8,10,11,12,20,22,34,43,47

1D25V_S08,11,22,45

1D2V_LAN_S527

1D5V_NEW_S028

1D5V_S06,11,20,21,22,28,29,30,45

1D8V_S38,11,12,14,15,44,45,46,47

2D5V_LAN_S527,28

3D3V_AUX_S520,31,34,35,36,38,39,40,47 3D3V_LAN_S527,28

3D3V_S04,8,10,11,14,15,16,17,18,19,21,22,23,24,25,26,27,28,29,30,31,32,33,34,35,36,37,40,41,43,45,46,47

3D3V_S519,21,22,27,28,31,35,38,40,46,47

5V_AUX_S518,39,40,47

5V_S016,17,18,22,24,33,35,36,37,41,45,46,47

5V_S522,24,29,30,31,35,38,40,43,44,45,46,47

AD+38,39,47

DCBATOUT18,39,40,41,42,43,44,46,47 DDR_VREF_S014,15,45,47 DDR_VREF_S38,14,15,45

+LCDVDD18 VCC_CORE_S06,7,42

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Table of Content

DS2-Intel -1

+RTCVCC 1D05V_S0 1D25V_S0 1D2V_LAN_S5 1D5V_NEW_S0 1D5V_S0 1D8V_S3 2D5V_LAN_S5

3D3V_AUX_S5 3D3V_LAN_S5 3D3V_S0 3D3V_S5 5V_AUX_S5

5V_S0 5V_S5 AD+ DCBATOUT DDR_VREF_S0 DDR_VREF_S3

+LCDVDD VCC_CORE_S0

347Wednesday, September 12, 2007

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A

3D3V_S0 3D3V_S0_CK505

R127 0R0603-PADR127 0R0603-PAD

12

C222

SC1U10V3KX-3GP

5

12

C219

SC10U6D3V5KX-1GP

12

C527

C549

SCD1U16V2ZY-2GP

12

C523

SCD1U16V2ZY-2GP

C529

SCD1U16V2ZY-2GP

D D

4

12

C537

SCD1U16V2ZY-2GP

X3

1 2

12

C214

C214 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

CLK_XTAL_OUTCLK_XTAL_IN

X-14D31818M-37GP

3

12

C211

C211 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

2

3D3V_S0_CK505_IO3D3V_S0_CK505

U24

4

9

46

62

16

23

33

43

52

56

19

27

U24

1

SA:0430

VDDREF

GND48

15

18

VDD48

GNDPCI

1

VDDPCI

VDDSRC

GNDREF

VDDCPU

VDDPLL3

GND

GNDSRC

22

30

36

MCH_CLKSEL0 8 MCH_CLKSEL1 8 MCH_CLKSEL2 8

VDD96_IO

VDDSRC_IO

VDDPLL3_IO

27MHZ_NONSS/SRCT1/SE1

GND

GNDSRC

GNDCPU

26

49

59

FSC FSB FSA

CPUT0

VDDCPU_IO

27MHZ_SS/SRCC1/SE2

GND

65

ICS9LPRS365BKLFT-GP

CPUC0

CPUT1_F CPUC1_F

CPUT2_ITP/SRCT8

CPUC2_ITP/SRCC8

SRCT7/CR#_F

SRCC7/CR#_E

SRCT6 SRCC6

SRCT10 SRCC10

SRCT11/CR#_H

SRCC11/CR#_G

SRCT9 SRCC9

SRCT4 SRCC4

SRCT3/CR#_C

SRCC3/CR#_D

SRCT2/SATAT

SRCC2/SATAC

SRCT0/DOTT_96

SRCC0/DOTC_96

27_SEL

12

R378

R378 10KR2J-3-GP

10KR2J-3-GP

27_SEL PIN 20 PIN 21 PIN 24 PIN 25

0 DOT96T DOT96C SRCT1/LCDT_100 SRCT1/LCDT_100 1 SRCT0 SRCC0 27M_NSS 27M_SS

3D3V_S0

12

R128 0R0603-PADR128 0R0603-PAD

12

C231

SC1U10V3KX-3GP

12

DY

C227

SC10U6D3V5KX-1GP

12

C524

SCD1U16V2ZY-2GP

12

C533

SCD1U16V2ZY-2GP

C525

SCD1U16V2ZY-2GP

C C

CLKSATAREQ#21

CLKREQ#_B8

PCLK_PCM25 PCLK_KBC34 CLK_PCI_ICH19

CLK_14M_ICH21

3D3V_S0_CK505

12

R374

R374 10KR2J-3-GP

10KR2J-3-GP

PCI2_TME

ITP_EN

12

R373

R373 10KR2J-3-GP

10KR2J-3-GP

DY

ITP_EN Output

0 SRC8 1 CPU_ITP

B B

12

R380

R380 10KR2J-3-GP

10KR2J-3-GP

3D3V_S0_CK505_IO

C566 SC4D7P50V2CN-1GPC566 SC4D7P50V2CN-1GP

12

C548

C550

SCD1U16V2ZY-2GP

12

C540

SC4D7P50V2CN-1GP

CLK_48M_ICH21

12

C552

C545

SC4D7P50V2CN-1GP

1 2

H_STP_PCI#21 H_STP_CPU#21

ICH_SMBCLK14,15,21

ICH_SMBDATA14,15,21

CK_PWRGD21

12

C526

SC4D7P50V2CN-1GP

Main source : 71.09365.A03 ICS9LPRS365CKLFT 2nd source:71.00875.A03 RTM875N-606-LF

PCI2_TME Output

0

1

Overclocking of CPU and SRC allowed

Overclocking of CPU and SRC not allowed

CPU_BSEL26 CPU_BSEL16 CPU_BSEL06

CLK_XTAL_IN CLK_XTAL_OUT

1 2

R383 33R2J-2-GPR383 33R2J-2-GP

R370 33R2J-2-GPR370 33R2J-2-GP

1 2

R379 33R2J-2-GPR379 33R2J-2-GP

1 2

R382 33R2J-2-GPR382 33R2J-2-GP

1 2

R355

1 2

33R2J-2-GP

FSA

PCI2_TME PCLK_PCM_R 27_SEL ITP_EN

FSB FSC

Please place R10 near U1 pin5

3

X1

2

X2

17

USB_48MHZ/FSLA

45

PCI_STOP#

44

CPU_STOP#

7

SCLK

6

SDATA

63

CK_PWRGD/PD#

8

PCI0/CR#_A

10

PCI1/CR#_B

11

PCI2/TME

12

PCI3

13

PCI4/27_SELECT

14

PCI_F5/ITP_EN

64

FSLB/TEST_MODE

5

REF0/FSLC/TEST_SEL

55

NC#55

FS_C FS_B FS_A CPU

1 0 1 100M 0 0 1 133M 0 1 0 200M 0 1 1 166M

1 2

R360 2K2R2J-2-GPR360 2K2R2J-2-GP

1 2

R353 0R0402-PADR353 0R0402-PAD

1 2

R386 2K2R2J-2-GPR386 2K2R2J-2-GP R385 0R0402-PADR385 0R0402-PAD

1 2

R352 0R0402-PADR352 0R0402-PAD

1 2

R359 0R0402-PADR359 0R0402-PAD

1 2

Design Note:

1. All of Input pin didn't have internal pull up resistor.

2. Clock Request (CR) function are enable by registers.

3. CY28548 integrated serial resistor of differential clock, so put 0 ohm serial resistor in the schematic.

CLK_CPU_BCLK1

61

CLK_CPU_BCLK1#

60

CLK_MCH_BCLK1

58

CLK_MCH_BCLK1#

57

CLK_PCIE_MINI3_1

54

CLK_PCIE_MINI3_1#

53

CLK_PCIE_LAN1

51

CLK_PCIE_LAN1#

50

CLK_PCIE_MINI1_1

48

CLK_PCIE_MINI1_1#

47

CLK_PCIE_NEW1

41

CLK_PCIE_NEW1#

42 40

39

CLK_PCIE_MINI2_1

37

CLK_PCIE_MINI2_1#

38

CLK_MCH_3GPLL1

34

CLK_MCH_3GPLL1#

35

CLK_PCIE_ICH1

31

CLK_PCIE_ICH1#

32

CLK_PCIE_SATA1CLK_PCIE_SATA1

28

CLK_PCIE_SATA1#CLK_PCIE_SATA1#

29

MCH_SSCDREFCLK1

24

MCH_SSCDREFCLK1#

25

CLK_MCH_DREFCLK1

20

CLK_MCH_DREFCLK1#

21

RN25 SRN0J-6-GPRN25 SRN0J-6-GP

RN26 SRN0J-6-GPRN26 SRN0J-6-GP

RN27 SRN22-3-GPRN27 SRN22-3-GP

RN28 SRN0J-6-GPRN28 SRN0J-6-GP

RN29 SRN22-3-GPRN29 SRN22-3-GP

RN30 SRN0J-6-GPRN30 SRN0J-6-GP

RN31

RN32 SRN0J-6-GPRN32 SRN0J-6-GP

RN36 SRN0J-6-GPRN36 SRN0J-6-GP

RN35 SRN0J-6-GPRN35 SRN0J-6-GP

RN33 SRN0J-6-GPRN33 SRN0J-6-GP

NEWCARD_CLKREQ#

12

EC119

EC119 SC22P50V2JN-4GP

SC22P50V2JN-4GP

1 2 3

2 3 1

RN34 SRN0J-6-GPRN34 SRN0J-6-GP

2 3 1

4

1 2

R371 10KR2J-3-GPR371 10KR2J-3-GP R375

R375

1 2

10KR2J-3-GP

DY

SRN22-3-GP

EC165

DY

SC47P50V2JN-3GP

DY

CLK_MCH_DREFCLK CLK_MCH_DREFCLK#

12

EC166

SC47P50V2JN-3GP

4

SC:08/11 Add EC165,EC166 on

CLK_MCH_DREFCLK -/+ pair .

12

DY

CLK_PCIE_LAN 27 CLK_PCIE_LAN# 27

NEWCARD_CLKREQ# 28

CLK_PCIE_MINI2 30 CLK_PCIE_MINI2# 30

CLK_MCH_3GPLL 8 CLK_MCH_3GPLL# 8

CLK_PCIE_ICH 21 CLK_PCIE_ICH# 21

MCH_SSCDREFCLK 8 MCH_SSCDREFCLK# 8

CLK_MCH_DREFCLK 8 CLK_MCH_DREFCLK# 8

27_SEL strap 0:For 965GM, 1:For 965PM

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Clock generator ICS9LPRS365

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

DS2-Intel -1

447Wednesday, September 12, 2007

CLK_CPU_BCLK 5 CLK_CPU_BCLK# 5

CLK_MCH_BCLK 8 CLK_MCH_BCLK# 8

CLK_PCIE_MINI3 30 CLK_PCIE_MINI3# 30

CLK_PCIE_MINI1 29 CLK_PCIE_MINI1# 29

CLK_PCIE_NEW 28 CLK_PCIE_NEW# 28

3D3V_S0

CLK_PCIE_SATA 20 CLK_PCIE_SATA# 20

965GM 965PM

of

A

5

A

4

3

2

1

H_A#[3..35]8

H_A#3 H_A#4

D D

H_ADSTB#08 H_REQ#08

H_REQ#18 H_REQ#28 H_REQ#38 H_REQ#48

C C

H_ADSTB#18

H_A20M#20 H_FERR#20 H_IGNNE#20

H_STPCLK#20 H_INTR20 H_NMI20 H_SMI#20

TP14TPAD28 TP14TPAD28 TP16TPAD28 TP16TPAD28 TP6TPAD28 TP6TPAD28 TP12TPAD28 TP12TPAD28 TP4TPAD28 TP4TPAD28 TP10TPAD28 TP10TPAD28 TP5TPAD28 TP5TPAD28 TP20TPAD28 TP20TPAD28

B B

TP11TPAD28 TP11TPAD28 TP18TPAD28 TP18TPAD28

H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_ADSTB#0

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_ADSTB#1 H_A20M#

H_FERR# H_IGNNE#

CPU_RSVD01 CPU_RSVD02 CPU_RSVD03 CPU_RSVD04 CPU_RSVD05 CPU_RSVD06 CPU_RSVD07 CPU_RSVD08 CPU_RSVD09 CPU_RSVD10

U45A

J4

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD#M4

N5

RSVD#N5

T2

RSVD#T2

V3

RSVD#V3

B2

RSVD#B2

C3

RSVD#C3

D2

RSVD#D2

D22

RSVD#D22

D3

RSVD#D3

F6

RSVD#F6

B1

KEY_NC

SKT-CPU478P-GP

1 OF 4

ADDR GROUP 0

ADDR GROUP 1

XDP/ITP SIGNALS CONTROL

XDP/ITP SIGNALS CONTROL THERMAL

THERMAL

PROCHOT#

ICH

THERMTRIP#

HCLK

RESERVED

ADS# BNR# BPRI#

DEFER#

DRDY# DBSY#

BR0#

IERR#

INIT#

LOCK#

RESET#

RS0# RS1# RS2#

TRDY#

HIT#

HITM#

BPM0# BPM1# BPM2# BPM3# PRDY# PREQ#

TCK

TDO TMS

TRST#

DBR#

THRMDA THRMDC

BCLK0 BCLK1

TDI

H_ADS#

H1

H_BNR#

E2

H_BPRI#

G5

H_DEFER#

H5

H_DRDY#

F21

H_DBSY#

E1

H_BR0#

F1

H_IERR#

D20

H_INIT#

B3

H_LOCK#

H4

H_RESET#

C1

H_RS#0

F3

H_RS#1

F4

H_RS#2

G3

H_TRDY#

G2

H_HIT#

G6

H_HITM#

E4

XDP_BPM#0

AD4

XDP_BPM#1

AD3

XDP_BPM#2

AD1

XDP_BPM#3

AC4

XDP_BPM#4

AC2

XDP_BPM#5

AC1

XDP_TCK

AC5

XDP_TDI

AA6

XDP_TDO

AB3

XDP_TMS

AB5

XDP_TRST#

AB6

XDP_DBRESET#

C20

CPU_PROCHOT

D21

H_THERMDA

A24

H_THERMDC

B25

H_THERMTRIP#

C7

CLK_CPU_BCLK

A22

CLK_CPU_BCLK#

A21

layout note:Zo =55 ohm , 0.5" MAX for GTLREF

H_ADS# 8 H_BNR# 8

H_BPRI# 8 H_DEFER# 8

H_DRDY# 8 H_DBSY# 8

H_BR0# 8

H_INIT# 20

H_LOCK# 8

H_RESET# 8

H_RS#0 8 H_RS#1 8 H_RS#2 8

H_TRDY# 8

H_HIT# 8 H_HITM# 8

TP15TP15 TP13TP13 TP3TP3 TP9TP9 TP7TP7 TP2TP2

TP8TP8

TP19TP19

1 2

R236 56R2J-4-GPR236 56R2J-4-GP

H_THERMTRIP# 8,20,34,46

CLK_CPU_BCLK 4 CLK_CPU_BCLK# 4

1D05V_S0

12

R235

R235 56R2J-4-GP

56R2J-4-GP

1D05V_S0

H_THERMDA 36 H_THERMDC 36

H_THERMDA, H_THERMDC routing together, Trace width / Spacing = 10 / 10 mil

XDP_TDI

R7 150R2F-1-GPR7 150R2F-1-GP

XDP_TMS

R5 39R2F-GPR5 39R2F-GP

1D05V_S0

1 2 1 2

CPU_PROCHOT

DY

12

R237 0R2J-2-GP

XDP_TRST# XDP_TCK

CPU_PROCHOT# 41

1 2

R6 649R2F-GPR6 649R2F-GP

1 2

R4 27D4R2F-L1-GPR4 27D4R2F-L1-GP

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

Meron(1/3)-AGTL+/XDP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel

5

A

-1

47Wednesday, September 12, 2007

of

5

A

4

3

2

1

H_D#[0..63]8

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4

TP21TPAD28 TP21TPAD28 TP23TPAD28 TP23TPAD28 TP22TPAD28 TP22TPAD28

TP85TPAD28 TP85TPAD28 TP87TPAD28 TP87TPAD28

H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14

H_D#15 H_DSTBN#0 H_DSTBP#0 H_DINV#0

H_D#16

H_D#17

H_D#18

H_D#19

H_D#20

H_D#21

H_D#22

H_D#23

H_D#24

H_D#25

H_D#26

H_D#27

H_D#28

H_D#29

H_D#30

H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1

TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

CPU_BSEL0 CPU_BSEL1 CPU_BSEL2

D D

H_DSTBN#08 H_DSTBP#08

H_DINV#08

C C

H_DSTBN#18 H_DSTBP#18 H_DINV#18

V_CPU_GTLREF

SCD1U16V2KX-3GP

PLACE C25 close to the TEST4 PIN, make sure TEST3,TEST4,TEST5 trace routing is reference to GND and away other noisy signals

1 2

DY

C395

CPU_BSEL04 CPU_BSEL14 CPU_BSEL24

B B

CPU_BSEL CPU_BSEL2 CPU_BSEL1 CPU_BSEL0

166

200

Place C635 near R238 and R239

0

00

12

C635

SCD1U16V2KX-3GP

1

1D05V_S0

R239

R239 1KR2F-3-GP

1KR2F-3-GP

1 2

V_CPU_GTLREF

12

R238

2KR2F-3-GP

U45B

E22 F24 E26 G22 F23 G25 E25 E23 K24 G24

J24

J23 H22 F26 K22 H23

J26 H26 H25

N22 K25 P26 R23

L23 M24

L22 M23 P25 P23 P22 T24 R24

L25 T25 N25

L26 M26 N24

AD26

C23 D25 C24

AF26

AF1 A26

B22 B23 C21

SKT-CPU478P-GP

D0# D1# D2# D3# D4# D5# D6# D7# D8# D9# D10# D11# D12# D13# D14# D15# DSTBN0# DSTBP0# DINV0#

D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# DSTBN1# DSTBP1# DINV1#

GTLREF TEST1 TEST2 TEST3 TEST4 TEST5 TEST6

BSEL0 BSEL1 BSEL2

11

2 OF 4

DATA GRP0 DATA GRP1

MISC

Close to CPU pin AD26 Z0=55 ohm with in 500mils .

D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42#

DATA GRP2DATA GRP3

D43# D44# D45# D46#

D47# DSTBN2# DSTBP2#

DINV2#

D48#

D49#

D50#

D51#

D52#

D53#

D54#

D55#

D56#

D57#

D58#

D59#

D60#

D61#

D62#

D63# DSTBN3# DSTBP3#

DINV3# COMP0

COMP1 COMP2 COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

SLP#

PSI#

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46

H_D#47 H_DSTBN#2 H_DSTBP#2 H_DINV#2

H_D#48

H_D#49

H_D#50

H_D#51

H_D#52

H_D#53

H_D#54

H_D#55

H_D#56

H_D#57

H_D#58

H_D#59

H_D#60

H_D#61

H_D#62

H_D#63 H_DSTBN#3 H_DSTBP#3 H_DINV#3

COMP0 COMP1

R233 27D4R2F-L1-GPR233 27D4R2F-L1-GP

COMP2

R234 54D9R2F-L1-GPR234 54D9R2F-L1-GP

COMP3

R3 27D4R2F-L1-GPR3 27D4R2F-L1-GP

R2 54D9R2F-L1-GPR2 54D9R2F-L1-GP

H_DPRSTP# H_DPSLP# H_DPWR#

H_CPUSLP# PSI#

H_DSTBN#2 8 H_DSTBP#2 8 H_DINV#2 8

H_DSTBN#3 8 H_DSTBP#3 8 H_DINV#3 8

1 2 1 2 1 2 1 2

H_DPRSTP# 8,20,41 H_DPSLP# 20

H_DPWR# 8

H_CPUSLP# 8

PSI# 41

Resistor Placed within 0.5" of CPU pin. Trace should be at least 25 mils away from any other toggling signal . COMP[0,2] trace width is 18 mils. COMP[1,3] trace width is 4 mils .

H_PWRGOOD 20,46

VCC_CORE_S0 VCC_CORE_S0

3 OF 4

U45C

A7

A9 A10 A12 A13 A15 A17 A18 A20

B7

B9 B10 B12 B14 B15 B17 B18 B20

C9 C10 C12 C13 C15 C17 C18

D9 D10 D12 D14 D15 D17 D18

E7

E9 E10 E12 E13 E15 E17 E18 E20

F7

F9 F10 F12 F14 F15 F17 F18 F20 AA7 AA9

AA10 AA12 AA13 AA15 AA17 AA18 AA20

AB9

AC10 AB10 AB12 AB14 AB15 AB17 AB18

SKT-CPU478P-GP

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCCSENSE

VSSSENSE

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP

VCCA VCCA

VID0 VID1 VID2 VID3 VID4 VID5 VID6

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3 CPU_VID4 CPU_VID5 CPU_VID6

VCC_SENSE

VSS_SENSE

1D05V_S0

12

C20

C20 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

1D5V_S0

12

C394

CPU_VID[0..6] 41

VCC_SENSE 41

VSS_SENSE 41

VCC_SENSE

R201 100R2F-L1-GP-UR201 100R2F-L1-GP-U

VSS_SENSE

R199 100R2F-L1-GP-UR199 100R2F-L1-GP-U

Close to CPU pin within 500mils

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

Date: Sheet of

Meron(2/3)-AGTL+/PWR

C394

SCD01U16V2KX-3GP

Length match within 25 mils . The trace width/space/other is 20/7/25 .

1 2

DS2-Intel

layout note: place C3 near PIN B26

12

C397

C397 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

VCC_CORE_S0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

6

-1

47Wednesday, September 12, 2007

A

5

A

4

3

VCC_CORE_S0

2

1

12

C382

C377

SC10U6D3V5KX-1GP

12

C33

SC10U6D3V5KX-1GP

C634

12

SC10U6D3V5KX-1GP

C39

C39 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1 2

4 OF 4

U45D

A4

VSS

D D

C C

B B

A8

VSS

A11

VSS

A14

VSS

A16

VSS

A19

VSS

A23

VSS

AF2

VSS

B6

VSS

B8

VSS

B11

VSS

B13

VSS

B16

VSS

B19

VSS

B21

VSS

B24

VSS

C5

VSS

C8

VSS

C11

VSS

C14

VSS

C16

VSS

C19

VSS

C2

VSS

C22

VSS

C25

VSS

D1

VSS

D4

VSS

D8

VSS

D11

VSS

D13

VSS

D16

VSS

D19

VSS

D23

VSS

D26

VSS

E3

VSS

E6

VSS

E8

VSS

E11

VSS

E14

VSS

E16

VSS

E19

VSS

E21

VSS

E24

VSS

F5

VSS

F8

VSS

F11

VSS

F13

VSS

F16

VSS

F19

VSS

F2

VSS

F22

VSS

F25

VSS

G4

VSS

G1

VSS

G23

VSS

G26

VSS

H3

VSS

H6

VSS

H21

VSS

H24

VSS

J2

VSS

J5

VSS

J22

VSS

J25

VSS

K1

VSS

K4

VSS

K23

VSS

K26

VSS

L3

VSS

L6

VSS

L21

VSS

L24

VSS

M2

VSS

M5

VSS

M22

VSS

M25

VSS

N1

VSS

N4

VSS

N23

VSS

N26

VSS

P3

VSS

SKT-CPU478P-GP

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

Place these capacitors on L1 (North side ,Secondary Layer)

1D05V_S0

C16

C16 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1 2

C12

C12 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1 2

VCC_CORE_S0

C10

C10 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1 2

12

C34

C633

12

C376

C374

SC10U6D3V5KX-1GP

12

C36

SC10U6D3V5KX-1GP

C17

SC10U6D3V5KX-1GP

C45

C45 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1 2

12

C371

C361

SC10U6D3V5KX-1GP

12

C35

C24

SC10U6D3V5KX-1GP

C37

C37 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

1 2

12

C358

C25

C349

SC10U6D3V5KX-1GP

12

C23

SC10U6D3V5KX-1GP

Mid Frequencd Decoupling

Place these inside socket cavity on L1 (North side Secondary)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

Date: Sheet of

Meron(3/3)-GND&Bypass

DS2-Intel

7

of

A

-1

47Wednesday, September 12, 2007

A

1 OF 10

U50A

12

E2 G2

G7 M6 H7 H3 G4

F3 N8 H2

M10 N12

N9 H5

P13

K9 M2

W10

Y8

V4 M3

J1 N5 N3 W6 W9 N2

Y7

Y9

P4 W3 N1

AD12

AE3 AD9 AC9

AC7 AC14 AD11 AC11

AB2

AD7

AB1

Y3 AC6 AE2 AC5

AG3

AJ9 AH8

AJ14

AE9

AE11 AH12

AJ5 AH5 AJ6 AE7 AJ7 AJ2 AE5 AJ3 AH2

AH13

B3

C2 W1

W2

B6

E5

B9

A9

CRESTLINE-GP-U-NF

H_RCOMP

R250

R250 24D9R2F-L-GP

24D9R2F-L-GP

U50A

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

H_SCOMP H_SCOMP#

H_CPURST# H_CPUSLP#

H_AVREF H_DVREF

J13

H_A#3

B11

H_A#4

C11

H_A#5

M11

H_A#6

C15

H_A#7

F16

H_A#8

L13

H_A#9

G17

H_A#10

C14

H_A#11

K16

H_A#12

B13

H_A#13

L16

H_A#14

J17

H_A#15

B14

H_A#16

K19

H_A#17

P15

H_A#18

R17

H_A#19

B16

H_A#20

H20

H_A#21

L19

H_A#22

D17

H_A#23

M17

H_A#24

N16

H_A#25

J19

H_A#26

B18

H_A#27

E19

H_A#28

B17

H_A#29

B15

H_A#30

E17

H_A#31

C18

H_A#32

A19

H_A#33

B19

H_A#34

N19

H_A#35

G12

H_ADS#

H17

H_ADSTB#0

G20

H_ADSTB#1

C8

H_BNR#

HOST

100R2F-L1-GP-U

E8

H_BPRI#

F12

H_BREQ#

D6

H_DEFER#

C10

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

Spec: H_SWING=0.3125 X VTT +/- 1%

1D05V_S0

12

221R2F-2-GP

12

AM5 AM7 H8 K7 E4 C6 G10 B7

K5 L2 AD13 AE13

M7 K3 AD2 AH11

L7 K2 AC2 AJ10

M14 E13 A11 H13 B12

E12 D7 D8

R255

R254

12

C415

C415 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

Layout Note : Place C33 near pin B3 of NB

CLK_MCH_BCLK CLK_MCH_BCLK#

H_SWNGH_VREF

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_ADS# H_ADSTB#0 H_ADSTB#1 H_BNR# H_BPRI# H_BR0# H_DEFER# H_DBSY#

H_DPWR# H_DRDY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0

H_REQ#1

H_REQ#2

H_REQ#3

H_REQ#4

H_RS#0

H_RS#1

H_RS#2

4

H_A#[3..35] 5H_D#[0..63]6

H_ADS# 5 H_ADSTB#0 5 H_ADSTB#1 5 H_BNR# 5

H_BPRI# 5

H_BR0# 5

H_DEFER# 5

H_DBSY# 5 CLK_MCH_BCLK 4 CLK_MCH_BCLK# 4

H_DPWR# 6

H_DRDY# 5

H_HIT# 5

H_HITM# 5 H_LOCK# 5 H_TRDY# 5

H_DINV#0 6 H_DINV#1 6 H_DINV#2 6 H_DINV#3 6

H_DSTBN#0 6 H_DSTBN#1 6 H_DSTBN#2 6 H_DSTBN#3 6

H_DSTBP#0 6 H_DSTBP#1 6 H_DSTBP#2 6 H_DSTBP#3 6

H_REQ#0 5 H_REQ#1 5 H_REQ#2 5 H_REQ#3 5 H_REQ#4 5

H_RS#0 5 H_RS#1 5 H_RS#2 5

PM_PWROK21,36

VGATE_PWRGD21,41

PLT_RST_R#

TV_DCONSEL010 TV_DCONSEL110

1D8V_S3

12

C435

SC2D2U6D3V3KX-GP

SM_RCOMP_VOH

SM_RCOMP_VOL

SC2D2U6D3V3KX-GP

CFG[17:3] have internal pull up CFG[19:18] have internal pull down

C435

12

C444

DY

R86 0R2J-2-GP

1 2 1 2

R87 0R2J-2-GPR87 0R2J-2-GP

R52

1 2

100R2J-2-GP

PM_EXTTS#0 PM_EXTTS#1 TV_DCONSEL0 TV_DCONSEL1

CLKREQ#_B

12

SCD01U25V2KX-3GP

C437

12

C442

1 2

SCD01U25V2KX-3GP

MCH_CLKSEL04 MCH_CLKSEL14 MCH_CLKSEL24

PM_BMBUSY#21 H_DPRSTP#6,20,41 PM_EXTTS#014 PM_EXTTS#115

H_THERMTRIP#5,20,34,46

DPRSLPVR21,41

PLT_RST1# 19,23,24,28,29,30,34

RN18

1 2 3 4 5

SRN10KJ-6-GP

1 2

R69 10KR2J-3-GPR69 10KR2J-3-GP

3

R268

R268 1KR2F-3-GP

1KR2F-3-GP

R272

R272 3K01R2F-3-GP

3K01R2F-3-GP

R273

R273 1KR2F-3-GP

1KR2F-3-GP

PM_POK_R

8 7 6

TP33TP33 TP29TP29 TP32TP32 TP26TP26 TP27TP27 TP31TP31 TP34TP34 TP25TP25 TP35TP35

TP24TP24 TP39TP39

TP36TP36 TP37TP37

3D3V_S0

MCH_CLKSEL0 MCH_CLKSEL1 MCH_CLKSEL2

CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13

CFG16 CFG18

CFG19 CFG20

PM_BMBUSY# H_DPRSTP# PM_EXTTS#0 PM_EXTTS#1 PM_POK_R PLT_RST_R# H_THERMTRIP# DPRSLPVR

2 OF 10

U50B

P36

RSVD#P36

P37

RSVD#P37

R35

RSVD#R35

N35

RSVD#N35

AR12

RSVD#AR12

AR13

RSVD#AR13

AM12

RSVD#AM12

AN13

RSVD#AN13

J12

RSVD#J12

AR37

RSVD#AR37

AM36

RSVD#AM36

AL36

RSVD#AL36

AM37

RSVD#AM37

D20

RSVD#D20

H10

RSVD#H10

B51

RSVD#B51

BJ20

RSVD#BJ20

BK22

RSVD#BK22

BF19

RSVD#BF19

BH20

RSVD#BH20

BK18

RSVD#BK18

BJ18

RSVD#BJ18

BF23

RSVD#BF23

BG23

RSVD#BG23

BC23

RSVD#BC23

BD24

RSVD#BD24

BH39

RSVD#BH39

AW20

RSVD#AW20

BK20

RSVD#BK20

B44

RSVD#B44

C44

RSVD#C44

A35

RSVD#A35

B37

RSVD#B37

B36

RSVD#B36

B34

RSVD#B34

C34

RSVD#C34

P27

CFG0

N27

CFG1

N24

CFG2

C21

CFG3

C23

CFG4

F23

CFG5

N23

CFG6

G23

CFG7

J20

CFG8

C20

CFG9

R24

CFG10

L23

CFG11

J23

CFG12

E23

CFG13

E20

CFG14

K23

CFG15

M20

CFG16

M24

CFG17

L32

CFG18

N33

CFG19

L35

CFG20

G41

PM_BM_BUSY#

L39

PM_DPRSTP#

L36

PM_EXT_TS#0

J36

PM_EXT_TS#1

AW49

PWROK

AV20

RSTIN#

N20

THERMTRIP#

G36

DPRSLPVR

BJ51

NC#BJ51

BK51

NC#BK51

BK50

NC#BK50

BL50

NC#BL50

BL49

NC#BL49

BL3

NC#BL3

BL2

NC#BL2

BK1

NC#BK1

BJ1

NC#BJ1

E1

NC#E1

A5

NC#A5

C51

NC#C51

B50

NC#B50

A50

NC#A50

A49

NC#A49

BK2

NC#BK2

CRESTLINE-GP-U-NF

NB:71.GM965.A0U

RSVD

DDR MUXING

SM_RCOMP_VOH

SM_RCOMP_VOL

SM_VREF#AR49

SM_VREF#AW4

DPLL_REF_CLK

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

CLK

DMI

CFG PM NC

SDVO_CTRL_CLK

SDVO_CTRL_DATA

MISC ME GRAPHICS VID

2

SM_CK0 SM_CK1 SM_CK3 SM_CK4

SM_CK#0 SM_CK#1 SM_CK#3 SM_CK#4

SM_CKE0 SM_CKE1 SM_CKE3 SM_CKE4

SM_CS#0 SM_CS#1 SM_CS#2 SM_CS#3

SM_ODT0 SM_ODT1 SM_ODT2 SM_ODT3

SM_RCOMP

SM_RCOMP#

PEG_CLK

PEG_CLK#

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

GFX_VID0 GFX_VID1 GFX_VID2 GFX_VID3

GFX_VR_EN

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

CL_VREF

CLKREQ#

ICH_SYNC#

TEST1 TEST2

M_CLK_DDR0

AV29

M_CLK_DDR1

BB23

M_CLK_DDR2

BA25

M_CLK_DDR3

AV23

M_CLK_DDR#0

AW30

M_CLK_DDR#1

BA23

M_CLK_DDR#2

AW25

M_CLK_DDR#3

AW23

DDR_CKE0_DIMMA

BE29

DDR_CKE1_DIMMA

AY32

DDR_CKE2_DIMMB

BD39

DDR_CKE3_DIMMB

BG37

DDR_CS0_DIMMA#

BG20

DDR_CS1_DIMMA#

BK16

DDR_CS2_DIMMB#

BG16

DDR_CS3_DIMMB#

BE13

M_ODT0

BH18

M_ODT1

BJ15

M_ODT2

BJ14

M_ODT3

BE16

SM_RCOMP_VOH

BK31

SM_RCOMP_VOL

BL31

SM_RCOMP

BL15

SM_RCOMP#

BK14 AR49

AW4

CLK_MCH_DREFCLK

B42

CLK_MCH_DREFCLK#

C42

MCH_SSCDREFCLK

H48

MCH_SSCDREFCLK#

H47

CLK_MCH_3GPLL

K44

CLK_MCH_3GPLL#

K45

AN47 AJ38 AN42 AN46

AM47 AJ39 AN41 AN45

AJ46 AJ41 AM40 AM44

AJ47 AJ42 AM39 AM43

DFGT_VID0

E35

DFGT_VID1

A39

DFGT_VID2

C38

DFGT_VID3

B39

DFGT_VR_EN

E36

AM49 AK50

PM_POK_R

AT43 AN49

CL_VREF

AM50

H35 K36 G39

MCH_ICH_SYNC#

G40

TEST1_GMCH

A37

TEST2_GMCH

R32

1

FOR Calero: 80.6 ohm Crestline: 20 ohm

M_CLK_DDR0 14 M_CLK_DDR1 14 M_CLK_DDR2 15 M_CLK_DDR3 15

M_CLK_DDR#0 14 M_CLK_DDR#1 14 M_CLK_DDR#2 15 M_CLK_DDR#3 15

DDR_CKE0_DIMMA 14 DDR_CKE1_DIMMA 14 DDR_CKE2_DIMMB 15 DDR_CKE3_DIMMB 15

DDR_CS0_DIMMA# 14 DDR_CS1_DIMMA# 14 DDR_CS2_DIMMB# 15 DDR_CS3_DIMMB# 15

M_ODT0 14 M_ODT1 14 M_ODT2 15 M_ODT3 15

1D8V_S3

1 2

R264 20R2F-GPR264 20R2F-GP

1 2

R261 20R2F-GPR261 20R2F-GP

DDR_VREF_S3

DMI_TXN0 DMI_TXN1 DMI_TXN2 DMI_TXN3

DMI_TXP0 DMI_TXP1 DMI_TXP2 DMI_TXP3

DMI_RXN0 DMI_RXN1 DMI_RXN2 DMI_RXN3

DMI_RXP0 DMI_RXP1 DMI_RXP2 DMI_RXP3

1 2

R65

20KR2J-L2-GP

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

DDR_VREF_S3

CLK_MCH_DREFCLK 4 CLK_MCH_DREFCLK# 4 MCH_SSCDREFCLK 4 MCH_SSCDREFCLK# 4

CLK_MCH_3GPLL 4 CLK_MCH_3GPLL# 4

DMI_TXN0 21 DMI_TXN1 21 DMI_TXN2 21 DMI_TXN3 21

DMI_TXP0 21 DMI_TXP1 21 DMI_TXP2 21 DMI_TXP3 21

DMI_RXN0 21 DMI_RXN1 21 DMI_RXN2 21 DMI_RXN3 21

DMI_RXP0 21 DMI_RXP1 21 DMI_RXP2 21 DMI_RXP3 21

TP38TP38 TP94TP94 TP92TP92 TP93TP93 TP40TP40

CL_CLK0 21 CL_DATA0 21

CL_RST# 21

SDVO_CTRLCLK 23 SDVO_CTRLDATA 23

CLKREQ#_B 4 MCH_ICH_SYNC# 21

R64

1 2

0R0402-PAD

CRESTLINE(1/6)-AGTL+/DMI/DDR2

DS2-Intel

1D25V_S0

R84

R84 1KR2F-3-GP

1KR2F-3-GP

1 2

12

R85

R85 392R2F-GP

SCD1U16V2KX-3GP

392R2F-GP

8

C182

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

-1

of

47Wednesday, September 12, 2007

5

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14

H_SWNG

54D9R2F-L1-GP

H_RCOMP H_SCOMP

H_SCOMP# H_RESET#

H_CPUSLP#

12

C426

SCD1U16V2ZY-2GP

H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

D D

C C

1D05V_S0

12

R249

R248

54D9R2F-L1-GP

H_RESET#5 H_CPUSLP#6

H_VREF

B B

layout note : Route H_SCOMP and H_SCOMP# with trace width, spacing and impedance (55 ohm) same as FSB data traces

Layout Note : H_RCOMP / H_VREF / H_SWNG trace width and spacing is 10/20

Layout Note : Place C32 within 100 mils of NB

NB:71.GM965.A0U

1D05V_S0

12

R263

R263 1KR2F-3-GP

1KR2F-3-GP

12

R262

R262 2KR2F-3-GP

2KR2F-3-GP

A

5

A

4

3

2

1

DDR_A_D[0..63] 14 DDR_A_BS[0..2] 14

SA_BS0 SA_BS1 SA_BS2

SA_CAS#

SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7

SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6

SA_DQS7 SA_DQS#0 SA_DQS#1 SA_DQS#2 SA_DQS#3 SA_DQS#4 SA_DQS#5 SA_DQS#6 SA_DQS#7

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14

SA_RAS#

SA_WE#

DDR_A_DM[0..7] 14 DDR_A_DQS[0..7] 14 DDR_A_DQS#[0..7] 14 DDR_A_MA[0..14] 14

5 OF 10

U50E

DDR_A_BS0

BB19

DDR_A_BS1

BK19

DDR_A_BS2

BF29

DDR_A_CAS#

BL17

DDR_A_DM0

AT45

DDR_A_DM1

BD44

DDR_A_DM2

BD42

DDR_A_DM3

AW38

DDR_A_DM4

AW13

DDR_A_DM5

BG8

DDR_A_DM6

AY5

DDR_A_DM7

AN6

DDR_A_DQS0

AT46

DDR_A_DQS1

BE48

DDR_A_DQS2

BB43

DDR_A_DQS3

BC37

DDR_A_DQS4

BB16

DDR_A_DQS5

BH6

DDR_A_DQS6

BB2

DDR_A_DQS7

AP3

DDR_A_DQS#0

AT47

DDR_A_DQS#1

BD47

DDR_A_DQS#2

BC41

DDR_A_DQS#3

BA37

DDR_A_DQS#4

BA16

DDR_A_DQS#5

BH7

DDR_A_DQS#6

BC1

DDR_A_DQS#7

AP2

DDR_A_MA0

BJ19

DDR_A_MA1

BD20

DDR_A_MA2

BK27

DDR_A_MA3

BH28

DDR_A_MA4

BL24

DDR_A_MA5

BK28

DDR_A_MA6

BJ27

DDR_A_MA7

BJ25

DDR_A_MA8

BL28

DDR_A_MA9

BA28

DDR_A_MA10

BC19

DDR_A_MA11

BE28

DDR_A_MA12

BG30

DDR_A_MA13

BJ16

DDR_A_MA14 DDR_B_MA14

BJ29

DDR_A_RAS#

BE18

SA_RCVEN#

AY20

DDR_A_WE#

BA19

DDR_A_CAS# 14 DDR_B_CAS# 15

DDR_A_RAS# 14

TP30TP30 TP28TP28

DDR_A_WE# 14

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6

DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15

DDR_B_D16

DDR_B_D17

DDR_B_D18

DDR_B_D19

DDR_B_D20

DDR_B_D21

DDR_B_D22

DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31

DDR_B_D32

DDR_B_D33

DDR_B_D34

DDR_B_D35

DDR_B_D36

DDR_B_D37

DDR_B_D38

DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47

DDR_B_D48

DDR_B_D49

DDR_B_D50

DDR_B_D51

DDR_B_D52

DDR_B_D53

DDR_B_D54

DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

AP49

AR51 AW50 AW51

AN51

AN50

AV50

AV49

BA50

BB50

BA49

BE50

BA51

AY49

BF50 BF49 BJ50 BJ44 BJ43

BL43 BK47 BK49 BK43 BK42

BJ41

BL41

BJ37

BJ36 BK41

BJ40

BL35 BK37 BK13 BE11 BK11 BC11 BC13 BE12 BC12 BG12

BJ10

BK10

BH5 BG1 BC2

BD3

AR1

AU2

BL9 BK5 BL5 BK9

BJ8 BJ6 BF4

BK3 BE4

BJ2 BA3 BB3

AT3 AY2 AY3

AT2

SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

DDR SYSTEM MEMORY B

D D

4 OF 10

U50D

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8

DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15

DDR_A_D16

DDR_A_D17

C C

B B

DDR_A_D18

DDR_A_D19

DDR_A_D20

DDR_A_D21

DDR_A_D22

DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31

DDR_A_D32

DDR_A_D33

DDR_A_D34

DDR_A_D35

DDR_A_D36

DDR_A_D37

DDR_A_D38

DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47

DDR_A_D48

DDR_A_D49

DDR_A_D50

DDR_A_D51

DDR_A_D52

DDR_A_D53

DDR_A_D54

DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

AR43

AW44

BA45 AY46 AR41 AR45 AT42

AW47

BB45

BF48

BG47

BJ45 BB47 BG50 BH49 BE45

AW43

BE44 BG42 BE40

BF44 BH45 BG40

BF40 AR40

AW40

AT39

AW36 AW41

AY41 AV38 AT38 AV13 AT13

AW11

AV11 AU15 AT11 BA13 BA11 BE10 BD10

BD8 AY9

BG10

AW9

BD7 BB9 BB5 AY7 AT5 AT7 AY6 BB7 AR5 AR8 AR9 AN3 AM8

AN10

AT9 AN9 AM9

AN11

SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

DDR SYSTEM MEMORRY A

SA_RCVEN#

SB_BS0 SB_BS1 SB_BS2

SB_CAS#

SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7

SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6

SB_DQS7 SB_DQS#0 SB_DQS#1 SB_DQS#2 SB_DQS#3 SB_DQS#4 SB_DQS#5 SB_DQS#6 SB_DQS#7

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14

SB_RAS#

SB_RCVEN#

SB_WE#

DDR_B_D[0..63] 15 DDR_B_BS[0..2] 15 DDR_B_DM[0..7] 15 DDR_B_DQS[0..7] 15 DDR_B_DQS#[0..7] 15 DDR_B_MA[0..14] 15

DDR_B_BS0

AY17

DDR_B_BS1

BG18

DDR_B_BS2

BG36

DDR_B_CAS#

BE17

DDR_B_DM0

AR50

DDR_B_DM1

BD49

DDR_B_DM2

BK45

DDR_B_DM3

BL39

DDR_B_DM4

BH12

DDR_B_DM5

BJ7

DDR_B_DM6

BF3

DDR_B_DM7

AW2

DDR_B_DQS0

AT50

DDR_B_DQS1

BD50

DDR_B_DQS2

BK46

DDR_B_DQS3

BK39

DDR_B_DQS4

BJ12

DDR_B_DQS5

BL7

DDR_B_DQS6

BE2

DDR_B_DQS7

AV2

DDR_B_DQS#0

AU50

DDR_B_DQS#1

BC50

DDR_B_DQS#2

BL45

DDR_B_DQS#3

BK38

DDR_B_DQS#4

BK12

DDR_B_DQS#5

BK7

DDR_B_DQS#6

BF2

DDR_B_DQS#7

AV3

DDR_B_MA0

BC18

DDR_B_MA1

BG28

DDR_B_MA2

BG25

DDR_B_MA3

AW17

DDR_B_MA4

BF25

DDR_B_MA5

BE25

DDR_B_MA6

BA29

DDR_B_MA7

BC28

DDR_B_MA8

AY28

DDR_B_MA9

BD37

DDR_B_MA10

BG17

DDR_B_MA11

BE37

DDR_B_MA12

BA39

DDR_B_MA13

BG13 BE24

DDR_B_RAS#

AV16

SB_RCVEN#

AY18

DDR_B_WE#

BC17

DDR_B_RAS# 15

DDR_B_WE# 15

CRESTLINE-GP-U-NF

NB:71.GM965.A0U NB:71.GM965.A0U

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CRESTLINE(2/6)-DDR2 A/B CH

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

DS2-Intel

of

9

A

-1

47Wednesday, September 12, 2007

A

TV_DCONSEL08 TV_DCONSEL18

GMCH_DDCCLK17 GMCH_DDCDATA17 GMCH_VSYNC17 GMCH_HSYNC17

3D3V_S0

5

3D3V_S0

M_COMP M_LUMA M_CRMA

M_BLUE M_GREEN M_RED

4

LBKLT_CTL18

GMCH_BL_ON34

LDDC_CLK18 LDDC_DATA18 LCDVDD_EN18

R68 3K3R2F-2-GPR68 3K3R2F-2-GP

VGA_TXACLK-18 VGA_TXACLK+18 VGA_TXBCLK-18 VGA_TXBCLK+18

VGA_TXAOUT0-18 VGA_TXAOUT1-18 VGA_TXAOUT2-18

VGA_TXAOUT0+18 VGA_TXAOUT1+18 VGA_TXAOUT2+18

VGA_TXBOUT0-18 VGA_TXBOUT1-18 VGA_TXBOUT2-18

VGA_TXBOUT0+18 VGA_TXBOUT1+18 VGA_TXBOUT2+18

12

SRN33J-5-GP-U

RN55

23 1

SRN10KJ-5-GP

RN56

4

SRN10KJ-5-GP

1 2

12

R54

R55

150R2F-1-GP

TV_DCONSEL0 TV_DCONSEL1

12

R57

R56

150R2F-1-GP

RN54

1

4

2 3

1 2

R60 1K3R2F-1-GPR60 1K3R2F-1-GP

FOR Calero: 255 ohm Crestline: 1.3k ohm

LDDC_CLK LDDC_DATA

23 1

DY

LVDS_IBG

TP41TP41

R53

150R2F-1-GP

R61

150R2F-1-GP

CRT_VSYNC CRT_HSYNC

CRTIREF

SA:0428

For Crestline : 2.4 Kohm For Calero : 1.5Kohm

-1:0908 Chang R68 from

D D

64.24015.6DL to 64.33015.6DL

M_COMP35 M_LUMA35 M_CRMA35

C C

M_BLUE17 M_GREEN17 M_RED17

B B

4

3 OF 10

U50C

J40

L_BKLT_CTRL

H39

L_BKLT_EN

E39

L_CTRL_CLK

E40

L_CTRL_DATA

C37

L_DDC_CLK

D35

L_DDC_DATA

K40

L_VDD_EN

L41

LVDS_IBG

L43

LVDS_VBG

N41

LVDS_VREFH

N40

LVDS_VREFL

D46

LVDSA_CLK#

C45

LVDSA_CLK

D44

LVDSB_CLK#

E42

LVDSB_CLK

G51

LVDSA_DATA#0

E51

LVDSA_DATA#1

F49

LVDSA_DATA#2

C48

LVDSA_DATA#3

G50

LVDSA_DATA0

E50

LVDSA_DATA1

F48

LVDSA_DATA2

D47

LVDSA_DATA3

G44

LVDSB_DATA#0

B47

LVDSB_DATA#1

B45

LVDSB_DATA#2

E44

LVDSB_DATA0

A47

LVDSB_DATA1

A45

LVDSB_DATA2

E27

TVA_DAC

G27

TVB_DAC

K27

TVC_DAC

F27

TVA_RTN

J27

TVB_RTN

L27

TVC_RTN

M35

TV_DCONSEL0

P33

TV_DCONSEL1

H32

CRT_BLUE

G32

CRT_BLUE#

K29

CRT_GREEN

J29

CRT_GREEN#

F29

CRT_RED

E29

CRT_RED#

K33

CRT_DDC_CLK

G35

CRT_DDC_DATA

E33

CRT_VSYNC

C32

CRT_TVO_IREF

F33

CRT_HSYNC

CRESTLINE-GP-U-NF

NB:71.GM965.A0U

1D05V_S0

PEG_RX#0 PEG_RX#1 PEG_RX#2 PEG_RX#3 PEG_RX#4 PEG_RX#5 PEG_RX#6 PEG_RX#7 PEG_RX#8 PEG_RX#9

PEG_RX0 PEG_RX1 PEG_RX2 PEG_RX3 PEG_RX4 PEG_RX5 PEG_RX6 PEG_RX7 PEG_RX8

PEG_RX9 PEG_RX10 PEG_RX11 PEG_RX12 PEG_RX13 PEG_RX14 PEG_RX15

PEG_TX#0 PEG_TX#1 PEG_TX#2 PEG_TX#3 PEG_TX#4 PEG_TX#5 PEG_TX#6 PEG_TX#7 PEG_TX#8 PEG_TX#9

PEG_TX0

PEG_TX1

PEG_TX2

PEG_TX3

PEG_TX4

PEG_TX5

PEG_TX6

PEG_TX7

PEG_TX8

PEG_TX9 PEG_TX10 PEG_TX11 PEG_TX12 PEG_TX13 PEG_TX14 PEG_TX15

N43 M43

J51 L51 N47 T45 T50 U40 Y44 Y40 AB51 W49 AD44 AD40 AG46 AH49 AG45 AG41

J50 L50 M47 U44 T49 T41 W45 W41 AB50 Y48 AC45 AC41 AH47 AG49 AH45 AG42

N45 U39 U47 N51 R50 T42 Y43 W46 W38 AD39 AC46 AC49 AC42 AH39 AE49 AH44

M45 T38 T46 N50 R51 U43 W42 Y47 Y39 AC38 AD47 AC50 AD43 AG39 AE50 AH43

PEG_COMPI

PEG_COMPO

LVDS

PEG_RX#10 PEG_RX#11 PEG_RX#12 PEG_RX#13 PEG_RX#14 PEG_RX#15

TV VGA

PEG_TX#10

PCI_EXPRESS GRAPHICS

PEG_TX#11 PEG_TX#12 PEG_TX#13 PEG_TX#14 PEG_TX#15

1 2

R74 24D9R2F-L-GPR74 24D9R2F-L-GP

PEGCOMP

NB_SDVOB_RNB_SDVOB_GNB_SDVOB_BNB_SDVOB_C-

NB_SDVOB_R+ NB_SDVOB_G+ NB_SDVOB_B+ NB_SDVOB_C+

3

PEGCOMP trace width and spacing is 20/25 mils.

SDVOB_INT- 23

SDVOB_INT+ 23

NB_SDVOB_RNB_SDVOB_GNB_SDVOB_BNB_SDVOB_C-

NB_SDVOB_R+ NB_SDVOB_G+ NB_SDVOB_B+

NB_SDVOB_C+

CFG[2:0] FSB Freq select

CFG8 (Low power PCIE)

(PCIE Graphics Lane Reversal)

CFG16 (FSB Dynamic ODT)

CFG19(DMI Lane Reversal)

CFG20(PCIE/SDVO consurrent)

C469 SCD1U10V2KX-4GPC469 SCD1U10V2KX-4GP

12

C464 SCD1U10V2KX-4GPC464 SCD1U10V2KX-4GP

12

C474 SCD1U10V2KX-4GPC474 SCD1U10V2KX-4GP

12

C480 SCD1U10V2KX-4GPC480 SCD1U10V2KX-4GP

12

C470 SCD1U10V2KX-4GPC470 SCD1U10V2KX-4GP

12

C468 SCD1U10V2KX-4GPC468 SCD1U10V2KX-4GP

12

C478 SCD1U10V2KX-4GPC478 SCD1U10V2KX-4GP

12

C484 SCD1U10V2KX-4GPC484 SCD1U10V2KX-4GP

12

2

Strap Pin Table

010 = FSB 800MHz 011 = FSB 667MHz Others = Reserved

CFG5 (DMI select)

CFG6 Reserved

CFG7 (CPU Strap)

CFG9

CFG[11:10] Reserved

CFG[13:12] (XOR/ALLZ)

CFG[15:14] Reserved

CFG[18:17] Reversed

SDVO_CTRLDATA 0 = No SDVO Device Present *

SDVOB_R- 23 SDVOB_G- 23 SDVOB_B- 23 SDVOB_C- 23

SDVOB_R+ 23 SDVOB_G+ 23 SDVOB_B+ 23 SDVOB_C+ 23

0 = DMI x 2 1 = DMI x 4 *

0 = Reserved 1 = Mobile CPU *

0 = Normal mode 1 = Low Power mode *

0 = Reverse Lane 1 = Normal Operation *

00 = Reserved 01 = XOR Mode Enabled 10 = All Z Mode Enabled 11 = Normal Operation (Default)*

0 = Disable 1 = Enable *

1 = SDVO Device Present

0 = Normal Operation * (Lane number in Order) 1 = Reverse lane

0 = Only PCIE or SDVO is operational * 1 = PCIE/SDVO are operating simu.

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CRESTLINE(3/6)-VGA/LVDS/TV

Size Document Number Rev

Size Document Number Rev A3

A3

Wednesday, September 12, 2007

Date: Sheet

Wednesday, September 12, 2007

Date: Sheet

Wednesday, September 12, 2007

Date: Sheet

DS2-Intel

1

10 47

-1

of

-1

A

5

A

3D3V_S03D3V_S0_DAC_BG

R58

12

0R3-0-U-GP

SCD1U16V2ZY-2GP

12

D D

3D3V_S0_DAC_CRT

SCD1U16V2ZY-2GP

12

0R3-0-U-GP

C121

SB:07/01 Change R58,R59 from 0602 close pad to

63.00000.00L

3D3V_S0

R59

12

0R3-0-U-GP

C127

SCD1U16V2ZY-2GP

3D3V_S0_DAC_CRT

3D3V_S0_DAC_BG

C124

3D3V_S0

12

Place TC21 near R58 and R59

3D3V_S0

12

TC21

DY

SC22U6D3V5MX-2GP

1D25V_S0

SC10U6D3V5KX-1GP

1D25V_S0

SC22U6D3V5MX-2GP

12

C89

C115

SC10U6D3V5KX-1GP

12

C82

C101

C C

B B

SC1U10V3KX-3GP

SC10U6D3V5KX-1GP

3D3V_S0_TVDACC

SCD022U16V2KX-3GP

C446

12

3D3V_S0_TVDACA

SCD022U16V2KX-3GP

12

C434

3D3V_S0_TVDACB

12

C440

SCD1U16V2ZY-2GP

SCD022U16V2KX-3GP

C445

12

C433

12

C439

R271

R271 0R0603-PAD

0R0603-PAD

SCD1U16V2ZY-2GP

R267

0R0603-PAD

R269

0R0603-PAD

SCD1U16V2ZY-2GP

VCCA_TVDAC

12

VCCA_TVDAC

12

VCCA_TVDAC

12

SC10U6D3V5KX-1GP

1D25V_S0_DPLLA 1D25V_S0_DPLLB

1D25V_S0_MPLL

1D8V_S0_TXLVDS

3D3V_S0

12

C171

C171 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1D25V_S0_PEGPLL

-1:0909

12

C94

SCD22U10V3KX-2GP

12

C104

SCD1U16V2ZY-2GP

1D25V_S0_PEGPLL

1D25V_S0_HPLL

150mA

12

C157

SC1KP50V2KX-1GP

400uA

SCD1U16V2ZY-2GP

C167

12

C118

SC1U10V3KX-3GP

3D3V_S0_TVDACA 3D3V_S0_TVDACB 3D3V_S0_TVDACC

1D5V_S0

1D25V_S0

1D8V_S0_LVDS

NB:71.GM965.A0U

1D5V_S0

SCD022U16V2KX-3GP

12

C114

1D8V_S0_LVDS

12

C172

SC10U6D3V5KX-1GP

20mil

SCD1U16V2ZY-2GP

4

U50H

J32

VCC_SYNC

A33

VCCA_CRT_DAC

B33

VCCA_CRT_DAC

A30

VCCA_DAC_BG

B32

VSSA_DAC_BG

B49

VCCA_DPLLA

H49

VCCA_DPLLB

AL2

VCCA_HPLL

AM2

VCCA_MPLL

A41

VCCA_LVDS

B41

VSSA_LVDS

K50

VCCA_PEG_BG

K49

VSSA_PEG_BG

U51

VCCA_PEG_PLL

AW18

VCCA_SM

AV19

VCCA_SM

AU19

VCCA_SM

AU18

VCCA_SM

AU17

VCCA_SM

AT22

VCCA_SM

AT21

VCCA_SM

AT19

VCCA_SM

AT18

VCCA_SM

AT17

VCCA_SM

AR17

VCCA_SM_NCTF

AR16

VCCA_SM_NCTF

BC29

VCCA_SM_CK

BB29

VCCA_SM_CK

C25

VCCA_TVA_DAC

B25

VCCA_TVA_DAC

C27

VCCA_TVB_DAC

B27

VCCA_TVB_DAC

B28

VCCA_TVC_DAC

A28

VCCA_TVC_DAC

M32

VCCD_CRT

L29

VCCD_TVDAC

N28

VCCD_QDAC

AN2

VCCD_HPLL

U48

VCCD_PEG_PLL

J41

VCCD_LVDS

H42

VCCD_LVDS

CRESTLINE-GP-U-NF

Place C108,C109

12

C105

near Pin N28

R82

1 2

0R0603-PAD

12

C164

SC1U10V3KX-3GP

8 OF 10

A LVDS PLL CRT

A PEG

LVDS TV/CRT

1D8V_S3

POWER

AXD

VCC_AXD_NCTF

AXF

VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK

SM CK

VCC_TX_LVDS

HV

TV A CK A SM

PEG

VCC_RXR_DMI VCC_RXR_DMI

DMI

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

VTT

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

VCC_AXD VCC_AXD VCC_AXD VCC_AXD VCC_AXD VCC_AXD

VCC_AXF VCC_AXF VCC_AXF

VCC_DMI

VCC_HV VCC_HV

VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG

VTTLF VTTLF VTTLF

VTTLF

1D8V_S0_TXLVDS

40mil

SC10U6D3V5KX-1GP

U13 U12 U11 U9 U8 U7 U5 U3 U2 U1 T13 T11 T10 T9 T7 T6 T5 T3 T2 R3 R2 R1

AT23 AU28 AU24 AT29 AT25 AT30

AR29

B23 B21 A21

AJ50

BK24 BK23 BJ24 BJ23

A43

C40 B40

AD51 W50 W51 V49 V50

AH50 AH51

A7 F2 AH1

1 2

12

C162

1D05V_S0

VTTLF1 VTTLF2 VTTLF3

R79

0R0603-PAD

3

12

C106

SC10U6D3V5KX-1GP

12

C75

SCD47U16V3ZY-3GP

12

C117

SC1U10V3KX-3GP

1D25V_S0

1D8V_S3

SC1KP50V2KX-1GP

1D8V_S0_TXLVDS

12

C153

1D05V_S0

20mil

C406

C404

12

SCD47U16V3ZY-3GP

1D8V_S3

12

C110

C110 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

SCD47U16V3ZY-3GP

C168

C83

C137

C422

SCD1U16V2ZY-2GP

12

SC4D7U6D3V5KX-3GP

C76

SC1U10V3KX-3GP

1D25V_S0

SC4D7U6D3V5KX-3GP

1D25V_S0

SCD1U16V2ZY-2GP

C96

12

3D3V_S0_HV

12

C139

SCD1U16V2ZY-2GP

SCD47U16V3ZY-3GP

3D3V_S0

1 2

BLM18PG181SN-3GP

L85 2nd source

68.00214.101/68.00217.141

2

1D25V_S0

1D25V_S0_DPLLB

1 2

C493

C396

C181

C490

C169

SC10U6D3V5KX-1GP

1

2

BAS16-1-GP

L26 L-10UH-11-GPL26 L-10UH-11-GP

12

C170

SCD1U16V2ZY-2GP

L16

1 2

BLM18AG121SN-1GP

C399

12

SCD1U16V2ZY-2GP

L4

1 2

SCD1U16V2ZY-2GP

C176

12

BLM18PG121SN-1GP

1 2

L25 L-10UH-11-GPL25 L-10UH-11-GP

SCD1U16V2ZY-2GP

12

C492

SC10U6D3V5KX-1GP

12

C180

D12

3

SC10U6D3V5KX-1GP

12

1D25V_S0_HPLL

12

1D25V_S0_PEGPLL 1D5V_S0

SC10U6D3V5KX-1GP

DY

12

1D25V_S0_DPLLA

SC10U6D3V5KX-1GP

12

1D05V_S0

SCD1U16V2ZY-2GP

12

1D05V_S0

VCCA_TVDAC

L19

12

C447

C447 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C179

1D25V_S0

Place C95,C99,C112 near Pin AD51,W50,W51

3D3V_S0 3D3V_S0_HV1D05V_S0_D

R70

12

10R2J-2-GP

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

Date: Sheet of

SC10U6D3V5KX-1GP

12

C99

1D8V_S3

SC10U6D3V5KX-1GP

12

C126

SCD022U16V2KX-3GP

C119

12

1D25V_S0_MPLL

C407

12

R71

12

0R0402-PAD

CRESTLINE(4/6)-PWR

DS2-Intel

1

Place C69,C70 near Pin B23,B21,A21

12

C107

C107 SC1U16V3ZY-GP

SC1U16V3ZY-GP

Place C75,C76 near Pin

12

C102

SCD1U16V2ZY-2GP

BK24,BK23,BJ24,BJ23

SCD1U16V2ZY-2GP

C125

Place C82,C83

12

near Pin M32,L29

1D25V_S0

SCD1U16V2ZY-2GP

C60

Place C96

12

near Pin AN2

L17

1 2

C411

BLM18AG121SN-1GP

12

SCD1U16V2ZY-2GP

SC10U6D3V5KX-1GP

12

C144

C144 SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1D25V_S0

of

11

-1

47Wednesday, September 12, 2007

A

5

A

1D05V_S0

AT35 AT34 AH28 AC32 AC31 AK32

D D

1D8V_S3

C133

C132

TC17

12

DY

C133

C142

12

C C

ST220U2VBM-3GP

SC10U6D3V5KX-1GP

B B

C134

C129

12

C129

12

SC10U6D3V5KX-1GP

12

1D05V_S0

C87

SC1U10V3KX-3GP

SCD1U16V2ZY-2GP

12

C111

SCD1U16V2ZY-2GP

AH32 AH31 AH29

AU32 AU33 AU35 AV33

AW33

C131

AW35

AY35 BA32 BA33 BA35 BB33 BC32 BC33 BC35 BD32 BD35 BE32 BE33 BE35

SCD01U16V2KX-3GP

BG32 BG33 BG35 BH32 BH34 BH35

BK32 BK33 BK34 BK35

AU30

AA20 AA23 AA26 AA28 AB21 AB24 AB29 AC20 AC21 AC23 AC24 AC26 AC28 AC29 AD20 AD23 AD24 AD28

AA31 AH20 AH21 AH23 AH24 AH26 AD31

AN14

U50F

VCC VCC VCC VCC VCC VCC

AJ31

VCC

AJ28

VCC VCC VCC VCC

AF32

VCC

R30

VCC

VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM

BF33

VCC_SM

BF34

VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM

BJ32

VCC_SM

BJ33

VCC_SM

BJ34

VCC_SM VCC_SM VCC_SM VCC_SM VCC_SM

BL33

VCC_SM VCC_SM

R20

VCC_AXG

T14

VCC_AXG

W13

VCC_AXG

W14

VCC_AXG

Y12

VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG

AF21

VCC_AXG

AF26

VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG VCC_AXG

AJ20

VCC_AXG VCC_AXG

CRESTLINE-GP-U-NF

6 OF 10

VCC CORE

POWER

VCC SM

VCC GFX

4

LIB C

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC GFX NCTF

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF

VCC SM LF

NB:71.GM965.A0U

T17 T18 T19 T21 T22 T23 T25 U15 U16 U17 U19 U20 U21 U23 U26 V16 V17 V19 V20 V21 V23 V24 Y15 Y16 Y17 Y19 Y20 Y21 Y23 Y24 Y26 Y28 Y29 AA16 AA17 AB16 AB19 AC16 AC17 AC19 AD15 AD16 AD17 AF16 AF19 AH15 AH16 AH17 AH19 AJ16 AJ17 AJ19 AK16 AK19 AL16 AL17 AL19 AL20 AL21 AL23 AM15 AM16 AM19 AM20 AM21 AM23 AP15 AP16 AP17 AP19 AP20 AP21 AP23 AP24 AR20 AR21 AR23 AR24 AR26 V26 V28 V29 Y31

AW45 BC39 BE39 BD17 BD4 AW8 AT6

1D05V_S0

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

3

-1:0909

C136

C403

12

TC15

C90

12

SCD1U16V2ZY-2GP

C66SCD1U16V2ZY-2GP C66SCD1U16V2ZY-2GP

12

C120

12

SCD22U10V2KX-1GP

C71SCD1U16V2ZY-2GP C71SCD1U16V2ZY-2GP

12

C79

12

SC4D7U6D3V5KX-3GP

C62SCD22U10V2KX-1GP C62SCD22U10V2KX-1GP

C93SCD22U10V2KX-1GP C93SCD22U10V2KX-1GP

C143SCD47U16V3ZY-3GP C143SCD47U16V3ZY-3GP

12

DY

ST220U2VBM-3GP

C155SC1U10V3KX-3GP C155SC1U10V3KX-3GP

C156SC1U10V3KX-3GP C156SC1U10V3KX-3GP

12

C403

12

SC10U6D3V5KX-1GP

C158 SCD22U10V2KX-1GPC158 SCD22U10V2KX-1GP

C160 SCD22U10V2KX-1GPC160 SCD22U10V2KX-1GP

12

C402

12

SC10U6D3V5KX-1GP

1D05V_S0

12

C92

C92 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

C116 SCD1U16V2ZY-2GPC116 SCD1U16V2ZY-2GP

12

C128 SCD22U10V2KX-1GPC128 SCD22U10V2KX-1GP12C402

C130 SCD22U10V2KX-1GPC130 SCD22U10V2KX-1GP

12

C140 SCD1U16V2ZY-2GPC140 SCD1U16V2ZY-2GP

12

1D05V_S0

C100 SCD1U16V2ZY-2GPC100 SCD1U16V2ZY-2GP

12

C141 SCD1U16V2ZY-2GPC141 SCD1U16V2ZY-2GP

12

2

U50G

AB33

VCC_NCTF

AB36

VCC_NCTF

AB37

VCC_NCTF

AC33

VCC_NCTF

AC35

VCC_NCTF

AC36

VCC_NCTF

AD35

VCC_NCTF

AD36

VCC_NCTF

AF33

VCC_NCTF

AF36

VCC_NCTF

AH33

VCC_NCTF

AH35

VCC_NCTF

AH36

VCC_NCTF

AH37

VCC_NCTF

AJ33

VCC_NCTF

AJ35

VCC_NCTF

AK33

VCC_NCTF

AK35

VCC_NCTF

AK36

VCC_NCTF

AK37

VCC_NCTF

AD33

VCC_NCTF

AJ36

VCC_NCTF

AM35

VCC_NCTF

AL33

VCC_NCTF

AL35

VCC_NCTF

AA33

VCC_NCTF

AA35

VCC_NCTF

AA36

VCC_NCTF

AP35

VCC_NCTF

AP36

VCC_NCTF

AR35

VCC_NCTF

AR36

VCC_NCTF

Y32

VCC_NCTF

Y33

VCC_NCTF

Y35

VCC_NCTF

Y36

VCC_NCTF

Y37

VCC_NCTF

T30

VCC_NCTF

T34

VCC_NCTF

T35

VCC_NCTF

U29

VCC_NCTF

U31

VCC_NCTF

U32

VCC_NCTF

U33

VCC_NCTF

U35

VCC_NCTF

U36

VCC_NCTF

V32

VCC_NCTF

V33

VCC_NCTF

V36

VCC_NCTF

V37

VCC_NCTF

AL24

VCC_AXM_NCTF

AL26

VCC_AXM_NCTF

AL28

VCC_AXM_NCTF

AM26

VCC_AXM_NCTF

AM28

VCC_AXM_NCTF

AM29

VCC_AXM_NCTF

AM31

VCC_AXM_NCTF

AM32

VCC_AXM_NCTF

AM33

VCC_AXM_NCTF

AP29

VCC_AXM_NCTF

AP31

VCC_AXM_NCTF

AP32

VCC_AXM_NCTF

AP33

VCC_AXM_NCTF

AL29

VCC_AXM_NCTF

AL31

VCC_AXM_NCTF

AL32

VCC_AXM_NCTF

AR31

VCC_AXM_NCTF

AR32

VCC_AXM_NCTF

AR33

VCC_AXM_NCTF

CRESTLINE-GP-U-NF

1

7 OF 10

T27

VSS_NCTF

T37

VSS_NCTF

U24

VSS_NCTF

U28

VSS_NCTF

V31

VSS_NCTF

V35

VSS_NCTF

AA19

VSS_NCTF

AB17

VSS_NCTF

AB35

VSS_NCTF

AD19

VSS_NCTF

AD37

VSS_NCTF

AF17

VSS_NCTF

AF35

VSS_NCTF

AK17

VSS_NCTF

AM17

VSS_NCTF

VSS NCTF

VCC NCTF

POWER

VSS SCBVSS AXM

VSS AXM NCTF

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

AM24

VSS_NCTF

AP26

VSS_NCTF

AP28

VSS_NCTF

AR15

VSS_NCTF

AR19

VSS_NCTF

AR28

VSS_NCTF

NCTF_U56-1

A3

VSS_SCB

B2

VSS_SCB

C1

VSS_SCB VSS_SCB VSS_SCB VSS_SCB

VCC_AXM VCC_AXM VCC_AXM VCC_AXM VCC_AXM VCC_AXM VCC_AXM

CRESTLINE(5/6)-PWR/GND

BL1 BL51 A51

AT33 AT31 AK29 AK24 AK23 AJ26 AJ23

NCTF_U56-2 NCTF_U56-4 NCTF_U56-3

1D05V_S0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel

12

TP89TP89

TP88TP88 TP96TP96 TP95TP95

-1

of

-1

47Wednesday, September 12, 2007

A

5

A

U50I

A13

VSS

A15

VSS

A17

VSS

A24

VSS

D D

C C

B B

AA21

VSS

AA24

VSS

AA29

VSS

AB20

VSS

AB23

VSS

AB26

VSS

AB28

VSS

AB31

VSS

AC10

VSS

AC13

VSS

AC3

VSS

AC39

VSS

AC43

VSS

AC47

VSS

AD1

VSS

AD21

VSS

AD26

VSS

AD29

VSS

AD3

VSS

AD41

VSS

AD45

VSS

AD49

VSS

AD5

VSS

AD50

VSS

AD8

VSS

AE10

VSS

AE14

VSS

AE6

VSS

AF20

VSS

AF23

VSS

AF24

VSS

AF31

VSS

AG2

VSS

AG38

VSS

AG43

VSS

AG47

VSS

AG50

VSS

AH3

VSS

AH40

VSS

AH41

VSS

AH7

VSS

AH9

VSS

AJ11

VSS

AJ13

VSS

AJ21

VSS

AJ24

VSS

AJ29

VSS

AJ32

VSS

AJ43

VSS

AJ45

VSS

AJ49

VSS

AK20

VSS

AK21

VSS

AK26

VSS

AK28

VSS

AK31

VSS

AK51

VSS

AL1

VSS

AM11

VSS

AM13

VSS

AM3

VSS

AM4

VSS

AM41

VSS

AM45

VSS

AN1

VSS

AN38

VSS

AN39

VSS

AN43

VSS

AN5

VSS

AN7

VSS

AP4

VSS

AP48

VSS

AP50

VSS

AR11

VSS

AR2

VSS

AR39

VSS

AR44

VSS

AR47

VSS

AR7

VSS

AT10

VSS

AT14

VSS

AT41

VSS

AT49

VSS

AU1

VSS

AU23

VSS

AU29

VSS

AU3

VSS

AU36

VSS

AU49

VSS

AU51

VSS

AV39

VSS

AV48

VSS

AW1

VSS

AW12

VSS

AW16

VSS

CRESTLINE-GP-U-NF

NB:71.GM965.A0U

9 OF 10

VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

4

AW24 AW29 AW32 AW5 AW7 AY10 AY24 AY37 AY42 AY43 AY45 AY47 AY50 B10 B20 B24 B29 B30 B35 B38 B43 B46 B5 B8 BA1 BA17 BA18 BA2 BA24 BB12 BB25 BB40 BB44 BB49 BB8 BC16 BC24 BC25 BC36 BC40 BC51 BD13 BD2 BD28 BD45 BD48 BD5 BE1 BE19 BE23 BE30 BE42 BE51 BE8 BF12 BF16 BF36 BG19 BG2 BG24 BG29 BG39 BG48 BG5 BG51 BH17 BH30 BH44 BH46 BH8 BJ11 BJ13 BJ38 BJ4 BJ42 BJ46 BK15 BK17 BK25 BK29 BK36 BK40 BK44 BK6 BK8 BL11 BL13 BL19 BL22 BL37 BL47 C12 C16 C19 C28 C29 C33 C36 C41

3

10 OF 10

U50J

C46

VSS

C50

VSS

C7

VSS

D13

VSS

D24

VSS

D3

VSS

D32

VSS

D39

VSS

D45

VSS

D49

VSS

E10

VSS

E16

VSS

E24

VSS

E28

VSS

E32

VSS

E47

VSS

F19

VSS

F36

VSS

F4

VSS

F40

VSS

F50

VSS

G1

VSS

G13

VSS

G16

VSS

G19

VSS

G24

VSS

G28

VSS

G29

VSS

G33

VSS

G42

VSS

G45

VSS

G48

VSS

G8

VSS

H24

VSS

H28

VSS

H4

VSS

H45

VSS

J11

VSS

J16

VSS

J2

VSS

J24

VSS

J28

VSS

J33

VSS

J35

VSS

J39

VSS

K12

VSS

K47

VSS

K8

VSS

L1

VSS

L17

VSS

L20

VSS

L24

VSS

L28

VSS

L3

VSS

L33

VSS

L49

VSS

M28

VSS

M42

VSS

M46

VSS

M49

VSS

M5

VSS

M50

VSS

M9

VSS

N11

VSS

N14

VSS

N17

VSS

N29

VSS

N32

VSS

N36

VSS

N39

VSS

N44

VSS

N49

VSS

N7

VSS

P19

VSS

P2

VSS

P23

VSS

P3

VSS

P50

VSS

R49

VSS

T39

VSS

T43

VSS

T47

VSS

U41

VSS

U45

VSS

U50

VSS

V2

VSS

V3

VSS

CRESTLINE-GP-U-NF

NB:71.GM965.A0U

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS

W11 W39 W43 W47 W5 W7 Y13 Y2 Y41 Y45 Y49 Y5 Y50 Y11 P29 T29 T31 T33 R28

AA32 AB32 AD32 AF28 AF29 AT27 AV25 H50

2

Title

CRESTLINE(6/6)-PWR/GND

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet

DS2-Intel

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

of

47Wednesday, September 12, 2007

13

47Wednesday, September 12, 2007

-1

A

5

DDR_A_DQS#[0..7]9

DDR_A_D[0..63]9 DDR_A_DM[0..7]9 DDR_A_DQS[0..7]9 DDR_A_MA[0..14]9

D D

C C

B B

A A

Layout Note: Place near DM1

1D8V_S3

C123

C91

12

SC2D2U16V5ZY-2GP

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS

DDR_VREF_S0

C112

12

SCD1U16V2ZY-2GP

DY

C77

C84

12

SC2D2U16V5ZY-2GP

C73

C95

12

SCD1U16V2ZY-2GP

12

SC2D2U16V5ZY-2GP

C423

C63

12

SCD1U16V2ZY-2GP

change to 8P4R

DDR_VREF_S0

RN13

DDR_A_MA9 DDR_A_MA5 DDR_A_MA8 DDR_A_MA3

DDR_A_MA1 DDR_A_MA10 DDR_A_BS0 DDR_A_WE#

DDR_A_CAS# DDR_A_MA13 M_ODT1 DDR_CS1_DIMMA#

RN13

1 2 3 4 5

SRN56J-5-GP

RN11

1 2 3 4 5

SRN56J-5-GP

RN9

1 2 3 4 5

SRN56J-5-GP

5

1

8

2

7

3

6

4 5

1

8

2

7

3

6

4 5

8

1

7

2

6

3 4 5

1 2 3 4 5

C81

SCD1U16V2ZY-2GP

12

SCD1U16V2ZY-2GP

RN15

SRN56J-5-GP

SRN56J-5-GP RN50

RN50

SRN56J-5-GP

SRN56J-5-GP RN48

RN48

SRN56J-5-GP

SRN56J-5-GP RN52

RN52

SRN56J-5-GP

DDR_A_BS[0..2]9

C98

12

SCD1U16V2ZY-2GP

C430

SCD1U16V2ZY-2GP

DDR_A_MA12

8

DDR_A_BS2

7

DDR_CKE0_DIMMA

6

DDR_A_MA0

8

DDR_A_MA2

7

DDR_A_MA4

6

DDR_A_MA6

M_ODT0

8

DDR_CS0_DIMMA#

7

DDR_A_RAS#

6

DDR_A_BS1

DDR_A_MA7

8

DDR_A_MA11

7

DDR_A_MA14

6

DDR_CKE1_DIMMA

C69

12

SCD1U16V2ZY-2GP

C438

12

SCD1U16V2ZY-2GP

4

C122

12

SC10U6D3V5KX-1GP

C421

C427

12

SCD1U16V2ZY-2GP

C421

C85

12

SCD1U16V2ZY-2GP

Layout Note: Place these resistors closely DM1,all trace length Max=1.5"

4

SCD1U16V2ZY-2GP

DDR_CS0_DIMMA#8

DDR_CS1_DIMMA#8 DDR_CKE0_DIMMA8

DDR_CKE1_DIMMA8

ICH_SMBDATA4,15,21

DDR_VREF_S3

SCD1U16V2ZY-2GP

3

DM2

MH1

DDR_A_MA0 DDR_A_MA1 DDR_A_MA2 DDR_A_MA3 DDR_A_MA4 DDR_A_MA5 DDR_A_MA6 DDR_A_MA7 DDR_A_MA8 DDR_A_MA9 DDR_A_MA10 DDR_A_MA11 DDR_A_MA12 DDR_A_MA13 DDR_A_MA14

DDR_A_BS2

DDR_A_BS0 DDR_A_BS1

DDR_A_D0 DDR_A_D1 DDR_A_D2 DDR_A_D3 DDR_A_D4 DDR_A_D5 DDR_A_D6 DDR_A_D7 DDR_A_D8 DDR_A_D9 DDR_A_D10 DDR_A_D11 DDR_A_D12 DDR_A_D13 DDR_A_D14 DDR_A_D15 DDR_A_D16 DDR_A_D17 DDR_A_D18 DDR_A_D19 DDR_A_D20 DDR_A_D21 DDR_A_D22 DDR_A_D23 DDR_A_D24 DDR_A_D25 DDR_A_D26 DDR_A_D27 DDR_A_D28 DDR_A_D29 DDR_A_D30 DDR_A_D31 DDR_A_D32 DDR_A_D33 DDR_A_D34 DDR_A_D35 DDR_A_D36 DDR_A_D37 DDR_A_D38 DDR_A_D39 DDR_A_D40 DDR_A_D41 DDR_A_D42 DDR_A_D43 DDR_A_D44 DDR_A_D45 DDR_A_D46 DDR_A_D47 DDR_A_D48 DDR_A_D49 DDR_A_D50 DDR_A_D51 DDR_A_D52 DDR_A_D53 DDR_A_D54 DDR_A_D55 DDR_A_D56 DDR_A_D57 DDR_A_D58 DDR_A_D59 DDR_A_D60 DDR_A_D61 DDR_A_D62 DDR_A_D63

PM_EXTTS#08

DDR_CS0_DIMMA#

DDR_CS1_DIMMA# DDR_CKE0_DIMMA DDR_CKE1_DIMMA

12

3

DDR_A_RAS#

DDR_A_CAS#

DDR_A_WE#

ICH_SMBCLK

ICH_SMBDATA

M_ODT0 M_ODT1

DDR_VREF_S3

12

C185

SC2D2U16V5ZY-2GP

DDR_A_RAS#9 DDR_A_CAS#9

DDR_A_WE#9

ICH_SMBCLK4,15,21

M_ODT08

M_ODT18

C184

MH1

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16_BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

50

NC#50

69

NC#69

83

NC#83

120

NC#120

163

NC#163/TEST

110

CS0#

115

CS1#

79

CKE0

80

CKE1

108

RAS#

113

CAS#

109

WE#

197

SCL

195

SDA

114

ODT0

119

ODT1

1

VREF

201

GND

SKT-SODIMM200-38GP

Main Source:62.10017.E31 2nd Source: 62.10017.A41

MH2

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6

DQS7 DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

CK0#

CK1#

VDD_SPD

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

GND

2

MH2

DDR_A_DQS0

13

DDR_A_DQS1

31

DDR_A_DQS2

51

DDR_A_DQS3

70

DDR_A_DQS4

131

DDR_A_DQS5

148

DDR_A_DQS6

169

DDR_A_DQS7

188

DDR_A_DQS#0

11

DDR_A_DQS#1

29

DDR_A_DQS#2

49

DDR_A_DQS#3

68

DDR_A_DQS#4

129

DDR_A_DQS#5

146

DDR_A_DQS#6

167

DDR_A_DQS#7

186

DDR_A_DM0

10

DDR_A_DM1

26

DDR_A_DM2

52

DDR_A_DM3

67

DDR_A_DM4

130

DDR_A_DM5

147

DDR_A_DM6

170

DDR_A_DM7

185

M_CLK_DDR0

30

CK0 CK1

SA0 SA1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

32 164 166

198 200

199

81 82 87 88 95 96 103 104 111 112 117 118

2 3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

202

M_CLK_DDR#0 M_CLK_DDR1 M_CLK_DDR#1

SA0

1 2

SA1

1 2

1D8V_S3

2

SB:0707 For EMI request

R37 0R0402-PADR37 0R0402-PAD R39 0R0402-PADR39 0R0402-PAD

SCD1U16V2ZY-2GP

M_CLK_DDR0 8 M_CLK_DDR#0 8

M_CLK_DDR1 8 M_CLK_DDR#1 8

SA:0428

12

C41

Title

DDRII-SODIMM SLOT1

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

M_CLK_DDR0 M_CLK_DDR#0

12

C46

C46 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

DY

1

12

C476

put near connector

M_CLK_DDR1

M_CLK_DDR#1

C388

3D3V_S0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel -1

C477

SC10P50V2JN-4GP

12

C391

SC10P50V2JN-4GP

14 47Wednesday, September 12, 2007

of

1

of

5

DDR_B_DQS#[0..7]9

DDR_B_D[0..63]9 DDR_B_DM[0..7]9 DDR_B_DQS[0..7]9

12

SC2D2U16V5ZY-2GP

C419

SCD1U16V2ZY-2GP

DDR_VREF_S0

C70

SC2D2U16V5ZY-2GP

C441

12

SCD1U16V2ZY-2GP

1 2 3 4 5

1 2 3

1 2 3 4 5

1 2 3

DDR_B_MA[0..14]9

DDR_B_BS[0..2]9

C103

12

SCD1U16V2ZY-2GP

C443

12

RN14

SRN56J-5-GP

SRN56J-5-GP RN51

RN51

SRN56J-5-GP

SRN56J-5-GP RN10

RN10

SRN56J-4-GP

RN16

SRN56J-5-GP

RN53

SRN56J-4-GP

12

SCD1U16V2ZY-2GP

DDR_B_MA14

8

DDR_B_MA6

7

DDR_B_MA2

6

DDR_B_MA4

DDR_B_MA12

8

DDR_B_MA9

7

DDR_B_MA8

6

DDR_B_MA5

DDR_B_MA13

4

M_ODT2

8

DDR_CKE3_DIMMB

7

DDR_B_MA7

6

DDR_B_MA11

DDR_CKE2_DIMMB

4

DDR_B_BS2

C78

SCD1U16V2ZY-2GP

C97

12

SCD1U16V2ZY-2GP

D D

C C

B B

A A

Layout Note: Place near DM2

1D8V_S3

C88

12

SC2D2U16V5ZY-2GP

Layout Note: Place one cap close to every 2 pullup resistors terminated to +0.9VS

DDR_VREF_S0

C86

12

SCD1U16V2ZY-2GP

DY

DDR_B_BS0 DDR_B_MA10 DDR_B_MA1 DDR_B_MA3

DDR_CS2_DIMMB# DDR_B_BS1 DDR_B_RAS# DDR_B_MA0

M_ODT3 DDR_CS3_DIMMB# DDR_B_CAS# DDR_B_WE#

5

C109

12

C64

SCD1U16V2ZY-2GP

1 2 3 4 5

12

SC2D2U16V5ZY-2GP

C113

12

SCD1U16V2ZY-2GP

RN49

SRN56J-5-GP

SRN56J-5-GP RN12

RN12

SRN56J-5-GP

SRN56J-5-GP RN47

RN47

SRN56J-5-GP

C67

12

8 7 6

12

C425

4

C108

C72

12

SC10U6D3V5KX-1GP

SCD1U16V2ZY-2GP

C74

C429

12

SCD1U16V2ZY-2GP

Layout Note: Place these resistors closely DM2,all trace length Max=1.5"

DDR_VREF_S3

4

M_ODT28

M_ODT38

DDR_VREF_S3

SCD1U16V2ZY-2GP

C499

12

3

DDR_B_MA0 DDR_B_MA1 DDR_B_MA2 DDR_B_MA3 DDR_B_MA4 DDR_B_MA5 DDR_B_MA6 DDR_B_MA7 DDR_B_MA8 DDR_B_MA9 DDR_B_MA10 DDR_B_MA11 DDR_B_MA12 DDR_B_MA13 DDR_B_MA14

DDR_B_BS2 DDR_B_BS0

DDR_B_BS1

DDR_B_D0 DDR_B_D1 DDR_B_D2 DDR_B_D3 DDR_B_D4 DDR_B_D5 DDR_B_D6 DDR_B_D7 DDR_B_D8 DDR_B_D9 DDR_B_D10 DDR_B_D11 DDR_B_D12 DDR_B_D13 DDR_B_D14 DDR_B_D15 DDR_B_D16 DDR_B_D17 DDR_B_D18 DDR_B_D19 DDR_B_D20 DDR_B_D21 DDR_B_D22 DDR_B_D23 DDR_B_D24 DDR_B_D25 DDR_B_D26 DDR_B_D27 DDR_B_D28 DDR_B_D29 DDR_B_D30 DDR_B_D31 DDR_B_D32 DDR_B_D33 DDR_B_D34 DDR_B_D35 DDR_B_D36 DDR_B_D37 DDR_B_D38 DDR_B_D39 DDR_B_D40 DDR_B_D41 DDR_B_D42 DDR_B_D43 DDR_B_D44 DDR_B_D45 DDR_B_D46 DDR_B_D47 DDR_B_D48 DDR_B_D49 DDR_B_D50 DDR_B_D51 DDR_B_D52 DDR_B_D53 DDR_B_D54 DDR_B_D55 DDR_B_D56 DDR_B_D57 DDR_B_D58 DDR_B_D59 DDR_B_D60 DDR_B_D61 DDR_B_D62 DDR_B_D63

DDR_B_DQS#0 DDR_B_DQS#1 DDR_B_DQS#2 DDR_B_DQS#3 DDR_B_DQS#4 DDR_B_DQS#5 DDR_B_DQS#6 DDR_B_DQS#7

DDR_B_DQS0 DDR_B_DQS1 DDR_B_DQS2 DDR_B_DQS3 DDR_B_DQS4 DDR_B_DQS5 DDR_B_DQS6 DDR_B_DQS7

M_ODT2 M_ODT3

12

C503

SC2D2U16V5ZY-2GP

3

DM1

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

DQS0#

29

DQS1#

49

DQS2#

68

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

OTD0

119

OTD1

1

VREF

2

VSS

202

GND

MH1

SKT-SODIMM200-37GP

Main Source:62.10017.E21 2nd Source: 62.10017.A51

NC#163/TEST

RAS#

WE#

CAS# CS0#

CS1# CKE0

CKE1

CK0#

CK1#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA

VDDSPD

NC#50 NC#69 NC#83

NC#120

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GND MH2

108 109 113

110 115

79 80

30

CK0

32 164

CK1

166 10

26 52 67 130 147 170 185

195 197

SCL

199

R36 0R0402-PADR36 0R0402-PAD

198

SA0

R38 10KR2J-3-GPR38 10KR2J-3-GP

200

SA1

50 69 83 120 163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201 MH2

2

DDR_B_RAS# DDR_B_WE# DDR_B_CAS#

DDR_CS2_DIMMB# DDR_CS3_DIMMB#

DDR_CKE2_DIMMB DDR_CKE3_DIMMB

M_CLK_DDR2 M_CLK_DDR#2

M_CLK_DDR3 M_CLK_DDR#3

DDR_B_DM0 DDR_B_DM1 DDR_B_DM2 DDR_B_DM3 DDR_B_DM4 DDR_B_DM5 DDR_B_DM6 DDR_B_DM7

ICH_SMBDATA ICH_SMBCLK

1 2 1 2

1D8V_S3

2

1

M_CLK_DDR2 M_CLK_DDR#2

C175

DDR_B_RAS# 9

DDR_B_WE# 9

DDR_B_CAS# 9 DDR_CS2_DIMMB# 8

DDR_CS3_DIMMB# 8

DDR_CKE2_DIMMB 8

DDR_CKE3_DIMMB 8 M_CLK_DDR2 8

M_CLK_DDR#2 8 M_CLK_DDR3 8

M_CLK_DDR#3 8

ICH_SMBDATA 4,14,21

ICH_SMBCLK 4,14,21

SA:0428

PM_EXTTS#1 8

SB:0707 For EMI request

C44

3D3V_S0

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

C44

SCD1U16V2ZY-2GP

DDRII-SODIMM SLOT2

C175

SC10P50V2JN-4GP

put near connector

M_CLK_DDR3 M_CLK_DDR#3

C50

3D3V_S0

12

C38

C38 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel -1

1

C174

12

SC10P50V2JN-4GP

12

C51

SC10P50V2JN-4GP

of

15 47Wednesday, September 12, 2007

A

B

C

D

E

HDMI I/F & CONNECTOR

R288 0R0603-PADR288 0R0603-PAD

HDMI_TXD#123 HDMI_TXD#023

4 4

HDMI_TXD123

HDMI_TXD#223

3 3

HDMI_TXD223

HDMI_TXD#1

HDMI_TXD1

HDMI_TXD#2

HDMI_TXD2

1 2

1

2

1 2

R292 0R0603-PADR292 0R0603-PAD

R295 0R0603-PADR295 0R0603-PAD

1 2

1

2

1 2

R299 0R0603-PADR299 0R0603-PAD

HDMI_TXD#1_C

L23

ACM2012H-900-GP

DY

3 4

HDMI_TXD1_C

HDMI_TXD#2_C

L24

ACM2012H-900-GP

DY

3 4

HDMI_TXD2_C

HDMI_TXD023

HDMI_TX#C23

HDMI_TXC23

R278 0R0603-PADR278 0R0603-PAD

HDMI_TXD#0

HDMI_TXD0

HDMI_TX#C

1 2

1

2

1 2

R285 0R0603-PADR285 0R0603-PAD

R276 0R0603-PADR276 0R0603-PAD

1 2

1

2

1 2

R277 0R0603-PADR277 0R0603-PAD

HDMI_TXD#0_C

L21

ACM2012H-900-GP

DY

3 4

HDMI_TXD0_C

HDMI_TX#C_C

L20

ACM2012H-900-GP

DY

3 4

HDMI_TXC_CHDMI_TXC

5V_S0

12

R73

R73 10KR2J-3-GP

10KR2J-3-GP

DY

U16

1

HDMI_SDATA_C HDMI_SDATA

2 3 4

2N7002SPT

HDMI CONN

HDMI1

HDMI_TXD#0_C HDMI_TXD0_C

HDMI_TXD#1_C HDMI_TXD1_C

HDMI_TXD#2_C HDMI_TXD2_C

HDMI_TX#C_C HDMI_TXC_C

9

TMDS_DATA0-

7

TMDS_DATA0+

6

TMDS_DATA1-

4

TMDS_DATA1+

3

TMDS_DATA2-

1

TMDS_DATA2+

12

TMDS_CLOCK-

10

TMDS_CLOCK+

8

TMDS_DATA0_SHIELD

5

TMDS_DATA1_SHIELD

2

TMDS_DATA2_SHIELD

11

TMDS_CLOCK_SHIELD

SKT-USB-169-GP

62.10027.661

3D3V_S0

1

23

RN19

SRN2K2J-1-GP

DY

4

HDMI_SCLK_CHDMI_SCLK

6 5

SB:06/21 HDMI1 pin18

DY

connect to 5V_S0 directly.

+5V_POWER

RESERVED#14

HOT_PLUG_DETECT

DDC/CEC_GROUNG

SDA SCL

CEC

GND GND GND GND

18

16 15 13 14 19 17

20 21 22 23

5V_S0

HDMI_SDATA_C HDMI_SCLK_C HDMI_CEC HDMI_CNC HDMI_DP_C2

DY

R444

1 2

0R2J-2-GP

D31

5V_HDMI_C

CH751H-40PT

D11

CH751H-40PT

1 2

0R2J-2-GP

RN17

RN17 SRN1KJ-7-GP

SRN1KJ-7-GP

1 2 1 2

D11

R445

DY

SB:06/22 Change R66,R67 from

63.R0034.1DL to ZZ.R0402.ZZZ

HDMI_HDP

5V_HDMI_D

1

23

4

R67 0R0402-PADR67 0R0402-PAD R66 0R0402-PADR66 0R0402-PAD

TP91 TPAD28TP91 TPAD28 TP90 TPAD28TP90 TPAD28

1 2

R63 1KR2J-1-GPR63 1KR2J-1-GP

SB:06/23 Add R444,R445(63.R0034.1DL)

21

5V_S0

SB:06/21 Add D31 CH751H for HDMI SM bus clock pull up to 5V_S0.

SB:06/23 Add R444,R445(63.R0034.1DL)

HDMI_SDATA HDMI_SCLK

12

R62

R62 15K4R2F-GP

15K4R2F-GP

HDMI_SDATA 23 HDMI_SCLK 23

HDMI_HDP 23

-1:0909

TV OUT CONN (Optional)

2 2

1 1

A

Move to Right I/O Board

B

C

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

D

Date: Sheet of

HDMI/TV Connector

DS2-Intel -1

E

16 47Wednesday, September 12, 2007

of

A

CRT I/F & CONNECTOR

B

C

D

E

4 4

Layout Note: Place these resistors

GMCH_HSYNC10

GMCH_VSYNC10

close to the CRT-out connector

DDC_CLK_CON

A

12

R23

R32

150R2F-1-GP

14

1

2 3

U9A TSAHCT125PW-GPU9A TSAHCT125PW-GP

7

3D3V_S0

U3

5 6

2N7002SPT

12

C30

SC8P250V2CC-GP

R19

150R2F-1-GP

14

4

5 6

U9B TSAHCT125PW-GPU9B TSAHCT125PW-GP

7

34 2 1

12

C27

5V_S0

12

C47

C47 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

HSYNC_5

VSYNC_5 JVGA_VS

RN2

4

SRN2K2J-1-GP

DDC_DATA_CON

5V @ ext. CRT side

M_RED10

M_GREEN10

M_BLUE10

3 3

Hsync & Vsync level shift

2 2

GMCH_DDCDATA10

1 1

L3 BLM18BB470SN1-GPL3 BLM18BB470SN1-GP

1 2

L2 BLM18BB470SN1-GPL2 BLM18BB470SN1-GP

1 2

L1 BLM18BB470SN1-GPL1 BLM18BB470SN1-GP

12

SC8P250V2CC-GP

1 2

12

C15

SC8P250V2CC-GP

SB:07/09 ChangeC14,C15,C26,C27,C9,C30 from 78.3R374.1FL to 78.8R274.1FL

RN6

JVGA_HS

4

GMCH_DDCCLK 10

B

1 2 3

SRN33J-5-GP-U

3D3V_S0

1 23

C29

12

C26

SC8P250V2CC-GP

CRT_R

CRT_G

CRT_B

12

SC8P250V2CC-GP

12

C14

SC8P250V2CC-GP

C

SCD01U16V2KX-3GP

5V_CRT_S0 5V_S0

12

C18

CRT_G

JVGA_HS

12

C354

C354 SC33P50V2JN-3GP

SC33P50V2JN-3GP

DY

SB:0630 Change CRT1 from

20.20334.015 to 20.20735.015.

VIDEO-15-84-GP-U

CRT_R

CRT_G

CRT_B

D

D4 CH751H-40PTD4 CH751H-40PT

CRT1

MH1

11

7

2

13

9 4

15

MH2

17 6 1

12 8 3 14 10 5 16

20.20735.015

D7

2

3

1

DY

BAV99PT-GP-U

D5

2

3

DY

1

BAV99PT-GP-U

D3

2

3

1

DY

BAV99PT-GP-U

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

21

CRT_R

CRT_B

JVGA_VS

DDC_DATA_CON DDC_CLK_CON

12

C347

DY

SC33P50V2JN-3GP

5V_S0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CRT Connector

DS2-Intel -1

E

5V_CRT_S0

C359

SC22P50V2JN-4GP

17 47Wednesday, September 12, 2007

1

23

4

12

C334

of

RN3

SRN2K2J-1-GP

SC22P50V2JN-4GP

SC:08/09 Add LCD2 (20.F1093.040) ,please check LCD1 and LCD 2 layout overlap possibility.

4 4

3 3

A

LCD1

49 47

46

45

44

43

42

41 48

IPEX-CONN40-2R-GP

20.F1093.040

SC:08/15 Rename "LCD2" to "LCD1"

51 40 39 38 37 36

LCD_CBL_DET#

35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2

1 50

-1:08/29 Change LCD1 pin 31 from GND to NC

BAT_SDA BAT_SCL BACKLITEON LCD_TST LDDC_CLK LDDC_DATA LCD_DET_G VGA_TXBOUT0VGA_TXBOUT0+

VGA_TXBOUT1VGA_TXBOUT1+

VGA_TXBOUT2VGA_TXBOUT2+

VGA_TXBCLKVGA_TXBCLK+

VGA_TXAOUT0VGA_TXAOUT0+

VGA_TXAOUT1VGA_TXAOUT1+

VGA_TXAOUT2VGA_TXAOUT2+

VGA_TXACLKVGA_TXACLK+

VBL19

LCD_CBL_DET# 34

5V_AUX_S5 3D3V_S0

BAT_SDA 34,38,39 BAT_SCL 34,38,39

LCD_TST 34

LDDC_CLK 10

LDDC_DATA 10

R460 100R2J-2-GPR460 100R2J-2-GP

1 2

VGA_TXBOUT0- 10 VGA_TXBOUT0+ 10

VGA_TXBOUT1- 10 VGA_TXBOUT1+ 10

VGA_TXBOUT2- 10 VGA_TXBOUT2+ 10

VGA_TXBCLK- 10 VGA_TXBCLK+ 10

VGA_TXAOUT0- 10

VGA_TXAOUT0+ 10

VGA_TXAOUT1- 10

VGA_TXAOUT1+ 10

VGA_TXAOUT2- 10

VGA_TXAOUT2+ 10

VGA_TXACLK- 10

VGA_TXACLK+ 10

Mic Power CAMERA Power

R189

1 2

0R0603-PAD

600ohm 100MHz 200mA 0.5ohm DC

2 2

0R0603-PAD

SC:08/09 Add EC154(78.10491.4FL) for EMI request .Default is DUMMY

V_AUD_DMIC3D3V_S0 +5V_RUN_CARMERA

12

EC154

DY

SCD1U16V2ZY-2GP

12

C341

SC4D7U6D3V3KX-GP

12

C342

SCD1U10V2KX-4GP

R186

1 2

0R0603-PAD

12

EC153

SC:08/09 Add EC153(78.10491.4FL) for EMI request

DY

.Default is DUMMY

SCD1U16V2ZY-2GP

B

SC:08/05 Change C57 from

78.10423.5FL to

78.10523.5BL

12

C57

EC16

SCD1U10V2KX-4GP

SC:08/09 Add EC151(78.22124.2FL) for EMI request .Default is DUMMY

SC1U10V3KX-3GP

-1:09/02 Add R460 to prevent power short to GND via "LCD_CBL_DET#"

5V_S0

+LCDVDD

3D3V_S0

12

R246

10KR2J-3-GP

R245 0R2J-2-GP

R247 0R2J-2-GP

VGA_TXAOUT0+

VGA_TXAOUT0-

12

EC169

VGA_TXAOUT1+ VGA_TXAOUT1-

EC170

VGA_TXAOUT2+ VGA_TXAOUT2-

EC171

AUD_DMIC_CLK_G_R AUD_DMIC_IN0_R

12

EC151

DY

SC220P50V2KX-3GP

12

SC5D6P50V2CN-1GP

12

SC5D6P50V2CN-1GP

12

SC5D6P50V2CN-1GP

DY

EC182

EC183

EC184

12

DY

12

DY

12

SC5D6P50V2CN-1GP

EC152

SC220P50V2KX-3GP

LBKLT_CTL 10

BRIGHTNESS 34

VGA_TXACLK+

VGA_TXACLK-

EC167

VGA_TXBCLK+ VGA_TXBCLK-VGA_TXBCLK-

EC168

SC:08/09 Add EC152(78.22124.2FL) for EMI request .Default is DUMMY

C

12

DY

EC185

12

SC5D6P50V2CN-1GP

EC186

12

SC5D6P50V2CN-1GP

SC:08/13 Add EC169,EC170,EC171, R462,R463,R464 on LVDS channel A each data pairs. This is for RF request .Default is DY.

LCD_TSTBACKLITEON

DY

EC59

EC59 SC33P50V2JN-3GP

SC33P50V2JN-3GP

5V_AUX_S5

12

EC161

DY

SCD1U16V2ZY-2GP

SC:08/13 Add EC167,EC168(78.10034.1FL), R460,R461(63.R0034.1DL) place cross LVDS CLK

SC5D6P50V2CN-1GP

A,Bpair. Default is DY.This is for RF request.

-1:08/29 Change LVDS channel A and channel B EMI solution. this is for antena team request.

12

EC60

EC60 SC33P50V2JN-3GP

SC33P50V2JN-3GP

SC:08/09 Add EC161(78.10491.4FL) for EMI request .Default is DUMMY

D

VBL19

12

C56

SC1KP50V2KX-1GP

INVERTER POWER

SC:08/03 Add D32 ,R456 connect to U49 pin3 and delete R46 that are for LCD test function.

D32

LCDVDD_EN10

LCD_TST_EN34

1

2

BAT54CPT-GP

LCD POWER

1 2

FUSE-3A32V-7-GP

FUSE-3A32V-7-GP C58

C58 SCD1U50V3KX-GP

SCD1U50V3KX-GP

1 2

3

12

F2

ENVDD

R456

E

DCBATOUT

3D3V_S0+LCDVDD

U49

1

IN#1

2

OUT

3

EN

4

12

SCD1U16V2ZY-2GP

100KR2J-1-GP

GND

C61

G5281RC1U-GP

GND

9 8

IN#8

7

IN#7

6

IN#6

5

IN#5

SC1U16V3ZY-GP

12

C417

+5V_RUN_CARMERA

CAMERA1

11

1 2

3 4 5 6

1 1

SC:08/09 Add EC157(78.33034.1FL) for EMI request .Default is DUMMY

10

7 8 9

MLX-CON9-1-GP

A

V_AUD_DMIC

AUD_DMIC_CLK_G_R AUD_DMIC_IN0_R

CAMERA_USB1CAMERA_USB1+

R195 33R2J-2-GPR195 33R2J-2-GP

1 2

R196 33R2J-2-GPR196 33R2J-2-GP

1 2

12

DY

DMIC_DET# 34

EC157

EC157 SC33P50V2JN-3GP

SC33P50V2JN-3GP

AUD_DMIC_CLK_G 32 AUD_DMIC_IN0 32

12

EC156

EC156 SC33P50V2JN-3GP

SC33P50V2JN-3GP

DY

SC:08/09 Add EC156(78.33034.1FL) for EMI request .Default is DUMMY

B

12

EC155

EC155 SC33P50V2JN-3GP

SC33P50V2JN-3GP

DY

SC:08/09 Add EC155(78.33034.1FL) for EMI request .Default is DUMMY

R193 0R0603-PADR193 0R0603-PAD

R188 0R0603-PADR188 0R0603-PAD

1 2

1

4

1 2

-1:09/11

2

DY

DLW21SN900SQ2LUGP

DLW21SN900SQ2LUGP L12

L12

3

-1:09/11

C

USB_PN6 21

SC:08/13 Change L12 pin connection.pin 1 connect to "USB_PN6", pin4 connect to "USB_PP6" . This change is for layout request.

USB_PP6 21

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

LCD/Inverter Connector

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel -1

E

of

18 47Wednesday, September 12, 2007

5

4

3

2

1

PCI_AD[0..31]25

3D3V_S0

RN37

1

D D

C C

2 3 4 5

SRN8K2J-4-GP

SRN8K2J-4-GP RN39

RN39

1 2 3 4 5

SRN8K2J-4-GP

SRN8K2J-4-GP RN41

RN41

1 2 3 4 5

SRN8K2J-4-GP

SRN8K2J-4-GP RN42

RN42

1 2 3 4 5

SRN8K2J-4-GP

SRN8K2J-4-GP RN40

RN40

1 2 3 4 5

SRN8K2J-4-GP

SRN8K2J-4-GP RN38

RN38

1 2 3 4 5

SRN8K2J-4-GP

8 7 6

PCI_GNT1# PCI_REQ1# PCI_REQ2# PCI_FRAME#

PCI_PIRQG# PCI_SERR# PCI_PIRQA# PCI_PIRQE#

PCI_IRDY# PCI_GNT#0 PCI_PERR#

PCI_PLOCK#

PCI_PIRQB# PCI_PIRQC# PCI_REQ#0 PCI_PIRQH#

PCI_GNT3# PCI_TRDY# PCI_REQ3# PCI_PIRQD#

PCI_GNT2# PCI_DEVSEL# PCI_PIRQF# PCI_STOP#

PCI_AD[0..31]

PCI_PIRQA#25 PCI_PIRQC#25

PCI_AD0 PCI_AD1 PCI_AD2 PCI_AD3 PCI_AD4 PCI_AD5 PCI_AD6 PCI_AD7 PCI_AD8 PCI_AD9 PCI_AD10 PCI_AD11 PCI_AD12 PCI_AD13 PCI_AD14 PCI_AD15 PCI_AD16 PCI_AD17 PCI_AD18 PCI_AD19 PCI_AD20 PCI_AD21 PCI_AD22 PCI_AD23 PCI_AD24 PCI_AD25 PCI_AD26 PCI_AD27 PCI_AD28 PCI_AD29 PCI_AD30 PCI_AD31

PCI_PIRQA# PCI_PIRQB# PCI_PIRQC# PCI_PIRQD#

3 OF 6

U27C

D20

AD0

PCI

AD1 AD2

REQ1#/GPIO50

AD3

GNT1#/GPIO51

AD4

REQ2#/GPIO52

AD5

GNT2#/GPIO53

AD6

GNT3#/GPIO55

AD7

REQ3#/GPIO54 AD8 AD9 AD10 AD11 AD12 AD13 AD14

B6

AD15 AD16

A9

AD17 AD18 AD19 AD20 AD21

C7

AD22 AD23 AD24 AD25 AD26

D8

AD27

A6

AD28

E8

AD29

D6

AD30

A3

AD31

Interrupt I/F

F9

PIRQA# PIRQB# PIRQC# PIRQD#

PIRQE#/GPIO2

PIRQF#/GPIO3 PIRQG#/GPIO4 PIRQH#/GPIO5

B5 C5

ICH8-M-1-GP-U-NF

SB:71.ICH8M.C0U

G16

E19 D19 A20 D17 A21 A19 C19 A18 B16 A12 E16 A14

A15 C11 D11

B12 C12 D10

F13 E11 E13 E12

A10

REQ0# GNT0#

C/BE0# C/BE1# C/BE2# C/BE3#

IRDY#

PAR

PCIRST#

DEVSEL#

PERR# FRAME# PLOCK#

SERR#

STOP# TRDY#

PLTRST#

PCICLK

PME#

A4 D7

PCI_REQ1#

E18

PCI_GNT1#

C18

PCI_REQ2#

B19

PCI_GNT2#

F18

PCI_GNT3#

C10

PCI_REQ3#

A11 C17

E15 F16 E17

PCI_IRDY#

C8

PCI_PAR

D9

PCI_PCIRST#

G6

PCI_DEVSEL#

D16

PCI_PERR#

A7

PCI_FRAME#

A17

PCI_PLOCK#

B7

PCI_SERR#

F10

PCI_STOP#

C16

PCI_TRDY#

C9

PCI_PLTRST#

AG24

CLK_PCI_ICH

B10 G7

R398 10KR2J-3-GPR398 10KR2J-3-GP

1 2

PCI_PIRQE#

F8

PCI_PIRQF#

G11

PCI_PIRQG#

F12

PCI_PIRQH#

B3

PCI_REQ#0 25

PCI_GNT#0 25

TP129TP129 TP125TP125

PCI_C/BE#0 25 PCI_C/BE#1 25 PCI_C/BE#2 25 PCI_C/BE#3 25

PCI_IRDY# 25 PCI_PAR 25

PCI_DEVSEL# 25 PCI_PERR# 25 PCI_FRAME# 25

PCI_SERR# 25

PCI_STOP# 25 PCI_TRDY# 25

CLK_PCI_ICH 4

ICH_PME# 25

-1:0909

3D3V_S5

PCI_PCIRST#

DY

12

R415

R415 100KR2J-1-GP

100KR2J-1-GP

Place closely pin B10

CLK_PCI_ICH

SC8P250V2CC-GP

PCIRST1# 25,27

C599

R425

R425 10R2J-2-GP

10R2J-2-GP

1 2 12

DY

A16 swap override Strap

B B

PCI_GNT3#

A A

Low= A16 swap override Enable High= Default *

PCI_GNT3#

12

R424

R424 1KR2J-1-GP

1KR2J-1-GP

DY

5

4

Boot BIOS Strap PCI_GNT0# SPI_CS#1 Boot BIOS Location

0 1 11

1 0

SPI PCI LPC *

3

PCI_PLTRST#

3D3V_S5

U33B

147

4 5

R419 33R2J-2-GPR419 33R2J-2-GP

2

6

SSLVC08APWR-GP

DY

12

PLT_RST1#

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

12

R416

R416 100KR2J-1-GP

100KR2J-1-GP

ICH8(1/4)-PCI/INT

PLT_RST1# 8,23,24,28,29,30,34

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel

19 47Wednesday, September 12, 2007

1

of

-1

5

+RTCVCC

1 2

R365 330KR2J-L1-GPR365 330KR2J-L1-GP

1 2

R364 1MR2J-1-GPR364 1MR2J-1-GP

1 2

R356 330KR2J-L1-GPR356 330KR2J-L1-GP

D D

-1:0909

LAN100_SLP

SM_INTRUDER#

ICH_INTVRMEN

-1:0909

+RTCVCC

1 2

R120 20KR2J-L2-GPR120 20KR2J-L2-GP

SC1U10V3KX-3GP

C205

12

SB: 0702 Add R454 in "HDA_BITCLK" for EMI request.

HDA_BITCLK23,31,32

ICH_AZ_CODEC_SYNC23,31,32

C C

ICH_AZ_MDC_RST#31 ICH_AZ_S1392_RST#23

ICH_AZ_CODEC_RST#32

ICH_SDIN_MDC31

ICH_SDIN_S139223

ICH_SDIN_CODEC32

ICH_SDOUT_CODEC23,31,32

SATA_RXN0_C24 SATA_RXP0_C24

SATA_TXN024 SATA_TXP024

R348 33R2J-2-GPR348 33R2J-2-GP

R368 33R2J-2-GPR368 33R2J-2-GP R367 33R2J-2-GPR367 33R2J-2-GP R366 33R2J-2-GPR366 33R2J-2-GP

R363 33R2J-2-GPR363 33R2J-2-GP

-1:0912

B B

1 2

C203 SC12P50V2JN-3GPC203 SC12P50V2JN-3GP

ICH_RTCX2

CL=12.5pF

1

X-32D768KHZ-40GPU

23

X1

4

12

R111

R111 10MR2J-L-GP

10MR2J-L-GP

4

21

G26

G26 GAP-OPEN

GAP-OPEN

R454

1 2

33R2J-2-GP

1 2

1 2 1 2 1 2

1 2

SATA_LED#35

C520 SC3900P50V2KX-2GPC520 SC3900P50V2KX-2GP

1 2

C521 SC3900P50V2KX-2GPC521 SC3900P50V2KX-2GP

1 2

1D5V_S0

R414

R414 24D9R2F-L-GP

24D9R2F-L-GP

1 2

HDA_BITCLK_R HDA_SYNC

HDA_RST#

HDA_SDOUT

G62

GAP-OPEN

SATA_TXN0_C SATA_TXP0_C

CLK_PCIE_SATA#4 CLK_PCIE_SATA4

R119

1 2

24D9R2F-L-GP

Within 500 mils

3

1 OF 6

U27A

ICH_RTCX1 ICH_RTCX2

ICH_RTCRST# SM_INTRUDER# ICH_INTVRMEN

LAN100_SLP LPC_DRQ1#

GLAN_COMP

21

TP101TP101

AG25

RTCX1

AF24

RTCX2

AF23

RTCRST#

AD22

INTRUDER#

AF25

INTVRMEN

AD21

LAN100_SLP

B24

GLAN_CLK

D22

LAN_RSTSYNC

C21

LAN_RXD0

B21

LAN_RXD1

C22

LAN_RXD2

D21

LAN_TXD0

E20

LAN_TXD1

C20

LAN_TXD2

AH21

GLAN_DOCK#/GPIO13

D25

GLAN_COMPI

C25

GLAN_COMPO

AJ16

HDA_BIT_CLK

AJ15

HDA_SYNC

AE14

HDA_RST#

AJ17

HDA_SDIN0

AH17

HDA_SDIN1

AH15

HDA_SDIN2

AD13

HDA_SDIN3

AE13

HDA_SDOUT

AE10

HDA_DOCK_EN#/GPIO33

AG14

HDA_DOCK_RST#/GPIO34

AF10

SATALED#

AF6

SATA0RXN

AF5

SATA0RXP

AH5

SATA0TXN

AH6

SATA0TXP

AG3

SATA1RXN

AG4

SATA1RXP

AJ4

SATA1TXN

AJ3

SATA1TXP

AF2

SATA2RXN

AF1

SATA2RXP

AE4

SATA2TXN

AE3

SATA2TXP

AB7

SATA_CLKN

AC6

SATA_CLKP

AG1

SATARBIAS#

AG2

SATARBIAS

ICH8-M-1-GP-U-NF

SB:71.ICH8M.C0U

FWH4/LFRAME#

RTC

LDRQ1#/GPIO23

LPC

CPUPWRGD/GPIO49

LAN/GLAN

CPU

IHDA

IDE

SATA

FWH0/LAD0 FWH1/LAD1 FWH2/LAD2 FWH3/LAD3

LDRQ0#

A20GATE

A20M#

DPRSTP#

DPSLP#

FERR#

IGNNE#

INIT# INTR

RCIN#

NMI

SMI#

STPCLK#

THRMTRIP#

TP8

DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8

DD9 DD10 DD11 DD12 DD13 DD14 DD15

DA0 DA1 DA2

DCS1# DCS3#

DIOR#

DIOW#

DDACK#

IDEIRQ

IORDY

DDREQ

E5 F5 G8 F6

C4 G9

E6 AF13

AG26 AF26

AE26 AD24 AG29 AF27 AE24

AC20 AH14

AD23 AG28

AA24 AE27 AA23 V1

U2 V3 T1 V4 T5 AB2 T6 T3 R2 T4 V6 V5 U1 V2 U6

AA4 AA1 AB3

Y6 Y5

W4 W3 Y2 Y3 Y1 W5

LPC_LAD0 LPC_LAD1 LPC_LAD2 LPC_LAD3

LPC_LFRAME# LPC_DRQ0#

H_A20M#

H_DPSLP# H_FERR#

H_PWRGOOD H_IGNNE# H_INIT# KBRCIN# H_NMI

H_STPCLK# THRMTRIP_ICH#

IDE_PDD0 IDE_PDD1 IDE_PDD2 IDE_PDD3 IDE_PDD4 IDE_PDD5 IDE_PDD6 IDE_PDD7 IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14 IDE_PDD15

2

LPC_LAD[0..3] 34

LPC_LFRAME# 34

TP123TP123 TP127TP127

KA20GATE 34

H_A20M# 5

H_DPRSTP#

H_DPSLP# 6

H_FERR# 5

H_PWRGOOD 6,46 H_IGNNE# 5 H_INIT# 5

H_INTR 5

KBRCIN# 34

H_NMI 5 H_SMI# 5

H_STPCLK# 5

1 2

R122 24R2J-GPR122 24R2J-GP

IDE_PDD[0..15] 24

IDE_PDA0 24 IDE_PDA1 24 IDE_PDA2 24

IDE_PDCS1# 24 IDE_PDCS3# 24

IDE_PDIOR# 24 IDE_PDIOW# 24 IDE_PDDACK# 24 INT_IRQ14 24 IDE_PDIORDY 24 IDE_PDDREQ 24

1

H_FERR#

H_DPRSTP# 6,8,41

H_DPRSTP#

H_DPSLP#

within 2" from R184

1D05V_S0

12

R123

R123 56R2J-4-GP

56R2J-4-GP

H_THERMTRIP# 5,8,34,46

placed within 2" from ICH8M

R124

12

56R2J-4-GP

TP105TP105

TP108TP108

1D05V_S0

-1: 0904 change to DY

W=20mils

2

BATT_R

1

3D3V_AUX_S5

R438

1 2

1KR2J-1-GP

W=20mils

BATT1.1

1 2

C202 SC12P50V2JN-3GPC202 SC12P50V2JN-3GP

A A

ICH_RTCX1

12

HDA_BITCLK

C636

DY

C625

SC1U10V3ZY-6GP

+RTCVCC

1 2

R437 100R2J-2-GPR437 100R2J-2-GP

W=20mils

12

RTCVCC_R

W=20mils

U60

3

CH715FPT-GP

1

2 MH1 MH2

BAT-CON2-U3-GP

PWR GND MH1 MH2

RTC1

Wistron Corporation

SC22P50V2JN-4GP

Please Place C636 near R454

Title

ICH8(2/4) LAN,HD,IDE,LPC

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

5

4

3

2

Date: Sheet of

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel -1

20 47Wednesday, September 12, 2007

1

of

3D3V_S0

D D

3D3V_S5

3D3V_S0

C C

5

RN69

RN62

DY

1 2

RN64

RN65

RN68

SRN10KJ-6-GP

RN66

SRN10KJ-6-GP

RN67

SRN10KJ-6-GP

1 2

8 7 6

SRN10KJ-6-GP

8 7 6

ECSCI#

10KR2J-3-GP

8 7 6

SRN10KJ-6-GP

8 7 6

SRN10KJ-6-GP

1 2 3 45

USB_OC#3

10KR2J-3-GP

ECSWI#

10KR2J-3-GP

DPRSLPVR

12

100KR2J-1-GP

12

100KR2J-1-GP

PM_CLKRUN# SATA0_R3 SATA0_R2 INT_SERIRQ

SATA0_R0 SATA0_R1 THRM# CLKSATAREQ#

RSMRST#_KBC

GPIO26 PM_BATLOW#_R OCP# SMLINK1

SMB_LINK_ALERT# PCIE_WAKE# ICH_RI# USB_OC#0

GPIO22 USB_OC#6 USB_OC#4 USB_OC#2

SMLINK0 USB_OC#5 USB_OC#7 USB_OC#9

USB_OC#8 DBRESET# ECSMI# USB_OC#1

GPIO9

1 2 3 4 5

SRN10KJ-6-GP

R449

1 2

R96 10KR2J-3-GP

1 2 3 4 5

8 7 6

R369

R450

R341

R341 R102

R102

SB:06/27 Delete RN74, add R449 for "ECSCI#" pull up to 3D3V_S0

H_STP_PCI#4 H_STP_CPU#4

SB:06/27 Change RN68 pin1 define from"ECSWI#" to "GPIO22", pin 8 connection from 3D3V_S5 to 3D3V_S0.

SB:06/27 Add R450 for "ECSWI#" pull up to 3D3V_S5

Mini Card 1

3D3V_S0

4

RN61

3D3V_S0

12

RN61 SRN2K2J-1-GP

SRN2K2J-1-GP

1

2 3

32K suspend clock output

3D3V_S5

R91

R91 10KR2J-3-GP

10KR2J-3-GP

147

1 2

DY

Q35

Q35 2N7002PT-U

2N7002PT-U

D

1

5

U55

1 2 3 4

2N7002SPT

U20A

ICH_32KHZ

3

TSLVC08APW-1-GP

S

23

G

3D3V_S0

6 5

1 2

R93 10R2J-2-GPR93 10R2J-2-GP

SB:06/20 Add 2N7002 Q35 for G792 "G792_CLK"

RUN_POWER_ON

B B

ICH_SMBDATA4,14,15 USB_PP0 38

SMB_CLK28,29,30

DY

A A

Mini Card 2

Mini Card 3

SMB_DATA 28,29,30

ICH_SMBCLK 4,14,15

3D3V_S0

DY

New Card

G792_CLK 36

4

1

2 3

LAN

4

RN70

RN70 SRN2K2J-1-GP

SRN2K2J-1-GP

VGATE_PWRGD8,41

ECSCI#34 ECSMI#34

ECSWI#34

EC_RMRST#ICH_SUSCLK

4

3D3V_S5

4

RN63

RN63 SRN2K2J-1-GP

SRN2K2J-1-GP

1

2 3

SMB_CLK SMB_DATA SMB_LINK_ALERT# SMLINK0 SMLINK1

ICH_RI#

PM_SUS_STAT#

TP124TP124

DBRESET#

1 2

R342

TP72TP72 TP71TP71

TP98TP98 TP69TP69

TP63TP63 TP111TP111

TP104TP104 TP70TP70 TP109TP109

TP68TP68

R361

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

SCD1U16V2KX-3GP SCD1U16V2KX-3GP

SCD1U16V2KX-3GP

PM_BMBUSY# OCP# H_STP_PCI#

H_STP_CPU#

INT_SERIRQ THRM#

VRMPWRGD

0R2J-2-GP

SST_CTL

TP67TP67

GPIO1

GPIO6 ECSCI# ECSMI#

GPIO17

GPIO18

GPIO20

TP112TP112

GPIO22

CLKSATAREQ#

GPIO38

GPIO39

IDE_RESET# SB_SPKR MCH_ICH_SYNC# ICH_RSVD

Low--> default High--> No boot

10KR2J-3-GP

1 2

DY

SB_SPKR

C234

12

C232

12

C238

12

C236

12

C242

12

C240

12

C247

12

C244

12

C254

12

C251

12

PM_BMBUSY#8

PM_CLKRUN#25,34

PCIE_WAKE#27,28

INT_SERIRQ25,34

THRM#36

DY

CLKSATAREQ#4

SB_SPKR32

MCH_ICH_SYNC#8

3D3V_S0

PCIE_RXN127 PCIE_RXP127

PCIE_TXN127 PCIE_TXP127

PCIE_RXN229 PCIE_RXP229

PCIE_TXN229 PCIE_TXP229

PCIE_RXN330 PCIE_RXP330

PCIE_TXN330 PCIE_TXP330

PCIE_RXN430 PCIE_RXP430

PCIE_TXN430 PCIE_TXP430

PCIE_RXN528 PCIE_RXP528

PCIE_TXN528 PCIE_TXP528

SD

3D3V_S5

12

1 2

R351

R351 2K2R2J-2-GP

2K2R2J-2-GP

1 2

0R2J-2-GP

1

2

R350

R350 100KR2J-1-GP

100KR2J-1-GP

R327

D28

BAS16-1-GP

DY

3

USB_OC#038 USB_OC#138 USB_OC#235 USB_OC#335

3

4 OF 6

U27D

AJ26

SMBCLK

AD19

SMBDATA

AG21

LINKALERT#

AC17

SMLINK0

AE19

SMLINK1

AF17

RI#

F4

SUS_STAT#/LPCPD#

AD15

SYS_RESET#

AG12

BMBUSY#/GPIO0

AG22

SMBALERT#/GPIO11

AE20

STP_PCI#

AG18

STP_CPU#

AH11

CLKRUN#

AE17

WAKE#

AF12

SERIRQ

AC13

THRM#

AJ20

VRMPWRGD

AJ22

TP7

AJ8

TACH1/GPIO1

AJ9

TACH2/GPIO6

AH9

TACH3/GPIO7

AE16

GPIO8

AC19

GPIO12

AG8

TACH0/GPIO17

AH12

GPIO18

AE11

GPIO20

AG10

SCLOCK/GPIO22

AH25

QRT_STATE0/GPIO27

AD16

QRT_STATE1/GPIO28

AG13

SATACLKREQ#/GPIO35

AF9

SLOAD/GPIO38

AJ11

SDATAOUT0/GPIO39

AD10

SDATAOUT1/GPIO48

AD9

SPKR

AJ13

MCH_SYNC#

AJ21

TP3

ICH8-M-1-GP-U-NF

SB:71.ICH8M.C0U

PCIE_C_TXN1 PCIE_C_TXP1

PCIE_C_TXN2 PCIE_C_TXP2

PCIE_C_TXN3 PCIE_C_TXP3

PCIE_C_TXN4 PCIE_C_TXP4

PCIE_C_TXN5 PCIE_C_TXP5

SPI_CS1#

TP128TP128

USB_OC#0 USB_OC#1 USB_OC#2 USB_OC#3 USB_OC#4 USB_OC#5 USB_OC#6 USB_OC#7 USB_OC#8 USB_OC#9

RSMRST#_KBC 34

3

SATA0GP/GPIO21 SATA1GP/GPIO19 SATA2GP/GPIO36

GPIO

GPIO37

SATA

SMB

SUSCLK

CLOCKS

SLP_S3# SLP_S4# SLP_S5#

S4_STATE#/GPIO26

PWROK

DPRSLPVR/GPIO16

BATLOW# PWRBTN# LAN_RST#

SYSGPIO

RSMRST#

CK_PWRGD

POWER MGT

CLPWROK

SLP_M#

CL_CLK0

GPIO

CL_CLK1

CL_DATA0 CL_DATA1

CL_VREF0 CL_VREF1

CL_RST#

CLGPIO0/GPIO24

Controller Link

CLGPIO1/GPIO10 CLGPIO2/GPIO14

CLGPIO3/GPIO9

MISC

2 OF 6

U27B

P27

PERN1

P26

PERP1

N29

PETN1

N28

PETP1

M27

PERN2

M26

PERP2

L29

PETN2

L28

PETP2

K27

PERN3

K26

PERP3

J29

PETN3

J28

PETP3

H27

PERN4

H26

PERP4

G29

PETN4

G28

PETP4

F27

PERN5

F26

PERP5

E29

PETN5

E28

PETP5

D27

PERN6/GLAN_RXN

D26

PERP6/GLAN_RXP

C29

PETN6/GLAN_TXN

C28

PETP6/GLAN_TXP

C23

SPI_CLK

B23

SPI_CS0#

E22

SPI_CS1#

D23

SPI_MOSI

F21

SPI_MISO

AJ19

OC0#

AG16

OC1#/GPIO40

AG15

OC2#/GPIO41

AE15

OC3#/GPIO42

AF15

OC4#/GPIO43

AG17

OC5#/GPIO29

AD12

OC6#/GPIO30

AJ18

OC7#/GPIO31

AD14

OC8#

AH18

OC9#

ICH8-M-1-GP-U-NF

SB:71.ICH8M.C0U

AJ12 AJ10 AF11 AG11

AG9

CLK14

G5

CLK48

ICH_SUSCLK

D3 AG23

AF21 AD18

GPIO26

AH27

PM_PWROK

AE23

DPRSLPVR

AJ14

PM_BATLOW#_R

AE21 C2 AH20

1 2

R112 0R0402-PADR112 0R0402-PAD

EC_RMRST#

AG27 E1

CL_PWRGD_R

E3

SLP_M#

AJ25

CL_CLK0

F23

CL_CLK1

AE18

CL_DATA0

F22

CL_DATA1

AF19

CL_VREF0_ICH

D24

CL_VREF1_ICH

AH23 AJ23

GPIO24

AJ27

GPIO10

AJ24

GPIO14

AF22

GPIO9

AG19

DMI0RXN DMI0RXP DMI0TXN DMI0TXP

DMI1RXN DMI1RXP DMI1TXN DMI1TXP

DMI2RXN DMI2RXP DMI2TXN DMI2TXP

DMI3RXN

PCI-Express

DMI3RXP DMI3TXN DMI3TXP

DMI_CLKN DMI_CLKP

DMI_ZCOMP

Direct Media Interface

DMI_IRCOMP

USBP0N USBP0P USBP1N USBP1P USBP2N USBP2P USBP3N USBP3P USBP4N

SPI

USBP4P USBP5N USBP5P USBP6N USBP6P USBP7N

USB

USBP7P USBP8N USBP8P USBP9N USBP9P

USBRBIAS#

USBRBIAS

SATA0_R0 SATA0_R1 SATA0_R2 SATA0_R3

V27 V26 U29 U28

Y27 Y26 W29 W28

AB26 AB25 AA29 AA28

AD27 AD26 AC29 AC28

T26 T25

Y23 Y24

G3 G2 H5 H4 H2 H1 J3 J2 K5 K4 K2 K1 L3 L2 M5 M4 M2 M1 N3 N2

F2 F3

2

CLK_14M_ICH 4 CLK_48M_ICH 4

PM_SLP_S3# 28,34,43,45,46 PM_SLP_S4# 28,34,40,44,45

PM_PWROK 8,36

DPRSLPVR 8,41

PM_PWRBTN# 34

CK_PWRGD 4

TP66TP66

CL_CLK0 8

TP110TP110

CL_DATA0 8

TP103TP103

CL_RST# 8

TP73TP73 TP64TP64 TP99TP99 TP100TP100

DMI_RXN0 DMI_RXP0 DMI_TXN0 DMI_TXP0

DMI_RXN1 DMI_RXP1 DMI_TXN1 DMI_TXP1

DMI_RXN2 DMI_RXP2 DMI_TXN2 DMI_TXP2

DMI_RXN3 DMI_RXP3 DMI_TXN3 DMI_TXP3

CLK_PCIE_ICH# CLK_PCIE_ICH

DMI_IRCOMP

USB_PN7 USB_PP7

USBRBIAS

1 2

R403 20R2F-GPR403 20R2F-GP

Within 500 mils

2

DY

R411 0R2J-2-GP

1 2 1 2

R346 0R2J-2-GPR346 0R2J-2-GP

DMI_RXN0 8 DMI_RXP0 8 DMI_TXN0 8 DMI_TXP0 8

DMI_RXN1 8 DMI_RXP1 8 DMI_TXN1 8 DMI_TXP1 8

DMI_RXN2 8 DMI_RXP2 8 DMI_TXN2 8 DMI_TXP2 8

DMI_RXN3 8 DMI_RXP3 8 DMI_TXN3 8 DMI_TXP3 8

CLK_PCIE_ICH# 4 CLK_PCIE_ICH 4

Within 500 mils

1 2

24D9R2F-L-GP

R376

USB_PN0 38 USB_PN1 38

USB_PP1 38 USB_PN2 35 USB_PP2 35 USB_PN3 35 USB_PP3 35 USB_PN4 30 USB_PP4 30 USB_PN5 31 USB_PP5 31 USB_PN6 18

USB_PP6 18

TP118TP118 TP117TP117

USB_PN8 28

USB_PP8 28

USB_PN9 30

USB_PP9 30

Place closely pin G5 Place closely pin AG9

DY

R347

1 2

10KR2J-3-GP

VGATE_PWRGD 8,41

PM_PWROK

R422

1 2

3K24R2F-GP

12

C598

C201

USB1 USB2 USB3 USB4 MINICARD2 BlUETOOTH CAMERA

New Card MINICARD3

SB:0710 Change R403 from

22.6 Ohm to 22 Ohm

R423

R423 453R2F-1-GP

453R2F-1-GP

SCD1U16V2KX-3GP

12

SCD1U16V2KX-3GP

CLK_EN#41

1D5V_S0

Title

ICH8(3/4) PM,USB,GPIO

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

1

CLK_48M_ICH

12

R400

R400 10R2J-2-GP

10R2J-2-GP

DY

12

C589

C589 SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

DY

3D3V_S0

R110

1 2

R107

R107 453R2F-1-GP

453R2F-1-GP

3D3V_S5

3K24R2F-GP

3D3V_S0

R116

R116 330R2J-3-GP

330R2J-3-GP

1 2

D

Q12

Q12 2N7002PT-U

2N7002PT-U

1

G

2 3

S

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel -1

1

R117

R117 0R2J-2-GP

0R2J-2-GP R118

R118 0R2J-2-GP

0R2J-2-GP

CLK_14M_ICH

12

R349

R349 10R2J-2-GP

10R2J-2-GP

DY

12

C522

C522 SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

DY

1 2 1 2

21 47Wednesday, September 12, 2007

of

CK_PWRGD VRMPWRGD

5

D D

3D3V_S05V_S0

1

2

BAS16-1-GP

3D3V_S5

C584

3 12

C555

C555 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1

3 12

1D5V_S0

SCD1U16V2ZY-2GP

3D3V_S0

12

BAS16-1-GP D18

D18

20 mils

ICH_V5REF_RUN

2

C588

C588 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

R387

100R2J-2-GP

5V_S5

12

R147

100R2J-2-GP

C C

B B

SCD1U16V2ZY-2GP

BAS16-1-GP

BAS16-1-GP D20

D20

20 mils

ICH_V5REF_SUS

1D5V_S0

C547

1D5V_S0

C198

12

SC1U10V3ZY-6GP

1D5V_S0

12

C235

SC10U6D3V5KX-1GP

+RTCVCC

12

C260

SC10U6D3V5KX-1GP

C217

12

SC2D2U10V3ZY-1GP

12

C574

SCD1U16V2ZY-2GP

12

C212

SC1U10V3ZY-6GP

C200

12

SC10U6D3V5KX-1GP

TP126TP126 TP121TP121

1D5V_S0

C530

12

SCD1U16V2ZY-2GP

12

C215

SC10U6D3V5KX-1GP

C197

C220

12

SC2D2U10V3ZY-1GP

1D5V_S0

SC1U10V3ZY-6GP

1D5V_S0

SC1U10V3ZY-6GP

12

SC10U6D3V5KX-1GP

20 mils

C532

SCD1U16V2ZY-2GP

ICH_V5REF_RUN

ICH_V5REF_SUS

12

C262

C213

SC1U10V3ZY-6GP

C221

12

SC2D2U10V3ZY-1GP

12

C233

12

C199

1D5V_S0

VCC_LAN1_05_INT_ICH_1 VCC_LAN1_05_INT_ICH_2

12

C216

3D3V_S0

U27E

AD25

T7

A16

G4

AA25 AA26 AA27 AB27 AB28 AB29

D28 D29 E25 E26 E27 F24 F25

G24

H23 H24 J23 J24 K24 K25 L23 L24

L25 M24 M25

N23

N24

N25

P24

P25

R24

R25

R26

R27

T23

T24

T27

T28

T29

U24

U25

V23

V24

V25 W25

Y25

AJ6 AE7

AF7 AG7 AH7

AJ7 AC1

AC2 AC3 AC4 AC5

AC10

AC9 AA5

AA6 G12

G17

H7

AC7 AD7

D1

F1 L6

L7 M6 M7

W23

F17

G18

F19

G20

A24 A26

A27 B26 B27 B28

B25

ICH8-M-1-GP-U-NF

SB:71.ICH8M.C0U

5 OF 6

VCCRTC V5REF

V5REF V5REF_SUS VCC1_5_B

VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B VCC1_5_B

VCCSATAPLL VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A VCC1_5_A

VCCUSBPLL VCC1_5_A

VCC1_5_A VCC1_5_A VCC1_5_A VCC1_5_A

VCC1_5_A VCCLAN1_05

VCCLAN1_05 VCCLAN3_3

VCCLAN3_3 VCCGLANPLL VCCGLAN1_5

VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5 VCCGLAN1_5

VCCGLAN3_3

4

VCCA3GP

ARXATXUSB CORE

GLAN POWER

CORE

VCCDMIPLL

V_CPU_IO V_CPU_IO

VCCP CORE

IDE

PCI

VCCSUSHDA

VCCSUS1_05 VCCSUS1_05

VCCSUS1_5 VCCSUS1_5 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCPUSB VCCPSUS

VCCSUS3_3 VCCSUS3_3 VCCSUS3_3

VCCCL1_05

VCCCL1_5 VCCCL3_3

VCCCL3_3

VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCC_DMI VCC_DMI

VCC3_3 VCC3_3 VCC3_3

VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3

VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3 VCC3_3

VCCHDA

A13 B13 C13 C14 D14 E14 F14 G14 L11 L12 L14 L16 L17 L18 M11 M18 P11 P18 T11 T18 U11 U18 V11 V12 V14 V16 V17 V18

R29 AE28

AE29 AC23

AC24 AF29 AD2 AC8

AD8 AE8 AF8

AA3 U7 V7 W1 W6 W7 Y7

A8 B15 B18 B4 B9 C15 D13 D5 E10 E7 F11

AC12 AD11 J6

AF20 AC16 J7 C3 AC18

AG20 AC21 AC22 AH28

P6 P7 N7 C1 P1 R1 P2 P3 R3 P4 P5 R5 R6

G22 A22 F20

G21

1D05V_S0

SCD01U16V2KX-3GP

SCD1U16V2ZY-2GP

3D3V_S0

SCD1U16V2ZY-2GP

VCCSUS1_5_ICH_1 VCCSUS1_5_ICH_2

3D3V_S5

12

VCCCL1_05_ICH VCCCL1_5_ICH

R399

0R0603-PAD

C580

12

SCD1U16V2ZY-2GP

1D5V_DMIPLL_S0

3D3V_S0

12

C546

C546 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C541

SCD1U16V2ZY-2GP

C567

C224

SC4D7U6D3V3KX-GP

TP122TP122 TP79TP79

12

3D3V_S0

C226

12

TP120TP120 TP102TP102

TP113TP113 TP119TP119

C576

12

C600

C596

12

C573

12

SCD1U16V2ZY-2GP

12

C208

SCD1U16V2ZY-2GP

3D3V_S0

(SATA)

3D3V_S0

12

C536

C536 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

3D3V_S5

12

C558

C558 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

C551

12

SCD1U16V2ZY-2GP

L5

1 2

IND-1UH-36-GP

12

C228

C228 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

1D25V_S0

SC10U6D3V5KX-1GP

12

C595

12

C571

12

C196

SC10U6D3V5KX-1GP

SCD1U16V2ZY-2GP

3D3V_S0

(DMI)

SCD1U16V2ZY-2GP

3D3V_S5

3

12

C195

SC10U6D3V5KX-1GP

1D5V_S0

12

C583

12

C579

C272

SC1U10V3ZY-6GP

SCD1U16V2ZY-2GP

3D3V_S0

1D05V_S0

12

C554

SCD1U16V2ZY-2GP

C273

SC1U10V3ZY-6GP

2

U27F

A23

A5 AA2 AA7

A25

AB1

AB24 AC11 AC14 AC25 AC26 AC27 AD17 AD20 AD28 AD29

AD3 AD4 AD6 AE1

AE12

AE2

AE22

AD1

AE25

AE5 AE6 AE9

AF14 AF16 AF18

AF3

AF4 AG5 AG6

AH10 AH13 AH16 AH19

AH2

AF28 AH22 AH24 AH26

AH3 AH4 AH8

AJ5 B11 B14 B17

B2 B20 B22

B8 C24 C26 C27

C6 D12 D15 D18

D2

D4 E21 E24

E4

E9 F15 E23 F28 F29

F7

G1

E2

G10 G13 G19 G23 G25 G26 G27

H25 H28 H29

H3

H6

J1 J25 J26 J27

J4

J5 K23 K28 K29

K3

K6

6 OF 6

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

ICH8-M-1-GP-U-NF

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

K7

VSS

L1

VSS

L13

VSS

L15

VSS

L26

VSS

L27

VSS

L4

VSS

L5

VSS

M12

VSS

M13

VSS

M14

VSS

M15

VSS

M16

VSS

M17

VSS

M23

VSS

M28

VSS

M29

VSS

M3

VSS

N1

VSS

N11

VSS

N12

VSS

N13

VSS

N14

VSS

N15

VSS

N16

VSS

N17

VSS

N18

VSS

N26

VSS

N27

VSS

N4

VSS

N5

VSS

N6

VSS

P12

VSS

P13

VSS

P14

VSS

P15

VSS

P16

VSS

P17

VSS

P23

VSS

P28

VSS

P29

VSS

R11

VSS

R12

VSS

R13

VSS

R14

VSS

R15

VSS

R16

VSS

R17

VSS

R18

VSS

R28

VSS

R4

VSS

T12

VSS

T13

VSS

T14

VSS

T15

VSS

T16

VSS

T17

VSS

T2

VSS

U12

VSS

U13

VSS

U14

VSS

U15

VSS

U16

VSS

U17

VSS

U23

VSS

U26

VSS

U27

VSS

U3

VSS

U5

VSS

V13

VSS

V15

VSS

V28

VSS

V29

VSS

W2

VSS

W26

VSS

W27

VSS

Y28

VSS

Y29

VSS

Y4

VSS

AB4

VSS

AB23

VSS

AB5

VSS

AB6

VSS

AD5

VSS

U4

VSS

W24

VSS

ICHGND1

ICHGND2

ICHGND3 ICHGND4

TP78TP78

TP77TP77

TP65TP65 TP74TP74

A1 A2 A28 A29 AJ28 AH1 AH29 AJ1 AJ2 AJ29 B1 B29

1

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

ICH8(4/4) POWER&GND

Size Document Number Rev

Size Document Number Rev A2

A2

A2 Date: Sheet

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel -1

1

of

22 47Wednesday, September 12, 2007

of

22 47Wednesday, September 12, 2007

of

22 47Wednesday, September 12, 2007

A

SB:06/22 Change R279,R280,R281,R282 from 63.30134.1DL to 63.12134.1DL

HDMI_TXD#116

HDMI_TXD116

4 4

HDMI_TXD#216

HDMI_TXD216

1 2

R281 120R2J-2-GPR281 120R2J-2-GP

1 2

R282 120R2J-2-GPR282 120R2J-2-GP

HDMI_TXD#1 HDMI_TXD#1_1 HDMI_TXD1

HDMI_TXD#2

HDMI_TXD2 HDMI_TX#C

1 2

C455 SCD1U10V2KX-4GPC455 SCD1U10V2KX-4GP

1 2

C456 SCD1U10V2KX-4GPC456 SCD1U10V2KX-4GP

B

1 2

R280 120R2J-2-GPR280 120R2J-2-GP

1 2

R279 120R2J-2-GPR279 120R2J-2-GP

HDMI_TXD0

HDMI_TXD#0_0

HDMI_TXD#0

HDMI_TXC HDMI_TX#C_C1HDMI_TXD#2_2

1 2

C454 SCD1U10V2KX-4GPC454 SCD1U10V2KX-4GP

1 2

C453 SCD1U10V2KX-4GPC453 SCD1U10V2KX-4GP

C

HDMI_TXD0 16

HDMI_TXD#0 16

HDMI_TXC 16

HDMI_TX#C 16

D

E

EXT_SWING1 AVCC

U52

29

28

TX2+

SDVOB_R+ SDVOB_R-

SDVOB_G+ SDVOB_G-

SDVOB_B+ SDVOB_B-

SDVOB_C+ SDVOB_C-

1 2

1KR2J-1-GP

1 2

HDMI_SDATA HDMI_SCLK

ICH_AZ_S1392_BITCLK

R304

R304 0R0603-PAD

0R0603-PAD

HDAVCC

S_INT+ S_INT-

EXT_RES

A1

SII1392CNU-GP-U

12

DY

SC22P50V2JN-4GP

46

SDI+

47

SDI-

51

SDR+

52

SDR-

54

SDG+

55

SDG-

57

SDB+

58

SDB-

60

SDC+

61

SDC-

49

EXT_RES

1

RESET#

7

SDSCL

6

SDSDA

8

A1

12

SDADDC

11

SCLDDC

14

SCLROM

13

SDAROM

44

TEST

R80

4K7R2J-2-GP

R303

DY

12

4K7R2J-2-GP

R75

DY

12

4K7R2J-2-GP

ICH_AZ_S1392_BITCLK

EC83

39

C482 SCD1U10V2KX-4GPC482 SCD1U10V2KX-4GP

SDVOB_INT+10 SDVOB_INT-10

3 3

SDVO_CTRLCLK8

SDVO_CTRLDATA8

2 2

1 1

SB: 0710 Change R345 from 33 Ohm to 0 Ohm

HDA_BITCLK20,31,32

1 2

C487 SCD1U10V2KX-4GPC487 SCD1U10V2KX-4GP

1 2

SDVOB_R+10 SDVOB_R-10

SDVOB_G+10 SDVOB_G-10

SDVOB_B+10 SDVOB_B-10

SDVOB_C+10 SDVOB_C-10

R312

PLT_RST1#8,19,24,28,29,30,34

1 2

3D3V_S0

C161

R81 1KR2J-1-GPR81 1KR2J-1-GP

12

HDMI_SDATA16

HDMI_SCLK16

R345 0R2J-2-GPR345 0R2J-2-GP

SCD1U10V2KX-4GP

A

26

25

TX1-

TX2-

TX1+

HDABCLK

HDAVCC37HDARST#35HDASDI

36

ICH_AZ_S1392_SDIN2_C

ICH_AZ_S1392_RST#

12

DY

23

22

TX0-

TX0+

HDASYNC

40

-1:09/06 Change EC83 from ASM to DUMMY.

B

16

42

19

20

TXC-

TXC+

HTPLG

EXT_SWING

GND GND

AVCC AVCC

AGND AGND AGND

GND

OVCC

PVCC1 PVCC2

AVCC3.3

SVCC SVCC

GND

GND SGND SGND

SPVCC

SPGND

LINT#

LSCL/DCEN4LSDA/PREEMP

SPDIF/HDASDO

3

15

34

R306 4K7R2J-2-GPR306 4K7R2J-2-GP

DY

R294 22R2J-2-GP

R297 33R2J-2-GPR297 33R2J-2-GP

VCC VCC VCC VCC VCC

VCC

ICH_AZ_S1392_RST# 20

1 2

R291 560R2F-GPR291 560R2F-GP

SB:06/22 Change R291 from 64.75005.6DL to

64.56005.6DL

2 43 9 48 38

5 10

21 27

18 24 30 65

64

17 31

32 33

50 56

41 45 53 59 62

63

ICH_AZ_S1392_SDOUT ICH_AZ_S1392_SYNC

12

VCC_PWR

PVCC1 PVCC2

AVCC33V

VCC_PWR

SVCC

SPVCC

12

AUD_SPDIF_OUT

12

HDMI_HDP 16

AVCC

OVCC

12

C497

C494

SC1KP50V2KX-1GP

3D3V_S0

AUD_SPDIF_OUT 32 ICH_SDOUT_CODEC 20,31,32 ICH_AZ_CODEC_SYNC 20,31,32

ICH_SDIN_S1392 20

SC10U10V5KX-2GP

C

550mA

12

C150

C151

SC1KP50V2KX-1GP

12

C488

C489

SC10U6D3V5KX-1GP

SC1U6D3V2KX-GP

12

C496

R314

12

0R0603-PAD

SCD1U10V2KX-4GP

DY

12

3D3V_S0

12

C471

SC100P50V2JN-3GP

R77

R77 0R0603-PAD

12

0R0603-PAD

C154

DY

SC10U6D3V5KX-1GP

R313

R313 0R0603-PAD

0R0603-PAD

12

C491

C495

SC1KP50V2KX-1GP

12

SC10U6D3V5KX-1GP

12

C472

SC1KP50V2KX-1GP

1D8V_S0

3D3V_S0

R311

12

0R0603-PAD

C485

SCD1U10V2KX-4GP

1D8V_S0

12

C466

AVCC33V

PVCC1

PVCC2

12

SCD1U10V2KX-4GP

D

R309

0R0603-PAD

C481

C481 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

30mA

12

C452

SC1KP50V2KX-1GP

12

C459

SC1KP50V2KX-1GP

12

C149

SC1KP50V2KX-1GP

SDVO_CTRLCLK SDVO_CTRLDATA

12

1D8V_S0

LAYOUT must support connectors from JAE, Molex, and Acon

R287

12

Title

Size Document Number Rev

Date: Sheet

C451

SCD1U10V2KX-4GP

12

A3

C457

C457 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

DY

0R0603-PAD

C462

SC1U6D3V2KX-GP

0R0603-PAD

C152

SC1U6D3V2KX-GP

2D5V_S0

4

RN57

RN57 SRN4K7J-8-GP

SRN4K7J-8-GP

1

2 3

R283

R72

12

0R0603-PAD

12

3D3V_S0

12

1D8V_S0

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SiI 1392 HDMI

DS2-Intel

23 47Wednesday, September 12, 2007

E

of

-1

SATA HD Connector

CD-ROM Connector

SATA_RXP0_C20

-1:09/02 Change HDD power net from "5V-S0" to "ODD_5V_S0" for Sniffer function circuit.

5V_S5

12

R461

DY

100KR2J-1-GP

HDD_5V_EN_R

6 5

SATA_TXP020 SATA_TXN020

SATA_RXN0_C20

3D3V_S0

SC10U6D3V5KX-1GP

HDD_5V_S0

SC10U10V5ZY-1GP

U67

2N7002SPT

DY

IDE_PDD[0..15] 20

52 50 48 46 44 42 40 38 36 34 32 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 51

RSTDRV#_5

IDE_PDD7 IDE_PDD6 IDE_PDD5 IDE_PDD4 IDE_PDD3 IDE_PDD2 IDE_PDD1 IDE_PDD0

IDE_PDA1 IDE_PDA0IDE_PDA2

CSEL

IDE_PDIOW# 20

IDE_PDA1 20 IDE_PDA0 20

IDE_PDCS1# 20

GND : Master Open: Slave

3D3V_S0

4

RN23

RN23 SRN8K2J-3-GP

SRN8K2J-3-GP

1

2 3

IDE_PDIORDY 20 INT_IRQ14 20

-1:09/02 Change ODD power net from "5V-S0" to "ODD_5V_S0" for Sniffer function circuit.

C258

DY

C264

SC3900P50V2KX-2GP

C564

1 2

C568

1 2

SC3900P50V2KX-2GP

12

C253

C253 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C268

C268 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SATA_RXN0 SATA_RXP0

DY

NP1

NP2

23

1 2

3 4 5 6 7

8

9 10 11 12 13 14 15 16 17 18 19 20 21 22

24

HDD1

SYN-CON22-GP-U

-1:09/02 Change ODD power net from "5V-S0" to "ODD_5V_S0" for Sniffer function circuit.

CDROM1

49

IDE_PDD8 IDE_PDD9 IDE_PDD10 IDE_PDD11 IDE_PDD12 IDE_PDD13 IDE_PDD14

IDE_PDDREQ20 IDE_PDIOR#20

IDE_PDDACK#20

IDE_PDA220

IDE_PDCS3#20

ODD_5V_S0 ODD_5V_S0

SC10U10V5ZY-1GP

C186

12

IDE_PDD15

12

C191

SCD1U16V2ZY-2GP

47 45 43 41 39 37 35 33 31 29 27 25 23 21 19 17 15 13 11

9 7 5 3 1

FOX-CONN50-4R-4GP

Main Source:20.80919.022

5V_S0

DY

3D3V_S0

R97 4K7R2J-2-GPR97 4K7R2J-2-GP

RUN_POWER_ON

12

DY

12

C639

SCD1U25V3KX-GP

14

10

PLT_RST1#8,19,23,28,29,30,34

5V_S0 HDD_5V_S0

R463 0R3-0-U-GPR463 0R3-0-U-GP

1 2

R464 0R3-0-U-GPR464 0R3-0-U-GP

1 2

1 2 34

HDD_5V_EN 34

RUN_POWER_ON

12

R462

R462 100KR2J-1-GP

100KR2J-1-GP

DY

HDD_PWR_EN

5V_S0

-1:0910

Q38

1

2

3 4

FDC655BN-GP

DY

6

5

-1:09/02 Add HDD 5V power control circuit for Sniffer function, default is DY

HDD_5V_S0

9 8

7

-1:09/02 Add ODD 5V power control circuit for Sniffer function, default is DY

IDE_RST_MOD# RSTDRV#_5

R100 56R2J-4-GPR100 56R2J-4-GP

U9C TSAHCT125PW-GPU9C TSAHCT125PW-GP

5V_S5

12

R466

DY

100KR2J-1-GP

ODD_5V_EN_R

-1:0906 Add C639 for "ODD_5V_EN#"

1 2

U68

6 5

2N7002SPT

DY

1 2 34

Close to Connector

1 2

HDD_5V_EN 34

R467

R467 100KR2J-1-GP

100KR2J-1-GP

ODD_PWR_EN

IDE_PDIOW#

5V_S0 ODD_5V_S0

R470 0R3-0-U-GPR470 0R3-0-U-GP

1 2

R468 0R3-0-U-GPR468 0R3-0-U-GP

1 2

R469 0R3-0-U-GPR469 0R3-0-U-GP

1 2

R471 0R3-0-U-GPR471 0R3-0-U-GP

1 2

ODD_5V_S05V_S0

U35

8

D

7

D

6

D

SI4800BDY-T1

1

S

2

S

3

S

45

GD

-1:0910

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

HD/CDROM/USB

DS2-Intel -1

of

24 47Wednesday, September 12, 2007

5

A

3D3V_S0

4

3

2

1

U37B

12

C288

C325

SC10U6D3V5KX-1GP

D D

SC10U6D3V5KX-1GP

C325

3D3V_S0

12

C282

SCD1U16V2ZY-2GP

C288

DY

SCD47U16V3ZY-3GP

C C

3D3V_S0

DY

12

R180

R180 10KR2J-3-GP

10KR2J-3-GP

12

C331

C331 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

R151

R151 10KR2J-3-GP

10KR2J-3-GP

1 2

12

C293

C293 SC10P50V2JN-4GP

SC10P50V2JN-4GP

B B

R179

SHIELD GND

1 2

0R2J-2-GP

DY

GBRST#_KBC34

PCLK_PCM4

12

C279

SCD01U16V2KX-3GP

12

C278

SCD01U16V2KX-3GP

SCD47U16V3ZY-3GP

PCI_C/BE#319 PCI_C/BE#219 PCI_C/BE#119 PCI_C/BE#019

1 2

R150 10R2J-2-GPR150 10R2J-2-GP

PCI_FRAME#19

PCI_IRDY#19

PCI_TRDY#19

PCI_STOP#19 PCI_PERR#19 PCI_SERR#19

12

C312

12

C280

R178 0R2J-2-GP

C281

SCD01U16V2KX-3GP

12

C297

PCI_AD[0..31]19

ICH_PME#19

PM_CLKRUN#21,34

SCD01U16V2KX-3GP

12

C319

PCI_PAR19

PCI_AD25 R5C834_IDSEL

PCI_REQ#019 PCI_GNT#019

PCI_DEVSEL#19

PCIRST1#19,27

SCD01U16V2KX-3GP

VCC_ROUT

SCD01U16V2KX-3GP

PCI_C/BE#3 PCI_C/BE#2 PCI_C/BE#1 PCI_C/BE#0

DY

12

C326

SCD01U16V2KX-3GP

PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0

GBRST#

12

10 20 27 32 41

128

61 16

34

64 114 120

125 126 127

1 2 3 5 6

9 11 12 14 15 17 18 19 36 37 38 39 40 42 43 44 46 47 48 49 50 51 52 53 33

7 21 35 45

8

124 123

23 24 25 26 29 30 31

71

119 121

70

117

R5C833-GP

U37B

VCC_PCI1 VCC_PCI2 VCC_PCI3 VCC_PCI4 VCC_PCI5 VCC_PCI6

VCC_RIN VCC_ROUT1

VCC_ROUT2 VCC_ROUT3 VCC_ROUT4 VCC_ROUT5

AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0 PAR C/BE3# C/BE2# C/BE1# C/BE0# IDSEL

REQ# GNT# FRAME# IRDY# TRDY# DEVSEL# STOP# PERR# SERR#

GBRST# PCIRST#

PCICLK PME# CLKRUN#

HWSPND#

PCI / OTHER

UDIO0/SRIRQ#

VCC_3V

VCC_MD

GND1 GND2 GND3 GND4 GND5 GND6 GND7 GND8 GND9

GND10

AGND1 AGND2 AGND3 AGND4 AGND5

MSEN

XDEN

UDIO5

UDIO3 UDIO4

UDIO2 UDIO1

INTA# INTB#

TEST

67

86

4 13 22 28 54 62 63 68 118 122

99 102 103 107 111

69

58 55

1 2

57

R164 100KR2J-1-GPR164 100KR2J-1-GP

65 59

56 60 72

115 116

66

SCD01U16V2KX-3GP

1 2

3D3V_S0

12

C283

3D3V_S0

12

R177

R177 4K7R2J-2-GP

4K7R2J-2-GP

INT_SERIRQ 21,34

PCI_PIRQA# 19 PCI_PIRQC# 19

R173

R173 100KR2J-1-GP

100KR2J-1-GP

12

C290

C290 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

3D3V_S0

RN43

1 2 3 4 5

SRN10KJ-6-GP

3D3V_S0

8 7 6

DY

12

EC44

EC44 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

1394 : INTA# 4in1 : INTB#

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

R5C833/PCI

DS2-Intel -1

25 47Wednesday, September 12, 2007

of

A

AVCC_PHY1 AVCC_PHY2 AVCC_PHY3

GUARD GND

C329 SC12P50V2JN-3GPC329 SC12P50V2JN-3GP

4 4

3 3

2 2

1 2

C330

1 2

SC12P50V2JN-3GP

1 2

C324 SCD01U16V2KX-3GPC324 SCD01U16V2KX-3GP

1 2

R170 10KR2F-2-GPR170 10KR2F-2-GP

1 2

C315 SCD01U16V2KX-3GPC315 SCD01U16V2KX-3GP

GUARD GND

1394_XI

SB:06/13 Change X4 from

82.30023.561 to 82.30023.611

12

X4

X4 X-24D576MHZ-70GP

X-24D576MHZ-70GP

1394_XO

RICHO_FILO

RICHO_REXT

RICHO_VREF

94

XI

95

XO

96

FIL0

101

REXT

100

VREF

97

RSV

R5C833-GP

AVCC_PHY4

TPBIAS0

IEEE1394/SD

U37A

TPBN0 TPBP0

TPAN0 TPAP0

MDIO17 MDIO16 MDIO15 MDIO14 MDIO13 MDIO12 MDIO11 MDIO10

MDIO05 MDIO08 MDIO19 MDIO18 MDIO02

MDIO03 MDIO00

MDIO01

MDIO09

MDIO04 MDIO06

MDIO07

98 106 110 112

113

104 105

108 109

87 92 89 91 90 93 81 82

75 88 83 85 78

77 80

79

84

76 74

73

B

3D3V_PHY

TPBIAS0

TPB0N TPB0P

TPA0N TPA0P

XD_DATA7 XD_DATA6 XD_DATA5 XD_DATA4 SD/XD/MS_DATA3 SD/XD/MS_DATA2 SD/XD/MS_DATA1 SD/XD/MS_DATA0

XD_WP# SD/XD/MS_CMD XD_ALE XD_CLE XD_CE#

SD_WP#(XDR/B#) SD_CD#

MS_INS#

SD/XD/MS_CLK

MC_PWR_CTRL_0 MS_LED#

TPAD30

3D3V_S0

SC10U6D3V5KX-1GP

SB:06/20 Rename U37 Pin79 from"XD/MS_CD#" to "MS_INS#"

R175

1 2

33R2J-2-GP

12

R176

TP82

R176 100KR2J-1-GP

100KR2J-1-GP

C

R174

12

0R0603-PAD

12

C323

SB:06/16 change 1394 CONN CN8 from 22.10218.M01 to

22.10218.T41.

SD/XD/MS_CLK_1

12

C308

SCD1U16V2ZY-2GP

XD_DATA4 XD_DATA5 XD_DATA6 XD_DATA7

SD/XD/MS_DATA0 SD/XD/MS_DATA1 SD/XD/MS_DATA2 SD/XD/MS_DATA3

XD_ALE SD/XD/MS_CMD

SRN33J-5-GP-U

XD_CE# XD_CLE

SRN33J-5-GP-U

3D3V_PHY

12

C303

SCD01U16V2KX-3GP

SKT-1394-4P-26-GP-U

6

GND

5

GND

4

TPA0+

3

TPA0-

2

TPB0+

1

TPB0-

CN8

RN44

XD_DATA4_1

1

8 7 6

SRN47J-5-GP

8 7 6

SRN47J-5-GP

2 3 1

XD_DATA5_1

2

XD_DATA6_1

3

XD_DATA7_1

45

RN45

SD/XD/MS_DATA0_1

1

SD/XD/MS_DATA1_1

2

SD/XD/MS_DATA2_1

3

SD/XD/MS_DATA3_1

45

RN71

RN72

SB:06/20 Remove U35,R148 and change D19 from

83.R0304.A8H to 83.R2003.E81.

XD_ALE_1

SD/XD/MS_CMD_1

4

XD_CE#_1 XD_CLE_1

4

MS_INS#

SD_CD#

Reserve R547,R548,R550,R551 for co-layout

TPA0+

TPA0-

TPB0+

TPB0-

3D3V_CARD

12

D19

1

2

BAT54CPT-GP

D

1 2

R318 0R0402-PADR318 0R0402-PAD

L27

2

3 4

DLW21HN900SQ2LGP

1 2

R316 0R0402-PADR316 0R0402-PAD

1 2

R321 0R0402-PADR321 0R0402-PAD

L28

3 4

2

DLW21HN900SQ2LGP

1 2

R319 0R0402-PADR319 0R0402-PAD

DY

C597

C597 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

3

-1:09/11

1

DY

-1:09/11

DY

1

-1:09/11

DY

12

C261

C261 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

3D3V_CARD

SD/XD/MS_DATA0_1 SD/XD/MS_DATA1_1 SD/XD/MS_DATA2_1 SD/XD/MS_DATA3_1 XD_DATA4_1 XD_DATA5_1 XD_DATA6_1 XD_DATA7_1

SD_WP#(XDR/B#) SD/XD/MS_CLK_1 XD_CE#_1 XD_CLE_1 XD_ALE_1 SD/XD/MS_CMD_1 XD_WP# XD_SW#

C189

SCD01U16V2KX-3GP

R92

R94

12

C271

C271 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

CARD1

23

SD_VCC

14

MS_VCC

33

XD_VCC

8

XD_D0

9

XD_D1

26

XD_D2

27

XD_D3

28

XD_D4

30

XD_D5

31

XD_D6

32

XD_D7

1

XD_R/B

2

XD_RE

3

XD_CE

4

XD_CLE

5

XD_ALE

6

XD_WE

7

XD_WP

34

XD_CD_SW

NP2

NP1

CARD-PUSH-36P-1-GP-U1

C190

12

SCD33U10V3KX-3GP

1 2

56R2J-4-GP

1 2

56R2J-4-GP

E

12

R89R89

R90R90

1 2

5K1R2F-2-GP

1394_TPB1_R

1 2

SC:08/20 Change R95 from

64.51115.6DL to 64.51015.6DL.

12

C269

C269 SC2D2U10V3ZY-1GP

SC2D2U10V3ZY-1GP

SD_DAT0 SD_DAT1 SD_DAT2 SD_DAT3

SD_CMD

SD_CLK

SD_CD_SW

SD_WP_SW

MS_DATA0 MS_DATA1 MS_DATA2 MS_DATA3

MS_BS

MS_INS

MS_SCLK

4IN1_GND 4IN1_GND

GROUND GROUND

CLOSE TO CHIP

R95

C192

SC270P50V2JN-2GP

SD/XD/MS_DATA0_1

25

SD/XD/MS_DATA1_1

29

SD/XD/MS_DATA2_1

10

SD/XD/MS_DATA3_1

11

SD/XD/MS_CMD_1

12

SD/XD/MS_CLK_1

24

SD_CD#

36

SD_WP#(XDR/B#)

35

SD/XD/MS_DATA0_1

19

SD/XD/MS_DATA1_1

20

SD/XD/MS_DATA2_1

18

SD/XD/MS_DATA3_1

16

SD/XD/MS_CMD_1

21

MS_INS#

17

SD/XD/MS_CLK_1

15

13 22

38 37

TPBIAS0 TPA0P TPA0N TPB0P TPB0N

For SD Card Power

3D3V_CARD

1 1

12

R418

R418 10KR2J-3-GP

10KR2J-3-GP SC1U10V3ZY-6GP

SC1U10V3ZY-6GP

A

C601

20mil

12

R426

R426 15KR2J-1-GP

15KR2J-1-GP

DY

U57

1

OUT

2

GND

3

SET

AAT4610AIGV-GP

ON#

-1:08/29 Change R426 default from ASM to DY, because change U57 main source, it don't need R426.

3D3V_S0

5

IN

4

12

SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP C609

C609

B

SB:06/20 Remove R427 and change U57 pin4 connect to "MC_PWR_CTRL_0"

R426

AAT4610AIGV

RT9711DPBG

G5240D2T1U

15K

DY

C

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

D

Date: Sheet

R5C832/IEEE1394/SD

DS2-Intel -1

E

26 47Wednesday, September 12, 2007

of

A

B

C

D

E

R394 R354 R357 R362 R372 R377 C528 C544

3D3V_LAN_S52D5V_LAN_S5

57

U25

4 4

3D3V_S0

Marvell recommend: 2K Ohm(64.20015.6DL)

3 3

3D3V_LAN_S5

R395

1 2

0R0402-PAD

1 2

R354 2KR2F-3-GPR354 2KR2F-3-GP

12

R3584K7R2J-2-GP R3584K7R2J-2-GP

3D3V_LAN_S5

TP107

TPAD30

TP115TPAD30 TP115TPAD30 TP114TPAD30 TP114TPAD30

LOM_DISABLE#

TP106TPAD30 TP106TPAD30

1 1

LANHP

1

LANHN

1

LANSC LANPWR LANSV LANRSET CTRL12 CTRL25

34

NC#34

35

NC#35

36

NC#36

37

NC#37

10

LOM_DISABLE#

12

VAUX_AVLBL

11

SWITCH_VCC

47

VMAIN_AVLBL

9

SWITCH_VAUX

16

RSET

3

CTRL12

4

CTRL25

24

HSDACP

25

HSDACN

88E8039-A0-GP

MDI0-28 MDI1-28

MDI0+28 MDI1+28

RXN18TXN21NC#2727NC#3131RXP17TXP20NC#2626NC#30

MDI0MDI1-

MDI0+ MDI1+

AVDDL19AVDDL22AVDDL28AVDDL32AVDDL51AVDDL52AVDDL

VDDO_TTL1VDDO_TTL8VDDO_TTL40VDDO_TTL45VDDO_TTL

30

R397 Q15 R417 Q17

88E8039

88E8040

2 2

3D3V_S5

12

C239

SCD1U10V2KX-4GP

PM_LAN_ENABLE34

1 1

4K7 2SB772PT 4K7 2SB772PT

DY DY DY DY

3D3V_LAN_S5

R137

1 2

0R3-0-U-GP

DY

R139

R139 10KR2J-3-GP

10KR2J-3-GP

Q16

Q16 2N7002PT-U

2N7002PT-U

S

12

D

1

G

2 3

S

A

D

G

AO3403-GP

D

Q14

12

C241

LAN100M_LED#

SC10U6D3V5KX-1GP

B

PDTC124EU-1-GP

12

C560

SCD1U10V2KX-4GP

8053:CTRL25. 8055:CTRL18.

B

23

61

64

AVDD

VDD25

VPD_CLK38VPD_DATA

29

41

VPD_CLK VPD_DATA

SA:4/30

3D3V_LAN_S5

DY

Q4

C

R1

E

R2

PLACE PNP TO CHIP ACAP CTRL25 PIN TRACE IS 25MIL

3D3V_LAN_S5

12

C259

SC4D7U6D3V5KX-3GP

VDD33VDD39VDD44VDD48VDD

TESTMODE46TSTPT

TP116

1

12

4K7R2J-2-GP

CTRL25

1D2V_LAN_S5

13

58

VDD2VDD7VDD

LED_SPEED#

PU_VDDO_TTL#42

PU_VDDO_TTL#43

65

42

43

TPAD30

R50

R50 100KR2J-1-GP

100KR2J-1-GP

3D3V_LAN_S5

DY

LED_LINK#

12

R397

WAKE#

PERST# REFCLKP REFCLKN

PCIE_TXN PCIE_TXP

PCIE_RXN PCIE_RXP

LED_LINK#

NC#62

LED_ACT#

XTALI

XTALO

GND

12

DY

1

C246

SC4D7U6D3V5KX-3GP

88E8039

88E8040

Note:Default is 88E8040

6 5 55 56

LAN_RXN1

50 49

53 54

63 62 60 59

15 14

R394

1 2

R393

1 2

R49

R49 100KR2J-1-GP

100KR2J-1-GP

C230 SCD1U10V2KX-4GPC230 SCD1U10V2KX-4GP

LAN_RXP1

C229 SCD1U10V2KX-4GPC229 SCD1U10V2KX-4GP

LED_LINK# LAN100M_LED#

LANX1 LANX2

4K7R2J-2-GP

4K7R2J-2-GP 4K7R2J-2-GP

4K7R2J-2-GP

LAN100M_LED# 28

LAN10M_LED# 28

SB:06/13

3D3V_LAN_S5

DY

3

Q15

Q15 2SB772PT-1-GP

2SB772PT-1-GP

2

2D5V_LAN_S5

12

C590

SCD1U10V2KX-4GP

DY

1.91K2K49.9 49.9 49.9 49.9

4.7K

PCIE_WAKE# 21,28

PCIRST1# 19,25 CLK_PCIE_LAN 4 CLK_PCIE_LAN# 4

1 2 1 2

ACT_LED# 28

3D3V_LAN_S5

4K7R2J-2-GP

8053:2.5V. 8055:1.8V.

C

DY DY DY DY DY DY

PCIE_TXN1 21 PCIE_TXP1 21

SB:06/13

TP75 TPAD30TP75 TPAD30

SC:08/09 Add EC160(78.10234.1F1) for EMI request .Default is DUMMY

3D3V_LAN_S5 2D5V_LAN_S5 1D2V_LAN_S5

SA:04/23 Change C402,C408 from

78.10523.5FL to 78.10520.5FL

PLACE PNP TO CHIP ACAP CTRL12 PIN TRACE IS 25MIL

12

C593

DY

R417

1

DY

3

Q17

Q17 2SB772PT-1-GP

2SB772PT-1-GP

2 12

C592

CTRL12

PCIE_RXN1 21 PCIE_RXP1 21

LAN10M_LED#

12

EC160

DY

SC1000P50V2JN-GP

1 2

SC1000P50V2JN-GP

C539

1 2

C563 SC1U6D3V2KX-GPC563 SC1U6D3V2KX-GP

1 2

C531 SC1U6D3V2KX-GPC531 SC1U6D3V2KX-GP

12

C256

C256 SC4D7U6D3V5KX-3GP

SCD1U10V2KX-4GP

SC4D7U6D3V5KX-3GP

1D2V_LAN_S5

12

C255

SC4D7U6D3V5KX-3GP

0.01u 0.01u

SA:04/23 Change C411 from

78.10523.5FL to 78.10520.5FL

D

SB:06/13 Change C209,C210 from 27P to 12P

DY

U31

1

A0

2

A1

3

A2

4

GND

AT24C08AN-1-GP

MDI0+

R357 49D9R2F-GP

MDI0-

R362 49D9R2F-GP

MDI1+

R372 49D9R2F-GP

MDI1-

R377 49D9R2F-GP

C543 SCD1U10V2KX-4GPC543 SCD1U10V2KX-4GP

C553 SC1U6D3V2KX-GPC553 SC1U6D3V2KX-GP

VCC

SDA

DY

1 2

DY

1 2

DY

1 2

DY

1 2

C538

1 2

SC1000P50V2JN-GP

SC1000P50V2JN-GP C557

C557

1 2

SC1000P50V2JN-GP

1 2

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

R121

DY

X2

1 2

DY

R407

LANX1LANX2

DY

12

DY

12

R406

R406 4K7R2J-2-GP

4K7R2J-2-GP

C209

C209 SC12P50V2JN-3GP

SC12P50V2JN-3GP

3D3V_LAN_S5

12

DY

0R2J-2-GP

R408

R409

R409 0R2J-2-GP

0R2J-2-GP

DY

1 2

10MR2J-L-GP

12

XTAL-25MHZ-96GP

C210

C210 SC12P50V2JN-3GP

SC12P50V2JN-3GP

3D3V_LAN_S5

4K7R2J-2-GP

8

EEWP EEWP

7

WP

VPD_CLK

6

SCL

VPD_DATA

5

Pull up for AT24C08 another pull low

DY

MDIS0_LAN

MDIS1_LAN

LAN MARVELL

DY

C528

1 2

SCD01U16V2KX-3GP

C544

1 2

SCD01U16V2KX-3GP

DY

1 2

C565 SC1U6D3V2KX-GPC565 SC1U6D3V2KX-GP

C562

1 2

SC1000P50V2JN-GP

1 2

C561 SC1U6D3V2KX-GPC561 SC1U6D3V2KX-GP

C534

1 2

SC1000P50V2JN-GP

1 2

C542 SC1U6D3V2KX-GPC542 SC1U6D3V2KX-GP

C535

1 2

SC1000P50V2JN-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel -1

27 47Wednesday, September 12, 2007

of

E

of

A

2D5V_LAN_S5

MDI1+27

4 4

MDI1-27

MDI0+27

MDI0-27

12

C401

C392

SCD1U16V2ZY-2GP

3 3

10/100M Lan Transformer

XF1

1

2 3 14

7

8 6 4 5

XFORM-257-GP

B

RJ45 Connector

RJ45-3

16

RJ45-6

15

10

9 11 12 13

RJ45-1

RJ45-2 XFR_CMT

XFR_RXC

123

45

678

RJ45-7 RJ45-4

RN7

SRN75J-1-GP

LAN_TERMINAL

C

RJ45-1

1

RJ45-2

2

RJ45-3

3

RJ45-6

4 5

1 2

C416 SC1500P2KV8KX-3GPC416 SC1500P2KV8KX-3GP

RN8

SRN0J-5-GP

8 7 6

RJ45-1_L RJ45-2_L RJ45-3_L

RJ45-6_L

1.route on bottom as differential pairs.

2.Tx+/Tx- are pairs. Rx+/Rx- are pairs.

3.No vias, No 90 degree bends.

4.pairs must be equal lengths.

5.6mil trace width,12mil separation.

6.36mil between pairs and any other trace.

7.Must not cross ground moat,except RJ-45 moat.

LAN100M_LED#

12

DY

ACT_LED#

12

DY

Green : Link up Blinking : TX/RX activity

D

EC17

EC17 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

EC11

EC11 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

RJ1

9 RJ11_1 RJ11_2

A1 A2 A3

RJ45_1 RJ45_2 RJ45_3 RJ45_4 RJ45_5 RJ45_6 RJ45_7 RJ45_8 B1

B2 10

RJ45+RJ11-5GP

CN7

2 1

MLX-CON2-9-GP-U

SA:04/23 change CN13 pin3,4 net name from "GND" to NC

3D3V_LAN_S5

R47 330R2J-3-GPR47 330R2J-3-GP

1 2

RJ45-1_L RJ45-2_L RJ45-3_L RJ45-4

RJ45-6_L RJ45-7

1 2

R43 330R2J-3-GPR43 330R2J-3-GP

-1:09/01 Change R43,R47 from

63.47134.1DL to 63.33134.1DL

E

4

3

LAN10M_LED# 27

LAN100M_LED# 27

ACT_LED# 27

NEWCARD Connector

Place them Near to Chip

3D3V_S5 1D5V_S0

DY

12

SCD1U16V2ZY-2GP

1D5V_S0

3D3V_S0

3D3V_NEW_LAN_S5

DY

C318

1D5V_NEW_S0

A

16 14 13

5 4

3D3V_S5

NC#16 NC#14 NC#13 NC#5 NC#4

7

GND

+1.5VVIN +1.5VOUT +3VOUT +3VIN

17

NEWCARD_OC#

21

1

18

19

U58

OC#

STBY#

RCLKEN

SHDN#

THERMAL_PAD

PERST# CPUSB#

CPPE#

SYSRST#

3.3VIN23.3VOUT

1.5VOUT111.5VIN12AUXOUT15AUXIN

TPS2231RGP-GP

3

2nd: 74.02231.A73

3D3V_S0 3D3V_NEW_S0 1D5V_S0

TP143

TPAD30

1

PM_SLP_S3# 21,34,43,45,46

20

PERST#

8

CPUSB#

9

CPPE#

10

NRST

6

+1.5V_CARD Max. 650mA, Average 500mA. +3.3V_CARD Max. 1300mA, Average 1000mA +3.3V_CARDAUX Max. 275mA

PM_SLP_S4# 21,34,40,44,45

B

DY

12

C617

SCD1U16V2ZY-2GP

2 2

1D5V_NEW_S0 3D3V_NEW_S0

Test circuit Use Card and No Card

1 1

12

C613

4

SRN100KJ-6-GP

R435 0R2J-2-GPR435 0R2J-2-GP

DY

Place them Near to Connector

C612

C612 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

SC10U6D3V5KX-1GP

RN73

DY

1 23

PLTRST#

12

C626SC22P50V2JN-4GPDYC626SC22P50V2JN-4GP

12

C610

3D3V_S5

PLT_RST1# 8,19,23,24,29,30,34

12

C611

SCD1U16V2ZY-2GP

SC10U6D3V5KX-1GP

C

3D3V_NEW_LAN_S53D3V_NEW_S0 1D5V_NEW_S0

12

C620

C620 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

NEWCARD_CLKREQ#4

SMB_DATA21,29,30 SMB_CLK21,29,30

12

C624

SCD1U16V2ZY-2GP

TP144TPAD30 TP144TPAD30

3D3V_NEW_S0

3D3V_NEW_LAN_S5

1D5V_NEW_S0

TP137TPAD30 TP137TPAD30 TP138TPAD30 TP138TPAD30

3D3V_S0

12

C621

SC4D7U6D3V5KX-3GP

CPPE#

1

NEWCARD_CLKREQ#

PERST#

CONN_TP2

1

CONN_TP3

1

D

NEW1

31

NP1

1 3

5 7

9 11 13 15 17 19 21 23 25 27 29

NP2

32

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

2 4

6 8 10 12 14 16 18 20 22 24 26 28 30

FOX-CONN30A-9GP

LAN connector/NEW CARD/SIM

DS2-Intel -1

CPUSB#

SB:07/04 For EMI request

12

EC145

DY

SC5P50V2CN-2GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

E

12

DY

EC144

28

PCIE_RXP5 21 PCIE_RXN5 21

CLK_PCIE_NEW# 4PCIE_WAKE#21,27

SC5P50V2CN-2GP

PCIE_TXP5 21 PCIE_TXN5 21

CLK_PCIE_NEW 4

USB_PP8 21 USB_PN8 21

of

47Wednesday, September 12, 2007

A

B

Mini Card Connector 1(802.11a/b/g)

C

D

E

4 4

3 3

2 2

SB:06/22 Change MINI1,2,3 slot from

62.10043.431 to 62.10043.551(only modify properties)

MINI_2_WAKE#

TP142

1

TPAD30

WLAN_ACT30,31

BT_ACT30

TP141

1

TPAD30

CLK_PCIE_MINI1#4

CLK_PCIE_MINI14

PCIE_RXN221 PCIE_RXP221

PCIE_TXN221 PCIE_TXP221

3D3V_S0

R432

5V_S5

1 2

DY

0R3-0-U-GP

NP1

NP2

MINI1

53

1

3 5 7

9 11 13 15

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

54

1D5V_S0

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

1

PLT_RST1#

3D3V_S0

SMB_CLK SMB_DATA

TP131TPAD30TP131TPAD30

TP132TPAD30TP132TPAD30

3D3V_S0

WIFI_RF_EN 34

PLT_RST1# 8,19,23,24,28,30,34

SMB_CLK 21,28,30

SMB_DATA 21,28,30

WLAN_LED 35

SKT-MINI52P-18-GP

Main Source:62.10043.431 2nd Source: 20.F0992.052

1 1

SCD1U16V2ZY-2GP

5V_S5

DY

12

C616

A

3D3V_S0 3D3V_S0 1D5V_S0

12

C604

C604 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

12

C284

SCD1U16V2ZY-2GP

DY

SC10U6D3V5KX-1GP

C291

DY

12

B

12

C275

DY

SC10U6D3V5KX-1GP

12

C603

SCD1U16V2ZY-2GP

WLAN_ACT

-1:0909

12

EC175

EC175 SC220P50V2KX-3GP

SC220P50V2KX-3GP

C

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

D

Date: Sheet

MINI CARD CONN 1

DS2-Intel -1

E

29 47Wednesday, September 12, 2007

of

A

B

C

D

E

Mini Card Connector

Mini Card Connector 2(WWAN)

SB:06/22 Change MINI1,2,3 slot from

62.10043.431 to 62.10043.551(only modify properties)

TP80

4 4

CLK_PCIE_MINI2#4

CLK_PCIE_MINI24

3 3

5V_S5

2 2

TP80

TPAD30

TP139

TPAD30

PCIE_RXN321 PCIE_RXP321

PCIE_TXN321 PCIE_TXP321

3D3V_S0

R430

1 2

DY

MINI_WAKE#

1

0R3-0-U-GP

MINI2

53

NP1

1

3 5 7

9 11 13 15

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

NP2

54

SKT-MINI52P-18-GP

Main Source:62.10043.431 2nd Source: 20.F0992.052

1D5V_S0

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

UIM_PWR UIM_DATA UIM_CLK UIM_RESET UIM_VPP

PLT_RST1#

SMB_CLK SMB_DATA

WWAN_LED

3D3V_S0

UIM_PWR 35

UIM_RESET 35 UIM_VPP 35

WWAN_RF_EN 34

PLT_RST1# 8,19,23,24,28,29,34

SMB_CLK 21,28,29

SMB_DATA 21,28,29

USB_PN4 21 USB_PP4 21

1

TP134TPAD30TP134TPAD30

1

TP133TPAD30TP133TPAD30

1

TP130TPAD30TP130TPAD30

-1:0905 Add C637,C638 for SIM CLK and DATA.

UIM_DATA UIM_CLK

UIM_DATA 35 UIM_CLK 35

12

C637

SC:07/30 Add "WWAN_RF_EN" GPIO pin connect to MINI2 pin20

12

C638

SB:06/22 Change MINI1,2,3 slot from

62.10043.431 to 62.10043.551(only modify properties)

WLAN_ACT29,31

CLK_PCIE_MINI3#4

E51_RXD34 E51_TXD34

Mini Card Connector 3(Robson)

MINI3

TP140

TPAD30

TP81

TPAD30

CLK_PCIE_MINI34

R431 0R2J-2-GPR431 0R2J-2-GP

1 2

R428 0R2J-2-GPR428 0R2J-2-GP

1 2

PCIE_RXN421 PCIE_RXP421

PCIE_TXN421 PCIE_TXP421

3D3V_S0

R429

1 2

5V_S5

DY

1

BT_ACT_2

1

0R3-0-U-GP

MINI_WAKE#

E51_RXD_R E51_TXD_R

MINI3

53

NP1

1

3 5 7

9 11 13 15

17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49 51

NP2

54

SKT-MINI52P-18-GP

1D5V_S0

2 4 6 8 10 12 14 16

18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52

1 1

Main Source:62.10043.431 2nd Source: 20.F0992.052

BT_ACT_131

BT_ACT_2

PLT_RST1#

3D3V_S0

SMB_CLK SMB_DATA

TP136TPAD30TP136TPAD30 TP135TPAD30TP135TPAD30

BT_ACT_WPAN# 35

3D3V_S0

1 2

DY

R155 0R2J-2-GP

1 2

DY

R161 0R2J-2-GP

U62

1

B

2

A GND3Y

74LVC1G32GW-1GP

BLUETOOTH_EN 31,34

PLT_RST1# 8,19,23,24,28,29,34

SMB_CLK 21,28,29

SMB_DATA 21,28,29

USB_PN9 21 USB_PP9 21

3D3V_S0

SC:08/09 Delete D21,add U62(73.01G32.AHH) to replace D21

5

VCC

4

DY

BT_ACT_1 BT_ACT_2

SC:08/11 Add R192,R194 pull low resistor for bluetooth active signal to

12

R160

R160 100KR2J-1-GP

100KR2J-1-GP

12

R192

100KR2J-1-GP

BT_ACT 29

12

R194

100KR2J-1-GP

1D5V_S0

SC33P50V2JN-3GP

1D5V_S0

3D3V_S0

12

C608

SCD1U16V2ZY-2GP

C

SCD1U16V2ZY-2GP

12

C274

DY

3D3V_S0

12

C602

SCD1U16V2ZY-2GP

12

C277

C607

DY

SCD1U16V2ZY-2GP

SC10U6D3V5KX-1GP

B

5V_S5

12

TC5

12

C614

DY

1 1

DY

Place TC35 near MINI 2

SCD1U16V2ZY-2GP

A

TC5

ST220U6D3VDM-13GP

C287

12

SCD01U16V2KX-3GP

SC10U6D3V5KX-1GP

DY

5V_S5

12

C615

12

C289

DY

SC10U6D3V5KX-1GP

12

SCD1U16V2ZY-2GP

C285

DY

D

12

C286

C605

DY

SCD1U16V2ZY-2GP

SC10U6D3V5KX-1GP

SCD1U16V2ZY-2GP

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

3D3V_S03D3V_S0

12

DY

12

C606

C606 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

Place C451 near MINI 3 pin24

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

MINI CARD CONN 2 & 3

DS2-Intel -1

30 47Wednesday, September 12, 2007

E

5

4

3

2

1

-1:0910

3D3V_AUX_S5

3D3V_S5

12

R205

10KR2J-3-GP

D D

3D3V_S5

C C

ICH_SDOUT_CODEC20,23,32

ICH_AZ_CODEC_SYNC20,23,32

ICH_AZ_MDC_RST#20

CIRRX34

ICH_SDIN_MDC20

12

1 2

R266 39R2J-L-GPR266 39R2J-L-GP

C428

C428 SC22P50V2JN-4GP

SC22P50V2JN-4GP

R181100R2J-2-GP R181100R2J-2-GP

ACSDATAIN1_A

12

DY

Main Source:20.F0677.012 2nd Source: 20.F0676.012

C332

SC4D7U6D3V5KX-3GP

R182

R182 10KR2J-3-GP

10KR2J-3-GP

12

C333

SCD1U10V2KX-4GP

13

11 12 16

FRIEE_CIRRX

SIO_CIRRX_VS

12

MDC1

1 2 3 4

5 6 7 8 9 10

AMP-CONN12A-1GP

CIR

4 3 2 1

TSOP36136-GP

MH1 14 15

18 17 MH2

OUT VS GND GND

U61

12

3D3V_S5

ICH_ACZ_MDC_BITCLK

12

C432

R265

100KR2J-1-GP

SC4D7U6D3V5KX-3GP

1 2

0R2J-2-GP

12

C204

C204 SC22P50V2JN-4GP

SC22P50V2JN-4GP

DY

R343

HDA_BITCLK 20,23,32

SC:08/12 Add R458 (63.10434.1DL) pull up for "WLAN/BT_BTN#. Because sniffer is option feaature.

WLAN/BT_BTN#34

SNIFFER_PWR_SW#34

SNIFFER_YELLOW#34

5V_S5

12

SNIFFER_BLUE#34

C578

SCD1U10V2KX-4GP

WLAN/BT_BTN# SNIFFER_PWR_SW# SNIFFER_YELLOW# SNIFFER_BLUE#

DY

12

EC114

SC220P50V2KX-3GP

DY

3D3V_AUX_S5

12

EC115

SC220P50V2KX-3GP

R458

R458 100KR2J-1-GP

100KR2J-1-GP

DY

SC:07/26 Rename "SNIFFER_BD1" to "SNIFFER1"

SNIFFER1

1 2

3 4 5 6

MLX-CON6-11-GP

12

EC111

SC220P50V2KX-3GP

7

8

12

EC110

DY

SC220P50V2KX-3GP

B B

SCD1U10V2KX-4GP

BT_ACT_K#35

A A

5

Bluetooth Module conn.

USB_PP521

USB_PN521

BT_ACT_130

BLUETOOTH_EN30,34

WLAN_ACT29,30

12

R258

4

BT_LED

12

R259

R259 10KR2J-3-GP

10KR2J-3-GP

DY

12

EC172

SC220P50V2KX-3GP

C424

3D3V_S0

C E

12

Q28

R1

B

R2

PDTC124EU-1-GP

10KR2J-3-GP

SC:08/14 Add EC172(78.22124.2FL) on "BT_ACT1" for EMI team request.

BLUETOOTH_ENBT_ACT_1 USB_PP5 USB_PN5

12

DY

SC:08/14 Add EC173(78.22034.1FL) on "USB_PP5" for EMI team request.

3

1 2

3 4 5 6 7 8 9

10

FOX-CON10-GP

20.F0711.010

EC62

SC220P50V2KX-3GP

BT1

DY

11

12

EC173

SC22P50V2JN-4GP

SC:08/14 Add EC174(78.22034.1FL) on "USB_PN5" for EMI team request.

DY

12

EC174

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SC22P50V2JN-4GP

2

Title

Size Document Number Rev

A3

Date: Sheet

MDC&RJ11 CONN

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel

31 47Wednesday, September 12, 2007

of

1

of

-1

A

60ohm 100MHz 3000mA 0.05ohm DC

12

C266

4 4

SCD1U10V2KX-4GP

SB:07/10 Change R344 from 33 Ohm to 0 Ohm

HDA_BITCLK20,23,31

ICH_SDIN_CODEC20

ICH_SDOUT_CODEC20,23,31

ICH_AZ_CODEC_SYNC20,23,31

ICH_AZ_CODEC_RST#20

3D3V_S0

AUD_DMIC_CLK_G18

3 3

AUD_DMIC_CLK_G

12

C270

C276

SCD1U10V2KX-4GP

U34

5 4

74LVC1G125DC-GP

R149 33R2J-2-GPR149 33R2J-2-GP

SC1U6D3V2KX-GP

R152

C298 SC1KP50V2KX-1GPC298 SC1KP50V2KX-1GP

1 2

R344 0R2J-2-GPR344 0R2J-2-GP

R146 33R2J-2-GPR146 33R2J-2-GP

DY

1

OE#

VCC Y

GND

2

A

3

12

+3V_RUN_DVDD_CORE3

12

100KR2J-1-GP

12

ICH_AZ_CODEC_BITCLK

12

SB: Change R149 from 63.R0034.1DL to 63.33034.1DL

AUD_DMIC_IN018

SPDIF_D35

AUD_SPDIF_OUT23

AUD_DMIC_CLK_G

12

EC129

EC129 SC22P50V2JN-4GP

2 2

SC22P50V2JN-4GP

R455

12

AUD_SPDIF_OUT

200R2F-L-GP

ICH_AZ_CODEC_BITCLK

DY

AUD_DMIC_CLK

12

EC36

EC36 SC22P50V2JN-4GP

SC22P50V2JN-4GP

SB:07/02 Change EC36 from ASM to DUMMY

SB:06/26 Add EC129(78.22034.1FL) by EMI request

B

SB_AZ_CODEC_SDIN0_R

AUD_DMIC_CLK

AUD_DMIC_IN0

U36

1

DVDD_CORE

9

DVDD_CORE

40

DVDD

6

BIT_CLK

8

SDATA_IN

5

SDATA_OUT

10

SYNC

11

RESET#

2

VOLUME UP/DMIC_0/GPIO1

3

VOLUME DN/DMIC_1/GPIO2

47

SPDIF_IN/GPIO0/DMIC_CLK

48

SPDIF_OUT

4

DVSS1

7

DVSS2

STAC9228X5TAEA2-GP 71.09228.00G

AVDD1 AVDD2

SENSE_A SENSE_B

PORT_A_L

PORT_A_R

VREFOUT_A

PORT_B_L

PORT_B_R

VREFOUT_B

PORT_C_L PORT_C_R

VREFOUT_C

PORT_D_L PORT_D_R

VREFOUT_D

PORTE_L

PORTE_R

VREFOUT_E

PORTF_L

PORTF_R

VREFOUT_F

PORTG_L PORTG_R

PORTH_L PORTH_R

CD_L

CD_GND

CD_R

PC_BEEP

CAP2

VREFFILT

AVSS1 AVSS2

C

25 38

AUD_SENSE_A

13

AUD_SENSE_B

34

39 41 37

21 22 28

AUD_INT_MIC_L

23

AUD_INT_MIC_R

24

AUD_VREFOUT_B

29 35

36 32

14 15 31

16 17 30

43 44

45 46

18 19 20

AUD_PC_BEEP

12

AUD_CAP2

33

AUD_VREFFLT

27

26 42

12

C320

SCD1U10V2KX-4GP

AUD_HP1_OUT_L AUD_HP1_OUT_R

C292 SC1U10V3KX-3GPC292 SC1U10V3KX-3GP C294 SC1U10V3KX-3GPC294 SC1U10V3KX-3GP

AUD_LINE_OUT_L AUD_LINE_OUT_R

AUD_EXT_MIC_L AUD_EXT_MIC_R AUD_VREFOUT_E

C299

SC10U10V5KX-2GP

1 2

+VDDA3D3V_S0

C296

SC1U10V3KX-3GP

TO Audio OP

AUD_HP1_OUT_L 33 AUD_HP1_OUT_R 33

1 2 1 2

R153

1 2

4K7R2J-2-GP

AUD_LINE_OUT_L 33 AUD_LINE_OUT_R 33

AUD_HP2_OUT_L 33 AUD_HP2_OUT_R 33

SCD1U10V2KX-4GP

C300

SC10U10V5KX-2GP

1 2

TO Audio OP

PC BEEP

AUD_BEEP

12

C267

12

R412

D

+VDDA

R421

5K1R2F-2-GP

+VDDA

R154

5K1R2F-2-GP

INT_MIC

Port A---> HP1 Port E---> Ext Mic Port D---> Speaker Port F---> HP2 Port C--->Int Mic

R141

1 2

47KR2F-GP

R413

10KR2J-3-GP

R413

1 2

47KR2F-GP

SA:0428

E

12

R420

1 2

39K2R2F-L-GP

12

R158

1 2

20KR2J-L2-GP

R157

1 2

39K2R2F-L-GP

AUD_HP1_JD# 33

AUD_HP2_JD# 33

EXT_MIC_JD#

From SB

SB_SPKR 21

KBC_BEEP 34

From EC

Internal Microphone

-1:09/06 Change Int. MIC from

23.42132.001 to 23.42143.001

MIC IN

Azalia I/F EMI Azalia I/F EMI

ICH_SDOUT_CODEC

12

R145

47R2J-2-GP

1 1

SCD1U10V2KX-4GP

C263

A

DY

ICH_AZ_CODEC_SDOUT1

12

DY

ICH_AZ_CODEC_BITCLK

12

R144

R144 47R2J-2-GP

47R2J-2-GP

DY

ICH_AZ_CODEC_BITCLK1

12

C265

C265 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DY

AUD_EXT_MIC_L AUD_EXT_MIC_R

B

1 2 1 2

MIC_IN_L_2

C306

SC1U10V3KX-3GP

MIC_IN_R_2

C307

SC1U10V3KX-3GP

AUD_VREFOUT_E

12

R162

4K7R2J-2-GP

12

C302

C302 SC1U10V3KX-3GP

R163

SC1U10V3KX-3GP

4K7R2J-2-GP

1 2

R169 0R3-0-U-GPR169 0R3-0-U-GP

1 2

R168 0R3-0-U-GPR168 0R3-0-U-GP

SB:07/02 Change R168 from 63.R0034.1DL to 63.00000.00L

600ohm 100MHz 200mA 0.5ohm DC

C

MIC_IN_L_C MIC_IN_R_C

EXT_MIC_JD#

12

EC48

INT_MIC

EC52

SC1KP50V2KX-1GP

12

MIC1

1 2 6 3

12

EC49

SC100P50V2JN-3GP

4 5

7 8 9

10

AUDIO-JK89-GP-U

D

MIC1

Title

Size Document Number Rev

A3

Date: Sheet

AUDIO CODEC STAC9228

CN4

2

MICROPHONE-40-GP-U

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel

32 47Wednesday, September 12, 2007

of

E

of

-1

A

Close to U27.18

5V_S0

60ohm 100MHz 3000mA 0.05ohm DC

4 4

Close to U37.8

3D3V_S0

C314

SC1U6D3V2KX-GP

1 2

Close to U30.9

AUD_HP1_OUT_R32 AUD_HP1_OUT_L32

R156

3 3

R171

R440

R441

C631

C628

1 2

C309 SC10U10V5KX-2GPC309 SC10U10V5KX-2GP

1 2

C310 SC10U10V5KX-2GPC310 SC10U10V5KX-2GP

Default

TPA6040A MAX9789A

100K

No ASM

0.33uF

GAIN SETTING

2 2

1 1

5V_S0

12

R434

R434 100KR2J-1-GP

100KR2J-1-GP

12

R433

R433 100KR2J-1-GP

100KR2J-1-GP

DY

GAIN1 GAIN2 GAIN

0 0 6dB 0 1 10dB 1 0 15.6dB 1 1 21.6dB

12

A

No ASM

0 Ohm

100K

No ASM

R439

R439 100KR2J-1-GP

100KR2J-1-GP

DY

AUD_AMP_GAIN2AUD_AMP_GAIN1

R436

R436 100KR2J-1-GP

100KR2J-1-GP

12

C327

SC10U10V5KX-2GP

AUD_SPK_L1 AUD_SPK_L2 AUD_SPK_R2 AUD_SPK_R1

AUD_HP1_JACK_R AUD_HP1_JACK_L

AUD_AMP_GAIN1 AUD_AMP_GAIN2

AUD_HP1_OUT_R1 AUD_HP1_OUT_L1

AUD_HP2_OUT_L32

AUD_HP2_OUT_R32

AUD_HP1_JD#

AUD_HP2_JD#

12

C623

C322

SCD1U10V2KX-4GP

SC1U10V3KX-3GP

6

7 19 20

15 16

31 32

26 27

AUD_HP2_OUT_L AUD_HP2_OUT_R

8

PVDD

OUTL+ OUTLOUTROUTR+

HPR HPL

GAIN1 GAIN2

HP_INR HP_INL

PGND

5

21

C316 SC1U10V3KX-3GPC316 SC1U10V3KX-3GP

Main source: TPA4411MRTJ 74.04411.AE3 2nd source: MAX4411EPT+ 74.04411.A13

Signal inverter for speaker shutdown

+VDDA

R172

100KR2J-1-GP

D22

1

AUD_SPK_ENABLE

3

2

BAW56PT-U

NB_SPK_EN#

B

3D3V_S0

18

9

17

30

U59

VDD

SPKR_INL

MUTE# HP_EN

REGEN

VOUT

BIAS

MAX9789A-GP

14

C1P C1N

SET

2 3

23 25 22 4 10 12 29 24 1

PVDD

GND

28

33

1 2

SPKR_INR

CPVDD

HPVDD

SPKR_EN#

CPGND11CPVSS13PVSS

AUD_CPVSS

-1:0909

AMP2_C1N

1 2

C305 SC10U10V5KX-2GPC305 SC10U10V5KX-2GP

1 2

C301 SC10U10V5KX-2GPC301 SC10U10V5KX-2GP

SB:70213

SC:08/12 Add R459 (63.10434.1DL) pull up for U64 pin4 "NB_SPK_EN".

5V_S0

12

R459

R459 100KR2J-1-GP

100KR2J-1-GP

U64

5 6

2N7002SPT

B

5V_S0

34 2 1

5V_S0

12

C622

12

C328

SC1U10V3KX-3GP

AUD_LIN_R AUD_LIN_L

AUD_SPK_ENABLE#

AMP_MUTE#_R AUD_HP1_EN AMP_REGEN AMP_C1P AMP_C1N

AUD_BIAS

AUD_SET

12

DY

R440

0R2J-2-GP

12

C627

SCD1U10V2KX-4GP

1 2

C317

SC1U10V3KX-3GP

12

C631

SCD033U16V3KX-GP

C622

SC10U6D3V5KX-1GP

C630 SCD033U16V3KX-GPC630 SCD033U16V3KX-GP C629 SCD033U16V3KX-GPC629 SCD033U16V3KX-GP

R156

100KR2J-1-GP

R171 0R2J-2-GP

DY

+VDDA

12

C321

C311

SC1U10V3KX-3GP

Main source: TPA6040A 74.06040.013 2nd source: MAX9789A 74.09789.013

3D3V_S0

12

C313

SC1U6D3V2KX-GP

C295

AMP2_C1P

1 2

SC2D2U6D3V3KX-GP

AUD_HP2_OUT_L2 AUD_HP2_OUT_R2

C304

1 2

SC2D2U6D3V3KX-GP

12

R159

R159 100KR2J-1-GP

100KR2J-1-GP

AUD_SPK_ENABLE# AMP_MUTE#

SC:08/11 Delete Q18, Add U64 circuit for Speaker

MAX4411ETP-1-GP

AUD_HP1_JD# AUD_HP1_JD AUD_HP1_EN

U38

1

C1P

3

C1N

13

INL

15

INR

AUD_PVSS

10

5

19

SVDD

PVSS

5 6

PVDD

SVSS

7

U63

2N7002SPT

12

1 2 1 2

12

14

18

SHDNR#

GND

21

C

12

C619

SHDNL#

SGND

17

C

60ohm 100MHz 3000mA 0.05ohm DC

C618

SC1U6D3V2KX-GP

5V_S0

DY

R441

100KR2J-1-GP

12

C628

SCD033U16V3KX-GP

SC1U10V3KX-3GP

AUD_HP2_EN AUD_HP2_JACK_L AUD_HP2_JACK_R

11

9

OUTL

OUTR

4

NC#4

6

NC#6

8

NC#8

12

NC#12

16

NC#16

20

NC#20

PGND

2

5V_S0

12

R167

R167 100KR2J-1-GP

100KR2J-1-GP

AUD_HP1_JD

34

AMP_MUTE#

2

AUD_HP1_EN

1

12

R457

R457 10MR2J-L-GP

10MR2J-L-GP

AUD_HP2_JD# AUD_HP2_JD AUD_HP2_ENAUD_HP2_EN

3D3V_S0

AUD_LINE_OUT_R 32 AUD_LINE_OUT_L 32

From EC

12

This pin should be FLOAT. Do NOT connect to GND.

AMP_MUTE# 34

5V_S0

SC:08/13 Change R441pin1 connection from"AMP_MUTE#" to 5V_S0

SC:08/11 Delete Q19, Add U63,R457 circuit for HP1

5V_S0

U39

34

2N7002SPT

2 1

5 6

D

SC:08/11 Change SPK1 pin define that follow ME request

AUD_SPK_L2 AUD_SPK_L1 AUD_SPK_R2 AUD_SPK_R1

DY

12

EC7

SC100P50V2JN-3GP

AUD_HP1_JD#32

AUD_HP1_JACK_L AUD_HP1_JACK_R AUD_HP1_JACK_R1

L10 BLM18BD601SN1D-GPL10 BLM18BD601SN1D-GP L11 BLM18BD601SN1D-GPL11 BLM18BD601SN1D-GP

600ohm 100MHz 200mA 0.5ohm DC

R11 0R0603-PADR11 0R0603-PAD R14 0R0603-PADR14 0R0603-PAD R13 0R0603-PADR13 0R0603-PAD R10 0R0603-PADR10 0R0603-PAD

DY

12

EC9

1 2 1 2

12

EC6

SC100P50V2JN-3GP

1 2 1 2 1 2 1 2

EC8

AUD_HP1_JD#

DY

LINE2 OUT

AUD_HP2_JD#

DY

12

R166

R166 33KR2J-3-GP

33KR2J-3-GP

AUD_HP2_JDAUD_HP2_JD

AUD_HP2_JDAUD_HP2_JD AMP_MUTE# AUD_HP2_ENAUD_HP2_EN

12

R165

R165 10MR2J-L-GP

10MR2J-L-GP

AUD_HP2_JD#32

AUD_HP2_JACK_L AUD_HP2_JACK_R

600ohm 100MHz 200mA 0.5ohm DC

D

1 2

L9 BLM18BD601SN1D-GPL9 BLM18BD601SN1D-GP

1 2

L8 BLM18BD601SN1D-GPL8 BLM18BD601SN1D-GP

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

E

Speaker

AUD_SPK_L2_R AUD_SPK_L1_R AUD_SPK_R2_R AUD_SPK_R1_R

MLX-CON4-15-GP

SC100P50V2JN-3GP

LINE1 OUT

AUD_HP1_JACK_L1

12

EC51

EC50

DY

SC100P50V2JN-3GP

AUD_HP2_JACK_L2

AUD_HP2_JACK_R2

EC46

DY

SC100P50V2JN-3GP

AUDIO AMP/SPEAKER

SA:4/28

SC100P50V2JN-3GP

12

EC47

SA:4/28

SC100P50V2JN-3GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel

E

SPK1

1 2 3 4

1 2 6 3 4 5

7 8 9

10

AUDIO-JK89-GP-U

1 2 6 3 4 5

7 8 9

10

AUDIO-JK89-GP-U

33 47Wednesday, September 12, 2007

of

5

6

LOUT1

LOUT2

-1

5

A

VBAT

C193

C194

12

C518

SCD1U16V2ZY-2GP

SC1U16V3ZY-GP

SCD1U16V2ZY-2GP

12

PLACE CAP NEAR PIN80 AND PIN102

D D

WPC8763L STRAP PIN

JENK

JEN0 (Pin 24)

NO PD RES

10K PD

(Pin 53)

NO PD

10K PDNO PD

Functionality of Pins 17, 20, 21, 23 25, 27

GPIO Port Keyboard Scan JTAG signals GPIO Port

Functionality of Pins 47, 48, 50, 51, 52

Keyboard Scan JTAG signals

TRIS#(Pin 110) TRI-STATE

Forces the device to float all its output and I/O pins,if an external 10 KΩ pull-down resistor is conected.

BADDR1-0 (PIN 111, 112) I/O Base Address.

10KΩ external pull-down resistor on BADDR1: Core defined

3D3V_S0

12

R105

R105 10KR2J-3-GP

10KR2J-3-GP

PIN 111

DY

C C

SHBM PIPN83 Shared Host BIOS Memory.

HIGH:NO SHARED(internal resistor) LOW:SHARED BIOS memory.

E51_TxD

SB:06/24 Change R104 from

R104

63.10334.1DL to 63.47234.1DL.Base on

4K7R2J-2-GP

Winbond FAE recommend to fix system

1 2

will hang up after Thermal T8 shutdown

R98

BLUETOOTH_EN

1 2

4K7R2J-2-GP

SB:06/27 Change R98 from 63.10334.1DL to

63.47234.1DL .

-1:08/30 Change Pin10 from NC to be"WWAN_RF_EN"

-1:08/30 Change Pin11 from NC to be"HDD_5V_EN"

-1: 08/29 change Pin24 from "WWAN_RF_EN" to NC, because pin24 is H/W straping pin. it has H/W concern.

1D05V_S0

12

R442

R442 2K2R2J-2-GP

2K2R2J-2-GP

B B

3D3V_S0

R337

10KR2J-3-GP

PCB_VER0 PCB_VER1

DY

R339

10KR2J-3-GP

WPC8763L XTAL

R326

1 2

12

10MR2J-L-GP

R330

R330 33KR2J-3-GP

33KR2J-3-GP

KBC_XO_R

SC12P50V2JN-3GP

12

C510

12

DY

12

KBC_XI_R

1

2 3

X-32D768KHZ-40GPU

12

MB VERSION ID

R335

10KR2J-3-GP

R335

10KR2J-3-GP

MB VERSION ID

12

SA

R338

10KR2J-3-GPDYR338

10KR2J-3-GP

SB SC

-1

R451

1 2

10MR2J-L-GP

X5

-1:0912

4

5

H_THERMTRIP#5,8,20,46

VER1VER0

0

0 10 01 1

1

KBC_XO

KBC_XI

SC12P50V2JN-3GP

12

C507

KBC CLK EMI

PCLK_KBC

R340

R340 0R2J-2-GP

0R2J-2-GP

DY

PCLK_KBC_RC

1 2

C519

C519 SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

DY

1 2

Q34

Q34 CH3904PT-GP

CH3904PT-GP

FOR Thermal AND Capacity Button Module

4

C513

SC1U16V3ZY-GP

12

C515

C505

SCD1U16V2ZY-2GP

PLACE CAP NEAR PIN46,19,115,76,88,104

C632

1 2

SCD1U16V2ZY-2GP

KBC_THERMTRIP#

CBE

SCD1U16V2ZY-2GP

PM_SLP_S3#21,28,43,45,46 KBC_PWRBTN#35

LCD_CBL_DET#18

AC_IN#39 LID_CLOSE#35 INSTEAD_BTN#35

PM_CLKRUN#21,25

BAT_IN#38

BRIGHTNESS18

CIRRX31

BATFULL_LED35

ACDC_ID38 PWRLED35 PM_PWRBTN#21

SCRLK_LED35

WWAN_RF_EN30

HDD_5V_EN24

TP55TPAD30 TP55TPAD30

NUM_LED35 CAP_LED35 LED_MASK#35

SNIFFER_BLUE#31

LCD_TST18

S5_ENABLE46 RSMRST#_KBC21 AD_OFF38

PM_LAN_ENABLE27

CHARGE_LED35

CAPA_INT#37

WLAN_LED_TEST35

PSID_DISABLE#38

WLAN/BT_BTN#31

LCD_TST_EN18

GMCH_BL_ON10

GBRST#_KBC25

SC:08/03 Change Pin27 from"BLON_OUT" to" LCD_TST_EN", delete TP45 test pad.

CAP_SDA37

4

12

C512

SCD1U16V2ZY-2GP

3D3V_AUX_S5

SCD1U16V2ZY-2GP

G792_SDA36

12

C504

SCD1U16V2ZY-2GP

KBC_PWRBTN# KBC_THERMTRIP#

INSTEAD_BTN#

NUM_LED CAP_LED

CHARGE_LED

TP57TPAD30 TP57TPAD30

LCD_TST_EN

CLKOUT

TP50TPAD30 TP50TPAD30

PM_SLP_S4#21,28,40,44,45

SNIFFER_YELLOW#31

WIFI_RF_EN29

AMP_MUTE#33

E51_RxD30 KA20GATE20

INT_SERIRQ21,25

KBRCIN#20

PCLK_KBC4

R323 0R2J-2-GPR323 0R2J-2-GP

1 2

KBC_SCL1

3D3V_AUX_S5

12

TP56TPAD30 TP56TPAD30

TP53TPAD30 TP53TPAD30

ECSWI#21

ECSCI#21

LPC_LAD[0..3]20

C517

C517 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

U22

64

GPIO01

95

GPIO03

96

GPIO04

108

GPIO05

93

GPIO06/HGPIO06

94

GPIO07/HGPIO07

124

GPIO10/HGPIO00/LPCPD#

8

GPIO11/HGPIO02/CLKRUN#

13

GPIO12/PSDAT3

62

GPIO13/B_PWM0

63

GPIO14/HGPIO04/TB1

114

GPIO16/HGPIO04

117

GPIO20/TA2

118

GPIO21/A_PWM1

119

GPIO23

6

GPIO24/HGPIO01

10

GPIO26/PSCLK2

11

GPIO27/PSDAT2

12

GPIO25/PSCLK3

109

GPIO30

120

GPIO31

65

GPIO32

66

GPIO33

14

GPIO34

15

GPIO36

16

GPIO40

17

GPIO42/TCK

20

GPIO43/TMS

21

GPIO44/TDI

22

GPIO45

23

GPIO46/TRST#

24

GPO47/JEN0#

25

GPIO50/TDO

26

GPIO51

27

GPIO52/RDY#

28

GPIO53

30

GPIO55/CLKOUT

31

GPIO56/TA1

WPC8763LDG-1-GP

TP51TPAD30 TP51TPAD30 TP46TPAD30 TP46TPAD30

KBC_SCL1 KBC_SDA1 ECSWI#_KBC GPIO64

ECSMI#_KBC E51_RxD

U54

5 6

2N7002SPT

ECSMI#21

R329

1 2

0R0603-PAD

3

ECRST# VBAT

46

33

KCOL17 KCOL16

KA20GATE

3D3V_S0

KBC_SDA1

34 2 1

R322 0R2J-2-GPR322 0R2J-2-GP

D30

1

2

BAS16-1-GP

D29

1

2

BAS16-1-GP

D16

1

2

3

LPC_LAD3 LPC_LAD2 LPC_LAD1 LPC_LAD0

3D3V_S0

85

76

88

115

VCC

GPIO64/SMI#

GPIO61/SCL267GPIO62/SDA2

GPIO63/PWUREQ#

9

68

123

G792_SCL 36

1 2

ECSWI#_KBC

3

ECSCI#_KBC

3

ECSMI#_KBC

3

102

AVCC

VCC_POR#

GPIO7073GPIO71

GPIO66/SWD81GPIO75

74

82

4

VDD

GPIO77

84

19

VCC

GPIO57/HGPIO03/KBSOUT17

GPIO60/KBSOUT16

34

KBRCIN#

BAS16-1-GP

126

127

LAD0

GPIO81

GPIO87/SIN_CR

91

113

1

128

LAD3

LAD1

LAD2

GA20

SERIRQ

121

125

CAP_SCL 37

GPI90/AD097GPI91/AD198GPI92/AD299GPI93/AD3

KBRST#

2

122

2

TP60 TPAD28TP60 TPAD28

ECSCI#_KBC

3

29

ECSCI#

LRESET#

LFRAME#

KBSOUT0/JENK#

KBSOUT1/TCK KBSOUT2/TMS

KBSOUT3/TDI

KBSOUT5/TDO

KBSOUT6/RDY#

KBSOUT12/GPIO64 KBSOUT13/GPIO63 KBSOUT14/GPIO62

AGND

TP61 TPAD30TP61 TPAD30

TP52 TPAD28TP52 TPAD28

TP97 TPAD28TP97 TPAD28

KBSIN0 KBSIN1 KBSIN2 KBSIN3 KBSIN4 KBSIN5 KBSIN6 KBSIN7

KBSOUT4

KBSOUT7 KBSOUT8

KBSOUT9 KBSOUT10 KBSOUT11

F_SDI

F_SDO

F_SCK

F_CS0#

SDA1 SCL1

PSDAT1 PSCLK1

KBC_BEEP 32

3D3V_AUX_S5

BLUETOOTH_EN 30,31

USB_PWR_EN# 35,38

E51_TxD 30

54 55 56 57 58 59 60 61

53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35

86 87 92 90

69 70

71 72

PCB_VER0 PCB_VER1

USB_PWR_EN# E51_TxD

111

112

110

7

100

LCLK

A_PWM0

VCORF

VREF

32

44

104

KBC_BEEP

VCORF

12

SCD1U16V2ZY-2GP

83

101

105

75

106

107

GPI96

GPI97

GPO72

GPI94/DA0

GPI95/DA1

GPO76/SHBM

GPO82/HGPO00/TRIS#

GPO84/HGPO01/BADDR0

GPO83/SOUT_CR/BADDR1

KBSOUT15/GPIO61/XOR_OUT

GND

32KX1/32KCLKIN77GND

32KX279RESERVED

GND

5

18

45

80

VBAT

C183

78

89

103

116

KBC_XI KBC_XO

ADIA:to Charger ACDC_ID:from Adapter Conn KBC_PWRBTN#:from power button BAT_IN#:from Battery Conn DC_BATFULL#:for Battery charge LED 1 WLAN_TEST:for WKS test WLAN LED AD_OFF:enable AC adapter power source CHARGE_LED#:for Battery charge LED 2 WLAN/BT_BTN#:from Wlan on/off button GMCH_BL_ON:Sense The Backlight On/Off Status from VGA Chip WIRELESS_EN:Disable/Enable Wireless Module BLUETOOTH_EN:Disable/Enable Bluetooth USB_PWR_EN#:to on/off USB power switch CCD_ON:Webcam power on/off AC_IN#:From Charge

2

AD_IA 39

KB_DET# 37

DMIC_DET# 18 SNIFFER_PWR_SW# 31

PLT_RST1#_1

LPC_LFRAME# 20

C514

DY

KROW0 KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7

KCOL0 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15

-1:08/29 Change U22 pin110 define from NC to"USB_PWR_EN" or USB power control.

R336

12

TP47 TPAD28TP47 TPAD28 TP42 TPAD28TP42 TPAD28 TP48 TPAD28TP48 TPAD28 TP43 TPAD28TP43 TPAD28

TP44 TPAD28TP44 TPAD28 TP49 TPAD28TP49 TPAD28

0R2J-2-GP

SC470P50V2KX-3GP

10KR2J-3-GP

10KR2J-3-GP R88

R88

12

DY

PLT_RST1# 8,19,23,24,28,29,30

KBC DEBUG POINT

SPIDI 35 SPIDO 35

SPICLK 35

SPICS# 35

BAT_SDA 18,38,39

BAT_SCL 18,38,39

TPDATA 37 TPCLK 37

<-----BATTERY

12

EC32

DY

3D3V_AUX_S5

PURE_HW_SHUTDOWN#36,46

3D3V_S0

R103 10KR2J-3-GP

SRN10KJ-5-GP

3D3V_AUX_S5

SRN10KJ-6-GP

SRN10KJ-5-GP

SCD1U16V2ZY-2GP

R106

R101

R443

R447

R448

S5_ENABLE

Title

Size Document Number Rev

Size Document Number Rev A2

A2

A2 Date: Sheet

Date: Sheet

1

KROW[0..7] 37

KCOL[0..16] 37

DY

1 2

RN59

1 2 3

RN21

1 2 3 4 5

RN60

1 2 3

1 2

RN58

1 2 3

SRN10KJ-5-GP

KBC_Winbond WPC8763L

4

8 7 6

4

100KR2J-1-GP

10KR2J-3-GP

R331

1 2

4

E51_RxD

KA20GATE KBRCIN#

KBC_SCL1 KBC_SDA1 BAT_SDA BAT_SCL

KBC_PWRBTN# INSTEAD_BTN#

SNIFFER_PWR_SW#

LID_CLOSE#

LCD_CBL_DET#

KB_DET#

DMIC_DET#

10KR2J-3-GP

Q30

CH3906PT-GP

ECRST#_C

B

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel

1

ECRST#

C516

12

SC1U10V3KX-3GP

E

C

-1

of

47Wednesday, September 12, 2007

34

47Wednesday, September 12, 2007

A

B

C

D

E

SA:04/22 change C532,C533,C534

SPI

3D3V_AUX_S5

SPI FLASH ROM

SC10U6D3V5MX-3GP

SRN10KJ-6-GP

SRN10KJ-6-GP RN24

RN24

U21

1

CS#

2

DO

3

WP#

4

GND

W25X80-VSSI-GP

SC4D7P50V2CN-1GP

SC:08/09 Add EC148(78.22124.2FL) for EMI request, deault is dummy.

LID_CLOSE# 34

SC47P50V2JN-3GP

SC:08/09 Add EC150(78.22124.2FL) for EMI request, deault is dummy.

SC10U6D3V5MX-3GP

3D3V_AUX_S5

VCC

HOLD#

CLK

DIO

EC97

BT_LED# BT_LED#_R

12

EC148

DY

DRVIE_LED#DRVIE_LED#

WIFI_LED#

B

8

SPI_HOLD#

7 6 5

150R2F-1-GP

12

SC220P50V2KX-3GP

LED_PWR# LED_BAT# LED_CHARGE# WIFI_LED#

SPICS#

3D3V_S55V_S0 5V_S5

LED_PWR#

LED_BAT#

DY

12

678

123

4 5

SPI_HOLD#

SPICS#

SPI_WP#

12

EC163

12

EC150

SC220P50V2KX-3GP

C166

C166 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

4 4

SPICS#34

SPIDI34

SC4D7P50V2CN-1GP

LED Board to Board CONN

3 3

-1:09/02 Change CN3(LED Board) pin assignment.

CN3

13

1 2

3 4 5 6 7 8 9 10 11 12

14

MLX-CON12-11GP

20.K0227.012

2 2

PWRLED34

PDTC124EU-1-GP

BATFULL_LED34

PDTC124EU-1-GP

CHARGE_LED34

PDTC124EU-1-GP

1 1

5V_S5 5V_S0 3D3V_S0

12

C165

C165 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

A

R99

1 2

12

150R2J-L1-GP-U

EC34

LED_PWR# LED_BAT#

LED_CHARGE#

LID_CLOSE# DRVIE_LED# WIFI_LED# BT_LED#

SC:08/11 Add EC163 on "LID_CLOSE" for RF team Request.

Q8

C

R1

B

R2

Q7

R1

R2

Q6

R1

R2

E

C E

LED_CHARGE#

C E

12

C163

C163 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

connection power from "3D3V_S0" to "3D3V_AUX_S5"

3D3V_AUX_S5

C508

DY

12

C509

SCD1U16V2ZY-2GP

EMI REQUEST8M Bits

R334

1 2

R333

1 2

0R2J-2-GP

Q36

Q36 2N7002PT-U

2N7002PT-U

D

1

2

Q37

Q37 2N7002PT-U

2N7002PT-U

D

D14

3

BAW56PT-U

83.00056.E11

12

DY

R446

D15

EC29

2

1

SC220P50V2KX-3GP

1

DY

1

23

G

3

23

G

SPIDO 34

S

BAS16-1-GP

S

LED_MASK#

DY

R334

12

C506

SCD1U16V2ZY-2GP

1 2

12

150R2J-L1-GP-U

EC98

EC98 SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

D13

3

BAW56PT-U

83.00056.E11

LED_MASK# 34

12

EC149

DY

B

Q5

R1

R2

PDTC124EU-1-GP

E

C

EC31

SC220P50V2KX-3GP

SPICLK 34

2

1

SATA_LED# 20

SC:08/09 Add EC149(78.22124.2FL) for EMI request, deault is dummy.

SC220P50V2KX-3GP

WLAN_LED 29

12

EC30

DY

C

SC220P50V2KX-3GP

BT_ACT_WPAN# 30

BT_ACT_K# 31

WLAN_LED_TEST 34

DY

SCRLK_LED34

Power Dash Board to Board CONN

CAP_LED34

NUM_LED34

EC3

DY

12

EC27

SC220P50V2KX-3GP

Q3

R1

B

R2

PDTC124EU-1-GP

Q1

R1

B

R2

PDTC124EU-1-GP

Q2

R1

B

R2

PDTC124EU-1-GP

INSTEAD_BTN# LED_SCRLK# LED_CAP# LED_NUM#KBC_PWRBTN#

12

EC2

DY

SC220P50V2KX-3GP

Right I/O Board to Board CONN

UIM_PWR30 UIM_VPP30 UIM_CLK30

UIM_DATA30

M_LUMA10 M_COMP10 M_CRMA10

SPDIF_D32

5V_S5

DY

12

TC8

12

ST100U6D3VBM-9GP

D

LED_SCRLK#

C E

LED_CAP#

C E

LED_NUM#

C E

12

EC55

DY

SC220P50V2KX-3GP

CONN 28PIN

UIM_PWR UIM_VPP UIM_CLK

UIM_DATA

-1:0910

TV_LUMA TV_COMP TV_CRMA

MLX-CONN28A-2-GP

at least 80 mil

EC128

SCD1U50V3ZY-GP

USB_PWR_EN#34,38

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

-1:09/02 Change CN2(Power Dash Board) pin assignment.

KBC_PWRBTN#34 INSTEAD_BTN#34

SCD1U16V2ZY-2GP

12

SC220P50V2KX-3GP

CN6

1 3

5 7

9 11 13 15 17 19 21 23 25 27

-1:08/29 Add U65 power switch to controll "5V_USB2_S5".

FWH and Board to Board CONN

EC54

DY

5V_USB2_S5

2 4

6 8 10 12 14 16 18 20 22 24 26 28

U65

1

GND

2

IN

3

EN1# EN2#4OC2#

TPS2062D-GP

12

OC1# OUT1 OUT2

5V_S5

LED_SCRLK# LED_CAP# LED_NUM#

12

C5

Main Source:20.K0227.008 2nd Source: 20.K0237.008

EC53

DY

SC220P50V2KX-3GP

-1:08/29 Rename CN6 pin2,pin4 power net become "5V_USB2_S5".

-1:0910

UIM_RESET

5V_USB2_S5 3D3V_S0

-1:08/31 Change CN6 pin26 from "5V_S5" to "5V_USB2_S5"

5V_USB2_S5

8 7 6 5

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DS2-Intel -1

E

9 1

2 3 4 5 6 7 8

10

MLX-CON8-10-GP-U

20.K0227.008

12

SC220P50V2KX-3GP

USB_PP2 21 USB_PN2 21 UIM_RESET 30

USB_PP3 21 USB_PN3 21

at least 80 mil

USB_OC#2 21

USB_OC#3 21

35 47Wednesday, September 12, 2007

of

CN2

*Layout* 15 mil

SCD1U16V2ZY-2GP

RN20

3D3V_S0

5V_S0

SC1U10V3ZY-6GP

1 2

4

R308

R308 200R2F-L-GP

200R2F-L-GP

C486

RN20

SRN10KJ-5-GP

*Layout* 30 mil

12

Setting T8 as 85 Degree

V_DEGREE =(((Degree-72)*0.02)+0.34)*VCC

DXP1:108 Degree DXP2:H/W Setting DXP3:88 Degree

(85 Degree)

C346

1 23

12

G792_SCL G792_SDA

12

R305

R305 30KR2F-GP

30KR2F-GP

12

R301

R301 47KR2F-GP

47KR2F-GP

12

C8

C8 SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC4D7U6D3V5KX-3GP

THRM#21 PURE_HW_SHUTDOWN#34,46

PM_PWROK8,21

FAN1_VCC

5V_S0

C479

-1:0909

R83 0R2J-2-GP

3

1

12

1 2

D24

D24 BAS16-1-GP

BAS16-1-GP

2

12

C473

C473 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

DY

R300

1 2

12

SA:4/28

R298

R298 10KR2J-3-GP

10KR2J-3-GP

100KR2J-1-GP

G792_RESET#

4K7R2J-2-GP

3D3V_AUX_S5

R310

THRM#_R V_DEGREE

5V_G792_S0

SA:4/28

12

6

20

7 9

11

15 13

3 2

U19

VCC DVCC

DXP1 DXP2 DXP3

ALERT# THERM# THERM_SET RESET#

G792SFUF-GP

FAN1

FG1 CLK

SDA

SCL

NC#19

DGND DGND

SGND1 SGND2 SGND3

5V_S0

12

R187

R187 10KR2J-3-GP

10KR2J-3-GP

FAN1_FG1

12

C337

C337 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

SC:08/10 Change C337 from 78.10234.1BL to

78.10224.2FL

1 4 14

G792_SDA

16

G792_SCL

18 19

5 17

8 10 12

G792_CLK 21 G792_SDA 34 G792_SCL 34

12

C173

C173 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

G792_DXP2

SC2200P50V2KX-2GP

G792_DXN2

C178

Place G14 near U36

G792_DXP3

C177

SC2200P50V2KX-2GP

G792_DXN3

C177

FAN1_VCC

*Layout* 15 mil

H_THERMDA 5

H_THERMDC 5

12

G51

GAP-CLOSE

1 2

12

G64

B

FAN1

4

3 2 1

5

MLX-CON3-6-GP

Place on reverse side of CPU

C

Q25

Q25 CH3904PT-GP

CH3904PT-GP

E

Place near G792 chip as close as possible

Place near CPU and NB (Orignal Q25 location)

C

Q33

Q33 CH3904PT-GP

CH3904PT-GP

E

Place G15 near U36

GAP-CLOSE

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

Thermal/Fan Controllor G792

DS2-Intel -1

36 47Wednesday, September 12, 2007

of

SB:06/27 Change K/B connector from 20.F0694.025 to 20.K0291.027 .

KB1

29

28

JAE-CON27-GP

KCOL10

1

KCOL11

2

KCOL9

3

KCOL14

4

KCOL13

5

KCOL15

6

KCOL16

7

KCOL12

8

KCOL0

9

KCOL2

10

KCOL1

11

KCOL3

12

KCOL8

13

KCOL6

14

KCOL7

15

KCOL4

16

KCOL5

17

KROW0

18

KROW3

19

KROW1

20

KROW5

21

KROW2

22

KROW4

23

KROW6

24

KROW7

25 26 27

KB_DET# 34

KROW[0..7] 34

KCOL[0..16] 34

Internal KeyBoard Connector

TouchPad Connector

SB:06/13

TPCLK34

TPDATA34

C187

SC33P50V2JN-3GP

C187

5V_S0

1

23

RN22

RN22 SRN10KJ-5-GP

SRN10KJ-5-GP

4

12

C188

C188 SC33P50V2JN-3GP

SC33P50V2JN-3GP

5V_S0

12

C148

C148 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

TPAD1

5 1

2 3 4 6

FOX-CON4-12-GP

12

C135

C135 SC1U10V3ZY-6GP

SC1U10V3ZY-6GP

SA: 04/15 change TPAD conn to 20.K0179.004

CAPACITY BUTTON

for EMI

KCOL3 KCOL2 KCOL1 KCOL0

EC85SC220P50V2KX-3GP EC85SC220P50V2KX-3GP

EC72SC220P50V2KX-3GP EC72SC220P50V2KX-3GP

EC84SC220P50V2KX-3GP EC84SC220P50V2KX-3GP

EC73SC220P50V2KX-3GP EC73SC220P50V2KX-3GP

12

EC71SC220P50V2KX-3GP EC71SC220P50V2KX-3GP

12

KCOL7 KCOL6 KCOL5 KCOL4

EC70SC220P50V2KX-3GP EC70SC220P50V2KX-3GP

EC69SC220P50V2KX-3GP EC69SC220P50V2KX-3GP12EC79SC220P50V2KX-3GP EC79SC220P50V2KX-3GP

12

EC90SC220P50V2KX-3GP EC90SC220P50V2KX-3GP12EC89SC220P50V2KX-3GP EC89SC220P50V2KX-3GP

EC87SC220P50V2KX-3GP EC87SC220P50V2KX-3GP

12

EC82SC220P50V2KX-3GP EC82SC220P50V2KX-3GP

KCOL11 KCOL10 KCOL9 KCOL8

EC91SC220P50V2KX-3GP EC91SC220P50V2KX-3GP

EC80SC220P50V2KX-3GP EC80SC220P50V2KX-3GP

12

KCOL15 KCOL14 KCOL13 KCOL12

EC88SC220P50V2KX-3GP EC88SC220P50V2KX-3GP

EC81SC220P50V2KX-3GP EC81SC220P50V2KX-3GP

12

EC78SC220P50V2KX-3GP EC78SC220P50V2KX-3GP

12

EC65SC220P50V2KX-3GP EC65SC220P50V2KX-3GP

12

KROW3 KROW2 KROW1 KROW0

EC68SC220P50V2KX-3GP EC68SC220P50V2KX-3GP

EC77SC220P50V2KX-3GP EC77SC220P50V2KX-3GP

EC75SC220P50V2KX-3GP EC75SC220P50V2KX-3GP

12

KROW7 KROW6 KROW5 KROW4

EC67SC220P50V2KX-3GP EC67SC220P50V2KX-3GP

EC66SC220P50V2KX-3GP EC66SC220P50V2KX-3GP

EC76SC220P50V2KX-3GP EC76SC220P50V2KX-3GP

12

KCOL16

EC86SC220P50V2KX-3GP EC86SC220P50V2KX-3GP

12

3D3V_S0

R190 0R3-0-U-GP

R190 0R3-0-U-GP R191 0R3-0-U-GPR191 0R3-0-U-GP

5V_S0

CAPA_INT#34

CAP_SCL CAP_SDA

EC158

SC220P50V2KX-3GP

1 2 1 2

CAP_SCL34

CAP_SDA34

12

DY

CN1

1

CAP_SCL CAP_SDA

12

EC159

SC:08/09 Add EC158,EC159(78.22124.2FL) for EMI request .Default is DUMMY

SC220P50V2KX-3GP

2 3 4 5 6

Main Source:20.K0227.006 2nd Source: 20.K0228.006

7

-1:09/02 Change CN1(Capacity button) pin2 from GND to NC

8

MLX-CON6-11-GP

20.K0227.006

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet of

KeyBoard-CONN

DS2-Intel -1

of

37 47Wednesday, September 12, 2007

5

U66

at least 80 mil at least 80 mil

USB_PWR_EN#34,35

D D

1

GND

2

IN

3

EN1# EN2#4OC2#

TPS2062D-GP

-1:08/30 Add U66 power switch to control USB power

OC1# OUT1 OUT2

8 7 6 5

5V_USB1_S5

Left I/O Connector

USB_PP021 USB_PN021

C C

CONN 24PIN(AC-In+USB)

Reserved for EMI

AD+_JK

Place near DCIN1

USB_PP121 USB_PN121

12

C4

C4 SCD01U50V2KX-1GP

SCD01U50V2KX-1GP

4

5V_USB1_S55V_S5

DY

12

TC6

PD_ID

CN5

26

1 3

5 7

9 11 13 15 17 19 21 23

NP2

25

MLX-CONN24A-1-GP

TC6 ST100U6D3VBM-9GP

ST100U6D3VBM-9GP

USB_OC#0 21 USB_OC#1 21

SB: 06/27 Change CN5 from

20.F1089.028 to 20.F1134.024

3

5V_S5

R221

R221 15KR2J-1-GP

DY

12

EC176

EC176 SCD1U16V2ZY-2GP

SCD1U16V2ZY-2GP

28 30NP1 2

4 6 8 10 12 14 16 18 20 22 24 29 27

This cap should be used only as last resort for EMI suppression.

Q27

AD_OFF34

1

IN

DDTC124EUA-7F-GP

DY

R1

GND

2

R2

OUT

3

R1

15KR2J-1-GP

1 2

R206

R206 100KR2J-1-GP

100KR2J-1-GP

1 2

12

C3

C3 SCD1U50V3KX-GP

SCD1U50V3KX-GP

DY

Q26

B

PDTA124EU-1-GP

DY

D

DY

R1

R2

E

B

C

1

2N7002PT-U

2N7002PT-U Q20

Q20

R207

1 2

33R2J-2-GP

E C

CH3904PT-GP

CH3904PT-GP Q21

Q21

G

23

S

12

C7

C7 SC1U25V5KX-1GP

SC1U25V5KX-1GP

12

R222

R222 10KR2J-3-GP

10KR2J-3-GP

R220

1 2

33R2J-2-GP

AD+_JK AD+

12

R9

R9 240KR3-GP

240KR3-GP

R260

R260 47KR3J-L-GP

47KR3J-L-GP

1 2

2

1

D25

D25 BAV99PT-GP-U

BAV99PT-GP-U

DY

3

PSID_DISABLE# 34

U47

S

1

S

2

S

3

GD

4 5

P2003EVG-GP

Id=17A Qg=100~150nC Rdson=5.4~6.5mohm

5V_S5 3D3V_S5

1

2

3

D

8

D

7

D

6

12

C409

SCD01U50V2KX-1GP

D26

D26 BAV99PT-GP-U

BAV99PT-GP-U

12

C410

SCD01U50V2KX-1GP

12

C408

1

12

SCD01U50V2KX-1GP

R225

R225 2K2R2J-2-GP

2K2R2J-2-GP

12

C398

ACDC_ID 34

SC10U25V6KX-1GP

Left I/O Board to Board CONN

D23

B B

BAT_SCL

Batt Connecter

BATT1

11

GND

10

GND

9

GND2

8

GND1

DAT_SMB CLK_SMB

BATT2+ BATT1+

5

7 6 5 4 3 2 1

BAT_ALERT SYS_PRES# BATT_PRS#

SYN-CON9-1-GP-U1

A A

Battery CONN. Main source:20.80953.009

SYN-CON9-1-GP-U1

2nd source:20.80626.009

PBAT_ALARM# PBAT_PRES1#

PBAT_SMBDAT1 PBAT_SMBCLK1

SCD1U50V3KX-GP

R22 100R2J-2-GPR22 100R2J-2-GP

1 2

12

C2

TP17TP17

12

C1

C1 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

4

SB:07/09 Change R21 from 100K to 470K for power team request

R21 470KR2J-2-GPR21 470KR2J-2-GP

RN1

1

4

2 3

SRN100J-3-GP

R1 0R0603-PADR1 0R0603-PAD

1 2

BT+

12

BATT_SENSE 39

3D3V_AUX_S5

BAT_IN# 34

BAT_SDA 18,34,39 BAT_SCL 18,34,39

3

BAT_SDA

BAT_IN#

PBAT_ALARM#

D23

3

BAV99PT-GP-U

BAV99PT-GP-U D1

D1

3

BAV99PT-GP-U

BAV99PT-GP-U D6

D6

3

BAV99PT-GP-U

BAV99PT-GP-U D2

D2

3

BAV99PT-GP-U

3D3V_AUX_S5

2

1

2

1

2

1

2

1

2

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

AD/BATT CONN

DS2-Intel

1

-1

of

38 47Wednesday, September 12, 2007

-1

A

B

C

D

E

MAX8731_LDO

12

R44

10KR2F-2-GP

ACAV_IN

4 4

3 3

2 2

AC_IN#34

15K4R2F-GP

R45

AD_IA34

12

AC_IN#

12

C68

C68 SC1U10V3KX-3GP

SC1U10V3KX-3GP

2N7002PT-U

R40

365KR3F-GP

R226

49K9R2F-L-GP

5V_AUX_S5

Q23

AD+

12

CHG_AGND

12

R48

R48 100KR2J-1-GP

100KR2J-1-GP

D

1

2 3

S

2N7002PT-U

1 2

R41 0R2J-2-GPR41 0R2J-2-GP

SC1U25V5KX-1GP

12

C383

SCD01U50V2ZY-1GP

ACAV_IN

G

C43

3D3V_AUX_S5

AD+

Layout Trace 250mil

R240

R240 10KR2J-3-GP

10KR2J-3-GP

1 2

DC_IN_D

D

Q22

1

2 3

ACAV_IN

S

12

NEAR KBC POWER

C390 SCD1U25V3KX-GPC390 SCD1U25V3KX-GP

CHG_AGND

BAT_SCL18,34,38

BAT_SDA18,34,38

D

8

D

7

D

6

P2003EVG-GP

2nd:A04433(84.04433.A37)

DCIN_GATE1

D

G

1

G

2 3

S

MAX8731_DCIN MAX8731_ACIN

12

ACAV_IN

BAT_SCL

BAT_SDA

CHG_AGND

NEAR

U48

S

1

S

2

S

3

GD

45

22

11

13

10

14

2

9

8

U46

DCIN ACIN VDD

ACOK

SCL

SDA

BATSEL

INP

DCIN_GATE2

1 2

R241 49K9R2F-L-GPR241 49K9R2F-L-GP

Q24

2N7002PT-U

Adaptor In Soft-Start Circuit

AD+_TO_SYS

1 2

R231 100KR2J-1-GPR231 100KR2J-1-GP

C378

SCD1U25V3KX-GP

CHG_AGND

CHG_AGND CHG_AGND

1

28

CSSP

ASNS

CSSN

VCC

BST

LDO

DLO

PGND

CSIP CSIN

27 26

25 21

24

DHI

23

LX

20

19 18 17

12

MAX8731_VCC

MAX8731_BST MAX8731_LDO

MAX8731_DHI

MAX8731_LX

MAX8731_DLO

MAX8731_CSIP MAX8731_CSIN

Layout Trace 300mil

R229

R229 D01R2512F-4-GP

D01R2512F-4-GP

1 2

MAX8731_CSSP

1 2

G49

C381 SC220P50V2JN-3GPC381 SC220P50V2JN-3GP

1 2

GAP-CLOSE-PWR-3-GP

MAX8731_CSSN

R42

0R3-0-U-GP

MAX8731_BST1

1 2

R224

1R3F-GP

1 2

G50

GAP-CLOSE-PWR-3-GP

12

C379

SCD1U25V3KX-GP

33R2J-2-GP

D8

D8 1SS400PT

1SS400PT

1 2

C42

C42 SCD1U25V3KX-GP

SCD1U25V3KX-GP

R223

21

12

CHG_AGND

C48

C48 SC1U10V3KX-3GP

SC1U10V3KX-3GP

C380

C380 SC1U10V3KX-3GP

SC1U10V3KX-3GP

SI4800BDY-T1

1 2

MAX8731_LX1

DCBATOUT

678

DDD

U8

GD

4 5

678

DDD

GD

4 5

R18

470KR2J-2-GP

12

C375

DY

SC10U25V0KX-3GP

SSS

123

2nd:FDS8884(84.8884.A37)

L14

1 2

IND-5D8UH-GP

68.5R850.101

U7

U7 SI4800BDY-T1

SI4800BDY-T1

SSS

123

2nd:FDS8884(84.8884.A37)

1 2

12

R230

10KR2F-2-GP

1 1

12

C393

A

R227 4K7R2F-GPR227 4K7R2F-GP

MAX8731_CCV1

12

C387

SCD1U16V2ZY-2GP

SCD01U50V2ZY-1GP

12

C385

SCD01U50V2ZY-1GP

12

MAX8731_CCV MAX8731_CCI MAX8731_CCS MAX8731_REF

12

C49

C384

SCD01U50V2ZY-1GP

MAX8731_DAC

12

C389

SCD1U16V2ZY-2GP

SC1U10V3KX-3GP

CHG_AGND

B

6

CCV

5

CCI

4

CCS

3

REF

7

DAC

12

GND

MAX8731AETI-GP

74.08731.A73

GND

29

16

FBSB

15

FBSA

1 2

G48

G48 GAP-CLOSE-PWR

GAP-CLOSE-PWR

BAT_SENSE

1 2

R228 100R2F-L1-GP-UR228 100R2F-L1-GP-U

12

C386

C386 SCD01U50V2ZY-1GP

SCD01U50V2ZY-1GP

BATT_SENSE

C

BATT_SENSE 38

D

SB:06/29 Add EC130,EC131,EC132,EC133(78.10494.4BL) for "BT+" by EMI request

BT+

12

EC132

SCD1U50V3ZY-GP

D

D D

D

8 7 6

12

EC133

SCD1U50V3ZY-GP

BT+

12

EC130

SCD1U50V3ZY-GP

AD+

12

EC131

SCD1U50V3ZY-GP

Layout Trace 300mil

U5

S

1

S

2

S

3

GD

4 5

P2003EVG-GP

2nd:A04433(84.04433.A37)

NEAR INPUT AD+

12

C32

C373

SC10U25V0KX-3GP

SCD1U25V3KX-GP

CHG_PWR

R204

R204 D01R2512F-4-GP

D01R2512F-4-GP

1 2

G46

Title

Size Document Number Rev

Custom

Date: Sheet

Layout Trace 300mil

1 2

G45

GAP-CLOSE-PWR-3-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

CHARGER MAX8731

DS2-Intel

12

C336

SC10U25V0KX-3GP

GAP-CLOSE-PWR-3-GP

39 47Wednesday, September 12, 2007

E

C335

of

BT+

C13

12

SC10U25V0KX-3GP

SC10U25V6KX-1GP

DY

-1

A

DCBATOUT

4 4

3 3

+VCC_TPS51120

2 2

DCBATOUT_TPS51120

G38

1 2

GAP-CLOSE-PWR

G33

1 2

GAP-CLOSE-PWR

G34

1 2

GAP-CLOSE-PWR

G35

1 2

GAP-CLOSE-PWR

G37

1 2

GAP-CLOSE-PWR

G36

1 2

GAP-CLOSE-PWR

SC:08/13 Change R129 from

63.R0034.1DL to ZZ.R0402.ZZZ

PM_SLP_S4#21,28,34,44,45

3V/5V_EN46

R138 0R2J-2-GP

R138 0R2J-2-GP R136 0R2J-2-GP

+VCC_TPS51120

1 2

C572 SC1KP50V2KX-1GPC572 SC1KP50V2KX-1GP

1 2

R389 12K1R2F-L1-GPR389 12K1R2F-L1-GP

1 2

R405 11K3R2F-2-GPR405 11K3R2F-2-GP

1 2

C591 SC1KP50V2KX-1GPC591 SC1KP50V2KX-1GP

R136 0R2J-2-GP

51120_CS1 51120_CS2

51120_GND

TP76TPAD30 TP76TPAD30

RUN_ON

51120_LL2

51120_LL1 51120_VBST1_1

1 2

DY

1 2

DY

12

DY

S

2 3

5V_AUX_S5

1 2

C594

SCD1U50V3KX-GP

1 2

C569

SCD1U50V3KX-GP

3D3V_AUX_S5

C249

SC10U10V5KX-2GP

DY

R133

1 2

0R2J-2-GP

R129

1 2

0R0402-PAD

DY

12

C237

C245

51120_GND

SCD1U10V2KX-4GP

TI suggest R<=15Kohm

+VCC_TPS51120

Q13

200KR2F-L-GP

2N7002PT-U

D

1

G

1 2

R402 5D1R3J-GPR402 5D1R3J-GP

51120_VBST2_1 51120_VBST2

12

SC1KP50V2KX-1GP

R381

12

51120_EN1

51120_VFB2 51120_VFB1

+5V_ALWP +3.3V_ALWP

51120_VREF2

C243

12

DY

R126

1 2

DY

1 2

R410 0R3-0-U-GPR410 0R3-0-U-GP

1 2

R388 0R3-0-U-GPR388 0R3-0-U-GP

12

S

DY

0R2J-2-GP

C250

SC10U10V5KX-2GP

29

EN1

12

EN2

10

EN3

9

EN5

6

VFB2

3

VFB1

1

VO1

8

VO2

4

VREF2

Q32

2 3

1

G

B

+VCC_TPS51120

12

51120_VBST1

13

28

19

21

VBST1

VREG3

VREG5

GND

PGND217CS2

PGND1

GND

5

24

33

51120_GND

TP0610T-T1-E3-GP

1 2

D

0R2J-2-GP

C585

SC1U10V3KX-3GP

DCBATOUT_TPS51120

12

+VCC_TPS51120

7

20

22

VIN

VBST2

V5FILT

COMP2

CS1

SKIPSEL

18

23

32

51120_SKIPSEL

R125

DY

C577

C577 SCD1U50V3KX-GP

SCD1U50V3KX-GP

U56

2

TPS51120RHBR-GPU1

COMP1

15

LL2

26

LL1

30

PGOOD1

11

PGOOD2

25

DRVL1

16

DRVL2

27

DRVH1

14

DRVH2

TONSEL

31

51120_TONSEL

R135 0R0402-PADR135 0R0402-PAD

R390 0R2J-2-GP

R134 0R2J-2-GP

DY

1 2

R132 0R2J-2-GP

DY

1 2

R131 0R2J-2-GP

1 2

R130 0R0402-PADR130 0R0402-PAD

3D3V_S0

51120_LL2 51120_LL1

51120_DRVL1 51120_DRVL2

51120_DRVH1 51120_DRVH2

SC:08/13 Change R135 from

63.R0034.1DL to ZZ.R0402.ZZZ

1 2

51120_VREF2

DY

51120_VREF2

+VCC_TPS51120

51120_GND

SC:08/13 Change R130 from

63.R0034.1DL to ZZ.R0402.ZZZ

C

12

R143

R143 100KR2J-1-GP

100KR2J-1-GP

+VCC_TPS51120

51120_GND

DCBATOUT_TPS51120

51120_DRVH1 51120_LL1

U26

AO4712-GP

51120_DRVL1

CPUCORE_ON 41,43,44,45

51120_DRVH2 51120_LL2

51120_DRVL2

1 2

G63

G63 GAP-CLOSE-PWR

GAP-CLOSE-PWR

51120_GND

678

DDD

SI4800BDY-T1

SI4800BDY-T1 U28

U28

SSS

GD

SSS

GD

123

4 5

IND-3D3UH-57GP

12

678

DDD

R384

2D2R5F-2-GP

SSS

GD

SSS

GD

123

4 5

12

C570

SC330P50V3KX-GP

DCBATOUT_TPS51120

678

DDD

GD

4 5

678

DDD

U32

AO4712-GP

GD

4 5

L6

1 2

DY

51120_VFB151120_VFB1

DY

SI4800BDY-T1

SI4800BDY-T1 U29

U29

SSS

123

12

R396

2D2R5F-2-GP

SSS

123

12

C575

SC330P50V3KX-GP

D

12

DY

12

30KR3F-GP

7K5R2F-1-GP

IND-3D3UH-57GP

DY

C556

C223

SC10U25V6KX-1GP

12

R392

12

R391

51120_GND

12

C582

SC10U25V6KX-1GP

L7

1 2

R404

30K9R3F-GP

51120_VFB2

R401

13K3R3F-GP

51120_GND

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 3.3UH CYNTEC 11Arms 14.5Apeak O/P cap: 220U6.3V 6TPE220M 25mOhm 2.4Arms/ 77.22271.17L H/S: AO4468 SO-8/ 30mOhm/ 4.5Vgs L/S: AO4712 SO-8/ 7.3mOhm/ 4.5Vgs

DY

12

C225

C559

SC2200P50V2KX-2GP

SCD1U50V3KX-GP

SA:04/23 Change C746 to DUMMY for power team request

+5V_ALWP

12

1 2

C581

SC18P50V2JN-1-GP

12

C252

SC10U25V6KX-1GP

SA:04/23 Change C733 to DUMMY for power team request

12

C248SC18P-GP C248SC18P-GP

12

C218

SCD1U10V2KX-4GP

DY

12

C587

C257

SC2200P50V2KX-2GP

SCD1U50V3KX-GP

12

C586

SCD1U10V2KX-4GP

TC4

TC4 ST220U6D3VDM-13GP

ST220U6D3VDM-13GP

+3.3V_ALWP

12

TC20

TC20 ST220U6D3VDM-13GP

ST220U6D3VDM-13GP

E

Iout =6A OCP < 12A

+5V_ALWP

G28

1 2

G30

1 2

G31

1 2

G32

1 2

G27

1 2

G29

1 2

5V_S5

GAP-CLOSE-PWR

Iout = 5A OCP < 10A

+3.3V_ALWP 3D3V_S5

G39

1 2

GAP-CLOSE-PWR

G44

1 2

GAP-CLOSE-PWR

G42

1 2

GAP-CLOSE-PWR

G41

1 2

GAP-CLOSE-PWR

G43

1 2

GAP-CLOSE-PWR

G40

1 2

GAP-CLOSE-PWR

Vout=1V*(R1+R2)/R2

SKIPSEL

COMP

1 1

TONSEL

VFB1 5V

VFB2

EN1,EN2 EN3,EN5 not use VREG3 on

GND

AUTOSKIP

N/A

380k/CH1

N/A

Switcher OFF

LDO OFF

A

VREF2

AUTOSKIP /FAULTS OFF

N/A

280k/CH1 430k/CH2 not use

not use

FLOAT

PWM

CURRENT

MODE 220k/CH1 330k/CH2580k/CH2

ADJ.

Swithchr ON

LDO ON

V5FILT

PWM

D-Cap MODE 180k/CH1 2870k/CH2

Fixed Output

3.3V Fixed Output Switcher ON

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Custom Date: Sheet

Date: Sheet

B

C

D

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

DC to DC 3.3V & 5V

DS2-Intel

E

-1

of

40 47Wednesday, September 12, 2007

5

SB:06/17 Remove R205,C348,TP86 power monitor circuit.

D D

PSI#6

Place close to phase 1 chocke

CPU_PROCHOT#5

6262_AGND

470K /0402 size

C C

B B

If NTC=330Kohm, R10=8.66K

CPU_VID3

4 5

CPU_VID2

3

CPU_VID1

2

CPU_VID0

CPU_VID[0..6]6

1

1 2 3

CPU_VID6 6262_VID6

1 2

R197

12

R185

4K02R3F-GP

C11 SCD01U16V2KX-3GPC11 SCD01U16V2KX-3GP

1 2

SB:06/17 Change R12,R16,R17 R198 from 0402 0 Ohm to 0402 close pad.

6262_VID3 6262_VID2

6

6262_VID1

7

6262_VID0

8

SRN0J-5-GP

SRN0J-5-GP RN4

RN4

SRN0J-6-GP

RN5

6262_VID4CPU_VID4

4

6262_VID5CPU_VID5

0R2J-2-GP

SC:08/13 Change R28 from

63.00000.00L to ZZ.R0603.ZZZ

SC:08/13 Change R27 from

63.00000.00L to ZZ.R0603.ZZZ

NTC-470K-1-GP

R184

1 2

CPUCORE_ON40,43,44,45

6262_AGND

DPRSLPVR8,21

H_DPRSTP#6,8,20

VSS_SENSE6

VCC_SENSE6

When test without cpu,

4

1 2

R12 0R0402-PADR12 0R0402-PAD

TP86TPAD30 TP86TPAD30

6262_AGND

R198

R16 0R0402-PADR16 0R0402-PAD

CLK_EN#21

1 2

97K6R2F-GP

SC220P50V2KX-3GP

R17 0R0402-PADR17 0R0402-PAD

R211

1 2

1KR2F-3-GP

R212

R212 255R2F-L-GP

255R2F-L-GP

R208

C351

1 2

SCD01U25V2KX-3GP

C367

SC1U10V3KX-3GP

1 2

R15 147KR2F-GPR15 147KR2F-GP

1 2

C19 SCD015U25V3KX-GPC19 SCD015U25V3KX-GP

1 2

1 2 1 2

C360

1 2

12

SC1KP50V2KX-1GP

1 2

C357

R28 0R0603-PADR28 0R0603-PAD

1 2

R27 0R0603-PADR27 0R0603-PAD

CPUVCORE_ON_R

0R0402-PAD

6262_DPRSTP#

R213

1 2

1KR2F-3-GP

SC470P50V2KX-3GP

1 2

R209 6K81R2F-1-GPR209 6K81R2F-1-GP

C355

1 2

SC1KP50V2KX-1GP

1 2

C369

5V_S0 3D3V_S0

12

R25

R25 10R3J-3-GP

10R3J-3-GP

6262_VCC

12

6262_AGND

6262_PSI# 6262_PMON 6262_RBIAS

6262_NTC 6262_SOFT

6262_VID0 6262_VID1 6262_VID2 6262_VID3 6262_VID4 6262_VID5 6262_VID6

6262_DPRSLP

6262_VDIFF

6262_FB2

6262_FB

6262_COMP

6262_VW

12

C363

C363 SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

12

C364

SCD01U25V2KX-3GP

DCBATOUT

12

R30

R30 10R3J-3-GP

10R3J-3-GP

6262_VIN

12

C366

SCD01U25V2KX-3GP

6262_AGND

20

22

VIN

VDD

21

GND

49

GND_T

2

PSI#

3

PMON

4

RBIAS

5

VR_TT#

6

NTC

7

SOFT

37

VID0

38

VID1

39

VID2

40

VID3

41

VID4

42

VID5

43

VID6

44

VR_ON

45

DPRSLPVR

46

DPRSTP#

47

CLK_EN#

13

VDIFF

ISL6262ACRZ-T-GP-U

12

FB2

U43

FB

COMP

VW

RTN15VSEN14DROOP16DFB

6262_RTN

U43

6262_VSEN

11

10

9

6262_3V3

SCD01U25V2KX-3GP

1 2

6262_DROOP

1 2

3

R202

10R3J-3-GP

12

R203

R203 1K91R2F-1-GP

1K91R2F-1-GP

C9

1

48

3V3

PGOOD

35

UGATE1

BOOT1

PHASE1

LGATE1

PGND1

ISEN1

PVCC

UGATE2

BOOT2

PHASE2

LGATE2

PGND2

ISEN2

NC#25

OCSET8

VSUM

17

6262_DFB

R29

3K6R2F-GP

1 2

C28 SC180P50V2JN-1GPC28 SC180P50V2JN-1GP

6262_BOOT1

36

34 32 33 24

31

27

6262_BOOT2

26

28 30 29

6262_ISEN2

23

25

6262_OCSET

8

6262_VSUM

19

6262_VO

18

VO

SB:06/23 Change R29 from 64.32415.55L to 64.36015.6DL

6262_VO

VGATE_PWRGD 8,21

1 2

0R3-0-U-GP

R200

6262_ISEN1

C350 SC4D7U6D3V3KX-GPC350 SC4D7U6D3V3KX-GP

1 2

R210 0R3-0-U-GPR210 0R3-0-U-GP

6262_AGND

12

C368

SB:06/23 Change C372 from

78.47323.2FL to 78.68323.5FL

12

1 2

SCD22U10V2KX-1GP

R33

R33 1KR3F-GP

1KR3F-GP

1

2

5V_S0

1

2

R20

1 2

11K3R2F-2-GP

12

C372

C372 SCD068U10V2KX-1GP

SCD068U10V2KX-1GP

6262_AGND

2

6262_UGATE1 42

C345

SCD22U25V3KX-GP

6262_PHASE1 42 6262_LGATE1 42

SCD22U10V3KX-2GP

6262_UGATE2 42

C356

SCD22U25V3KX-GP

6262_PHASE2 42 6262_LGATE2 42

SB:06/22 Change R20 from

64.12725.6DL to

64.11325.6DL

12

R215

R215 11KR2F-L-GP

11KR2F-L-GP

12

R218

R218 2K61R3F-GP

2K61R3F-GP

12

R183

R183 NTC-10K-9-GP

NTC-10K-9-GP

Place close to phase 1 chocke

12

C365

C365 SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

1

3K65R3F-GP

6262_VSUM

1 2

12

C362

6262_ISEN2

6262_VSUM

12

C370

SCD22U10V3KX-2GP

6262_ISEN1

10KR3F-L-GP

1 2

R34 1R3F-GPR34 1R3F-GP

1 2

10KR3F-L-GP

1 2

10KR3F-L-GP

3K65R3F-GP

R26

R26 R24

R24

R35

1 2

10KR3F-L-GP

10KR3F-L-GP R219 3K65R3F-GPR219 3K65R3F-GP

1 2

R217

R216

1R3F-GP

R214

G47

1 2

GAP-CLOSE-PWR

6262_ISENP1 42

6262_ISENN1 42

6262_ISENP2 42

6262_ISENN2 42

6262_AGND

R483 & R486 change to 0 ohms

6262_AGND

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

DC-DC VCCCPUCORE 1/2

DS2-Intel

41 47Wednesday, September 12, 2007

of

1

of

-1

5

DCBATOUT

678

DDD

D D

Id=13A Qg=10~14nC Rdson=9.4~12mohm

6262_UGATE141 6262_PHASE141 6262_LGATE141

Id=14.5A Qg=25~35nC

C C

Rdson=5.9~7.25mohm

POWERPAK-8P-GP

POWERPAK-8P-1-GP

U2

DY

U40

DDD

4 5

678

DDD

4 5

DCBATOUT

POWERPAK-8P-GP

SSGD

S

SSGD

S

123

POWERPAK-8P-1-GP

SSGD

S

SSGD

S

123

4

SC:08/09 Add EC146,EC147 (78.10492.4BL) for EMI request . Please place EC146 near C352, EC147 near U1

EC146

SCD1U50V3ZY-GP

12

GAP-CLOSE-PWR-3-GP

1 2

12

C353

1 2

IND-D36UH-9-GP

G2

C22

Panasonic ETQP4LR36WFC

SC10U25V6KX-1GP

10*11.5*4mm

0.34uH / 24A DCR=1.1mohm

L13

12

EC147

678

DDD

U41

SSGD

S

SSGD

S

SCD1U50V3ZY-GP

123

4 5

-1:0912-1:0912

678

DDD

U1

4 5

12

R8

R8 2D2R5F-2-GP

2D2R5F-2-GP

DY

12

SSGD

S

SSGD

S

123

DY

C6

C6 SC330P50V3KX-GP

SC330P50V3KX-GP

3

12

C352

SC10U25V6KX-1GP

G1

GAP-CLOSE-PWR-3-GP

1 2

6262_ISENN1 41 6262_ISENP1 41

2

DCBATOUT

12

EC120

EC121

SCD1U50V3ZY-GP

12

C40

C40 SCD1U50V3ZY-GP

SCD1U50V3ZY-GP

DY

C21

DY

12

TC7

SE100U25VM-14GP

SCD1U25V3KX-GP

SE100U25VM-14GP

12

TC10

TC12

ST330U2D5VDM-9GP

TC10

ST330U2D5VDM-9GP

PANASONIC 330uF / 2V / V size ESR=6mohm / Iripple=3.7A

Iomax=47A

VCC_CORE_S0

12

TC9

12

ST330U2D5VDM-9GP

DY

TC1

ST330U2D5VDM-9GP

12

EC122

SCD1U50V3ZY-GP

12

EC123

EC124

SCD1U50V3ZY-GP

SB:06/26 Add EC120~EC127(78.10494.4BL),total 8 pcs CAP for EMI team request.

SCD1U50V3ZY-GP

12

EC125

1

12

EC126

EC127

SCD1U50V3ZY-GP

EC127

SCD1U50V3ZY-GP

12

678

DDD

U4

POWERPAK-8P-GP

Id=13A Qg=10~14nC Rdson=9.4~12mohm

B B

A A

6262_UGATE241 6262_PHASE241 6262_LGATE241

Id=14.5A Qg=25~35nC Rdson=5.9~7.25mohm

5

POWERPAK-8P-1-GP

U4

DY

4 5

POWERPAK-8P-GP

SSGD

S

SSGD

S

123

-1:0912-1:0912

678

DDD

U44

SSGD

123

4 5

POWERPAK-8P-1-GP

S

4

U42

678

DDD

SSGD

S

SSGD

S

123

4 5

12

R31

R31 2D2R5F-2-GP

2D2R5F-2-GP

DY

DDD

DY

12

C31

SSGD

S

SSGD

S

123

C31

DY

SC330P50V3KX-GP

SA: 04/11 Add depend on PW team

6262_ISENP241 6262_ISENN241

678

U6

4 5

12

C340

SC10U25V6KX-1GP

1 2

IND-D36UH-9-GP

G4

GAP-CLOSE-PWR-3-GP

1 2

C343

L15

12

SC10U25V6KX-1GP

3

12

C339

DY

SC10U25V6KX-1GP

Panasonic ETQP4LR36WFC 10*11.5*4mm

0.34uH / 24A DCR=1.1mohm

G3

GAP-CLOSE-PWR-3-GP

1 2

12

C338

C344

SCD1U25V3KX-GP

SC10U25V6KX-1GP

SCD1U25V3KX-GP

DY

12

TC11

If VCC_SENSE and VSS_SENSE pins have pulled resistors to VCC_CORE_S0 ==> Remove R44/R45/R46/R47.

12

TC2

ST330U2D5VDM-9GP

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

DC-DC VCCCPUCORE 2/2

DS2-Intel

42 47Wednesday, September 12, 2007

of

1

of

-1

5

DCBATOUT +1.05V_PWR_SRC

G23

1 2

G22

D D

5V_S5

12

R293

3D3R3J-L-GP

12

C159

SC1U10V3KX-3GP

5V_S5

D10

D10 CH551H-30PT-GP

C C

CH551H-30PT-GP

2 1

PM_SLP_S3#21,28,34,45,46

SB:06/17 Change R284 from 0402 1K Ohm to 0402 close pad.

3D3R3J-L-GP

+1.05V_V5FILT

12

C138

C138 SC1U10V3KX-3GP

SC1U10V3KX-3GP

1 2

R284 0R0402-PADR284 0R0402-PAD

R286 200KR2J-L1-GPR286 200KR2J-L1-GP

12

U17

4

V5FILT

10

+1.05V_VBST

+1.05V_VFB

+1.05V_EN

+1.05V_TON

+1.05V_TRIP +1.05V_VFB

12

R76

R76 17K4R3F-GP

17K4R3F-GP

V5DRV

14

VBST

5

VFB

1

EN_PSV

2

TON

11

TRIP

TPS51117PWR-GP

SB:06/22 Change R76 from

64.12125.55L to 64.17425.55L

1 2

G21

1 2

G20

1 2

G25

1 2

G24

1 2

R289 0R3-0-U-GPR289 0R3-0-U-GP

DRVH

DRVL VOUT

PGOOD

PGND

4

GAP-CLOSE-PWR

+1.05V__LL1

12

13 12

LL

9 3 6

7

GND

8

C463 SCD1U16V2KX-3GPC463 SCD1U16V2KX-3GP

+1.05V_DRVH +1.05V_LL +1.05V_DRVL

1.05V_SUS_PWRGD

DY

100KR2J-1-GP

12

+1.05V_SUSP

R78

1 2

C146

SC10U25V6KX-1GP

CPUCORE_ON 40,41,44,45

3D3V_S0

C146

SB: 06/27 Change U15 from

84.08880.037 to

84.04800.D37

SB: 06/27 Change U18 from

84.06676.A37 to

84.04800.D37

12

SCD1U50V3KX-GP

3

C147

SI4800BDY-T1

AO4712-GP

+1.05V_PWR_SRC

12

678

DDD

U15

GD

4 5

678

DDD

U18

GD

4 5

SSS

123

SSS

123

12

C461

SC2200P50V2KX-2GP

DY

Cyntec 10*10 Irating=14A, Isat=16A DCR=7mohm

1 2

COIL-2D2UH-11-GP

12

R302

2D2R5F-2-GP

DY

12

C475

DY

SC330P50V3KX-GP

SB: 06/27 Change L22 from 68.2R210.20C to

84.04800.D37

L22

R290

12KR2F-L-GP

R296

30KR2F-GP

2

Iout = 10A OCP>20A

C460

SC10U25V6KX-1GP

1 2

+1.05V_SUSP

12

DY

12

C448

SCD1U10V2KX-4GP

12

TC16

TC16 SE220U2D5VDM-6GP

SE220U2D5VDM-6GP

C467

SC18P50V2JN-1-GP

Vout=0.75V*(R1+R2)/R2

+1.05V_SUSP

G58

1 2

GAP-CLOSE-PWR

G59

1 2

GAP-CLOSE-PWR

G57

1 2

GAP-CLOSE-PWR

G61

1 2

GAP-CLOSE-PWR

G60

1 2

GAP-CLOSE-PWR

G53

1 2

GAP-CLOSE-PWR

G54

1 2

GAP-CLOSE-PWR

G52

1 2

GAP-CLOSE-PWR

G56

1 2

GAP-CLOSE-PWR

G55

1 2

GAP-CLOSE-PWR

1

1D05V_S0

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 1.5UH M MPL73-1R5 Delta 9Arms 18Apeak / 68.1R510.10I O/P cap: 220U 4V 4TPE220MF 15mOhm 3.1Arms/ 77.22271.161 H/S & L/S: FDS8884 SO-8/ 30mOhm/ 4.5Vgs/ 84.08884.037

B B

A A

5

4

L/S: FDS8896 SO-8/ 7.3mOhm/ 4.5Vgs/ 84.08896.037 Ton = 200KOhm --> 330KHz

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet of

DCDC 1.05V

DS2-Intel

-1

43 47Wednesday, September 12, 2007

of

1

of

-1

5

DCBATOUT +1.8V_PWR_SRC

G13

1 2

GAP-CLOSE-PWR

G12

1 2

GAP-CLOSE-PWR

G11

+1.8V_VBST

+1.8V_TRIP

12

R243

R243 9K31R3F-GP

9K31R3F-GP

1 2

GAP-CLOSE-PWR

G10

1 2

GAP-CLOSE-PWR

G65

1 2

GAP-CLOSE-PWR

R252 0R3-0-U-GPR252 0R3-0-U-GP

U10

4

V5FILT

10

V5DRV

14

VBST

5

VFB

1

EN_PSV

2

TON

11

TRIP

SB:06/17 Change R253 from 0402 1K Ohm to 0402 close pad.

TPS51117PWR-GP

SB:06/22 Change R243 from

64.12125.55L to

64.17425.55L

D D

5V_S5

12

R244

3D3R3J-L-GP

12

C52

SC1U10V3KX-3GP

5V_S5

D9

D9 CH551H-30PT-GP

CH551H-30PT-GP

2 1

C C

PM_SLP_S4#21,28,34,40,45

SB:06/17 Change R253 from 0402 1K Ohm to 0402 close pad.

+1.8V_V5FILT

12

C53

C53 SC1U10V3KX-3GP

SC1U10V3KX-3GP

+1.8V_VFB

12

+1.8V_EN +1.8V_TON

1 2

R253 0R0402-PADR253 0R0402-PAD

R251 200KR2J-L1-GPR251 200KR2J-L1-GP

DRVH

DRVL VOUT

PGOOD

GND

PGND

4

3

2

1

Iout=7A OCP<14A

+1.8V_SUSP

1 2

+1.8V_PWR_SRC

12

C59

SC10U25V6KX-1GP

+1.8V_LL1

12

+1.8V_DRVH

13

+1.8V_LL

12

LL

+1.8V_DRVL

9 3 6

7 8

12

C405 SCD1U16V2KX-3GPC405 SCD1U16V2KX-3GP

+1.8V_SUSP

CPUCORE_ON 40,41,43,45

C59

SB: 06/27 Change U13 from

84.04800.D37 to 84.08880.037

SB: 06/27 Change U12 from

84.04712.037 to 84.06676.A37

SCD1U50V3KX-GP

I/P cap: 10U 25V K1206 X5R/ 78.10622.52L Inductor: 1.5UH M MPL73-1R5 Delta 9Arms 18Apeak / 68.1R510.10I O/P cap: 220U 4V 4TPE220MF 15mOhm 3.1Arms/ 77.22271.161 H/S & L/S: FDS8884 SO-8/ 30mOhm/ 4.5Vgs/ 84.08884.037 L/S: FDS8896 SO-8/ 7.3mOhm/ 4.5Vgs/ 84.08896.037 Ton = 200KOhm --> 330KHz

12

C65

U13

FDS8880-NL-GP

U12

FDS6676AS-GP

12

C418

DY

SC2200P50V2KX-2GP

678

DDD

SSS

GD

SSS

GD

123

4 5

678

DDD

GD

123

4 5

Cyntec 10*10 Irating=14A, Isat=16A DCR=7mohm

L18

1 2

IND-2D2UH-46-GP-U

12

R51

2D2R5F-2-GP

SSS

12

C80

SC330P50V3KX-GP

SC:08/13 Change R51(64.2R205.16L) and C80(78.33124.2BL) from No ASM to ASM

R242

42K2R2F-L-GP

+1.8V_VFB

R232

30KR2F-GP

12

C420

SC10U25V6KX-1GP

1 2

+1.8V_SUSP

12

C400

SC33P50V2JN-3GP

12

C431

SCD1U10V2KX-4GP

TC3

TC3 SE220U2D5VDM-6GP

SE220U2D5VDM-6GP

Vout=0.75V*(R1+R2)/R2

1 2

1D8V_S3

G18

GAP-CLOSE-PWR

G14

GAP-CLOSE-PWR

G17

GAP-CLOSE-PWR

G15

GAP-CLOSE-PWR

G19

GAP-CLOSE-PWR

G16

GAP-CLOSE-PWR

G66

GAP-CLOSE-PWR

G67

GAP-CLOSE-PWR

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

DC/DC 1D8V

DS2-Intel

1

44 47Wednesday, September 12, 2007

-1

A

1D5V_SB

4 4

3 3

SB:06/17 Change R315 from 0402 0 Ohm to 0402 close pad.

CPUCORE_ON40,41,43,44

PM_SLP_S3#21,28,34,43,46

1 2

R315 0R0402-PADR315 0R0402-PAD

Vo=0.8*(1+(R1/R2))

12

C498

C498 SC1U10V3ZY-6GP

SC1U10V3ZY-6GP

U53

7

POK

8

EN

APL5912-KAC-GP

6

1

VCNTL

GND

VOUT VOUT

VIN VIN

FB

SO-8-P

B

1D8V_S35V_S0

12

C500

C500 SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

12

C501

C501 SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

DY

1D5V/3A

TC18

ST100U4VBM-L1-GP

1D5V_S0

DY

12

TC19

TC19 ST100U4VBM-L1-GP

ST100U4VBM-L1-GP

5 9

3 4

2

12

1KR2F-3-GP

R320

12

R317

1K13R2F-1-GP

12

C502

12

SCD01U16V2KX-3GP

KEMET 100uF, 4V, B2 Size Iripple=1.1A, ESR=70mohm

C

3D3V_S0 2D5V_S0

U51

VOUT

VIN

GND

C458

SCD1U10V2KX-4GP

C458

3

12

G9131-25T73UF-GP

D

E

2D5V/300mA

2 1

C465

C465 SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

1 2

-1:0909

SSID = PWR.Plane.Regulator_0.9V

1D8V_S3

G9

TPS51100_LDOIN

12

SB:06/17 Change R256,R257 from 0402 0

2 2

1 1

Ohm to 0402 close pad.

PM_SLP_S4#21,28,34,40,44 PM_SLP_S3#21,28,34,43,46

R257 0R0402-PADR257 0R0402-PAD R256 0R0402-PADR256 0R0402-PAD

A

1 2 1 2

DDR_VREF_S3

SCD1U10V2KX-4GP

5V_S5

DDR_ON_0.9V

0.9V_DDR_VTT_ON_R

12

C414

10

VIN

9

S5

8

GND

7

S3

6

VTTREF

12

C55

SC10U4V3MX-GP

VDDQSNS

VLDOIN

VTT

PGND

VTTSNS

GND

TPS51100DGQ-1-GP

11

74.51110.B79

B

C54

SCD1U10V2KX-4GP

1 2 3 4 5

U11

G9

1 2

GAP-CLOSE-PWR

12

C412

SC10U4V3MX-GP

+0.9V_P

12

0.9 Volt +/- 5% Design Current: 1.05A Peak current 1.5A

G8

1 2

G6

1 2

G7

1 2

C413

G5

1 2

SC10U4V3MX-GP

DDR_VREF_S0

GAP-CLOSE-PWR

C

12

C145

SC10U10V5ZY-1GP

SB:06/17 Change R275 from 0402 0 Ohm to 0402 close pad.

DY

PM_SLP_S3#21,28,34,43,46

CPUCORE_ON40,41,43,44

SC10U10V5ZY-1GP

5V_S01D8V_S3

12

C449

1 2

R275 0R0402-PADR275 0R0402-PAD

12

SC1U10V3ZY-6GP

D

C450

9

U14

GND

VOUT

ADJ

GND

5 6 7 8

VDD4NC#5

3

VIN

2

EN

1

PGOOD

RT9018A-25PSP-GP

SO-8-P

Vo=0.8*(1+(R1/R2))

Title

Size Document Number Rev

A3

Date: Sheet

SA:04/23 Change TC24,TC33 P/N for power team request.

1D25V/2A

1D25V_S0

DY

12

TC13

R270

R270 1K13R2F-1-GP

1K13R2F-1-GP

R274

R274 2KR2F-3-GP

2KR2F-3-GP

KEMET 100uF, 4V, B2 Size Iripple=1.1A, ESR=70mohm

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DC/DC 1D8V

DS2-Intel

C436

E

TC13

SCD01U16V2KX-3GP

45 47Wednesday, September 12, 2007

DY

12

TC14

ST100U4VBM-L1-GP

of

-1

Run Power

DCBATOUT

1 2

10KR2J-3-GP

R113

R115 330KR2J-L1-GPR115 330KR2J-L1-GP

NDS0610-NL-GP

12

-1:0909

PM_SLP_S3#21,28,34,43,45

Z_12V

84.S0610.B31

Z_12V_G3

100KR2J-1-GP

1

G

Q11

S D

G

12

R114

Z_12V_D3

G

D

2 3

S

DY

D

DY

1

Q10

Q10 2N7002PT-U

2N7002PT-U

12

R109

R109 10KR2J-3-GP

10KR2J-3-GP

Z_12V_D4

2 3

S

RUN_POWER_ON

C206

SCD1U25V3KX-GP

Q9

Q9 2N7002PT-U

2N7002PT-U

H_THERMTRIP# 5,8,20,34

DY

R328

H_PWRGOOD6,20

3V/5V_EN40

12

5V_S0

U23

S

3D3V_S0

R307

1 2

10KR2J-3-GP

1

S

2

S

3

GD

4 5

AO4468-GP

84.04468.037

U30

S

1

S

2

S

3

GD

4 5

AO4468-GP

84.04468.037

1D8V_S3 1D8V_S0

12

DY

C207

1 2

SCD1U25V3KX-GP

12

R108

100KR2J-1-GP

D17

D17 BZX384-C9V1-GP

BZX384-C9V1-GP

83.9R103.B3F

A K

1 2

1KR2J-1-GP

R325

200KR2J-L1-GP

5V_S5

D

8

D

7

D

6

3D3V_S5

D

8

D

7

D

6

1

2

3 4

FDC655BN-GP

C483

C483 SCD01U25V2KX-3GP

SCD01U25V2KX-3GP

DY

H_PWRGD_R

C511

DY

SCD1U10V2KX-4GP

2

D27

BAS16-1-GP

Q29

3

1

1 2

R324 1KR2J-1-GPR324 1KR2J-1-GP

6

5

SA:0329 Add for SiI1392 1.8V_S0

12

B

E

Q31

CHT2222APT-GP

C

DY

PURE_HW_SHUTDOWN# 34,36

S5_ENABLE 34

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet of

Date: Sheet of

Date: Sheet

PWRPLANE&RESETLOGIC

DS2-Intel -1

of

46 47Wednesday, September 12, 2007

A

3D3V_AUX_S5 3D3V_S5

DY

12

EC56

DY

12

EC10

12

EC94

DY

12

EC118

12

EC162

DY

12

EC108

DY

12

EC107

DY

12

EC112

DY

12

EC105

B

5V_S5

DY

12

EC138

12

EC139

12

EC140

12

EC164

C

-1:0909

DY

EC58

AD+

D

-1:0904 Add EC187(78.10422.2BL) for DCBATOUT decoupling , this is for

DY

12

EC26

EMI request.

12

EC1

DY

12

EC187

DCBATOUT

12

EC57

-1:0909

DY

12

EC39

1D05V_S0

DY

12

EC64

DY

12

EC93

DY

12

EC74

E

DY

12

EC102

DY

12

EC106

DY

12

EC99

4 4

SCD1U25V3KX-GP

SCD1U50V3ZY-GP

DY

12

EC96

D

DY

12

EC12

SCD1U16V2ZY-2GP

3D3V_S0

DY

12

EC41

12

SCD1U50V3ZY-GP

DY

12

EC14

EC15

SCD1U16V2ZY-2GP

DY

12

EC38

EC37

SCD1U16V2ZY-2GP

DY

12

EC43

EC35

SCD1U16V2ZY-2GP

SC:08/15 Add EC177(78.10491.4FL) on 3D3V_S0 ,this is for EMI request. Default is DY

Title

Size Document Number Rev

Size Document Number Rev A3

A3

A3 Date: Sheet

Date: Sheet

DY

SCD1U16V2ZY-2GP

EC177

DY

12

EC28

SCD1U16V2ZY-2GP

12

EC13

DY

12

EC42

SCD1U16V2ZY-2GP

12

EC61

SCD1U16V2ZY-2GP

12

EC45

DY

12

EC20

DY

SCD1U16V2ZY-2GP

DY

12

EC40

SCD1U16V2ZY-2GP

SCD1U50V3ZY-GP

SC47P50V2JN-3GP

147

8

SSLVC08APWR-GP

DY

H5DYH5

DY

H13DYH13

DY

H21H21

U33C

1

SC47P50V2JN-3GP

SCD1U16V2ZY-2GP

DY

H6DYH6

H14DYH14

H22H22

SCD1U16V2ZY-2GP

3D3V_S5 3D3V_S53D3V_S5

147

1 2

SSLVC08APWR-GP

DY

H7DYH7

1

DY

H15DYH15

1

DY

H23H23

1

H8DYH8

1

DY

H16DYH16

1

DY

1

B

SC:08/11 Add EC164 on 5V_S5 for RF team Request.

U33A

3

SC:08/09 Change K5 spring from 34.45T31.001to

34.4B312.002 for ME request

K2

1

SCD1U16V2ZY-2GP

147

12 13

5V_S0

14

12 11

7

SB:06/29 Add EC134,EC135,EC136,EC137(78.10491.4FL) for EMI request

K5

1

SPRING-24-GPK2SPRING-24-GP

SPRING-51-GPK5SPRING-51-GP

SCD1U16V2ZY-2GP

147

12 13

SSLVC08APWR-GP

DY

3 3

2 2

DY

H1DYH1

1

DY

H9DYH9

1

DY

H17DYH17

1

SCD1U16V2ZY-2GP

U33D

11

H2DYH2

H10DYH10

H18H18

SCD1U16V2ZY-2GP

1

DY

1

DY

1

SC:08/11 Add EC162 on 3D3V_S5 for RF team Request.

3D3V_S53D3V_S5 3D3V_S5

9

10

H3DYH3

H4DYH4

1

DY

H11DYH11

H12DYH12

1

DY

H19H19

H20H20

1

DY

1 1

A

SC47P50V2JN-3GP

SCD1U16V2ZY-2GP

U20D

11

TSLVC08APW-1-GP

DY

13

U9D TSAHCT125PW-GPU9D TSAHCT125PW-GP

Place this spring near U40(bottom side)

K6

1

SPRING-24-GPK6SPRING-24-GP

SC:08/11 Change K7 from

34.39S07.001 to

34.41P18.001.This change is for EMI request

SCD1U50V3ZY-GP

U20C

9

10

SB:06/29 Add EC141,EC142,EC143(78.10491.4FL) for EMI request

K7

1

SPRING-35-GPK7SPRING-35-GP

C

SCD1U50V3ZY-GP

147

8

TSLVC08APW-1-GP

DY

5V_S0

DY

12

EC141

3D3V_S0

SCD1U16V2ZY-2GP

DY

12

EC134

DY

12

EC142

SCD1U16V2ZY-2GP

DY

12

EC135

SCD1U16V2ZY-2GP

5V_AUX_S5

DY

12

EC113

SCD1U50V3ZY-GP

4 5

DY

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SB:06/22 Change EC1,EC5 from DUMMY to ASM by EMI request.

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EC117

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Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

MISC

DS2-Intel -1

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EC109

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47 47Wednesday, September 12, 2007

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of

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Dell Inspiron 1525 Schematic

Specifications and Main Features

Frequently Asked Questions

User Manual