DELL D510, DM3D Schematics

Page 1
1
2
3
4
5
6
7
8
DRAM Power
DC/DC
A A
+3V_SRC +5VSUS
PG 45
CPU VR
AC/BATT
PG 42
RUN POWER SW
PG 46
POWER DC/DC
B B
DDR2-SODIMM1
CONNECTOR
BATT SELECTOR
BATT CHARGER
400/533 MHZ DDR II
1.8V, 0.9V
PG 43
1.5VSUS, 1.05V
PG 44
PG 47
PG 40
PG 41
PG 13,14
400/533 MHZ DDR II
DDR2-SODIMM2
PG 13,14
PG 19
PATA
88SA8040
PG 19
USB2.0 1 port(P0)
PATA - HDD
PG 19
Internal Media Bay
C C
CD-ROM
SATA
ATA 66/100
AC97
RJ11 to DOCK
PG 38
MDC
PG 24
Tip Ring
PG 24
AUDIO
PG 31,32
S/PDIF to DOCK
D D
PG 38
Audio Jacks
PG 34
IrDA
PG 37
1
2
TAHITI-INTEGRATED
Keyboard
PG 26
Dothan
(478 Micro-FCPGA)
PG 3,4
Alviso-GM
1257 PCBGA
PG 5,6,7,8,9
DMI interface
ICH6-M
609 BGA
PG 10,11,12
LPC
LPC
SIO(Macallan 3)
256 Pins LBGA
PG 25,26
PG 27
3
4X133MHZ
ParallelSerial
PG 28
sDVO
USB2.0 (P5,P7) USB2.0 (P4,P6)
USB2.0 (P1)
LAN (100/10) BCM4401
PG 35
USB2.0 (P2)
X-Bus
PS/2
Touchpad
PG 30
4
SI1362
PG 16
Flash
PG 29
CLOCKS
PG 15
1394 CONN
PG 22
Bluetooth
PG 30
SWTICH & LED & IO CONN
PG 32
5
SYSTEM RESET CKT
LVDS
DVI
TVOUT
VGA
2 Rear Ports 2 right Side
33MHz PCI
CARDBUS
PCI4515 PG 21
PG 39
PG 32 PG 32
E-Switch
PI3L110Q
DOCK LPC
FAN & THERMAL
PG 31
PG 36
6
Panel Connector
PG 17
S-Video
PG 18
CRT
PG 18
PCMCIA CON.
PG 21
MINI-PCI
Wireless LAN
I/O Board CONN
PG 32
Title
Schematic Block Diagram1
Size Document Number Rev
Tahiti 1A
Date: Sheet
星期二
PG 23
QUANTA COMPUTER
29, 2005
三月
7
DOCKING CONNECTOR
PG 38
of
149,
8
Page 2
1
Pg# Description
1
Schematic Block Diagram 1
2
Front Page
3-4
A A
B B
C C
Dothan
5-9
Alviso
10-12
ICH6
13-14
DDRII SO-DIMM(200P)
15
Clock Generator
16
SI1362
17
LCD Conn. & SSP
18
CRT & TV Conn.
19
SATA & IDE Conn.
20
PAD & Screw Hole
21
TI PIC4510
22
CB/1394 CONN
23
Mini PCI Conn.
24
MDC Conn.
25-26
SIO (LPC47N354)
27 Parallel Port 28
Serial Port
29
Flash ROM
30
Touch Pad CONN.& Bluetooth CONN
31
Switch Board Conn. & LED & IO Board
FAN & Thermal
32
33-34
Audio CODEC (STAC9751) & Phone Jack LAN Interface
35-36
37
FIR
38
MISCELLANEA
2
INDEX
3
DNI LIST
4
5
6
Power & Ground
Label Description
DC_IN+ PBATT+ PWR_SRC
VHCORE
1.05V AGTL+ POWER (1.05V) I/O
+3VRUN +3VSUS +5VALW +5VRUN +5VSUS +5VHDD +5VMOD STRB#/5V +5VRUN VDDA 1_8VSUS 1_8VRUN +3VALW 8051 POWER (3V) V1_5RUN
GND ALL PAGES DIGIT AL GROUND
Pg#
AC ADAPTER (20V) MAIN BATTERY + (10~17V) MAIN POWER (10~20V)
CPU CORE POWER (1.25/1.15V)
SLP_S3# CTRLD POWER SLP_S5# CTRLD POWER 8051 POWER (5V) SLP_S3# CTRLD POWER SLP_S5# CTRLD POWER HDD POWER (5V) MODULE POWER (5V) EXTERNAL FDD POWER (5V) FAN POWER (5V) AUDIO ANALOG POWER (5V) RESUME WELL IN ICH SLP_S3# CTRLD POWER
ALVISO POWE R Non -CPU I/O
COMBO CONN GND
7
8
Control Signal
RUNPWROK RUNPWROK
RUN_ON SUS_ON
RUN_ON SUS_ON HDDC_EN# MODC_EN# FDD/LPT# FAN_OFF/ON# RUN_ON
39 Docking Conn. 40
SYSTEM RESET/POWER GOOD
41-42
Battery Selector & Charger
43
CPU Power
44
1.8VSUS/0.9V
D D
45
1.5V/1.05V
46
D/D Power
47
RUN Power Switch
48
RUN POWER SW
1
QUANTA
Title
Size Document Number Rev
2
3
4
5
6
Date: Sheet
Index, DNI, Power & Ground
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
249,
8
Page 3
1
HADSTB0#5 HADSTB1#5
IGNNE#10
INTR10 NMI10 STPCLK#10
CPUSLP#5,10
DPSLP#10
HREQ#05 HREQ#15 HREQ#25 HREQ#35 HREQ#45
ADS#5
HBREQ0#5
BPRI#5
BNR#5
HLOCK#5
HIT#5
HITM#5
DEFER#5
HTRDY#5
RS#05 RS#15 RS#25
A20M#10
FERR#10
SMI#10
T11 PAD T7 PAD
DBR#39
HA#[3..31]
HA#[3..31]5
A A
B B
C C
CPUPWRGD10
DPRSTP#10
G1: NC for
D D
Dothan and DPRSTP# for Yonah
THERMDA31 THERMDC31
THERMTRIP#31
1
2
HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
IERR#
BPM0# BPM1# BPM2# BPM3#
A20M# FERR# IGNNE# CPUPWRGD SMI#
TCK TDO TDI TMS TRST#
PREQ# PRDY# DBR#
STPCLK# CPUSLP# DPSLP#
THERMDA THERMDC
THERMTRIP#
CPU_PROCHOT#
2
AA3 AA2
AF4 AC4 AC7 AC3 AD3 AE4 AD2 AB4 AC6 AD5 AE2 AD6 AF3 AE1 AF1
AE5
A13 A12 C12 C11 B13 A16 A15 B10 A10
B18 A18
C17 B17
P4
U4
V3
R3
V2
W1
T4
W2
Y4 Y1
U1
Y3
U3
R2
P3 T2 P1 T1
N2
A4
N4
J3
L1
J2
K3 K4 L4
C8
B8
A9 C9 M3 H1
K1
L2 C2
D3
A3
E4
B4
A7 D1
D4 C6
A6
B7 G1
U7A
A3# A4# A5# A6# A7# A8# A9# A10# A11# A12# A13# A14# A15# A16# A17# A18# A19# A20# A21# A22# A23# A24# A25# A26# A27# A28# A29# A30# A31#
ADSTB0# ADSTB1#
REQ0# REQ1# REQ2# REQ3# REQ4#
ADS#
IERR# BREQ0#
BPRI# BNR# LOCK#
HIT# HITM# DEFER#
BPM0# BPM1# BPM2# BPM3# TRDY# RS0# RS1# RS2#
A20M# FERR# IGNNE# PWRGOOD SMI#
TCK TDO TDI TMS TRST# ITP_CLK0 ITP_CLK1 PREQ# PRDY# DBR#
LINT0 LINT1 STPCLK# SLP# DPSLP# DPRSTP#
THERMDA THERMDC
THERMTRIP# PROCHOT#
Dothan Processor
Dothan
REQUEST PHASE SIGNALS
ERROR SIGNALS
ARBITRATION PHASE SIGNALS
SNOOP PHASE SIGNALS
RESPONSE PHASE SIGNALS
PC COMPATIBILITY SIGNALS
DIAGNOSTIC & TEST SIGNALS
EXECUTION CONTROL SIGNALS
THERMAL DIODE
3
1 OF 3
3
DATA PHASE SIGNALS
D10# D11# D12# D13# D14# D15# D16# D17# D18# D19# D20# D21# D22# D23# D24# D25# D26# D27# D28# D29# D30# D31# D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47# D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#
DSTBN0# DSTBP0# DSTBN1# DSTBP1# DSTBN2# DSTBP2# DSTBN3# DSTBP3#
DINV0# DINV1# DINV2# DINV3#
DBSY# DRDY#
BCLK1 BCLK0
INIT#
RESET#
DPWR#
D0# D1# D2# D3# D4# D5# D6# D7# D8# D9#
A19 A25 A22 B21 A24 B26 A21 B20 C20 B24 D24 E24 C26 B23 E23 C25 H23 G25 L23 M26 H24 F25 G24 J23 M23 J25 L26 N24 M25 H26 N25 K25 Y26 AA24 T25 U23 V23 R24 R26 R23 AA23 U26 V24 U25 V26 Y23 AA26 Y25 AB25 AC23 AB24 AC20 AC22 AC25 AD23 AE22 AF23 AD24 AF20 AE21 AD21 AF25 AF22 AF26
C23 C22 K24 L24 W25 W24 AE24 AE25
D25 J26 T24 AD20
M2 H2
B14 B15
B5 B11 C19
4
CPUINIT# CPURST#
4
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
HD#[0..63]
HDSTBN0# 5 HDSTBP0# 5 HDSTBN1# 5 HDSTBP1# 5 HDSTBN2# 5 HDSTBP2# 5 HDSTBN3# 5 HDSTBP3# 5
HDBI0# 5 HDBI1# 5 HDBI2# 5 HDBI3# 5
DBSY# 5 DRDY# 5
HCLK_CPU# 15 HCLK_CPU 15
CPUINIT# 10 CPURST# 5 DPWR# 5
5
HD#[0..63] 5
5
6
VCCP
THERMTRIP#
IERR#
CPUPWRGD
R25 56
1 2
R30 56
1 2
R31 200
1 2
CPU_PROCHOT#
VCCP
12
R24 56
R23
*330_NC
Thermal Level Shift
ITP disable guidelines
Signal TDI TMS TRST#
TDO
Resistor Value 150 ohm +/- 5% 39 ohm +/- 5% VTT 680 ohm +/- 5% GND 27 ohm +/- 5%TCK
Open
Note: Populate All NC component when ITP connector is populated.
R236
54.9/F
TDI TMS TCK
TDO TRST#
CPURST#
TCK
HCLK_ITP#15 HCLK_ITP15
Connect To Resistor Placement
VCCP VCCP
12
12
R239
R238
39.2/F
54.9/F
1 2
R237 *22.6/F_NC
1 2
R235 *22.6/F_NC
ITP DEBUG PORT
6
TCK TRST#
+3VRUN +3VALW
R22 *1.5K_NC
1 2
Q11
12
2
*3904_NC
1 3
VTT
GND VTT
12
12
R240 150
JITP2
1
TDI
2
TMS
5
TCK
7
TDO
3
TRST#
12
RESET#
11
FBO
8
BCLKN
9
BCLKP
10
GND0
14
GND1
16
GND2
18
GND3
20
GND4
22
GND5
*ITP700_NC
Title
Size Document Number Rev
Date: Sheet
R29 27.4/F
1 2 1 2
R28 680
2
7
R34 *330_NC
1 2 31
Q12 *RHU002N06_NC
PROCHOT# 26
8
Within 2.0" of the CPU Within 2.0" of the CPU Within 2.0" of the CPU Within 2.0" of the CPU Within 2.0" of the CPU
VTT0 VTT1
VTAP
DBR# DBA#
BPM0# BPM1# BPM2# BPM3# BPM4# BPM5#
NC0 NC1
VCCP
27 28 26
25 24
BPM0#
23
BPM1#
21
BPM2#
19
BPM3#
17
PRDY#
15
PREQ#
13 4
6
C359
*.1U_10V_NC
1 2
DBR#
+3VSUS
12
QUANTA COMPUTER
Dothan Processor (HOST)
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
349,
8
R234 150
Page 4
1
2
3
4
5
6
7
8
COMP0 COMP1 COMP2 COMP3
R20
R19
R211
1 2
12
C334
10U_4V
12
C310
10U_4V
12
C278
10U_4V
C303
10U_4V
1 2
27.4/F
R212
54.9/F
1 2
12
C290
10U_4V
12
C307
10U_4V
12
C283
10U_4V
C282
10U_4V
1 2
12
C286
10U_4V
12
C329
10U_4V
12
C336
10U_4V
C305
10U_4V
1 2
12
.01U
12
C31
10U_4V
12
C335
10U_4V
C332
10U_4V
1 2
C42
27.4/F
54.9/F
1 2
C328
C280
C291
C279
12
C287
10U_4V
12
C34
10U_4V
12
C309
10U_4V
C331
10U_4V
1 2
1 2
VHCORE
VHCORE
VHCORE
A A
18mils Trace Width of COMP0,2 5mils Trace Width of COMP1,3
B B
12
10U_4V
12
10U_4V
12
C C
10U_4V
10U_4V
1 2
VHCORE
Total caps = 1670 uF > 1430 uF (Intel Recommendation) ESR = 9m ohm/4 // 5m ohm/35 ---> = 0.1343m ohm
VCCP
C43 150U/6.3V
1
12
C314 .1U_10V
12
C322 .1U_10V
12
C315 .1U_10V
2
12
C321 .1U_10V
12
C325 .1U_10V
C, mF---------ESR, mW-----------ESL, nH 1 x 150 mF-----42 mW (typ) / 2--------2.5 nH / 12 10 x 0.1 mF----16 mW (typ) / 10-------0.6 nH / 10
D D
12
+
12
10U_4V
12
C302
10U_4V
12
C26
10U_4V
C330
10U_4V
1 2
VCCP
Z0 = 55 ohm, 25 mils spacing for switching
R16
signals
1K/F
1 2
R15 2K/F
1 2
CPU_VCCA
C41
+1_5VRUN
VHCORE
12
12
C288
10U_4V
10U_4V
VHCORE
12
12
C285
10U_4V
10U_4V
VHCOREVHCORE
C289
10U_4V
10U_4V
1 2
1 2
VCCP
12
12
C313
C317
.1U_10V
.1U_10V
C284
C333
C304
3
12
C316 .1U_10V
R21 0_0603
12
C281
10U_4V
12
C308
10U_4V
C306
10U_4V
1 2
12
C323 .1U_10V
T9 PAD T47 PAD
T10 PAD T8 PAD
T2 PAD T5 PAD T6 PAD
12
12
C324 .1U_10V
COMP0 COMP1 COMP2 COMP3
GTLREF0
TEST1 TEST2
VHCORE
P25 P26 AB2 AB1
AD26
C5
F23
B2 C3
AF7
AC1
E26
AC26
N1 B1
F26
D18 D20 D22
E17 E19 E21
F18 F20 F22
G5
G21
H6
H22
J21
K22
U5 V6
V22
W5
W21
Y22 AA5 AA7
AA9 AA11 AA13 AA15 AA17 AA19 AA21
AB6
AB8 AB10 AB12 AB14 AB16 AB18 AB20 AB22
AC9 AC11 AC13 AC15 AC17 AC19
AD8 AD10 AD12 AD14 AD16 AD18
AE9 AE11 AE13 AE15 AE17 AE19
AF8 AF10 AF12 AF14 AF16 AF18
4
U7B
COMP0 COMP1 COMP2 COMP3
GTLREF0
TEST1 TEST2
NC1 RSVD2
RSVD3 RSVD4 RSVD5
VCCA3 VCCA2 VCCA1 VCCA0
D6
VCC00
D8
VCC01 VCC02 VCC03 VCC04
E5
VCC05
E7
VCC06
E9
VCC07 VCC08 VCC09 VCC10
F6
VCC11
F8
VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19
J5
VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27
Y6
VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48 VCC49 VCC50 VCC51 VCC52 VCC53 VCC54 VCC55 VCC56 VCC57 VCC58 VCC59 VCC60 VCC61 VCC62 VCC63 VCC64 VCC65 VCC66 VCC67 VCC68 VCC69 VCC70 VCC71
Dothan Processor
Dothan
2 OF 3
POWER, GROUND, RESERVED SIGNALS
VSS00 VSS01 VSS02 VSS03 VSS04 VSS05 VSS06 VSS07 VSS08 VSS09 VSS10 VSS11 VSS12 VSS13 VSS14 VSS15 VSS16 VSS17 VSS18 VSS19 VSS20 VSS21 VSS22 VSS23 VSS24 VSS25 VSS26 VSS27 VSS28 VSS29 VSS30 VSS31 VSS32 VSS33 VSS34 VSS35 VSS36 VSS37 VSS38 VSS39 VSS40 VSS41 VSS42 VSS43 VSS44 VSS45 VSS46 VSS47 VSS48 VSS49 VSS50 VSS51 VSS52 VSS53 VSS54 VSS55 VSS56 VSS57 VSS58 VSS59 VSS60 VSS61 VSS62 VSS63 VSS64 VSS65 VSS66 VSS67 VSS68 VSS69 VSS70 VSS71 VSS72 VSS73 VSS74 VSS75 VSS76 VSS77 VSS78 VSS79 VSS80 VSS81 VSS82 VSS83 VSS84 VSS85 VSS86 VSS87 VSS88 VSS89 VSS90 VSS91 VSS92 VSS93 VSS94 VSS95 VSS96 VSS97 VSS98 VSS99
5
A2 A5 A8 A11 A14 A17 A20 A23 A26 B3 B6 B9 B12 B16 B19 B22 B25 C1 C4 C7 C10 C13 C15 C18 C21 C24 D2 D5 D7 D9 D11 D13 D15 D17 D19 D21 D23 D26 E3 E6 E8 E10 E12 E14 E16 E18 E20 E22 E25 F1 F4 F5 F7 F9 F11 F13 F15 F17 F19 F21 F24 G2 G6 G22 G23 G26 H3 H5 H21 H25 J1 J4 J6 J22 J24 K2 K5 K21 K23 K26 L3 L6 L22 L25 M1 M4 M5 M21 M24 N3 N6 N22 N23 N26 P2 P5 P21 P24 R1 R4
SELPSB2_CLK6,15 SELPSB1_CLK6,15
CPU_VID042 CPU_VID142 CPU_VID242 CPU_VID342 CPU_VID442 CPU_VID542
Differential Probe Test Using
SELPSB2_CLK SELPSB1_CLK
PSI
STP_CPU#11,15,42
NO PSI (Power Saving Indicator )
DothanA
R26 Install
NC
6
SELPSB2_CLK SELPSB1_CLKCPU_VCCA
T3 PA D T4 PA D
R26
1 2 1 2
R27 0
R32 *0_NC
R33 *0_NC
1 2
DothanB
0
VCCP
BSEL0 BSEL1
12
D10
VCCP0
D12
VCCP1
D14
VCCP2
D16
VCCP3
E11
VCCP4
E13
VCCP5
E15
VCCP6
F10
VCCP7
F12
VCCP8
F14
VCCP9
F16
VCCP10
K6
VCCP11
L5
VCCP12
L21
VCCP13
M6
VCCP14
M22
VCCP15
N5
VCCP16
N21
VCCP17
P6
VCCP18
P22
VCCP19
R5
VCCP20
R21
VCCP21
T6
VCCP22
T22
VCCP23
U21
VCCP24
P23
VCCQ0
W4
VCCQ1
E2
VID0
F2
VID1
F3
VID2
G3
VID3
G4
VID4
H4
VID5
AE7
VCCSENSE
AF6
VSSSENSE
C16
BSEL0
C14
BSEL1
E1
PSI
R6
VSS100
R22
VSS101
R25
VSS102
T3
VSS103
T5
VSS104
T21
VSS105
T23
VSS106
T26
VSS107
U2
VSS108
U6
VSS109
U22
VSS110
U24
VSS111
V1
VSS112
V4
VSS113
V5
VSS114
V21
VSS115
V25
VSS116
W3
VSS117
W6
VSS118
W22
VSS119
Dothan Processor
U7C
Dothan
3 OF 3
POWER, GROUND AND NC
VID
VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172 VSS173 VSS174 VSS175 VSS176 VSS177 VSS178 VSS179 VSS180 VSS181 VSS182 VSS183 VSS184 VSS185 VSS186 VSS187 VSS188 VSS189 VSS190 VSS191
QUANTA
Title
Size Document Number Rev
Date: Sheet
Dothan Processor (POWER)
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
W23 W26 Y2 Y5 Y21 Y24 AA1 AA4 AA6 AA8 AA10 AA12 AA14 AA16 AA18 AA20 AA22 AA25 AB3 AB5 AB7 AB9 AB11 AB13 AB15 AB17 AB19 AB21 AB23 AB26 AC2 AC5 AC8 AC10 AC12 AC14 AC16 AC18 AC21 AC24 AD1 AD4 AD7 AD9 AD11 AD13 AD15 AD17 AD19 AD22 AD25 AE3 AE6 AE8 AE10 AE12 AE14 AE16 AE18 AE20 AE23 AE26 AF2 AF5 AF9 AF11 AF13 AF15 AF17 AF19 AF21 AF24
of
449,
8
Page 5
1
2
3
4
5
6
7
8
HXRCOMP
12
R50 100/F
R56 100/F
VCCP
VCCP
VCCP
VCCP
12
12
12
12
12
12
12
R44
24.9/F
R43
54.9/F
HXSCOMP
R48 221/F
HXSWING
.1U_10V
1 2
HYRCOMP
R63
24.9/F
R51
54.9/F
HYSCOMP
R53 221/F
HYSWING
.1U_10V
1 2
C72
C82
A A
B B
C C
One pulled-down resistor per pin. Trace should be 10-mil wide with 20-mil spacing.
Signal voltage level =
0.3125*VCCP. C1a=0.1 µF. C1b=0.1 µF.Trace should be 10-mil wide with 20-mil spacing..
One pulled-down resistor per pin. Trace should be 10-mil wide with 20-mil spacing.
Signal voltage level =
0.3125*VCCP. C1a=0.1 µF. C1b=0.1 µF.Trace should be 10-mil wide with 20-mil spacing..
HD#[0..63]3
HD#[0..63]
HXRCOMP HXSCOMP HXSWING HYRCOMP HYSCOMP HYSWING
HD#0 HD#1 HD#2 HD#3 HD#4 HD#5 HD#6 HD#7 HD#8 HD#9 HD#10 HD#11 HD#12 HD#13 HD#14 HD#15 HD#16 HD#17 HD#18 HD#19 HD#20 HD#21 HD#22 HD#23 HD#24 HD#25 HD#26 HD#27 HD#28 HD#29 HD#30 HD#31 HD#32 HD#33 HD#34 HD#35 HD#36 HD#37 HD#38 HD#39 HD#40 HD#41 HD#42 HD#43 HD#44 HD#45 HD#46 HD#47 HD#48 HD#49 HD#50 HD#51 HD#52 HD#53 HD#54 HD#55 HD#56 HD#57 HD#58 HD#59 HD#60 HD#61 HD#62 HD#63
E4 E1 F4 H7 E2 F1 E3 D3 K7 F2 J7 J8 H6 F3 K8 H5 H1 H2 K5 K6 J4 G3 H3 J1 L5 K4 J5 P7 L7 J3 P5 L3 U7 V6 R6 R5 P3 T8 R7 R8 U8 R4 T4 T5 R1 T3 V8 U6
W6
U3
V5 W8 W7
U2
U1
Y5
Y2
V4
Y7 W1 W3
Y3
Y6 W2
C1
C2
D1
T1
L1
P1
U11A
HD0# HD1# HD2# HD3# HD4# HD5# HD6# HD7# HD8# HD9# HD10# HD11# HD12# HD13# HD14# HD15# HD16# HD17# HD18# HD19# HD20# HD21# HD22# HD23# HD24# HD25# HD26# HD27# HD28# HD29# HD30# HD31# HD32# HD33# HD34# HD35# HD36# HD37# HD38# HD39# HD40# HD41# HD42# HD43# HD44# HD45# HD46# HD47# HD48# HD49# HD50# HD51# HD52# HD53# HD54# HD55# HD56# HD57# HD58# HD59# HD60# HD61# HD62# HD63#
HXRCOMP HXSCOMP HXSWING HYRCOMP HYSCOMP HYSWING
ALVISO
HOST
HA3# HA4# HA5# HA6# HA7# HA8#
HA9# HA10# HA11# HA12# HA13# HA14# HA15# HA16# HA17# HA18# HA19# HA20# HA21# HA22# HA23# HA24# HA25# HA26# HA27# HA28# HA29# HA30# HA31#
HADS# HADSTB0# HADSTB1#
HVREF
HBNR#
HBPRI#
BREQ0#
HCPURST#
HCLKINN HCLKINP
HDBSY#
HDEFER#
HDINV#0 HDINV#1 HDINV#2 HDINV#3 HDPWR#
HDRDY# HDSTBN0# HDSTBN1# HDSTBN2# HDSTBN3# HDSTBP0# HDSTBP1# HDSTBP2# HDSTBP3#
HEDRDY#
HHIT#
HHITM#
HLOCK#
HPCREQ#
HREQ0#
HREQ1#
HREQ2#
HREQ3#
HREQ4#
HRS0# HRS1# HRS2#
HCPUSLP#
HTRDY#
G9 C9 E9 B7 A10 F9 D8 B10 E10 G10 D9 E11 F10 G11 G13 C10 C11 D11 C12 B13 A12 F12 G12 E12 C13 B11 D13 A13 F13
F8 B9 E13 J11 A5 D5 E7 H10
AB1 AB2
C6 E6 H8 K3 T7 U5 G6 F7 G4 K1 R3 V3 G5 K2 R2 W4 F6 D4 D6 B3 A11 A7 D7 B8 C7 A8 A4 C5 B4 G8 B5
HA#[3..31] HA#3 HA#4 HA#5 HA#6 HA#7 HA#8 HA#9 HA#10 HA#11 HA#12 HA#13 HA#14 HA#15 HA#16 HA#17 HA#18 HA#19 HA#20 HA#21 HA#22 HA#23 HA#24 HA#25 HA#26 HA#27 HA#28 HA#29 HA#30 HA#31
HCPUSLP#_GMCH
HA#[3..31] 3
ADS# 3 HADSTB0# 3 HADSTB1# 3
BNR# 3 BPRI# 3 HBREQ0# 3 CPURST# 3
HCLK_MCH# 15 HCLK_MCH 15
DBSY# 3 DEFER# 3 HDBI0# 3 HDBI1# 3 HDBI2# 3 HDBI3# 3
DPWR# 3
DRDY# 3 HDSTBN0# 3 HDSTBN1# 3 HDSTBN2# 3 HDSTBN3# 3 HDSTBP0# 3 HDSTBP1# 3 HDSTBP2# 3 HDSTBP3# 3
HIT# 3 HITM# 3 HLOCK# 3
HREQ#0 3 HREQ#1 3 HREQ#2 3 HREQ#3 3 HREQ#4 3 RS#0 3 RS#1 3 RS#2 3
HTRDY# 3
VCCP
R284 100/F
1 2
Signal voltage level = 2/3 of VCCP. One 0.1 µF decoupling capacitor should be placed 100
12
mils or less from GMCH pin.
R276 200/F
12
C381 .1U_10V
HVREF
Concern about HVREF Trace Length & Width
T77 PAD
T15 PAD
R37
1 2
0
CPUSLP# 3,10
Do not install R37 for Dothan-A and install for Dothan-B
Concern about Trace Length and Width
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
Alviso (Host)
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
549,
8
Page 6
1
DMI_TXN011 DMI_TXN111 DMI_TXN211
CLK_SDRAM0#13 CLK_SDRAM1#13
CLK_SDRAM3#13 CLK_SDRAM4#13
12
R315 *40.2/F_NC
SMDDR_VREF
12
C714
.1U_10V
+1_8VSUS
1
DMI_TXN311
DMI_TXP011 DMI_TXP111 DMI_TXP211 DMI_TXP311
DMI_RXN011 DMI_RXN111 DMI_RXN211 DMI_RXN311
DMI_RXP011 DMI_RXP111 DMI_RXP211 DMI_RXP311
CLK_SDRAM013 CLK_SDRAM113
PAD
T94
CLK_SDRAM313 CLK_SDRAM413
T89PAD
T90PAD
PAD
T91
CKE013,14 CKE113,14 CKE213,14 CKE313,14
SM_CS0#13,14 SM_CS1#13,14 SM_CS2#13,14 SM_CS3#13,14
SMDDR_VREF
12
C715
.1U_10V
Place these 2 Caps near Alviso SMVREF pins.
12
R326
80.6/F
M_RCOMPN M_RCOMPP
12
R318
80.6/F
M_OCDCOMP0 M_OCDCOMP1
M_ODT013,14 M_ODT113,14 M_ODT213,14 M_ODT313,14
CLK_SDRAM2
CLK_SDRAM5
CLK_SDRAM2#
CLK_SDRAM5#
CKE0 CKE1 CKE2 CKE3
SM_CS0# SM_CS1# SM_CS2# SM_CS3#
M_RCOMPN M_RCOMPP
SMXSLEW SMYSLEW
A A
B B
12
R314
*40.2/F_NC
C C
D D
On-Die OCD driver compensation (DDR2 only)
AA31
AB35 AC31 AD35
AA35
AB31 AC35
AA33
AB37 AC33 AD37
AA37
AB33 AC37
AM33
AE11
AJ34 AC10 AN33
AE10
AJ33 AD10
AP21 AM21 AH21
AK21 AN16
AM14 AH15 AG16
AF22
AF16
AP14
AL15 AM11 AN10
AK10
AK11
AF37
AD1 AE27 AE28
AF9 AF10
2
Y31
Y33
AL1
AF6
AK1
AF5
2
U11C
DMIRXN0 DMIRXN1 DMIRXN2 DMIRXN3
DMIRXP0 DMIRXP1 DMIRXP2 DMIRXP3
DMITXN0 DMITXN1 DMITXN2 DMITXN3
DMITXP0 DMITXP1 DMITXP2 DMITXP3
SM_CK0 SM_CK1 SM_CK2 SM_CK3 SM_CK4 SM_CK5
SM_CK0# SM_CK1# SM_CK2# SM_CK3# SM_CK4# SM_CK5#
SM_CKE0 SM_CKE1 SM_CKE2 SM_CKE3
SM_CS0# SM_CS1# SM_CS2# SM_CS3#
SM_OCDCOMP0 SM_OCDCOMP1
SM_ODT0 SM_ODT1 SM_ODT2 SM_ODT3
SMRCOMPN SMRCOMPP SMVREF0 SMVREF1 SMXSLEWIN SMXSLEWOUT SMYSLEWIN SMYSLEWOUT
ALVISO
CFG[2:0] 001=FSB533 010=FSB800 101=FSB400
DMIDDR MUXING
RSVD21 RSVD22 RSVD23 RSVD24 RSVD25 RSVD26 RSVD27
CFG/RSVDPMLCKNC
BM_BUSY#
EXT_TS0# EXT_TS1#
THRMTRIP#
PWROK
RSTIN#
DREF_CLKN
DREF_CLKP DREF_SSCLKN DREF_SSCLKP
CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8
CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15 CFG16 CFG17 CFG18 CFG19 CFG20
NC1 NC2 NC3 NC4 NC5 NC6 NC7 NC8
NC9 NC10 NC11
3
VCCP
12
CFG0
G16
SELPSB1_CLK
H13
SELPSB2_CLK
G14
CFG3
F16
CFG4
F15
CFG5
G15
CFG6
E16
CFG7
D17
CFG8
J16
CFG9
D15
CFG10
E15
CFG11
D14
CFG12
E14
CFG13
H12
CFG14
C14
CFG15
H15
CFG16
J15
CFG17
H14
CFG18
G22 G23 D23 G25 G24 J17 A31 A30 D26 D25
J23 J21 H22 F5 AD30 AE29
A24 A23 C37 D37
AP37 AN37 AP36 AP2 AP1 AN1 B1 A2 B37 A36 A37
3
DREFSSCLK#_R DREFSSCLK_R
DREFSSCLK#_R DREFSSCLK_R
R269 *1K_NC
CFG19
R271 *1K_NC
CFG20
VCCP
R49 56
1 2
PLTRST#_R
DOT96# DOT96
TP_NC1 TP_NC2 TP_NC3 TP_NC4 TP_NC5 TP_NC6 TP_NC7 TP_NC8 TP_NC9 TP_NC10 TP_NC11
1 3
3 1
Populate RP2 if using CK-SSCD. Populate Rp12 if using CK410M
R286 10K
T66
PAD
T68
PAD
T59 PAD T53 PAD T74 PAD
T48 PAD T67 PAD T49 PAD T71 PAD T75 PAD
T138
PM_EXTTS#0 PM_EXTTS#1
1 2
R312 100
RP2
*4P2R-S-0_NC
RP12
4P2R-S-0
4
Low=DMIx2 High=DMIx4
PAD
DOT96# 15 DOT96 15
T40
PAD
T39
PAD
T42
PAD
T98
PAD
T41
PAD
T97
PAD
T16
PAD
T17
PAD
T12
PAD
T14
PAD
T13
PAD
2 4
4 2
4
CFG6
SELPSB1_CLK 4,15 SELPSB2_CLK 4,15
12
R273 *2.2K_NC
+2.5VRUN
PM_BMBUSY# 11
THERMTRIP_GMCH# 31 IMVP_PWRGD 11,39,42 PLTRST# 10,11,16,19,25
DREFSSCLK#_R DREFSSCLK_R
DREFSSCLK# 17 DREFSSCLK 17
DOT100#_SS 15 DOT100_SS 15
12
R254
2.2K
Low=DDR2 High=DDR1
TV_COMP18,38
TV_Y/G18,38 TV_C/R18,38
R241 150/F
1 2
R248 150/F
1 2
R243 150/F
1 2
R267 *150 /F _N C
1 2
R251 *150/F_NC
1 2
R242 *150/F_NC
1 2
VGAVSYNC18 VGAHSYNC18
REFCLK/SSCLK
5
SDVO_CTRLDATA16 SDVO_CTRLCLK16 CLK_MCH_3GPLL#15 CLK_MCH_3GPLL15
1 2
R277
4.99K/F
CLK_DDC218 DAT_DDC218
VGA_BLU18,38 VGA_GRN18,38 VGA_RED18,38
R275 39
1 2
R274 39
1 2 1 2
R285 255/F
BIA_PWM25 FPBACK17
DDC_CLK17 DDC_DATA17
FPVCC17,26
1 2
R247
1.5K/F
TXLCLKOUT-17
TXLCLKOUT+17
TXLOUT0-17 TXLOUT1-17 TXLOUT2-17
TXLOUT0+17 TXLOUT1+17 TXLOUT2+17
+2.5VRUN
R282 10K
1 2
R283 10K
1 2
For Memory throttling
External Thermal Sensor Input
5
AB29 AC29
H24 H25
A15 C16 A17
B15 B16 B17
E24 E23 E21 D21 C20 B20 A19 B19 H21 G21
E25 F25 C23 C22 F23 F22 F26 C33 C31 F28 F27
B30 B29 C25 C24
B34 B33 B32
A34 A33 B31
C29 D28 C27
C28 D27 C26
J18
J20
6
U11F
SDVOCTRL_DATA SDVOCTRL_CLK GCLKN GCLKP
TVDAC_A TVDAC_B TVDAC_C TV_REFSET TV_IRTNA TV_IRTNB TV_IRTNC
DDCCLK DDCDATA BLUE BLUE# GREEN GREEN# RED RED# VSYNC HSYNC REFSET
LBKLT_CTRL LBKLT_EN LCTLA_CLK LCTLB_DATA LDDC_CLK LDDC_DATA LVDD_EN LIBG LVBG LVREFH LVREFL
LACLKN LACLKP LBCLKN LBCLKP
LADATAN0 LADATAN1 LADATAN2
LADATAP0 LADATAP1 LADATAP2
LBDATAN0 LBDATAN1 LBDATAN2
LBDATAP0 LBDATAP1 LBDATAP2
ALVISO
PM_EXTTS#0
PM_EXTTS#1
6
7
SDVOB_R-_C SDVOB_G-_C SDVOB_B-_C SDVOB_CLK-_C
SDVOB_R+_C SDVOB_G+_C SDVOB_B+_C SDVOB_CLK+_C
R268 24.9/F
1 2
SDVOB_INT- 16
SDVOB_INT+ 16
MISC
TV VGA LVDS
EXP_COMPI
EXP_ICOMPO
EXP_RXN0 EXP_RXN1 EXP_RXN2 EXP_RXN3 EXP_RXN4 EXP_RXN5 EXP_RXN6 EXP_RXN7 EXP_RXN8
EXP_RXN9 EXP_RXN10 EXP_RXN11 EXP_RXN12 EXP_RXN13 EXP_RXN14 EXP_RXN15
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP3
EXP_RXP4
EXP_RXP5
EXP_RXP6
EXP_RXP7
EXP_RXP8
EXP_RXP9 EXP_RXP10 EXP_RXP11 EXP_RXP12 EXP_RXP13 EXP_RXP14 EXP_RXP15
EXP_TXN0
EXP_TXN1
EXP_TXN2
EXP_TXN3
EXP_TXN4
EXP_TXN5
EXP_TXN6
EXP_TXN7
PCI-EXPRESS GRAPHICS
EXP_TXN8
EXP_TXN9 EXP_TXN10 EXP_TXN11 EXP_TXN12 EXP_TXN13 EXP_TXN14 EXP_TXN15
EXP_TXP10 EXP_TXP11 EXP_TXP12 EXP_TXP13 EXP_TXP14 EXP_TXP15
SDVOB_R-_C SDVOB_G-_C SDVOB_B-_C SDVOB_CLK-_C
SDVOB_R+_C SDVOB_G+_C SDVOB_B+_C SDVOB_CLK+_C
EXP_TXP0 EXP_TXP1 EXP_TXP2 EXP_TXP3 EXP_TXP4 EXP_TXP5 EXP_TXP6 EXP_TXP7 EXP_TXP8 EXP_TXP9
C67 .1U_10V C49 .1U_10V C69 .1U_10V C51 .1U_10V
C66 .1U_10V C48 .1U_10V C68 .1U_10V C50 .1U_10V
D36 D34
E30 F34 G30 H34 J30 K34 L30 M34 N30 P34 R30 T34 U30 V34 W30 Y34
D30 E34 F30 G34 H30 J34 K30 L34 M30 N34 P30 R34 T30 U34 V30 W34
E32 F36 G32 H36 J32 K36 L32 M36 N32 P36 R32 T36 U32 V36 W32 Y36
D32 E36 F32 G36 H32 J36 K32 L36 M32 N36 P32 R36 T32 U36 V32 W36
1 2 1 2 1 2 1 2
1 2 1 2 1 2 1 2
VCC3G_PCIE_R
SDVO Output
QUANTA
Title
Size Document Number Rev
Custom
Date: Sheet
Alviso (VGA,DMI)
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
8
VCC3G_PCIE
SDVOB_R- 16 SDVOB_G- 16 SDVOB_B- 16 SDVOB_CLK- 16
SDVOB_R+ 16 SDVOB_G+ 16 SDVOB_B+ 16 SDVOB_CLK+ 16
of
649,
8
Page 7
1
A A
2
3
4
5
6
7
8
R_A_MD[0..63]13
B B
C C
R_A_MD0 R_A_MD1 R_A_MD2 R_A_MD3 R_A_MD4 R_A_MD5 R_A_MD6 R_A_MD7 R_A_MD8 R_A_MD9 R_A_MD10 R_A_MD11 R_A_MD12 R_A_MD13 R_A_MD14 R_A_MD15 R_A_MD16 R_A_MD17 R_A_MD18 R_A_MD19 R_A_MD20 R_A_MD21 R_A_MD22 R_A_MD23 R_A_MD24 R_A_MD25 R_A_MD26 R_A_MD27 R_A_MD28 R_A_MD29 R_A_MD30 R_A_MD31 R_A_MD32 R_A_MD33 R_A_MD34 R_A_MD35
R_A_MD37 R_A_MD38 R_A_MD39 R_A_MD40 R_A_MD41 R_A_MD42 R_A_MD43 R_A_MD44 R_A_MD45 R_A_MD46 R_A_MD47 R_A_MD48 R_A_MD49 R_A_MD50 R_A_MD51 R_A_MD52 R_A_MD53 R_A_MD54 R_A_MD55 R_A_MD56 R_A_MD57 R_A_MD58 R_A_MD59 R_A_MD60 R_A_MD61 R_A_MD62 R_A_MD63
AG35 AH35
AL35 AL37
AH36
AJ35
AK37
AL34 AM36 AN35 AP32 AM31 AM34 AM35
AL32 AM32 AN31 AP31 AN28 AP28
AL30 AM30 AM28
AL28 AP27 AM27 AM23 AM22
AL23 AM24 AN22 AP22
AM9
AL9 AL6
AP7 AP11 AP10
AL7
AM7 AN5 AN6 AN3
AP3
AP6
AM6
AL4
AM3
AK2
AK3
AG2 AG1
AL3
AM2 AH3 AG3
AF3
AE3
AD6 AC4
AF2
AF1
AD4 AD5
U11B
SADQ0 SADQ1 SADQ2 SADQ3 SADQ4 SADQ5 SADQ6 SADQ7 SADQ8 SADQ9 SADQ10 SADQ11 SADQ12 SADQ13 SADQ14 SADQ15 SADQ16 SADQ17 SADQ18 SADQ19 SADQ20 SADQ21 SADQ22 SADQ23 SADQ24 SADQ25 SADQ26 SADQ27 SADQ28 SADQ29 SADQ30 SADQ31 SADQ32 SADQ33 SADQ34 SADQ35 SADQ36 SADQ37 SADQ38 SADQ39 SADQ40 SADQ41 SADQ42 SADQ43 SADQ44 SADQ45 SADQ46 SADQ47 SADQ48 SADQ49 SADQ50 SADQ51 SADQ52 SADQ53 SADQ54 SADQ55 SADQ56 SADQ57 SADQ58 SADQ59 SADQ60 SADQ61 SADQ62 SADQ63
ALVISO
SA_BS0# SA_BS1# SA_BS2#
SA_DM0 SA_DM1 SA_DM2 SA_DM3 SA_DM4 SA_DM5 SA_DM6 SA_DM7
SA_DQS0 SA_DQS1 SA_DQS2 SA_DQS3 SA_DQS4 SA_DQS5 SA_DQS6 SA_DQS7
SA_DQS0# SA_DQS1# SA_DQS2# SA_DQS3# SA_DQS4# SA_DQS5# SA_DQS6# SA_DQS7#
SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8
SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13
DDR SYSTEM MEMORY A
SA_CAS# SA_RAS#
SA_RCVENIN#
SA_RCVENOUT#
SA_WE#
AK15 AK16 AL21
AJ37 AP35 AL29 AP24 AP9 AP4 AJ2 AD3
AK36 AP33 AN29 AP23 AM8 AM4 AJ1 AE5
AK35 AP34 AN30 AN23 AN8 AM5 AH1 AE4
AL17 AP17 AP18 AM17 AN18 AM18 AL19 AP20 AM19 AL20 AM16 AN20 AM20 AM15
AN15 AP16 AF29 AF28 AP15
R_A_BS0# R_A_BS1# R_A_BS2#
R_A_DM0 R_A_DM1 R_A_DM2 R_A_DM3 R_A_DM4 R_A_DM5 R_A_DM6 R_A_DM7
R_A_DQS0 R_A_DQS1 R_A_DQS2 R_A_DQS3 R_A_DQS4 R_A_DQS5 R_A_DQS6 R_A_DQS7
R_A_DQS#0 R_A_DQS#1 R_A_DQS#2 R_A_DQS#3 R_A_DQS#4 R_A_DQS#5 R_A_DQS#6 R_A_DQS#7
R_A_MA0 R_A_MA1 R_A_MA2 R_A_MA3 R_A_MA4 R_A_MA5 R_A_MA6 R_A_MA7 R_A_MA8 R_A_MA9 R_A_MA10 R_A_MA11 R_A_MA12 R_A_MA13
R_A_SCASA# R_A_SRASA#
R_A_BMWEA#
PAD
R_A_BS0# 13,14 R_A_BS1# 13,14 R_A_BS2# 13,14 R_A_DM[0..7] 13
R_A_DQS[0..7] 13
R_A_DQS#[0..7] 13
R_A_MA[0..13] 13,14
R_A_SCASA# 13,14 R_A_SRASA# 13,14
T123
R_A_BMWEA# 13,14
R_B_MD[0..63]13
R_B_MD0 R_B_MD1 R_B_MD2 R_B_MD3 R_B_MD4 R_B_MD5 R_B_MD6 R_B_MD7 R_B_MD8 R_B_MD9 R_B_MD10 R_B_MD11 R_B_MD12 R_B_MD13 R_B_MD14 R_B_MD15 R_B_MD16 R_B_MD17 R_B_MD18 R_B_MD19 R_B_MD20 R_B_MD21 R_B_MD22 R_B_MD23 R_B_MD24 R_B_MD25 R_B_MD26 R_B_MD27 R_B_MD28 R_B_MD29 R_B_MD30 R_B_MD31 R_B_MD32 R_B_MD33 R_B_MD34 R_B_MD35 R_B_MD36R_A_MD36 R_B_MD37 R_B_MD38 R_B_MD39 R_B_MD40 R_B_MD41 R_B_MD42 R_B_MD43 R_B_MD44 R_B_MD45 R_B_MD46 R_B_MD47 R_B_MD48 R_B_MD49 R_B_MD50 R_B_MD51 R_B_MD52 R_B_MD53 R_B_MD54 R_B_MD55 R_B_MD56 R_B_MD57 R_B_MD58 R_B_MD59 R_B_MD60 R_B_MD61 R_B_MD62 R_B_MD63
AE31 AE32 AG32 AG36 AE34 AE33 AF31 AF30 AH33 AH32 AK31 AG30 AG34 AG33 AH31
AJ31
AK30
AJ30 AH29 AH28 AK29 AH30 AH27 AG28 AF24 AG23
AJ22 AK22 AH24 AH23 AG22
AJ21 AG10
AG9 AG8
AH8 AH11 AH10
AK9
AK6
AH5
AK8
AK4
AG5
AG4
AD8
AD9
AH4
AG6
AE8
AD7
AC5
AB8
AB6
AA8
AC8
AC7
AA4
AA5
U11G
SBDQ0 SBDQ1 SBDQ2 SBDQ3 SBDQ4 SBDQ5 SBDQ6 SBDQ7 SBDQ8 SBDQ9 SBDQ10 SBDQ11 SBDQ12 SBDQ13 SBDQ14 SBDQ15 SBDQ16 SBDQ17 SBDQ18 SBDQ19 SBDQ20 SBDQ21 SBDQ22 SBDQ23 SBDQ24 SBDQ25 SBDQ26 SBDQ27 SBDQ28 SBDQ29 SBDQ30 SBDQ31 SBDQ32 SBDQ33 SBDQ34 SBDQ35 SBDQ36 SBDQ37
AJ9
SBDQ38 SBDQ39
AJ7
SBDQ40 SBDQ41
AJ4
SBDQ42 SBDQ43 SBDQ44
AJ8
SBDQ45
AJ5
SBDQ46 SBDQ47 SBDQ48 SBDQ49 SBDQ50 SBDQ51 SBDQ52 SBDQ53 SBDQ54 SBDQ55 SBDQ56 SBDQ57 SBDQ58 SBDQ59 SBDQ60 SBDQ61 SBDQ62 SBDQ63
ALVISO
SB_BS0# SB_BS1# SB_BS2#
SB_DM0 SB_DM1 SB_DM2 SB_DM3 SB_DM4 SB_DM5 SB_DM6 SB_DM7
SB_DQS0 SB_DQS1 SB_DQS2 SB_DQS3 SB_DQS4 SB_DQS5 SB_DQS6 SB_DQS7
SB_DQS0# SB_DQS1# SB_DQS2# SB_DQS3# SB_DQS4# SB_DQS5# SB_DQS6# SB_DQS7#
SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8
SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13
DDR SYSTEM MEMORY B
SB_CAS# SB_RAS#
SB_RCVENIN#
SB_RCVENOUT#
SB_WE#
AJ15 AG17 AG21
AF32 AK34 AK27 AK24 AJ10 AK5 AE7 AB7
AF34 AK32 AJ28 AK23 AM10 AH6 AF8 AB4
AF35 AK33 AK28 AJ23 AL10 AH7 AF7 AB5
AH17 AK17 AH18 AJ18 AK18 AJ19 AK19 AH19 AJ20 AH20 AJ16 AG18 AG20 AG15
AH14 AK14 AF15 AF14 AH16
R_B_BS0# R_B_BS1# R_B_BS2#
R_B_DM0 R_B_DM1 R_B_DM2 R_B_DM3 R_B_DM4 R_B_DM5 R_B_DM6 R_B_DM7
R_B_DQS0 R_B_DQS1 R_B_DQS2 R_B_DQS3 R_B_DQS4 R_B_DQS5 R_B_DQS6 R_B_DQS7
R_B_DQS#0 R_B_DQS#1 R_B_DQS#2 R_B_DQS#3 R_B_DQS#4 R_B_DQS#5 R_B_DQS#6 R_B_DQS#7
R_B_MA0 R_B_MA1 R_B_MA2 R_B_MA3 R_B_MA4 R_B_MA5 R_B_MA6 R_B_MA7 R_B_MA8 R_B_MA9 R_B_MA10 R_B_MA11 R_B_MA12 R_B_MA13
R_B_SCASA# R_B_SRASA#
R_B_BMWEA#
PAD
R_B_BS0# 13,14 R_B_BS1# 13,14 R_B_BS2# 13,14 R_B_DM[0..7] 13
R_B_DQS[0..7] 13
R_B_DQS#[0..7] 13
R_B_MA[0..13] 13,14
R_B_SCASA# 13,14 R_B_SRASA# 13,14
T124
R_B_BMWEA# 13,14
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
Alviso (DDR)
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
749,
8
Page 8
5
VCCP
12
12
12
C385 .1U_10V
12
C366 .1U_10V
12
C368 .1U_10V
12
C88 .1U_10V
12
C90 .1U_10V
12
C723
*10U_4V_NC
C54
4.7U_10V_0805
12
C388 .1U_10V
12
+
12
+
12
+
12
+
12
12
VCCA_DPLLA
C44 470U_4V
VCCA_DPLLB
C341 470U_4V
C86 150U_2V_L
VCCA_MPLL
C96 150U_2V_L
C380 .1U_10V
C393 .1U_10V
D D
+1_5VRUN
L12
12
10uH
C C
B B
+2.5VRUN
VCCP
D16
2 1
RB751V
+2.5VRUN
A A
1.05V(VTT - FSB POWER SUPPLY)
L16 10uH
L18 BLM11A121S
L19 BLM11A121S
R230 10
VCCP
12
C409
2.2U_6.3V
12
12
12
L31
BLM18PG181SN1
12
12
5
C55 10U_4V
VCCA_HPLL
VCCA_CRTDAC
12
C345 .1U_10V
12
12
C78 10U_4V
ALL PLL POWER Needs To Have Clear Power(No Any Noise)
R231 0
1 2
12
C346
3
.022U
C60 .47U_10V
1 2
C59 .47U_10V
1 2
C84 .22U_10V
1 2
C73 .22U_10V
1 2
4
C56 10U_4V
VCCA_CRTDAC_R
1
C353
2
*22nF_3P_NC
VCCP
VCCP_GMCH_CAP1
VCCP_GMCH_CAP2 VCCP_GMCH_CAP3
VCCP_GMCH_CAP4
4
T29 R29 N29
M29
K29 J29 V28
U28
T28
R28
P28 N28 M28
L28
K28
J28 H28 G28
V27 U27
T27 R27
P27 N27 M27
L27
K27
J27 H27
K26 H26
K25
J25
K24
K23
K22
K21 W20 U20
T20
K20
V19 U19
K19 W18
V18
T18
K18
K17 AC2
AC1
B23 C35 AA1 AA2
F19
E19 G19
H20
K13
J13
K12 W11
V11 U11
T11 R11
P11 N11 M11
L11
K11 W10
V10 U10
T10 R10
P10 N10 M10
K10
J10
Y9 W9 U9 R9
P9 N9 M9
L9
J9 N8 M8 N7 M7 N6 M6
A6 N5 M5 N4 M4 N3 M3 N2 M2
B2
V1 N1 M1 G1
VCC0 VCC1 VCC2 VCC3 VCC4 VCC5 VCC6 VCC7 VCC8 VCC9 VCC10 VCC11 VCC12 VCC13 VCC14 VCC15 VCC16 VCC17 VCC18 VCC19 VCC20 VCC21 VCC22 VCC23 VCC24 VCC25 VCC26 VCC27 VCC28 VCC29 VCC30 VCC31 VCC32 VCC33 VCC34 VCC35 VCC36 VCC37 VCC38 VCC39 VCC40 VCC41 VCC42 VCC43 VCC44 VCC45 VCC46 VCC47 VCC48
VCCH_MPLL1 VCCH_MPLL0 VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL
VCCA_CRTDAC0 VCCA_CRTDAC1 VSSA_CRTDAC
VCC_SYNC VTT0
VTT1 VTT2 VTT3 VTT4 VTT5 VTT6 VTT7 VTT8 VTT9 VTT10 VTT11 VTT12 VTT13 VTT14 VTT15 VTT16 VTT17 VTT18 VTT19 VTT20 VTT21 VTT22 VTT23 VTT24 VTT25 VTT26 VTT27 VTT28 VTT29 VTT30 VTT31 VTT32 VTT33 VTT34 VTT35 VTT36 VTT37 VTT38 VTT39 VTT40 VTT41 VTT42 VTT43 VTT44 VTT45 VTT46 VTT47 VTT48 VTT49 VTT50 VTT51
U11H ALVISO
VCCA_TVDACA0 VCCA_TVDACA1 VCCA_TVDACB0 VCCA_TVDACB1 VCCA_TVDACC0 VCCA_TVDACC1
VCCA_TVBG VSSA_TVBG
VCCD_TVDAC
VCCDQ_TVDAC
VCCD_LVDS0 VCCD_LVDS1 VCCD_LVDS2
VCCA_LVDS
POWER
VCCTX_LVDS0 VCCTX_LVDS1 VCCTX_LVDS2
VCCA_3GPLL0 VCCA_3GPLL1 VCCA_3GPLL2
VCCA_3GBG VSSA_3GBG
VCCHV0 VCCHV1 VCCHV2
VCCSM0 VCCSM1 VCCSM2 VCCSM3 VCCSM4 VCCSM5 VCCSM6 VCCSM7 VCCSM8
VCCSM9 VCCSM10 VCCSM11 VCCSM12 VCCSM13 VCCSM14 VCCSM15 VCCSM16 VCCSM17 VCCSM18 VCCSM19 VCCSM20 VCCSM21 VCCSM22 VCCSM23 VCCSM24 VCCSM25 VCCSM26 VCCSM27 VCCSM28 VCCSM29 VCCSM30 VCCSM31 VCCSM32 VCCSM33 VCCSM34 VCCSM35 VCCSM36 VCCSM37 VCCSM38 VCCSM39 VCCSM40 VCCSM41 VCCSM42 VCCSM43 VCCSM44 VCCSM45 VCCSM46 VCCSM47 VCCSM48 VCCSM49 VCCSM50 VCCSM51 VCCSM52 VCCSM53 VCCSM54 VCCSM55 VCCSM56 VCCSM57 VCCSM58 VCCSM59 VCCSM60 VCCSM61 VCCSM62 VCCSM63 VCCSM64
VCCA_SM0 VCCA_SM1 VCCA_SM2 VCCA_SM3
VCC3G0
VCC3G1
VCC3G2
VCC3G3
VCC3G4
VCC3G5
VCC3G6
3
F17 E17 D18 C18 F18 E18
H18 G18
D19 H17
B26 B25 A25
A35 B22
B21 A21
AM37 AH37 AP29 AD28 AD27 AC27 AP26 AN26 AM26 AL26 AK26 AJ26 AH26 AG26 AF26 AE26 AP25 AN25 AM25 AL25 AK25 AJ25 AH25 AG25 AF25 AE25 AE24 AE23 AE22 AE21 AE20 AE19 AE18 AE17 AE16 AE15 AE14 AP13 AN13 AM13 AL13 AK13 AJ13 AH13 AG13 AF13 AE13 AP12 AN12 AM12 AL12 AK12 AJ12 AH12 AG12 AF12 AE12 AD11 AC11 AB11 AB10 AB9 AP8 AM1 AE1
B28 A28 A27
AF20 AP19 AF19 AF18
AE37 W37 U37 R37 N37 L37 J37
Y29 Y28 Y27
F37 G37
3
VCC_TVDACA_R VCC_TVDACB_R VCC_TVDACC_R
VCC_TVBG_R VSS_TVBG
VCCD_TVDAC_R VCCQ_TVDAC_R
Note: All VCCSM pins shorted internally.
Note: All VCCSM pins shorted internally.
V1.8_DDR_CAP6 V1.8_DDR_CAP3 V1.8_DDR_CAP4
VCC_DDRDLL
VCC3G_PCIE
VCCA_3GPLL
VCCA_3GBG VSSA_3GBG
12
C363 .1U_10V
12
C355
.01U
12
C361 .1U_10V
V1.8_DDR_CAP1
V1.8_DDR_CAP2
V1.8_DDR_CAP5
C422 .1U_10V
1 2
C423 .1U_10V
1 2
C91 .1U_10V
1 2
ALL PLL POWER Needs To Have Clear Power(No Any Noise)
12
C45 10U_4V
12
C367 .1U_10V
12
C53 10U_4V
C425 .1U_10V
1 2
C415 .1U_10V
1 2
C428 .1U_10V
1 2
+1_8VSUS
12
C107 10U_4V
12
C373 .1U_10V
+1_5VRUN
+2.5VRUN
+2.5VRUN
12
C106 10U_4V
12
C57
4.7U_10V_0805
+2.5VRUN
2
VCC_TVDACA_R
VCC_TVDACB_R
VCC_TVDACC_R
VCC_TVBG_R
VSS_TVBG
VCCD_TVDAC_R
*22nF_3P_NC
VCCQ_TVDAC_R
*22nF_3P_NC
2
1
12
12
12
12
C338 .1U_10V
C52 .1U_10V
C343 .1U_10V
C47 .1U_10V
12
+
L29 BLM18PG181SN1
L14 BLM18PG181SN1
L30 BLM18PG181SN1
12
12
C74 150U_2V_L
+2.5VRUN
12
12
12
L13 BLM18PG181SN1
C716
2.2U_6.3V
R35 10
D6 RB751V
2 1
L20
12
BLM18PG330SN1
L34
12
BLM18PG330SN1
L33
12
BLM18PG181SN1
12
12
R219 0
1 2
1
3
C340
2
*22nF_3P_NC
R39 0
1 2
1
3
C62
2
*22nF_3P_NC
R226 0
1 2
1
3
C351
2
*22nF_3P_NC
R36 0
1 2
1
3
C58
2
*22nF_3P_NC
R227 0
1 2
3
C352
R38 0
1 2
3
C61
Note: Choose the Inductor with Low-DC loss and High-Impedance at over 100MHz to isolate SSN/SN(Switch Noise) from other aggressor .
VCCA_3GPLL
1
2
1
2
VCC_DDRDLL
VCC3G_PCIE
12
C408 .1U_10V
VCCA_3GBG
VSSA_3GBG
12
.022U
12
.022U
VCCD_TVDAC
C347
VCCQ_TVDAC
C64
12
C110
+
100U
12
C76 10U_4V
R278
1 2
12
0.5/F C376 10U_4V
12
C354 .1U_10V
VCC_TVDACA
12
C339
.022U
VCC_TVDACB
12
C65
.022U
VCC_TVDACC
12
C344
.022U
VCC_TVBG
12
C46
.022U
12
C342 .1U_10V
12
C63 .1U_10V
12
C412 .1U_10V
12
C77 10U_4V
L15 BLM18PG181SN1
VCC3G_PCIE
VCCA_3GPLL_R
QUANTA
Title
Size Document Number Rev
Date: Sheet
Alviso (Power)
Tahiti(DM3L) 1A
星期二
29, 2005
三月
1
of
849,
+3VRUN
+3VRUN
+3VRUN
+3VRUN
+3VRUN
+1_5VRUN
+1_5VRUN
+1_5VRUN
+1_5VRUN
Page 9
5
4
3
2
1
B36
G2
D2
Y1
D D
C C
VSS270
VSS271
VSSALVDS
VSS134
VSS135
B24
D24
VSS269
VSS133
F24
AL24
J2
VSS268
VSS132
J24
AG24
A26
AN24
VSS266
VSS267
VSS130
VSS131
E27
AJ24
G26
E26
VSS264
VSS265
VSS128
VSS129
G27
W27
J26
VSS262
VSS263
VSS126
VSS127
AA27
Y12
VSS_NCTF68
T2
P2
L2
B27
VSS258
VSS259
VSS260
VSS261
VSS122
VSS123
VSS124
VSS125
AJ27
AF27
AB27
AG27
L14
AA13
Y13
AA12
VSS_NCTF64
VSS_NCTF65
VSS_NCTF66
VSS_NCTF67
AE2
AD2
V2
VSS255
VSS256
VSS257
VSS119
VSS120
VSS121
E28
AL27
AN27
P14
N14
M14
VSS_NCTF61
VSS_NCTF62
VSS_NCTF63
A3
AN2
AL2
AH2
VSS251
VSS252
VSS253
VSS254
VSS115
VSS116
VSS117
VSS118
W28
AB28
AA28
AC28
V14
U14
T14
R14
VSS_NCTF57
VSS_NCTF58
VSS_NCTF59
VSS_NCTF60
AB3
AA3
C3
VSS248
VSS249
VSS250
VSS112
VSS113
VSS114
E29
A29
D29
AA14
Y14
W14
VSS_NCTF54
VSS_NCTF55
VSS_NCTF56
H4
C4
AJ3
AC3
VSS244
VSS245
VSS246
VSS247
VSS108
VSS109
VSS110
VSS111
L29
F29
H29
G29
N15
M15
L15
AB14
VSS_NCTF50
VSS_NCTF51
VSS_NCTF52
VSS_NCTF53
U4
P4
L4
VSS241
VSS242
VSS243
VSS105
VSS106
VSS107
V29
P29
U29
T15
R15
P15
VSS_NCTF47
VSS_NCTF48
VSS_NCTF49
E5
AN4
AF4
Y4
VSS237
VSS238
VSS239
VSS240
VSS101
VSS102
VSS103
VSS104
W29
AA29
AD29
AG29
Y15
W15
V15
U15
VSS_NCTF43
VSS_NCTF44
VSS_NCTF45
VSS_NCTF46
AP5
AL5
W5
VSS234
VSS235
VSS236
VSS98
VSS99
VSS100
C30
AJ29
AM29
L16
AB15
AA15
VSS_NCTF40
VSS_NCTF41
VSS_NCTF42
P6
L6
J6
B6
VSS230
VSS231
VSS232
VSS233
VSS94
VSS95
VSS96
VSS97
Y30
AB30
AA30
AC30
R16
P16
N16
M16
VSS_NCTF36
VSS_NCTF37
VSS_NCTF38
VSS_NCTF39
AC6
AA6
T6
VSS227
VSS228
VSS229
VSS91
VSS92
VSS93
D31
AP30
AE30
V16
U16
T16
VSS_NCTF33
VSS_NCTF34
VSS_NCTF35
V7
G7
AJ6
AE6
VSS223
VSS224
VSS225
VSS226
VSS87
VSS88
VSS89
VSS90
F31
E31
H31
G31
AB16
AA16
Y16
W16
VSS_NCTF29
VSS_NCTF30
VSS_NCTF31
VSS_NCTF32
AK7
AG7
AA7
VSS220
VSS221
VSS222
VSS84
VSS85
VSS86
J31
L31
K31
AA17
Y17
R17
VSS_NCTF26
VSS_NCTF27
VSS_NCTF28
L8
E8
C8
AN7
VSS216
VSS217
VSS218
VSS219
VSS80
VSS81
VSS82
VSS83
P31
R31
N31
M31
AA19
AB18
AA18
AB17
VSS_NCTF22
VSS_NCTF23
VSS_NCTF24
VSS_NCTF25
AL8
Y8
P8
VSS213
VSS214
VSS215
U11E ALVISO
VSS77
VSS78
VSS79
T31
V31
U31
AB20
AA20
AB19
VSS_NCTF19
VSS_NCTF20
VSS_NCTF21
T9
K9
H9
A9
VSS209
VSS210
VSS211
VSS212
VSS
VSS73
VSS74
VSS75
VSS76
W31
AL31
AD31
AG31
AB21
AA21
Y21
R21
VSS_NCTF15
VSS_NCTF16
VSS_NCTF17
VSS_NCTF18
AC9
AA9
V9
VSS206
VSS207
VSS208
VSS70
VSS71
VSS72
Y32
A32
C32
AB22
AA22
Y22
VSS_NCTF12
VSS_NCTF13
VSS_NCTF14
D10
AN9
AH9
AE9
VSS202
VSS203
VSS204
VSS205
VSS66
VSS67
VSS68
VSS69
AB32
AA32
AD32
AC32
Y24
AB23
AA23
Y23
VSS_NCTF8
VSS_NCTF9
VSS_NCTF10
VSS_NCTF11
AA10
Y10
L10
VSS199
VSS200
VSS201
VSS63
VSS64
VSS65
D33
AJ32
AN32
Y25
AB24
AA24
VSS_NCTF5
VSS_NCTF6
VSS_NCTF7
AA11
Y11
H11
F11
VSS196
VSS197
VSS198
VSS60
VSS61
VSS62
F33
E33
H33
G33
AA26
Y26
AB25
AA25
VSS_NCTF2
VSS_NCTF3
VSS_NCTF4
AJ11
AG11
AF11
VSS192
VSS193
VSS194
VSS195
VSS56
VSS57
VSS58
VSS59
J33
L33
K33
AB26
VSS_NCTF0
VSS_NCTF1
AN11
AL11
VSS191
VSS55
N33
M33
B12
VSS189
VSS190
VSS53
VSS54
P33
D12
R33
L12
B14
A14
J12
VSS185
VSS186
VSS187
VSS188
VSS49
VSS50
VSS51
VSS52
T33
V33
U33
P12
N12
M12
VTT_NCTF14
VTT_NCTF15
VTT_NCTF16
VTT_NCTF17
AG14
K14
J14
F14
VSS181
VSS182
VSS183
VSS184
VSS45
VSS46
VSS47
VSS48
W33
AL33
AF33
AD33
V12
U12
T12
R12
VTT_NCTF10
VTT_NCTF11
VTT_NCTF12
VTT_NCTF13
AN14
AL14
AJ14
VSS178
VSS179
VSS180
VSS42
VSS43
VSS44
C34
AB34
AA34
M13
L13
W12
VTT_NCTF7
VTT_NCTF8
VTT_NCTF9
D16
A16
K15
C15
VSS175
VSS176
VSS177
VSS39
VSS40
VSS41
AN34
AH34
AD34
AC34
T13
R13
P13
N13
VTT_NCTF4
VTT_NCTF5
VTT_NCTF6
AL16
K16
H16
VSS171
VSS172
VSS173
VSS174
VSS35
VSS36
VSS37
VSS38
E35
B35
D35
VCCP
W13
V13
U13
VTT_NCTF0
VTT_NCTF1
VTT_NCTF2
VTT_NCTF3
B18
A18
AN17
AJ17
AF17
G17
C17
VSS164
VSS165
VSS166
VSS167
VSS168
VSS169
VSS170
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
J35
L35
F35
K35
H35
G35
M35
All NCTF Pin is to enchance the solder Joint Characteristic Thermal Expansion (CTE) mismatch of the Die to package interface.
AL18
U18
VSS163
VSS27
P35
N35
H19
C19
VSS161
VSS162
VSS25
VSS26
T35
R35
T19
J19
VSS159
VSS160
VSS23
VSS24
V35
U35
W19
VSS157
VSS158
VSS21
VSS22
W35
AN19
AG19
VSS156
VSS20
Y35
AE35
D20
A20
VSS154
VSS155
VSS18
VSS19
C36
AA36
F20
E20
VSS152
VSS153
VSS16
VSS17
AB36
AC36
G20
VSS150
VSS151
VSS14
VSS15
AD36
AK20
V20
VSS149
VSS13
AF36
AE36
F21
C21
VSS147
VSS148
VSS11
VSS12
AJ36
AL36
AF21
VSS145
VSS146
VSS9
VSS10
AN36
A22
AN21
VSS144
VSS8
E37
H37
VSS143
VSS7
E22
D22
VSS142
VSS6
K37
M37
AH22
J22
VSS140
VSS141
VSS4
VSS5
T37
P37
H23
AL22
VSS138
VSS139
VSS2
VSS3
Y37
V37
AF23
VSS136
VSS137
VSS0
VSS1
AG37
U11D
NCTF
W21
ALVISO
VCCSM_NCTF0
VCCSM_NCTF1
VCCSM_NCTF2
VCCSM_NCTF3
VCCSM_NCTF4
VCCSM_NCTF5
VCCSM_NCTF6
VCCSM_NCTF7
VCCSM_NCTF8
VCCSM_NCTF9
VCCSM_NCTF10
VCCSM_NCTF11
VCCSM_NCTF12
VCCSM_NCTF13
VCCSM_NCTF14
VCCSM_NCTF15
VCCSM_NCTF16
VCCSM_NCTF17
VCCSM_NCTF18
VCCSM_NCTF19
VCCSM_NCTF20
VCCSM_NCTF21
VCCSM_NCTF22
VCCSM_NCTF23
VCCSM_NCTF24
VCCSM_NCTF25
VCCSM_NCTF26
VCCSM_NCTF27
VCCSM_NCTF28
VCCSM_NCTF29
VCCSM_NCTF30
VCCSM_NCTF31
VCC_NCTF0
VCC_NCTF1
VCC_NCTF2
VCC_NCTF3
VCC_NCTF4
VCC_NCTF5
VCC_NCTF6
VCC_NCTF7
VCC_NCTF8
VCC_NCTF9
VCC_NCTF10
VCC_NCTF11
VCC_NCTF12
VCC_NCTF13
VCC_NCTF14
VCC_NCTF15
VCC_NCTF16
VCC_NCTF17
VCC_NCTF18
VCC_NCTF19
VCC_NCTF20
VCC_NCTF21
VCC_NCTF22
VCC_NCTF23
VCC_NCTF24
VCC_NCTF25
VCC_NCTF26
VCC_NCTF27
VCC_NCTF28
VCC_NCTF29
VCC_NCTF30
VCC_NCTF31
VCC_NCTF32
VCC_NCTF33
VCC_NCTF34
VCC_NCTF35
VCC_NCTF36
VCC_NCTF37
VCC_NCTF38
VCC_NCTF39
VCC_NCTF40
VCC_NCTF41
VCC_NCTF42
VCC_NCTF43
VCC_NCTF44
VCC_NCTF45
L22
N22
M22
L23
T22
V22
P22
R22
N23
U22
M23
W22
L24
T23
V23
P23
R23
N24
U23
M24
W23
L25
T24
V24
P24
R24
N25
U24
M25
W24
L26
W25
T26
V26
P26
U26
R26
N26
M26
W26
VCCP
AB12
AC12
AD12
AB13
AC13
AD13
AC14
AD14
AC15
AD15
AC16
AD16
AC17
AD17
AC18
AD18
AC19
AD19
AC20
AD20
AC21
AD21
AC22
AD22
AC23
AD23
AC24
AD24
AC25
AD26
AC26
AD25
+1_8VSUS
T25
V25
P25
U25
R25
B B
VCC_NCTF46
VCC_NCTF47
VCC_NCTF48
VCC_NCTF49
VCC_NCTF50
VCC_NCTF51
VCC_NCTF52
VCC_NCTF53
VCC_NCTF54
VCC_NCTF55
VCC_NCTF56
VCC_NCTF57
VCC_NCTF58
VCC_NCTF59
VCC_NCTF60
VCC_NCTF61
VCC_NCTF62
VCC_NCTF63
VCC_NCTF64
VCC_NCTF65
VCC_NCTF66
VCC_NCTF67
VCC_NCTF68
VCC_NCTF69
VCC_NCTF70
VCC_NCTF71
VCC_NCTF72
VCC_NCTF73
VCC_NCTF74
VCC_NCTF75
VCC_NCTF76
VCC_NCTF77
VCC_NCTF78
L21
L20
L19
L17
M17
A A
L18
T17
V17
P17
U17
N17
W17
Y18
P18
N19
R18
N18
M19
M18
P20
Y19
P19
N20
R19
M20
T21
V21
P21
Y20
U21
N21
R20
M21
QUANTA
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
Alviso (VSS,NCTF)
Tahiti(DM3L) 1A
星期二
29, 2005
三月
1
of
949,
Page 10
1
VCCRTC
A A
PDD[0..15]19
PDDREQ19 PDIOW#19 PDIOR#19 PIORDY19 PDDACK#19 IRQ1419 PDA119 PDA019 PDCS1#19 PDA219 PDCS3#19
Reset Circuit
B B
(NB/PCI/PCIE)
PLTRST#6,11,16,19,25
PCLK_ICH15
C C
12
R153 100K
SM_INTRUDER#
PDD[0..15] PDDREQ
PDIOW# PDIOR# PIORDY PDDACK# IRQ14 PDA1 PDA0 PDCS1# PDA2 PDCS3#
4
R422 *33_NC
1 2
C546 *18P_NC
1 2
AC-Terminator
IAC_SYNC_MDC24
D D
IAC_SYNC_AUDIO33
C214 22P
12
C216 *10P_NC
1 2
AC97-MDC & AUDIO
1
R154 20K/F
U17
7SH32
R143 39
12
R142 39
2
+3VSUS
5
2 1
X1,X2 Docking IAC_SYNC Port X Line R144
C227 1U_10V
C215
.047U
C228 15P
C222 15P
12
PLTRST#_1
12
12
SM_INTRUDER#31
CPUINIT#3
+3VRUN
NMI3 A20M#3
FERR#3
IGNNE#3 INTR3
RCIN#25
GATEA2026
ICH_PME#25
PCIRST#21,23,35
CLKRUN#21,23,25,35
101X2,2X1
4X1
+3VRUN
R144 *1K_NC
1 2
IAC_SYNC
12
2
IAC_BITCLK_ICH
23
AD[0..31]21,23,35
14
STUFF UNSTUFF
R135
*47_NC
3
CLK_32KX1
32.768KHZ W2
CLK_32KX2
R133 10K
1 2
C209 *22P_NC
1 2
3
R150 10M
1 2
RTC_RST# SM_INTRUDER#
1 2
R127 56
PCIRST# PLTRST#_1
12
IAC_SDATAO
R_FERR#
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
PDD0 PDD1 PDD2 PDD3 PDD4 PDD5 PDD6 PDD7 PDD8 PDD9 PDD10 PDD11 PDD12 PDD13 PDD14 PDD15
PDCS1# PDCS3# PDA0 PDA1 PDA2 PDIOR# PDIOW# PIORDY IRQ14 PDDREQ
PDDACK#
Y1
Y2 AA2 AA3
AA5
AF25 AF23 AF24 AG26 AG24 AF27 AD23 AF22
E2
E5
C2
F5
F3
E9
F2
D6
E6
D3
A2
D2
D5
H3
B4
J5 K2 K5 D4
L6 G3 H4 H2 H5 B3 M6 B2 K6 K3 A5
L1 K4
P6 G6 R2 R5
AF19
AD14 AF15 AF14 AD12 AE14 AC11 AD11 AB11 AE13 AF13 AB12 AB13 AC13 AE15 AG15 AD13
AD16 AE17 AC16 AB17 AC17 AE16 AC14 AF16 AB16 AB14 AB15
R140 39
R141 39
U16A
RTCX1 RTCX2
RTCRST# INTRUDER#
INTVRMEN
NMI A20M# FERR# IGNNE# INTR INIT# RCIN# A20GATE
AD0 AD1 AD2 AD3 AD4 AD5 AD6 AD7 AD8 AD9 AD10 AD11 AD12 AD13 AD14 AD15 AD16 AD17 AD18 AD19 AD20 AD21 AD22 AD23 AD24 AD25 AD26 AD27 AD28 AD29 AD30 AD31
PME# PCICLK PCIRST# PLTRST# CLKRUN#/GPIO32
DD0 DD1 DD2 DD3 DD4 DD5 DD6 DD7 DD8 DD9 DD10 DD11 DD12 DD13 DD14 DD15
DCS1# DCS3# DA0 DA1 DA2 DIOR# DIOW# IORDY IDEIRQ DDREQ DDACK#
ICH6-M
12
12
12
C212 *10P_NC
4
RTC
CPU
LAD1/FB1 LAD2/FB2 LAD3/FB3
LDRQ1#/GPI41
LPC
LFRAME#
CPUPWRGD/GPO49
INIT3_3V#
THRMTRIP#
STPCLK#
CPUSLP#
DPSLP#/TP[2]
DPRSLP#/TP[4]
DEVSEL#
PCI
REQ4#/GPI40
REQ5#/GPI1 REQ6#/GPI0
GNT4#/GPO48 GNT5#/GPO17 GNT6#/GPO16
PIRQE#/GPI2
PIRQF#/GPI3 PIRQG#/GPI4 PIRQH#/GPI5
SATALED#
SATA0_RXN
SATA0_RXP
IDE
12
C213 10P
4
SATA0_TXN SATA0_TXP
SATA2_RXN
SATA2_RXP SATA2_TXN
SATA
SATA2_TXP
SATA_CLKN
SATA_CLKP
SATARBIAS#
SATARBIAS
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDIN0 ACZ_SDIN1 ACZ_SDIN2
ACZ_SDO
AC-97/
AZALIA
IAC_SDATAO_MDC 24
IAC_SDATAO_AUDIO 33 IAC_RESET#_AUDIO 33
5
P2
LAD0
N3 N5 N4
LPC_DRQ0#
N6
LDRQ0#
SMI#
C/BE0# C/BE1# C/BE2# C/BE3#
FRAME#
IRDY#
TRDY# STOP#
PAR SERR# PERR#
PLOCK#
REQ0# REQ1# REQ2# REQ3#
GNT0# GNT1# GNT2# GNT3#
PIRQA# PIRQB# PIRQC# PIRQD#
P4 P3
AG25 AE22 AE23 AG27 AE26 AE27 AD27 AE24
J6 H6 G4 G2
J3 A3 J2 C3 J1 E1 G5 E3 C5
L5 B5 M5 B8 F7 E8 B7
C1 B6 F1 C8 E7 F6 D8
N2 L2 M1 L3 D9 C7 C6 M3
AC19 AE3
AD3 AG2 AF2
AD7 AC7 AF6 AG6
AC2 AC1
AG11 AF11
PLOCK# REQ0#
REQ1# REQ2# REQ3# REQ4# REQ5# LAMP_STAT
PIRQA# PIRQB# PIRQC# PIRQD#
LPC_DRQ1#
THERMTRIP#_ICH
R_CPUSLP#
GNT1# GNT3#
GNT4#
ICH_GPIO2 ICH_GPIO3 ICH_GPIO4 ICH_GPIO5
SATA_RXN0_C SATA_RXP0_C SATA_TXN0_C SATA_TXP0_C
SATABIAS
C/BE0# 21,23,35 C/BE1# 21,23,35 C/BE2# 21,23,35 C/BE3# 21,23,35
FRAME# 21,23,35 IRDY# 21,23,35 TRDY# 21,23,35 DEVSEL# 21,23,35 STOP# 21,23,35 PAR 21,23,35 SERR# 21,23,35 PERR# 21,23,35 PLOCK#
R412 24 . 9 /F
Place within 500mils of ICH6 ball
C10
IAC_SYNC
B9
IAC_RESET#
A10 F11
F10 B10
IAC_SDATAO
C9
R138 39
IAC_RESET#
5
R136 39
LAD0/FWH0 25 LAD1/FWH1 25 LAD2/FWH2 25 LAD3/FWH3 25 LPC_DRQ0# 26 LPC_DRQ1# 25 LFRAME#/FWH4 25
CPUPWRGD 3
R130
1 2
SMI# 3 STPCLK# 3
DPSLP# 3
LAMP_STAT 17
GNT1# 21 GNT3# 23
GNT4# 35
PIRQA# PIRQB# 23 PIRQC# 21,35 PIRQD# 21,23
SATA_LED# 32
T45PAD T44PAD
CLK_PCIE_SATA# 15 CLK_PCIE_SATA 15
1 2
IAC_BITCLK_ICH 33
IAC_SDATAIN0 33 IAC_SDATAIN1 24
T43PAD
12
12
12
C211 *10P_NC
6
VCCP
75
+3VRUN
1 2
LAMP_STAT
REQ1# 21 REQ3# 23
REQ4# 35
REQ1 : Card Bus REQ3 : MINI PCI REQ4 : BCM4401 LAN
R421 NP boot from FWH, populate boot from MiniPCI.
1 2
R421 *1K_NC
IAC_RESET#_MDC 24
12
C210 *10P_NC
6
7
PCI Pullups
+3VRUN
1 2 1 2
REQ3#
SERIRQ
DPRSTP#
R399*0_NC R126*0_NC
ICH6_GPI711
SERIRQ11,21,25
Install R399 for Dothan-A and don't install for Dothan-B
Install R126 for Dothan-B and don't install for Dothan-A
RP9
6 7 8 9
10
10P8R-8.2K
1 2
R125 *56_NC
PCI Pullups
R501 *10K_NC
FRAME# TRDY# PLOCK# REQ5#
+3VRUN
REQ1#
6 7 8 9
10
PCI Pullups
PIRQD#
PIRQA# PIRQC#
REQ2#
+3VRUN
ICH_GPIO2 ICH_GPIO3 ICH_GPIO4 ICH_GPIO5
FERR#
Distance between the ICH-6 M and cap on the "P" signal should be identical distance between the ICH-6 M and cap on the "N" signal for same pair.
SATA_RXN0_C
SATA_RXP0_C
SATA_TXN0_C
SATA_TXP0_C
C226 3900P
1 2
C225 3900P
1 2
6 7 8 9
10
RP7
7 8 5 6 3 4 1 2
8P4R-8.2K
1 2
R128 56
SATA_RXN0_C 19
SATA_RXP0_C 19
SATA
QUANTA
Title
Size Document Number Rev
Date: Sheet
ICH6-M (CPU,PCI,IDE,SATA,AC97)
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
CPUSLP# 3,5 DPRSTP# 3
RP33
10P8R-8.2K
RP34
10P8R-8.2K
+3VRUN
VCCP
SATA_TXN0 19
SATA_TXP0 19
5 4 3 2 1
VCCP
+3VRUN
IRDY# DEVSEL# PERR# IRQ14
5 4 3 2 1
5 4 3 2 1
8
+3VRUN
SERR# REQ4#
+3VRUN
PIRQB#
REQ0#
STOP#
10 49,
8
of
Page 11
1
CLK48_USB
12
R124 10
2
3
4
5
6
7
8
12
C200
A A
+3VSUS
7 8 5 6 3 4 1 2
+3VSUS
7 8 5 6 3 4 1 2
B B
+3VRUN
C C
10P
AC terminator
RP36
PDAT_SMB
SMB_LINK_ALERT#
RP35
R132 8.2K
1 2
R152 10K
1 2 1 2
R151 10K
SMBALERT#
ICH_RI# SYS_RESET# BATLOW#
8P4R-2.2K
8P4R-10K
IMVP_PWRGD6,39,42
PM_BMBUSY#6
ICH_PWROK31,39
DMI_RXN06 DMI_RXP06
DMI_TXN06 DMI_TXP06
DMI_RXN16 DMI_RXP16
DMI_TXN16 DMI_TXP16
PWRBTN#25
SUSPWROK21,31,39
ICH6_GPI710
EXT_SMI#25
EXT_WAK#25
EXT_SCI#25
T146 PAD
PCLK_SMB15 PDAT_SMB15
THRM#25
T103 PAD T100 PAD
SPKR33
USB_VD0+19
USB_VD0-19
USB_VD2+30
USB_VD2-30
USB_VD4+32
USB_VD4-32
OC4#32
USB_VD6+32
USB_VD6-32
OC6#32
T126PAD T128PAD T130PAD T132PAD
CLK48_USB
SMBALERT#
ICH_RI# THRM# ICH_PWROK
BATLOW#
SUSPWROK IMVP_PWRGD
EXT_SMI# EXT_WAK# EXT_SCI#
OC0#
OC2#
OC4#
OC6#
For USB FDD To Dock
For Bluetooth
To IO/B To IO/B
CLK48_USB15
CLK_PCIE_ICH#15 CLK_PCIE_ICH15
THRM#
ICH_PWROK SUSPWROK MCH_SYNC#
DPRSLPVR42
R503 100K
1 2
14M_ICH15
R405
*33_NC
1 2
C525
*10P_NC
1 2
D21
USBP0P
C21
USBP0N
C27
OC0#
C19
USBP2P
D19
USBP2N
B26
OC2#
D17
USBP4P
E17
USBP4N
C23
OC4#/GPI9
D15
USBP6P
C15
USBP6N
C25
OC6#/GPI14
A27
CLK48
T25
DMI0_RXN
T24
DMI0_RXP
R27
DMI0_TXN
R26
DMI0_TXP
V25
DMI1_RXN
V24
DMI1_RXP
U27
DMI1_TXN
U26
DMI1_TXP
AD25
DMI_CLKN
AC25
DMI_CLKP
H25
HSIN0
H24
HSIP0
G27
HSON0
G26
HSOP0
K25
HSIN1
K24
HSIP1
J27
HSON1
J26
HSOP1
Y4
SMBCLK
W5
SMBDATA
W6
SMBALERT#/GPI11
T2
RI#
AC20
THRM#
AA1
PWROK
AE20
DPRSLPVR/TP1
V2
BATLOW#/TP0
U1
PWRBTN#
Y3
RSMRST#
AF21
VRMPWRGD
AD19
BM_BUSY#/GPIO6
W3
SUS_STAT#/LPCPD#
V6
SUSCLK
E10
CLK14
F8
SPKR
AE19
GPI7
R1
GPI8
M2
GPI12
R6
GPI13
AB21
GPO19
AD20
GPO21
AD21
GPO23
V3
GPIO24
D12
EE_CS
B12
EE_SHCLK
D11
EE_DOUT
F13
EE_DIN
AC5
RSVD1
AD5
RSVD2
AF4
RSVD3
AG4
RSVD4
AC9
RSVD5
U16B
PCI-EXPRESS
SM&SMI
MISC&GPIO
RESERVED
ICH6-M
USB
DMI
PM
LAN
USBP1P USBP1N
OC1# USBP3P USBP3N
OC3# USBP5P USBP5N
OC5#/GPI10
USBP7P USBP7N
OC7#/GPI15
USBRBIAS
USBRBIAS#
DMI2_RXN
DMI2_RXP DMI2_TXN DMI2_TXP
DMI3_RXN
DMI3_RXP DMI3_TXN DMI3_TXP
DMI_ZCOMP
DMI_IRCOMP
HSIN2
HSIP2
HSON2
HSOP2
HSIN3
HSIP3
HSON3
HSOP3
SMLINK0 SMLINK1
LINKALERET#
SLP_S3# SLP_S4# SLP_S5#
SYS_RESET#
WAKE#
MCH_SYNC#
STP_PCI#/GPO18
STP_CPU#/GPO20
SERIRQ
GPIO25
SATA0GP/GPIO26
GPIO27
GPIO28 SATA1GP/GPIO29 SATA2GP/GPIO30 SATA3GP/GPIO31
GPIO33
GPIO34
LAN_RXD0 LAN_RXD1 LAN_RXD2 LAN_TXD0 LAN_TXD1 LAN_TXD2 LAN_RST#
LAN_CLK
LAN_RSTSYNC
RSVD6 RSVD7 RSVD8 RSVD9
B20 A20 B27 B18 A18 C26 A16 B16 D23 B14 A14 C24 B22 A22
Y25 Y24 W27 W26
AB24 AB23 AA27 AA26
F24 F23
M25 M24 L27 L26
P24 P23 N27 N26
W4 U6 Y5
T4 T5 T6
U2 U5 AG21
AC21 AD22 AB20
P5 AF17 R3 T3 AE18 AF18 AG18
AF20 AC18
E12 E11 C13 C12 C11 E13 V5 F12 B11
AD9 AF8 AG8 U3
OC1#
OC3#
OC5#
OC7#PCLK_SMB
DMI_COMP
SMLINK0 SMLINK1
SMB_LINK_ALERT#
SYS_RESET# MCH_SYNC#
USB_VD1+ 38 USB_VD1- 38
USB_VD3+ 21 USB_VD3- 21
USB_VD5+ 32 USB_VD5- 32 OC5# 32 USB_VD7+ 32 USB_VD7- 32 OC7# 32
USBRBIAS
DMI_RXN2 6 DMI_RXP2 6 DMI_TXN2 6 DMI_TXP2 6
SLP_S3# 25 SLP_S5# 25
ICH_PCIE_WAKE# 25
STP_PCI# 15 STP_CPU# 4,15,42 SERIRQ 10,21,25
T125PAD T127PAD T129PAD T131PAD T133PAD T134PAD
PLTRST#
T136PAD T137PAD
Cardbus-USB card
DMI_RXN3 6 DMI_RXP3 6 DMI_TXN3 6 DMI_TXP3 6
T99PAD
T101PAD T102PAD
T104PAD
UAI_8040 19 UAO_8040 19
+3VSUS
R129 22.6/F
12
Place within 500mils of ICH-6
Place within 500mils of ICH-6
R396 24.9/F
12
12
R407 33
PLTRST# 6,10,16,19,25
OC0# OC3# OC1# OC2#
10
+1_5VRUN
ICH_PCIE_WAKE#
SMLINK0
SMLINK1
RP31
6 7 8 9
10P8R-10K
R415 680
1 2
R424 10K
1 2
R416 10K
1 2
R131 10K
1 2
5
OC4#
4
OC5#
3
OC7#
2
OC6#
1
+3VRUN
+3VSUS
+3VSUS
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
ICH6-M (USB,DMI,LPC)
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
11 49,
8
Page 12
1
L21
+5VSUS
+5VRUN
+3VRUN
+5VALW
+5VSUS
+3VSUS
1 2
BLM41P600SPG
R146 *10_NC
1 2
R145 100
1 2
D10
2 1
RB751V
R406 *10_NC
1 2
R404 10
1 2
D17
2 1
RB751V
+1_5VRUN
A A
B B
12
150U_2V
C218 .1U_10V
1 2
C512 .1U_10V
1 2
+
+1_5V_PCIE
C199
V5REF
V5REF_SUS
Sequence : Reference Volatge ---> Core Volatge
+1_5VRUN +1_5VSUS
+1_5V_SATA_RX
+1_5VRUN
+3VRUN
C C
+3VRUN
+3VSUS
+3VSUS
D D
C203
10U_4V
1 2
C497
.1U_10V
1 2
R395 1R
1 2
R394
1 2
1R
+1_5VRUN
C521
.1U_10V
1 2
C535 .1U_10V
1 2
C520 .1U_10V
1 2
1
BLM11A121S
+3VRUN
.1U_10V
1 2
.1U_10V
1 2
.1U_10V
1 2
L42
C529
C524
C543
12
C208
.1U_10V
1 2
2
C202 .1U_10V
1 2
C219 .1U_10V
1 2
C511 .1U_10V
1 2
+1_5V_SATA_TX
+1_5VRUN
C496
.01U
1 2
2
3
U16C
C204
C516 .1U_10V
1 2
VCCDMIPLL V5REF
.1U_10V
1 2
C544
.1U_10V
1 2
C536 .1U_10V
1 2
AA22
VCC1_5_1
AA23
VCC1_5_2
AA24
VCC1_5_3
AA25
VCC1_5_4
AB25
VCC1_5_5
AB26
VCC1_5_6
AB27
VCC1_5_7
F25
VCC1_5_8
F26
VCC1_5_9
F27
VCC1_5_10
G22
VCC1_5_11
G23
VCC1_5_12
G24
VCC1_5_13
G25
VCC1_5_14
H21
VCC1_5_15
H22
VCC1_5_16
J21
VCC1_5_17
J22
VCC1_5_18
K21
VCC1_5_19
K22
VCC1_5_20
L21
VCC1_5_21
L22
VCC1_5_22
M21
VCC1_5_23
M22
VCC1_5_24
N21
VCC1_5_25
N22
VCC1_5_26
N23
VCC1_5_27
N24
VCC1_5_28
N25
VCC1_5_29
P21
VCC1_5_30
P25
VCC1_5_31
P26
VCC1_5_32
P27
VCC1_5_33
R21
VCC1_5_34
R22
VCC1_5_35
T21
VCC1_5_36
T22
VCC1_5_37
U21
VCC1_5_38
U22
VCC1_5_39
V21
VCC1_5_40
V22
VCC1_5_41
W21
VCC1_5_42
W22
VCC1_5_43
Y21
VCC1_5_44
Y22
VCC1_5_45
AA6
VCC1_5_46
AB4
VCC1_5_47
AB5
VCC1_5_48
AB6
VCC1_5_49
AC4
VCC1_5_50
AD4
VCC1_5_51
AE4
VCC1_5_52
AE5
VCC1_5_53
AF5
VCC1_5_54
AG5
VCC1_5_55
AA7
VCC1_5_56
AA8
VCC1_5_57
AA9
VCC1_5_58
AB8
VCC1_5_59
AC8
VCC1_5_60
AD8
VCC1_5_61
AE8
VCC1_5_62
AE9
VCC1_5_63
AF9
VCC1_5_64
AG9
VCC1_5_65
AC27
VCCDMIPLL
E26
VCC3_3_1
AE1
VCCSATAPLL
AG10
VCC3_3_22
A13
VCCLAN3_3/VCCSUS3_3_1
F14
VCCLAN3_3/VCCSUS3_3_2
G13
VCCLAN3_3/VCCSUS3_3_3
G14
VCCLAN3_3/VCCSUS3_3_4
A11
VCCSUS3_3_1
U4
VCCSUS3_3_2
V1
VCCSUS3_3_3
V7
VCCSUS3_3_4
W2
VCCSUS3_3_5
Y7
VCCSUS3_3_6
A17
VCCSUS3_3_7
B17
VCCSUS3_3_8
C17
VCCSUS3_3_9
F18
VCCSUS3_3_10
G17
VCCSUS3_3_11
G18
VCCSUS3_3_12
ICH6-M
VCC
VCCSUS3_3_20
VCCLAN1_5/VCCSUS1_5_1 VCCLAN1_5/VCCSUS1_5_2
VCCSUS3_3_13 VCCSUS3_3_14 VCCSUS3_3_15 VCCSUS3_3_16 VCCSUS3_3_17 VCCSUS3_3_18 VCCSUS3_3_19
3
VCC1_5_79 VCC1_5_80 VCC1_5_81 VCC1_5_82 VCC1_5_83 VCC1_5_84 VCC1_5_85 VCC1_5_86 VCC1_5_87 VCC1_5_88 VCC1_5_89 VCC1_5_90 VCC1_5_91 VCC1_5_92 VCC1_5_93 VCC1_5_94 VCC1_5_95 VCC1_5_96 VCC1_5_97 VCC1_5_98
VCC3_3_2 VCC3_3_3 VCC3_3_4 VCC3_3_5 VCC3_3_6 VCC3_3_7 VCC3_3_8
VCC3_3_9 VCC3_3_10 VCC3_3_11
VCC3_3_12 VCC3_3_13 VCC3_3_14 VCC3_3_15 VCC3_3_16 VCC3_3_17 VCC3_3_18 VCC3_3_19 VCC3_3_20 VCC3_3_21
VCCSUS1_5_1 VCCSUS1_5_2
VCCSUS1_5_3
VCC1_5_67 VCC1_5_68
VCC1_5_69 VCC1_5_70 VCC1_5_71 VCC1_5_72 VCC1_5_73 VCC1_5_74 VCC1_5_75 VCC1_5_76 VCC1_5_77 VCC1_5_78
VCC2_5_2
VCC2_5_4
V5REF1
V5REF2 V5REF_SUS VCCUSBPLL
VCCRTC
V_CPU_IO1 V_CPU_IO2 V_CPU_IO3
AA19 AA20 AA21 L11 L12 L14 L16 L17 M11 M17 P11 P17 T11 T17 U11 U12 U14 U16 U17 F9
A6 B1 E4 H1 H7 J7 L4 L7 M7 P1
AA12 AA14 AA15 AA17 AC15 AD17 AG13 AG16 AG19 AA10
G19 R7
U7 G8 D24
D25 D26 D27 E20 E21 E22 E23 E24 F20 G20
P7 AB18
A8 AA18
F21 A25
A24 AB3
G10 G11
AB22 AD26 AG23
C16 D16 E16 F15 F16 G15 G16
4
C201 .1U_10V
1 2
C540 .1U_10V
1 2
C220 .1U_10V
1 2
+1_5VRUN
V5REF_SUS
VCCRTC
+1_5VRUN
4
C205 .1U_10V
1 2
+3_3V_PCI
C539 .1U_10V
1 2
+3_3V_ICH
C523 .1U_10V
1 2
VCCRTC
.1U_10V
1 2
C547
C522
C553
.1U_10V
1 2
C528 .1U_10V
1 2
C541 .1U_10V
1 2
C517 .1U_10V
1 2
C550 .1U_10V
1 2
C518
.1U_10V
1 2
C207
.1U_10V
1 2
C206
.1U_10V
1 2
.01U
.1U_10V
1 2
1 2
+3VRUN
+3VRUN
C542
.1U_10V
1 2
C538
.1U_10V
1 2
+3VSUS
VCCP
3.3V Can drop to 2.0V min. in G3 state)
5
C515
5
+1_5VSUS
+1_5VRUN
+2.5VRUN
C217
.01U
1 2
+1_5VRUN
+1_5VRUN
6
U16D
A1
VSS001
A12
VSS002
A15
VSS003
A19
VSS004
A21
VSS005
A23
VSS006
A26
VSS007
A4
VSS008
A7
VSS009
A9
VSS010
AA11
VSS011
AA13
VSS012
AA16
VSS013
AA4
VSS014
AB1
VSS015
AB10
VSS016
AB19
VSS017
AB2
VSS018
AB7
VSS019
AB9
VSS020
AC10
VSS021
AC12
VSS022
AC22
VSS023
AC23
VSS024
AC24
VSS025
AC26
VSS026
AC3
VSS027
AC6
VSS028
AD1
VSS029
AD10
VSS030
AD15
VSS031
AD18
VSS032
AD2
VSS033
AD24
VSS034
AD6
VSS035
AE10
VSS036
AE11
VSS037
AE12
VSS038
AE2
VSS039
AE21
VSS040
AE25
VSS041
AE6
VSS042
AE7
VSS043
AF1
VSS044
AF10
VSS045
AF12
VSS046
AF26
VSS047
AF3
VSS048
AF7
VSS049
AG1
VSS050
AG12
VSS051
AG14
VSS052
AG17
VSS053
AG20
VSS054
AG22
VSS055
AG3
VSS056
AG7
VSS057
B13
VSS058
B15
VSS059
B19
VSS060
B21
VSS061
B23
VSS062
B24
VSS063
B25
VSS064
C14
VSS065
C18
VSS066
C20
VSS067
C22
VSS068
C4
VSS069
D1
VSS070
D10
VSS071
D13
VSS072
D14
VSS073
D18
VSS074
D20
VSS075
D22
VSS076
D7
VSS077
E14
VSS078
E15
VSS079
E18
VSS080
E19
VSS081
E25
VSS082
F17
VSS083
F19
VSS084
F22
VSS085
F4
VSS086
7
GND
ICH6-M
VSS087 VSS088 VSS089 VSS090 VSS091 VSS092 VSS093 VSS094 VSS095 VSS096 VSS097 VSS098 VSS099 VSS100 VSS101 VSS102 VSS103 VSS104 VSS105 VSS106 VSS107 VSS108 VSS109 VSS110 VSS111 VSS112 VSS113 VSS114 VSS115 VSS116 VSS117 VSS118 VSS119 VSS120 VSS121 VSS122 VSS123 VSS124 VSS125 VSS126 VSS127 VSS128 VSS129 VSS130 VSS131 VSS132 VSS133 VSS134 VSS135 VSS136 VSS137 VSS138 VSS139 VSS140 VSS141 VSS142 VSS143 VSS144 VSS145 VSS146 VSS147 VSS148 VSS149 VSS150 VSS151 VSS152 VSS153 VSS154 VSS155 VSS156 VSS157 VSS158 VSS159 VSS160 VSS161 VSS162 VSS163 VSS164 VSS165 VSS166 VSS167 VSS168 VSS169 VSS170 VSS171 VSS172
G1 G12 G21 G7 G9 H23 H26 H27 J23 J24 J25 J4 K1 K23 K26 K27 K7 L13 L15 L23 L24 L25 M12 M13 M14 M15 M16 M23 M26 M27 M4 N1 N11 N12 N13 N14 N15 N16 N17 N7 P12 P13 P14 P15 P16 P22 R11 R12 R13 R14 R15 R16 R17 R23 R24 R25 R4 T1 T12 T13 T14 T15 T16 T23 T26 T27 T7 U13 U15 U23 U24 U25 V23 V26 V27 V4 W1 W23 W24 W25 W7 Y23 Y26 Y27 Y6 E27
8
QUANTA
Title
Size Document Number Rev
6
Date: Sheet
ICH6-M (POWER&GND)
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
12 49,
8
Page 13
1
+1_8VSUS
R_A_MD0 R_A_MD1
R_A_DQS#0
A A
B B
CKE06,14 CKE26,14 CKE3 6,14
R_A_BS2#7,14
R_A_BS0#7,14
R_A_BMWEA#7,14
R_A_SCASA#7,14
SM_CS1#6,14 M_ODT16,14
C C
D D
+3VRUN
R_A_DQS0 R_A_MD2
R_A_MD3 R_A_MD8
R_A_MD9 R_A_DQS#1
R_A_DQS1 R_A_MD10 R_B_MD14
R_A_MD11
R_A_MD16 R_A_MD17
R_A_DQS#2 R_A_DQS2
R_A_MD18 R_A_MD19
R_A_MD24 R_A_MD25
R_A_DM3
R_A_MD26 R_A_MD27
CKE0
R_A_BS2# R_A_MA12
R_A_MA9 R_A_MA8
R_A_MA5 R_A_MA3 R_A_MA1
R_A_MA10 R_A_BS0#
R_A_BMWEA# R_A_SCASA#
SM_CS1# M_ODT1 R_A_MD32
R_A_MD33 R_A_DQS#4
R_A_DQS4 R_A_MD34
R_A_MD35 R_A_MD40
R_A_MD41 R_A_DM5 R_A_MD42 R_A_MD46
R_A_MD43 R_A_MD48
R_A_MD49
R_A_DQS#6 R_A_DQS6
R_A_MD50
R_A_MD56 R_A_MD57
R_A_DM7 R_A_MD58
R_A_MD59
CGCLK_SMB
1
SMDDR_VREF
JDIM1
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37
11
DQS#0
13
DQS0
15
VSS48
17
DQ2
19
DQ3
21
VSS38
23
DQ8
25
DQ9
27
VSS49
29
DQS#1
31
DQS1
33
VSS39
35
DQ10
37
DQ11
39
VSS50
41
VSS18
43
DQ16
45
DQ17
47
VSS1
49
DQS#2
51
DQS2
53
VSS19
55
DQ18
57
DQ19
59
VSS22
61
DQ24
63
DQ25
65
VSS23
67
DM3
69
NC4
71
VSS9
73
DQ26
75
DQ27
77
VSS4
79
CKE0
81
VDD7
83
NC1
85
A16_BA2
87
VDD9
89
A12
91
A9
93
A8
95
VDD5
97
A5
99
A3
101
A1
103
VDD10
105
A10/AP
107
BA0
109
WE#
111
VDD2
113
CAS#
115
S1#
117
VDD3
119
ODT1
121
VSS11
123
DQ32
125
DQ33
127
VSS26
129
DQS#4
131
DQS4
133
VSS2
135
DQ34
137
DQ35
139
VSS27
141
DQ40
143
DQ41
145
VSS29
147
DM5
149
VSS51
151
DQ42
153
DQ43
155
VSS40
157
DQ48
159
DQ49
161
VSS52
163
NCTEST
165
VSS30
167
DQS#6
169
DQS6
171
VSS31
173
DQ50
175
DQ51
177
VSS33
179
DQ56
181
DQ57
183
VSS3
185
DM7
187
VSS34
189
DQ58
191
DQ59
193
VSS14
195
SDA
197
SCL
199
VDD(SPD)
PC4800 DDR2
CLOCK 0,1,2
2
+1_8VSUS
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
SO-DIMM (200P)
PC4800 DDR2 SDRAM
84
A15
86
A14
88
VDD11
90
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
2
R_A_MD4 R_A_MD5
R_A_DM0 R_A_MD6
R_A_MD7 R_A_MD12
R_A_MD13 R_A_DM1
CLK_SDRAM0
CLK_SDRAM0#
R_A_MD14 R_A_MD15
R_A_MD20 R_A_MD21
R_A_DM2 R_A_MD22
R_A_MD23 R_A_MD28
R_A_MD29 R_A_DQS#3
R_A_DQS3 R_A_MD30
R_A_MD31 CKE1
R_A_MA11 R_A_MA7 R_A_MA6
R_A_MA4 R_A_MA2 R_A_MA0
R_A_BS1# R_A_SRASA#
SM_CS0#
M_ODT0 R_A_MA13
R_A_MD36 R_A_MD37
R_A_DM4 R_A_MD38
R_A_MD39 R_A_MD44
R_A_MD45 R_A_DQS#5
R_A_DQS5
R_A_MD47 R_A_MD52
R_A_MD53 CLK_SDRAM1
CLK_SDRAM1# R_A_DM6 R_A_MD54
R_A_MD55R_A_MD51 R_A_MD60
R_A_MD61 R_A_DQS#7
R_A_DQS7 R_A_MD62
R_A_MD63
R466 10K
1 2
3
CLK_SDRAM0 6 CLK_SDRAM0# 6
CKE1 6,14
R_A_BS1# 7,14 R_A_SRASA# 7,14 SM_CS0# 6,14
M_ODT0 6,14
CLK_SDRAM1 6 CLK_SDRAM1# 6
R467 10K
1 2
SMbus address A0
3
R_A_DM[0..7] 7 R_A_MD[0..63] 7 R_A_DQS[0..7] 7 R_A_DQS#[0..7] 7 R_A_MA[0..13] 7,14
R_B_BS2#7,14
R_B_BS0#7,14
R_B_BMWEA#7,14
R_B_SCASA#7,14
SM_CS3#6,14 M_ODT36,14
CGDAT_SMB15,17 CGCLK_SMB15,17
+3VRUN
4
+1_8VSUS +1_8VSUS
SMDDR_VREF
R_B_MD0 R_B_MD1
R_B_DQS#0 R_B_DQS0
R_B_MD2 R_B_MD3
R_B_MD8 R_B_MD9
R_B_DQS#1 R_B_DQS1
R_B_MD10 R_B_MD11
R_B_MD16 R_B_MD17
R_B_DQS#2 R_B_DQS2
R_B_MD18 R_B_MD19
R_B_MD24 R_B_MD25
R_B_DM3
R_B_MD26 R_B_MD27
CKE2
R_B_BS2# R_B_MA12
R_B_MA9 R_B_MA8
R_B_MA5 R_B_MA3 R_B_MA1
R_B_MA10 R_B_BS0#
R_B_BMWEA# R_B_SCASA#
SM_CS3# M_ODT3 R_B_MD32
R_B_MD33 R_B_DQS#4
R_B_DQS4 R_B_MD34
R_B_MD35 R_B_MD40
R_B_MD41 R_B_DM5 R_B_MD42 R_B_MD46
R_B_MD43 R_B_MD48
R_B_MD49
R_B_DQS#6 R_B_DQS6
R_B_MD50
R_B_MD56 R_B_MD57
R_B_DM7 R_B_MD58
R_B_MD59
CGDAT_SMBCGDAT_SMB CGCLK_SMB
11 13 15 17 19 21 23 25 27 29 31 33 35 37 39
41 43 45 47 49 51 53 55 57 59 61 63 65 67 69 71 73 75 77 79 81 83 85 87 89 91 93 95 97
99 101 103 105 107 109 111 113 115 117 119 121 123 125 127 129 131 133 135 137 139 141 143 145 147 149 151 153 155 157 159 161 163 165 167 169 171 173 175 177 179 181 183 185 187 189 191 193 195 197 199
JDIM2
1
VREF
3
VSS47
5
DQ0
7
DQ1
9
VSS37 DQS#0 DQS0 VSS48 DQ2 DQ3 VSS38 DQ8 DQ9 VSS49 DQS#1 DQS1 VSS39 DQ10 DQ11 VSS50
VSS18 DQ16 DQ17 VSS1 DQS#2 DQS2 VSS19 DQ18 DQ19 VSS22 DQ24 DQ25 VSS23 DM3 NC4 VSS9 DQ26 DQ27 VSS4 CKE0 VDD7 NC1 A16_BA2 VDD9 A12 A9 A8 VDD5 A5 A3 A1 VDD10 A10/AP BA0 WE# VDD2 CAS# S1# VDD3 ODT1 VSS11 DQ32 DQ33 VSS26 DQS#4 DQS4 VSS2 DQ34 DQ35 VSS27 DQ40 DQ41 VSS29 DM5 VSS51 DQ42 DQ43 VSS40 DQ48 DQ49 VSS52 NCTEST VSS30 DQS#6 DQS6 VSS31 DQ50 DQ51 VSS33 DQ56 DQ57 VSS3 DM7 VSS34 DQ58 DQ59 VSS14 SDA SCL VDD(SPD)
PC4800 DDR2_R
5
SMDDR_VREFSMDDR_VREF
2
VSS46
4
DQ4
6
DQ5
8
VSS15
10
DM0
12
VSS5
14
DQ6
16
DQ7
18
VSS16
20
DQ12
22
DQ13
24
VSS17
26
DM1
28
VSS53
30
CK0
32
CK0#
34
VSS41
36
DQ14
38
DQ15
40
VSS54
42
VSS20
44
DQ20
46
DQ21
48
VSS6
50
NC3
52
DM2
54
VSS21
56
DQ22
58
DQ23
60
VSS24
62
DQ28
64
DQ29
66
VSS25
68
DQS#3
70
DQS3
72
VSS10
74
DQ30
76
DQ31
78
VSS8
80
CKE1
82
VDD8
SO-DIMM (200P)
PC4800 DDR2 SDRAM
84
A15
86
A14
88
VDD11
90
A11
92
A7
94
A6
96
VDD4
98
A4
100
A2
102
A0
104
VDD12
106
BA1
108
RAS#
110
S0#
112
VDD1
114
ODT0
116
A13
118
VDD6
120
NC2
122
VSS12
124
DQ36
126
DQ37
128
VSS28
130
DM4
132
VSS42
134
DQ38
136
DQ39
138
VSS55
140
DQ44
142
DQ45
144
VSS43
146
DQS#5
148
DQS5
150
VSS56
152
DQ46
154
DQ47
156
VSS44
158
DQ52
160
DQ53
162
VSS57
164
CK1
166
CK1#
168
VSS45
170
DM6
172
VSS32
174
DQ54
176
DQ55
178
VSS35
180
DQ60
182
DQ61
184
VSS7
186
DQS#7
188
DQS7
190
VSS36
192
DQ62
194
DQ63
196
VSS13
198
SA0
200
SA1
CLOCK 3,4,5
CKE 2,3CKE 0,1
4
5
+3VRUN
R_B_MD4 R_B_MD5
R_B_DM0 R_B_MD6
R_B_MD7 R_B_MD12
R_B_MD13 R_B_DM1
CLK_SDRAM3
CLK_SDRAM3#
R_B_MD15
R_B_MD20 R_B_MD21
R_B_DM2 R_B_MD22
R_B_MD23 R_B_MD28
R_B_MD29 R_B_DQS#3
R_B_DQS3 R_B_MD30
R_B_MD31 CKE3
R_B_MA11 R_B_MA7 R_B_MA6
R_B_MA4 R_B_MA2 R_B_MA0
R_B_BS1# R_B_SRASA#
SM_CS2#
M_ODT2 R_B_MA13
R_B_MD36 R_B_MD37
R_B_DM4 R_B_MD38
R_B_MD39 R_B_MD44
R_B_MD45 R_B_DQS#5
R_B_DQS5
R_B_MD47 R_B_MD52
R_B_MD53 CLK_SDRAM4
CLK_SDRAM4# R_B_DM6 R_B_MD54
R_B_MD55R_B_MD51 R_B_MD60
R_B_MD61 R_B_DQS#7
R_B_DQS7 R_B_MD62
R_B_MD63
R468 10K
1 2
6
R_B_DM[0..7] 7 R_B_MD[0..63] 7 R_B_DQS[0..7] 7 R_B_DQS#[0..7] 7 R_B_MA[0..13] 7,14
CLK_SDRAM3 6 CLK_SDRAM3# 6
R_B_BS1# 7,14 R_B_SRASA# 7,14 SM_CS2# 6,14
M_ODT2 6,14
CLK_SDRAM4 6 CLK_SDRAM4# 6
R469 10K
1 2
SMbus address A4
6
7
+1_8VSUS
8
Place these Caps near So-Dimm1.
12
12
C662
C663
2.2U_6.3V
2.2U_6.3V
+1_8VSUS
Place these Caps near So-Dimm1.
12
12
C668
C667
.1U_10V
.1U_10V
SMDDR_VREF
12
12
C672
C671
2.2U_6.3V
.1U_10V
12
2.2U_6.3V
12
C669 .1U_10V
C664
12
C670 .1U_10V
+3VRUN
12
12
C665
2.2U_6.3V
C673
2.2U_6.3V
12
C666
2.2U_6.3V
12
C674
.1U_10V
Place these Caps near So-Dimm1. No Vias Between the Trace of PIN to CAP.
+1_8VSUS
Place these Caps near So-Dimm2.
12
C675
2.2U_6.3V
+1_8VSUS
Place these Caps near So-Dimm2.
12
C680 .1U_10V
SMDDR_VREF
12
C684 .1U_10V
12
C676
2.2U_6.3V
12
C681 .1U_10V
12
C685
2.2U_6.3V
12
2.2U_6.3V
12
C682 .1U_10V
C677
12
C683 .1U_10V
+3VRUN
12
2.2U_6.3V
12
C686
2.2U_6.3V
C678
12
C679
2.2U_6.3V
12
C687
.1U_10V
Place these Caps near So-Dimm2. No Vias Between the Trace of PIN to CAP.
QUANTA
Title
Size Document Number Rev
Date: Sheet
System DRAM Expansion (200P-DDR_SODIMM X 2)
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
13 49,
8
Page 14
1
2
3
4
5
6
7
8
DDRII DUAL CHANNEL A,B.
A A
SMDDR_VTERM
12
C688
.1U_10V
DDRII A CHANNEL DDRII B CHANNEL
R_A_MA[0..13] 7,13 R_B_MA[0..13] 7,13
No Vias Between the Trace of PIN to CAP. No Vias Between the Trace of PIN to CAP.
12
C689
.1U_10V
12
C690
.1U_10V
12
C691
.1U_10V
12
C692
.1U_10V
12
C693
.1U_10V
12
C694
.1U_10V
12
C695
.1U_10V
12
C696
.1U_10V
12
C697
.1U_10V
12
C698
.1U_10V
12
C699
.1U_10V
12
C700
.1U_10V
SMDDR_VTERM
12
C701
.1U_10V
12
C702
.1U_10V
12
C703
.1U_10V
12
C704
.1U_10V
12
C705
.1U_10V
12
C706
.1U_10V
12
C707
.1U_10V
12
C708
.1U_10V
12
C709
.1U_10V
12
C710
.1U_10V
12
C711
.1U_10V
12
C712
.1U_10V
12
C713
.1U_10V
Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM. Layout note: Place 1 cap close to every 1 R-pack terminated to SMDDR_VTERM.
R_A_MA7 R_A_MA11 R_A_MA4 R_A_MA6
R_A_SRASA#7,13
B B
C C
R_A_BS1#7,13
M_ODT06,13
R_A_BS2#7,13
R_A_BS0#7,13
R_A_BMWEA#7,13
R_A_SCASA#7,13
R_A_SRASA# R_A_BS1#
R_A_MA13 M_ODT0 R_A_BS2# R_A_MA12 R_A_MA9 R_A_MA8 R_A_MA5 R_A_MA3
R_A_MA10 R_A_BS0# R_A_BMWEA# R_A_SCASA# R_A_MA0 R_A_MA2
R_A_MA1
M_ODT16,13
SM_CS0#6,13
SM_CS1#6,13
M_ODT1
CKE06,13
CKE16,13
SM_CS0#
SM_CS1#
2 4 2 4 2 4
2 4 2 4 2 4 2 4
2 4 2 4 2 4
R470 56
1 2
R472 56
1 2
R474 56
1 2
R476 56
1 2
R479 56
1 2
R481 56
1 2
1 3 1 3 1 3
1 3 1 3 1 3 1 3
1 3 1 3 1 3
RP41 4P2R-S-56 RP43 4P2R-S-56 RP45 4P2R-S-56
RP47 4P2R-S-56 RP49 4P2R-S-56 RP51 4P2R-S-56 RP53 4P2R-S-56
RP55 4P2R-S-56 RP57 4P2R-S-56 RP59 4P2R-S-56
CKE0
CKE1
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
R_B_SRASA#7,13
R_B_BS1#7,13
R_B_BS0#7,13
R_B_BMWEA#7,13
SM_CS3#6,13
M_ODT26,13
R_B_SCASA#7,13
R_B_SRASA# R_B_BS1# R_B_MA12 R_B_MA9 R_B_MA8 R_B_MA5
R_B_MA3 R_B_MA1 R_B_MA10 R_B_BS0# R_B_BMWEA# SM_CS3# R_B_MA7 R_B_MA11
R_B_MA4 R_B_MA6 R_B_MA0 R_B_MA2 R_B_MA13 M_ODT2
R_B_BS2#7,13
M_ODT36,13
CKE26,13
CKE36,13
SM_CS2#6,13
2
RP42 4P2R-S-56
4 2
RP44 4P2R-S-56
4 2
RP46 4P2R-S-56
4
2
RP48 4P2R-S-56
4 2
RP50 4P2R-S-56
4 2
RP52 4P2R-S-56
4 2
RP54 4P2R-S-56
4
2
RP56 4P2R-S-56
4 2
RP58 4P2R-S-56
4 2
RP60 4P2R-S-56
4
CKE2
CKE3
R471 56
1 2
R473 56
1 2
R475 56
1 2
R477 56
1 2
R478 56
1 2
R480 56
1 2
R_B_BS2#
M_ODT3
SM_CS2#
R_B_SCASA#
1 3 1 3 1 3
1 3 1 3 1 3 1 3
1 3 1 3 1 3
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERMSMDDR_VTERM
SMDDR_VTERM
SMDDR_VTERM
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
DDR RES.ARRAY
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
14 49,
8
Page 15
1
FSC FSB FSA CPU SRC PCI 1 0 1 100 100 33 0 0 1 133 100 33
2
3
4
5
6
7
8
Place these termination to close CK410M. Cause those Pin-out is for Cu rrent-Mode.
0 1 1 166 100 33 0 1 0 200 100 33 0 0 0 266 100 33 1 0 0 333 100 33
A A
1 1 0 400 100 33 1 1 1 RSVD 100 33
R368 *10K_NC
1 2
R351 *0_N C
1 2
R337 *0_NC
1 2
SELPSB0_CLK
SELPSB1_CLK
SELPSB2_CLK
Depop R337 for Dothan-B
B B
+3VRUN
L36
1 2
ACB2012L-120
120 ohms@100Mhz
R358 10K
1 2
R350 *0_NC
1 2
R342 *10K_NC
1 2
CLKVDD
12
12
C454
C434
.047U
.047U
12
C455 .047U
VCCP
+3VRUN
12
C436 .047U
CLK48_USB11
12
C421
4.7U_10V_0805
SELPSB1_CLK4,6 SELPSB2_CLK4,6
C448 27P
12
C451 27P
12
CLK_EN#17,42
STP_PCI#11
STP_CPU#4 ,11,42
SMbus address D2
R367 33
1 2
12
Y3
14.318MHZ
SELPSB0_CLK SELPSB1_CLK SELPSB2_CLK
VDDREF_CR
CLKVDD CLKVDD1
CLKVDD
VDD48_CR
R338 475/F
1 2
XIN
XOUT
CLK_EN#
CGCLK_SMB CGDAT_SMB
IREF
Iref=5mA, Ioh=4*Iref
RP29
R346 2.2
1 2
+3VRUN
C C
L37 ACB2012L-120
120 ohms@100Mhz
CLKVDD1
12
R356 2.2
1 2
R336 1R
1 2
VDDA_CR
12
C457 .047U
VDD48_CR
VDDREF_CR
12
C435 .047U
12
C458 .047U
12
C456 .047U
12
C446
4.7U_10V_0805
12
C459
4.7U_10V_0805
12
C460
4.7U_10V_0805
12
C437 .047U
DOT966 DOT96#6
4 2
4P2R-S-33
R_DOT96
3
R_DOT96#
1
SMBus
PDAT_SMB11
U30
50
XTAL_IN
49
XTAL_OUT
10
VTT_PWRGD#/PD#
55
PCI_STOP#
54
CPU_STOP#
46
SCLK
47
SDATA
12
FSA/USB_48
16
FSB/TEST_MODE
53
FSC/TEST_SEL
48
VDD_REF
42
VDD_CPU
1
VDD_PCI_1
7
VDD_PCI_2
21
VDD_SRC0
28
VDD_SRC1
34
VDD_SRC2
11
VDD_48
39
IREF
14
DOT96
15
DOT96#
VDDA_CR
GND_48
13
+3VRUN
3 1
Q37 2N7002
+3VRUN
37
VDDA
CPU2#_ITP/SRC7#
CK-410M
GND_REF
GND_PCI_26GND_SRC29GND_CPU
GND_PCI_1
2
51
45
2
38
REF
VSSA
CPU0
CPU0#
CPU1
CPU1#
CPU2_ITP/SRC7
SRC6
SRC6#
SRC5
SRC5#
SRC4
SRC4#
SRC3
SRC3#
SRC2
SRC2#
SRC1
SRC1#
SRC0
SRC0#
PCI5 PCI4 PCI3 PCI2
PCIF1
PCIF0/ITP_EN
ICS954201/CY28411
250mA ( MAX. )
2
4
RP25 4P2R-S-10K
1
3
CGDAT_SMB
14M_REF
52
R_HCLK_MCH
44
R_HCLK_MCH#
43
R_HCLK_CPU
41
R_HCLK_CPU#
40
R_HCLK_ITP
36
R_HCLK_ITP#
35 33
32
R_MCH_3GPLL
31
R_MCH_3GPLL#
30
R_PCIE_SATA
26
R_PCIE_SATA#
27
R_PCIE_ICH
24
R_PCIE_ICH#
25 22
23
R_DOT100_SS DOT100_SS
19 20
17 18
R_PCLK_PCM
5
R_PCLK_SIO
4
R_PCLK_DOCK
3
R_PCLK_MINI
56
R_PCLK_ICH
9
R_PCLK_LAN
8
CGDAT_SMB 13,17
Split Power Plane to avoid SSN/SN.
2
D D
PCLK_SMB11
3 1
Q36 2N7002
These are for backdrive issue
1
2
3
4
CGCLK_SMB
CGCLK_SMB 13,17
5
1 2
+3VRUN
R357 *10K_NC
R333 49.9/F
1 2
R332 49.9/F
1 2
R335 49.9/F
1 2
R334 49.9/F
1 2
R331 49.9/F
1 2
R330 49.9/F
1 2
RP28
4P2R-S-33
1 2 1 2 1 2
RP24
3 1
4P2R-S-33 RP23
3 1
4P2R-S-33 RP22
3 1
4P2R-S-33
RP21
3 1
4P2R-S-33 RP26
1 3
4P2R-S-33 RP27
1 3
4P2R-S-33
1 3
R354 39 R343 39 R492 39
6
4 2
4 2
4 2
4 2
2 4
2 4
2 4
R353 39 R355 39 R352 39
DOT100#_SSR_DOT100#_SS
1 2 1 2 1 2
R339 24
1 2
R340 24
1 2
R341 24
1 2
HCLK_MCH 5 HCLK_MCH# 5
HCLK_CPU 3 HCLK_CPU# 3
HCLK_ITP 3 HCLK_ITP# 3
CLK_MCH_3GPLL 6 CLK_MCH_3GPLL# 6
CLK_PCIE_SATA 10 CLK_PCIE_SATA# 10
CLK_PCIE_ICH 11 CLK_PCIE_ICH# 11
DOT100_SS 6 DOT100#_SS 6
PCLK_PCM 21 PCLK_SIO 26 PCLK_DOCK 38 PCLK_MINI 23 PCLK_ICH 10 PCLK_LAN 35
CLK_MCH_3GPLL CLK_MCH_3GPLL#
CLK_PCIE_SATA CLK_PCIE_SATA#
CLK_PCIE_ICH CLK_PCIE_ICH#
DOT96 DOT96#
DOT100_SS DOT100#_SS
12
C429 *10P_NC
R329 49.9/F
1 2
R328 49.9/F
1 2
R360 49.9/F
1 2
R359 49.9/F
1 2
R362 49.9/F
1 2
R361 49.9/F
1 2
R366 49.9/F
1 2
R365 49.9/F
1 2
R364 49.9/F
1 2
R363 49.9/F
1 2
12
C430 *10P_NC
CLK_SSC_IN 17
14M_SIO 26
14M_ICH 11
Place these termination to close CK410M. Cause those Pin-out is for Cu rrent-Mode.
QUANTA
Title
Size Document Number Rev
Date: Sheet
CLOCK GENERATOR
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
15 49,
8
Page 16
5
4
3
2
1
Placed this Bypass capacitor close to OVCC.
R195 5.6K
D D
C C
B B
+2.5VRUN
+2.5VRUN
+5VRUN
+5VRUN
1 2
R202 5.6K
1 2
R186 2.2K
R193 2.2K
+3VRUN
+3VRUN
+1_8VRUN
+3VRUN
SDVO_CTRLCLK
SDVO_CTRLDATA
12
12
1 2
1 2
1 2
DVI_SDAT
DVI_SCLK
L8 BLM11A601S
1 2
L26 BLM11A601S
L28 BLM11A601S
L27 BLM11A601S
12
C21 .1U_10V
12
C23 .1U_10V
12
C22 .1U_10V
12
C35 .1U_10V
12
12
12
12
C29 .1U_10V
DVI_SPVCC
12
C40 10U_6.3V
DVI_PVCC1
C262 10U_6.3V
DVI_VCC
C24 .1U_10V
DVI_PVCC2
C267 10U_6.3V
+3VRUN
12
C296 10U_6.3V
12
C32 10U_6.3V
+3VRUN
SDVO_CTRLDATA6
SDVO_CTRLCLK6
PLTRST#6,10,11,19,25
DVI_SCLK38
DVI_SDAT38
12
DVI_CLK-38 DVI_CLK+38
DVI_TX0-38 DVI_TX0+38
DVI_TX1-38 DVI_TX1+38
DVI_TX2-38 DVI_TX2+38
C25 .1U_10V
R12 *1K_NC
1 2
SDVOB_R+6 SDVOB_R-6
SDVOB_G+6 SDVOB_G-6
SDVOB_B+6 SDVOB_B-6
SDVOB_CLK+6 SDVOB_CLK-6
R11 1K
1 2
+3VRUN
C295 .1U_10V
INT-
1 2
C293 .1U_10V
INT+
1 2
40
46
44
38
41
47
42
48
45
39
43
SVCC2
SDVOB_G-
SDVOB_B+
SDVOB_G+
37
SGND1
SDVOB_R-
SDVOB_R+
SVCC1
EXT_RES
SDVOB_INT-
SDVOB_INT+
GND2
HTPLG
PGND2
PVCC2
EXT_SWING
24
VCC3
TEST
VCC2
36
EXT_RES
35 34
INT-
33
INT+
32 31 30 29 28 27 26 25
R8 100
1 2
12
R482 10K
EXT_RES
12
C33 .1U_10V
12
R13 1K
C18 .1U_10V
12
C37 .1U_10V
DVI_DETECT 38
12
12
C19 .1U_10V
DVI_SVCC
12
C36 10U_6.3V
DVI_AVCC
12
C17 10U_6.3V
U5
SPVCC
SGND2
SDVOB_B-
SDVOB_CLK-
1
OVCC
2
RESET#
3
SPGND
4
SDSDA
5
SDSCL
6
A1
7
GND1
8
SCLDDC
9
SDADCC
10
VCC1
11
PVCC1
12
AGND
SI1362
SDVOB_CLK+
TXC-13TXC+14AVCC115TX0-16TX0+17AGND118TX1-19TX1+20AVCC221TX2-22TX2+23AGND2
SDVOB_INT- 6
SDVOB_INT+ 6
L9 BLM18PG181SN1
1 2
L7 BLM11A601S
1 2
+1_8VRUN
+3VRUN
DVI_TX0+
R190 110/F
DVI_TX1+ DVI_TX2+ DVI_CLK+
A A
1 2
R182 110/F
1 2
R189 110/F
1 2
R183 110/F
1 2
Put these 4 Resistors and 4 Capacitors close to the TX pin of SDVO device
C273 .1U_10V
1 2
C263 .1U_10V
1 2
C272 .1U_10V
1 2
C264 .1U_10V
1 2
DVI_TX0­DVI_TX1­DVI_TX2­DVI_CLK-
QUANTA
Title
Size Document Number Rev
5
4
3
2
Date: Sheet
SIL 1362 DVI
Tahiti(DM3L) 1A
星期二
29, 2005
三月
1
of
16 49,
Page 17
5
15V LCDVCC+3VRUN
R187
+3VRUN
+3VALW
12
R17
Q9
BSS138
*47K_NC
3
2
1
D D
FPVCC6,26
330K
1 2
12
R18 47K
LCDVCC_ON
31
2
Q21
2N7002
6 5 2 1
Q20 FDC653N
3
C277 .01U
1 2
Panel Core Power
4
4
12
C271
Q8
2N7002
C266 22U
.01U
1 2
R14 47_0805
1 2 31
2
3
J3
INV_PWR_SRC
LAMP_STAT10
LCD_TST25
TXLOUT0+6
TXLOUT2-6 TXLOUT2+6
R498
0
12
DDC_DATA_V DDC_CLK_V
1770302-1
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
2
+5VALW
LCDVCC
+3VRUN
TXLOUT1- 6TXLOUT0-6 TXLOUT1+ 6
TXLCLKOUT- 6 TXLCLKOUT+ 6
12
C724 47P
LCDVCC
12
.1U_10V
C38
15 14 13 12 11 10
9 8 7 6 5 4 3 2 1
VEDID_PWR
FPBACK_C
12
12
.047U
C39
C725 47P
+3VRUN
1
PBAT_SMBDAT 26,41,47 PBAT_SMBCLK 26,41,47
12
C274
.1U_10V
Back Light Enable controller
FPBACK6
C C
DDC_CLK6
DDC_DATA6
B B
R60
A A
R61
*10K_NC
1 2
R62
*10K_NC
1 2
FPBACK_EN25
+2.5VRUN +2.5VRUN
1 2
+2.5VRUN
1 2
CLK_SSC_IN15
CGCLK_SMB13,15
CGDAT_SMB13,15
*10K_NC
1 2
CLK_EN#15,42
14M_AC9733
Spread spectrum(LVDS)
5
R208
2.2K
R209
2.2K
+3VRUN
2 1
1
1
R55 *3 3_NC
CLK_SSC_IN
5
U23
7SH08
+2.5VRUN
*10K_NC
1 2
2
Q24 BSS138
2
Q25 BSS138
R54
C311
.047U
12
12
12
4
3
3
1 2
SSC_S3 SSC_S2 SSC_S1
R58 *33_NC
C83 *10P_NC
FPBACK_C
+3VRUN
R191
2.2K
1 2
DDC_CLK_V
+3VRUN
R201
2.2K
1 2
DDC_DATA_V
I2C Bus
SSCD_VDD
12
C71
R59
0
*.1U_10V_NC
RP3
4 2
*4P2R-S-33_NC
R45 *475/F_NC
1 2
U8
1
CLKIN
2
S3
3
S2
4
S1
7
SCLK
8
SDATA
5
PWRDWN
6
REFOUT/SEL
*MK1493-05GT_NC
14M_AC9733 CLK_SSC_IN 15
4
VDDA
VDD
CLKOUT
CLKOUT#
IREF
VSSIREF
VSS
VSSA
16 9
12 11
14 13
10 15
R_DREFSSCLK R_DREFSSCLK#
PWR_SRC
12
R214 100K
INV_PWR_SRC_ON
12
R213 47K
INV_PWR_SRC_ON_R
Slave Adress : 58H
*BLM21B331SB_NC
1 2
12
C75 *10U_6.3V_NC
3 1
R46
*49.9/F_NC
3
L17
1 2
1 2
C301 .1U_50V
1 2
R47 *49.9/F_NC
INV_PWR_SRC
Q26
AO6405
4
3
31
+3VRUN
6 5 2 1
2
Q27 2N7002
DREFSSCLK 6 DREFSSCLK# 6
12
.1U_50V
+3VRUN
C297
12
C298
.1U_50V
LCD CONN
+5VALW
D15
1
2
+5VALW
1
2
Diode Terminator/ ESD Protector
QUANTA
Title
Size Document Number Rev
2
Date: Sheet
LCD CONN&CK-SSCD
Tahiti(DM3L) 1A
星期二
29, 2005
三月
DA204U
D14
DA204U
PBAT_SMBCLK
3
PBAT_SMBDAT
3
of
17 49,
1
Page 18
A
B
C
+5VRUN
D
E
21
D2
L22
1
12
C242
4.7P
+2.5VRUN
3
1 2
BLM18BB470SN1D
L23
1 2
BLM18BB470SN1D
L24
1 2
BLM18BB470SN1D
2
Q3 BSS138
12
C237 10P
12
12
C235
C233
*4.7P_NC
*4.7P_NC
3
12
C234 10P
12
C7
*10P_NC
12
*10P_NC
4 4
CRT_VCC
C4
12
.1U_10V
VGAHSYNC6
3 3
VGAVSYNC6
AHCT1G125DCH
1
53
2 4
1
53
2 4
AHCT1G125DCH
U2
U3
VGA_RED6,38
VGA_GRN6,38
VGA_BLU6,38
R2 1K
1 2
DAT_DDC26
CLK_DDC26
R494 0
1 2
R495 0
1 2
12
R161 75/F
12
R160 75/F
RP11
4P2R-S-2.2K
12
R159 75/F
+2.5VRUN
1
3
2
4
1
HSYNC 38
VSYNC 38
12
C244
4.7P
+2.5VRUN
12
C243
4.7P
2
Q2 BSS138
12
C236 *4.7P_NC
L2
1 2
BLM11A121S L3
1 2
BLM11A121S
C6
JVGA_R
M_SEN#38
JVGA_G
JVGA_B
T46 PAD
CRT_VCC
1
3
2
4
12
C3 10P
RP10
4P2R-S-2.2K
JVGA_HS
JVGA_VS
12
C5 10P
JVGA_NC
RB500V-40
C2 .01U
CRT_VCC
6
11
1 7
12
2 8
13
3 9
14
4 10 15
5
12
DS01A91-WL36
<VENDOR>
JVGA2
DOCK_DAT_DDC2 38
DOCK_CLK_DDC2 38
12
12
12
C239
*.1U_NC
C238
*.1U_NC
C240
*.1U_NC
+2.5VRUN
1
D11
2
+2.5VRUN
1
D12
2
+2.5VRUN
1
D13
2
DA204U
DA204U
DA204U
VGA_RED
3
VGA_GRN
3
VGA_BLU
3
Level Shift
CRT
ESD Protector
CT_0310: Change L4~L6 from 1.8UH to BLM18BD151SN1. Change C8~C13 from 82P to 6P to follow Azada design.
2 2
TV_C/R6,38
TV_Y/G6,38
TV_COMP6,38
1 1
TV_C/R
TV_Y/G
TV_COMP
150/F
150/F
150/F
12
R3
12
R4
12
R5
1 2
BLM18BD151SN1
12
C13 6pF
1 2
BLM18BD151SN1
12
C11 6pF
1 2
BLM18BD151SN1
12
C12 6pF
CLOSE TO JTV1
L4
12
L6
12
L5
12
C9 6pF
C10 6pF
C8 6pF
TV_Y/G_L
TV_COMP_L TV_C/R_L
TV-OUT
A
B
+3VRUN
+3VRUN
1
2
D3 *DA204U_NC
1
2
D4 *DA204U_NC
C
3
JTV2
4 1 5 2 7 3 6
SUYIN_35134A-06T1
+3VRUN
3
D5 *DA204U_NC
1
2
Title
Size Document Number Rev
D
Date: Sheet
QUANTA COMPUTER
CRT&TV CONN
Tahiti(DM3L) 1A
星期二
29, 2005
三月
E
of
18 49,
3
Page 19
1
SATA_RXP0_C10
SATA_RXN0_C10
A A
UAO_804011
UAI_804011
+3VRUN +3VRUN
+3VRUN
+3VRUN
8040_VAA
12
C483
2.2U_6.3V
8040_VSS
B B
+3VRUN
C C
D D
+3VRUN
BLM11A121S
+3VRUN
8040_VSS
*27P_NC
1 2
*27P_NC
1 2
L44
10U_6.3V
*25MHz_NC
HDDC_EN#25
SATA_RXP0_C SATA_RXP0
SATA_RXN0_C SATA_RXN0
SATA_TXP010 SATA_TXN010
R377 0 R376 0
PLTRST#6,10,11,16,25
R370 *10K_NC
1 2
R371 *10K_NC
1 2
R372 *10K_NC
1 2
R373 10K
1 2
R374 10K
1 2
R375 10K
1 2
R400 10K
1 2
R398 *10K_NC
1 2
L39
BLM11A121S
C490
C495
C507
X3
12
12
12
C486 .1U_10V
12
12
.1U_10V
+5VRUN
+5VSUS
15V
R148 *100K_NC
8040_VAA
POWER SWITCH
1
SATA_RXP0 SATA_RXN0
1 2 1 2
+3VRUN +1_8VRUN
12
XTALO_HD
R386 *1M_NC
XTALI_HD
R403 10K
C506
8040_VSS
1 2
6 5 2 1
47K
2
2
C223 3900P
1 2
C224 3900P
1 2
C485 .1U_10V
1 2
R436
0_0805
Q15 *AO6402_NC
3
12
3
47K
1
2
U33
32
TX_P
31
TX_M
27
RX_P
28
RX_M
45
UAO
43
UAI
17
RST_N
33
T0
34
T1
35
T2
36
T3
37
T4
38
T5
39
T6
40
T7
18
CNFG0
19
CNFG1
20
CNFG2
21
ATAIOSEL
4
VDDIO1
44
VDDIO2
9
VDD1
41
VDD2
56
VDD3
24
VAA1
29
VAA2
23
XTLOUT
22
XTLIN/OSC
88SA8040
4 1
+5VSATA
+5VSATA
4
12
+
C229 100U/6.3V
CC3528
12
C221
*.01U_NC
Q14 *DTC144EUA_NC
H_DIOR_N/H_DMARDY_N/H_STROBE
H_IORDY/H_DSTROBE/H_DDMARDY_N
R397 0
1 2
Y4
VCC OE
25MHz_Q
<tolerance>
OUT
VSS
OSC_25MHZOSC_25MHZ_VCC
3 2
MODC_EN#25
3
+3VRUN
12
H_DIOW_N/H_STOP
8040_VSS
C466 .1U_10V
H_DD[0] H_DD[1] H_DD[2] H_DD[3] H_DD[4] H_DD[5] H_DD[6] H_DD[7] H_DD[8]
H_DD[9] H_DD[10] H_DD[11] H_DD[12] H_DD[13] H_DD[14] H_DD[15]
H_DA[0]
H_DA[1]
H_DA[2]
H_CS_N0 H_CS_N1
H_DMACK_N
H_DMAQ H_INTRQ
H_RESET_N
H_IOCS16_N
H_PDIAG_N
+1_8VRUN
12
C509 .047U
62 64 2 5 7 11 13 15 14 12 10 6 3 1 63 61
50 51 49
48 47
58 59 55 54 60 53 16 52 46
26
ISET
8
GND1
42
GND2
57
GND3
25
VSS1
30
VSS2
DEVICE CONFIGURATION
Pin Name
T7 T6 T5 T4 T3 T2 T1 34
T0 CNFG[2:0] ATAIOSEL H_PDIAG_N H_IOCS16_N
4
12
12
C508 .1U_10V
B_PDD0 B_PDD1 B_PDD2 B_PDD3 B_PDD4 B_PDD5 B_PDD6 B_PDD7 B_PDD8 B_PDD9 B_PDD10 B_PDD11 B_PDD12 B_PDD13 B_PDD14 B_PDD15
B_PDA0 B_PDA1 B_PDA2
B_PDCS1# B_PDCS3#
B_PDIOR# B_PDIOW# B_PIORDY B_PDDACK# B_PDDREQ B_IRQ14 B_IDE1RST_R#
R385 10K
1 2
R378 10K
1 2
R384
12.1K/F
8040_VSS
Pin#
Settings 40 39 38 37 36 35
33
NC.0.NC
18
20
.19.
21 46 52
C491 .047U
12
1/NC
1/NC 1/NC 0/NC 1/NC
1/NC
1/NC
+3VRUN
NC
0 NC
0
SATA TO PATA SWITCH
+5VSUS
12
C337
1U_16V
R216 100K
15V
3
Q29 FDC653N
6 5 2 1
47K
2
4
3
4.7U_10V_1206
12
3
47K
Q28
1
DTC144EUA
+5VMOD
12
C320
12
C326 .01U
4
12
C327 .01U
5
B_IDE1RST_R#
R390 33
1 2
+3VRUN
R417
4.7K
+5VSATA
1 2
R149 *510_NC
B_PDDREQ B_PDIOW# B_PDIOR# B_PIORDY B_PDDACK# B_IRQ14 B_PDA1 B_PDA0 B_PDCS1# HDD_P39
1 2
HDD CONN
+5VMOD
+3VRUN
R217 470
CSEL2
12
PDDREQ10 PDIOW#10 PDIOR#10 PIORDY10 PDDACK#10 IRQ1410 PDA110 PDA010 PDCS1#10 PDA210 PDCS3#10
PDD[0..15]10
MEDIA BAY
5
R215 100K
PIN HEADER TYPE
JIDE3
IDE1RST#
1
B_PDD7
3
B_PDD6
5
B_PDD5
7
B_PDD4
9
B_PDD3
11
B_PDD2
13
B_PDD1
15
B_PDD0
17 19 21 23 25 27 29 31 33 35 37 39 41 43
SUYIN_200055
12
12
C230 .1U_10V
1 2
R218 4.7K
SATA_DET#25,26
USB_VD0+11 USB_VD0-11
PDDREQ PDIOW# PDIOR# PIORDY PDDACK# IRQ14 PDA1 PDA0 PDCS1# PDA2 PDCS3#
PDD[0..15]
C231
1nF
12
6
2
B_PDD8
4
B_PDD9
6
B_PDD10
8
B_PDD11
10
B_PDD12
12
B_PDD13
14
B_PDD14
16
B_PDD15
18 20 22 24 26 28 30 32 34 36 38 40 42 44
12
C571 10U_10V
DASP#
PDCS1#
PDIAG#
IRQ14 PDDACK# PIORDY
PDDREQ PDD15 PDD0 PDD14 PDD13
PDD3 PDD4 PDD10 PDD9
PDD7
R414 470
CSEL1
1 2
B_IOCS16# HDD_P34 B_PDA2 B_PDCS3#
USB_VD0+ USB_VD0-
R147
1 2
+5VSATA
CT_0315: Change JIDE3 HDD connector's footprint from HDD-200043FB044G513ZL-44P to HDD-200043FB044GX13ZL-44P
JMOD2
1
1
3
3
5
5
7
7
9
9
11
11
13
13
15
15
17
17
19
19
21
21
23
23
25
25
27
27
29
29
31
31
33
33
35
35
37
37
39
39
41
41
43
43
45
45
47
47
49
49
51
51
53
53
55
55
57
57
59
59
61
61
63
63
65
65
67
67
JAE-WM1F068N1F-68P-RDV
*10K_NC
7
B_PDDREQ
B_IOCS16# B_IRQ14
HDD CONN. SCREWS
HDD_SCREW
2
2
4
4
6
6
8
8
10
10
12
12
14
14
16
16
18
18
20
20
22
22
24
24
26
26
28
28
30
30
32
32
34
34
36
36
38
38
40
40
42
42
44
44
46
46
48
48
50
50
52
52
54
54
56
56
58
58
60
60
62
62
64
64
66
66
68
68
INT_MOD_IN1#
1 2
INT_MOD_IN2#
USB/IDE#
R413 5.6K
JS3
C312
10U_10V
PDCS3#
PDA2 PDA0 PDA1
CSEL2 PDIOR# PDIOW#
PDD1
PDD2
PDD12
PDD11
PDD5
PDD6
PDD8
R220 56
R225 10K
1 2
R221 100K
1 2
QUANTA
Title
Size Document Number Rev
6
Date: Sheet of
COMPUTER
IDE (HDD&CD_ROM
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
1 2
RP8
1 3
4P2R-S-10K
JS4
HDD_SCREW
12
USB/IDE# 25 MODPRES# 25
19 49,
8
2 4
+5VMOD
12
12
C319 .1U
IDERST_MOD 25
+3VRUN
+3VRUN
8
C318 .1U
Page 20
1
PV9
PAD138X98
A A
PV12
PAD197X98
PV19
PAD197X98
GND
1
PV20
PAD197X98
GND
1
PV16
PAD197X98
GND
1
2
PV3
PAD197X98
GND
1
PV15
PAD197X98
3
PV21
PAD138X98
PV22
PAD138X98
GND
1
+3VSUS +3VSUS
C465
2200P
C531
12
12
2200P
1
GND
2200P
C116
4
1
h-c315d126p2-4
4 2
C111
12
12
2200P
H16
5
35
6
H18
1
h-c315d126p2-4
35
4 2
H17
1
h-c315d126p2-4
35
4 2
7
H23
1
h-c315d126p2-4
8
35
4 2
H21
1
h-c315d126p2-4
35
4 2
GND
1
GND
1
1
GND
+3VRUN +3VRUN
Stitching caps
1
H2
h-c315d126p2-4
1
35
PV7
B B
PAD197X98
PV13
PAD197X98
GND
1
PV14
PAD197X98
GND
1
PV2
PAD197X98
GND
GND
1
1
PV8
PAD197X98
GND
1
PV23
*PAD138X98_NC
GND
4 2
1
PV5
PAD138X98
GND
1
C C
H3
h-tc177bc63d63pt
1
PV17
PAD138X98
1
H5
h-c315d102p2
1
GND
CT_0314:Change PV17 from PAD197x98 to PAD138x98 small size.
H6
h-c315d102p2
1
PV4
PAD197X98
GND
1
H11
h-c315d102p2
1
H10
h-c315d102p2
1
Stitching caps
H13
1
h-c236d110p2-4
35
1
4 2
h-c315d126p2-4
4 2
h-c236d110p2-4
4 2
H22
H12
H19
1
35
h-c315d126p2-4
35
1
H14
H-C315I166D126P2
4 2
+5VSUS
1
H8
h-c236d126p2-4
35
C14
12
2200P
4 2
+3VRUN
H20
1
35
h-c315d118p2-4
35
1
4 2
H15
h-c354d126p2
35
4 2
JS2
D D
MDC_NUT
H24
h-tc236bc118d63p2
1
1
JS2 is mounted on H24(BOT).
1
2
3
h-c236d126p2-4
4 2
4
H7
1
35
H4
h-c256d126p2-4
35
QUANTA
4 2
5
6
Title
Size Document Number Rev
Date: Sheet of
COMPUTER
SCREW PAD
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
20 49,
8
Page 21
8
+3VSUS VCCCB
12
12
12
C438
C426
1U_10V
1U_10V
D D
+3VSUS
AD[0..31]10,23,35
C C
AD17
B B
A A
C440 .1U
1 2
PCLK_PCM15
DEVSEL#10,23,35
FRAME#10,23,35
PCIRST#10,23,35
CBUS_GRST#25
PCM_SPK#33
PCI_PME#23,25,26,35 CLKRUN#10,23,25,35
SERIRQ10,11,25
PIRQC#10,35 PIRQD#10,23
PCLK_PCM
8
12
C431 .1U
C/BE3#10,23,35 C/BE2#10,23,35 C/BE1#10,23,35 C/BE0#10,23,35
R321 100
IRDY#10,23,35
TRDY#10,23,35
STOP#10,23,35
PAR10,23,35 PERR#10,23,35 SERR#10,23,35
REQ1#10 GNT1#10
R320 *33_NC
1 2
12
12
C432
C433
.1U
.1U
IDSEL
12
W11
W10
R327 100K
1 2
C419 *10P_NC
V10 U10 R10
V11 U11 P11 R11
W8 M1
M2 M3 M6 M5
W4 W7
W9
W5
W6
H2 H5 G1
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 CAD12 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
12
C427 1nF
J6
P1
PCI_VCC0 PCI_VCC1
AD31 AD30 AD29 AD28 AD27
N1
AD26
N2
AD25
N3
AD24
P3
AD23
R1
AD22
R2
AD21
P5
AD20
R3
AD19
T1
AD18
T2
AD17 AD16 AD15
R8
AD14
U8
AD13
V8
AD12 AD11
V9
AD10
U9
AD9
R9
AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
P2
C/BE3#
U5
C/BE2#
V7
C/BE1# C/BE0#
N5
IDSEL
L1
PCI_CLK
U6
DEVSEL#
R6
FRAME#
V5
IRDY# TRDY#
V6
STOP#
U7
PAR
R7
PERR# SERR#
L3
REQ#
L2
GNT#
K3
PCI_RST#
K5
GRST#
H3
SPKR_OUT#
L5
RI_OUT#/PME#
J3
MF6 (CLKRUN#)
J2
MF5
J1
MF4 (RI_OUT#)
H1
MF3 (SIRQ#) MF2 (INTC#) MF1 (INTB#) MF0 (INTA#)
H6
7
12
12
C443 1nF
CORE_VCC3P8CORE_VCC2P6CORE_VCC1L6CORE_VCC0
P10
CORE_VCC4
12
C444
C439
TPS_CLOCK
TPS_DATA
+3VSUS
TPS_LATCH
C9
B9
A9
SCLK/VCC3#
SDATA/VCC5#
SLATCH/VPP_PGM
1nF
1nF
F6
J14
F14
F12
F9
L14
CORE_VCC6
CORE_VCC7
CORE_VCC8
CORE_VCC9
CORE_VCC5
CORE_VCC10
TI PCI4515- 1 of 2
GND3P7GND4P9GND5
GND6
GND7
GND8
GND9
M14
GND10
GND11
GND12
GND13
GND14
F7
F13
F10
K14
R17
U13
U14
G14
U18
GND2N6GND1K6GND0
7
GND15
R14
TEST0
P12
TEST1
U12
TEST2
V12
SC_CD#F3SC_FCBE3SC_RST#F5SC_IOE1SC_CLKE2SC_VCC
TEST3
W12
6
REG1.5
REG1.5
U14A
K19
K2
1.5V1K11.5V2 VR_EN#
CCLKRUN#
SUSPEND#
SC_RFU
D1
G6
6
SKT_VCC0 SKT_VCC1
CAD31 CAD30 CAD29 CAD28 CAD27 CAD26 CAD25 CAD24 CAD23 CAD22 CAD21 CAD20 CAD19 CAD18 CAD17 CAD16 CAD15 CAD14 CAD13 CAD12 CAD11 CAD10
CAD9 CAD8 CAD7 CAD6 CAD5 CAD4 CAD3 CAD2 CAD1 CAD0
CLK_48
CCLK
CFRAME#
CIRDY#
CTRDY#
CDEVSEL#
CSTOP#
CPAR CPERR# CSERR#
CREQ# CGNT#
CINT#
CBLOCK#
CRST#
R2_D2
R2_D14
R2_A18
CVS1
CVS2 CCD1# CCD2#
CAUDIO
CSTSCHG
CC/BE3# CC/BE2# CC/BE1# CC/BE0#
USB_EN
SCL
SDA
A15 J19
C10 A10 F11 E11 C11 B13 C13 A14 B14 B15 E14 A16 D19 E17 F15 H19 J17 J15 J18 K15 K17 K18 L15 L18 L19 M17 M18 N19 M15 N17 N18 P19
F1 F18
E19 F17 G15 F19 G18 H14 G19 C12 C14 G17 E12 H15 A11 C15 B10 M19 H17 A13 B16 N15 B11 B12 A12 E13 E18 H18 L17
J5 E10
G2 G3
PCI4515
R323 10K
1394SCL 1394SDA
12
C453 .1U
R322
0_0603
CFRAME# CIRDY# CTRDY# CDEVSEL# CSTOP# CPAR CPERR# CSERR# CREQ# CGNT# CINT# CBLOCK# CCLKRUN# CRST# RSVD/D2 RSVD/D14 RSVD/A18 CVS1# CVS2# CCD1# CCD2# CAUDIO# CSTSCHNG CC/BE3# CC/BE2# CC/BE1# CC/BE0#
12
C418 .1U
12
CAD31 CAD30 CAD29 CAD28 CAD27 CAD26 CAD25 CAD24 CAD23 CAD22 CAD21 CAD20 CAD19 CAD18 CAD17 CAD16 CAD15 CAD14 CAD13
CAD11 CAD10 CAD9 CAD8 CAD7 CAD6 CAD5 CAD4 CAD3 CAD2 CAD1 CAD0
CCCLK
12
5
VCCCB
5
R345
1 2
33
+3VSUS
USB_EN_CARD
4
VPPCB
12
CCLK
C407 .1U
VPPCB VCCCB
SUSPWROK11,31,39
USB_VD3+11
USB_VD3-11
R69
*10K_NC
+5VSUS +3VSUS
12
C445 .1U
+5VSUS
TPS_DATA TPS_CLOCK TPS_LATCH
USB_EN_CARD
R317 0
1 2
1 2 3
12
7
1394 EEPROM
4
12
C89 .1U
1 2 3 4 5 6 7 8
9 10 11 12
+3VSUS
SN74CB3Q3306APW
C97
*.1U_NC
U13
VCC
A0 A1 A2
SCL SDA
WC
GND
*24C02LM_NC
SOIC8-6-1_27
12
C87
4.7U_10V_0805
U12
5V_0 5V_1 DATA CLOCK LATCH NC 12V_0 AVPP/AVCORE AVCC0 AVCC1 GND RESET#
TPS2220A (PWP)
U15
8
VCC
1
1OE
2
1A
7
2OE 2A52B
GND
+3VSUS
8 6
5 4
12
SHDN#
12V_1
3.3VIN
3
1B
6 4
1
3
2
4
3
12
C442
C441
.1U
4.7U_10V_0805
+5VSUS
24
NC
23
NC
22
NC
21 20 19
NC
18
NC
17
NC
16
NC
15
OC#
14
NC
13
CAD13
CAD15
1394 Code currently integrate in
RP5
system BIOS
*4P2R-S-2.7K_NC
1
3
2
4
3
+3VSUS
12
C102 .1U
1394SCL 1394SDA
RP20
4P2R-S-220
2
CAD0 CAD1 CAD3 CAD5 CAD7 CC/BE0# CAD9 CAD11 CAD12 CAD14 CC/BE1# CPAR
CPERR# CGNT# CINT#
VCCCB
CCLK CIRDY# CC/BE2# CAD18 CAD20 CAD21 CAD22 CAD23 CAD24 CAD25 CAD26 CAD27 CAD29
RSVD/D2 CCLKRUN#
CCD1# CAD2 CAD4 CAD6
RSVD/D14
CAD8 CAD10 CVS1# CAD13 CAD15 CAD16
RSVD/A18 CBLOCK# CSTOP# CDEVSEL#
CTRDY# CFRAME#
CAD17 CAD19 CVS2# CRST#
CSERR# CREQ# CC/BE3# CAUDIO# CSTSCHNG CAD28 CAD30 CAD31 CCD2#
VPPCB
CON2 PCI-1CA41501-T1-TH
1
GND
2
D3-CAD0
3
D4-CAD1
4
D5-CAD3
5
D6-CAD5
6
D7-CAD7
7
CE1#-CC/BE0#
8
A10-CAD9
9
OE#-CAD11
10
A11-CAD12
11
A9-CAD14
12
A8-CC/BE1#
13
A13-CPAR
14
A14-CPERR#
15
WE/PGM-CGNT#
16
RDY/BSY-IRQ/CIN
17
VCC
18
VPP1
19
A16-CCLK
20
A15-CIRDY#
21
A12-CC/BE2#
22
A7-CAD18
23
A6-CAD20
24
A5-CAD21
25
A4-CAD22
26
A3-CAD23
27
A2-CAD24
28
A1-CAD25
29
A0-CAD26
30
D0-CAD27
31
D1-CAD29
32
D2-RFU
33
WP/IOIS16-CCLKR
34
GND
35
GND
36
CD1#-CCD1#
37
D11-CAD2
38
D12-CAD4
39
D13-CAD6
40
D14-RFU
41
D15-CAD8
42
CE2#-CAD10
43
VS1#/RFSH-CVS1
44
RSVD-CAD13
45
RSVD-CAD15
46
A17-CAD16
47
A18-RFU
48
A19-CBLOCK#
49
A20-CSTOP#
50
A21-CDEVSEL#
51
VCC
52
VPP2/VPP2
53
A22-CTRDY#
54
A23-CFRAME#
55
A24-CAD17
56
A25-CAD19
57
VS2#/RSVD-CVS2
58
RESET-CRST
59
WAIT#-CSERR#
60
RSVD-CREQ#
61
REG#-CC/BE3#
62
BVD2/SP-CAUDIO#
63
BVD1-STSCHG
64
D8-CAD28
65
D9-CAD30
66
D10-CAD31
67
CD2#-CCD2#
68
GND
GND GND GND GND
69 70 71 72
CardBus Slot
QUANTA
Title
Size Document Number Rev
Date: Sheet of
COMPUTER
TI_PCI7515
Tahiti(DM3L) 1A
星期二
29, 2005
三月
2
21 49,
1
1
Page 22
8
CT_0217: Change C450
+3VSUS
D D
C C
L38 BLM15AG700SN1
U14B
from 10U_4V to 10U_10V.
TI PCI4515- 2 of 2
B B
PCI4515
C450
10U_10V
7
PHY_TEST_MA
C449
0.001uF_0402
AVD1 AVD2
AVD3 VDPLL_33 VDPLL_15
TPBIAS0
TPA0+
TPA0-
TPB0+
TPB0-
CPS CNA
TPBIAS1
TPA1+
TPA1-
TPB1+
TPB1-
6
VCC_PLL
12
C452
1U_10V
+3VSUS
P13 P14 U15 U19 P15 T18
R0
T19
R1
R13 V14
W14 V13
W13 P17
R12 P18 R18
XO
R19
XI
VCC_PLL
TPBIAS0 TPA0P
TPA0N TPB0P
TPB0N PHY_TEST_MA
CPS
X0
X1
VDPLL_15
C113 12pF_0402
X2
24.576MHZ
<PN>
C114 12pF_0402
12
C727 .1U_10V
R348
6.34K/F
+3VSUS
R3474.7K
5
TPBIAS0
12
C108
1U_10V
4
R75
56.2/F
R72
56.2/F
C103 220pF
TPB0
R76
56.2/F
12
TPA0P TPA0N
TPB0P TPB0N
R74
56.2/F
R73
5.11K/F
3
L10 PLW3216S900SQ2T1
<PN>
3 4
34
3 4
34
L11 PLW3216S900SQ2T1
<PN>
F_TPA0P F_TPA0N
12
12
F_TPB0P
12
12
F_TPB0N
2
1394 CONN
J4
4
A1+
3
A1-
2
B1+
1
B1-
TYCO_IEEE1394
1
Layout and design guidelines for the 1394 signals:
1. The differential impedance of the twisted pair signals (i.e. TPA0+/TPA0- and TPB0+/TPB0- should nominally be 110 Ohm. Verification by TDR per the 1394 Base Test
W17 V16
W16 V15
W15
Specification is recommended. The differential through impedance looking into the connector with all components installed must be 90 - 130 Ohms.
2 Propagation delay of the differential pairs should be minimized. The skew of the differential signals must be less than 100 ps as measured per the 1394 Base Test Specification.
3. Jitter of the twisted pairs must be less than 150 ps as measured by the 1394 Base Test Specification. Jitter can be minimized by appropriate decoupling and filtering of the PLL Vcc as implemented in these reference schematics.
A A
QUANTA
Title
Size Document Number Rev
8
7
6
5
4
3
Date: Sheet of
COMPUTER
TI_PCI7611_1394 & CONN
Tahiti(DM3L) 1A
星期二
29, 2005
三月
2
22 49,
1
Page 23
1
2
3
4
5
6
7
8
HW_RADIO_DIS#26,30
+5VRUN
12
R290 *33_NC
12
C392 *15P_NC
PIRQD#10,21
CLKRUN#10,21,25,35
PCLK_MINI
PCLK_MINI
REQ3#10
C/BE3#10,21,35
C/BE2#10,21,35
IRDY#10,21,35
SERR#10,21,35 PERR#10,21,35
C/BE1#10,21,35
AD[0..31] 10,21,35
J8
1
TIP
+3VRUN +3VRUN
AD31 AD29
AD27 AD25
C/BE3# AD23
AD21 AD19
AD17 C/BE2# IRDY#
CLKRUN# SERR# STOP#
PERR# DEVSEL# C/BE1# AD14
AD12 AD10
AD8 AD7
AD5 AD3 AD1
DEBUG_ENABLE
3
8PMJ-3
5
8PMJ-6
7
8PMJ-7
9
8PMJ-8
11
LED1_GRNP
13
LED1_GRNN
15
CHSGND
17
INTB#
19
3.3V_1
21
USBD+
23
GND0
25
CLK
27
GND1
29
REQ#
31
3.3V_2
33
AD31
35
AD29
37
GND2
39
AD27
41
AD25
43
WLAN_ACTIVE
45
C/BE3#
47
AD23
49
GND3
51
AD21
53
AD19
55
GND4
57
AD17
59
C/BE2#
61
IRDY#
63
3.3V_3
65
CLKRUN#
67
SERR#
69
GND5
71
PERR#
73
C/BE1#
75
AD14
77
GND6
79
AD12
81
AD10
83
GND7
85
AD8
87
AD7
89
3.3V_4
91
AD5
93
RESERVED1
95
AD3
97
5V_1
99
AD1
101
GND8
103
AC_SYNC
105
AC_SDATA_IN
107
AC_BIT_CLK
109
AC_CODEC_ID1#
111
MOD_AUDIO_MON
113
AUDIO_GND1
115
SYS_AUDIO_OUT
117
SYS_AUDIO_OUT GND
119
AUDIO_GND2
121
RESERVED2
123
VCC5A
MINI-PCI_AMP
LED2_YELP LED2_YELN
RESERVED3
BT_ACTIVE
RESERVED5 RESERVED6
AC_SDATA_OUT
AC_CODEC_ID0#
AC_RESET# RESERVED7
SYS_AUDIO_IN
SYS_AUDIO_IN GND
AUDIO_GND3
RING
8PMJ-1 8PMJ-2 8PMJ-4 8PMJ-5
5V_2
INTA#
USBD-
3.3VAUX1 RST#
3.3V_5 GNT#
GND9
PME#
AD30
3.3V_6
AD28 AD26 AD24
IDSEL
GND10
AD22 AD20
PAR AD18 AD16
GND11
FRAME#
TRDY# STOP#
3.3V_7
DEVSEL#
GND12
AD15 AD13 AD11
GND13
AD9
C/BE0#
3.3V_8 AD6 AD4 AD2 AD0
GND14 M66EN
GND15
MPCIACT#
3.3VAUX2
2
4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50 52 54 56 58 60 62 64 66 68 70 72 74 76 78 80 82 84 86 88 90 92 94 96 98 100 102 104 106 108 110 112 114 116 118 120 122 124
LED_WLAN24_ON LED_WLAN5_ON
PCI_PME# AD30 AD28
AD26 AD24 MINI_IDSEL
AD22 AD20 PAR AD18 AD16
FRAME# TRDY#
AD15 AD13 AD11
AD9 C/BE0#
AD6 AD4 AD2 AD0
DEBUG_OUT
+3VRUN
+5VRUN
+3V_LAN
+3V_LAN
12
C386 *.1U_10V_NC
PIRQB# 10
PCIRST# 10,21,35 GNT3# 10 PCI_PME# 21,25,26,35
R309 100
PAR 10,21,35
FRAME# 10,21,35 TRDY# 10,21,35 STOP# 10,21,35
DEVSEL# 10,21,35
C/BE0# 10,21,35
DEBUG_OUT 25
12
C400 *.047U_NC
+3VRUN
2 1
AD19
12
R349 10K
1 2
12
C416 *.1U_10V_NC
U25
5
7SH32
+3VSUS
12
C395 *.047U_NC
4
12
R302 *10K_NC
12
C377 *4.7U_10V_0805_NC
LAN_R_ON 32
COEX1_BT_ACTIVE 30
LED_WLAN24_ON LED_WLAN5_ON
RP13
1 3
4P2R-S-100K
2 4
PCLK_MINI15
A A
AC-Terminator
B B
C C
COEX2_WLAN_ACTIVE30
DEBUG_ENABLE25,26
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
MINI-PCI &MDC
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
23 49,
8
Page 24
1
2
3
4
5
6
7
8
A A
IAC_SDATAO_MDC10
IAC_SYNC_MDC10
IAC_SDATAIN110
IAC_RESET#_MDC10 IAC_BITCLK_MDC 33
B B
1 2
R430 33
12
C561 *10P_NC
MDC CONN.
+3VSUS
12
C552 .01U
J9
1
GND1 IAC_SDATO3Reserved2
5
GND2
7 9
MDC
IAC_SYNC IAC_SDATAIN IAC_RESET#11IAC_BITCLK
New MDC
Reserved1
GND3 GND4
1 2
3.3V
C554
2.2U_10V
2 4 6 8 10 12
JS1
MDC_NUT
+3VSUS
IAC_BITCLK_MDC
12
R426 *33_NC
12
C558 *10P_NC
Keep the space 40mil between Tip/Ring.
TIP38
RING38
C256
300P_1808_3KV
CC1808
TIP RING
C255
300P_1808_3KV
CC1808
JMODEM1
1 2 3 4 5
53398-0590
1 2 3 4 5
TIP & RING To Docking and MDC CONN.
C C
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
MDC CONN.
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
24 49,
8
Page 25
1
+3VALW
R291 10K
1 2
A A
JDEBUG2
*MOLEX-53398-0390_NC
+3VALW
R64
1 2
B B
C C
D D
*10K_NC
PWR_SRC
R57 10K
1 2
12
12
C79
C81
1U_25V
.1U_50V
+3VALW
C729
10U_10V
CT_0310: Adding C729~C730 2x10U Caps to fix rebooting issue of reflash.
1 2 3
1
LCD_TST
RBAT_3V33
C730
10U_10V
ATF_INT#
DEBUG_ENABLE DEBUG_OUT
U9 MAX1615
1
IN
5
SHDN
C731
*10U_10V_NC
+3VRUN
OUT 5/3#
GND
3 4
2
12
C383 .1U_10V
+3VRUN
+RTC_PWR3_3V
12
C80 1U_10V
R52 1K
12
12
C391
C405
.047U
.047U
12
C382 .047U
2
VCCRTC_D
12
12
C378 .047U
L35
1 2
BLM11A121S
2
3
USIO2A
CBUS_GRST#21
HP_NB_SENSE33,34
RUN_ON_D43,44,46
AUX_EN36,45
T140
T141
PAD PAD PAD
12
C401 .047U
12
C379 .1U_10V
VCC_SIO_PLL
PAD
DEBUG_ENABLE DEBUG_OUT
PAD
PCI_PME# ATF_INT#
LCD_CL#_SIO
VCCRTC
C85 .1U_10V
1 2
C411
4.7U_10V_0805
1 2
C398
4.7U_10V_0805
1 2
C387 .1U_10V
3
USB_EN#32,45
MODPRES#19
USB/IDE#19
EXT_SMI#11 EXT_SCI#11
EXT_WAK#11
RCIN#10
NB_MUTE33
SPDIF_SHDN33
RUN_ON27,39,46
SATA_DET#19,26
5V_CAL_SIO#31
IDERST_MOD19
FPBACK_EN17
T85 T83
T36
MODC_EN#19 HDDC_EN#19
2 1
2 1
12
C406 .1U_10V
C389 .047U
1 2
BEEP33
SLP_S3#11
PCI_PME#21,23,26,35
ATF_INT#31
SLP_S5#11
ICH_PME#10
THRM#11
SUS_ON39,45,46
PWRBTN#11
LCD_TST17
D9
RB751V D8
RB751V
12
C410 .047U
DEBUG_ENABLE23,26
DEBUG_OUT23
DOCK_SIO_ALERT#26,38
ICH_PCIE_WAKE#11
F13
SGPIO30
F14
SGPIO31
E16
SGPIO32
E15
SGPIO33
E12
SGPIO34
E13
SGPIO35
D16
SGPIO36
D15
SGPIO37
C16
SGPIO40
B16
SGPIO41
C15
SGPIO42
A16
SGPIO43
D14
SGPIO44
C14
SGPIO45
C13
SGPIO46
B14
SGPIO47
T5
LGPIO50
N6
LGPIO51
L6
LGPIO52
R6
LGPIO53
T6
LGPIO54
L7
LGPIO55
P7
LGPIO56
N7
LGPIO57
A15
LGPIO60
D13
LGPIO61
A14
LGPIO62
C12
LGPIO63
B13
LGPIO64
A13
LGPIO65
D12
LGPIO66
F11
LGPIO67
B12
LGPIO70
A12
LGPIO71
C11
LGPIO72
D11
LGPIO73
E11
LGPIO74
A11
LGPIO75
F10
LGPIO76
C10
LGPIO77
E2
VCC0/BAT
M7
VCC1_1
R13
VCC1_2
L11
VCC1_3
H12
VCC1_4
E14
VCC1_5
B11
VCC1_6
B7
VCC1_7
A1
VCC1_8
G2
VCC2_1
M2
VCC2_2
P4
VCC2_3
J2
VCC2_4
R5
VCC2/PLL
P6
VSS/PLL
12
LPC47N354
4
LPC47N354
MACALLEN III
1 OF 2
256 - LBGA
8051 GPIO
LPC GPIO
VCC
4
DOCK LPC
LPC
GPIOA3/WINDMON
POWER_SW_IN#
COM1
IR
GPIOB2/nSLCTIN
GPIOB0/nSTROBE
LPT
OUTD4/nERROR
GND
5
LRESET#
DLDRQ1#
DLFRAME#
DLAD0 DLAD1 DLAD2 DLAD3
DSER_IRQ
DCLKRUN#
LDRQ1#
LFRAME#
LAD0 LAD1 LAD2 LAD3
SER_IRQ
CLKRUN#
GPIOA0 GPIOA1 GPIOA2
ACAV_IN
ALWON
TESTA
RXD
TXD nRTS nCTS nDTR nDSR nDCD
GPIO10
IRRX
IRTX
OUTD3/nACK GPIOB1/nINIT
GPIOB2/nALF OUTD2/BUSY
OUTD1/PE
OUTD0/SLCT
GPIOC0/PD0 GPIOC1/PD1 GPIOC2/PD2 GPIOC3/PD3 GPIOC4/PD4 GPIOC5/PD5 GPIOC6/PD6 GPIOC7/PD7
VSS1 VSS2 VSS3 VSS4 VSS5 VSS6 VSS7 VSS8 VSS9
VSS10 VSS11 VSS12
AGND
5
6
+3VRUN
R261 100K
1 2
L2 R2
T2
D_LAD0
N2
D_LAD1
P1
D_LAD2
P2
D_LAD3
N3
D_SERIRQ
R4
D_CLKRUN#
T3 R3
N4 M3 R1 T1 P3 T4 P5
B1 D4 C1 E3
F5 F4 F6 F2
K1 K5 K4 K3 K6 K2 L1
B10
nRI
IRMODE
H15
IRRX
K14
IRTX
M4
H7 J4 J5 J7 K7 G1 G5 F1 J6
PD0
J1
PD1
H2
PD2
H1
PD3
H3
PD4
H4
PD5
H5
PD6
H6
PD7
H8 C2
G4 J3 N1 N5 T10 R15 J11 G14 B15 G9 B6
RAGND
F3
T26 PAD T72 PAD T30 PAD
T25 PAD
RXD0 27 TXD0 27 RTS0# 27 CTS0# 27 DTR0# 27 DSR0# 27 DCD0# 27
RI0#
ACK# 28 SLCT_IN# 28 INIT# 28 AFD# 28 STRB# 28 BUSY 28 PE 28 SLCT 28 ERROR# 28
PD[0..7]
L32
1 2
BLM11A121S
PLTRST# 6,10,11,16,19 D_DLDRQ1# 38
D_LFRAME# 38 D_LAD0 38 D_LAD1 38 D_LAD2 38 D_LAD3 38 D_SERIRQ 38 D_CLKRUN# 38
LPC_DRQ1# 10 LFRAME#/FWH4 10 LAD0/FWH0 10 LAD1/FWH1 10 LAD2/FWH2 10 LAD3/FWH3 10 SERIRQ 10,11,21 CLKRUN# 10,21,23,35
BIA_PWM 6
ACAV_IN 40,41 ALWON 45
+3VRUN
R493 10K
1 2
IRMODE 37 IRRX 37 IRTX 37
PD[0..7] 28
+RTC_PWR3_3V
R259 *100K_NC
1 2
12
C374 1U_10V
RI0# 27
+3VRUN
1
3
2
4
VCCRTC
LID SWITCH
7
RP14
4P2R-S-100K
D_SERIRQ D_CLKRUN#
R260 100K
1 2
R258 0
1 2
LID_CL#32
8
POWER_SW# 31,32
Dash Board Power Bottom
+3VALW
12
R298 100K
R299 0
1 2
12
C394 .1U_10V
LCD_CL#_SIO
QUANTA
Title
Size Document Number Rev
6
Date: Sheet
Ultra I/O Controller LPC47N354
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
25 49,
8
Page 26
1
Integrted GX
R497
10K
1 2
W3
1 4 2 3
32.768KHZ
6 4 2
CLK_SM138 DAT_SM138
CLK_KBD38 DAT_KBD38
CP3
*8P4C-100P_NC
CLK_32KX2_SMC
A A
B B
C C
D D
12
12
C397 *100P_NC
C356 15P
KSI7
1
2
CLK_32KX1_SMC
12
C371 15P
+5VRUN
R2634.7K
R2624.7K
R255
R2564.7K
4.7K
1 2
1 2
1 2
1 2
PBAT_ALARM#47
+3VALW
12
R313 10K
CHG_SBATT
SIO_FD[0..7]29
KSI6 KSO3
78
KSI4
5
KSI2 KSO6
3
KSI5
1
6 4 2
2
*4.7K_NC
CLK_32KX1_SMC CLK_32KX2_SMC
DOCK_SMB_INT#38
SBAT_ALARM#47
SBAT_PRES#40,47 PBAT_PRES#47
THERMTRIP_SIO31
PROCHOT#3
CAP_LED#32
NUM_LED#32
SRL_LED#32
CHG_SBATT40
PS_ID47
PS_ID_DISABLE#47
Integrted GX
SIO_FD[0..7]
CP4
78 5 3 1
*8P4C-100P_NC
R304
T34
T80
T24 PAD T70 PAD
T69 PAD T79 PAD T81 PAD
KSI1 KSI0
KSO5 KSO10
3
+3VALW+3VSUS +5VALW
R297
R293
4.7K
100K
1 2
1 2
1 2
DOCKED36,38
PAD
FPVCC6,17
T142
PAD
PAD
CLK_SM230 DAT_SM230
KSO16
PS_ID
T33 PAD
BID0 BID1 BID2 BID3
T143
PAD
KSO15 KSO14 KSO13 KSO12 KSO11 KSO10 KSO9 KSO8 KSO7 KSO6 KSO5 KSO4 KSO3 KSO2 KSO1 KSO0
KSI7 KSI6 KSI5 SIO_FA18 KSI4 KSI3 KSI2 KSI1 KSI0
SIO_FD0 SIO_FD1 SIO_FD2 SIO_FD3 SIO_FD4 SIO_FD5 SIO_FD6 SIO_FD7
3
E1
D1
A9 B9 B8
A8 C8 D8
E8
H13 H11 H10 G10 G13 J14 J16 G11 F15 F12
A5
B5
E5 D5
A4
B4 C5
A3
A2 C3
D3
D10 E10
G6 G3
B3 C4
M1 M5
G15 G12 G16
R7
T7
K8
J8
L8 M8 N8
P8
T8 R8 R9
T9
P9 N9
M9
L9
K9
K10
M10
R10 N10 P10
T11 R11
M11
N11 P11 T12 R12
M12
CP5
6 4 2
*8P4C-100P_NC
USIO2B
XTAL1 XTAL2
IN0 IN1 IN2 IN3 IN5 IN6 IN7 GPIO0 GPIO1 GPIO2 GPIO3 GPIO7 GPIO8 GPIO9 GPIO17 GPIO20 GPIO21 GPIO82/FAN_TACH3
GPIO84 GPIO85 GPIO86 GPIO87 GPIO90 GPIO91 GPIO92 GPIO93
GPIO96 GPIO97 MSCLK MSDAT
EMCLK EMDAT
GPIO94/IMCLK GPIO95/IMDAT
KCLK KDAT
GPIO6 GPIO5 GPIO4 KSO13 KSO12 KSO11 KSO10 KSO9 KSO8 KSO7 KSO6 KSO5 KSO4 KSO3 KSO2 KSO1 KSO0
KSI7 KSI6 KSI5 KSI4 KSI3 KSI2 KSI1 KSI0
FD0 FD1 FD2 FD3 FD4 FD5 FD6 FD7
LPC47N354
100P CAPS CLOSE TO JKB1
KSO4
78
KSO7KSI3
5 3
KSO8
1
4
LPC47N354
MACALLEN III
2 OF 2
256 - LBGA
GPIO
K/B
CP6
6 4 2
*8P4C-100P_NC
4
MISC
CLOCK
FLASH
GPIO83/32KHZ_OUT
78 5
KSO2
3 1
FPGM
TEST_PIN
XOSEL
nEC_SCI
SYSOPT0 SYSOPT1
nBAT_LED
LDRQ0#
nPWR_LED
OUT0 OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 OUT7 OUT8
OUT9 OUT10 OUT11
PWRGD
VCC1RST#
nRESET_OUT
AB1A_DATA
AB1A_CLK
AB1B_DATA
AB1B_CLK
GPIO11 GPIO12 GPIO13 GPIO14 GPIO15 GPIO16 GPIO19
PCI_CLK
CLOCKI
FA10 FA11 FA12 FA13 FA14 FA15 FA16 FA17 FA18 FA19 FA20 FA21 FA22
nFRD
nFWR
nFCS
FA0 FA1 FA2 FA3 FA4 FA5 FA6 FA7 FA8 FA9
5
5
KAH_PGM#
L10 K12
E4 J12
K15 K16 J9 M6 J10
D7 C7 F7 A6 E6 D6 C6 E7 A7 G7 G8 F8
K13 D2 L5
D9 C9 F9 E9 H16 H14 J15 J13 A10 H9 F16
L3
NC_32KHZ
B2 L4
SIO_FA0
N12
SIO_FA1
T13
SIO_FA2
P12
SIO_FA3
T14
SIO_FA4
T15
SIO_FA5
R16
SIO_FA6
N13
SIO_FA7
P16
SIO_FA8
M14
SIO_FA9
N15
SIO_FA10
N16
SIO_FA11
M13
SIO_FA12
L12
SIO_FA13
M15
SIO_FA14
M16
SIO_FA15
L14
SIO_FA16
L13
SIO_FA17
L15 L16
SIO_FA19
K11 R14 T16 P13
P14 N14 P15
CP7
6 4 2
*8P4C-100P_NC
EC_XOSEL
T144
PAD
PAD
FAN1_PWM 31 RUNPWROK 39,42 RESET_OUT# 39 DAT_SMB 29,31
CLK_SMB 29,31
SBAT_SMBDAT 47 SBAT_SMBCLK 47 PBAT_SMBDAT 17,41,47 PBAT_SMBCLK 17,41,47 FAN1_TACH 31
GATEA20 10
T37PAD T38PAD T86PAD
+3VALW
PBAT_ALARM#
KSO12
78
KSO16KSO1
5
KSO15
3
KSO13KSO0
1
R310 10K
1 2
T82PAD
R257 10K
R306 10K
1 2
BAT1_LED# 32 LPC_DRQ0# 10 BAT2_LED# 32
EEPROM_WC 29 DOCK_PWR_EN 38
HW_RADIO_DIS# 23,30 CHG_PBATT 40
SBAT_LOW 40
T145
BREATH_LED# 32
PAD
T78
SIO_FA[0..19]
FRD# 29 FWR# 29 FCS# 29
10
9 8 7 6
12
T56 PAD
T23PAD
12
R264 33
12
C369 22P
RP18
10P8R-4.7K
6 4 2
6
+3VALW
VCC1_PWROK
12
R265 *33_NC
12
C370 *22P_NC
SIO_FA[0..19] 29
1 2 3 4 5
CP8
*8P4C-100P_NC
6
12
R288 *10K_NC
T147PAD
RP15
3 1
4P2R-S-10K
PCLK_SIO 15
14M_SIO 15
PCI_PME# SATA_DET# DOCK_SIO_ALERT# DEBUG_ENABLE
+3VALW
KSO14
78
KSO9
5
KSO11
3 1
LAN_LOW_PWR# 35
7
BID3 BID2 BID1 BID0
0
0
0 0 0
0
0 0
0
0
1
R272 *10K_NC
1 2
BID0 BID1 BID2 BID3
R279 10K
1 2
0 0
1 0
1 2
1 2
0 1 0 1 0
R292 10K
R289 *10K_NC
R301 *10K_NC
1 2
R296 10K
1 2
8
Board Revision
+3VRUN
Board ID
CT_0217: Pop R296,R280,R292 10K, Depop R301,R287,R289 10K.
VCC1_PWROK 29
DOCK_SMB_DAT 38 DOCK_SMB_CLK 38
4 2
Keyboard CONN
PCI_PME# 21,23,25,35 SATA_DET# 19,25 DOCK_SIO_ALERT# 25,38 DEBUG_ENABLE 23,25
+5VALW
SBAT_SMBDAT SBAT_SMBCLK
PBAT_SMBDAT PBAT_SMBCLK
RP17 4P2R-S-10K
2
1
4
3
4
3
2
1
RP16 4P2R-S-4.7K
JKB2
1 2 3 4 5 6 7 8
9 10 11
26 27
12 13
28 29
14 15
30
16 17 18 19 20 21 22 23 24 25
JAE_FK1S030W52
QUANTA
Title
Size Document Number Rev
Date: Sheet
Ultra I/O Controller LPC47N254(GPIO/KB/MISC/FLASH)
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
26 49,
8
PROTO1 PROTO1.5 PROTO2.01 PROTO3.0 QT RAMP10011
R287 *10K_NC
1 2
R280 10K
1 2
+3VALW
KSO10 KSO11 KSO9 KSO14 KSO13 KSO15 KSO16 KSO12 KSO0 KSO2 KSO1 KSO3 KSO8 KSO6 KSO7 KSO4 KSO5 KSI0 KSI3 KSI1 KSI5 KSI2 KSI4 KSI6 KSI7
of
Page 27
1
2
3
4
5
6
7
8
+5VSUS
RI0
L53 BLM11A121S
12
A A
C629 .1U_50V
1 2
C631 .47U_0805
1 2
TXD025
RTS0#25
DTR0#25
DCD0 RI0 RXD0# CTS0 DSR0
RUN_ON25,39,46
B B
+5VSUS
U39
28
C1+
24
C1-
1
C2+
2
C2-
14
T1IN
13
T2IN
12
T3IN
4
R1IN
5
R2IN
6
R3IN
7
R4IN
8
R5IN
22
FORCEOFF
23
FORCEON
MAX3243(TI)/ICL3243E
VCC
T1OUT T2OUT T3OUT
R2OUTB
R1OUT R2OUT R3OUT R4OUT R5OUT
INVILID
GND
26
C630 .47U_0805
27
V+
3
V-
9 10 11
20 19 18 17 16 15
21 25
1 2
C640 .47U_0805
1 2
TXD0# RTS0 DTR0
PAD
T122
C628 .1U_10V
DCD0# 25 RI0# 25 RXD0 25 CTS0# 25 DSR0# 25
DTR0 CTS0 TXD0# RTS0 RXD0# DSR0 DCD0
1 2
L54 BLM11A121S
1 2
L55 BLM11A121S
1 2
L56 BLM11A121S
1 2
L57 BLM11A121S
1 2
L58 BLM11A121S
1 2
L59 BLM11A121S
1 2
L60 BLM11A121S
1 2
SERIAL PORT
12
C632 270P
12
12
12
C635
C634
C633
270P
270P
270P
Place them close to serial port
12
C636 270P
12
C637 270P
12
C638 270P
12
C639 270P
5 9 4 8 3 7 2 6 1
JCOM1
DS0019-D2
<VENDOR>
If MAX3243 pin 22 tied to RUN_ON,then it can not support Ring Out
C C
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
SERIAL PORT & USB
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
27 49,
8
Page 28
A
4 4
B
C
D
E
+5VRUN
21
D18
RB751V
12
C642
.1U_10V
PD0 PD1
PD2
PD3 PD4 PD5 PD6 PD7
PD[0..7]
STRB#25
3 3
2 2
VCCLPTPP
ERROR#25
SLCT_IN#25
PD[0..7] 25
RP40
1 2 3 4 5
10P8R-4.7K
AFD#25
INIT#25
ACK#25
BUSY25
PE25
SLCT25
10 9 8 7 6
R448
*1.5K/F_NC
RP39
1 2 3 4 5
10P8R-4.7K
10 9 8 7 6
12
C644 270P
12
C648 270P
12
C652 270P
12
C657 270P
12
C645 270P
12
C649 270P
12
C650 270P
12
C653 270P
12
C658 270P
R449 10 R450 10 R451 10 R452 10 R453 10 R454 10 R455 10 R456 10 R457 10
R458 10 R459 10 R460 10 R461 10 R462 10 R463 10 R464 10 R465 10
12 12 12 12 12 12 12 12 12
12 12 12 12 12 12 12 12
12
C643 270P
12
C656 270P
*.1U_10V_NC
12
C646 270P
12
C651 270P
12
C654 270P
12
C659 270P
C661
*.1U_10V_NC
VCCLPTPP
12
12
C641
12
12
C647 270P
C655 270P
RV4
*VZ0603M260APT_NC
12
RV6
*VZ0603M260APT_NC
VCCLPTPP VCCLPTPP
12
12
RV7 *VZ0603M260APT_NC
12
RV9
*VZ0603M260APT_NC
C660
*.1U_10V_NC
12
*VZ0603M260APT_NC
STRB#_R AFD#_R PD0_R ERROR#_R PD1_R
INIT#_R
PD2_R SLCT_IN#_R PD3_R
PD4_R PD5_R PD6_R PD7_R ACK#_R BUSY_R PE_R SLCT_R
12
12
RV8 *VZ0603M260APT_NC
12
*VZ0603M260APT_NC
RV5
RV10
JLPT1
1
14
2
15
3
16
4
17
5
18
6
19
7
20
8
21
9 22 10 23 11 24 12 25 13
DS01A91-WL36-TR
1 1
QUANTA
Title
Size Document Number Rev
A
B
C
D
Date: Sheet
PARALLEL CONN.
Tahiti(DM3L) 1A
星期二
29, 2005
三月
E
of
28 49,
Page 29
A
B
C
D
E
4 4
BIOS FLASH MEMORY
8Mbit (1M Byte),ISN'T PLCC TYPE
12
C95 .1U_10V
SIO_FD[0..7]SIO_FA[0..19]
T64 PAD
12
C94 .047U
SIO_FD[0..7] 26SIO_FA[0..19]26
VCC1_PWROK
VCC1_PWROK 26
SIO_FA0 SIO_FA1 SIO_FA2 SIO_FA3 SIO_FA4 SIO_FA5 SIO_FA6 SIO_FA7 SIO_FA8 SIO_FA9 SIO_FA10 SIO_FA11 SIO_FA12 SIO_FA13 SIO_FA14 SIO_FA15 SIO_FA16 SIO_FA17 SIO_FA18
3 3
2 2
SIO_FA19 FCS#
FCS#26
FRD#
FRD#26
FWR#
FWR#26
1.AMD-29LV081B require MAX 500nS Tready for it's hardware reset.And MAX6326_UR29 has >100mS reset timing.So we can tie it's reset# pin to +3VALW directly.
2.SIO has internal 20 mS delay of VCC1_PWROK
+3VALW +3VALW
U10
21
A0
20
A1
19
A2
18
A3
17
A4
16
A5
15
A6
14
A7
8
A8
7
A9
36
40 13 37
22 24
ST Micro M29W008AB/AMD-29LV081B/SST39VF080
AMD :Pin 10 is RESET# ; Pin12 is RY/BY# SST :Pin10,12 are NC
RESET#/NC
A10
RY/BY#/NC
6
A11
5
A12
4
A13
3
A14
2
A15
1
A16 A17 A18 A19
CE# OE#
9
WE#
NC1 NC2 NC3
VCC VCC
GND GND
SIO_FD0
25
D0
SIO_FD1
26
D1
SIO_FD2
27
D2
SIO_FD3
28
D3
SIO_FD4
32
D4
SIO_FD5
33
D5
SIO_FD6
34
D6
SIO_FD7
35
D7
10 12 29 38
+3VALW
11 31
30
23 39
1
3
+3VALW
1 2 3 4
UPW2
A0 A1 A2 GND
NM24C05U
8
VCC
7
WC
6
SCL
5
SDA
SMbus address A2
C101 .047U
1 2
EEPROM_WC CLK_SMB
DAT_SMB
2
4
RP6 4P2R-S-4.7K
EEPROM_WC 26 CLK_SMB 26,31 DAT_SMB 26,31
User Password
1 1
QUANTA
Title
Size Document Number Rev
A
B
C
D
Date: Sheet
FLASH
Tahiti(DM3L) 1A
星期二
29, 2005
三月
E
of
29 49,
Page 30
1
2
3
4
5
6
7
8
A A
B B
Touch Pad
CLK_SM226 DAT_SM226
+5VRUN
1
2
135
3
RP19 4P2R-S-10K
4
642
7 8
R324 0
1 2 1 2
R325 0
CP2 8P4C-10P
+3VRUN
+5VRUN
R70
1 2
0_0805
CLK_SM2_R DAT_SM2_R
12
.1U_10V
TPVCC
C98
TPVCC
JP4
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
Molex-528080890-8P
12
C99 .047U
Bluetooth
12
R423 0_0805
J10
1
GND
3
3.3V(Logic)
HW_RADIO_DIS#23,26
PAD
T105
C C
USB_VD2+11
C556 .1U_10V
12
5
Radio Enable/Disable#
7
RSVD
9
USB+
Activity LED
BM10B-SRSS-10P-R
COEX2 COEX1
USB-
GND
2 4 6 8 10
R429 10K
1 2
WPAN_RADIO_ON 32 COEX2_WLAN_ACTIVE 23 COEX1_BT_ACTIVE 23 USB_VD2- 11
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
TOUCH PAD & BULE TOOTH
Tahiti(DM3L) 1A
星期二
29, 2005
三月
,
7
of
30
49
8
Page 31
1
2
3
4
5
6
7
8
FAN Controller & FAN CONN.
R252 120K
C375
.22U_0805
1
THDAT_SMB
2
THCLK_SMB
13
SMBADDRSEL
18
REM_DIODE2_P
17
REM_DIODE2_N
4
+3VSUS
11
VSUS_PWRGD
10
+RTC_PWR3V
5
+3V_PWROK#
21
POWER_SW#
6
THERMTRIP1#
7
THERMTRIP2#
8
THERMTRIP3#
22
VSET
14
HW_LOCK#
3
VSS
12
EMC6N300
12
C372
2200P
U24
REM_DIODE1_N REM_DIODE1_P
THERMTRIP_SIO
FAN1_PWM26
A A
+3VSUS
12
R295
2
100K
ICH_PWROK#
31
Q34
2N7002
+3VSUS
B B
ICH_PWROK11,39
Notes: Vset=(Tp-75)/16
Where Tp=75 to 106 degree C
Set trip poin t =9 0 degree c
C C
Vset = (90-75) /1 6= 0.9375 V Guardian temp- to l erance= +/-3 degree C
THERMDA3
THERMDC3
R222 49.9/F
1 2
VCCRTC
12
12
C365 .1U_10V
C350 .1U_10V
C364 .1U_10V
+3VSUS
DAT_SMB26,29
CLK_SMB26,29
THERMDA
THERMDC
POWER_SW#25,32
12
12
R223 43K/F
12
R224 10K/F
SUSPWROK11,21,39
ICH_PWROK#
12
C360 2200P
12
C349 2200P
DAT_SMB CLK_SMB
R253 1K
1 2
U201_VCC
1 2
R250 1K R229 1K
1 2
THERMTRIP1# THERMTRIP2#
R233 10K
1 2
12
R249 1K
U26A LM358
12
R42 120K
1 2
ATF_INT#
VCP
RESSERVED
THERM_STP#
INTRUDER#
15V
8
3 2
4
1 2
R41
C384
1 2
.1U_50V
78.7K/F
DAN202U
9
23
16
19 20
15 24
12
1
D7
1
6N300_VCP
REM_DIODE1_N REM_DIODE1_P
+3VRUN+5VRUN
65241
3
Q13
FDC653N
R40 10K
1 2
FAN1_TACH 26
FAN1
12
+5VSUS
1 2
C357 2200P
J5
1 2 3
MOLEX-53398-0390
R246 10K
5V_CAL_SIO# 25
Place under CPU
13
Q10
2
3904
3
2
+5VSUS
12
C348 2200P
+3VALW
1 2
VCCFAN1
12
C70 22U
RT2:
ATF_INT# 25
1. Mitsubishi 1% 0603 10K ohm@25 degree C. P/N: TH11-3h103FT
2. Panasonic 1% 0603 10K ohm @25 degree C. P/N:ERTJ1VG103FA
RT2 should be placed between NB and SO-DIMM on BOT side.
R232
2.21K/F
1 2 12
RT2 TH11-3H103FT
10Kohm
t
@25 degree C
31
2
Q32 2N7002
R244 100K
Put 2200P close to Guardian.
THERMTRIP_SIO 26
THERM_STP# 45
SM_INTRUDER# 10
GUARDIAN IC
Q31
Place C362 close to GuardianPlace C358 close to Guardian
2
3904
+3VSUS
12
R245
8.2K
THERMTRIP2#
1 3
12
C362 *.1U_10V_NC
QUANTA
Title
Size Document Number Rev
6
Date: Sheet
FAN & THERMAL
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
31 49,
8
+3VSUS
12
R228
8.2K
VCCP
D D
THERMTRIP#3
R270 2.2K
1 2
Q30
2
3904
THERMTRIP1#
1 3
12
C358 *.1U_10V_NC
THERMTRIP_GMCH#6
VCCP
R266 2.2K
1 2
CPU THERMTRIP NB THERMTRIP
1
2
3
4
5
Page 32
A
B
C
D
E
+3VRUN
13
4 4
SATA_LED#10
2
10K
HDD LED
3 3
WPAN_RADIO_ON30
WPAN_RADIO_ON
WIRELESS/BLUETOOTH LED
BREATH_LED#26
BREATH LED
2 2
+3VRUN
CAP_LED#26
POWER_SW#25,31
NUM_LED#26
SRL_LED#26
LAN_R_ON23
1 1
DASH BOARD CONN
A
Q6
47K
DTA114YUA
HDD_LED
R157 10K
1 2
+3VSUS
53
U4
2 4
7SH04
CAP_LED# POWER_SW# NUM_LED#
SRL_LED# WPAN_RADIO_ON_T LAN_R_ON
HDD_LED 38
+3VRUN
12
2
1 3
BREATH_PWRLED
R156 150
Q16 3904
WPAN_RADIO_ON_T
J2
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20
2-1612037-0-20P-AMP
B
13
47K
BAT1_LED#26 BAT2_LED#26
2
10K
BATTERY 1,2 LED
+3V_LAN
BREATH_PWRLED
LAN_ACTLED#35,38 100M_LINK#35,38
10M_LINK#35,38
OC4#11 OC6#11 OC5#11
OC7#11
TXOP_A36 TXON_A36
RXIP_A36 RXIN_A36
TXOP_A TXON_A
RXIP_A RXIN_A
MB TO I/O-BOARD CONN
C
Q4 DTA114YUA
BAT1_LED BAT2_LED
LID_CL#25
LID SWITCH
J6
50 48 46 44 42 40 38
34 32 30 28 26 24 22 20 18
14 12 10
49
50
47
48
45
46
43
44
41
42
39
40
37
38
33
34
31
32
29
30
27
28
25
26
23
24
21
22
19
20
17
18
13
14
11
12
9
10
8 6 4 2
D
7
8
5
6
3
4
1
2
Foxconn-QT8B0501-1111
2
10K
49 47 45 43 41 39 37
33 31 29 27 25 23 21 19 17
13 11 9 7 5 3 1
HDD_LED BAT1_LED BAT2_LED
Title
SWITCH & LED
Size Document Number Rev
Tahiti(DM3L) 1A
Date: Sheet
星期二
SW2
1 2 3 4
SPPB53V
+5VALW+5VALW
13
Q5 DTA114YUA
47K
+5VSUS
C232
.1U
USB_VD4- 11 USB_VD4+ 11
USB_VD6+ 11 USB_VD6- 11
USB_EN# 25,45 USB_VD5+ 11
USB_VD5- 11 USB_VD7+ 11
USB_VD7- 11
QUANTA COMPUTER
29, 2005
三月
of
32 49,
E
Page 33
1
L41 BLM11A601S
1 2
A A
L40
1 2
BLM11A601S
AC97_REF
AC97_REF
B B
C C
D D
NB_MICIN34
IAC_RESET#_AUDIO10
IAC_SDATAO_AUDIO10
IAC_SDATAIN010
IAC_SYNC_AUDIO10
NB_MICIN C_NB_MICIN
IAC_BITCLK_ICH10 IAC_BITCLK_MDC24
2
12
C557 .047U
+3VRUNF
PC_SPKRIN
1 2
1 2
14M_AC9717
C569 *10P_NC
1 2
BYPASS_GND
BYPASS_GND
12
BYPASS_GND
12
C566 *10P_NC
1 2
C583 .1U_10V
C581 .22U_0805
C579 .1U_10V
R435 33
12
C578 .1U_10V
12
C484
2.2U_10V
IAC_BITCLK
R_IAC_SDATAIN0
12
R431 *10_NC
12
C563 *10P_NC
R434 39 R432 39
3
Headphone Power
12
12
12 12
C487 .1U_10V
12
C467 .047U
12
12
PC_BEEP
13
PHONE
14
AUX_L
15
AUX_R
22
MIC2
42
AVSS2
18
CD_L
19
CD_C
20
CD_R
21
MIC1
23
LINE_IN_L
24
LINE_IN_R
11
RESET#
5
SDATA_OUT
6
BIT_CLK
8
SDATA_IN
10
SYNC
3
XTL_OUT
2
XTL_IN
IAC_BITCLK
C488
2.2U_10V
C562 .1U_10V
4
SPK_SHUTDOWN#
43
34
LINE_OUT_L
N/C1
LINE_OUT_R
MONO_OUT
JACK SENSE0
VREFOUT
HP_OUT_L
HP_OUT_R
VIDEO_L VIDEO_R
JACK SENSE1
HP_COMM
N/C3
44
40
33
STAC9753A
R425 0
1 2
5VLDO
12
C728
2.2U_10V
U37
35 36
37 45
CID0
46
CID1
27
VREF
28
29
AFLT1
30
AFLT2
31
N/C2
32
CAP2
39 41 16
17 47
EAPD
48
SPDIF
SPDIF_SHDN 25
12
C489
1U_10V
1000P_NPO
SPKR_L SPKR_R
AC97VREFI AC97_REF
AFLT1 AFLT2
CAP2
BYPASS_GND
EAPD
U32
5
Vout
Vin
4
BYP GND2EN
TPS793475
12
C565
C580 2.2U_10V
1 2
C576 .1U_10V
1 2
C573 *.1U_10V_NC
1 2
C564 1000P_NPO
1 2
C559 1000P_NPO
1 2
C567 .1U_10V
1 2
HP_SPK_L 34 HP_SPK_R 34
SPDIF 38
R428 10K
1 2
+3VRUNF
12
C726
*.1U_10V_NC
12
R500 *10K_NC
1
3
12
C560 1000P_NPO
2
12
12
C502
C501
.047U
.1U_10V
GAINO GAIN1 AV
SPKR_L
3
47K
47K
1
VDDA+3VRUN +5VSUS
38
9
AVDD125AVDD2
DVDD11DVDD2
DVSS14DVSS27AVSS1
26
5
C494 1U_10V
MIC_SENSE 34
12
BEEP Controller Circuit
0 0 6dB 0 1 10dB 1 0 15.6dB 1 1 21.6dB
C534 .047U_16
1 2
C498 .047U_16
1 2
C527 .47U_10V
1 2
C533 .47U_10V
1 2
C532 .47U_10V
12
Q41
*DTC144EUA_NC
HP_NB_SENSE25,34
C_SPKR_L
C_SPKR_RSPKR_R
AMP_BYPASS AUDIO_G0 AUDIO_G1
+3VSUS
+5VSUS
6
VDDA
12
R439
4.7K
VCCA_U39
U38
52
BEEP25
SPKR11
PCM_SPK#21
+5VSUS
6 1 3
NC7SZ386
+5VSUS
12
C526
C500
10U_10V
.1U_10V
U34
6
PVDD1
15
PVDD2
16
VDD
5
LIN-
17
RIN-
9
LIN+
7
RIN+
10
BYPASS
2
GAIN0
3
GAIN1
TPA6017A2/FAN7031/LM4874
4
12
ROUT+
ROUT­LOUT+
LOUT-
SHUTDOWN
GND5 GND1 GND2 GND3 GND4
7
C582 1U_16V
1 2
R_PC_SPKRIN
C504 .1U_10V
RBAT_3V25
18 14
4 8
19 12
NC
27 1 11 13 20
R438 10K
12
C503 .047U
INT_SPK_R1 INT_SPK_R2
INT_SPK_L1 INT_SPK_L2
12
1 2
R369
0_0603
C461 *100P_NC
1 2
C574 .1U_10V
1 2
R437
8.2K
JSPK2 53398-0790
8
8
1122334455667
12
C462 *100P_NC
1 2
1 2
8
PC_SPKRIN
12
C572 *1nF_NC
C463 *100P_NC
1 2
9
9
7
C464 *100P_NC
AUDIO AMP.
R427 100K
1 2
2
4 2
31
RP32
4P2R-S-100K
SPK_SHUTDOWN#
NB_MUTE25
Q39
2N7002
AUDIO_G0
3
AUDIO_G1
1
2
R409 *1 K _ NC
12 12
R410 1K
31
Q40
2N7002
EAPD
31
2
Q38 2N7002
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
AC97 CODEC/AMP
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
33 49,
8
Page 34
1
A A
2
3
4
VDDA_EXT_MIC
12
C513 1nF
5
C519
4.7U_10V_0805
5VLDO
12
R408
1.3K
L45
BLM11A121S
6
+5VRUN
12
10K R502
7
8
R402
C499
470P
1.2K
1 2
EXT_MIC+ EXT_MIC_VDDA
C510
12
12
470P
HP_NB_SENSE
R418
1 2
100K
12
12
C530
C537
470P
470P
R401 100/F
12
12
C545 1U_16V
C505 1nF
1 2
L46 BLM11A121S
1 2 1 2
L47 BLM11A121S
NB_MICIN33
B B
C555 1U_16V
HP_SPK_L33
HP_SPK_R33
C C
1 2 1 2
C551 1U_16V
HP_SPK_L1 HP_SPK_R1
HP_NB_SENSE
C548 1U_16V
1 2
C549
1U_16V
U35
13
INL
15
INR
14
SHDNR
18
SHDNL
1
C1P
3
C1N
5
PVSS
7
SVSS
MAX4411
12
OUTL
OUTR
NC1 NC2 NC3 NC4 NC5
NC6 SVDD PVDD PGND SGND
9 11 4 6 8 12 16 20 10 19 2 17
HP_SPK_L2 HP_SPK_R2
R420 0
R419 *0_N C
12
12
L43
+3VRUN
VDDA
BLM11A121S
HP_SPK_L3 HP_SPK_R3
CON3
1 2 6 3 4 5
7 8
12
9
10 11
SUYIN-RC142A-12G2
+3VRUN
MIC_SENSE 33
MONO MIC
LINE OUT
HP_NB_SENSE 25,33
Headphone Audio Amp.
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
AUDIO HEADPHONE CONN
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
34 49,
8
Page 35
5
4
LAN-BCM4401KFB(10/100M)
BCM4401--10/100
3
2
1
+3V_LAN
Close to power pins
12
C584
C585
10U_10V
D D
.1U_10V
12
C586
.1U_10V
12
C587
.1U_10V
12
C588
.1U_10V
12
C589
.1U_10V
12
C590
.1U_10V
12
C591
.1U_10V
12
C592
.1U_10V
12
C593
.1U_10V
0.1U*12 pcs
AD[0..31]10,21,23
ID Select : AD16 Interrupt Pin : PIRQC# Request indicate : REQ4# Grant indicate : GNT4#
C C
R488 100
1 2
Y5
12
25MHz_FSX
+/-30PPM
C/BE3# C/BE2# C/BE1# C/BE0# FRAME# IRDY# TRDY# DEVSEL# STOP#
SERR# PAR PIRQC#
PCIRST# PCLK_LAN GNT4# REQ4# PCI_PME#
12
C/BE3#10,21,23 C/BE2#10,21,23 C/BE1#10,21,23 C/BE0#10,21,23
FRAME#10,21,23
IRDY#10,21,23
TRDY#10,21,23 DEVSEL#10,21,23 STOP#10,21,23 PERR#10,21,23 SERR#10,21,23
PAR10,21,23
PIRQC#10,21
PCLK_LAN15
B B
R444
*33_NC
12
C619
*22P_NC
Note: Pop R489 depop R490 when CLKRUN# is required Pop R490 depop R489 when CLKRUN# is not required
AD16 PIDSEL
CLKRUN#10,21,23,25
PCIRST#10,21,23
PCI_PME#21,23,25,26
1 2
R489 *0_NC
GNT4#10 REQ4#10
12
R490
4.7K
C719
27P
12
.1U_10V
AD31 AD30 AD29 AD28 AD27 AD26 AD25 AD24 AD23 AD22 AD21 AD20 AD19 AD18 AD17 AD16 AD15 AD14 AD13 AD12 AD11 AD10 AD9 AD8 AD7 AD6 AD5 AD4 AD3 AD2 AD1 AD0
12
12
C594
200 R491
C720 27P
12
C595
.1U_10V
122 123 124 126 127 128
10 11 14 15 16 33 34 36 37 38 39 41 42 45 48 49 50 51 53 54 55
18 32 43 20 21 23 26 27 28 29 31
116 117
118 119 121 113
22 67 66
1 3 6 8 9
4
5
12
C596
.1U_10V
U1
PCI_AD31 PCI_AD30 PCI_AD29 PCI_AD28 PCI_AD27 PCI_AD26 PCI_AD25 PCI_AD24 PCI_AD23 PCI_AD22 PCI_AD21 PCI_AD20 PCI_AD19 PCI_AD18 PCI_AD17 PCI_AD16 PCI_AD15 PCI_AD14 PCI_AD13 PCI_AD12 PCI_AD11 PCI_AD10 PCI_AD9 PCI_AD8 PCI_AD7 PCI_AD6 PCI_AD5 PCI_AD4 PCI_AD3 PCI_AD2 PCI_AD1 PCI_AD0
PCI_CBE_L3 PCI_CBE_L2 PCI_CBE_L1 PCI_CBE_L0 PCI_FRAME_L PCI_IRDY_L PCI_TRDY_L PCI_DEVSEL_L PCI_STOP_L PCI_PERR_L PCI_SERR_L PCI_PAR PCI_INT_L
PCI_RST_L PCI_CLK PCI_GNT_L PCI_REQ_L PCI_PME_L PCI_IDSEL PCI_CLKRUN_L
XTAL_IN XTAL_OUT
BCM4401
+3V_LAN +1P8V_LAN
106
114
VESD
56
VESD25VESD
115
125
VDDIO_PCI
VDDIO_PCI
VDDIO_PCI19VDDIO_PCI30VDDIO_PCI40VDDIO_PCI52VDDIO_PCI
94
7
VDDIO
VDDIO79VDDIO
BCM4401KQL 128P QFP
VSS12VSS46VSS
VSS
VSS84VSS2VSS24VSS74VSS13VSS47VSS
111
100
96
97
65
XTAL_AVDD
REGULATOR_AVDD
REGULATOR_AVDD
VSS
35
120
112
44
91
92
VDDCORE
VDDCORE17VDDCORE
REGULATOR_VOUT1
REGULATOR_VOUT2
EPHY_BIAS_AVDD
EPHY_TESTMODE
GPIO2/VAUXAVAIL
EPHY_AGND
EPHY_BIAS_AVSS
EPHY_PLLGND
XTAL_AVSS
58
70
63
68
12
C597
.1U_10V
LINK_LED10#
LINK_LED100#
ACT_LED# COL_LED#
EPHY_AVDD
EPHY_PLLVDD
EPHY_VREF
EPHY_VDAC
EPHY_TDP EPHY_TDN EPHY_RDP EPHY_RDN
GPIO1 GPIO0
BOOTROM_SCL
BOOTROM_SDA
SPROM_CS
SPROM_CLK
SPROM_DOUT
SPROM_DIN
EXT_POR_L
JTAG_TDP JTAG_TCK
JTAG_TDI
JTAG_TRST_L
JTAG_TMS
12
C598
.1U_10V
NC NC NC NC NC NC NC NC
75 76 77 78
69 57 64
71 72 88
62 61 59 60
104 105 103 108 102 109 110 107
87 86 85
90 93
98 95 101 99
89 83
80 82 73 81
12
C599
.1U_10V
10M_LINK# 100M_LINK# ACTLED#
+1P8V_LAN
12
C600
.1U_10V
T121
R440 1.21K/F
+3V_LAN
R487
12
1K
T108 T109
SPROM_CS SPROM_CLK
SPROM_DOUTPERR# SPROM_DIN
R442 0
1 2
C606
10U_10V
10M_LINK# 32,38 100M_LINK# 32,38 LAN_ACTLED# 32,38
12
12
12
R484
49.9/F
12
C614
.1U_10V
LAN_LOW_PWR# 26
T106 T107
R483
49.9/F
12
C717
1000P_NPO
Note: EXT_POR_L has a internl pull up.
L49
1 2
BLM11A601S C718
2.2U_6.3V
12
R485
49.9/F
L48 BLM11A601S
1 2
12
C610
.1U_10V
1 2
+1P8V_LAN
12
R486
49.9/F
12
C615
.1U_10V
U41
1 2 3 4
4*AT93C46
CS SK DI DO
12
C613
.1U_10V
8
VCC
7
NC
6
ORG
5
GND
Note: The BCM 44 01 has weak internal pulldown resistors on the following signals: SPROM_CS, S PROM_ CLK, SPROM_DOUT, SPROM_DIN.
12
C611
.1U_10V
L50
BLM11A601S
12
C616
.1U_10V
+3V_LAN
+1P8V_LAN
+3V_LAN
TXOP 36
TXON 36
RXIP 36 RXIN 36
Note: BCM4401 requires 16-bit R/W data width
A A
QUANTA
Title
Size Document Number R ev
5
4
3
2
Date: Sheet
COMPUTER
BCM4401 100/10 LAN
Tahiti(DM3L) 1A
星期二
T 29, 2005
月
1
of
35 49, 
Page 36
A
4 4
3 3
10/100LAN_E-SWITCH
B
+3V_LAN
TXOP_L
R166
TXOP35 TXON35
RXIP35 RXIN35
1 2
12nH 5%
R167
1 2
12nH 5%
R200
1 2
5.6nH 5%
R199
1 2
5.6nH 5%
RXIP_L RXIN_L
4 7 9
12
8
1Y 2Y 3Y 4Y
GND
U19 PI3L110Q
C268 .1U
16
1A 1B
VCC
2A 2B 3A 3B 4A 4B
A/B
G
C
TXOP_A
2 3
TXON_ATXON_L
5 6
RXIP_A
11 10
RXIN_A
14 13
1 15
R196 10K
DOCK_TDP DOCK_TDN DOCK_RDP DOCK_RDN
DOCK_TDP 38 DOCK_TDN 38 DOCK_RDP 38 DOCK_RDN 38
DOCKED 26,38
D
TXOP_A 32 TXON_A 32 RXIP_A 32 RXIN_A 32
E
+3V_SRC
12
31
PR142 100K
12
2
PR145 200K
+3V_SRC
PWR_SRC
2 2
AUX_EN25,45
1 1
PQ51
RHU002N06
2
12
PR143 100K
31
PQ50 RHU002N06
PQ49
SI3456DV
6 5 2 1
+3V_LAN
4
12
PC126
3
12
PR144 470K
4.7U
LAN POWER
12
PC127 .1U_10V
QUANTA
Title
Size Document Number Rev
A
B
C
D
Date: Sheet
LAN SWITCH/LAN POWER
Tahiti(DM3L) 1A
星期二
29, 2005
三月
E
of
36 49,
Page 37
1
A A
2
3
4
+3VRUN
5
6
7
8
Note : Total require 1/4W, ~3.6 ohm
R79 2_1206
12
B B
C112
1U_16V
12
C100 .1U_10V
12
R71 10_0805
1 2
Total require 1/8W
IRTX25 IRRX25
IRMODE25
12
R78 10K
12
C104
4.7U_10V_0805
12
C109 *.1U_10V_NC
IR_LEDA
IRTX IRRX IRMODE FIR_VCC
12
R77 10K
U31 T F DU6102F
1
IREDA
2
IREDC
3
TXD
4
RXD
5
SD/MODE
6
VCC
7
MODE
8
GND
NC
9
IR Detector
C C
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
5
6
Date: Sheet
FIR
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
37 49,
8
Page 38
1
A A
B B
DVI
+3VRUN
12
12
R174 10K
DVI_T+
R173 22K
+3VRUN
12
12
R175 22K
R176 10K
DVI_T-
PCLK_DOCK15
SMBUS
PCLK_DOCK
12
R169
*22_NC
12
C248
*18P_NC
AC-Terminator
C C
SMBUS ADDRESS : DOCK/APR Microprocessor -- 74H
DOCK USB/IDE Interface(FX2) -- 72H
DOCK SMbus Battery 16h Charger 12h IDE I/F 70h D-BAY 72h SIO 48h
D D
1
2
DOCK_PWR_SRC
P1 P2 P3 P4
S1 S2
DVI_CLK-16
DVI_CLK+16
DVI_T­DVI_T+
DVI_T+ DVI_T-
DOCK_PSID47
DVI_T+ DVI_T-
DVI_TX2+16
DVI_TX2-16
DVI_TX1+16
DVI_TX1-16
DVI_TX0+16
DVI_TX0-16
PCLK_DOCK
DOCK_SMB_CLK26 DOCK_SMB_DAT26
CLK_SM126 DAT_SM126
S3 S4 S5 S6 S7 S8
S9 S10 S11 S12 S13
S15 S17
S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32 S33 S34 S35 S36 S37 S38 S39 S40 S41 S42 S43
S45 S47
S48 S49 S50 S51 S52 S53 S54 S55
DOCKING POWER SWITCH
2
3
J7A
V1+ V2+ V3+ V4+
S1 S2 S3 S4 S5 S6 S7 S8 S9 S10 S11 S12 S13
S15 S17
S18 S19 S20 S21 S22 S23 S24 S25 S26 S27 S28 S29 S30 S31 S32
S100
S33
S101
S34
S102
S35
S103
S36
S104
S37
S105
S38
S106
S39
S107
S40
S108
S41
S109
S42
S110
S43
S111 S112
S45
S113 S114
S47
S115
S48
S116
S49
S117
S50
S118
S51
S119
S52
S120
S53
S121
S54
S122
S55
S125 S126 S127 S128
M136
AMP-1473681-280P
DOCK_PWR_EN26
3
4
+DC_IN
P5
V5+
P6
V6+
P7
V7+
P8
V8+
S69
S69
S70
S70
S71
S71
S72
S72
S73
S73
S74
S74
S75
S75
S76
S76
S77
S77
S78
S78
S79
S79
S80
S80
S81
S81
S82
S82
S83
S83
S84
S84
S85
S85
S86
S86
S87
S87
S88
S88
S89
S89
S90
S90
S91
S91
S92
S92
S93
S93
S94
S94
S95
S95
S96
S96
S97
S97
S98
S98
S99
S99
S100 S101 S102 S103 S104 S105 S106 S107 S108 S109 S110 S111 S112 S113 S114 S115 S116 S117 S118 S119 S120 S121 S122
S125 S126 S127 S128
M136
+3V_LAN
M_SEN# 18
D_SERIRQ 25
D_DLDRQ1# 25 D_LFRAME# 25
DVI_SCLK 16 DVI_SDAT 16 DVI_DETECT 16
DVI
USB
USB_VD1- 11
USB_VD1+ 11
+3V_LAN
C250 .1U_50V
C252 .1U_50V
R172
1 2
100/F
RING 24
VGA_RED 6,18
DOCK_SMB_INT# 26 CLK_KBD 26 DAT_KBD 26
12 12
VGA
LPC
SMBUS
R171
1 2
100/F
MODEM
Q7 FDS4435
8 7
PWR_SRC
DOCKED
C20
.47U_0805
12
+3VSUS
5
2 1
U18
7SH08
1 2 3
12
R7 100K
4
R158 *0_NC
1 2
4
4
R6 100K
1 2
6 5
R163 100K
1 2
5
LPC
SPDIF
DOCK_PWR_SRC
31
2
5
VGA
VGA_GRN6,18 VGA_BLU6,18
D_LAD125 D_LAD225 D_LAD325
+DC_IN
C241 .1U_50V
1 2
S-VIDEO
TV_C/R6,18
SPDIF33
10M_LINK#32,35
100M_LINK#32,35
DOCK_RDN36 DOCK_RDP36 DOCK_TDN36 DOCK_TDP36
LAN
C16
1 2
.1U_50V
Place it close to Docking CONN
Q18 2N7002
6
J7B
DOCK_DET# DOCK_DET#
C245 1nF
1 2
DOCK_OWNS_PCI
C249 .01U
1 2
C251 .01U
1 2
MODEM
TIP24
DOCK_PWR_SRC
C15
1 2
1nF
S137
S137
S138
S138
S139
S139
S140
S140
S141
S141
S142
S142
S143
S143
S144
S144
S145
S145
S146
S146
S147
S147
S148
S148
S149
S149
S150
S150
S151
S151
S152
S152
S153
S153
S154
S154
S155
S155
S156
S156
S157
S157
S158
S158
S159
S159
S160
S160
S161
S161
S162
S162
S163
S163
S164
S164
S165
S165
S166
S166
S167
S167
S168
S168
S169
S169
S170
S170
S171
S171
S172
S172
S173
S173
S174
S174
S175
S175
S176
S176
S177
S177
S178
S178
S179
S179
S180
S180
S181
S181
S182
S182
S183
S183
S184
S184
S185
S185
S186
S186
S187
S187
S188
S188
S189
S189
S190
S190
S193
S193
S194
S194
S195
S195
S196
S196
M204
M204
AMP-1473681-280P
S205 S206 S207 S208 S209 S210 S211 S212 S213 S214 S215 S216 S217 S218
S220 S222
S223 S224 S225 S226 S227 S228 S229 S230 S231 S232 S233 S234 S235 S236 S237 S238 S239 S240 S241 S242 S243 S244 S245 S246 S247 S248
S250 S252
S253 S254 S255 S256 S257 S258 S259
Docking Detect Circuit
6
S205 S206 S207 S208 S209 S210 S211 S212 S213 S214 S215 S216 S217 S218
S220 S222
S223 S224 S225 S226 S227 S228 S229 S230 S231 S232 S233 S234 S235 S236 S237 S238 S239 S240 S241 S242 S243 S244 S245 S246 S247 S248
S250 S252
S253 S254 S255 S256 S257 S258 S259
+5VALW
DOCK_DET#
7
DOCK_DAT_DDC2 18 DOCK_CLK_DDC2 18
HSYNC 18
VSYNC 18 D_CLKRUN# 25 DOCK_SIO_ALERT# 25,26
S-VIDEO
TV_COMP 6,18
TV_Y/G 6,18
LAN_ACTLED# 32,35
HDD_LED 32
+3VALW
12
12
R155 10K
2
R162 10K
Q17 DTC144EUA
1 3
8
VGA
D_LAD0 25
LPC
DOCKED 26,36
QUANTA
Title
Size Document Number Rev
Date: Sheet
Docking Station Conn.
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
38 49,
8
Page 39
1
2
3
4
5
6
7
8
+3VSUS
C390 .047U
1 2
A A
IMVP_PWRGD6,11,42
RESET_OUT#26
+3VRUN
Keep Away from high speed buses
B B
+3VSUS
RUN_ON25,27,46
VCCP_PWRGD42,44
2 1
12
12
5
U29 7SH08
R305 100K
C399
.01U
1 2
2 1
C402
.047U
5
U27
7SH08
4
DBR#3
4
SYSTEM POWEROK(ICH_PWROK) to SB to generate PCIRST#/PLTRST# Circuit
U28D
+3VSUS
C403 .1U_10V
14
U28A
1 2
74AHC08
12 13
74AHC08
1 2
ICH_PWROK
11
3
U28B
4 5
74AHC08
ICH_PWROK 11,31
6
RUNPWROK Circuit
RUNPWROK 26,42
C C
+1_5VSUS
12
R303 20K/F
C396 1U_10V
D D
1
1.8V_PWRGD43,44
2
R300 100K
Q33
2
3904
1 3
SUS_ON25,45,46
+3VSUS+3VALW
12
R294 *330_NC
U28C
9
10
74AHC08
8
SUSPWROK Circuit
5
Q35
+3VSUS
R496 *0_NC
1.5VSUS_PWRGD
R311
5
2 1
7SH08
C721
1 2
.047U
12
0
U42
SUSPWROK_B
12
4
4
31
2
2N7002
1.5V_PWRGD44
3
SUSPWROK 11,21,31
6
QUANTA
Title
Size Document Number Rev
Date: Sheet
SYSTEM RESET/POWER GOOD
Tahiti(DM3L) 1A
星期二
29, 2005
三月
7
of
39 49,
8
Page 40
1
2
3
4
PD5 ES3DB
2 1
5
A A
DC_IN+ discharge path
SDC_IN+
2
1
2
1
PBAT_D
PD25
RB715F
PR40 100K
1 2
3
PD8 RB715F
PQ15B FDS6975
3
Title
Size Document Number Rev
Date: Sheet
31
1 2
PR56 47K
PR57 470K
1 2
PQ18 2N7002
2
2
PQ15A FDS6975
1 7
2
PBA-DC1
PR55 10K
1 2
31
PQ9 2N7002
8
PQ28A FDS6975
CHG_SBAT
PQ28B FDS6975
17
2
PR46 100K
1 2
PC44 .1U_50V
PC46 .1U_50V
PR50 100K
1 2
4
CHG_PBAT
35
12
CHG_SBATT_N
CHG_PBATT_N
12
V_CHG
CHG_SBAT_N
31
B B
C C
CHG_SBATT26
12
R65 *100K_NC
CHG_PBATT26
12
R122 *100K_NC
2
2
PQ11 2N7002
PQ13
2N7002
3 1
CHG_PBAT_N
V_CHG
8
PR45 10K
1 2
PR51 10K
1 2
6
To change swap battery's voltage from 9.6V to 7.5V
12
31
PR68
49.9K/F
SBATT+
PR65
24.9K/F
1 2
PR63 1 0K/F
1 2
1 2
1 2
PR62 100K
+5VALW
PBATT+
5 6
2
CT_0315: Change PR64 from 1M to 147K/F, PR65 from 49.9K/F to
24.9K/F, PR68 from 24.9K/F to
49.9K/F per Power.
PC69
*.1U_50V_NC
D D
SBAT_LOW26
SBAT_PRES#26,47
+5VALW
2 1
1
5
PU6
7SH32
4
PQ20
2N7002
2
PR64
1 2
147K/F
12
PC66
.1U_50V
PD14
84
PU5B
+
7
-
LM393
2
3
1
RB715F
PQ29B FDS6975
3 5
3 2 1
PQ14 Si9435DY
PBA-DC
4
4
5 6 7 8
PR58 47K
1 2
6
ACAV_IN25,41
12
PR59
470K
1 2
PR60 100K
PBATT+
3 2
3
+
-
84
SBATT+47
PBATT+47
PU5A
LM393
+3VALW
PR61 470K
1 2
PB_DC
1
AC_D1
4
PQ7 FDS4435
8
SBAT_G
PBAT_G
7 6 5
2 1
8
2 1
6
AC_D2
PQ29A FDS6975
PD13 ES3DB
4
PR38 240K
PD20 ES3DB
2
1 2
4
12
1 2 3
1 2
17
PR44 470K
35
PR109 470K
PWR_SRC
QUANTA COMPUTER
BATTERY SELECTOR
Tahiti(DM3L) 1A
40 49,
星期二
29, 2005
三月
5
of
Page 41
1
A A
B B
Connect GND side of PC112 , PC114 , PC116 , PC119 , to GND through 1 via.
C C
ACAV_IN25,40
DC_IN+
12
PC138 *.1U_50V_NC
Reserved for offset
PC95 .01U
1 2
12
+
PR42 4 9.9K/F
12
PC96 .01U
LDO
12
PR41 10K
12
PR39
16.2K/F
2
PC31
4.7U_25V_0805
12
PR37 365K
12
PC39 .01U
12
CCV1 CCV
12
12
+5VALW
PC97 .01U
PC99
.1U_50V
12
PR88
4.7/F_0603
12
.1U_50V
PR94 10K
1 2
12
PC94 1U_10V
V_CHG
12
PC98 1U_10V
PC91 1U_25V
DCIN1
PC90
1 2
CHVREF
ACIN CCS CCI
DAC
12
*.1U_50V_NC
PU9
1
DCIN
27
SRC
25
DHIV
3
ACIN
6
CCS
7
CCI
8
CCV
11
DAC
4
REF
17
I.C
19
BATT
12
VDD
13
THM
32
ACOK
PR36 .01
1 2
PR90
0
CSSP
PC128
31
PDS
Adress : 12H
MAX1535B
GND1
5
GND2
18
4
3
CSSN1CSSP1
12
12
PR89 0
CSSN
29
28
CSSP
CSSN
INT
LDO
DLOV
DHI
DLO
PGND
CSIP CSIN
SCL SDA
VMAX
IMAX
PDL
10
30
IMAX CHVREF
12
PR97 75K/F
3
SDC_IN+
12
PC129
*.1U_50V_NC
16
PC93 1U
LDO
2
12
PR91 33/F
PC92 .1U
DLOCH
24
DHI
26
DLO
23
22
CSIP
21
CSIN
20
T87 PAD
15
T88 PAD
14
9
PR98 280K/F
1 2
12
PQ10 AO4407
4
12
PBAT_SMBCLK 17,26,47
PBAT_SMBDAT 17,26,47
1 2
12
PR95 182K/F
SDC_IN+
4
PR96
31.6K/F
4
SDC_IN+
PC37 2200P
CHG_LX
12
*.1U_50V_NC
12
8.2uH-SIQH125
12
PC130
*.1U_50V_NC
12
PR146 *0_0603_NC
PR92 0
PC131
PC34 .1U_50V
PL4
1 2
12
*.1U_50V_NC
12
PC33 10U_25V_1206
CHG_CS
PR93 0
1 2
PC132
12
PC32 10U_25V_1206
PR43
.01
12
4
3
12
CSIP1
CSIN1
PC43 .1U_50V
10U_25V_1206
12
PC42
+
12
123
786
5
876
PQ52
AO4704
2
351
CHVREFVMAX
V_CHG
12
PC101
+
10U_25V_1206
5
12
PC100
+
*10U_25V_NC
Reserved for 4 cell battery reduce ripple and noise
CT_0314: Reserved a PC138 0.1U Cap for RC delay.
D D
QUANTA
Title
Size Document Number Rev
1
2
3
4
Date: Sheet of
COMPUTER
Battery Charger
Tahiti(DM3L) 1A
星期二
29, 2005
三月
41 49,
5
Page 42
1
PR18 10K
1 2
PR20 0
CPU_VID0 CPU_VID1 CPU_VID2 CPU_VID3
CPU_VID5
1907_S0 1907_S1 1907_S2
PBOOT_B0 PBOOT_B1 PBOOT_B2
VCORE_REF
PQ23 *2N7002_NC
PR158
PQ24 *2N7002_NC
VH_VCC
PC5
1U_10V
PU2 MAX1907
36
SYSPOK
37
IMVP_OK
38
CLK_EN
26
D0
25
D1
24
D2
23
D3
22
D4
21
D5
4
S0
5
S1
6
S2
1
B0
2
B1
3
B2
7
SHDN
20
DPSLP
35
SUS
8
REF
27
DD
9
ILIM
39
TIME
12
12
CC
12
PR156
30.1K/F
1 2
D5 1 1 1 1 1 1 1
1 1 1 1 1 1 1.500V 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1
+3VRUN
PR19 10K
CPU_VID04 CPU_VID14 CPU_VID24 CPU_VID34 CPU_VID44 CPU_VID54
2
2
+3VRUN
12
PR17
2.21K/F
DELAY_IMVP_PWRGD CLK_EN#
PR7 0
PR9 301K/F
PR13 49.9K/F
PC12 100P
PR155 *15 K / F_NC
31
*36.5K/F_NC
31
A A
VCCP_PWRGD39,44
IMVP_PWRGD6 ,11,39
CLK_EN#15,17
IMVP_PWRGD
12
PC137
.1U_50V
CT_0217: Add PC137 .1U_0603
B B
C C
D D
RUNPWROK26,39
STP_CPU#4,11,15
DPRSLPVR11
PR154 *0_NC
12
12
1 2
RUNPWROK
STP_CPU#
DPRSLPVR
PC10
.22U_10V
PR157 *0_NC
+3VRUN
PU8A *7WZ14_NC
5
1 6
PU8B *7WZ14_NC
5
3 4
CLK_EN#
CT_0105: Change PU8 footprint from SC70-6 to SC70-2_1-65-6P
1
2
+5VRUN
21
PR1 10
10
VCC
POS
13
PR12 1.24K/F
PC8 270P
PR14 100K/F
D4
D3
0
0 00
0 0
0
0
0 0
0
0
01
0 1.612V
0 0
0 1
0 0
1
0
1 1
0 0
1
0
1 1
0 0
0
1
0
1 1
0
1
0
1
0 0
1
0
1
0
1
1
1 1
1
1
1 1 1
1
1
1
1
1 1
1
PC4 1U_10V
PWR_SRC
30
34
V+
VDD
31
BST
33
DH
32
LX
29
DL
40
TON
11
GND
28
PGND
17
OA+
16
OA-
15
FB
18
CSP
19
CSN
NEG
14
D0
D2 0
0 0 1 1 1 1 0 0
0 1 1 1 0.972V 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1
Output
D1 0
0
1.196V
1.180V
0
1
1
1.164V
0
1.148V
1
1
1.132V
0
0 0
1.116V10
1
1
1.100V
00
1.084V
1
1
0
1.068V
0
1.052V
0
1 0
1.036V
1
11
1
1.020V
0
0
1.004V
1
0
0.988V
01
1
1
11
0.940V
0
0 0
0.924V
1
0.908V
1
0 1
1
0.892V
0
0.876V
1
0
0.860V
1
0.844V
0.828V
1
1 0
0
0.812V
0
0.796V
1
1
0
0.780V
0.764V
11
1
0
0.748V
1
0.732V
0
0.716V
0 1
0.700V
1
2
BST1_VCORE
PR4 1_0603
BST1
DH_VCORE
LX_VCORECPU_VID4
DL_VCORE
PR16 *0_NC
OA+
OA-
PC14 100P
VH_FB
PR15 1.5K/F
CSP_FB
CSN_FB
VH_FB
D5 0 0 0 0 0
0 0 0 0 0 0 0 0 0 0
0 0 0 0 0 00 0 0 0 0 0 0 0
0
PD2 RB751V
VH_VCC
PC7 1000P
D4 0 0 0 0 0 0
0 0 0 0 0 0 0 001 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 11 1
PC3 .1U_50V
D2
D3
0
0 0
0
0
0 0
0 0
1 1
0
1
0
1
01
0
1
0
1
0
1
0
1
1
1 1 1
1
000
0
0
0
0
0
0
1
0 0
1
0
1 1
0
0
1 1
0 0
1 1
0 1
1
1
1 1
1
1
1
4
12
PC1
PQ3
Si7336ADP
*.01U_NC
PR5 750/F PC6
*470P_NC PR6 1K/F
PR8 200/F
PR10 200/F
D0
D1
Output
0
0
1.708V
1.692V
1
0
1.676V
0
1
1
1
1.660V
0
1.644V
0
1.628V
0
0 1
1
1.596V
1.580V
0
0
1.564V
0
1
1.548V
1
00 1
1
1.532V
0
1.516V
0
1
0
0
1.484V
10.956V
1
1.468V
0
1.452V
0
1
1.436V
0
0
1.420V
1
1.404V
110
1
0
1.388V0
0
1.372V
1
0
0
1
1.356V
1
1.340V
1
1.324V
00
1
1.308V
0
0
1
1.292V
1.276V
1
1 0
1.260V
0 0
1 1.244V
1.228V
1
0
1
1
1.212V
4
2
876
9
351
3
876
9
PQ2 TPCA8005-H
SOIC8-9P
2
351
4
PQ4
Si7336ADP
SOIC8-9PSOIC8-9P
PR81 *0_NC
PR150 *0_ NC
PR151 0
3
PWR_SRC
PC21 2200P
2
876
351
9
VH_VCC
2 1
PR85 0
PR82 *0_NC
PC22 .1U_50V
PD3
RB051L-40
VH_VCC
12
PC23
+
10U_25V_1206
PL2
0.6UH/30A
OAP_FB
OAN_FB
PR86 0
PR83 *0_NC
12
+
10U_25V_1206
LSense+
12
PC2
*1000P_0805_NC
12
PR2 *0_0805_NC
PR87 *0_NC
PBOOT_B0VCORE_REF
PBOOT_B1
PBOOT_B2
PR84 *0_NC
12
PC24
PC25
+
10U_25V_1206
PR3 1mR
1 2
3
PBOOT VOLTAGE SETTING UP ON
1.212V
4
12
PC26
+
10U_25V_1206
VHCORE
4
12
PC83
+
470U_2V
9mOhm 7343 POSC
12
PC84
+
470U_2V
9mOhm 7343 POSC
12
PC85
+
470U_2V
9mOhm 7343 POSC
12
PC86
+
*470U_2V_NC
9mOhm 7343
CH747RY8800
POSC
Limited Current Point =28.5A
PR152 0
1907_S0
PR11 0
1907_S1
PR153 *0_NC
1907_S2
The C4 mode voltage is 0.748V
C4(Deeper sleep) VHCORE Voltage
PR9
PR11
PR13
QUANTA
Title
Size Document Number Rev
4
Date: Sheet
COMPUTER
CPU POWER
DM3B 1A
星期二 三月
PC134
*2200P_NC
5
12
PC135
*.01U_NC
VH_VCC
VH_VCC
0.748V
0
0
NC NC
5
12
0.716V
NC
0
PC136 *.1U_10V_NC
42 49, 29, 2005
of
Page 43
5
4
3
2
1
D D
PWR_SRC
12
PC67
+
8.5A Current limit
+1_8VSUS
C C
B B
CT_0217: Remove JP6,JP7 short jumpers.
12
PC56 150U/6.3V
SJ3
2
112
Jump20X10
12
PC48
+5VSUS
.1U
12
PC52 150U/6.3V
18mOhm18mOhm
PR108 0
1 2
10U_25V_1206
1.5UH_SIL104R-1R5_10A/8.1 mohm
12
PR106 *2K/F_NC
12
PR107 *10K/F_NC
12
+
10U_25V_1206
PC63 .1U_50V
1 2
PL5
1 2
3.3/F_0603
PC60 1000P
PC65
PR54
12
PC62 2200P
12
12
876
2
351 876
2
351
PC57 .1U_50V
DH_1
4
PQ17
IRF7413Z
4
PQ16
FDS6676S
1 2
PR115 0
PR52 0
1.8BST
1.8V_DH
12
1.8V_LX
1.8_DL
1.8V_OUT
1.8V_FB
+5VSUS
SMDDR_VREF
+5VSUS
12
12
PU4
TPS51116
PR111
3.3/F_0603
PC59
4.7U_10V_0805
20
VBST
19
DRVH
18
LL
17
DRVL
16
PGND
9
VDDQSNS
10
VDDQSET
8
COMP
CT_1126: The current limit set up 10uA X PR53 / PQ16 Rds ON(6mOhm) = Current limit
VCC_2.5V
12
PR53
14
V5IN
VTTREF
7
12
PC53
0.033U
PC58 1000P
1 2
VTTGND
15
PGOOD
VLDOIN
MODE
VTT
VTTSNS
GND
5
5.11K/F
CS
S5 S3
13
12 11 1
3 6
2 4
12
+3VSUS
PC55 10U_4V
PR110 100K
PC54
1 2
.1U
PC47 10U_4V
1 2
1.8V_PWRGD 39,44
SUSPWROK_5V 44,45
RUN_ON_D 25,44,46
+1_5VRUN
PC51
PC49
10U_4V
10U_4V
1 2
1 2
0.9V
CT_0217: Remove JP5 short jumper.
SMDDR_VTERM
A A
QUANTA
Title
Size Document Number R ev
5
4
3
2
Date : Sheet
COMPUTER
1.8V,0.9V
Tahiti(DM3L) 1A
43 49,
星期二 三月
29, 2005
1
of
Page 44
1
2
3
4
5
+5VSUS
PWR_SRC
12
17
+
SKIP
PL9
PR25 0
13
PWR_SRC
VDD
OVP4LATCH
2
12
16
V+
BST
GND
OUT
PC116 .1U_50V
DH
LX CS DL
FB
D1 D1
S1
D1 D1
S1
+5VRUN
18 20
19 1 12
11
6 5
A A
5.0A Current Limit
CT_0217: Remove JP12 short jumper.
+1_5VSUS
12
12
PC106
+
PD26
RB551V-30
2 1
B B
C C
VCCP_PWRGD39,42
D D
+3VRUN
PR33 100K
.1U
RUN_ON_D25,43,46
1_05_REF
PC109 *150U/2V_NC
CC7343
18mOhm 25mOhm
PC30 .22U_10V
1_05_REF
1_05_VCC
+
PC108 220U/6.3V_ESR25
CC7343
PC28
2.2U_10V
PR34 *0_NC
PR35 *0_NC
PR26 0
12
PR32 100K/F
12
PR30
34.8K/F
PC114
10U_25V_1206
3.8UH_SIL104R-3R8_6A/13mohm
PR117 10K/F
PR112 20K/F
PR31 20
1_05_VCC
PU3
MAX1844EEP
14
VCC
9
UVP
15
TON
3
SHDN
10
1_05_REF
1_05_LIM
1_05_VCC
PGOOD
8
REF
7
ILIM
PR24 * 0 _ N C
5
6
3
7
8
1
PC29
2.2U_10V
VCCP-BST1
1.05V_LX
1.05V_DL
1.05V_OUT
1.05V_FB
PQ41B
AO4824
4
G1
PQ41A
AO4824
2
G1
PR27 0
1.05V_DH
12
PC115 2200P
21
PD27 RB751V
PR123
1.5-BST
12
PC111 .1U_50V
21
PD4 RB751V
VCCP-BST
12
PC27 .1U_50V
12
C722 *.047U_NC
PU10
MAX1844EEP
0
1.5V_BST_R
18
1.5V_DH
1.5V_LX
1.5V_DL
1.5V_OUT
1.5V_FB
PC35 .1U_50V
1 2
4
4
BST
20
DH
19
LX
1
CS
12
DL
11
GND
6
OUT
5
FB
7
6
8
PQ6
IRF7413Z
2
351
1.5UH_SIL104R-1R5_10A/8.1 mohm
87635
PQ8
FDS6676S
1
2
PC112
2.2U_10V
PWR_SRC
16
V+
2
PWR_SRC
PC36
12
2200P
PL3
1 2
PR122 20
13
VDD
SHDN
PGOOD
OVP4LATCH
SKIP
17
12
10U_25V_1206
+
14
VCC
9
UVP
15
TON
3
10 8
REF
7
ILIM
PR119 *0_NC
PR120 0
PC89
1_5_REF
1_5_LIM
12
1 2
1_5_VCC
1_5_VCC
+
PR124 *0_N C
PR121 *0_N C
PR116 0
PR147
PR114 100K/F
PR113 100K/F
PC88 10U_25V_1206
12
+
PC38 150U/2V
CC7343
PR29 1K/F
PR28 20K/F
PC113
2.2U_10V
*0_NC
1_5_REF
1_5_VCC
SUSPWROK_5V 43,45
1.8V_PWRGD 39,43
12
PC107
.22U_10V
12
12
PC41 .1U
+
PC40 150U/2V
CC7343
18mOhm18mOhm
+3VSUS
PR118 100K
1.5V_PWRGD
8.6A Current Limit
VCCP
PD7 RB551V-30
2 1
CT_0217: Remove JP2,JP3 short jumpers.
1.5V_PWRGD 39
QUANTA
Title
Size Document Number Rev
1
2
3
4
Date: Sheet
1.5V,1.05V
Tahiti(DM3L) 1A
星期二
29, 2005
三月
5
of
44 49,
Page 45
1
2
3
4
5
+3VSUS
65241
12
PR137
63.4K/F
12
PR138
49.9K/F
PWR_SRC
PC110
4.7U_10V_0805
1 2
PQ40 AO6408
3
PC122 .1U
AUX_EN
REF VCC
3VSUS_ON
+RTC_PW R3_3V
2
SUS_ON
1
12
PR135
63.4K/F
12
PR130
49.9K/F
1
PC77
+
220U/6.3V_ESR25
CC7343
PU11 7SH32
5
12
PR139
*0_NC
12
PR141
0
12
3VSUS_ON 46
3.8UH_SIL104R-3R8_6A/13mohm
12
PC82
PR71
.1U
*_NC
12
PR70 0
4
+3VALW
*4.7U_10V_0805
PC119 10U_25V_1206
+
Place these CAPs close to FETs
PL7
PC70
12
PC123 10U_25V_1206
+
12
PC72 .1U_50V
12
PC118 .1U_50V
D1 D1
12
PR148
1.5R
D1 D1
PC133
12
4700P
CT_1125: Add PR148, PC133 Per EMI
SUS_ON25,39,46
PR159 *0_0603_NC
3 1
PQ54
FDN304P
2
12
PR161
51K
CT_0321: Add PC139, PC140, PR160, PR161, PQ54 for soft start of +3VALW.
5
S1
7
S1
12
PR160
PC117 2200P
PQ19B
AO4824
6
PC68 .1U_50V
4
G1
3
8
2
G1
PQ19A
AO4824
1
1 2
MAX1999_LDO3
12
12
PC139 .22U_10V
1M
PR73
10_0805
PC71
4.7U_25V_0805
1999_V+
1 2
PR69 2K/F
1 2
PR66 240K
PC140
4.7U_10V_0805
PR72
10_0805
12
PR67 4.7/F
+
CT_0329: Depop PC70 4.7U. Change PC140 from .22U to 4.7U.
2
VCC
BST3
DH3
LX3 DL3
3V_OUT
FB3
1999_ON3
ON5
PR76 47_0603
PC79 1U_10V
PU7
20
V+
17
VCC
1
N.C.
28
BST3
26
DH3
27
LX3
24
DL3
22
OUT3
7
FB3
3
ON3
4
ON5
25
LDO3
VCC
USB_EN#25,32
21
PD15 RB751V
SKIP
12
PR78
1 2
100K
MAX1999
6
1999SKIP
2
+5VALWVCC
PC74
BST_5BST_3
PR79
BST5
4.7/F
DH5 LX5 DL5 5V_OUT
FB5 PRO#
ILIM5 ILIM3 REF TON
PR136 1K
12
PR77 *0_NC
4.7U_10V_0805
PC78
.1U_50V
1 2
REF
12
PC73 1U_10V
12
PGOOD
SHDN
LDO5 BST5
OUT5
PRO
ILIM5 ILIM3
TON GND
21
DH5 LX5 DL5
FB5
REF
31
2N7002
PD18 RB751V
18 14 16 15 19 21 9
10 11
5 8 13 23 2
1999SKIP
PQ53
CT_0314: Pop PR78 and PQ53. Leave PR77 N.C.
3
12
PC124 .1U_50V
5
6
D1D1
4
G1
S1
3
7
8
D1D1
2
G1
S1
1
+3V_SRC
12
PR127 100K
THERM_STP# 31
ALWON 25
Place these CAPs close to FETs
PC125 2200P
PQ21B
AO4824
PL6
3.8UH_SIL104R-3R8_6A/13mohm
PQ21A
AO4824
SUSPWROK_5V 43,44
PWR_SRC
12
12
PC120
.1U_50V
PR126 200K
PRO1
12
PR125 100K
4
CT_0217: Remove JP8,JP9 short jumpers
+5VSUS
PC61
+
12
PR75 *_NC
12
PR74 0
VCC
12
PR140 200K
31
PQ43
2
2N7002
DL5
PRO#
.1U
2 12
PC80 .1U_50V
3
PC64 220U/6.3V_ESR25
CC7343
PC76
.1U
PD16 BAT54S
15V_B
1
PC75
.1U
15V_A15V_C
3
PD17 BAT54S
2
1
PC81
.1U
+5VSUS15V
QUANTA
Title
Size Do c ument Number R e v
Date: Sheet
COMPUTER
3VALW,5V,3V, power on
Tahiti(DM3L) 1A
星期二 三
29, 2005
月
5
of
45 49,
A A
B B
C C
D D
+3V_SRC
CT_0217: Remove JP10,JP11 short jumpers
AUX_EN25,36
ILIM5 ILIM3 TON
Page 46
1
15V +5VRUN+5VALW
12
12
R387
R388
100K
100K
A A
31
PQ35
PQ36 2N7002
RUN_ON_5V#
RUN_ON25,27,39
B B
2
31
2
2N7002
12
C492 .022U_0603
2
ON_RUN1
+5VSUS
+1_5VSUS
+1_8VSUS
PQ42 FDC653N
6 5 2 1
6 5 2 1
PQ12 FDC653N
6 5 2 1
3
12
PQ39 AO6408
3
3
R389 240K
4
4
4
12
+1_5VRUN
12
+1_8VRUN
12
C575
4.7U_10V_0805
C514
4.7U_10V_0805
C105 1U_10V
3
SUS_ON25,39,45
4
PQ47
DTC144EUA
2
12
PR132 200K
PWR_SRC
1 3
2
PQ44 2N7002
+1_5VSUS +1_8VSUS
2
PWR_SRC
12
PR134 240K
31
PR128 47_0805
31
2N7002
12
.01U
PQ45
PC121
PR131 100K
ON_3VSUS
2
PR133 470K
PR129 47_0805
31
PQ46
2N7002
3VSUS_ON 45
5
Turn On +3VSUS from +3VSRC
RUN POWER Controlled by RUN_ON
+3VRUN
+3V_SRC
+5VALW
C C
RUN_ON_D25,43,44
RUN_OND1
2
15V
CT_0315: Change C493 from 470P to 4700 to fix Soft start of +3VRUN.
12
12
31
R393 100K
2
PQ38
2N7002
R391 100K
31
PQ37 2N7002
12
C493 4700P
ON_RUN2
RUN POWER Controlled by RUN_ON_D (Delay from RUN_ON)
6 5 2 1
PQ48 FDC653N
3
12
R392 *470K_NC
+3VRUN
4
12
C577
4.7U_10V_0805
1_05_REF
PR99 1 0K/F
1 2
12
PC102 .01U
12
PR100 10K/F
2.5V-REF1
2.5V-FB1
12
+2.5VRUN
PC104
47P
PR101 10K/F
15V
U26B
8
LM358
5 6
4
12
7
PR102 15K/F
2.5V-DRV
12
12
3
PC103 .1U
65241
PQ27 FDC653N
1 A (Max)
+2.5VRUN
12
PC105 10U_6.3V
+1_5VRUN+2.5VRUN+3VRUN+5VRUN SMDDR_VTERM
12
R379 *1K_NC
PQ30
31
D D
RUN_ON_5V#
*2N7002_NC
2
12
R380 *47_NC
PQ31
31
*2N7002_NC
2
12
R381 *1K_NC
PQ32
31
*2N7002_NC
2
12
R382 *1K_NC
PQ33
31
*2N7002_NC
2
12
R383 *1K_NC
PQ34
31
*2N7002_NC
2
QUANTA
Title
Reserve discharge path
1
2
3
4
Size Document Number Rev
Date: Sheet of
COMPUTER
RUN POWER SW
Tahiti(DM3L) 1A
星期二
29, 2005
三月
46 49,
5
Page 47
1
+3VALW
1
A A
Adress : 16H
PC45 .1U_50V
1 2
JABT2
BATT1+
BATT2+ SMB_CLK SMB_DAT
BATT_PRES#
SYSPRES#
BATT_VOLT
BATT1­BATT2-
SUYIN-20175A-09G1
3
1 2 3 4 5 6 7 8 9
RP4 4P2R-S-100
4 2
1 2
PR49 100
1 2
PR47 100
3 1
PD12
2
DA204U
+3VALW
1
2
1
2
3
PD9 DA204U
2
PD11 DA204U
PD10
2
1
DA204U
3
SBATT+ 40
SBAT_SMBCLK 26 SBAT_SMBDAT 26
3
+3VALW
12
PR48 10K
SBAT_PRES# 26,40
4
5
3
SBAT_ALARM# 26
B B
+3VALW
12
PR22
5.6K_0603
+3VALW
12
PR104 10K
12
PC19 .1U_50V
PBAT_PRES# 26
DOCK_PSID38
12
PC17
+
4.7U_25V_0805
DOCK_PSID
+5VALW
PD28 BAT54
+3VALW
12
+5VALW+5VALW
PR80
2.2K
1 2
R281 10K
PS_ID 26
PS_ID_DISABLE# 26
2
PD19
BAT54S
PQ22 2N7002
3 1
12
R164 100K/F
12
R165 15K/F
2
Q19
2
1 3
3904
R499
1 2
100
1
3
3
2
1
2
2
1
PD24
PC50 .1U_50V
1 2
JABT3
Adress : 16H
BATT_PRES#
SYSPRES#
BATT_VOLT
SUYIN-20175A-09G1
C C
JDCIN2
POWER_JACK
BATT1+
BATT2+ SMB_CLK SMB_DAT
BATT1­BATT2-
1 2
BLM11B102S
PL8
1 2 3 4 5 6 7 8 9
1 2 3
98765
4
D D
DCIN+
DCIN-
12
RV2
VZ0603M260APT
PR105 100
DOCK_PSID
2 1
12
RV3
VZ0603M260APT
RP30 4P2R-S-100
2 4 1 2
1 2
PR103 100
FL2
CM1922
1 3
3 4
DA204U
3
+3VALW
1
<Limit VOL>
3
1 2
.47U_0805
PC18
2
1
3
PD21 DA204U
12
2
PR21 240K
1 2
100K
1
PD23
DA204U
PBAT_ALARM# 26
1 2 3
Q49_G
PR23
3
PQ5 FDS4435
4
PD22 DA204U
PBATT+ 40
PBAT_SMBCLK 17,26,41 PBAT_SMBDAT 17,26,41
8 7 6 5
DC_IN++DC_IN
12
PC20
.01U_0603
QUANTA
Title
Size Document Number Rev
1
2
3
4
Date: Sheet
COMPUTER
DCIN,BATT CONNECTOR
Tahiti(DM3L) 1A
47 49,
星期二
29, 2005
三月
5
of
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