DELL 427 Schematics

5

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FOOSE 15" UMA Schematics Document

uFCPGA Mobile Penryn

Intel Cantiga-GM + ICH9M

C C

2008-06-04

REV : -1

B B

DY : Nopop Component 5761 : Use BCM5761E 5756 : Use BCM5756M B_TPM : Use LOM TPM C_TPM : Use China TPM

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Foose Intel

Size Document Number Rev

A3

5

4

3

2

A3

Date: Sheet

Date: Sheet of

Foose Intel

COVER PAGE

1

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158Wednesday, June 04, 2008

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Digitally signed by dd DN: cn=dd, o=dd, ou=dd, email=dddd@yahoo.com, c=US Date: 2009.12.04 19:30:07 +07'00'

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Foose Intel UMA Block Diagram

D D

Thermal & Fan EMC4002

LCD

DDRII 667/800

C C

DDRII 667/800

PCMCIA

1394

SD/SDIO/MMC

B B

Slot 0

Slot 1

27

HDD SATA

12.7mm ODD SATA

SPI FLASH 16Mb

Clock Generator

SLG8LP554VTR

19

DDRII 667/800 Channel A

16

DDR II 667/800 Channel B

17

Ricoh R5C847 1394

736

LVDS

USB2.0

26

25

PCI

SATA

25

SPI

22

China TPM ZTE,Jetway (Optional)

A A

WIFI On/Off

35

29

Int KB

5

KSI/KSO ECE1077

31

Penryn (35W)

Socket P

Intel

Cantiga-GML

AGTL+ CPU I/F DDR Memory I/F External Graphics

10,11,12,13,14,15

DMI

Intel

ICH9-M

USB 2.0/1.1 ports (12) PCI Express ports (6) High Definition Audio

ATA 66/ 100

SATA (3) LPC I/F

SPI

ACPI 1.1

PCI/PCI BRIDGE

BC PS2

ECTouchPad MEC 5035

4

8,9

FSB 800 / 1066MHzHOST BUS

21,22,23,24

LPC

BC

34

Intel Mobile CPU

Project code : 91.4X801.001 Part Number : 48.4X802.011 PCB Number : 07238 Revision : -1

S-VIDEO VGA

DISPLAY PORT

Int Mic

Level Shift

Azalia Codec

11

IDT 92HD71B7

HDA

SATA PCIE(6)

USB2.0 USB2.0

SIO Expander ECE 5028

32

MDC MODEM

35

3

VSW

18

DAI

MIC IN HP1

OP AMP

TPA6040 /MAX9789A

25

LOM

BCM5756M/ BCM5761E

Serial Port

RJ11

ESW

33

29

28

35

32

2CH SPEAKER

FLASH 2Mb/8Mb

RJ45/RJ11

28

29

2

S-Vedio CONN

CRT CONN

19

18

E Docking

37

Mini-Card

WWAN / WPAN / Robson

1/2 Mini-Card

WLAN / UWB

Left Side Top: Charger USB x 1

Left Side Bottom: USB Port x 1

Right Side: USB Port x 2

Finger printer (Optional)

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

30

31

20

Foose Intel

BLOCK DIAGRAM

ISL6260

INPUTS

+PWR_SRC

OUTPUTS

VCC_CORE

SYSTEM DC/DC

SN0608098

INPUTS

+PWR_SRC

OUTPUTS

+3.3V_ALW

+5V_ALW

SYSTEM DC/DC

TPS5117

INPUTS

+PWR_SRC

OUTPUTS

+1.05V_VCCP

SYSTEM DC/DC

L6935TR(LDO)

INPUTS

+1.8V_SUS

OUTPUTS

+1.5V_RUN

SYSTEM DC/DC

TPS5116

INPUTS

+PWR_SRC

OUTPUTS

+1.8V_SUS

SYSTEM DC/DC

TPS5116(LDO)

INPUTS

+1.8V_SUS

OUTPUTS

+V_DDR_MCH_REF +0.9V_DDR_VTT

SYSTEM DC/DC

EMC4002(LDO)

INPUTS

+3.3V_RUN

OUTPUTS

+2.5V_RUN

TI CHARGER

BQ24745

INPUTS

+DC_IN +VCHGR

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

OUTPUTS

+PWR_SRC

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45

46

47

36

42

CPU DC/DC

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3

2

1

Regulator

ADAPTER

SI3457BDV

D D

19

GFX_PWR_SRC

LDO

+VCC_CORE

+3V_ALW_2

+5V_ALW_2

Switch

45

TPS51117

45

46

TPS51116

47

BATTERY

CHARGER

+PWR_SRC

ISL6260C

SN0608098

43 43

BQ24745

C C

+5V_ALW

B B

SI3456BDV

40

SI4800BDY

40

46 46

SI4800BDY

40

SI4800BDY

40

+15V_ALW

SI3456BDV

40

45

+3.3V_ALW

+1.05V_VCCP

SI3456BDV

40

46

+0.9V_DDR_VTT

SI3456BDV

40

49

+1.8V_SUS

L6935TR

+1.5V_RUN

47

46

+5V_HDD

A A

40

5

+5V_MOD

40

+5V_RUN

40

+3.3V_RUN

EMC4002

+2.5V_RUN

4

40

MMBT35200MT1G

36

+2.5V_ROM

+3.3V_LAN

36

3

40

MMJT9435T1G

+1.2V_ROM

+3.3V_SUS

36

40

+3.3V_ALW_ICH

2

40

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Power Block Diagram

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Foose Intel

1

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+3.3V_ALW_ICH

4

+3.3V_RUN

3

2

1

+3.3V_LAN

2.2K 2.2K

+3.3V_ALW

2.2K 2.2K

10K

Device Adress: C4/72/70/48

133

129

DOCK

127

11

LVDS Connector

12

Device Adress: 58/20-22

LAN_SMBDATA

LAN_SMBCLK

2N7002

Device Adress: A0/A4

page 38

page 19

CLK_SDATA CLK_SCLK

DIMM1

DIMM2

page 16

page 17

BCM5761E/BCM5756M

+3.3V_RUN+3.3V_ALW

2.2K 2.2K

2.2K

2N7002

17

ICS9LPR390

16

+3.3V_WLAN

2.2K

WLAN_SMBCLK

WLAN_SMBDATA

2.2K

page 7

30

WLAN

32

+3.3V_RUN

MINI_SMBCLK MINI_SMBDAT

30 32

page 30

WWAN

page 30

2.2K 2.2K

G16

ICH_SMBCLK

A13

ICH_SMBDATA

D D

ICH9M

C17

AMT_SMBCLK

B18

AMT_SMBDAT

+3.3V_ALW_ICH

2.2K

2N7002

2N70022N7002

2.2K

+3.3V_ALW

94

LOM_WLAN_SMBCLK

93

LOM_WLAN_SMBDAT

3

DOCK_SMB_ALERT#

5

DOCK_SMB_DAT

6

DOCK_SMB_CLK

C C

7

LCD_SMBDAT

8

LCD_SMBCLK

98

SMBUS_WIRELESS_CLK

97

SMBUS_WIRELESS_DAT

2.2K

8.2K

MEC5035

2N7002

+3.3V_ALW

8.2K 8.2K

2.2K

MEM_SMBCLK MEM_SMBDATA

2N7002

+3.3V_ALW

2.2K

B B

12

CKG_SMBDAT

13

CKG_SMBCLK

2.2K 2.2K

10

BQ24745RHDR

9

page 44

+3.3V_ALW

2.2K 2.2K

A A

111

112

5

PBAT_SMBDAT PBAT_SMBCLK

BAV99

4

100

6

Battery Connector

7

3

page 41

28

SSM2602

27

2

page 32

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A2

SMBus Block Diagram

Date: Sheet

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Foose Intel

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PCIE Routing

INTEL ICH9-M STRAP PIN

Signal Usage/When Sampled

HDA_SDOUT XOR Chain Entrance/

D D

HDA_SYNC

GNT2# / GPIO53

GPIO20

GNT1#/ GPIO51

GNT3# / GPIO55

C C

GNT0# SPI_CS1#

SATALED#

SPKR

B B

TP3

GPIO33 / HDA_DOCK_EN#

GPIO49

SPI_MOSI

A A

PCIE Port Config 1 bit1, Rising Edge of PWROK

PCIE Port Config 1 bit0, Rising Edge of PWROK.

PCIE Port Config 2 bit0, Rising Edge of PWROK.

Reserved

ESI Strap, Rising Edge of PWROK.

Top-Block Swap Override. Rising Edge of PWROK.

Boot BIOS Destination Selection. Rising Edge of PWROK.

PCIE LAN REVERSAL.Rising Edge of PWROK.

No Reboot. Rising Edge of PWROK.

XOR Chain Entrance. Rising Edge of PWROK.

Flash Descriptor Security Override Strap Rising Edge of PWROK.

DMI Termination Voltage Rising Edge of PWROK.

Integrated TPM Enable Rising Edge of PWROK.

Allows entrance to XOR Chain testing when TP3 pulled low at rising edge of PWROK. When TP3 not pulled low at rising edge of PWROK, sets bit 1 of RPC.PC (Chipset Config Registers: Offset224h).This signal has a weak internal pull-down.

This signal has a weak internal pull-down. Sets bit 0 of RPC.PC (Chipset Config Registers: Offset 224h)

This signal has a weak internal pull-up. Sets bit 2 of RPC.PC2 (Chipset Config Registers:Offset 0224h) when sampled low.

This signal has a weak internal pull-down. NOTE: This signal should not be pulled high

Tying this strap low configures DMI for ESI compatible operation. This signal has a weak internal pull-up. NOTE: ESI compatible mode is for server platforms only. This signal should not be pulled low for desktop and mobile.

The signal has a weak internal pull-up. If the signal is sampled low, this indicates that the system is strapped to the “top-block swap” mode (IntelR ICH9 inverts A16 for all cycles targeting BIOS space). The status of this strap is readable via the Top Swap bit (Chipset Config Registers:Offset 3414h:bit 0). Note that software will not be able to clear the Top-Swap bit until the system is rebooted without GNT3# being pulled down

This field determines the destination of accesses to the BIOS memory range. Signals have weak internal pull-ups. Also controllable via Boot BIOS Destination bit (Chipset Config Registers: Offset 3410h:bit 11).This strap is used in conjunction with Boot BIOS Destination Selection 0 strap.

Signal has weak internal pull-up.Sets bit 27 of MPC.LR (Device 28: Function 0: Offset D8)

The signal has a weak internal pull-down. If the signal is sampled high, this indicates that the system is strapped to the “No Reboot” mode (ICH9 will disable the TCO Timer system reboot feature). The status of this strap is readable via the NO REBOOT bit (Chipset Config Registers:Offset 3410h:bit 5).

See IntelR ICH9 Family XOR Chains In-Circuit Tester Package for functionality information. This signal has a weak internal pull-up. NOTE: This signal should not be pulled low unless using XOR Chain testing.

This signal has a weak internal pull-up resistor. If sampled low, the Flash Descriptor Security will be overridden. If high, the security measures defined in the Flash Descriptor will be in effect.NOTE: This strap should only be enabled in manufacturing environments.

The signal is required to be low for desktop applications and required to be high for mobile applications.

This signal has a weak internal pull-down resistor. When the signal is sampled low the Integrated TPM will be disabled. When the signal is sampled high, the MCH TPM enable strap is sampled low and the TPM Disable bit is clear, the Integrated TPM will be enabled.NOTE: This signal is required to be floating or pulled low for desktop applications.

Comment

XOR Chain Entrance Strap

A16 swap override strap

BOOT BIOS Strap

PCI_GNT#0 BOOT BIOS Location

AZ_DOUT_ICHICH_RSVD Description

tp3

0 0 10 1

0 1

1

low = A16 swap override enable PCI_GNT#3 high = default

SPI_CS#1

Normal Operation(default)

Set PCIE port cofig bit1

RSVD Enter XOR Chain

SPI10

10

1

Enable VccSus1_05,VccSus1_5,VccCL1_5

SM_INTVRMEN

integrated VccLan1_05VccCL1_05

LAN100_SLP

PCI

LPC(Default)

1

High=Enable Low=Disable

No Reboot Strap

LOW = DefauleSPKR High=No Reboot

LANE1 LANE2 LANE3 LANE4 LANE5 LANE6

SATA Routing

SATA0 SATA1 SATA4 SATA5

PCI ROUTING

1394/ MediaCard

ICH9-M INTEGRATED PULL-UPS and PULL-DOWNS

5

4

3

MiniCard WWAN MiniCard WLAN No use No use GIGA LAN No use

HDD ODD No use Dock eSATA

INT REQ GNTIDSEL

AD17

B C

11

D

USB TABLE

USB

Pair

Device

Charge USB

0 1

USB1(LEFT SIDE BOTTOM)

2

USB2(RIGHT SIDE TOP)

3

USB3(RIGHT SIDE BOTTOM) WLAN

4

WWAN/

5

Reserve

6

Card Bus/Express Card

7

DOCK1

8

DOCK2

9

Biometric

10

BCM5761E

11

SIGNAL Resistor Type/Value

CL_CLK[1:0] CL_DATA[1:0] CL_RST0# DPRSLPVR/GPIO16 HDA_BIT_CLK HDA_DOCK_EN#/GPIO33 HDA_RST# HDA_SDIN[3:0] HDA_SDOUT PULL-DOWN 20K HDA_SYNC GNT[3:0] GPIO[20] GPIO[49] LAD[3:0]#/FHW[3:0]# LAN_RXD[2:0] LDRQ[0] LDRQ[1]/GPIO23 PME# PWRBTN# SATALED# SPI_CS1# SPI_MOSI SPI_MISO SPKR TACH_[3:0] TP[3] USB[11:0][P,N]

Title

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet of

PULL-UP 20K PULL-UP 20K PULL-UP 10K PULL-DOWN 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-DOWN 20K

PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 20K PULL-UP 15K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-DOWN 20K PULL-UP 20K PULL-UP 20K PULL-DOWN 15K

Foose Intel

Table of Content

(LEFT SIDE TOP)

WPAN

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

SC

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D D

CPU

ITP Connector

TCK(PIN 5)

TCK(PIN AC5)

FBO(PIN 11)

+3.3V_ALW_ICH

ITP_TCK

DY

12

R57

R57 51R2F-2-GP

51R2F-2-GP

DY

R230

150R2F-1-GP

12

R53

R53 27R2F-GP

27R2F-GP

12

C C

R54

ITP_TDI ITP_TMS

ITP_TRST#

CLK_CPU_ITP# CLK_CPU_ITP

ITP_BPM#5 ITP_BPM#4 ITP_BPM#3 ITP_BPM#2 ITP_BPM#1 ITP_BPM#0 ITP_DBRESET#

12

ITP_TDI8 ITP_TMS8

ITP_TRST#8

ITP_TCK8

ITP_TDO8 CLK_CPU_ITP#7 CLK_CPU_ITP7

H_RESET#8,10

ITP_BPM#58 ITP_BPM#48 ITP_BPM#38 ITP_BPM#28 ITP_BPM#18

B B

ITP_BPM#08

ITP_DBRESET#8,23,35

649R2F-GP

SC-20080327 SC-20080327

+1.05V_VCCP

12

R56

R56 51R2F-2-GP

51R2F-2-GP

R55 124R2F-U-GP

DY

12

SC-20080327

+1.05V_VCCP

SC-20080327

12

R61

R52

R52 56R2F-1-GP

56R2F-1-GP

1 2

DY

R51 22D6R2F-L1-GP

R61 39R2F-GP

39R2F-GP

ITP_RESET#

ITP_TDO_1ITP_TDO

SC-20080327

12

R50

R50 150R2F-1-GP

150R2F-1-GP

ITP1

1 2

3 4 5 6 7 8

9 10 11 12 13 14 15

DY

16 17 18 19 20 21 22 23 24 25 26 27 28

MLX-CON28-3-GP

20.K0116.028

29

H_RESET# use pull-up Resistor close ITP connector 500 mil ( max )

30

+1.05V_VCCP use Decoupling Capacitor close ITP connector 100 mil ( max )

ITP Debug Connector

A A

5

4

3

2

5756

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Foose Intel

Size Document Number Rev

A3

Date: Sheet

Foose Intel

ITP Debug Connector

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SSID = CLOCK

CKG_SMBDAT34,42

D D

CKG_SMBCLK34,42

X1

X1 X-14D31818M-43GP

X-14D31818M-43GP

1 2

12

C187

C187 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

CLK_XTAL_OUT_1CLK_XTAL_IN

+3.3V_RUN

Q28

5 6

2N7002DW-7F-GP

-1-20080514

12

C176

SC18P50V2JN-1-GP

0R0402-PAD

SC-20080320

CLK_3GPLLREQ#11

C C

R178 475R2F-L1-GPR178 475R2F-L1-GP

12

CLK_CPU_BCLK#8 CLK_CPU_BCLK8

CLK_MCH_BCLK#10 CLK_MCH_BCLK10

LOM_CLKREQ#28

+3.3V_RUN +3.3V_RUN

34 2

CLK_SCLK

1

CLK_SDATA

CLK_XTAL_OUT

R166

12

+3.3V_RUN

SATA_CLKREQ#23

MINI2CLK_REQ#30 MINI1CLK_REQ#30

RN6 SRN33J-5-GP-URN6 SRN33J-5-GP-U

RN7 SRN33J-5-GP-URN7 SRN33J-5-GP-U

H_STP_CPU#23

BLM21PG600SN-1GP

SCD1U10V2KX-4GP

60ohm 100MHz 3000mA 0.05ohm DC

CLK_SCLK 32

+3.3V_RUN

1 2 3

CLK_SDATA 32

RN5

2 3 1

SRN2K2J-1-GP

4

CLKREQ# PULL HIGH

+3.3V_RUN

B B

12

DY

C684

SC12P50V2JN-3GP

+3.3V_RUN

DY

12

A A

1 2 3 4 5

12

C695

SC8P250V2CC-GP

R199

R199 10KR2J-3-GP

10KR2J-3-GP

PCI_SIO

R200

R200 10KR2J-3-GP

10KR2J-3-GP

RN20

SRN10KJ-6-GP

12

DY

C693

SATA_CLKREQ#

8

CLK_3GPLLREQ#

7

MINI1CLK_REQ#

6

MINI2CLK_REQ#

12

DY

SC27P50V2JN-2-GP

DY

C679

SC8P250V2CC-GP

PIN34 FCTSEL1

PIN43 PIN44 PIN47 PIN48

12

DY

C212

SC8P250V2CC-GP

DOT96T

DOT96C LCD100/96T LCD100/96C

12

DY

C670

SC12P50V2JN-3GP

12

DY

C206

SC12P50V2JN-3GP

12

DY

C249

SC12P50V2JN-3GP

1 DISC.0 UMA

27M_NonSpread 27M_Spread SRCT_0 SRCC_0

5

L11

12

CLK_XTAL_IN CLK_XTAL_OUT

4

SATA_CLKREQ# MCH_3GPLL_REQ#

LOM_CLKREQ#

MINI2CLK_REQ# MINI1CLK_REQ#

CLK_CPU_BCLK1# CLK_CPU_BCLK1

CLK_MCH_BCLK1# CLK_MCH_BCLK1

H_STP_CPU#

DY

C239

SC12P50V2JN-3GP

4

C689

1 2

PGMODE

12

DY

R14710KR2J-3-GPDYR14710KR2J-3-GP

12

DY

R54810KR2J-3-GPDYR54810KR2J-3-GP

CLK_SDATA CLK_SCLK

CLK_PCI_DOCK CLK_ICH_48M CLK_PCI_ICH CLK_PCI_PCCARD CLK_PCI_5035 CLK_ICH_14M CLK_SIO_14M CLK_PCI_5028 CLK_PCI_TPM CLK_PCI_TPM_CHA

12

C683

SC12P50V2JN-3GP

4

3

R149

+CK_VDD_MAIN +CK_VDD_A

C665

SCD1U10V2KX-4GP

C665

SCD1U10V2KX-4GP

12

+3.3V_RUN

12

DY

C672

SCD1U10V2KX-4GP

C672

SCD1U10V2KX-4GP

U27

20

X1

19

X2

17

SMBDAT

16

SMBCLK

46

CLKREQ1#

26

CLKREQ2#

28

CLKREQ3#

57

CLKREQ4#

29

CLKREQ5#

62

CLKREQ6#

38

CLKREQ7#

71

CLKREQ8#

72

CLKREQ9#

13

CPUC0

14

CPUT0

10

CPUC1_MCH

11

CPUT1_MCH

24

CPU_STOP#

R569

R569 10KR2J-3-GP

10KR2J-3-GP

R574

R574 10KR2J-3-GP

10KR2J-3-GP

12

PCI2_TME

SCD1U10V2KX-4GP

C668

SCD1U10V2KX-4GP

C668

SCD1U10V2KX-4GP

C185

SC10U6D3V5ZY-2GP

C185

GND

9

PG_MODE

GNDA

8

GND48

42

SC10U6D3V5ZY-2GP

12

MCH_SSCDREFCLK1#

MCH_SSCDREFCLK1

47

48

LCD100/SRCT0

LCD100/SRCC0

GNDCPU

GNDREF

15

21

+3.3V_RUN

DY

1

2

CLK_MCH_DREFCLK1

CLK_MCH_DREFCLK1#

43

DOTT_96/27MHZ_NS

GNDPCI

31

35

12

R589

R589 10KR2J-3-GP

10KR2J-3-GP

12

R590

R590 10KR2J-3-GP

10KR2J-3-GP

C690

12

73

PCI2/TME Output

0

1

R149

2D2R3J-2-GP

44

1

49

54

65

VDDSRC

DOTC_96/27MHZ_SS

GNDSRC

REF122REF0/FSLC/TEST_SEL

GNDSRC

4

23

45

68

R588 2K2R2J-2-GPR588 2K2R2J-2-GP

FSC CPU_MCH_BSEL2

R562 10KR2J-3-GPR562 10KR2J-3-GP

FSA

Overclocking of CPU and SRC allowed

Overclocking of CPU and SRC not allowed

3

12

18

30

36

12

40

VDD48

VDDPCI

VDDREF

VDDCPU

CPUC2_ITP/SRCC10

PCI_SRC_STOP#

PCI_F0/ITP_EN

CK_PWRGD/PD#

USB_48MHZ/FSLA

FSLB/TEST_MODE

ICS9LPR390CKLFT-GP

25

37

39

41

FSA

FSC

CLKREF

R172 33R2J-2-GPR172 33R2J-2-GP

C686

SCD1U10V2KX-4GP

C686

SCD1U10V2KX-4GP

C675

SCD1U10V2KX-4GP

C675

SCD1U10V2KX-4GP

12

+CK_VDD_REF

+CK_VDD_48

7

VDDA

SRCT1/SATAT SRCC1/SATAC

CPUT2_ITP/SRCT10

PCI2/TME

PCI4/FCTSEL1

Main: Silego 71.08554.003 Second: SpectraLinear 71.28647.003

PCI_ICH H_STP_PCI#

R587 33R2J-2-GPR587 33R2J-2-GP

R174 33R2J-2-GPR174 33R2J-2-GP

12 12

R1601R3F-GP R1601R3F-GP

R1942R3J-2-GP R1942R3J-2-GP

50 51 52

SRCT2

53

SRCC2

55

SRCT3

56

SRCC3

58

SRCT4

59

SRCC4

60

SRCT5

61

SRCC5

63

SRCT6

64

SRCC6

66

SRCT7

67

SRCC7

70

SRCT8

69

SRCC8

3

SRCT9

2

SRCC9

6 5

27

PCI1

32 33

PCI3

34

R586

R586 33R2J-2-GP

33R2J-2-GP

1 2

CLK_PWRGD

12

CPU_MCH_BSEL1

12

CPU_MCH_BSEL0FSA CPU_MCH_BSEL1

+CK_VDD_MAIN2

SC10U6D3V5ZY-2GP

SC4D7U6D3V3KX-GP

12

CLK_PCIE_SATA1CLK_PCIE_SATA1 CLK_PCIE_SATA1#CLK_PCIE_SATA1#

CLK_MCH_3GPLL1 CLK_MCH_3GPLL1# CLK_PCIE_LAN1 CLK_PCIE_LAN1#

CLK_PCIE_ICH1 CLK_PCIE_ICH1# CLK_PCIE_MINI2_1 CLK_PCIE_MINI2_1# CLK_PCIE_MINI1_1 CLK_PCIE_MINI1_1# CPU_ITP CPU_ITP#

PCI_EC PCI2_TME PCI_TPM PCI_SIO

H_STP_PCI# 23

CPU_MCH_BSEL0 8,11 CPU_MCH_BSEL1 8,11 CPU_MCH_BSEL2 8,11

C167

CLK_MCH_DREFCLK1 CLK_MCH_DREFCLK1#

MCH_SSCDREFCLK1 MCH_SSCDREFCLK1#

CLK_PCI_ICH 22

CLK_PWRGD 23

CLK_ICH_48M 23

CLK_SIO_14M 29,35

CLK_ICH_14M 23

2

C228

12

L17

BLM21PG600SN-1GP

2

60ohm 100MHz

1

3000mA 0.05ohm DC

+CK_VDD_A

12

SCD047U10V2KX-2GP

RN22 SRN33J-5-GP-URN22 SRN33J-5-GP-U

RN23 SRN33J-5-GP-URN23 SRN33J-5-GP-U

RN24 SRN33J-5-GP-URN24 SRN33J-5-GP-U

RN19 SRN33J-5-GP-URN19 SRN33J-5-GP-U

RN18 SRN33J-5-GP-URN18 SRN33J-5-GP-U

RN16 SRN33J-5-GP-URN16 SRN33J-5-GP-U

RN13 SRN33J-5-GP-URN13 SRN33J-5-GP-U

RN10 SRN33J-5-GP-URN10 SRN33J-5-GP-U

RN8 SRN33J-5-GP-U

RN8 SRN33J-5-GP-U R175 33R2J-2-GPR175 33R2J-2-GP R575 33R2J-2-GPR575 33R2J-2-GP R571 22R2J-2-GPR571 22R2J-2-GP

R192 22R2J-2-GP

R192 22R2J-2-GP R188 22R2J-2-GP

R188 22R2J-2-GP R198 33R2J-2-GPR198 33R2J-2-GP

1

12

C664

2 3 1

1 2 3

DY

B_TPM

B_TPM C_TPM

C_TPM

SC4D7U6D3V3KX-GP

4

4 4

4

-1-20080514

12 12 12

12 12

12

+CK_VDD_REF

+CK_VDD_48

12

C251

CLK_MCH_DREFCLK 11

CLK_MCH_DREFCLK# 11

MCH_SSCDREFCLK 11 MCH_SSCDREFCLK# 11

CLK_PCIE_SATA 21 CLK_PCIE_SATA# 21

CLK_MCH_3GPLL 11 CLK_MCH_3GPLL# 11

CLK_PCIE_LOM 28

CLK_PCIE_LOM# 28

CLK_PCIE_ICH 22

CLK_PCIE_ICH# 22

CLK_PCIE_MINI2 30 CLK_PCIE_MINI2# 30

CLK_PCIE_MINI1 30 CLK_PCIE_MINI1# 30

CLK_CPU_ITP 6 CLK_CPU_ITP# 6

CLK_PCI_5035 34

CLK_PCI_DOCK 37

CLK_PCI_PCCARD 26

CLK_PCI_TPM 28 CLK_PCI_TPM_CHA 29

CLK_PCI_5028 35

12

C669

C669 SCD047U10V2KX-2GP

SCD047U10V2KX-2GP

12

C688

C688 SCD047U10V2KX-2GP

SCD047U10V2KX-2GP

SC-20080326

+3.3V_RUN

ITP_EN

SEL2 FSC

0

0100

Title

Size Document Number Rev

A3

Date: Sheet

Enable ITP

R193 10KR2J-3-GPR193 10KR2J-3-GP

12

PCI_ICH

PIN37 0 1

PIN5/6 as SRC_10 PIN5/6 as CPU_ITP

SEL1

SEL0

FSB

FSA

00 01

CPU

266M 133M

FSB

1066M

800M200M

11

Foose Intel

Clock Generator ICS9LPRS390

166M

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

758Friday, May 30, 2008

of

1

of

X0

X

SC

5

www.kythuatvitinh.com

4

3

2

1

SSID = CPU

1 OF 4

U54A

H_A#3

J4

1

A3#

L5

A4#

L4

A5#

K5

A6#

M3

A7#

N2

A8#

J1

A9#

N3

A10#

P5

A11#

P2

A12#

L2

A13#

P4

A14#

P1

A15#

R1

A16#

M1

ADSTB0#

K3

REQ0#

H2

REQ1#

K2

REQ2#

J3

REQ3#

L1

REQ4#

Y2

A17#

U5

A18#

R3

A19#

W6

A20#

U4

A21#

Y5

A22#

U1

A23#

R4

A24#

T5

A25#

T3

A26#

W2

A27#

W5

A28#

Y4

A29#

U2

A30#

V4

A31#

W3

A32#

AA4

A33#

AB2

A34#

AA3

A35#

V1

ADSTB1#

A6

A20M#

A5

FERR#

C4

IGNNE#

D5

STPCLK#

C6

LINT0

B4

LINT1

A3

SMI#

M4

RSVD#M4

N5

RSVD#N5

T2

RSVD#T2

V3

RSVD#V3

B2

RSVD#B2

C3

RSVD#C3

D2

RSVD#D2

D22

RSVD#D22

D3

RSVD#D3

F6

RSVD#F6

B1

KEY_NC

BGA479-SKT6-GPU6

62.10079.001

ADDR GROUP 0

ADDR GROUP 1

ICH

TEST7

RESERVED

H_A#4 H_A#5

H_ADSTB#0

H_ADSTB#1 H_A20M#

H_FERR# H_IGNNE#

H_STPCLK#

TP7TP7

H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_INTR H_NMI H_SMI#

D D

H_ADSTB#010

H_REQ#[0..4]10

C C

H_ADSTB#110

H_A20M#21

H_FERR#21

H_IGNNE#21

H_STPCLK#21 H_INTR21 H_NMI21 H_SMI#21

B B

DEFER#

DRDY# DBSY#

IERR#

LOCK#

RESET#

TRDY#

HITM#

BPM0# BPM1# BPM2# BPM3# PRDY# PREQ#

TRST#

XDP/ITP SIGNALS CONTROL

XDP/ITP SIGNALS CONTROL THERMAL

THERMAL

PROCHOT#

THRMDA THRMDC

THERMTRIP#

HCLK

BCLK0 BCLK1

H_A#[ 3..35] 10

H1

ADS#

E2

BNR#

G5

BPRI#

H5 F21 E1

F1

BR0#

D20 B3

INIT#

H4 C1

F3

RS0#

F4

RS1#

G3

RS2#

G2 G6

HIT#

E4 AD4

AD3 AD1 AC4 AC2 AC1 AC5

TCK

AA6

TDI

AB3

TDO

AB5

TMS

AB6 C20

DBR#

D21 A24 B25

C7

A22 A21

1

H_ADS# H_BNR# H_BPRI#

H_DEFER# H_DRDY# H_DBSY#

H_BR0# H_IERR#

H_INIT# H_LOCK#

H_RESET#

H_RS#0 H_RS#1 H_RS#2 H_TRDY#

H_HIT# H_HITM#

ITP_BPM#0 ITP_BPM#1 ITP_BPM#2 ITP_BPM#3 ITP_BPM#4 ITP_BPM#5 ITP_TCK ITP_TDI ITP_TDO ITP_TMS ITP_TRST#

ITP_DBRESET#

EC_CPU_PROCHOT# H_THERMDA H_THERMDC

H_THERMTRIP#

R65 56R2J-4-GPR65 56R2J-4-GP

CLK_CPU_BCLK CLK_CPU_BCLK#

H_BPRI# 10 H_DEFER# 10

H_INIT# 21

H_RESET# 6,10

H_TRDY# 10

ITP_TCK 6 ITP_TDI 6

ITP_TDO 6

ITP_TMS 6 ITP_TRST# 6

ITP_DBRESET# 6,23,35

H_THERMTRIP# 36

12

CLK_CPU_BCLK 7 CLK_CPU_BCLK# 7

TP10TP10

H_ADS# 10 H_BNR# 10

H_DRDY# 10 H_DBSY# 10

H_BR0# 10

H_LOCK# 10 H_RS#[0..2] 10

H_HIT# 10 H_HITM# 10

ITP_BPM#0 6 ITP_BPM#1 6 ITP_BPM#2 6 ITP_BPM#3 6 ITP_BPM#4 6 ITP_BPM#5 6

+1.05V_VCCP

12

R503

56R2J-4-GP

+1.05V_VCCP

12

H_THERMDA, H_THERMDC routing on the same layer, Trace width / Spacing = 10 / 10 mil

R505

1KR2F-3-GP

1 2

R506

2KR2F-3-GP

1 2

R502

0R2J-2-GP

R85

56R2J-4-GP

DY

1 2

SC-20080304

H_THERMDA 36

C79

SC2200P50V2KX-2GP

1 2

H_THERMDC 36

V_CPU_GTLREF

R509

DY

0R2J-2-GP

1 2

TP8TP8 TP69TP69 TP6TP6 TP70TP70

1 1 1 1

CPU_MCH_BSEL07,11 CPU_MCH_BSEL17,11 CPU_MCH_BSEL27,11

H_D#[0..63] 10

2 OF 4

U54B

H_D#0

E22

H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15

H_DSTBN#010 H_DSTBP#010 H_DINV#010

H_DSTBN#110 H_DSTBP#110 H_DINV#110

H_DSTBN#0 H_DSTBP#0 H_DINV#0

H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30

H_D#31 H_DSTBN#1 H_DSTBP#1 H_DINV#1

TEST1

TEST2

TEST3

TEST4

TEST5

TEST6

CPU_MCH_BSEL0 CPU_MCH_BSEL1 CPU_MCH_BSEL2

D0#

F24

D1#

E26

D2#

G22

D3#

F23

D4#

G25

D5#

E25

D6#

E23

D7#

K24

D8#

G24

D9#

J24

D10#

J23

D11#

H22

D12#

F26

D13#

K22

D14#

H23

D15#

J26

DSTBN0#

H26

DSTBP0#

H25

DINV0#

N22

D16#

K25

D17#

P26

D18#

R23

D19#

L23

D20#

M24

D21#

L22

D22#

M23

D23#

P25

D24#

P23

D25#

P22

D26#

T24

D27#

R24

D28#

L25

D29#

T25

D30#

N25

D31#

L26

DSTBN1#

M26

DSTBP1#

N24

DINV1#

AD26

GTLREF

C23

TEST1

D25

TEST2

C24

TEST3

AF26

TEST4

AF1

TEST5

A26

TEST6

B22

BSEL0

B23

BSEL1

C21

BSEL2

BGA479-SKT6-GPU6

MISC

DATA GRP0 DATA GRP1

DATA GRP2DATA GRP3

DSTBN2#

DSTBP2#

DINV2#

DSTBN3#

DSTBP3#

DINV3# COMP0

COMP1 COMP2 COMP3

DPRSTP#

DPSLP#

DPWR#

PWRGOOD

D32# D33# D34# D35# D36# D37# D38# D39# D40# D41# D42# D43# D44# D45# D46# D47#

D48# D49# D50# D51# D52# D53# D54# D55# D56# D57# D58# D59# D60# D61# D62# D63#

SLP#

PSI#

Y22 AB24 V24 V26 V23 T22 U25 U23 Y25 W22 Y23 W24 W25 AA23 AA24 AB25 Y26 AA26 U22

AE24 AD24 AA21 AB22 AB21 AC26 AD20 AE22 AF23 AC25 AE21 AD21 AC22 AD23 AF22 AC23 AE25 AF24 AC20

R26 U26 AA1 Y1

E5 B5 D24 D6 D7 AE6

H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46

H_D#47 H_DSTBN#2H_DSTBN#2 H_DSTBP#2H_DSTBP#2 H_DINV#2

H_D#48

H_D#49

H_D#50

H_D#51

H_D#52

H_D#53

H_D#54

H_D#55

H_D#56

H_D#57

H_D#58

H_D#59

H_D#60

H_D#61

H_D#62

H_D#63 H_DSTBN#3 H_DSTBP#3 H_DINV#3

COMP0

COMP1

COMP2

COMP3 H_DPRSTP#

H_DPSLP# H_DPWR#H_DPWR# H_PWRGOODH_PWRGOOD H_CPUSLP# H_PSI#

H_DSTBN#2 10 H_DSTBP#2 10 H_DINV#2 10

H_DSTBN#3 10 H_DSTBP#3 10 H_DINV#3 10

R508 27D4R2F-L1-GPR508 27D4R2F-L1-GP R507 54D9R2F-L1-GPR507 54D9R2F-L1-GP R60 27D4R2F-L1-GPR60 27D4R2F-L1-GP R59 54D9R2F-L1-GPR59 54D9R2F-L1-GP

H_DPRSTP# 11,21,43 H_DPSLP# 21

H_CPUSLP# 10

H_PSI# 43

H_DPWR# 10

12 12 12 12

+1.05V_VCCP

DY

H_PWRGOOD 21

R64

200R2F-L-GP

1 2

+1.05V_VCCP

H_DPSLP#

12

DY

R63 56R2J-4-GP

R63 56R2J-4-GP R66 56R2J-4-GP

R66 56R2J-4-GP

A A

R62 56R2J-4-GPR62 56R2J-4-GP

5

4

3

DY

H_DPRSTP#

12

H_FERR#

12

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Foose Intel

Size Document Number Rev

A3

Date: Sheet

2

Date: Sheet of

Foose Intel

CPU-FSB(1/2)

1

SC

858Friday, May 30, 2008

SC

of

5

www.kythuatvitinh.com

4

3

2

1

SSID = CPU

A11 A14 A16 A19 A23 AF2

B11 B13 B16 B19 B21 B24

C11 C14 C16 C19

C22 C25

D11 D13 D16 D19 D23 D26

E11 E14 E16 E19 E21 E24

F11 F13 F16 F19

F22 F25

G23 G26

H21 H24

K23 K26

M22 M25

N23 N26

J22 J25

L21 L24

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP VCCP

VCCA VCCA

VID0 VID1 VID2 VID3 VID4 VID5 VID6

+VCC_CORE

AB20 AB7 AC7 AC9 AC12 AC13 AC15 AC17 AC18 AD7 AD9 AD10 AD12 AD14 AD15 AD17 AD18 AE9 AE10 AE12 AE13 AE15 AE17 AE18 AE20 AF9 AF10 AF12 AF14 AF15 AF17 AF18 AF20

G21 V6 J6 K6 M6 J21 K21 M21 N21 N6 R21 R6 T21 T6 V21 W21

B26 C26

AD6 AF5 AE5 AF4 AE3 AF3 AE2

AF7

AE7

H_VID0 H_VID1 H_VID2 H_VID3 H_VID4 H_VID5 H_VID6

12

C67

C530

SC10U6D3V5KX-1GP

12

SCD1U10V2KX-4GP

H_VID[0..6]

12

C481

VCCSENSE 43

VSSSENSE 43

C479

SCD1U10V2KX-4GP

12

C474

SC10U6D3V5KX-1GP

12

C538

C478

SCD1U10V2KX-4GP

H_VID[0..6] 43

R427 100R2F-L1-GP-UR427 100R2F-L1-GP-U

R422 100R2F-L1-GP-UR422 100R2F-L1-GP-U

C488

12

SCD01U16V2KX-3GP

1 2

12

C594

12

C53

C475

C502

SC10U6D3V5KX-1GP

12

C537

SCD1U10V2KX-4GP

+1.5V_RUN

+VCC_CORE

12

C475

SC10U6D3V5KX-1GP

+1.05V_VCCP

12

C540

DY

ST220U2VBM-3GP

C597

SC10U6D3V5MX-3GP

1 2

TC16

C495

SC10U6D3V5KX-1GP

D D

12

C73

C68

SC10U6D3V5KX-1GP

12

C70

C C

B B

C70

SC10U6D3V5KX-1GP

12

C517

SC10U6D3V5KX-1GP

C476

SC10U6D3V5KX-1GP

12

C526

C484

SC10U6D3V5KX-1GP

12

C521

C529

SC10U6D3V5KX-1GP

12

C54

C71

SC10U6D3V5KX-1GP

12

C535

C546

SC10U6D3V5KX-1GP

12

C500

C509

SC10U6D3V5KX-1GP

12

C63

C511

SC10U6D3V5KX-1GP

12

C60

C544

SC10U6D3V5KX-1GP

12

C545

C492

SC10U6D3V5KX-1GP

+VCC_CORE

12

C56

SC10U6D3V5KX-1GP

12

C522

SC10U6D3V5KX-1GP

12

C542

SC10U6D3V5KX-1GP

AA10 AA12 AA13 AA15 AA17 AA18 AA20

AC10 AB10 AB12 AB14 AB15 AB17 AB18

U54C

A7

VCC

A9

VCC

A10

VCC

A12

VCC

A13

VCC

A15

VCC

A17

VCC

A18

VCC

A20

VCC

B7

VCC

B9

VCC

B10

VCC

B12

VCC

B14

VCC

B15

VCC

B17

VCC

B18

VCC

B20

VCC

C9

VCC

C10

VCC

C12

VCC

C13

VCC

C15

VCC

C17

VCC

C18

VCC

D9

VCC

D10

VCC

D12

VCC

D14

VCC

D15

VCC

D17

VCC

D18

VCC

E7

VCC

E9

VCC

E10

VCC

E12

VCC

E13

VCC

E15

VCC

E17

VCC

E18

VCC

E20

VCC

F7

VCC

F9

VCC

F10

VCC

F12

VCC

F14

VCC

F15

VCC

F17

VCC

F18

VCC

F20

VCC

AA7

VCC

AA9

VCC VCC VCC VCC VCC VCC VCC VCC

AB9

VCC VCC VCC VCC VCC VCC VCC VCC

BGA479-SKT6-GPU6

3 OF 4

VCCSENSE

VSSSENSE

4 OF 4

U54D

A4

VSS

A8

VSS VSS VSS VSS VSS VSS VSS

B6

VSS

B8

VSS VSS VSS VSS VSS VSS VSS

C5

VSS

C8

VSS VSS VSS VSS VSS

C2

VSS VSS VSS

D1

VSS

D4

VSS

D8

VSS VSS VSS VSS VSS VSS VSS

E3

VSS

E6

VSS

E8

VSS VSS VSS VSS VSS VSS VSS

F5

VSS

F8

VSS VSS VSS VSS VSS

F2

VSS VSS VSS

G4

VSS

G1

VSS VSS VSS

H3

VSS

H6

VSS VSS VSS

J2

VSS

J5

VSS VSS VSS

K1

VSS

K4

VSS VSS VSS

L3

VSS

L6

VSS VSS VSS

M2

VSS

M5

VSS VSS VSS

N1

VSS

N4

VSS VSS VSS

P3

VSS

BGA479-SKT6-GPU6

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

P6 P21 P24 R2 R5 R22 R25 T1 T4 T23 T26 U3 U6 U21 U24 V2 V5 V22 V25 W1 W4 W23 W26 Y3 Y6 Y21 Y24 AA2 AA5 AA8 AA11 AA14 AA16 AA19 AA22 AA25 AB1 AB4 AB8 AB11 AB13 AB16 AB19 AB23 AB26 AC3 AC6 AC8 AC11 AC14 AC16 AC19 AC21 AC24 AD2 AD5 AD8 AD11 AD13 AD16 AD19 AD22 AD25 AE1 AE4 AE8 AE11 AE14 AE16 AE19 AE23 AE26 A2 AF6 AF8 AF11 AF13 AF16 AF19 AF21 A25 AF25

CPU_GND1

CPU_GND2 CPU_GND3

CPU_GND4

TP5TP5

1

TP71TP71

1

TP65TP65

1

TP68TP68

1

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Foose Intel

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

Foose Intel

CPU-POWER(2/2)

1

958Friday, May 30, 2008

of

SC

5

www.kythuatvitinh.com

4

3

2

1

SSID = MCH

H_D#[0..63]8

D D

C C

B B

H_RCOMP / H_VREF / H_SWING

+1.05V_VCCP

trace width and spacing is 10/20

12

R113

R113 1KR2F-3-GP

1KR2F-3-GP

12

R111

R111 2KR2F-3-GP

2KR2F-3-GP

H_VREF

12

C108

SCD1U10V2KX-4GP

H_RESET#6,8 H_CPUSLP#8

H_D#0 H_D#1 H_D#2 H_D#3 H_D#4 H_D#5 H_D#6 H_D#7 H_D#8 H_D#9 H_D#10 H_D#11 H_D#12 H_D#13 H_D#14 H_D#15 H_D#16 H_D#17 H_D#18 H_D#19 H_D#20 H_D#21 H_D#22 H_D#23 H_D#24 H_D#25 H_D#26 H_D#27 H_D#28 H_D#29 H_D#30 H_D#31 H_D#32 H_D#33 H_D#34 H_D#35 H_D#36 H_D#37 H_D#38 H_D#39 H_D#40 H_D#41 H_D#42 H_D#43 H_D#44 H_D#45 H_D#46 H_D#47 H_D#48 H_D#49 H_D#50 H_D#51 H_D#52 H_D#53 H_D#54 H_D#55 H_D#56 H_D#57 H_D#58 H_D#59 H_D#60 H_D#61 H_D#62 H_D#63

H_SWING H_RCOMP

H_RESET# H_CPUSLP#

NB Nwe Part Number

71.CNTIG.G0U

U64A

F2

H_D#_0

G8

H_D#_1

F8

H_D#_2

E6

H_D#_3

G2

H_D#_4

H6

H_D#_5

H2

H_D#_6

F6

H_D#_7

D4

H_D#_8

H3

H_D#_9

M9

H_D#_10

M11

H_D#_11

J1

H_D#_12

J2

H_D#_13

N12

H_D#_14

J6

H_D#_15

P2

H_D#_16

L2

H_D#_17

R2

H_D#_18

N9

H_D#_19

L6

H_D#_20

M5

H_D#_21

J3

H_D#_22

N2

H_D#_23

R1

H_D#_24

N5

H_D#_25

N6

H_D#_26

P13

H_D#_27

N8

H_D#_28

L7

H_D#_29

N10

H_D#_30

M3

H_D#_31

Y3

H_D#_32

AD14

H_D#_33

Y6

H_D#_34

Y10

H_D#_35

Y12

H_D#_36

Y14

H_D#_37

Y7

H_D#_38

W2

H_D#_39

AA8

H_D#_40

Y9

H_D#_41

AA13

H_D#_42

AA9

H_D#_43

AA11

H_D#_44

AD11

H_D#_45

AD10

H_D#_46

AD13

H_D#_47

AE12

H_D#_48

AE9

H_D#_49

AA2

H_D#_50

AD8

H_D#_51

AA3

H_D#_52

AD3

H_D#_53

AD7

H_D#_54

AE14

H_D#_55

AF3

H_D#_56

AC1

H_D#_57

AE3

H_D#_58

AC3

H_D#_59

AE11

H_D#_60

AE8

H_D#_61

AG2

H_D#_62

AD6

H_D#_63

C5

H_SWING

E3

H_RCOMP

C12

H_CPURST#

E11

H_CPUSLP#

A11

H_AVREF

B11

H_DVREF

CANTIGA-GM-GP-U-NF

HOST

1 OF 10

H_A#_3 H_A#_4 H_A#_5 H_A#_6 H_A#_7 H_A#_8

H_A#_9 H_A#_10 H_A#_11 H_A#_12 H_A#_13 H_A#_14 H_A#_15 H_A#_16 H_A#_17 H_A#_18 H_A#_19 H_A#_20 H_A#_21 H_A#_22 H_A#_23 H_A#_24 H_A#_25 H_A#_26 H_A#_27 H_A#_28 H_A#_29 H_A#_30 H_A#_31

H_A#_32 H_A#_33 H_A#_34 H_A#_35

H_ADS# H_ADSTB#_0 H_ADSTB#_1

H_BNR# H_BPRI#

H_BREQ#

H_DEFER#

H_DBSY#

HPLL_CLK

HPLL_CLK#

H_DPWR#

H_DRDY#

H_HIT#

H_HITM# H_LOCK# H_TRDY#

H_DINV#_0 H_DINV#_1 H_DINV#_2 H_DINV#_3

H_DSTBN#_0 H_DSTBN#_1 H_DSTBN#_2 H_DSTBN#_3

H_DSTBP#_0 H_DSTBP#_1 H_DSTBP#_2 H_DSTBP#_3

H_REQ#_0 H_REQ#_1 H_REQ#_2 H_REQ#_3 H_REQ#_4

H_RS#_0

H_RS#_1

H_RS#_2

A14 C15 F16 H13 C18 M16 J13 P16 R16 N17 M13 E17 P17 F17 G20 B19 J16 E20 H16 J20 L17 A17 B17 L16 C21 J17 H20 B18 K17 B20 F21 K21 L20

H12 B16 G17 A9 F11 G12 E9 B10 AH7 AH6 J11 F9 H9 E12 H11 C9

J8 L3 Y13 Y1

L10 M7 AA5 AE6

L9 M8 AA6 AE5

B15 K13 F13 B13 B14

B6 F12 C8

H_A#3 H_A#4 H_A#5 H_A#6 H_A#7 H_A#8 H_A#9 H_A#10 H_A#11 H_A#12 H_A#13 H_A#14 H_A#15 H_A#16 H_A#17 H_A#18 H_A#19 H_A#20 H_A#21 H_A#22 H_A#23 H_A#24 H_A#25 H_A#26 H_A#27 H_A#28 H_A#29 H_A#30 H_A#31 H_A#32 H_A#33 H_A#34 H_A#35

H_DINV#0 H_DINV#1 H_DINV#2 H_DINV#3

H_DSTBN#0 H_DSTBN#1 H_DSTBN#2 H_DSTBN#3

H_DSTBP#0 H_DSTBP#1 H_DSTBP#2 H_DSTBP#3

H_REQ#0 H_REQ#1 H_REQ#2 H_REQ#3 H_REQ#4

H_RS#0 H_RS#1 H_RS#2

H_A#[ 3..35] 8

H_ADS# 8 H_ADSTB#0 8 H_ADSTB#1 8

H_BNR# 8

H_BPRI# 8

H_BR0# 8

H_DEFER# 8

H_DBSY# 8

CLK_MCH_BCLK 7 CLK_MCH_BCLK# 7

H_DPWR# 8

H_DRDY# 8

H_HIT# 8

H_HITM# 8

H_LOCK# 8

H_TRDY# 8

H_DINV#0 8 H_DINV#1 8 H_DINV#2 8 H_DINV#3 8

H_DSTBN#0 8 H_DSTBN#1 8 H_DSTBN#2 8 H_DSTBN#3 8

H_DSTBP#0 8 H_DSTBP#1 8 H_DSTBP#2 8 H_DSTBP#3 8

H_REQ#[0..4] 8

H_RS#[0..2] 8

H_SWING routing Trace width and Spacing use 10 / 20 mil

H_SWING Resistors and Capacitors close Cantiga 500 mil ( MAX )

Montevina Schematic Checklist v1.0 :

221 1% pull high 100 1% pull low

H_RCOMP routing Trace width and Spacing use 10 / 20 mil

R102 24D9R2F-L-GPR102 24D9R2F-L-GP

H_SWING

C619

SCD1U10V2KX-4GP

1 2

H_RCOMP

12

+1.05V_VCCP

12

R512

221R2F-2-GP

R511

100R2F-L1-GP-U

H_REF Decoupling close Cantiga 100 mil

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Foose Intel

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

Foose Intel

CANTIGA-FSB(1/6)

10 58Friday, May 30, 2008

1

of

SC

5

www.kythuatvitinh.com

SSID = MCH

is current setting

*

CFG Strap High

CFG 5

CFG 6

D D

CFG 7

TLS cipher suite with no confidentiality

CFG 9 Reverse Lanes

CFG 16

CFG 19

DMI Lane Reserved

CFG 20

PCIE/SDVO Select

SDVO_CTRLDATA

DDPC_CTRLDATA

C C

B B

Please place it near ICH9(U73).

-1-20080514

R373

12

0R0402-PAD

ICH_AZ_MCH_RST#21

ICH_AZ_MCH_SDOUT21

A A

ICH_AZ_MCH_SYNC21

R377

33R2J-2-GP

ICH_AZ_MCH_SDIN221

SC-20080328

Low

DMI X 2

ITPM enable

DMI X 4

ITPM disable

TLS cipher suite with confidentiality

Normal Operation

FSB dynamic ODT disable

FSB Dynamic ODT enable

Normal operation Reverse DMI lanes

*

Only PCIE or SDVO is operational

iHDMI/DP interface disabled

SDVO/iHDMI/DP interface disabled

2

CLK_IN CLK_OUT15VCCB

13

B0

12

B1

11

B2

10

B3

17

NC#17

1 2

9

GND

FXL2SD106BQX-GP

5

PCIE and SDVO are operatiing simultaneously

*

iHDMI/DP interface enabled

SDVO/iHDMI/DP interface enabled

-1-20080514

PM_EXTTS#36

PLTRST1#22

DPRSLPVR23,43

-1-20080522

U90

1

VCCA

16

ICH_AZ_MCH_RST#_R

4

A0

5

A1

ICH_AZ_MCH_SYNC_R

6

A2

MCH_SDIN2

7

A3

ICH_AZ_MCH_BITCLK_R

3

CMD_A

14

CMD_B

8

OE

R411

0R0402-PAD

1 2

R510

100R2J-2-GP

+1.5V_RUN

+3.3V_LEVELSHIFT

ICH_AZ_MCH_BITCLK 21

R455 10KR2F-2-GPR455 10KR2F-2-GP

1 2

R8154 8K25R2F-1-GPR8154 8K25R2F-1-GP

1 2

C377

+3.3V_RUN

C7280

SC100P50V2JN-3GP

4

TP82TP82

1

TP87TP87

R563 100R2J-2-GP

R563 100R2J-2-GP TP80TP80 TP85TP85

1

R570 100R2J-2-GP

1

R558 100R2J-2-GP

1

R567 100R2J-2-GP

* *

* * *

+3.3V_RUN

R144 4K02R2F-GP

1 2

R145 4K02R2F-GP

1 2

R135 2K21R2F-GP

1 2

*

R131 2K21R2F-GP

1 2

R124 2K21R2F-GP

*

CPU_MCH_BSEL07,8 CPU_MCH_BSEL17,8 CPU_MCH_BSEL27,8

1

23

RN9

RN9 SRN10KJ-5-GP

SRN10KJ-5-GP

4

ICH_PWRGD23,41

12

THERMTRIP_MCH#36

+1.05V_VCCP

C7279

SCD1U10V2KX-4GP

1 2

SCD1U10V2KX-4GP

1 2

R359 33R2J-2-GPR359 33R2J-2-GP

1 2

R355 33R2J-2-GPR355 33R2J-2-GP

1 2

R379 33R2J-2-GPR379 33R2J-2-GP

1 2

R363 33R2J-2-GPR363 33R2J-2-GP

1 2

+3.3V_LEVELSHIFT

1 2

R119 2K21R2F-GP

1 2

R121 2K21R2F-GP

1 2

PM_SYNC#23 H_DPRSTP#8,21,43

R128 56R2J-4-GPR128 56R2J-4-GP

4

DY DY

DY

DY DY

DY

TP15TP15 TP23TP23

TP22TP22 TP76TP76

TP19TP19 TP18TP18 TP20TP20 TP13TP13 TP14TP14

TP17TP17 TP24TP24

DY

DY DY

DY

ME_JTAG_TDI

12

ME_JTAG_TDO

12

ME_JTAG_TMS

12

TP78TP78 TP72TP72

TP16TP16

TP77TP77 TP21TP21 TP75TP75

CPU_MCH_BSEL0 CPU_MCH_BSEL1 CPU_MCH_BSEL2

CFG3

1

CFG4

1

CFG5 CFG6 CFG7 CFG8

1

CFG9 CFG10

1

CFG11

1

CFG12

1

CFG13

1

CFG14

1

CFG15

1

CFG16 CFG17

1

CFG18

1

CFG19 CFG20

PM_SYNC# H_DPRSTP# PM_EXTTS#0_1

PLTRST1#_R

THERMTRIP_MCH#

DPRSLPVR

12

GMCH_HDA_RST# GMCH_HDA_SDOUTICH_AZ_MCH_SDOUT_R GMCH_HDA_SYNC

GMCH_HDA_BITCLK

TP12TP12

ME_JTAG_TCK

12

DY

-1-20080522

M36

N36 R33 T33

AH9 AH10 AH12 AH13

K12

1

AL34 AK34 AN35 AM35

T24 B31

1

B2 M1

1

AY21

1

BG23

1

BF23

1

BH18

1

BF18

CFG19

CFG20

CFG5

CFG6

CFG7

CFG9

CFG16

T25 R25 P25 P20 P24 C25 N24

M24

E21 C23 C24 N21 P21 T21 R20

M20

L21 H21 P29 R28 T28

R29

B7 N33 P32

AT40 AT11

T20 R32

BG48 BF48 BD48 BC48 BH47 BG47 BE47 BH46 BF46 BG45 BH44 BH43

BH6 BH5 BG4 BH3

BF3

BH2 BG2 BE2 BG1

BF1

BD1 BC1

F1

A47

CANTIGA-GM-GP-U-NF

U64B

RESERVED#M36 RESERVED#N36 RESERVED#R33 RESERVED#T33 RESERVED#AH9 RESERVED#AH10 RESERVED#AH12 RESERVED#AH13 RESERVED#K12 RESERVED#AL34 RESERVED#AK34 RESERVED#AN35 RESERVED#AM35 RESERVED#T24

RESERVED#B31 RESERVED#B2 RESERVED#M1

RESERVED#AY21

RESERVED#BG23 RESERVED#BF23 RESERVED#BH18 RESERVED#BF18

CFG_0 CFG_1 CFG_2 CFG_3 CFG_4 CFG_5 CFG_6 CFG_7 CFG_8 CFG_9 CFG_10 CFG_11 CFG_12 CFG_13 CFG_14 CFG_15 CFG_16 CFG_17 CFG_18 CFG_19 CFG_20

PM_SYNC# PM_DPRSTP# PM_EXT_TS#_0 PM_EXT_TS#_1 PWROK RSTIN# THERMTRIP# DPRSLPVR

NC#BG48 NC#BF48 NC#BD48 NC#BC48 NC#BH47 NC#BG47 NC#BE47 NC#BH46 NC#BF46 NC#BG45 NC#BH44 NC#BH43 NC#BH6 NC#BH5 NC#BG4 NC#BH3 NC#BF3 NC#BH2 NC#BG2 NC#BE2 NC#BG1 NC#BF1 NC#BD1 NC#BC1 NC#F1 NC#A47

3

RSVD

CFG

PM

NC

MISC

2 OF 10

M_CLK_DDR0

AP24

SA_CK_0 SA_CK_1 SB_CK_0 SB_CK_1

SA_CK#_0 SA_CK#_1 SB_CK#_0 SB_CK#_1

SA_CKE_0 SA_CKE_1 SB_CKE_0 SB_CKE_1

SA_CS#_0 SA_CS#_1 SB_CS#_0 SB_CS#_1

SA_ODT_0 SA_ODT_1 SB_ODT_0 SB_ODT_1

SM_RCOMP

SM_RCOMP#

SM_RCOMP_VOH SM_RCOMP_VOL

SM_VREF

SM_PWROK

SM_REXT

SM_DRAMRST# DPLL_REF_CLK

DDR CLK/ CONTROL/COMPENSATION

DPLL_REF_CLK#

DPLL_REF_SSCLK

DPLL_REF_SSCLK#

PEG_CLK

PEG_CLK#

CLK

DMI_RXN_0 DMI_RXN_1 DMI_RXN_2 DMI_RXN_3

DMI_RXP_0 DMI_RXP_1 DMI_RXP_2 DMI_RXP_3

DMI_TXN_0 DMI_TXN_1 DMI_TXN_2

DMI

DMI_TXN_3 DMI_TXP_0

DMI_TXP_1 DMI_TXP_2 DMI_TXP_3

GFX_VID_0 GFX_VID_1 GFX_VID_2 GFX_VID_3 GFX_VID_4

GFX_VR_EN

GRAPHICS VID

CL_CLK

CL_DATA

CL_PWROK

CL_RST#

MEHDA

CL_VREF

DDPC_CTRLCLK

DDPC_CTRLDATA

SDVO_CTRLCLK

SDVO_CTRLDATA

CLKREQ#

ICH_SYNC#

TSATN#

HDA_BCLK HDA_RST#

HDA_SDI

HDA_SDO

HDA_SYNC

AT21 AV24 AU20

AR24 AR21 AU24 AV20

BC28 AY28 AY36 BB36

BA17 AY16 AV16 AR13

BD17 AY17 BF15 AY13

BG22 BH21

BF28 BH28

AV42 AR36 BF17 BC36

B38 A38 E41 F41

F43 E43

AE41 AE37 AE47 AH39

AE40 AE38 AE48 AH40

AE35 AE43 AE46 AH42

AD35 AE44 AF46 AH43

B33 B32 G33 F33 E33

C34

AH37 AH36 AN36 AJ35

CL_VREF

AH34

DDPC_CTRLCLK

N28

DDPC_CTRLDATA

M28

SDVO_CTRLCLK

G36

SDVO_CTRLDATA

E36

CLK_3GPLLREQ#

K36

MCH_ICH_SYNC#

H36

MCH_TSATN#

B12

GMCH_HDA_BITCLK

B28

GMCH_HDA_RST#

B30

GMCH_HDA_SDIN2

B29

GMCH_HDA_SDOUT

C29

GMCH_HDA_SYNC

A28

M_CLK_DDR1 M_CLK_DDR2 M_CLK_DDR3

M_CLK_DDR#0 M_CLK_DDR#1 M_CLK_DDR#2 M_CLK_DDR#3

M_CKE0 M_CKE1 M_CKE2 M_CKE3

M_CS0# M_CS1# M_CS2# M_CS3#

M_ODT0 M_ODT1 M_ODT2 M_ODT3

SMRCOMP SMRCOMP#

SMRCOMP_VOH SMRCOMP_VOL

SM_PWROK SM_REXT

1 2

SM_DRAMRST# CLK_MCH_DREFCLK

CLK_MCH_DREFCLK# MCH_SSCDREFCLK MCH_SSCDREFCLK#

CLK_MCH_3GPLL CLK_MCH_3GPLL#

DMI_MRX_ITX_N0 DMI_MRX_ITX_N1 DMI_MRX_ITX_N2 DMI_MRX_ITX_N3

DMI_MRX_ITX_P0 DMI_MRX_ITX_P1 DMI_MRX_ITX_P2 DMI_MRX_ITX_P3

DMI_MTX_IRX_N0 DMI_MTX_IRX_N1 DMI_MTX_IRX_N2 DMI_MTX_IRX_N3

DMI_MTX_IRX_P0 DMI_MTX_IRX_P1 DMI_MTX_IRX_P2 DMI_MTX_IRX_P3

R123

R110 54D9R2F-L1-GPR110 54D9R2F-L1-GP

1

CLK_3GPLLREQ# 7 MCH_ICH_SYNC# 23

1 2

SC-20080328

3

2

M_CLK_DDR0 16 M_CLK_DDR1 16 M_CLK_DDR2 17 M_CLK_DDR3 17

M_CLK_DDR#0 16 M_CLK_DDR#1 16 M_CLK_DDR#2 17 M_CLK_DDR#3 17

M_CKE0 16 M_CKE1 16 M_CKE2 17 M_CKE3 17

M_CS0# 16 M_CS1# 16 M_CS2# 17 M_CS3# 17

M_ODT0 16 M_ODT1 16 M_ODT2 17 M_ODT3 17

499R2F-2-GP

TP25TP25

CLK_MCH_DREFCLK 7 CLK_MCH_DREFCLK# 7 MCH_SSCDREFCLK 7 MCH_SSCDREFCLK# 7

CLK_MCH_3GPLL 7 CLK_MCH_3GPLL# 7

DMI_MRX_ITX_N0 22 DMI_MRX_ITX_N1 22 DMI_MRX_ITX_N2 22 DMI_MRX_ITX_N3 22

DMI_MRX_ITX_P0 22 DMI_MRX_ITX_P1 22 DMI_MRX_ITX_P2 22 DMI_MRX_ITX_P3 22

DMI_MTX_IRX_N0 22 DMI_MTX_IRX_N1 22 DMI_MTX_IRX_N2 22 DMI_MTX_IRX_N3 22

DMI_MTX_IRX_P0 22 DMI_MTX_IRX_P1 22 DMI_MTX_IRX_P2 22 DMI_MTX_IRX_P3 22

CL_CLK0 23

CL_DATA0 23 ICH_CL_PWROK 23,34 CL_RST0# 23

DDPC_CTRLCLK 37 DDPC_CTRLDATA 37 SDVO_CTRLCLK 37 SDVO_CTRLDATA 37

R158

MCH_SDIN2

2

1 2

33R2J-2-GP

+1.8V_SUS

R525

80D6R2F-L-GP

R520

80D6R2F-L-GP

R164

0R0402-PAD

Use for DDR3 signls,

1 2

if support DDR2 need connect to GND

+1.05V_VCCP

1 2

12

C173

SCD1U10V2KX-4GP

R106

R106 330R2J-3-GP

330R2J-3-GP

+1.05V_VCCP

1

+1.8V_SUS

12

R539

1KR2F-3-GP

12

-1-20080514

12

C652

SC2D2U6D3V3KX-GP

12

C647

SC2D2U6D3V3KX-GP

C205

SCD1U10V2KX-4GP

1 2

12

3K01R2F-3-GP

C650

SCD01U16V2KX-3GP

12

C648

SCD01U16V2KX-3GP

+V_DDR_MCH_REF

12

C192

SCD1U10V2KX-4GP

R534

R530

1KR2F-3-GP

SC-20080303

RN15

1

+3.3V_RUN

R152

R152 1KR2F-3-GP

1KR2F-3-GP

R162

R162 499R2F-2-GP

499R2F-2-GP

MCH_TSATN#_1

12

Title

Size Document Number Rev

Custom

Date: Sheet

2 3

SRN2K2J-1-GP

RN4

1 2 3

SRN2K2J-1-GP

+3.3V_RUN

23

3

1

2

CANTIGA-DMI/CFG(2/6)

SDVO_CTRLCLK

4

SDVO_CTRLDATA

DDPC_CTRLCLK

4

DDPC_CTRLDATA

1

RN3

RN3 SRN1KJ-7-GP

SRN1KJ-7-GP

4

MCH_TSATN_EC

TSATN#_1

Q22

Q22 PMBS3904-1-GP

PMBS3904-1-GP

Foose Intel

3

Q24

1

PMBS3904-1-GP

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

11 58Friday, May 30, 2008

1

MCH_TSATN_EC 35

of

SC

5

www.kythuatvitinh.com

4

3

2

1

SSID = MCH

D D

4 OF 10

U64D

M_A_DQ[0..63]16

C C

B B

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

U64D

AJ38

SA_DQ_0

AJ41

SA_DQ_1

AN38

SA_DQ_2

AM38

SA_DQ_3

AJ36

SA_DQ_4

AJ40

SA_DQ_5

AM44

SA_DQ_6

AM42

SA_DQ_7

AN43

SA_DQ_8

AN44

SA_DQ_9

AU40

SA_DQ_10

AT38

SA_DQ_11

AN41

SA_DQ_12

AN39

SA_DQ_13

AU44

SA_DQ_14

AU42

SA_DQ_15

AV39

SA_DQ_16

AY44

SA_DQ_17

BA40

SA_DQ_18

BD43

SA_DQ_19

AV41

SA_DQ_20

AY43

SA_DQ_21

BB41

SA_DQ_22

BC40

SA_DQ_23

AY37

SA_DQ_24

BD38

SA_DQ_25

AV37

SA_DQ_26

AT36

SA_DQ_27

AY38

SA_DQ_28

BB38

SA_DQ_29

AV36

SA_DQ_30

AW36

SA_DQ_31

BD13

SA_DQ_32

AU11

SA_DQ_33

BC11

SA_DQ_34

BA12

SA_DQ_35

AU13

SA_DQ_36

AV13

SA_DQ_37

BD12

SA_DQ_38

BC12

SA_DQ_39

BB9

SA_DQ_40

BA9

SA_DQ_41

AU10

SA_DQ_42

AV9

SA_DQ_43

BA11

SA_DQ_44

BD9

SA_DQ_45

AY8

SA_DQ_46

BA6

SA_DQ_47

AV5

SA_DQ_48

AV7

SA_DQ_49

AT9

SA_DQ_50

AN8

SA_DQ_51

AU5

SA_DQ_52

AU6

SA_DQ_53

AT5

SA_DQ_54

AN10

SA_DQ_55

AM11

SA_DQ_56

AM5

SA_DQ_57

AJ9

SA_DQ_58

AJ8

SA_DQ_59

AN12

SA_DQ_60

AM13

SA_DQ_61

AJ11

SA_DQ_62

AJ12

SA_DQ_63

CANTIGA-GM-GP-U-NF

4 OF 10

SA_BS_0 SA_BS_1 SA_BS_2

SA_RAS# SA_CAS#

SA_WE#

SA_DM_0 SA_DM_1 SA_DM_2 SA_DM_3 SA_DM_4 SA_DM_5 SA_DM_6 SA_DM_7

SA_DQS_0 SA_DQS_1 SA_DQS_2 SA_DQS_3 SA_DQS_4 SA_DQS_5 SA_DQS_6

SA_DQS_7 SA_DQS#_0 SA_DQS#_1 SA_DQS#_2 SA_DQS#_3 SA_DQS#_4 SA_DQS#_5 SA_DQS#_6 SA_DQS#_7

SA_MA_0 SA_MA_1 SA_MA_2 SA_MA_3 SA_MA_4 SA_MA_5 SA_MA_6 SA_MA_7 SA_MA_8

SA_MA_9 SA_MA_10 SA_MA_11 SA_MA_12 SA_MA_13 SA_MA_14

DDR SYSTEM MEMORY A

BD21 BG18 AT25

BB20 BD20 AY20

AM37 AT41 AY41 AU39 BB12 AY6 AT7 AJ5

AJ44 AT44 BA43 BC37 AW12 BC8 AU8 AM7 AJ43 AT43 BA44 BD37 AY12 BD8 AU9 AM8

BA21 BC24 BG24 BH24 BG25 BA24 BD24 BG27 BF25 AW24 BC21 BG26 BH26 BH17 AY25

M_A_BS#0 M_A_BS#1 M_A_BS#2

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6

M_A_DQS7 M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8

M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14

M_A_RAS# 16 M_A_CAS# 16 M_A_WE# 16

M_A_DM[0..7] 16

M_A_A[0..14] 16

M_B_DQ[0..63]17

M_A_DQS[0..7] 16

M_A_DQS#[0..7] 16

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

U64E

AK47

SB_DQ_0

AH46

SB_DQ_1

AP47

SB_DQ_2

AP46

SB_DQ_3

AJ46

SB_DQ_4

AJ48

SB_DQ_5

AM48

SB_DQ_6

AP48

SB_DQ_7

AU47

SB_DQ_8

AU46

SB_DQ_9

BA48

SB_DQ_10

AY48

SB_DQ_11

AT47

SB_DQ_12

AR47

SB_DQ_13

BA47

SB_DQ_14

BC47

SB_DQ_15

BC46

SB_DQ_16

BC44

SB_DQ_17

BG43

SB_DQ_18

BF43

SB_DQ_19

BE45

SB_DQ_20

BC41

SB_DQ_21

BF40

SB_DQ_22

BF41

SB_DQ_23

BG38

SB_DQ_24

BF38

SB_DQ_25

BH35

SB_DQ_26

BG35

SB_DQ_27

BH40

SB_DQ_28

BG39

SB_DQ_29

BG34

SB_DQ_30

BH34

SB_DQ_31

BH14

SB_DQ_32

BG12

SB_DQ_33

BH11

SB_DQ_34

BG8

SB_DQ_35

BH12

SB_DQ_36

BF11

SB_DQ_37

BF8

SB_DQ_38

BG7

SB_DQ_39

BC5

SB_DQ_40

BC6

SB_DQ_41

AY3

SB_DQ_42

AY1

SB_DQ_43

BF6

SB_DQ_44

BF5

SB_DQ_45

BA1

SB_DQ_46

BD3

SB_DQ_47

AV2

SB_DQ_48

AU3

SB_DQ_49

AR3

SB_DQ_50

AN2

SB_DQ_51

AY2

SB_DQ_52

AV1

SB_DQ_53

AP3

SB_DQ_54

AR1

SB_DQ_55

AL1

SB_DQ_56

AL2

SB_DQ_57

AJ1

SB_DQ_58

AH1

SB_DQ_59

AM2

SB_DQ_60

AM3

SB_DQ_61

AH3

SB_DQ_62

AJ3

SB_DQ_63

CANTIGA-GM-GP-U-NF

5 OF 10

SB_BS_0 SB_BS_1 SB_BS_2

SB_RAS# SB_CAS#

SB_WE#

SB_DM_0 SB_DM_1 SB_DM_2 SB_DM_3 SB_DM_4 SB_DM_5 SB_DM_6 SB_DM_7

SB_DQS_0 SB_DQS_1 SB_DQS_2 SB_DQS_3 SB_DQS_4 SB_DQS_5 SB_DQS_6

SB_DQS_7 SB_DQS#_0 SB_DQS#_1 SB_DQS#_2 SB_DQS#_3 SB_DQS#_4 SB_DQS#_5 SB_DQS#_6 SB_DQS#_7

SB_MA_0 SB_MA_1 SB_MA_2 SB_MA_3 SB_MA_4 SB_MA_5 SB_MA_6 SB_MA_7 SB_MA_8

SB_MA_9 SB_MA_10 SB_MA_11 SB_MA_12 SB_MA_13 SB_MA_14

DDR SYSTEM MEMORY B

BC16 BB17 BB33

AU17 BG16 BF14

AM47 AY47 BD40 BF35 BG11 BA3 AP1 AK2

AL47 AV48 BG41 BG37 BH9 BB2 AU1 AN6 AL46 AV47 BH41 BH37 BG9 BC2 AT2 AN5

AV17 BA25 BC25 AU25 AW25 BB28 AU28 AW28 AT33 BD33 BB16 AW33 AY33 BH15 AU33

M_B_BS#0 M_B_BS#1 M_B_BS#2

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7 M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8

M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14

M_B_RAS# 17 M_B_CAS# 17 M_B_WE# 17

M_B_BS#[0..2] 17M_A_BS#[0..2] 16

M_B_DM[0..7] 17

M_B_DQS[0..7] 17

M_B_DQS#[0..7] 17

M_B_A[0..14] 17

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Foose Intel

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

Foose Intel

CANTIGA-DDR

1

12 58Friday, May 30, 2008

of

SC

5

www.kythuatvitinh.com

4

3

2

1

SSID = MCH

10 OF 10

VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF VSS_NCTF

VSS NCTF

VSS_NCTF VSS_NCTF

VSS_SCB VSS_SCB VSS_SCB VSS_SCB VSS_SCB

VSS SCB

NC

10 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS VSS

NC#E1 NC#D2 NC#C3 NC#B4 NC#A5

NC#A6 NC#A43 NC#A44 NC#B45 NC#C46 NC#D47 NC#B47 NC#A46 NC#F48 NC#E48 NC#C48 NC#B48

AH8 Y8 L8 E8 B8 AY7 AU7 AN7 AJ7 AE7 AA7 N7 J7 BG6 BD6 AV6 AT6 AM6 M6 C6 BA5 AH5 AD5 Y5 L5 J5 H5 F5 BE4

BC3 AV3 AL3 R3 P3 F3 BA2 AW2 AU2 AR2 AP2 AJ2 AH2 AF2 AE2 AD2 AC2 Y2 M2 K2 AM1 AA1 P1 H1

U24 U28 U25 U29

AF32 AB32 V32 AJ30 AM29 AF29 AB29 U26 U23 AL20 V20 AC19 AL17 AJ17 AA17 U17

BH48 BH1 A48 C1 A3

E1 D2 C3 B4 A5 A6 A43 A44 B45 C46 D47 B47 A46 F48 E48 C48 B48

MCH_GND1 MCH_GND2 MCH_GND3 MCH_GND4

9 OF 10

U64I

AU48

VSS

AR48

VSS

AL48

VSS

BB47

VSS

AW47

VSS

AN47

VSS

AJ47

VSS

AF47

VSS

AD47

VSS

AB47

VSS

Y47

VSS

T47

VSS

N47

VSS

L47

VSS

G47

VSS

BD46

VSS

BA46

VSS

AY46

VSS

AV46

VSS

AR46

VSS

AM46

VSS

V46

VSS

R46

VSS

P46

VSS

H46

VSS

F46

VSS

BF44

VSS

AH44

VSS

AD44

VSS

AA44

VSS

Y44

VSS

U44

VSS

T44

VSS

M44

VSS

F44

VSS

BC43

VSS

AV43

VSS

AU43

VSS

AM43

VSS

J43

VSS

C43

VSS

BG42

VSS

AY42

VSS

AT42

VSS

AN42

VSS

AJ42

VSS

AE42

VSS

N42

VSS

L42

VSS

BD41

VSS

AU41

VSS

AM41

VSS

AH41

VSS

AD41

VSS

AA41

VSS

Y41

VSS

U41

VSS

T41

VSS

M41

VSS

G41

VSS

B41

VSS

BG40

VSS

BB40

VSS

AV40

VSS

AN40

VSS

H40

VSS

E40

VSS

AT39

VSS

AM39

VSS

AJ39

VSS

AE39

VSS

N39

VSS

L39

VSS

B39

VSS

BH38

VSS

BC38

TP89TP89

1

TP74TP74

1

TP90TP90

1

TP73TP73

1

VSS

BA38

VSS

AU38

VSS

AH38

VSS

AD38

VSS

AA38

VSS

Y38

VSS

U38

VSS

T38

VSS

J38

VSS

F38

VSS

C38

VSS

BF37

VSS

BB37

VSS

AW37

VSS

AT37

VSS

AN37

VSS

AJ37

VSS

H37

VSS

C37

VSS

BG36

VSS

BD36

VSS

AK15

VSS

AU36

VSS

CANTIGA-GM-GP-U-NF

VSS

9 OF 10

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AM36 AE36 P36 L36 J36 F36 B36 AH35 AA35 Y35 U35 T35 BF34 AM34 AJ34 AF34 AE34 W34 B34 A34 BG33 BC33 BA33 AV33 AR33 AL33 AH33 AB33 P33 L33 H33 N32 K32 F32 C32 A31 AN29 T29 N29 K29 H29 F29 A29 BG28 BD28 BA28 AV28 AT28 AR28 AJ28 AG28 AE28 AB28 Y28 P28 K28 H28 F28 C28 BF26 AH26 AF26 AB26 AA26 C26 B26 BH25 BD25 BB25 AV25 AR25 AJ25 AC25 Y25 N25 L25 J25 G25 E25 BF24 AD12 AY24 AT24 AJ24 AH24 AF24 AB24 R24 L24 K24 J24 G24 F24 E24 BH23 AG23 Y23 B23 A23 AJ6

LCD_DDCLK19

LCD_DDCDAT19

VGA_BLU18 VGA_GRN18 VGA_RED18

CRT_HSYNC18 CRT_VSYNC18

U64J

BG21

VSS

L12

VSS

AW21

VSS

AU21

VSS

AP21

VSS

AN21

VSS

AH21

VSS

AF21

VSS

AB21

D D

C C

B B

A A

VSS

R21

VSS

M21

VSS

J21

VSS

G21

VSS

BC20

VSS

BA20

VSS

AW20

VSS

AT20

VSS

AJ20

VSS

AG20

VSS

Y20

VSS

N20

VSS

K20

VSS

F20

VSS

C20

VSS

A20

VSS

BG19

VSS

A18

VSS

BG17

VSS

BC17

VSS

AW17

VSS

AT17

VSS

R17

VSS

M17

VSS

H17

VSS

C17

VSS

BA16

VSS

AU16

VSS

AN16

VSS

N16

VSS

K16

VSS

G16

VSS

E16

VSS

BG15

VSS

AC15

VSS

W15

VSS

A15

VSS

BG14

VSS

AA14

VSS

C14

VSS

BG13

VSS

BC13

VSS

BA13

VSS

AN13

VSS

AJ13

VSS

AE13

VSS

N13

VSS

L13

VSS

G13

VSS

E13

VSS

BF12

VSS

AV12

VSS

AT12

VSS

AM12

VSS

AA12

VSS

J12

VSS

A12

VSS

BD11

VSS

BB11

VSS

AY11

VSS

AN11

VSS

AH11

VSS

Y11

VSS

N11

VSS

G11

VSS

C11

VSS

BG10

VSS

AV10

VSS

AT10

VSS

AJ10

VSS

AE10

VSS

AA10

VSS

M10

VSS

BF9

VSS

BC9

VSS

AN9

VSS

AM9

VSS

AD9

VSS

G9

VSS

B9

VSS

BH8

VSS

BB8

VSS

AV8

VSS

AT8

VSS

CANTIGA-GM-GP-U-NF

VSS

5

4

+3.3V_RUN

1

23

RN12

SRN2K2J-1-GP

4

1 2

R139 100KR2J-1-GPR139 100KR2J-1-GP

TV_CVBS19

TV_Y19 TV_C19

150R2F-1-GP

R141 150R2F-1-GPR141 150R2F-1-GP R142 150R2F-1-GPR142 150R2F-1-GP R143 150R2F-1-GPR143 150R2F-1-GP

R155 30R2J-1-GPR155 30R2J-1-GP R157 30R2J-1-GPR157 30R2J-1-GP

12 12

DAT_DDC2_S18

CLK_DDC2_S18

3

BIA_PWM19

PANEL_BKEN35

ENVDD19

1 2

R173 2K4R2F-GPR173 2K4R2F-GP

TXACLK-19

TXACLK+19 TXBCLK-19 TXBCLK+19

TXAOUT0-19 TXAOUT1-19 TXAOUT2-19

TXAOUT0+19 TXAOUT1+19 TXAOUT2+19

TXBOUT0-19 TXBOUT1-19 TXBOUT2-19

TXBOUT0+19 TXBOUT1+19 TXBOUT2+19

12

R132

1 2

R133

150R2F-1-GP

12

G_CLK_DDC2 G_DATA_DDC2

CRT_HSYNC_1 CRT_VSYNC_1

R146

R146 1K02R2F-1-GP

1K02R2F-1-GP

CLK_DDC2_S

R134

VGA_BLU VGA_GRN VGA_RED

CRTIREF

ENVDD

ENVDD L_IBG

TV_CVBS TV_Y TV_C

U64C

L32

L_BKLT_CTRL

G32

L_BKLT_EN

M32

L_CTRL_CLK

M33

L_CTRL_DATA

K33

L_DDC_CLK

J33

L_DDC_DATA

M29

L_VDD_EN

C44

LVDS_IBG

B43

LVDS_VBG

E37

LVDS_VREFH

E38

LVDS_VREFL

C41

LVDSA_CLK#

C40

LVDSA_CLK

B37

LVDSB_CLK#

A37

LVDSB_CLK

H47

LVDSA_DATA#_0

E46

LVDSA_DATA#_1

G40

LVDSA_DATA#_2

A40

LVDSA_DATA#_3

H48

LVDSA_DATA_0

D45

LVDSA_DATA_1

F40

LVDSA_DATA_2

B40

LVDSA_DATA_3

A41

LVDSB_DATA#_0

H38

LVDSB_DATA#_1

G37

LVDSB_DATA#_2

J37

LVDSB_DATA#_3

B42

LVDSB_DATA_0

G38

LVDSB_DATA_1

F37

LVDSB_DATA_2

K37

LVDSB_DATA_3

F25

TVA_DAC

H25

TVB_DAC

K25

TVC_DAC

H24

TV_RTN

C31

TV_DCONSEL_0

E32

TV_DCONSEL_1

E28

CRT_BLUE

G28

CRT_GREEN

J28

CRT_RED

G29

CRT_IRTN

H32

CRT_DDC_CLK

J32

CRT_DDC_DATA

J29

CRT_HSYNC

E29

CRT_TVO_IREF

L29

CRT_VSYNC

CANTIGA-GM-GP-U-NF

+3.3V_RUN

Q31

5 6

2N7002DW-7F-GP

+VCC_PEG

3 OF 10

PEGCOMP

PEG_RX_0 PEG_RX_1 PEG_RX_2 PEG_RX_3 PEG_RX_4 PEG_RX_5 PEG_RX_6 PEG_RX_7 PEG_RX_8 PEG_RX_9

PEG_TX_0 PEG_TX_1 PEG_TX_2 PEG_TX_3 PEG_TX_4 PEG_TX_5 PEG_TX_6 PEG_TX_7 PEG_TX_8 PEG_TX_9

T37 T36

H44 J46 L44 L40 N41 P48 N44 T43 U43 Y43 Y48 Y36 AA43 AD37 AC47 AD39

H43 J44 L43 L41 N40 P47 N43 T42 U42 Y42 W47 Y37 AA42 AD36 AC48 AD40

DPB_LANE_N0

J41

DPB_LANE_N1

M46

DPB_LANE_N2

M47

DPB_LANE_N3

M40

DPC_LANE_N0

M42

DPC_LANE_N1

R48

DPC_LANE_N2

N38

DPC_LANE_N3

T40 U37 U40 Y40 AA46 AA37 AA40 AD43 AC46

DPB_LANE_P0

J42

DPB_LANE_P1

L46

DPB_LANE_P2

M48

DPB_LANE_P3

M39

DPC_LANE_P0

M43

DPC_LANE_P1

R47

DPC_LANE_P2

N37

DPC_LANE_P3

T39 U36 U39 Y39 Y46 AA36 AA39 AD42 AD46

Title

Size Document Number Rev

Custom

CANTIGA-GND/LVDS/VGA(4/6)

Date: Sheet

PEG_COMPI

PEG_COMPO

PEG_RX#_0 PEG_RX#_1 PEG_RX#_2 PEG_RX#_3 PEG_RX#_4 PEG_RX#_5 PEG_RX#_6 PEG_RX#_7 PEG_RX#_8 PEG_RX#_9

PEG_RX#_10

LVDS

TV VGA

34 2 1

PEG_RX#_11 PEG_RX#_12 PEG_RX#_13 PEG_RX#_14 PEG_RX#_15

PEG_RX_10 PEG_RX_11 PEG_RX_12 PEG_RX_13 PEG_RX_14 PEG_RX_15

PEG_TX#_0 PEG_TX#_1 PEG_TX#_2 PEG_TX#_3 PEG_TX#_4 PEG_TX#_5 PEG_TX#_6 PEG_TX#_7 PEG_TX#_8

PEG_TX#_9 PEG_TX#_10 PEG_TX#_11 PEG_TX#_12

PCI-EXPRESS GRAPHICS

PEG_TX#_13 PEG_TX#_14 PEG_TX#_15

PEG_TX_10

PEG_TX_11

PEG_TX_12

PEG_TX_13

PEG_TX_14

PEG_TX_15

1

23

RN11

SRN2K2J-1-GP

4

G_CLK_DDC2

G_DATA_DDC2DAT_DDC2_S

2

12

R165

49D9R2F-GP

DPB_DOCK_AUX# 37

DPC_DOCK_AUX# 37

DPB_DOCK_AUX DPB_DOCK_AUX#

DPC_DOCK_AUX DPC_DOCK_AUX#

DPB_DOCK_AUX 37 DPB_DOCK_HPD_R# 37

DPC_DOCK_AUX 37 DPC_DOCK_HPD_R# 37

C201 SCD1U10V2KX-4GPC201 SCD1U10V2KX-4GP C222 SCD1U10V2KX-4GPC222 SCD1U10V2KX-4GP C220 SCD1U10V2KX-4GPC220 SCD1U10V2KX-4GP C194 SCD1U10V2KX-4GPC194 SCD1U10V2KX-4GP C200 SCD1U10V2KX-4GPC200 SCD1U10V2KX-4GP C214 SCD1U10V2KX-4GPC214 SCD1U10V2KX-4GP C183 SCD1U10V2KX-4GPC183 SCD1U10V2KX-4GP C196 SCD1U10V2KX-4GPC196 SCD1U10V2KX-4GP

C202 SCD1U10V2KX-4GPC202 SCD1U10V2KX-4GP C223 SCD1U10V2KX-4GPC223 SCD1U10V2KX-4GP C227 SCD1U10V2KX-4GPC227 SCD1U10V2KX-4GP C189 SCD1U10V2KX-4GPC189 SCD1U10V2KX-4GP C208 SCD1U10V2KX-4GPC208 SCD1U10V2KX-4GP C211 SCD1U10V2KX-4GPC211 SCD1U10V2KX-4GP C177 SCD1U10V2KX-4GPC177 SCD1U10V2KX-4GP C188 SCD1U10V2KX-4GPC188 SCD1U10V2KX-4GP

12 12 12 12 12 12 12 12

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Foose Intel

SRN100KJ-6-GP

1

RN280

2 3 1

DY

RN281

1 2 3

DY

DPB_LANE_N0_C 37 DPB_LANE_N1_C 37 DPB_LANE_N2_C 37 DPB_LANE_N3_C 37 DPC_LANE_N0_C 37 DPC_LANE_N1_C 37 DPC_LANE_N2_C 37 DPC_LANE_N3_C 37

DPB_LANE_P0_C 37 DPB_LANE_P1_C 37 DPB_LANE_P2_C 37 DPB_LANE_P3_C 37 DPC_LANE_P0_C 37 DPC_LANE_P1_C 37 DPC_LANE_P2_C 37 DPC_LANE_P3_C 37

13 58Friday, May 30, 2008

of

+3.3V_RUN

4

SC

5

www.kythuatvitinh.com

4

3

2

1

+5V_RUN

12

C8336

D D

SC1U6D3V2KX-GP

+1.05V_VCCP

L14 IND-10UH-144-GPL14 IND-10UH-144-GP L19 IND-10UH-144-GPL19 IND-10UH-144-GP

+1.05V_VCCP

BLM18PG121SN-1GP

C C

BLM18PG121SN-1GP

U89

1

IN

2

GND SHDN#3NC#4

MAX8511EXK33-T-GP

-1-20080514

12 12 12

1 2

L20

SCD1U10V2KX-4GP

L39BLM18AG121SN-1GP L39BLM18AG121SN-1GP L38BLM18PG121SN1D-GP L38BLM18PG121SN1D-GP

VCCA_PEG_PLL

12

C229

OUT

SC10U6D3V5KX-1GP

12

5

4

12

C224

12

R185

R185 1R2F-GP

1R2F-GP

C238

C238 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

1 2

-1-20080514

+3.3V_CRT_LDO

1

2

SC10U6D3V5ZY-2GP

12

C218

SCD1U10V2KX-4GP

+1.5V_RUN

VCCA_PEG_PLL_L

1 2

0R0603-PAD

C8335

C692

SC10U6D3V5KX-1GP

+1.05V_VCCP

R8139

12

C687

SCD1U10V2KX-4GP

12

R191

0R0402-PAD

3.3V_CRT_DAC

12

C139

SCD1U10V2KX-4GP

12

C598

SCD1U10V2KX-4GP

12

SC4D7U6D3V3KX-GP

-1-20080514

1 2

0R0603-PAD

12

TC21

DY

ST100U6D3VBM-8GP

SC-20080325

+1.05V_VCCP

-1-20080514

C149

C133

3.3V_CRT_DAC

12

SCD01U16V2KX-3GP

12

C148

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

+1.05V_VCCP

12

B B

SCD1U10V2KX-4GP

+1.5V_RUN

L4

12

C245

SCD1U10V2KX-4GP

A A

12

C137

+1.5V_RUN

SCD01U16V2KX-3GP

L4

1 2

BLM18PG181SN-3GP

SCD1U10V2KX-4GP

5

SSID = MCH

12

C143

C135

SCD01U16V2KX-3GP

12

C608

C607

R116

R140

1 2

0R0603-PAD

C140

C117

4

C608

C596

SCD1U10V2KX-4GP

SC10U6D3V5KX-1GP

-1-20080514

C126

SC22U6D3V5MX-2GP

C151

SC22U6D3V5MX-2GP

12

+1.5V_RUN

VCCA_PEG_PLL

C225

SCD1U10V2KX-4GP

12

C242 SCD1U10V2KX-4GPC242 SCD1U10V2KX-4GP

12

3.3V_CRT_DAC

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

1.05V_M_DPLLA

1.05V_M_DPLLB

1.05V_M_HPLL

1.05V_M_MPLL VCC_TX_LVDS

C231

12

SC1KP50V2KX-1GP

VCCA_PEG_BG

1 2

VCCA_PEG_PLL

1.05V_M_A_SM

12

C124

SC4D7U6D3V3KX-GP

1.05V_M_SM_CK

12

C138

DY

SC2D2U6D3V3KX-GP

C160

C160 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

1.5V_VCCD_QDAC

VCCA_PEG_PLL

+1.8V_SUS

12

C136

12

C109

SC1U6D3V2KX-GP

SC-20080328

12

C141

SCD1U10V2KX-4GP

1 2

C186

8 OF 10

852mA

321.35mA

AXF

VCC_SM_CK VCC_SM_CK VCC_SM_CK VCC_SM_CK

SM CK

118.8mA

VCC_TX_LVDS

HV

PEG

DMI

VTTLF

8 OF 10

VTT

VCC_AXF VCC_AXF VCC_AXF

124mA

VCC_HV VCC_HV VCC_HV

VCC_PEG VCC_PEG VCC_PEG VCC_PEG VCC_PEG

VCC_DMI VCC_DMI VCC_DMI VCC_DMI

VTTLF VTTLF VTTLF

VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT VTT

U13 T13 U12 T12 U11 T11 U10 T10 U9 T9 U8 T8 U7 T7 U6 T6 U5 T5 V3 U3 V2 U2 T2 V1 U1

B22 B21 A21

BF21 BH20 BG20 BF20

K47 C35

B35 A35

V48 U48 V47 U47 U46

AH48 AF48 AH47 AG47

A8 L1 AB2

C209

VTTLF1 VTTLF2 VTTLF3

C604

1.8V_SM_CK

12

1

2

SCD47U6D3V2KX-GP

C112

C694

SC4D7U6D3V3KX-GP

1

2

SCD47U6D3V2KX-GP

C603

SCD47U6D3V2KX-GP

2

C159

SC2D2U6D3V3KX-GP

12

C122

SC1U6D3V2KX-GP

12

C125

SCD1U10V2KX-4GP

+VCC_PEG

12

SC22U6D3V5MX-2GP

ST220U2VBM-3GP

1

C102

2

SCD47U6D3V2KX-GP

12

C142

SC4D7U6D3V5KX-3GP

12

C232

C232 SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

12

TC19

ST220U2VBM-3GP

DY

TC26

1

2

12

VCC_AXF

-1-20080520

+VCC_PEG

12

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

U64H

73mA

VCCA_CRT_DAC VCCA_CRT_DAC

5mA

VCCA_DAC_BG VSSA_DAC_BG

VCCA_DPLLA VCCA_DPLLB VCCA_HPLL VCCA_MPLL

139.2mA

13.2mA

VCCA_LVDS VSSA_LVDS

VCCA_PEG_BG

414uA 50mA

VCCA_PEG_PLL

VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM VCCA_SM

64.8mA

64.8mA 24mA

CRTPLLA PEGA SM

A LVDS

POWER

A25 B25

AD1

AE1

AD48

AA48

AR20 AP20 AN20 AR17 AP17 AN17 AT16 AR16 AP16

B27 A26

F47 L48

J48 J47

720mA

AP28

VCCA_SM_CK

AN28

VCCA_SM_CK

AP25

VCCA_SM_CK

AN25

VCCA_SM_CK

AN24

VCCA_SM_CK

AM28

VCCA_SM_CK_NCTF

AM26

VCCA_SM_CK_NCTF

AM25

VCCA_SM_CK_NCTF

AL25

VCCA_SM_CK_NCTF

AM24

VCCA_SM_CK_NCTF

AL24

VCCA_SM_CK_NCTF

AM23

VCCA_SM_CK_NCTF

AL23

VCCA_SM_CK_NCTF

B24

VCCA_TV_DAC

A24

VCCA_TV_DAC

A32

VCC_HDA

50mA

M25

VCCD_TVDAC

L28

VCCD_QDAC

AF1

VCCD_HPLL

AA47

VCCD_PEG_PLL

M38

VCCD_LVDS

L37

VCCD_LVDS

12

CANTIGA-GM-GP-U-NF

SC1U6D3V2KX-GP

26mA

35mA

500uA

157.2mA

3

79mA

TV

HDA

50mA

60.31mA

LVDS

A CK

105.3mA

1782mA

456mA

D TV/CRT

+1.05V_VCCP

12

DY

TC15

R117

1 2

0R0603-PAD

C230

TC15

ST220U2VBM-3GP

+1.05V_VCCP

R518

1 2

1R3F-GP

L18

1 2

IND-1UH-36-GP

+1.05V_VCCP

SCD1U10V2KX-4GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Foose Intel

220mA

1 2

L40

COIL-1UH-31-GP

+3.3V_RUN

C178

1

+1.8V_SUS

D19

K A

SDMK0340L-7-F-GP

12

14 58Friday, May 30, 2008

C169

SC4D7U6D3V5KX-3GP

-1-20080514

12

C121

C121 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1.8V_SM_CK_1

12

C636

C636 SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

VCC_TX_LVDS

12

SC22U6D3V5MX-2GP

G2

1 2

GAP-CLOSE-PWR-3-GP

G3

1 2

GAP-CLOSE-PWR-3-GP

G8

1 2

GAP-CLOSE-PWR-3-GP

12

C191

C191 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

CANTIGA-POWER/FILTER(5/6)

DY

+1.8V_SUS

+1.05V_VCCP

R181

10R3J-3-GP

VCC_HV_1

of

DY

SC

12

5

www.kythuatvitinh.com

SSID = MCH

12

C161

D D

Pins BA36, BB24, BD16, BB21,

C C

AW16, AW13, AT13 may be left NC for DDR2 boards.

+1.05V_VCCP

B B

A A

Bottomside- Inside (G)MCH Cavity

C161

SCD1U10V2KX-4GP

Close to (G)MCH

SC22U6D3V5MX-2GP

C163

12

On the edge

12

C120

C114

SC10U6D3V5KX-1GP

SCD1U10V2KX-4GP

TP11TP11 TP9TP9

SC22U6D3V5MX-2GP

C658

12

C165

SCD47U16V3ZY-3GP

VCC_AXG_SENSE

1

VSS_AXG_SENSE

1

+1.8V_SUS

U64G

AP33

VCC_SM

AN33

VCC_SM

BH32

VCC_SM

BG32

VCC_SM

BF32

VCC_SM

BD32

VCC_SM

BC32

VCC_SM

BB32

VCC_SM

BA32

VCC_SM

AY32

VCC_SM

AW32

VCC_SM

AV32

VCC_SM

AU32

VCC_SM

AT32

VCC_SM

AR32

VCC_SM

AP32

VCC_SM

AN32

VCC_SM

BH31

VCC_SM

BG31

VCC_SM

BF31

VCC_SM

BG30

VCC_SM

BH29

VCC_SM

BG29

VCC_SM

BF29

VCC_SM

BD29

VCC_SM

BC29

VCC_SM

BB29

VCC_SM

BA29

VCC_SM

AY29

VCC_SM

AW29

VCC_SM

AV29

VCC_SM

AU29

VCC_SM

AT29

VCC_SM

AR29

VCC_SM

AP29

VCC_SM

BA36

VCC_SM/NC

BB24

VCC_SM/NC

BD16

VCC_SM/NC

BB21

VCC_SM/NC

AW16

VCC_SM/NC

AW13

VCC_SM/NC

AT13

VCC_SM/NC

Y26

VCC_AXG

AE25

VCC_AXG

AB25

VCC_AXG

AA25

VCC_AXG

AE24

VCC_AXG

AC24

VCC_AXG

AA24

VCC_AXG

Y24

VCC_AXG

AE23

VCC_AXG

AC23

VCC_AXG

AB23

VCC_AXG

AA23

VCC_AXG

AJ21

VCC_AXG

AG21

VCC_AXG

AE21

VCC_AXG

AC21

VCC_AXG

AA21

VCC_AXG

Y21

VCC_AXG

AH20

VCC_AXG

AF20

VCC_AXG

AE20

VCC_AXG

AC20

VCC_AXG

AB20

VCC_AXG

AA20

VCC_AXG

T17

VCC_AXG

T16

VCC_AXG

AM15

VCC_AXG

AL15

VCC_AXG

AE15

VCC_AXG

AJ15

VCC_AXG

AH15

VCC_AXG

AG15

VCC_AXG

AF15

VCC_AXG

AB15

VCC_AXG

AA15

VCC_AXG

Y15

VCC_AXG

V15

VCC_AXG

U15

VCC_AXG

AN14

VCC_AXG

AM14

VCC_AXG

U14

VCC_AXG

T14

VCC_AXG

AJ14

VCC_AXG_SENSE

AH14

VSS_AXG_SENSE

CANTIGA-GM-GP-U-NF

5

4

POWER

VCC SMVCC GFX

VCC GFX NCTF

4

7 OF 10

VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF VCC_AXG_NCTF

VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF VCC_SM_LF

VCC SM LF

W28 V28 W26 V26 W25 V25 W24 V24 W23 V23 AM21 AL21 AK21 W21 V21 U21 AM20 AK20 W20 U20 AM19 AL19 AK19 AJ19 AH19 AG19 AF19 AE19 AB19 AA19 Y19 W19 V19 U19 AM17 AK17 AH17 AG17 AF17 AE17 AC17 AB17 Y17 W17 V17 AM16 AL16 AK16 AJ16 AH16 AG16 AF16 AE16 AC16 AB16 AA16 Y16 W16 V16 U16

AV44 BA37 AM40 AV21 AY5 AM10 BB13

+1.05V_VCCP

DY

12

C113

SCD1U10V2KX-4GP

VCCSM_LF1 VCCSM_LF2 VCCSM_LF3 VCCSM_LF4 VCCSM_LF5 VCCSM_LF6 VCCSM_LF7

SCD1U10V2KX-4GP

12

TC18

TC18 ST220U2VBM-3GP

ST220U2VBM-3GP

12

C635

SCD1U10V2KX-4GP

3

12

C115

C115 SC22U6D3V5MX-2GP

SC22U6D3V5MX-2GP

12

C110

C110 SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

Bottomside- Inside (G)MCH Cavity

12

C154

SC1U6D3V2KX-GP

12

C164

C164 SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

12

TC4

DY

ST220U2VBM-3GP

Bottomside- Inside (G)MCH Cavity

Supply Signal Group

+1.05V_VCCP

VCC_AXG +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP

+1.05V_VCCP +1.05V_VCCP

VCCA_SM_CK 26mA

VCCA_HPLL 24mA +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP

VCCD_PEG_PLL+1.05V_VCCP 50mA +1.05V_VCCP 321.35mA

VCC_AXF

VCC_HDA+1.5V_RUN 50mA +1.5V_RUN VCCD_TVDAC 35mA

VCCD_LVDS+1.8V_SUS 60.31mA +1.8V_SUS +1.8V_SUS

VCC_SM_CK +3.3V_RUN VCCA_PEG_BG 414uA +3.3V_RUN VCC_HV 105.3mA

12

C103

C605

SCD22U10V2KX-1GP

12

C134

C195

SCD22U10V2KX-1GP

SCD47U16V3ZY-3GP

3

12

C179

SC1U6D3V2KX-GP

1930mAVCC+1.05V_VCCP 8700mA 852mAVTT 1782mAVCC_PEG 456mAVCC_DMI 720mA+1.05V_VCCP VCCA_SM

139.2mAVCCA_MPLL

157.2mAVCCD_HPLL 50mAVCCA_PEG_PLL

3000mAVCC_SM 124mA

12

C210

12

C166

C166 SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

+1.05V_VCCP

Imax

12

TC5

TC5 ST220U2VBM-3GP

ST220U2VBM-3GP

2

12

C119

SCD1U10V2KX-4GP

VCC_GMCH_35

R156

12

0R0402-PAD

-1-20080514

2

1

6 OF 10

U64F

AG34

VCC

AC34

VCC

AB34

VCC

AA34

VCC

Y34

VCC

V34

VCC

U34

VCC

AM33

VCC

AK33

VCC

AJ33

VCC

AG33

VCC

AF33

VCC

AE33

VCC

AC33

VCC

AA33

VCC

Y33

VCC

W33

VCC

V33

VCC

U33

VCC

AH28

VCC

AF28

VCC

AC28

VCC

AA28

VCC

AJ26

VCC

AG26

VCC

AE26

VCC

AC26

VCC

AH25

VCC

AG25

VCC

AF25

VCC

AG24

VCC

AJ23

VCC

AH23

VCC

AF23

VCC

T32

VCC

CANTIGA-GM-GP-U-NF

Title

Size Document Number Rev

A3

Date: Sheet

Date: Sheet of

VCC CORE

POWER

Foose Intel

CANTIGA-POWER(6/6)

6 OF 10

+1.05V_VCCP

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

VCC NCTF

VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF VCC_NCTF

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

AM32 AL32 AK32 AJ32 AH32 AG32 AE32 AC32 AA32 Y32 W32 U32 AM30 AL30 AK30 AH30 AG30 AF30 AE30 AC30 AB30 AA30 Y30 W30 V30 U30 AL29 AK29 AJ29 AH29 AG29 AE29 AC29 AA29 Y29 W29 V29 AL28 AK28 AL26 AK26 AK25 AK24 AK23

15 58Friday, May 30, 2008

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M_A_A[0..14]12

D D

M_A_BS#[0..2]12

M_A_DQ[0..63]12

C C

B B

M_A_DQS#[0..7]12

M_A_DQS[0..7]12

A A

+V_DDR_MCH_REF

12

C681

SCD1U10V2KX-4GP

SC2D2U6D3V3KX-GP

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13

M_A_A14 M_A_BS#2 M_A_BS#0

M_A_BS#1

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

M_ODT011 M_ODT111

12

C685

DM1

102

A0

101

A1

100

A2

99

A3

98

A4

97

A5

94

A6

92

A7

93

A8

91

A9

105

A10/AP

90

A11

89

A12

116

A13

86

A14

84

A15

85

A16/BA2

107

BA0

106

BA1

5

DQ0

7

DQ1

17

DQ2

19

DQ3

4

DQ4

6

DQ5

14

DQ6

16

DQ7

23

DQ8

25

DQ9

35

DQ10

37

DQ11

20

DQ12

22

DQ13

36

DQ14

38

DQ15

43

DQ16

45

DQ17

55

DQ18

57

DQ19

44

DQ20

46

DQ21

56

DQ22

58

DQ23

61

DQ24

63

DQ25

73

DQ26

75

DQ27

62

DQ28

64

DQ29

74

DQ30

76

DQ31

123

DQ32

125

DQ33

135

DQ34

137

DQ35

124

DQ36

126

DQ37

134

DQ38

136

DQ39

141

DQ40

143

DQ41

151

DQ42

153

DQ43

140

DQ44

142

DQ45

152

DQ46

154

DQ47

157

DQ48

159

DQ49

173

DQ50

175

DQ51

158

DQ52

160

DQ53

174

DQ54

176

DQ55

179

DQ56

181

DQ57

189

DQ58

191

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

11

DQS0#

29

DQS1#

49

DQS2#

68

DQS3#

129

DQS4#

146

DQS5#

167

DQS6#

186

DQS7#

13

DQS0

31

DQS1

51

DQS2

70

DQS3

131

DQS4

148

DQS5

169

DQS6

188

DQS7

114

OTD0

119

OTD1

1

VREF

2

VSS

202

GND

MH1

DDR2-200P-20-GP-U1

5

4

108

RAS#

109

WE#

113

CAS#

110

CS0#

115

CS1#

79

CKE0

80

CKE1

30

CK0

32

CK0#

164

CK1

166

CK1#

10

DM0

26

DM1

52

DM2

67

DM3

130

DM4

147

DM5

170

DM6

185

DM7

195

SDA

197

SCL

199

VDDSPD

198

SA0

200

SA1

50

NC#50

69

NC#69

83

NC#83

120

NC#120

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

GND

MH2

4

163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201 MH2

NC#163/TEST

DIMM1 H=5.2mm REVERSE TYPE

M_A_DM0 M_A_DM1 M_A_DM2 M_A_DM3 M_A_DM4 M_A_DM5 M_A_DM6 M_A_DM7

M_SA0 M_SA1

+1.8V_SUS

M_A_RAS# 12

M_A_WE# 12

M_A_CAS# 12

M_CS0# 11 M_CS1# 11

M_CKE0 11 M_CKE1 11

M_CLK_DDR0 11 M_CLK_DDR#0 11

M_CLK_DDR1 11 M_CLK_DDR#1 11

R79 0R0402-PADR79 0R0402-PAD

1 2

R77 0R0402-PADR77 0R0402-PAD

1 2

-1-20080514

MEM_SMBDATA 17,23 MEM_SMBCLK 17,23

M_A_DM[0..7] 12

3

12

C66

SCD1U10V2KX-4GP

3

+3.3V_RUN

12

C64

C64 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

DY

SSID = MEMORY

+1.8V_SUS

12

C617

C613

SCD1U10V2KX-4GP

Place near DM1

+0.9V_DDR_VTT

12

C637

SCD1U10V2KX-4GP

12

C583

DY

SCD1U10V2KX-4GP

Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT

M_A_A9 M_A_A5 M_A_A8 M_CKE0 M_A_A3

M_A_A1 M_A_BS#0 M_A_A10 M_A_CAS#

M_A_WE# M_ODT1

M_CS1#

Place these resistors close to DM1 750 mils (Max)

C586

2

12

2

12

C606

SCD1U10V2KX-4GP

12

C595

SCD1U10V2KX-4GP

RN67

1 2 3 4 5

SRN56J-5-GP

RN60

1 2 3 4 5

SRN56J-5-GP

RN58

1 2 3 4 5

SRN56J-5-GP

12

C175

SC2D2U6D3V3KX-GP

12

C602

SCD1U10V2KX-4GP

+0.9V_DDR_VTT

8 7 6

1

12

SC2D2U6D3V3KX-GP

SCD1U10V2KX-4GP

DY

C633

12

DY

C712

C711

SC2D2U6D3V3KX-GP

12

16 58Friday, May 30, 2008

1

12

C622

SC2D2U6D3V3KX-GP

12

C611

SCD1U10V2KX-4GP

1 2 3 4 5

Title

Size Document Number Rev

Date: Sheet

C599

SC2D2U6D3V3KX-GP

C614

SCD1U10V2KX-4GP

RN71

SRN56J-5-GP

SRN56J-5-GP RN65

RN65

SRN56J-5-GP

SRN56J-5-GP RN62

RN62

SRN56J-5-GP

SRN56J-5-GP RN69

RN69

SRN56J-5-GP

Custom

12

8 7 6

C630

M_A_A12 M_A_BS#2

M_A_A0 M_A_A2 M_A_A4 M_A_A6

M_ODT0 M_CS0#M_A_A13 M_A_RAS# M_A_BS#1

M_A_A7 M_A_A11 M_A_A14 M_CKE1

12

C702

C655

SC10U6D3V5KX-1GP

SC2D2U6D3V3KX-GP

12

C625

C620

SCD1U10V2KX-4GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Foose Intel

DDRII-SODIMM SLOT1

SC2D2U6D3V3KX-GP

DY

12

DY

C715

SC2D2U6D3V3KX-GP

SC

of

5

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M_B_A[0..14]12

D D

M_B_BS#[0..2]12 M_B_DM[0..7] 12

M_B_DQ[0..63]12

C C

B B

M_B_DQS#[0..7]12

M_B_DQS[0..7]12

A A

+V_DDR_MCH_REF

12

C678

C678 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C673

C673 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

M_ODT211 M_ODT311

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13

M_B_A14 M_B_BS#2 M_B_BS#0

M_B_BS#1

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3M_B_DQS3 M_B_DQS4M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

MH1

102 101 100

99 98 97 94 92 93 91

105

90 89

116

86 84 85

107 106

5

7 17 19

4

6 14 16 23 25 35 37 20 22 36 38 43 45 55 57 44 46 56 58 61 63 73 75 62 64 74 76

123 125 135 137 124 126 134 136 141 143 151 153 140 142 152 154 157 159 173 175 158 160 174 176 179 181 189 191 180 182 192 194

11 29 49 68

129 146 167 186

13 31 51 70

131 148 169 188

114 119

1

2

202

5

4

DM2

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12 A13 A14 A15 A16/BA2

BA0 BA1

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8 DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

OTD0 OTD1

VREF VSS

GND MH1

DDR2-200P-21-GP-U1

62.10017.A51

4

3

108

RAS#

109

WE#

113

CAS#

110

CS0#

115

CS1#

79

CKE0

80

CKE1

30

CK0

32

CK0#

164

CK1

166

CK1#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

SDA

SCL

VDDSPD

SA0 SA1

NC#50 NC#69 NC#83

NC#120

NC#163/TEST

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

DIMM2 H=9.2mm REVERSE TYPE

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS GND MH2

10 26 52 67 130 147 170 185

195 197

199 198

200 50

69 83 120 163

81 82 87 88 95 96 103 104 111 112 117 118

3 8 9 12 15 18 21 24 27 28 33 34 39 40 41 42 47 48 53 54 59 60 65 66 71 72 77 78 121 122 127 128 132 133 138 139 144 145 149 150 155 156 161 162 165 168 171 172 177 178 183 184 187 190 193 196

201 MH2

M_B_DM0 M_B_DM1 M_B_DM2 M_B_DM3 M_B_DM4 M_B_DM5 M_B_DM6 M_B_DM7

M_SB0 M_SB1

+1.8V_SUS

M_B_RAS# 12 M_B_WE# 12 M_B_CAS# 12

M_CS2# 11 M_CS3# 11

M_CKE2 11 M_CKE3 11

M_CLK_DDR2 11 M_CLK_DDR#2 11

M_CLK_DDR3 11 M_CLK_DDR#3 11

MEM_SMBDATA 16,23

MEM_SMBCLK 16,23

R80 0R0402-PADR80 0R0402-PAD

1 2

R78 0R0402-PADR78 0R0402-PAD

1 2

-1-20080514

12

C58

SCD1U10V2KX-4GP

3

+3.3V_RUN

12

DY

C59

C59 SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SSID = MEMORY

+1.8V_SUS

12

C610

SCD1U10V2KX-4GP

Place near DM2

+0.9V_DDR_VTT

12

DY

C624

SCD1U10V2KX-4GP

2

12

C621

SCD1U10V2KX-4GP

C632

SCD1U10V2KX-4GP

Place one cap close to every 2 pullup resistors terminated to +0.9V_DDR_VTT

M_B_A10 M_B_A1 M_B_A3

M_CS2# M_B_BS#1 M_B_RAS# M_B_A0

M_ODT3 M_B_CAS#

M_B_WE#

C132

C634

SC2D2U6D3V3KX-GP

SCD1U10V2KX-4GP

12

C612

SCD1U10V2KX-4GP

Place these resistors close to DM2 750 mils (Max)

2

12

C600

SC2D2U6D3V3KX-GP

12

C615

SCD1U10V2KX-4GP

RN64

1 2 3 4 5

SRN56J-5-GP

RN63

1 2 3 4 5

SRN56J-5-GP

RN61

1 2 3 4 5

SRN56J-5-GP

1

12

C616

12

C609

SCD1U10V2KX-4GP

+0.9V_DDR_VTT

8 7 6

12

C131

SC2D2U6D3V3KX-GP

12

C601

SCD1U10V2KX-4GP

RN70

1 2 3 4 5

SRN56J-5-GP

RN66

1 2 3 4 5

SRN56J-5-GP

RN59

1 2 3

SRN56J-4-GP

RN72

1 2 3 4 5

SRN56J-5-GP

RN68

1 2 3

SRN56J-4-GP

Title

Foose Intel

Size Document Number Rev

Custom

Date: Sheet

12

C626

SC10U6D3V5KX-1GP

SC2D2U6D3V3KX-GP

12

C642

SCD1U10V2KX-4GP

M_B_A14M_B_BS#0

8

M_B_A6

7

M_B_A2

6

M_B_A4

M_B_A12

8

M_B_A9

7

M_B_A8

6

M_B_A5

M_B_A13

4

M_ODT2M_CS3#

8

M_CKE3

7

M_B_A7

6

M_B_A11

M_CKE2

4

M_B_BS#2

DDRII-SODIMM SLOT2

12

C638

C631

SCD1U10V2KX-4GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

C618

12

SC

of

17 58Friday, May 30, 2008

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SSID = VIDEO

D D

+3.3V_RUN

D54

B0530WS-7-F-GP

K A

+3.3V_RUN_SWITCH

12

C216

C216 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C162

C162 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

12

C145

C145 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

4

12

C129

C129 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

RED_CRT GREEN_CRT BLUE_CRT

3

L32

1 2

BLM18BA220SN1D-GP

L31

1 2

BLM18BA220SN1D-GP

L30

1 2

BLM18BA220SN1D-GP

12

R384

R398

150R2F-1-GP

12

R369

150R2F-1-GP

BLM18BA220SN1D-GP

2

+5V_CRT_RUN

1

2

DY

D33

BAV99-4-GP

3

12

SC2D2P50V2CC-GP

C445

2

DY

D30

BAV99-4-GP

3

12

SC2D2P50V2CC-GP

1

C432

2

DY

D29

BAV99-4-GP

3

CRT_R CRT_G CRT_B

12

C419

SC2D2P50V2CC-GP

1

Layout Note:

12

C182

C182 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DAT_DDC2_DOCK 37 CLK_DDC2_DOCK 37 VSYNC_DOCK 37 HSYNC_DOCK 37 RED_DOCK 37 GREEN_DOCK 37 BLUE_DOCK 37

Hsync & Vsync level shift

+5V_CRT_RUN

12

14

1

U53A

U53A SSAHCT125PWR-GP

HSYNC_BUF HSYNC_5

14

4

VSYNC_BUF

5 6

U53B

SSAHCT125PWR-GP

7

SSAHCT125PWR-GP

2 3

7

+5V_CRT_RUN

1

23

4

VSYNC_5

BAV99-4-GP

RN56

RN56 SRN2K2J-1-GP

SRN2K2J-1-GP

SC22P50V2JN-4GP

C395

C395 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

R405

1 2

33R2F-3-GP

R404

1 2

33R2F-3-GP

SC100P50V2JN-3GP

2

DY

D34

3

12

C461

D32

BAV99-4-GP

+5V_CRT_RUN

1

2

DY

+5V_CRT_RUN

2

DY

3

12

C436

DY

1

D35

D35 BAV99-4-GP

BAV99-4-GP

3

DAT_DDC2_CRT

CLK_DDC2_CRT

12

C477

C477 SC22P50V2JN-4GP

SC22P50V2JN-4GP

1

2

DY

3

12

DY

1

D31

D31 BAV99-4-GP

BAV99-4-GP

JVGA_HS

JVGA_VS

C435

C435 SC100P50V2JN-3GP

SC100P50V2JN-3GP

0B1 1B1 2B1 3B1 4B1 5B1 6B1 7B1 8B1 9B1

0B2 1B2 2B2 3B2 4B2 5B2 6B2 7B2 8B2 9B2

NC#52

NC#5 NC#54 NC#51

GND

12

C172

C172 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DAT_DDC2_CRT

48

CLK_DDC2_CRT

47

VSYNC_BUF

43

HSYNC_BUF

42

RED_CRT

37

GREEN_CRT

36

BLUE_CRT

32 31 22 23

46 45 41 40 35 34 30 29 25 26

52 5 54 51

57

12

C203

C C

DAT_DDC2_S13

CLK_DDC2_S13

CRT_VSYNC13 CRT_HSYNC13

VGA_RED13 VGA_GRN13 VGA_BLU13

CRT_MUX_SWITCH35

B B

C203 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

DAT_DDC2_S CLK_DDC2_S

CRT_MUX_SWITCH

SEL

0 1

CRT MB

Dock

12

C204

C204 SCD1U10V2KX-4GP

SCD1U10V2KX-4GP

U25

4

VCC

10

VCC

18

VCC

27

VCC

38

VCC

50

VCC

56

VCC

2

A0

3

A1

7

A2

8

A3

11

A4

12

A5

14

A6

15

A7

19

A8

20

A9

17

SEL

1

GND

6

GND

9

GND

13

GND

16

GND

21

GND

24

GND

28

GND

33

GND

39

GND

44

GND

49

GND

53

GND

55

GND

TS3DV520E-GP

SC-20080317

A A

5

4

3

2

*Pi-filter & 150 Ohm pull-down resistors should be as close as to CRT CONN.

* RGB signal will hit 75 Ohm first, then pi-filter, finally CRT CONN.

Change CRT CONN From

20.20736.015 to 20.20735.015

+5V_RUN

D28

B0530WS-7-F-GP

K A

+5V_CRT_RUN

SC-20080304

FUSE1

FUSE1 FUSE-3A32V-7-GP

1

FUSE-3A32V-7-GP

CRT1

1 2

NP1

11

7

2

13

9 4

15

NP2

16 6 1

12 8 3 14 10 5 17

VIDEO-15-84-GP-U1

CRT_R

DAT_DDC2_CRT

CRT_B JVGA_VS

CLK_DDC2_CRT

CRT Connector

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Foose Intel

CRT

18 58Friday, May 30, 2008

1

+5V_CRT_RUN_R

TP56TP56

CRT_G JVGA_HS

TP51TP51

Title

Size Document Number Rev

A3

Date: Sheet

SC

of