Datasheet UPD16311GC-AB6 Datasheet (NEC)

Page 1
DATA SHEET
MOS INTEGRATED CIRCUIT
PD16311
1/8- to 1/16-DUTY FIPTM (VFD) CONTROLLER/DRIVER
The
PD16311 is a FIP (Fluorescent Indicator Panel or Vacuum Fluorescent Display) controller/driver that is
driven on a 1/8- to 1/16 duty factor. It consists of 12 segment output lines, 8 grid output lines, 8 segment/grid output drive lines, a display memory, a control circuit, and a key scan circuit. Serial data is input to the PD16311 through a three-line serial interface. This FIP controller/driver is ideal as a peripheral device of a single-chip microcomputer.

FEATURES

• Many display modes (12-segment & 16-digit to 20-segment & 8-digit)
• Key scanning (12 4 matrices)
• Dimming circuit (eight steps)
• High-voltage output (VDD 35 V max).
• LED ports (5 chs., 20 mA max).
• General-purpose input port (4 bits)
• No external resistor necessary for driver outputs (P-ch open-drain + pull-down resistor output)
• Serial interface (CLK, STB, DIN, D
OUT
)

ORDERING INFORMATION

Part Number Package
PD16311GC-AB6 52-pin plastic QFP ( 14)
Document No. IC-3306 (1st edition) Date Published March 1997 P Printed in Japan
1993©
Page 2

BLOCK DIAGRAM

PD16311
DOUT
CLK
STB
V
DD
Key Key
SW1
SW
DIN
Command decoder
Serial I/F
Display memory 20 bit × 16 Word
R
OSC
Timing generator
key scan
Key data memory (4 × 12)
Dimming
circuit
20 12
20-bit output latch
8
8
8
Data selector
Seg
Seg12
Seg13/Grid16
driver
Segment/grid
Seg20/Grid9
1
Grid1
1
to
4
4
16 8
16-bit shift register
Grid driver Segment driver
Grid8
5-bit latch
to
4
4
4-bit latch
LED1 LED5
VDD
(+5 V)
SS
V
(0 V)
EE
V
(30 V)
2
Page 3

PIN CONFIGURATION (Top View)

52 OSC
51 VSS50 LED1
PD16311
49 LED2
48 LED3
47 LED4
46 LED5
45 VDD
44 Grid1
43 Grid2
42 Grid3
41 Grid4
40 Grid5
1SW1
2SW2
3SW3
4SW4
5DOUT
6DIN
7IC
8CLK
9STB
10KEY
1
11KEY2
12KEY3
13KEY4
39 Grid6
38 Grid7
37 Grid8
36 Seg20/Grid9
35 Seg19/Grid10
34 VEE
33 VDD
32 Seg18/Grid11
31 Seg17/Grid12
30 Seg16/Grid13
29 Seg15/Grid14
28 Seg14/Grid15
27 Seg13/Grid16
14VDD
15Seg1/KS1
16Seg2/KS2
17Seg3/KS3
18Seg4/KS4
Use all the power pins. Leave the IC pin open.
19Seg5/KS5
20Seg6/KS6
21Seg7/KS7
22Seg8/KS8
23Seg9/KS9
24Seg10/KS10
25Seg11/KS11
26Seg12/KS12
3
Page 4

Pin Function

Pin No. Symbol Pin Name Description
6DINData input Inputs serial data at rising edge of shift clock, starting from lower
bit.
5D
9 STB Strobe Initializes serial interface at rising or falling edge to make
8 CLK Clock input Reads serial data at rising edge, and outputs data at falling edge.
52 OSC Oscillator pin Connect resistor for determining oscillation frequency to this pin.
15 to 26 Seg1/KS1 to
44 to 37 Grid1 to Grid 27 to 32
35 to 36 50 to 46 LED1 to LED 10 to 13 Key1 to Key
1 to 4 SW1 to SW
14, 33, 45 V
51 V 34 V
7 IC Internally connected Be sure to leave this pin open (this pin is at VDD level).
OUT
12
12
/KS
Seg
Seg13/Grid16 to
20
9
/Grid
Seg
DD
SS
EE
Data output Outputs serial data at falling edge of shift clock, starting from
lower bit. This is N-ch open-drain output pin.
PD16311 waiting for reception of command. Data input after STB has fallen is processed as command. While command data is processed, current processing is stopped, and serial interface is initialized. While STB is high, CLK is ignored.
High-voltage output
Segment output pins (Dual function as key source)
(segment)
6
High-voltage output (grid) Grid output pins High-voltage output
These pins are selectable for segment or grid output.
(segment/grid)
5
LED output CMOS output. +20 mA max.
4
Key data input Data input to these pins is latched at end of display cycle.
4
Switch input These pins constitute 4-bit general-purpose input port. Logic power 5 V 10 % Logic ground Connect this pin to GND of system. Pull-down level VDD 35 V max.
PD16311
4
Page 5
PD16311

Display RAM Address and Display Mode

The display RAM stores the data transmitted from an external device to the PD16311 through the serial interface,
and is assigned addresses as follows, in units of 8 bits:
Seg
1
00 H 03 H 06 H 09 H 0 CH 0 FH 12 H 15 H 18 H 1 BH 1 EH 21 H 24 H 27 H 2 AH 2 DH
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Seg
4
00 H 03 H 06 H
09 H 0 CH 0 FH
12 H
15 H
18 H 1 BH 1 EH
21 H
24 H
27 H 2 AH 2 DH
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
Seg
8
01 H 04 H 07 H 0 AH 0 DH 10 H 13 H 16 H 19 H 1 CH 1 FH 22 H 25 H 28 H 2 BH 2 EH
Seg
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
12
01 H 04 H 07 H 0 AH
0 DH
10 H 13 H 16 H
19 H 1 CH 1 FH
22 H
25 H
28 H 2 BH 2 EH
Seg
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
U
16
02 H 05 H 08 H 0 BH 0 EH 11 H 14 H 17 H 1 AH 1 DH 20 H 23 H 26 H 29 H 2 CH 2 FH
Seg
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
20
DIG DIG DIG DIG DIG DIG DIG DIG DIG DIG DIG DIG1 DIG DIG DIG DIG
1
2
3
4
5
6
7
8
9
10
11
2
13
14
15
16
0
b
XX H
4
b3b
L
XX H
7
b
U
Lower 4 bits Higher 4 bits
Only the lower 4 bits of the addresses assigned to Seg17 through Seg20 are valid, and the higher 4 bits are
ignored.
5
Page 6
PD16311

Key Matrix and Key-Input Data Storage RAM

The key matrix is of 12 4 configuration, as shown below.
KEY
1
KEY
2
KEY
3
KEY
4
1
2
3
4
5
6
7
8
9
10
11
/KS
1
Seg
/KS
2
Seg
/KS
3
Seg
/KS
4
Seg
/KS
5
Seg
/KS
6
Seg
/KS
7
Seg
/KS
8
Seg
/KS
9
Seg
/KS
10
Seg
/KS
11
Seg
12
/KS
12
Seg
The data of each key is stored as illustrated below, and is read by a read command, starting from the least
significant bit.
KEY1…KEY4KEY1…KEY
4
Seg1/KS Seg3/KS Seg5/KS Seg7/KS Seg9/KS
Seg11/KS
1
3
5
7
9
11
Seg2/KS Seg4/KS Seg6/KS
Seg8/KS Seg10/KS Seg12/KS
2
4
6
8
10
12
Reading sequence
b0------------b3 b4------------b7
When the most significant bit of data (Seg12 b7) has been read, the least significant bit of the next data (Seg1 b0) is
read.

LED Port

Data is written to the LED port by a write command, starting from the least significant bit of the port. When a bit of this port is 0, the corresponding LED lights; when the bit is 1, the LED goes off. The data of bits 6 through 8 is ignored.
MSB
−−−b4 b3 b2 b1 b0
Don't care
LSB
LED1 LED2 LED3 LED4 LED5
On power application, all the LEDs remain dark.
6
Page 7
PD16311

SW Data

The SW data is read by a read command, starting from the least significant bit. Bits 5 through 8 of the SW data
are 0.
MSB
0 0 0 0 b3 b2 b1 b0
LSB
SW1 SW2 SW3 SW4

Command

A command sets the display mode and status of the FIP driver. The first 1 byte input to the PD16311 through the D
IN
pin after the STB pin has fallen is regarded as a command.
If STB is made high while a command/data is transmitted, serial communication is initialized, and the
command/data being transmitted is invalid (however, the command/data already transmitted remains valid).
(1) Display mode setting command
This command initializes the PD16311 and selects the number of segments and number of grids (1/8 to 1/16 duty, 12 segments to 20 segments). When this command is executed, display is forcibly turned off, and key scanning is also stopped. To resume display, a display ON command must be executed. If the same mode is selected, however, nothing is performed.
MSB
00−−b3 b2 b1 b0
Don't care
LSB
Selects display mode 0xxx 1000 1001 1010 1011 1100 1101 1110 1111
On power application, the 16-digit, 12-segment mode is selected.
: 8 digits, 20 segments : 9 digits, 19 segments : 10 digits, 18 segments : 11 digits, 17 segments : 12 digits, 16 segments : 13 digits, 15 segments : 14 digits, 14segments : 15 digits, 13 segments : 16 digits, 12 segments
7
Page 8
(2) Data setting command
This command sets data write and data read modes.
PD16311
MSB
01−−b3 b2 b1 b0
Don't care
LSB
Sets data write and read modes. 00
: Writes data to display memory.
01
: Writes data to LED port.
10
: Reads key data.
11
: Reads SW data.
Sets address increment mode (display memory). 01: Increments address after data has been written.
: Fixes address.
Sets test mode 01: Normal operation
: Test mode
On power application, the normal operation mode and address increment mode are set.
(3) Address setting command
This command sets an address of the display memory.
MSB
1 1 b5 b4 b3 b2 b1 b0
LSB
Address (00H - 2FH)
If address 30H or higher is set, the data is ignored, until a correct address is set.
On power application, the address is set to 00H.
8
Page 9
(4) Display control command
PD16311
MSB
10−−b3 b2 b1 b0
Don't care
LSB
Sets dimming quantity. 000
: Sets pulse width to 1/16.
001
: Sets pulse width to 2/16.
010
: Sets pulse width to 4/16.
011
: Sets pulse width to 10/16.
100
: Sets pulse width to 11/16.
101
: Sets pulse width to 12/16.
110
: Sets pulse width to 13/16.
111
: Sets pulse width to 14/16.
Turns on/off display. 01: Display off (key scan continues*)
: Display on
On power application, the 1/16-pulse width is set and the display is turned off.
*: On power application, key scanning is stopped.
9
Page 10

Key Scanning and Display Timing

T
DISP
= 500 s
µ
Key scan data
PD16311
SEG Output DIG1
G
1
DIG2 DIG3
DIGn
1/16
DISP
G
2
G
3
G
n
T
DISP
1 frame = T
× (n + 1)
One cycle of key scanning consists of two frames, and data of 12 4 matrices is stored in RAM.
DIG1
10
Page 11

Serial Communication Format

Reception (command/data write)
STB
PD16311
If data is contiguous
D
CLK
IN
b0 b1 b2 b6 b7
123 78
Transmission (data read)
STB
D
IN
CLK 123456 12345678
D
OUT
Because the D
b0 b1 b2 b3 b4 b5
Data reading command is set. Data reading starts.
OUT
pin is an N-ch, open-drain output pin, be sure to connect an external pull-up resistor to this pin
b6 b7
(1 k to 10 k).
*: When data is read, a wait time t
WAIT
of 1 s is necessary since the rising of the eighth clock that has set the
command, until the falling of the first clock that has read the data.
t
WAIT
*
b0 b1 b2 b3 b4 b5
11
Page 12
PD16311
ABSOLUTE MAXIMUM RATINGS (Ta = 25
C, VSS = 0 V)
PARAMETER SYMBOL RATINGS UNIT Logic Supply Voltage V Driver Supply Voltage V Logic Input Voltage V FIP Driver Output Voltage V LED Driver Output Current I FIP Driver Output Current I
Power Dissipation P Operating Ambient Temperature T Storage Temperature T
Derate at 9.6 mW/C at T
*:
a
= 25 C or higher.
DD
EE
I1
O2
O1
O2
D
opt
stg
0.5 to +7.0 V
VDD +0.5 to VDD 40 V
0.5 to V
VEE 0.5 to VDD +0.5 V
+25 mA
40 (grid)
15 (segment)
1200* mW
40 to +85
65 to +150
RECOMMENDED OPERATING CONDITIONS (Ta =
PARAMETER SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS Logic Supply Voltage V High-Level Input Voltage V Low-Level Input Voltage V Driver Supply Votlage V
DD
IH
IL
EE
4.5 5 5.5 V
DD
0.7 V 0 0.3 0V
DD
+0.5 V
20 to +70
DD
V
DD
V
DD
35 V
mA
C
C
C, VSS = 0 V)
V V
Maximum power consumption P
MAX
. = FIP driver dissipation + RL dissipation + LED driver dissipation + dynamic
power consumption
Where segment current = 3 mA, grid current = 15 mA, and LED current = 20 mA, FIP driver dissipation = number of segments 6 + number of grids/(number of grids + 1) 30 (mW) RL dissipation = (VDD VEE)2/50 (segment + 1) (mW) LED driver dissipation = number of LEDs 20 (mW) Dynamic power consumption = VDD 5 (mW)
Example Where VEE = 30 V, VDD = 5 V, and in 16-segment and 12-digit modes, FIP driver dissipation = 16 6 +12/13 35 = 128 RL dissipation = 352/50 17 = 417 LED driver dissipation = 5 20 = 100 Dynamic power consumption = 5 5 = 25
Total 670 mW
12
Page 13
PD16311
ELECTRICAL SPECIFICATIONS (Ta =
PARAMETER SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS High-Level Output Voltage V Low-Level Output Voltage V Low-Level Output Voltage V High-Level Output Current I High-Level Output Current I
Driver Leakage Current I Output Pull-Down Resistor R Input Current I High-Level Input Voltage V Low-Level Input Voltage V Hysteresis Voltage V Dynamic Current Consumption I
OH1
OL1
OL2
OH21
OH22
OLEAK
L
I
IH
IL
H
DDdyn
SWITCHING CHARACTERISTICS (Ta =
20 to +70
0.9 V
3mAV
15 mA V
50 100 150 K
0.7 V
C, VDD = 4.5 to 5.5 V, VSS = 0 V, VEE = VDD
DD
1 V LED1 LED5, I
0.4 V D
10
1
DD
0.3 V
V LED1 LED5, I
AV
AV
V
DD
V
OUT
OL2
, I
= 4 mA
O
= VDD 2 V, Seg1 to Seg
O
= VDD 2 V, Grid1 to Grid8,
13
/ Grid16 to Seg
Seg
O
= VDD 35 V, driver off
Driver output
I
= VDD or V
OH1
OL1
SS
= 1 mA = 20 mA
0.35 V CLK, DIN, STB 5 mA Under no load, display off
20 to +70
C, VDD = 4.5 to 5.5 V, VEE =
30 V)
12/
Grid
35 V)
12
9
PARAMETER SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS Oscillation Frequency t Propagation Delay Time t
Rise Time t
Fall time t Maximum Clock Frequency f Input Capacitance C
TIMING CONDITIONS (Ta =
20 to +70
PARAMETER SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS Clock Pulse Width PW Strobe Pulse Width PW Data Setup Time t Data Hold Time t Clock-Strobe Time t Wait Time t
OSC
PLZ
PZL
t
TZH1
TZH2
t
THZ
max.
I
CLK
STB
SETUP
HOLD
CLK-STB
WAIT
350 500 650 kH z R = 56 k
300 ns CLK D 100 ns CL = 15 pF, RL = 10 k
2
0.5
120
sCL = 300 pF Seg1 to Seg
s Grid1 to Grid8,
sCL = 300 pF, Segn, Grid
1 MHz Duty = 50 %
15 pF
C, VDD = 4.5 to 5.5 V)
400 ns
1 100 ns 100 ns
1
1
s
s CLK STB
s CLK CLK *
OUT
12
13
/Grid16 to
Seg
20
9
/Grid
Seg
n
*: Refer to page 11.
13
Page 14

Switching Characteristic Waveform

f
OSC
OSC
50 %
STB
PD16311
PWSTB
CLK
DIN
DOUT
Sn/Gn
PWCLK PWCLK
tSETUP tHOLD
90 %
10 %
tPZL
tTHZ tTZH
tCLK-STB
tPLZ
14
Page 15

Applications

Updating display memory by incrementing address
STB
CLK
D
IN
Command 2 Command 3 Data 1 Data n Command 4Command 1
Command 1: sets display mode Command 2: sets data Command 3: sets address Data 1 to n: transfers display data (48 bytes max.) Command 4: controls diplay
PD16311
Updating specific address
STB
CLK
D
IN
Command 1: sets data Command 2: sets address Data: display data
Command 2 Data Command 2 DataCommand 1
15
Page 16
PD16311

RECOMMENDED SOLDERING CONDITIONS

The following conditions (see table below) must be met when soldering this product. Please consult with our sales
officers in case other soldering process is used or in case soldering is done under different conditions.
PD16311GC-AB6
Soldering process Soldering conditions Symbol
Infrared ray reflow Peak package’s surface temperature: 235 C or below,
Reflow time: 30 seconds or below (210 C or higher), Number of reflow process: 2, Exposure limit*: None
VPS Peak package’s surface temperature: 215 C or below,
Reflow time: 40 seconds or below (200 C or higher), Number of reflow process: 2, Exposure limit*: None
Wave soldering Solder temperature: 260 C or below,
Flow time: 10 seconds or below, Number of flow process: 1, Exposure limit*: None
Partial heating method Terminal temperature: 300 C or below,
Flow time: 10 seconds or below, Exposure limit*: None
Exposure limit before soldering after dry-pack package is opened.
*
Storage conditions: 25 C and relative humidity at 65 % or less.
Do not apply more than a single process at once, except for “Partial heating method”.
Note
IR35-00-2
VP15-00-2
WS60-00-1
16
Page 17
52 PIN PLASTIC QFP (14 × 14)
A B
PD16311
39
40
27
26
CD
52
1
14
13
F
G
H
M
I
P
J
K
M
N
NOTE
Each lead centerline is located within 0.20 mm (0.008 inch) of its true position (T.P.) at maximum material condition.
L
detail of lead end
S
Q
ITEM MILLIMETERS INCHES
A 17.6±0.4 0.693±0.016 B 14.0±0.2 0.551
C 14.0±0.2 0.551 D 17.6±0.4 0.693±0.016
F 1.0 0.039 G 1.0 0.039
H 0.40±0.10 0.016
I 0.20 0.008
J 1.0 (T.P.) 0.039 (T.P.) K 1.8±0.2 0.071
L 0.8±0.2 0.031
M 0.15 0.006 N 0.10 0.004
P 2.6 0.102 Q 0.1±0.1 0.004±0.004 R5°±5° 5°±5° S 3.0 MAX. 0.119 MAX.
R
+0.10 –0.05
P52GC-100-AB6-4
+0.009 –0.008
+0.009 –0.008
+0.004 –0.005
+0.008 –0.009
+0.009 –0.008
+0.004 –0.003
17
Page 18
[MEMO]
PD16311
18
Page 19
[MEMO]
PD16311
19
Page 20
PD16311
FIPTM is a trademark of NEC Corporation.
No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product.
M4 96. 5
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