UP CONVERTER WITH AGC FUNCTION + QUADRATURE MODULATOR IC
FOR DIGITAL MOBILE COMMUNICATION SYSTEMS
DESCRIPTION
The µPC8129GR is a silicon monolithic integrated circuit designed as indirect quadrature modulator for digital
mobile communication systems. This modulator consists of 0.8 GHz to 1.9 GHz up-converter and 100 MHz to 400
MHz quadrature modulator which are packaged in 20 pin SSOP. The device has power save function and can
operate 2.7 to 5.5 V supply voltage, therefore, it can contribute to make RF block small, high performance and low
power consumption.
FEATURES
• High linearity up converter is incorporated; P
• Wide operating frequency range. Up converter; f
Modulator; f
• External IF filter can be applied between modulator output and up converter input terminal.
• Low phase difference due to digital phase shifter is adopted.
• Supply voltage: VCC = 2.7 to 5.5 V
• Equipped with power save function.
• 20 pin SSOP suitable for high density surface mounting.
RFout
= –5 dBm TYP./@f
RFout
= 800 MHz to 1900 MHz
LO1in
= 200 MHz to 800 MHz
MODout
f
= 100 MHz to 400 MHz, f
RFout
= 900 MHz
I/Q
= DC to 10 MHz
APPLICATIONS
• Digital cellular phones (ex. GSM etc…)
• Digital cordless phones
ORDERING INFORMATION
PART NUMBERPACKAGESUPPLYING FORM
µ
PC8129GR-E120 pin plastic SSOP
(225 mil)
To order evaluation samples, please contact your local NEC sales office. (Part number for sample order:
*
PC8129GR)
µ
Caution electro-static sensitive device
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Embossed tape 12 mm wide. QTY 2.5 kp/Reel.
Pins 1 through 10 are in pull-out direction.
Document No. P12781EJ2V0DS00 (2nd edition)
Date Published October 1999 N CP(K)
Printed in Japan
I/Q DC = 1.5 V (Vbias(I) = Vbias(Ib) = Vbias (Q) = Vbias (Qb) = 1.5 V)
I/Qin
f
= 67.7 kHz, V
I/Qin
= 500 mV
P-P
(single ended input, Ib = Qb = 0 mV
Modulation Pattern: <0000>
LO1in
f
= 500 MHz, P
LO2in
f
= 1150 MHz, P
UPCONin
f
RFout
f
MODout
= f
= 900 MHz – f
PARAMETERSYMBOLMIN.TYP.MAX.UNITTEST CONDITIONS
UP CONVERTER + QUADRATURE MODULATOR TOTAL
Total Circuit CurrentI
Total Circuit Current at Power S ave
Mode
Total Output PowerP
Local Oscillator Carrier LeakageLoL–40–26.5dBcf
Image Rejection (Side Band Leak )ImR–30–26.5dBc
AGC Gain Control RangGCR2840dBV
Power Save Rise TimeTPS(rise)2.05.0
Power Save Fall TimeTPS(fall)2.05.0
UP CONVERTER BLOCK
Circuit Current at Power Save ModeI
QUADRATURE MODULATOR BLOCK
Circuit Current at Power Save ModeI
= f
LO1in
= –10 dBm
LO2in
= –10 dBm
LO1in
/2 + f
I/Qin
I/Qin
= 250 MHz + f
CC(TOTAL)
CC(PS)TOTAL1
I
(Up con.)
(MOD)
RFout
CC(PS)
CC(PS)
I/Qin
202837mANo input signal
–8–5–2dBm
AGC
= 10 k
0.610
Ω
P-P
5.0
5.0
)
AVPS ≤ 0.5 V
µ
sVPS(Low) → VPS(High)
µ
sVPS(High) → VPS(Low)
µ
AVPS ≤ 0.5 V
µ
AVPS ≤ 0.5 V
µ
µµµµ
PC8129GR
LoL
LO2
= f
AGC
LO1
– f
/2
= 2.5 V to 0 V
Data Sheet P12781EJ2V0DS00
5
Page 6
STANDARD CHARACTERISTICS FOR REFERENCE (1)
Conditions (unless otherwise specified):
TA = +25 °C, VCC = 3 V, VPS = 3 V, RPS = 1 kΩ, V
AGC
= 3 V, R
I/Q DC = 1.5 V (Vbias(I) = Vbias(Ib) = Vbias (Q) = Vbias (Qb) = 1.5 V)
I/Qin
f
= 67.7 kHz, P
I/Qin
= 500 mV
P-P
(single ended input, Ib = Qb = 0 mV
Modulation Pattern: <0000>
LO1in
f
= 500 MHz, P
LO2in
f
= 1150 MHz, P
UPCONin
f
RFout
f
MODout
= f
= 900 MHz – f
PARAMETERSYMBOLREFERENCEUNITTEST CONDITIONS
UP CONVERTER + QUADRATURE MODULATOR TOTAL
Total Circuit Current at Power-S ave
Mode
Phase Error
UP CONVERTER BLOCK
UP Con. Circuit CurrentI
UP Con. Circuit Current at Power-Save
Mode
Conversion GainCG12dBP
Maximum Output PowerP
Output 3rd Order Intercept PointOIP
QUADRATURE MODULATOR BLOCK
MOD. Circuit CurrentI
Output PowerP
LO1 Carrier LeakageLoL–40dBcf
Image Rejection (Side Band Leak )ImR–30dBc
I/Q 3rd Order Intermodulation Dis tortionIM
I/Q Input ImpedanceZ
IQ Bias CurrentI
LO1 Input VSWRVSWR
Output Noise Floor–133dB c /Hz
= f
LO1in
= –10 dBm
LO2in
= –10 dBm
LO1in
/2 + f
I/Qin
I/Qin
= 250 MHz + f
CC(PS)TOTAL2
I
CC(PS)UpCon
I
I/Qin
∆φ
CC(UpCon)
RF(sat)
3
CC(MOD)
MODout
3I/Q
I/Q
I/Q
(Lo1)
AGC
= 10 k
Ω
P-P
)
60
AVPS ≤ 0.5 V, V
µ
1.8deg. (rms)MOD Pattern: PN9
14mANo input signal
60
AVPS ≤ 0.5 V, V
µ
–1.5dBmP
+6dBmf
14mANo input signal
–16.5dBm
–50dBc
200k
5
Ω
AI, Ib, Q, Qb to GND (each)
µ
1.2 : 1–
AGC
AGC
UPCONin
= –20 dBm
UPCONin
= –4 dBm
UPCONin
= 250.0 MHz/250.2 MHz
LoL
LO1
= f
/2
I to Ib, Q to Qb
f = ±20 MHz
∆
µµµµ
PC8129GR
= 0 V
= 0 V
6
Data Sheet P12781EJ2V0DS00
Page 7
STANDARD CHARACTERISTICS FOR REFERENCE (2)
Conditions (unless otherwise specified):
TA = +25 °C, VCC = 3 V, VPS = 3 V, RPS = 1 kΩ, V
AGC
= 3 V, R
I/Q DC = 1.5 V (Vbias(I) = Vbias(Ib) = Vbias (Q) = Vbias (Qb) = 1.5 V)
I/Qin
f
= 67.7 kHz, P
I/Qin
= 500 mV
P-P
(single ended input, Ib = Qb = 0 mV
Modulation Pattern: <0000>
LO1in
f
= 500 MHz, P
LO2in
f
= 1650 MHz, P
UPCONin
f
RFout
f
MODout
= f
= 1900 MHz + f
PARAMETERSYMBOLREFERENCEUNITTEST CONDITIONS
UP CONVERTER + QUADRATURE MODULATOR TOTAL
Total Output PowerP
Local Oscillator Carrier LeakageLoL–40dBcf
Image Rejection (Side Band Leak )ImR–30dB c
AGC Gain Control RangGCR45dBV
Phase Error
UP CONVERTER BLOCK
Conversion GainCG5dBP
Maximum Output PowerP
Output Intercept PointOIP
= f
LO1in
= –10 dBm
LO2in
= –10 dBm
LO1in
/2 + f
I/Qin
I/Qin
= 250 MHz + f
I/Qin
RFout
∆φ
RF(sat)
3
AGC
= 10 k
Ω
P-P
–12dBm
1.8deg. (rms)MOD Pattern: PN9
–7dBmP
–1dBmf
µµµµ
PC8129GR
)
LoL
LO2
= f
AGC
UPCONin
UPCONin
UPCONin
LO1
+ f
/2
= 2.5 V to 0 V
= –20 dBm
= –4 dBm
= 250.0 MHz/250.2 MHz
Data Sheet P12781EJ2V0DS00
7
Page 8
PIN EXPLANATION
µµµµ
PC8129GR
Pin
Voltage
DescriptionEquivalent Circuit
Typ. (V)
CC
@V
= 3 V
CC
–RF output from Up-Converter.
Pin No.Symbol
18RFoutV
Supply
Voltage
(V)
This pin is open collect or out put.
1UpCon in–2.2IF input for Up-converte r.
This pin is high impedance
input.
2UpCon inb–2.2Bypass of IF input .
Grounded through external
capacitor.
3MODout–1.9Output from modulator.
This is emitter follower output.
4IV
CC
/2–Input for I signal. This input
impedance is about 200 kΩ.
Relations between amplitude
CC
and V
/2 bias of input signal
are following.
CC
/2
(V)
1.5
Signal Level
(mV
≤
≤
1000
≤
V
1.35
≥
≥
1.75
≥
P-P
400
600
18
12
3
Note
)
45
5IbV
CC
/2–Input for I signal. This input
impedance is about 200 kΩ.
CC
V
/2 biased DC signal should
be input.
6QbV
CC
/2–Input for Q signal. This i nput
impedance is about 200 k
CC
/2 biased DC signal should
V
Ω
be input.
7QV
CC
/2–Input for Q signal. This i nput
impedance is about 200 kΩ.
Relations between amplitude
CC
and V
/2 bias of input signal
are following.
In the case of that I/Q input signals are single ended.
Note
VCC/2
(V)
1.35
≥
≥
1.75
≥
1.5
Signal Level
P-P
(mV
)
400
≤
600
≤
1000
≤
Note
Of course, I/Q signal inputs can be used either single endedly or differentially with proper terminations.
67
8
Data Sheet P12781EJ2V0DS00
Page 9
PIN EXPLANATION
µµµµ
PC8129GR
Pin
Voltage
Typ. (V)
CC
@V
DescriptionEquivalent Circuit
= 3 V
Pin No.Symbol
Supply
Voltage
(V)
8LO1in–0Lo1 input for phase shifter.
This input impedance is 50
matched internally.
9LO1in b–2.3Bypass of Lo1 input.
This pin is grounded through
internal capacitor.
10
11
GND for
Modulator
0–Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
12LO2in b–1. 9Bypass of Lo2 input.
Grounded through external
capacitor.
13LO2i n–1.9Lo2 input of Up-converter.
This pin is high impedance input.
14
17
GND for
Up-con.
0–Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
15V
AGC
0 to V
CC
–Input for AGC amplifier.
Total Output Power can be
controlled by changing input
voltage.
And as external series resistance
AGC
(R
) connecting, a slope of
AGC curve can be changed by
AGC
16Power
Save
0 to V
the resistance (R
CC
–Power save control pin can be
controlled ON/OFF state with
bias as follows;
Ω
8
50 Ω
9
13
12
).
16
19VCC for
Upconverter
20VCC for
Modulator
: Externally
VPS (V)STATE
2 to VCCON (Active Mode)
0 to 0.5OFF (Sleep Mode)
2.7 to 5.5–Supply voltage pin for Upconverter.
2.7 to 5.5–Supply voltage pin for modulator.
Internal regulator can be kept
stable condition of suppl y bias
against the variable
temperature or V
Data Sheet P12781EJ2V0DS00
CC
.
9
Page 10
µµµµ
STANDARD TYPICAL CHARACTERISTICS <Modulator + Up-Converter Total at 900 MHz>
PC8129GR
Test Circuit 1, TA = +25 °C, VCC = 3 V, VPS = 3 V, RPS = 1 kΩ, V
AGC
= 3 V, R
I/Q DC = 1.5 V (Vbias(I) = Vbias(Ib) = Vbias(Q) = Vbias(Qb) = 1.5 V)
I/Qin
f
= 67.7 kHz, V
Modulation Pattern: All Zero <0000>, f
LO2in
f
= 1150 MHz, P
RFout
f
= 900 MHz – f
40
30
20
- Total Circuit Current - mA
10
CC
I
0
0123456
I/Qin
= 500 mV
LO2in
I/Qin
ICC (TOTAL) vs V
No input signal
VCC - Supply Voltage - V
P-P
(single ended input, Ib = Qb = 0 mV
LO1in
= 500 MHz, P
= –10 dBm, f
UPCONin
= f
MODout
, Unless Otherwise Specified
CC
= f
LO1in
LO1in
/2 + f
= –10 dBm
I/Qin
AGC
= 10 k
Ω
P-P
)
= 250 MHz + f
I/Qin
ICC (TOTAL) vs V
PS
30
20
10
- Total Circuit Current - mA
CC
I
0
0123
TA = +25 °C
:
T
A
= +85 °C
:
T
A
= –40 °C
:
No input signal
VPS - Power Save Control Voltage - V
ICC (TOTAL) vs T
No input signal
30
20
10
- Total Circuit Current - mA
CC
I
0
–40 –200+20 +40 +60 +80
TA - Operating Ambient Temperature - °C
A
ICC (PS) TOTAL vs T
A
µ
No input signal
Vps = 0.5 V
30
20
10
- Total Circuit Current at Power Save Mode - A
CC
0
I
–40 –200+20 +40 +60 +80
TA - Operating Ambient Temperature - °C
10
Data Sheet P12781EJ2V0DS00
Page 11
µµµµ
PC8129GR
µ
ICC (PS) TOTAL2 vs T
150
A
No input signal
Vps = 0.5 V
125
V
AGC
= 0 V
100
75
50
25
- Total Circuit Current at Power Save Mode - A
CC
I
0
–200+20 +40 +60 +80
–40
TA - Operating Ambient Temperature - °C
I
CC
µ
(PS) TOTAL2 vs V
150
CC
No input signal
Vps = 0.5 V
125
V
AGC
= 0 V
ICC (PS) TOTAL1 vs V
CC
µ
No input signal
Vps = 0.5 V
2
1
- Total Circuit Current at Power Save Mode - A
CC
I
0
0246
VCC - Supply Voltage - V
100
75
50
25
- Total Circuit Current at Power Save Mode - A
CC
I
0
0246
VCC - Supply Voltage - V
P
RFout
, LoL, ImR, IM
0
3I/Q
P
vs V
RFout
CC
–20
ImR
–10
–20
- Total Output Power - dBm
RFout
P
–30
LoL
IM
3I/Q
–30
–40
–50
P
RFout
, LoL, ImR, IM
0
P
–10
–20
- Total Output Power - dBm
RFout
P
LoL
RFout
ImR
IM
3I/Q
3I/Q
vs T
A
–20
–30
–40
0123456
VCC - Supply Voltage - V
Data Sheet P12781EJ2V0DS00
- I/Q 3rd Order Intermodulation Distortion - dBc
3I/Q
LoL - Local Oscillator Carrier Leakage - dBc
ImR - Image Rejection - dBc
IM
–40 –200+20 +40 +60 +80
TA - Operating Ambient Temperature - °C
–50
- I/Q 3rd Order Intermodulation Distortion - dBc
3I/Q
LoL - Local Oscillator Carrier Leakage - dBc
ImR - Image Rejection - dBc
IM
11
Page 12
P
RFout
, LoL, ImR, IM
3I/Q
vs V
I/Qin
P
RFout
, LoL, ImR, IM
3I/Q
vs P
µµµµ
PC8129GR
LO1in
0
–10
–20
LoL
ImR
P
RFout
–30
- Total Output Power - dBm
RFout
–40
P
IM
3I/Q
10050010002000
V
I/Qin
- I/Q Input Amplitude - mVp-p
P
RFout
0
–10
vs P
LO2in
–20
–30
–20
–30
–40
–50
–60
LoL - Local Oscillator Carrier Leakage - dBc
ImR - Image Rejection - dBc
–70
–40
- I/Q 3rd Order Intermodulation Distortion - dBc
- I/Q 3rd Order Intermodulation Distortion - dBc
–50
3I/O
3I/O
LoL - Local Oscillator Carrier Leakage - dBc
ImR - Image Rejection - dBc
IM
IM
–30–20–100+10
7
MOD Pattern: PN9
6
5
4
RFout
P
P
LO1in
- LO1 Input Level - dBm
vs V
∆Φ
ImR
I/Qin
IM
3I/Q
LoL
0
–10
–20
- Total Output Power - dBm
RFout
P
–30
–20
- Total Output Power - dBm
–30
RFout
P
–40
–40–20–100–30
P
LO2in
- LO2 Input Level - dBm
P
RFout
+10
0
–10
–20
–30
T
A
–40
- Total Output Power - dBm
–50
RFout
P
–60
= +85 °C
+25 °C
–40 °C
vs V
AGC
3
2
∆Φ
- Phase Error - deg. (rms.)
1
0
1005001000
V
I/Qin
- I/Q Input Amplitude - mV
P
RFout
0
–10
–20
–30
–40
- Total Output Power - dBm
RFout
P
–50
= 2.7 V
CC
V
= 3 V
CC
V
GCR
= 40.5 dB
(V
CC
= 2.7 V)
vs V
GCR
= 40.8 dB
CC
= 3 V)
(V
AGC
P-P
= 5.5 V
CC
V
GCR
= 41.7 dB
(V
CC
= 5.5 V)
–70
12
0231
V
AGC
- AGC Control Voltage - V
–60
0231456
Data Sheet P12781EJ2V0DS00
V
AGC
- AGC Control Voltage - V
Page 13
+10
–10
µµµµ
PC8129GR
P
RFout
vs V
AGC
µ
PC8129GR
REF 0.0 dBm
10 dB/
POWER SAVE RESPONSE
ATT 10dB
0
–20
–30
–40
- Total Output Power - dBm
RFout
P
–50
–60
0
= 80 kΩ, SLOPE = 53 dB/V
AGC
R
123
V
AGC
- AGC Control Voltage - V
GCR =
39.8 dB
= 10 kΩ, SLOPE = 143 dB/V
AGC
R
RBW
3 MHz
VBW
3 MHz
SWP
µ
50 s
CENTER 900.0677 MHzSPAN 0 Hz
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUMTYPICAL GMSK MODULATION OUTPUT SPECTRUM
µ
PC8129GR
REF 0.0 dBm
10 dB/
ATT 10 dB
1
µ
PC8129GR
REF –10.0 dBm
10 dB/
ATT 0 dB
A write B view
MARKER
899.200 MHz
–77.25 dB
3
4
ADJ BS
135 kHz
2
DL –10.0 dBm
1
34
2
56
RBW 3 kHz
VBW 10 kHz
SWP 1.0 s
CENTER 900.0000 MHzSPAN 500 KHz
Multi Marker List
No.1:
No.2:
No.3:
No.4:
***
899.9323 MHz
900.0000 MHz
900.0677 MHz
900.2031 MHz
***
–4.80 dBm
–48.02 dBc
–29.88 dBc
–42.41 dBc
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM
3
f
LO1in
2
(= 3fIF)
ATT 10 dB
f
LO2in
2 f
LO1in
(= 4fIF)
5
f
LO1in
2
(=
IF
)
5f
MARKER
900 MHz
–4.67 dBm
µ
PC8129GR
REF 0.0 dBm
10 dB/
RBW 300 kHz
VBW 300 kHz
SWP 5.0 s
1
f
LO1in
2
(= fIF)
f
LO1in
(= 2fIF)
START 0 HzSTOP 2.460 GHz
RBW 3 kHz
VBW 10 kHz
SWP 5.0 s
CENTER 900. 000 MHzSPAN 2.000 MHz
No.1:
No.2:
No.3:
No.4:
No.5:
No.6:
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM
∆:
Multi Marker List
***
899.200 MHz
899.400 MHz
899.600 MHz
900.400 MHz
900.600 MHz
900.800 MHz
***
–77.25 dB
–76.50 dB
–68.00 dB
–68.25 dB
–77.50 dB
–77.50 dB
(IN BAND)
µ
PC8129GR
REF 0.0 dBm
10 dB/
MKR 900 MHz
RBW 300 kHz
VBW 300 kHz
SWP 5.0 s
750 MHz
–43.6 dBm
800 MHz
–49.5 dBm
CENTER 900.0 MHzSPAN 400.0 MHz
ATT 10 dB
850 MHz
–56.6 dBm
950 MHz
–68.2 dBm
1000 MHz
–53.0 dBm
MARKER
900 MHz
–4.68 dBm
1050 MHz
–59.4 dBm
Data Sheet P12781EJ2V0DS00
13
Page 14
µµµµ
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM
(IN BAND)
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM
(IN BAND)
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM
(IN BAND)
ATT 10 dB
RBW 300 kHz
VBW 300 kHz
SWP 5.0 s
CENTER 920.0 MHzSPAN 200.0 MHz
PC8129GR
REF 0.0 dBm
10 dB/
µ
MARKER
880.0 MHz
–4.64 dBm
870 MHz
–55.7 dBm
890 MHz
–63.0 dBm
1000 MHz
–54.8 dBm
1010 MHz
–57.6 dBm
f
LO1in
= 500 MHz
(f
MODout
= 250 MHz
+ f
I/Q
)
f
LO2
= 1130 MHz
f
RFout
= 880 MHz
ATT 10 dB
RBW 300 kHz
VBW 300 kHz
SWP 5.0 s
CENTER 920.0 MHzSPAN 200.0 MHz
PC8129GR
REF 0.0 dBm
10 dB/
µ
MARKER
900 MHz
–4.66 dBm
850 MHz
–56.2 dBm
950 MHz
–65.5 dBm
1000 MHz
–53.0 dBm
MKR 900 MHz
ATT 10 dB
RBW 300 kHz
VBW 300 kHz
SWP 5.0 s
CENTER 920.0 MHzSPAN 200.0 MHz
PC8129GR
REF 0.0 dBm
10 dB/
µ
MARKER
900 MHz
–7.41 dBm
f
LO1in
= 500 MHz
(f
MODout
= 250 MHz
+ f
I/Qin
)
f
LO2in
= 1210 MHz
f
RFout
= 960 MHz
– f
I/Qin
MKR 900 MHz
880 MHz
–59.9 dBm
920 MHz
–51.5 dBm
1000 MHz
–49.9 dBm
PC8129GR
14
Data Sheet P12781EJ2V0DS00
Page 15
µµµµ
PC8129GR
STANDARD TYPICAL CHARACTERISTICS <Modulator + Up-Converter Total at 1900 MHz>
Test Circuit 2, TA = +25 °C, VCC = 3 V, VPS = 3 V, RPS = 1 kΩ, V
AGC
= 3 V, R
I/Q DC = 1.5 V (Vbias(I) = Vbias(Ib) = Vbias(Q) = Vbias(Qb) = 1.5 V)
I/Qin
f
= 67.7 kHz, V
Modulation Pattern: All Zero <0000>, f
LO2in
f
= 500 MHz, P
RFout
f
= 1900 MHz + f
0
–10
–20
–30
–40
–50
- Total Output Power - dBm
RFout
P
–60
–70
0
I/Qin
= 500 mV
LO2in
= –10 dBm, f
I/Qin
, Unless Otherwise Specified
P
RFout
P-P
(single ended input, Ib = Qb = 0 mV
LO1in
= 500 MHz, P
vs V
UPCONin
AGC
= f
MODout
GCR =
= 80 kΩ, SLOPE = 59 dB/V
AGC
R
AGC
R
= 10 kΩ, SLOPE = 154 dB/V
45.4 dB
123
V
AGC
- AGC Control Voltage - V
= f
LO1in
LO1in
= –10 dBm
I/Qin
/2 + f
AGC
= 10 k
Ω
P-P
)
= 250 MHz + f
I/Qin
P
RFout
0
–10
–20
–30
- Total Output Power - dBm
–40
RFout
P
10050010002000
V
I/Qin
- I/Q Input Amplitude - mV
vs V
I/Qin
P-P
P
RFout
vs P
LO1in
0
–10
–20
- Total Output Power - dBm
RFout
P
–30
–30–20–100+10
P
LO1in
- LO1 Input Level - dBm
P
RFout
0
–10
–20
- Total Output Power - dBm
RFout
P
–30
–40–30–100+10–20
P
LO2in
- LO2 Input Level - dBm
vs P
LO2in
Data Sheet P12781EJ2V0DS00
15
Page 16
µµµµ
PC8129GR
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM
µ
PC8129GR
REF 0.0 dBm
10 dB/
ATT 10 dB
1
7
MOD Pattern: PN9
6
Φ vs V
∆
I/Qin
5
3
4
4
2
3
2
Φ - Phase Error - deg. (rms)∆
1
0
100
V
I/Qin
- I/Q Input Amplitude - mVp-p
5001000 2000
RBW 3 kHz
VBW 10 kHz
SWP 1.0 s
CENTER 1.9000000 GHzSPAN 500 kHz
Multi Marker List
No.1:
No.2:
No.3:
No.4:
***
1.9000677 GHz
1.9000000 GHz
1.8999323 GHz
1.8997969 GHz
***
–12.13 dBm
–39.30 dBc
–28.98 dBc
–41.30 dBc
TYPICAL GMSK MODULATION OUTPUT SPECTRUMTYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM
3
f
2
(= 3fIF)
LO1in
ATT 10 dB
2 f
LO1in
(= 4fIF)
5
f
2
(= 5fIF)
LO2in
f
LO1in
7
3 f
LO1in
f
LO1in
2
(= 6fIF)
(= 7fIF)
µ
PC8129GR
REF –10.0 dBm
10 dB/
MKR
1.899200 GHz
DL –10.0 dBm
ATT 0 dB
A write B view
MARKER
1. 899200 GHz
–74. 75 dB
µ
PC8129GR
REF 0.0 dBm
10 dB/
MKR 1.900 GHz
1
fLO1in
2
(= fIF)
fLO1in
(= 2fIF)
3
2
1
546
MARKER
1.900 GHz
–11. 67 dBm
4 f
LO1in
(= 8fIF)
RBW 3 kHz
VBW 10 kHz
SWP 5.0 s
CENTER 1.900000 GHzSPAN 2. 000 MHz
No.1:
No.2:
No.3:
No.4:
No.5:
No.6:
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM
∆:
Multi Marker List
***
1.899200 GHz
1.899400 GHz
1.899600 GHz
1.900400 GHz
1.900600 GHz
1.900800 GHz
***
–74.75 dB
–74.50 dB
–64.75 dB
–66.50 dB
–74.25 dB
–74.75 dB
STANDARD TYPICAL CHARACTERISTICS <Up-Converter Block>
µµµµ
PC8129GR
TA = +25 °C, VCC = 3.0 V, VPS = 3.0 V, f
Test Circuit 1 (f
Test Circuit 2 (f
RFout
RFout
f
UpConin
LO2in
f
0
RFout
f
= 900 MHz, f
= 1900 MHz, f
P
RFout
= 250.0/250.2 MHz
= 1.15 GHz
= 899.8/900.0 MHz
–10
–20
P
RFout
–30
–40
–50
- Output Power - dBm
RFout
–60
P
–70
- 3rd Order Intermoduration Distortion - dBm
3
IM
–50
–40–30–20–100
P
UPCONin
- Up-Converter Input Level - dBm
LO2in
, IM3, vs P
IM
CG vs P
= 1150 MHz) or
LO2in
UpConin
3
LO2in
UPCONin
= 250 MHz, P
UPCONin
= –20 dBm
= 1650 MHz), Unless Otherwise Specified
f
OIP
3
= +5.8 dBm
- Output Power - dBm
RFout
P
UpConin
LO2in
= 1.65 GHz
f
0
RFout
= 1.9000/1.9002 GHz
f
–10
–20
–30
–40
–50
–60
–70
- 3rd Order Intermoduration Distortion - dBm
3
–80
IM
–50
P
UPCONin
P
RFout
, IM3, vs P
= 250.0/250.2 MHz
RFout
P
IM
UpConin
3
OIP
= –1.3 dBm
–40–30–20–100
- Up-Converter Input Level - dBm
3
15
10
5
f
RFout
LO2in
f
CG - Conversion Gain - dB
0
–40–30–20–100
P
LO2in
- LO2 Input Level - dBm
f
RFout
= 900 MHz
LO2in
= 1.15 GHz
f
= 1.9 GHz
= 1.65 GHz
18
Data Sheet P12781EJ2V0DS00
Page 19
STANDARD TYPICAL CHARACTERISTICS <Modulator Block>
Test Circuit 1 or 2, TA = +25 °C, VCC = 3 V, VPS = 3 V
I/Q DC = 1.5 V (Vbias(I) = Vbias(Ib) = Vbias(Q) = Vbias(Qb) = 1.5 V)
I/Qin
f
= 67.7 kHz, V
Modulation Pattern: All Zero <0000>, f
MODout
f
+10
= f
LO1in
/2 + f
I/Qin
= 500 mV
I/Qin
= 250 MHz + f
P
MODout
P-P
(single ended input, Ib = Qb = 0 mV
vs V
LO1in
= 500 MHz, P
I/Qin
, Unless Otherwise Specified
I/Qin
LO1in
P-P
= –10 dBm
+10
)
P
MODout
vs P
µµµµ
PC8129GR
LO1in
0
–10
–20
–30
- Moduration Output Power - dBm
–40
MODout
P
–50
10020050020001000
V
I/Qin
- I/Q Input Amplitude - mV
P
MODout
, LoL, ImR, IM
0
–10
–20
P
RFout
LoL
3I/Q
vs f
LO1in
P-P
–20
–30
0
–10
–20
–30
- Moduration Output Power - dBm
–40
MODout
P
–50
–40
–30–20–100
P
LO1in
- LO1 Input Level - dBm
vs V
∆Φ
I/Qin
3
MOD Pattern: PN9
2
–30
ImR
–40
- Moduration Output Power - dBm
–50
MODout
P
IM
3I/Q
1002005002000
f
LO1in
- LO1 Input Frequency - MHz
–40
–50
–60
1000200
–70
Data Sheet P12781EJ2V0DS00
- I/Q 3rd Order Intermodulation Distortion - dBc
3I/Q
LoL - Local Oscillator Carrier Leakage - dBc
ImR - Image Rejection - dBc
IM
- Phase Error - deg. (rms.)∆Φ
1
1005001000 2000
V
I/Qin
- I/Q Input Amplitude - mV
P-P
19
Page 20
7
MOD Pattern: PN9
6
5
∆
Φ vs f
LO1in
µµµµ
PC8129GR
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM
PC8129GR
µ
REF 0.0 dBm
10 dB/
ATT 10 dB
1
4
3
2
∆
Φ - Phase Error - deg. (rms.)
1
0
100
200500
f
LO1in
- LO1 Input Frequency - MHz
1000 2000
RBW 3 kHz
VBW 10 kHz
SWP 1.0 s
3
2
4
CENTER 250.0000 MHzSPAN 500 kMHz
No.1:
No.2:
No.3:
No.4:
Multi Marker List
***
250.0677 MHz
250.0000 MHz
249.9323 MHz
249.7969 MHz
***
–16.37 dBm
–39.49 dBc
–31.07 dBc
–58.80 dBc
20
Data Sheet P12781EJ2V0DS00
Page 21
µµµµ
PC8129GR
LO1 INPUT (Pin8) IMPEDANCE
V
CC
= VPS = 3 V
CH1 S11 1 U FS 2: 47.998 Ω 0.8066 Ω 256.76 pH
MARKER 2
500 MHz
2
3
1
START 100.000 000 MHzSTOP 1 000.000 000 MHz
500.000 000 MHz
MARKER
1:
200 MHz
2:
500 MHz
3:
800 MHz
Up-Con. INPUT (Pin1) IMPEDANCE
V
CC
= VPS = 3 V
11 1 U FS 2: 101.78 Ω –387.03 Ω 1.6449 pF
CH1 S
MARKER 2
250 MHz
250. 000 000 MHz
MOD OUTPUT (Pin3) IMPEDANCE
VCC = VPS = 3 V
22 1 U FS 2: 31.195 Ω 14.908 Ω 9.4909 nH
CH1 S
MARKER 2
250 MHz
2
3
1
START 50.000 000 MHzSTOP 500.000 000 MHz
250.000 000 MHz
MARKER
1:
2:
3:
100 MHz
250 MHz
400 MHz
LO2 INPUT (Pin13) IMPEDANCE
VCC = VPS = 3 V
CH1 S
11 1 U FS 1: 22.379 Ω –93.543 Ω 1.8905 pF
MARKER 1
900 MHz
900.000 000 MHz
2
1
3
MARKER
1:
100 MHz
2:
250 MHz
3:
400 MHz
START 50.000 000 MHzSTOP 500.000 000 MHz
RF OUTPUT (Pin18) IMPEDANCE
V
CC
= VPS = 3 V
CH1 S
22 1 U FS 1: 18.953 Ω –158.83 Ω 1.1134 pF
MARKER 1
900 MHz
START 800.000 000 MHzSTOP 2 000.000 000 MHz
900.000 000 MHz
Connect to inductor
(L
between pin18 and
pin19
1
2
3
2
= 100 nH)
MARKER
1:
2:
3:
900 MHz
1150 MHz
1900 MHz
3
START 800.000 000 MHzSTOP 2 000.000 000 MHz
1
2
MARKER
1:
900 MHz
2:
1150 MHz
3:
1900 MHz
Data Sheet P12781EJ2V0DS00
21
Page 22
µµµµ
PC8129GR
TEST CIRCUIT 1 (In the case of f
100 pF
1000 pF
1000 pF
(Open)
I(DC), V
Ib(DC)
Qb(DC)
Q(DC), V
LO1in
Notes 1.
100 pF
Iin
10 nF
10 nF
Qin
100 pF
50 Ω matching circuit at f
In the case of using NEC’s evaluation board.
50 Ω matching circuit at f
2.
In the case of using NEC’s evaluation board.
RFout
= 900 MHz Band)
1
Up-Con. in
2
Up-Con. inb
3
MODout
4
I
5
Ib
6
Qb
7
Q
8
LO1in
9
LO1inb
10
GND
LO2in
= 1150 MHz.
RFout
= 900 MHz.
VCC(MOD.)
V
CC
(UP-CON.)
RFout
GND
V
V
AGC
GND
LO2in
LO2inb
GND
V
CC
84 nH
10 nF
10 nF
V
f
RFout
CC
20
19
1000 pF
1000 pF
ZL = 50 Ω
18
15 nH
6 pF
17
RPS = 1 kΩ
PS
16
R
AGC
= 10 kΩ
15
14
Note 1
ZL = 50 Ω
Note 2
10 nF
100 pF
10 nF
Vps
V
AGC
LO2in
13
6.8 nH
4 pF
100 pF
12
100 pF
11
22
Data Sheet P12781EJ2V0DS00
Page 23
µµµµ
PC8129GR
TEST CIRCUIT 2 (In the case of f
100 pF
1000 pF
1000 pF
(Open)
10
I(DC), V
Ib(DC)
Qb(DC)
Q(DC), V
LO1in
Notes 1.
100 pF
Iin
10 nF
10 nF
Qin
100 pF
50 Ω matching circuit at f
In the case of using NEC’s evaluation board.
50 Ω matching circuit at f
2.
In the case of using NEC’s evaluation board.
RFout
= 1900 MHz Band)
1
Up-Con. in
2
Up-Con. inb
3
MODout
4
I
5
Ib
6
Qb
7
Q
8
LO1in
9
LO1inb
GND
LO2in
= 1650 MHz.
RFout
= 1900 MHz.
VCC(MOD.)
CC
(UP-CON.)
V
RFout
GND
V
V
AGC
GND
LO2in
LO2inb
GND
V
CC
68 nH
Note 2
10 nF
10 nF
100 pF
10 nF
10 nF
100 pF
V
CC
f
RFout
Vps
V
AGC
LO2in
20
19
18
17
16
PS
15
14
13
12
11
1000 pF
1000 pF
ZL = 50 Ω
3 pF
RPS = 1 kΩ
R
ZL = 50 Ω
2 pF
100 pF
AGC
= 10 kΩ
Note 1
Data Sheet P12781EJ2V0DS00
23
Page 24
EXAMPLE OF TEST CIRCUIT 1 ASSEMBLED ON EVALUATION BOARD
)
I/Qin
= 250 MHz + f
MODout
(f
= 900 MHz
= 1150 MHz
LO2in
RFout
f
f
= 500 MHz
LO1in
f
C = 10 nF
µµµµ
PC8129GR
AGC
V
PS
V
CC
V
C = 10 nFC = 10 nFC = 10 nF
C = 100 pF
C = 4 pF
AGC
R
= 10 kΩ
= 1 kΩ
PS
R
C = 100 pF
C = 6 pF
L =
84 nH
L = 6.8 nH
L = 15 nH
C = 1000 pF
C = 100 pF
C = 1000 pF
C = 1000 pF
C = 100 pF
C = 100 pF
C = 100 pF
C = 10 nFC = 10 nF
C = 10 nF
IbQb
Notes 1.
Double-sided patterning with 35
GND pattern on backside.
2.
Solder coating over patterns.
3.
4. ,
indicate through-holes.
m thick copper on 50 × 50 × 0.4 mm polyimide board.
µ
NOTICE The test circuits and board pattern on data sheet are for performance evaluation use only. In the
case of actual design-in, matching circuit should be determined using S-parameter of desired
frequency in accordance to actual mounting pattern.
24
Data Sheet P12781EJ2V0DS00
Page 25
EXAMPLE OF TEST CIRCUIT 2 ASSEMBLED ON EVALUATION BOARD
)
I/Qin
I/Qin
= 250 MHz + f
MODout
(f
= 1.9 GHz + f
= 1.65 GHz
LO2in
RFout
f
f
= 500 MHz
LO1in
f
µµµµ
PC8129GR
C = 10 nF
AGC
V
PS
V
CC
V
C = 10 nFC = 10 nFC = 10 nF
C = 100 pF
AGC
R
= 1 kΩ
PS
R
C = 3 pF
C = 100 pF
C = 2 pF
= 10 kΩ
L = 68 nH
C =
1000 pF
C = 100 pF
C = 1000 pF
C = 100 pF
C = 100 pF
C = 100 pF
C = 1000 pFC = 1000 pF
C = 10 nF
IbQb
Notes 1.
Double-sided patterning with 35
GND pattern on backside.
2.
Solder coating over patterns.
3.
4. ,
indicate through-holes.
m thick copper on polyimide board.
µ
NOTICE The test circuits and board pattern on data sheet are for performance evaluation use only. In the
case of actual design-in, matching circuit should be determined using S-parameter of desired
frequency in accordance to actual mounting pattern.
Data Sheet P12781EJ2V0DS00
25
Page 26
PACKAGE DIMENSIONS
20 PIN PLASTIC SSOP (225 mil) (UNIT: mm)
µµµµ
PC8129GR
20
110
6.7 ± 0.3
1.8 MAX.
1.5 ± 0.1
11
detail of lead end
3˚
6.4 ± 0.2
4.4 ± 0.1
+7˚
–3˚
1.0 ± 0.2
NOTE
0.5 ± 0.2
0.15
+0.10
–0.05
0.1 ± 0.1
0.65
0.22
+0.10
–0.05
0.10
0.15
M
0.575 MAX.
Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition.
26
Data Sheet P12781EJ2V0DS00
Page 27
µµµµ
PC8129GR
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electrostatic sensitive devices.
(2) Form a ground pattern as widely as possible to minimize ground impedance (to prevent undesired oscillation).
(3) Keep the track length of the ground pins as short as possible.
(4) Connect a bypass capacitor (e.x. 1000 pF) to the VCC pin.
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered in the following recommended conditions. Other soldering method and
conditions than the recommended conditions are to be consulted with sales representatives.
PC8129GR
µµµµ
Soldering processSoldering conditionsSymbol
Infrared ray reflowPeak package’s surface temperat ure: 235 °C or below,
Reflow time: 30 seconds or bel ow (210 °C or higher)
Number of reflow process: 2, Exposure limit
VPSPeak package’s surface temperature: 215 °C or below,
Reflow time: 40 seconds or bel ow (200 °C or higher)
Number of reflow process: 2, Exposure limit
Wave solderingSolder temperature: 260 °C or below,
Flow time: 10 seconds or below,
Number of flow process: 1, Exposure limit
Partial heating methodTerminal temperature: 300 °C or bel ow,
Flow time: 3 seconds/pi n or bel ow,
Exposure limit
Exposure limit before soldering after dry-pack package is opened.
Note
Note
: None
Note
Note
Note
: None
: None
: None
Storage conditions: 25 °C and relative humidity at 65 % or less.
Caution Apply only a single process at once, except for “Partial heating method”.
For details of recommended soldering conditions for surface mounting, refer to information
document SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
IR35-00-2
VP15-00-2
WS60-00-1
Data Sheet P12781EJ2V0DS00
27
Page 28
µµµµ
PC8129GR
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8
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