DATA SHEET
DATA SHEET
BIPOLAR ANALOG INTEGRATED CI RCUIT
PC8110GR
µµµµ
1 GHz DIRECT QUADRATURE MODULATOR
FOR DIGITAL MOBILE COMMUNICATION
DESCRIPTION
The
PC8110GR is a sillicon monolithic integrated circuit designed as 1 GHz direct quadrature modulator for
µ
digital mobile communication systems. This modulator housed in a 20 pin plastic SSOP that easy to install and
contributes to miniaturizing the system.
The device has power save function and can operates 2.7 to 3.6 V supply voltage to realize low power
consumption.
FEATURES
• Direct modulation range : 800 MHz to 1 GHz
• Supply voltage range : VCC = 2.7 to 3.6 V
• Low operation current : ICC = 24 mA typical @ VCC = 3 V
• Low phase difference due to digital phase shifter is adopted.
• 20 pin SSOP suitable for high density surface mounting.
• Low current sleep mode
APPLICATION
• Digital cellular phone (PDC, IS-54/IS-136, GSM etc..)
ORDERING INFORMATION
PART NUMBER PACKAGE PACKING FORM
µ
PC8110GR-E1 20 pin plastic SSOP Carrier tape width 12 mm. Q’ty 2.5 kp/Reel Pin 1 indicated pull -out
direction of tape.
Remark
For evaluation sample order, please contact your local NEC sales office. (Order number:
Caution electro-static sensitive device
PC8110GR)
µ
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. P11074EJ3V0DS00 (3rd edition)
Date Published October 1999 N CP(K)
Printed in Japan
The mark shows major revised points.
©
1996, 1999
INTERNAL BLOCK DIAGRAM AND PIN CONNECTIONS
(Top View)
µµµµ
PC8110GR
SERIES PRODUCTS
SERIES TYPE
10
1
20
90˚
2
3
4
5
6
7
8
9
Phase
Sitter
REG.
19
18
17
16
15
14
13
12
LO
1.
GND
2.
LO
3.
GND
4.
Q-INPUT
5.
Q-INPUT
6.
I-INPUT
7.
I-INPUT
8.
GND
9.
GND
10.
RF
11.
GND
12.
GND
13.
CC
V
14.
GND
15.
GND
16.
Power Save (V
17.
GND
18.
CC
V
19.
GND
20.
in
in
out
PS)
11
PART
NUMBER
f LO1
(MHz)
in
f MOD
(MHz)
out
f I/Q
(MHz)
Up-Converter
out
f RF
(MHz)
APPLICATION
150 MHz Quadrature
MOD
PC8101GR 100 t o 300 50 to 150 DC to
µ
0.5
External CT2, Digital Comm.
Up-Con+Quadrature MODµPC8104GR 100 to 400 DC to 10 900 to 1900 PHS, PDC etc..
400 MHz Quadrature
MOD
1 GHz direct Quad MOD
Remark
As for detail information of series products, please refer to each data sheet.
PC8105GR 100 to 400 DC to 10 External PDC, IS-136, GSM,
µ
PHS
PC8110GR 800 to 1000 DC to 10 Direct PDC, IS-136, GSM etc .
µ
2
Data Sheet P11074EJ3V0DS00
APPLICATION EXAMPLE
PDC 900 MHz (Direct Modulation Type)
µµµµ
PC8110GR
ANT
RX
SW
TX
PA
ABSOLUTE MAXIMUM RATINGS
PARAMETER SYMBOL RATING UNIT TEST CONDITIONS
Supply Voltage V
Power Save Voltage V
Power Dissipation P
Operating Temperature T
Storage Temperature T
DEMO
I
Q
RSSI OUT
RSSI
PLL
I
Q
BPF
0˚
F/F
90˚
900 MHz Direct Quadrature Modulator
PC8110GR
µ
CC
PS
D
opt
stg
4.0 V TA = +25 °C
4.0 V TA = +25 °C
430 mW
40 to +85 °C
−
55 to +150 °C
−
T
A
= +85 °C
Note 1
Note 1.
Mounted on 50 × 50 × 1.6 mm double copper clad epoxy glass board
RECOMMENDED OPERATING CONDITIONS
PARAMETER SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS
Supply Voltage V
Operating Temperature T
LO Input Frequency fL
LO Input Power Level PL
I/Q Input Frequency f
I/Q Input Voltage V
CC
opt
Oin
Oin
I/Qin
I/Qin
2.7 3.0 3.6 V
40 +25 +85 °C
−
800 900 1000 MHz
15
−
10
−
7dBm
−
DC 10 MHz
500 mV
250 Differenti al i nput
Data Sheet P11074EJ3V0DS00
p-p
Single ended input
3
µµµµ
PC8110GR
ELECTRICAL CHARACTERISTICS (TA = 25 °C, VCC = 3.0 V, Unless Otherwise Specified VPS
PARAMETER SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS
Circuit Current I
Circuit Current at Power Save Mode I
Maximum Output Power P
LO Carrier Leak LoL
Image Rejection (Side Band Leak ) ImR
I/Q 3rd Order Intermodulation
Distortion
Power Save Rise Time T
Power Save Fall Time T
CC
CC(PS)
o(sat)
3I/Q
IM
PS(RISE)
PS(FALL)
20 24 33 m A No input signal
10 uA VPS ≤ 0.5 V (Low)
LOin
f
13
−
10 dBM
−
35
−
40
−
45
−
30 dBc
−
30 dBc
−
30 dBc
−
= 948 MHz
LOin
= −10 dBm
P
I/Q
= 2.625 kHz
f
I/Q (DC) = V
I/Qin
= 500 mV
V
(Single ended)
35
25
sVPS: Low → High
µ
sVPS: High → Low
µ
CC
STANDARD CHARACTERISTICS FOR REFERENCE
(TA = +25 °C, VCC = 3.0 V, Unless Otherwise Specified VPS
PARAMETER SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS
I/Q Input Impeadance Z
LO Input VSWR VSWR (Lo) 1.5 : 1
RF Output VSWR VSWR
I/Qin
(RF)
2.2 V (Hgih))
≥≥≥≥
150 k
1.5 : 1
Ω
−
−
I/Q
f
= DC to 10 MHz
fLO = 948 MHz
fLO = 948 MHz
2.2 V (High))
≥≥≥≥
/2
p-p
4
Data Sheet P11074EJ3V0DS00
PIN EXPLANATION
5 6
8 7
µµµµ
PC8110GR
Pin
ASSIGNMENT
No.
1L
2
Oin
GND
SUPPLY
VOL. (V)
0
(for Local
18
3L
5Q V
6Q V
7I V
8I V
9
Amp. Block)
Oin
GND
CC
CC
CC
CC
/2
/2
/2
/2
0
(for Quadrature
13
Modulator Block)
16
PIN
VOL. (V)
2.6 L
FUNCTION AND APPLICATION EQUIVALENT CIRCUIT
O
input for phase shifter.
Connect around 50 Ω between 1
and 3 pin to match to 50 Ω.
Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
2.6 Bypass of L
This pin is grounded through
around 33 pF capacitor.
Input for Q signal.
This input impedance is 150 kΩ.
In case of that I/Q i nput signals
are single ended, amplitude of
the signal is 500 mVp-p max .
Input for Q signal.
This input impedance is 150 kΩ.
In case of that I/Q i nput signals
are single ended, V
DC signal should be input.
In case of that I/Q i nput signals
are differential, amplit ude of the
signal is 250 mVp-p max.
Input for I signal.
This input impedance is 150 kΩ.
In case of that I/Q i nput signals
are single ended, V
DC signal should be input.
In case of that I/Q i nput signals
are differential, amplit ude of the
signal is 250 mVp-p max.
Input for I signal.
This input impedance is 150 kΩ.
In case of that I/Q i nput signals
are single ended, amplitude of
the signal is 500 mVp-p max .
Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
O
input.
CC
/2 biased
CC
/2 biased
1
3
Note 2
Note 2
Note 2
Note 2
Data Sheet P11074EJ3V0DS00
5
µµµµ
PC8110GR
Pin
ASSIGNMENT
No.
11 RF
12
out
GND
SUPPLY
VOL. (V)
(for Output
Push-pull
Amplifier)
CC
14
V
2.7 to 3.6
(for Output
Amplifier of
Modulator)
17 Power Save V
PIN
VOL. (V)
1.6 Output from modulator.
FUNCTION AND APPLICATION EQUIVALENT CIRCUIT
This is single-end push-pull
amplifier. So this output
impedance is Low.
0
Connect to the ground with
minimum inductance.
Track length should be kept as
From Modulator
11
short as possible.
Supply voltage pin for Output
Amplifier of modulator. Internal
regulator can be kept stable
condition of supply bias agai nst
CC
.
P/S
the variable temperature or V
Power save control pin can be
controlled ON/SLEEP state with
bias as follows;
P/S
V
STATE
17
2.2 to 3.6 ON
0 to 0.5 SLEEP
19 V
4
10
15
20
Note 2.
Relations between amplitude and V
Supply Voltage
VCC (V)
2.7 to 3.6 1.35 to 1.8
CC
2.7 to 3.6
GND 0
I/Q DC Voltage (V)
CC
/2 = I = I = Q = Q
V
Supply voltage pin for modulator
except output Amplifier. Internal
regulator can be kept stable
condition of supply bias agai nst
CC
the variable temperature or V
.
Connect to the ground with
minimum inductance.
Track length should be kept as
short as possible.
CC
/2 bias of input signal are following.
I/Qin
P
- I/Q Input Signal - mVp-p
Single ended input
I = Q
500
≤
Differential input
I = I = Q = Q
250
≤
6
Data Sheet P11074EJ3V0DS00
EXPLANATION OF INTERNAL FUNCTION
BLOCK FUNCTION/OPERATION BLOCK DIAGRAM
from LO
90 ° PHASE
SHIFTER
BUFFER
AMP.
Input signal from LO is send to digital ci rc ui t of
T-type flip-flop through frequency doubler.
Output signal from T-type F/F i s changed to
O
same frequency as L
quadrature phase shift, 0 °, 90 °, 180 °, 270 °.
These circuits have f unction of self phase
correction to make correc tly quadrature signals.
Buffer amplifiers f or each phase signals to send
to each mixers.
input and that have
in
× 2
÷ 2 F/F
µµµµ
PC8110GR
MIXER E ac h signals from buffer amp. are quadrat ure
modulated with two double-balanced mi x ers.
High accurate phase and amplitude i nput s are
realized to good performance for image
rejection.
ADDER Output s i gnal s from each mixers are added with
adder and send to final amplifier.
I
I
Q
Q
to MOD
out
Data Sheet P11074EJ3V0DS00
7
TYPICAL CHARACTERISTICS
Unless otherwise specified T
500 mV
p-p
(Single ended), f
I/Q
= 2.625 kHz, f
RNYQ: a = 0.5.
µµµµ
PC8110GR
A
= +25 °C, VCC = VPS = 3 V, I/Q DC/offset = I/Q DC offset = 1.5 V, I/Q Input signal =
LOin
= 948 MHz, P
LOin
= −10 dBm, <PDC> Transmission speed: 42 kbps,
CIRCUIT CURRENT vs SUPPLY VOLTAGE
30
TA = +25 ˚C
A
= –40 ˚C
T
T
A
25
= +85 ˚C
CC
= V
V
PS
I/Q (DC) = VCC/2
RF None
20
15
- Circuit Current - mA
CC
I
10
5
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
VCC - Supply Voltage - V
CIRCUIT CURRENT vs POWER SAVE VOLTAGE
30
TA = +25 ˚C
A
= –40 ˚C
T
A
= +85 ˚C
25
T
V
CC
= 3 V
I/Q (DC) = 1.5 V
RF None
20
15
- Circuit Current - mA
CC
I
10
5
0
0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0
VPS - Power Save Voltage - V
8
Data Sheet P11074EJ3V0DS00
µµµµ
PC8110GR
RF OUTPUT POWER vs I/Q INPUT SIGNAL
A
= –40 ˚C)
(at T
0
VCC = 3.0 V
V
CC
= 2.7 V
CC
= 3.6 V
V
Single ended
–5
–10
–15
- RF Output Power - dBm
RFout
P
–20
–25
100 200 300 400 500
RF OUTPUT POWER vs I/Q INPUT SIGNAL
A
= +25 ˚C)
(at T
0
VCC = 3.0 V
V
CC
= 2.7 V
CC
= 3.6 V
V
Single ended
–5
–10
–15
- RF Output Power - dBm
RFout
P
–20
–25
100 200 300 400 500
P
I/Qin
- I/Q Input Signal - mVp-p
RF OUTPUT POWER vs I/Q INPUT SIGNAL
A
= +85 ˚C)
(at T
0
VCC = 3.0 V
CC
= 2.7 V
V
CC
= 3.6 V
V
Single ended
–5
–10
–15
- RF Output Power - dBm
RFout
P
–20
P
I/Qin
- I/Q Input Signal - mVp-p
–25
100 200 300 400 500
P
I/Qin
- I/Q Input Signal - mVp-p
Data Sheet P11074EJ3V0DS00
9
µµµµ
PC8110GR
Lo INPUT FREQUENCY vs
RFout
, LoL, ImR, IM
P
3I/Q
(at VCC = 2.7 V, TA = –40 ˚C)
LoL
–5
–10
–15
–20
–25
–30
- dBc
3I/Q
–35
–40
–45
–50
P
RFout
IM
3I/Q
ImR
LoL - Local Ieak, ImR - Image Rejection, IM
–55
700 800 900
1000 1100
–30
fLO - Local Input Frequency - MHz
Lo INPUT FREQUENCY vs
RFout
, LoL, ImR, IM
P
(at VCC = 3.0 V, TA = –40 ˚C)
–30
P
RFout
- dBc
3I/Q
–35
LoL
–40
IM
–45
3I/Q
- RF Output Power - dBm
RFout
P
–50
ImR
LoL - Local Ieak, ImR - Image Rejection, IM
–55
700 800 900
1000 1100
fLO - Local Input Frequency - MHz
3I/Q
–5
–30
- dBc
–10
–15
–20
3I/Q
–35
–40
–45
- RF Output Power - dBm
RFout
P
–25
–30
–50
LoL - Local Ieak, ImR - Image Rejection, IM
–55
Lo INPUT FREQUENCY vs
RFout
, LoL, ImR, IM
P
3I/Q
(at VCC = 3.6 V, TA = –40 ˚C)
LoL
P
RFout
IM
3I/Q
ImR
700 800 900
1000 1100
fLO - Local Input Frequency - MHz
–5
–10
–15
–20
- RF Output Power - dBm
RFout
P
–25
–30
Lo INPUT FREQUENCY vs
RFout
, LoL, ImR, IM
P
3I/Q
(at VCC = 2.7 V, TA = +25 ˚C)
–30
P
RFout
–5
- dBc
3I/Q
–35
–40
LoL
–45
IM
3I/Q
–50
–55
ImR
700 800 900
1000 1100
LoL - Local Ieak, ImR - Image Rejection, IM
–10
–15
–20
–25
–30
fLO - Local Input Frequency - MHz
Lo INPUT FREQUENCY vs
RFout
, LoL, ImR, IM
P
(at VCC = 3.0 V, TA = +25 ˚C)
–30
P
RFout
- dBc
3I/Q
–35
IM
LoL
3I/Q
–40
–45
- RF Output Power - dBm
RFout
P
–50
LoL - Local Ieak, ImR - Image Rejection, IM
–55
ImR
700 800 900
1000 1100
fLO - Local Input Frequency - MHz
3I/Q
–5
–30
- dBc
–10
–15
–20
3I/Q
–35
–40
–45
- RF Output Power - dBm
RFout
P
–25
–30
–50
LoL - Local Ieak, ImR - Image Rejection, IM
–55
Lo INPUT FREQUENCY vs
RFout
, LoL, ImR, IM
P
3I/Q
(at VCC = 3.6 V, TA = +25 ˚C)
P
RFout
LoL
IM
3I/Q
ImR
700 800 900
1000 1100
fLO - Local Input Frequency - MHz
–5
–10
–15
–20
- RF Output Power - dBm
RFout
P
–25
–30
10
Data Sheet P11074EJ3V0DS00
µµµµ
PC8110GR
Lo INPUT FREQUENCY vs
RFout
, LoL, ImR, IM
P
3I/Q
(at VCC = 2.7 V, TA = +85 ˚C)
–30
–5
LoL
- dBc
3I/Q
–35
P
RFout
–40
IM
3I/Q
–45
ImR
–50
LoL - Local Ieak, ImR - Image Rejection, IM
–55
700 800 900
1000 1100
–10
–15
–20
–25
–30
fLO - Local Input Frequency - MHz
Lo INPUT FREQUENCY vs
RFout
, LoL, ImR, IM
P
(at VCC = 3.0 V, TA = +85 ˚C)
–30
- dBc
3I/Q
–35
P
RFout
–40
IM
3I/Q
–45
- RF Output Power - dBm
RFout
P
–50
ImR
LoL - Local Ieak, ImR - Image Rejection, IM
–55
700 800 900
1000 1100
fLO - Local Input Frequency - MHz
3I/Q
LoL
–5
- dBc
–10
3I/Q
–15
–20
- RF Output Power - dBm
RFout
P
–25
–30
LoL - Local Ieak, ImR - Image Rejection, IM
Lo INPUT FREQUENCY vs
RFout
, LoL, ImR, IM
P
3I/Q
(at VCC = 3.6 V, TA = +85 ˚C)
–30
–35
P
RFout
LoL
–40
IM
3I/Q
–45
ImR
–50
–55
700 800 900
1000 1100
fLO - Local Input Frequency - MHz
–5
–10
–15
–20
- RF Output Power - dBm
RFout
P
–25
–30
Lo INPUT POWER vs
RFout
, LoL, ImR, IM
P
3I/Q
(at VCC = 2.7 V, TA = –40 ˚C)
–30
LoL
–5
- dBc
3I/Q
–35
P
–40
–10
RFout
–15
ImR
–45
–20
- RF Output Power - dBm
RFout
–50
IM
3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM
–55
–15 –5–10–15 –5–10–15
–5–10
–25
–30
P
LO - Local Input Power - dBm
Lo INPUT POWER vs
RFout
, LoL, ImR, IM
P
3I/Q
(at VCC = 3.0 V, TA = –40 ˚C)
–30
LoL
–5
- dBc
3I/Q
–35
P
–40
–10
RFout
–15
ImR
–45
–50
IM
3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM
–55
–20
–25
–30
LO - Local Input Power - dBm
- RF Output Power - dBm
RFout
P
Lo INPUT POWER vs
RFout
, LoL, ImR, IM
P
3I/Q
(at VCC = 3.6 V, TA = –40 ˚C)
–30
LoL
–5
- dBc
3I/Q
–35
P
–40
–10
RFout
–15
ImR
–45
–50
IM
3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM
–55
–20
–25
–30
LO - Local Input Power - dBm
- RF Output Power - dBm
RFout
P
Data Sheet P11074EJ3V0DS00
11
µµµµ
PC8110GR
Lo INPUT POWER vs
RFout
, LoL, ImR, IM
P
3I/Q
(at Vcc = 2.7 V, TA = +25 ˚C)
–30
- dBc
3I/Q
–35
–40
P
RFout
LoL
–5
–10
–15
ImR
–45
–20
- RF Output Power - dBm
RFout
–50
IM
3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM
–55
–15 –5–10–15 –5–15
–5–10
–25
–30
P
LO - Local Input Power - dBm
Lo INPUT POWER vs
RFout
, LoL, ImR, IM
P
3I/Q
(at Vcc = 3.0 V, TA = +25 ˚C)
–30
- dBc
3I/Q
–35
–40
P
RFout
LoL
–5
–10
–15
ImR
–45
–50
IM
3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM
–55
–20
–25
–30
LO - Local Input Power - dBm
- RF Output Power - dBm
RFout
P
Lo INPUT POWER vs
RFout
, LoL, ImR, IM
P
3I/Q
(at Vcc = 3.6 V, TA = +25 ˚C)
–30
P
RFout
–5
- dBc
3I/Q
–35
–40
LoL
–10
–15
ImR
–45
–50
IM
3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM
–55
–20
–25
–30
–10
LO - Local Input Power - dBm
- RF Output Power - dBm
RFout
P
Lo INPUT POWER vs
RFout
, LoL, ImR, IM
P
3I/Q
(at Vcc = 2.7 V, TA = +85 ˚C)
–30
–5
LoL
- dBc
3I/Q
–35
–40
P
RFout
–10
–15
ImR
–45
–20
- RF Output Power - dBm
RFout
–50
IM
3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM
–55
–15 –5–10–15 –5–10–15
–5–10
–25
–30
P
LO - Local Input Power - dBm
Lo INPUT POWER vs
RFout
, LoL, ImR, IM
P
3I/Q
(at Vcc = 3.0 V, TA = +85 ˚C)
–30
–5
LoL
- dBc
3I/Q
–35
–40
P
RFout
–10
–15
ImR
–45
–50
IM
3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM
–55
–20
–25
–30
LO - Local Input Power - dBm
- RF Output Power - dBm
RFout
P
Lo INPUT POWER vs
RFout
, LoL, ImR, IM
P
3I/Q
(at Vcc = 3.6 V, TA = +85 ˚C)
–30
- dBc
3I/Q
–35
–40
LoL
P
RFout
–5
–10
–15
ImR
–45
–50
IM
3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM
–55
–20
–25
–30
LO - Local Input Power - dBm
- RF Output Power - dBm
RFout
P
12
Data Sheet P11074EJ3V0DS00
µµµµ
PC8110GR
I/Q BIASE VOLTAGE vs
P
RFout
, LoL, ImR, IM
3I/Q
(at VCC = 2.7 V, TA = –40 ˚C)
–30
P
RFout
–5
- dBc
3I/Q
–35
–40
–45
LoL
ImR
–50
IM
3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM
–55
–10
–15
–20
–25
–30
1.25 1.35 1.45
I/Q (DC) - I/Q Supply Voltage - V
I/Q BIASE VOLTAGE vs
P
RFout
, LoL, ImR, IM
(at VCC = 3.0 V, TA = –40 ˚C)
–30
P
RFout
- dBc
3I/Q
–35
LoL
–40
–45
ImR
- RF Output Power - dBm
RFout
P
–50
LoL - Local Ieak, ImR - Image Rejection, IM
–55
IM
3I/Q
1.4 1.5 1.6
I/Q (DC) - I/Q Supply Voltage - V
3I/Q
–5
- dBc
–10
3I/Q
–15
–20
- RF Output Power - dBm
RFout
P
–25
–30
LoL - Local Ieak, ImR - Image Rejection, IM
I/Q BIASE VOLTAGE vs
P
RFout
, LoL, ImR, IM
3I/Q
(at VCC = 3.6 V, TA = –40 ˚C)
–30
LoL
–35
P
RFout
–40
–45
–50
ImR
IM
3I/Q
–55
1.7 1.8 1.9
I/Q (DC) - I/Q Supply Voltage - V
–5
–10
–15
–20
- RF Output Power - dBm
RFout
P
–25
–30
I/Q BIASE VOLTAGE vs
RFout
, LoL, ImR, IM
P
3I/Q
(at VCC = 2.7 V, TA = +25 ˚C)
–30
P
RFout
–5
- dBc
3I/Q
–35
–40
–10
–15
LoL
IM
3I/Q
ImR
–20
–25
–30
–45
–50
LoL - Local Ieak, ImR - Image Rejection, IM
–55
1.25 1.35 1.45
I/Q (DC) - I/Q Supply Voltage - V
I/Q BIASE VOLTAGE vs
RFout
, LoL, ImR, IM
P
(at VCC = 3.0 V, TA = +25 ˚C)
–30
P
RFout
- dBc
3I/Q
–35
–40
LoL
ImR
–45
- RF Output Power - dBm
RFout
P
–50
LoL - Local Ieak, ImR - Image Rejection, IM
–55
IM
3I/Q
1.4 1.5 1.6
I/Q (DC) - I/Q Supply Voltage - V
3I/Q
–5
- dBc
–10
3I/Q
–15
–20
- RF Output Power - dBm
RFout
P
–25
–30
LoL - Local Ieak, ImR - Image Rejection, IM
I/Q BIASE VOLTAGE vs
RFout
, LoL, ImR, IM
P
3I/Q
(at VCC = 3.6 V, TA = +25 ˚C)
–30
P
RFout
–35
–40
LoL
ImR
–45
IM
–50
3I/Q
–55
1.7 1.8 1.9
I/Q (DC) - I/Q Supply Voltage - V
–5
–10
–15
–20
- RF Output Power - dBm
RFout
P
–25
–30
Data Sheet P11074EJ3V0DS00
13
µµµµ
PC8110GR
I/Q BIASE VOLTAGE vs
P
RFout
, LoL, ImR, IM
3I/Q
(at VCC = 2.7 V, TA = +85 ˚C)
–30
–5
- dBc
3I/Q
–35
P
RFout
–40
–45
LoL
ImR
–50
IM
3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM
–55
–10
–15
–20
–25
–30
1.25 1.35 1.45
I/Q (DC) - I/Q Supply Voltage - V
I/Q BIASE VOLTAGE vs
RFout
, LoL, ImR, IM
P
(at VCC = 3.0 V, TA = +85 ˚C)
–30
P
- dBc
3I/Q
–35
–40
–45
RFout
LoL
ImR
- RF Output Power - dBm
RFout
P
–50
IM
3I/Q
LoL - Local Ieak, ImR - Image Rejection, IM
–55
1.4 1.5 1.6
I/Q (DC) - I/Q Supply Voltage - V
3I/Q
–5
–30
- dBc
3I/Q
–10
–15
–20
–35
–40
–45
- RF Output Power - dBm
RFout
–25
–30
P
–50
LoL - Local Ieak, ImR - Image Rejection, IM
–55
I/Q BIASE VOLTAGE vs
P
RFout
, LoL, ImR, IM
3I/Q
(at VCC = 3.6 V, TA = +85 ˚C)
LoL
P
RFout
ImR
IM
3I/Q
1.7 1.8 1.9
I/Q (DC) - I/Q Supply Voltage - V
–5
–10
–15
–20
- RF Output Power - dBm
RFout
P
–25
–30
14
Data Sheet P11074EJ3V0DS00
µµµµ
PC8110GR
10 dB/
∆ MKR
–10.50 kHz
RBW
300 Hz
VBW
300 Hz
SWP
1.2 s
TYPICAL SINE WAVE MODULATION OUTPUT SPECTRUM
<PDC> 42 kbps, RNYQ α = 0.5, MOD Pattern [0000]
ATT 10 dB A_write B_blankREF 0.0 dBm
REF Level
0 dBm
10 dB/
ADJ BS
21 kHz
RBW 3 kHz
VBW 3 kHz
SWP 5 s
Padj (dB)
LOL
1
ImR
IM3I/Q
2
3
CENTER 948.00000 MHz
out
P
*
∆ MARKER
–10.50 kHz
–47.36 dB
SPAN 50.0 kHz
TYPICAL π/4DQPSK MODULATION OUTPUT SPECTRUM
<PDC> 42 kbps, RNYQ α = 0.5, MOD Pattern [PN9]
2
1
CENTER 948 MHz SPAN 500 kHz
Marker
No.1 : 947.90 MHz
No.2 : 947.95 MHz
No.3 : 948.05 MHz
No.4 : 948.10 MHz
3
4
–78.0 dB
–67.0 dB
–70.3 dB
–77.8 dB
∆f = –100 kHz
∆f = –50 kHz
∆f = +50 kHz
∆f = +100 kHz
Data Sheet P11074EJ3V0DS00
15
µµµµ
PC8110GR
POWER SAVE RESPONSE
CC
= VPS = 2.7 V)
(at V
REF 0.0 dBm
10 dB/
∆ MKR
µµ
2.714 s
RBW
3 MHz
VBW
3 MHz
SWP
50 s
REF 0.0 dBm
10 dB/
∆ MKR
2.714 s
CENTER 948.002642 MHz SPAN 0 Hz
µ
POWER SAVE RESPONSE
µ
ATT 10 dB A_view B_blank
∆ MARKER
2.714 s
44.41 dB
CC
= VPS = 3.6 V)
(at V
ATT 10 dB A_view B_blank
∆ MARKER
2.714 s
45.97 dB
µ
µ
REF 0.0 dBm
10 dB/
∆ MKR
2.714 s
RBW
3 MHz
VBW
3 MHz
SWP
50 s
CENTER 948.002642 MHz SPAN 0 Hz
µ
POWER SAVE RESPONSE
CC
= VPS = 3.0 V)
(at V
ATT 10 dB A_view B_blank
∆ MARKER
2.714 s
48.97 dB
µ
RBW
3 MHz
VBW
3 MHz
SWP
50 s
CENTER 948.002642 MHz SPAN 0 Hz
µ
16
Data Sheet P11074EJ3V0DS00
µµµµ
PC8110GR
LO INPUT (L
MARKER 1
948 MHz
START 700.000 000 MHz STOP 1 100.000 000 MHz
Oin
) IMPEDANCE
CC = VPS = 2.7 V
V
1 : 30.055 Ω 7.1015 Ω 1.1922 nH
CC = VPS = 3.6 V
V
1 : 30.189 Ω 7.001 Ω 1.1754 nH
948.000 000 MHz
1
948.000 000 MHz
CC = VPS = 3.0 V
V
1 : 30.191 Ω 7.1309 Ω 1.1872 nH
948.000 000 MHz
MARKER 1
948 MHz
1
START 700.000 000 MHz STOP 1 100.000 000 MHz
MARKER 1
948 MHz
1
START 700.000 000 MHz STOP 1 100.000 000 MHz
Data Sheet P11074EJ3V0DS00
17
µµµµ
PC8110GR
RF OUTPUT (RF
MARKER 1
948 MHz
START 700.000 000 MHz STOP 1 100.000 000 MHz
out
) IMPEDANCE
V
CC
= VPS = 2.7 V VCC = VPS = 3.0 V
1 : 45.74 Ω –2.8633 Ω 56.634 pF
948.000 000 MHz
1 1
CC
= VPS = 3.6 V
V
1 : 45.925 Ω –2.6719 Ω 62.834 pF
948.000 000 MHz
1 : 45.005 Ω –2.6352 Ω 59.199 pF
948.000 000 MHz
MARKER 1
948 MHz
START 700.000 000 MHz STOP 1 100.000 000 MHz
MARKER 1
948 MHz
1
START 700.000 000 MHz STOP 1 100.000 000 MHz
18
Data Sheet P11074EJ3V0DS00
TEST CIRCUIT
µµµµ
PC8110GR
0.22 F
VCC1
CC
2
V
0.22 F
100 pF
1000 pF
1000 pF
100 pF
µ
µ
33 pF
19
18
17
16
15
14
13
12
11
20
V
33 pF
ps
out
RF
L
Oin
51 Ω
2
3
1
33 pF
Q
in
Q
in
I
in
I
in
4
5
6
7
8
9
10
Data Sheet P11074EJ3V0DS00
19
µµµµ
PC8110GR
MEASUREMENT BLOCK DIAGRAM 1
(RF Output Power, Local Carrier Leak, Image Rejection, I/Q 3rd Order Intermodulation Distortion and Power
Save Rise and Fall Time)
Voltage
Source
Pulse pattern
10
1
2
3
4
5
6
7
8
9
Generator
20
19
18
17
16
15
14
13
12
11
V
33 pF
Voltage
Source
1000 pF
100 pF
0.22 F
µ
ps
VCC1
V
CC
0.22 F
2
µ
100 pF
1000 pF
out
RF
Signal Generator
QbQ
Ib I
I/Q Signal
Generator
33 pF
L
Oin
51 Ω
33 pF
Q
in
Q
in
I
in
I
in
20
Spectrum Analyzer
Data Sheet P11074EJ3V0DS00
MEASUREMENT BLOCK DIAGRAM 2
(Local Input VSWR and RF Output VSWR)
Network Analyzer
Voltage
Source
µµµµ
PC8110GR
Voltage
Source
Voltage
Source
33 pF
L
Oin
51 Ω
2
3
1
33 pF
Q
Q
I
in
I
in
in
in
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
V
33 pF
ps
RF
1000 pF
100 pF
0.22 F
µ
VCC1
V
CC
2
0.22 F
µ
100 pF
1000 pF
out
Network Analyzer
Data Sheet P11074EJ3V0DS00
21
TEST BOARD
µµµµ
PC8110GR
VCC1
V
PS
Short
RF
out
VCC2
Bypass Capacitor
33 pF
Bypass Capacitor
PC8110GR
µ
L
Oin
33 pF
33 pF
Q
in
Q
51 Ω
I
in
in
I
in
Notes 1. Double-sided patterning with 35 µm thick copper on polyhimid board sizing 50 × 50 × 0.4 mm.
2. GND pattern on backside.
3. Solder coating over patterns.
4.{, indicate through-holes.
22
Data Sheet P11074EJ3V0DS00
PACKAGE DIMENSIONS
20 PIN PLASTIC SSOP (225 mil) (UNIT: mm)
µµµµ
PC8110GR
20
110
6.7 ± 0.3
1.8 MAX.
1.5 ± 0.1
11
detail of lead end
3˚
6.4 ± 0.2
4.4 ± 0.1
+7˚
–3˚
1.0 ± 0.2
NOTE
0.5 ± 0.2
0.15
+0.10
–0.05
0.1 ± 0.1
0.65
0.22
+0.10
–0.05
0.10
0.15
M
0.575 MAX.
Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition.
Data Sheet P11074EJ3V0DS00
23
µµµµ
PC8110GR
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electrostatic sensitive devices.
(2) Form a ground pattern as wide as possible to keep the minimum ground impedance (to prevent undesired
oscillation).
(3) Keep the track length of the ground pins as short as possible.
CC
(4) Connect a bypass capacitor (e.x. 1 000 pF) to the V
pin.
(5) I, Q DC offset voltage should be same as the I, Q DC offset voltage (to prevent changing the local leak level with
power save control.)
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered in the following recommended conditions. Other soldering method and conditions
than the recommended conditions are to be consulted with our sales representatives.
PC8110GR
µµµµ
Soldering process Soldering conditions Symbol
Infrared ray reflow Peak package’s surface temperature: 235 °C or below,
Reflow time: 30 seconds or bel ow (210 °C or higher),
Number of reflow process: 3, Exposure limit
VPS Peak package’s surface temperature: 215 °C or below,
Reflow time: 40 seconds or bel ow (200 °C or higher),
Number of reflow process: 3, Exposure limit
Wave soldering Solder temperature: 260 °C or below,
Flow time: 10 seconds or below,
Number of flow process: 1, Exposure limit
Partial heating method Terminal temperature: 300 °C or below,
Flow time: 3 seconds/pi n or bel ow,
Exposure limit
Exposure limit before soldering after dry-pack package is opened.
Note
Note
: None
Note
Note
Note
: None
: None
: None
IR35-00-3
VP15-00-3
WS60-00-1
Storage conditions: 25 °C and relative humidity at 65 % or less.
Caution Apply only a single process at once, except for “Partial heating method”.
For details of recommended soldering conditions for surface mounting, refer to information document
SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
24
Data Sheet P11074EJ3V0DS00
[MEMO]
µµµµ
PC8110GR
Data Sheet P11074EJ3V0DS00
25
[MEMO]
µµµµ
PC8110GR
26
Data Sheet P11074EJ3V0DS00
[MEMO]
µµµµ
PC8110GR
Data Sheet P11074EJ3V0DS00
27
µµµµ
PC8110GR
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8
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