RF AMPLIFIER IC FOR 150 MHz TO 330 MHz PAGER SYSTEM
DESCRIPTION
µ
PC8102T is a silicon monolisic integrated circuit designed as RF amplifier for 150 MHz to 330 MHz pager system.
Due to 1 V supply voltage, this IC is suitable for low voltage pager system. The package is a 6 pin mini mold suitable
for high-density surface mounting.
This IC is manufactured using NEC’s 20 GHz f
nitride passivation film and gold electrodes. These materials contribute excellent DC, AC performance. Thus, this
process is utilized for 1 V voltage IC.
T NESAT
TM
III silicon bipolar process. This process uses silicon
FEATURES
• 1 V supply voltage: VCC = 0.9 V to 2.0 V
• Low noise figure: 2.3 dBTYP. @ fin = 150 MHz (with external matching circuit to optimize NF)
• Low current consumption: I
• Gain available frequency: fRF = 150 MHz to 330 MHz (with external matching circuit)
• High-density surface mounting: 6 pin mini mold
CC = 0.5 mATYP. @ VCC = 1.0 V
ORDERING INFORMATION
PART NUMBERPACKAGEMARKINGSUPPLYING FORM
µ
PC8102T-E36 pin mini moldC2BEmbossed tape 8 mm wide. Pin 1, 2, 3 face to
perforation side of tape. QTY 3 kp/Reel
* For evaluation sample order, please contact your local NEC sales office.
(Order number: µPC8102T).
PIN CONNECTIONS
(Top View)(Bottom View)
3
2
1
4
5
C2B
6
4
5
6
3
2
1
1: INPUT
2: GND
3: OUTPUT
4: V
CC
5: C1
6: C2
Document No. P11501EJ2V0DS00
(Previous No. ID-3534)
Date Published May 1996 P
Printed in Japan
C2 pin
voltage
must be
applied
through
external
matching
inductor
PIN VOLTAGE
(V)
FUNCTION AND APPLICATIONEQUIVALENT CIRCUIT
should be externally equipped
with matching circuit in accordance with desired frequency.
connected to the system ground
with minimum inductance.
Ground pattern on the board
should be formed as wide as
possible. Track length should
be kept as short as possible.
This pin should be externally
equipped with matching circuit
in accordance with desired
frequency.
bypass capacitor (eg 1000 pF)
to minimize ground impedance.
1000 pF).
NotePin voltage values are described at VCC = 1 V.
3
Page 4
µ
PC8102T
ABSOLUTE MAXIMUM RATINGS
PARAMETERSYMBOLCONDITIONRATINGSUNIT
Supply VoltageVCCTA = +25 ˚C2.2V
Power DissipationPDMounted on 50 × 50 × 1.6 mm double copper280mW
clad epoxy glass PWB at TA = +85 ˚C
Operating TemperatureTopt–40 to +85˚C
Storage TemperatureTstg–55 to +150˚C
Circuit CurrentICCNo input signal, TEST CIRCUIT 10.300.50.65mA
Power GainGPf = 280 MHz, TEST CIRCUIT 310.013.516.5dB
Output 3rd orderOIP3f1 = 150.000 MHz, f2 = 150.025 MHz—–5—dBm
intercept pointTEST CIRCUIT 2
ΩΩ
Ω)
ΩΩ
µ
PC8102T
MIN.TYP.MAX.
NoteExternal matching circuits should be attached to input and output pins.
Standared characteristics for reference (Sample: I
PARAMETERSYMBOLCONDITIONSReference valueUNIT
matched with 50 Ω
Power Gain 1GP1f = 150 MHz, TEST CIRCUIT 220.6dB
Noise Figure 1NF13.6dB
Power Gain 2GP2f = 280 MHz, TEST CIRCUIT 314.7dB
Noise Figure 2NF24.0dB
Power Gain 3GP3f = 330 MHz, TEST CIRCUIT 514.5dB
Noise Figure 3NF34.1dB
matched to optimize NF
Power Gain 4GP4f = 150 MHz, TEST CIRCUIT 219.4dB
Noise Figure 4NF42.3dB
Power Gain 5GP5f = 280 MHz, TEST CIRCUIT 414.0dB
Noise Figure 5NF52.9dB
Power Gain 6GP6f = 330 MHz, TEST CIRCUIT 611.6dB
Noise Figure 6NF63.1dB
CC = 0.55 mA, Condition: TA = +25 ˚C, VCC = 1.0 V)
UNIT
4
Page 5
TEST CIRCUIT 1
123
INGNDOUT
µ
PC8102T
C2C1V
654
CC
A
5
Page 6
µ
PC8102T
TEST CIRCUIT 2 (150 MHz) <Matched with 50
(Note)
7.5 pF
68 nH
10 pF
1 000 pF
ΩΩ
Ω or matched to optimize NF>
ΩΩ
213
IN
C2
1 000 pF
GNDOUT
CCC1
564
1 000
pF
V
84 nH
7.5 pF
10
47 kΩ
pF
1 000 pF
(Note)
NoteMatching can be adjusted with trimmer condenser.
ILLUSTRATION OF THE TEST CIRCUIT 2 ASSEMBLED ON EVALUATION BOARD
47k
1 000 pF
84 nH
Ω
1 000 pF
1 000 pF
8102/07
1 000 pF
3
V
CC
2
C2B
1
Mounting direction
OUT
10 pF
7.5pF
10 pF
7.5pF
IN
1 000 pF
68 nH
4
5
6
Note
(*1) 35 × 42 × 0.4 mm double copper clad polyimide board
(*2) Back side: GND pattern
(*3) Solder plated on pattern
: Through holes
(*4)
6
Page 7
µ
C2B
3
2
1
4
5
6
1 000 pF
Mounting direction
1 000 pF
VCC
OUT
IN
PC8102/07
TYPE2
µ
PC8102T
IN
C2
1 000 pF
ΩΩ
Ω>
ΩΩ
213
GNDOUT
C1
564
1 000
pF
23 nH
V
CC
2 pF
10
47 kΩ
pF
1 000 pF
TEST CIRCUIT 3 (280 MHz) <Matched with 50
0.5 pF
5 pF
23 nH
2 pF
0.5 pF
1 000 pF
ILLUSTRATION OF THE TEST CIRCUIT 3 ASSEMBLED ON EVALUATION BOARD
OUT
47 kΩ
1 000 pF
0.5 pF
2 pF
10 pF
23 nH
2 pF
0.5 pF
1 000 pF
23 nH
IN
5 pF
Note
(*1) 35 × 42 × 0.4 mm double copper clad polyimide board
(*2) Solder plated on pattern
: Through holes
(*3)
7
Page 8
TEST CIRCUIT 4 (280 MHz) <Matched to optimize NF>
27 nH
10 pF
IN
213
GNDOUT
23 nH
10
pF
2 pF
47 kΩ
µ
PC8102T
2 pF
1 000 pF
C2
1 000 pF
V
C1
564
1 000
pF
CC
1 000 pF
ILLUSTRATION OF THE TEST CIRCUIT 4 ASSEMBLED ON EVALUATION BOARD
1 000 pF
1 000 pF
IN
µ
PC8102/07
TYPE2
OUT
VCC
3
2
1
C2B
Mounting direction
4
5
6
OUT
47 kΩ
1 000 pF
2 pF
10 pF
23 nH
2 pF
0.5 pF
1 000 pF
27 nH
IN
10 pF
Note
(*1) 35 × 42 × 0.4 mm double copper clad polyimide board
(*2) Solder plated on pattern
: Through holes
(*3)
8
Page 9
µ
C2B
3
2
1
4
5
6
1 000 pF
Mounting direction
1 000 pF
VCC
OUT
IN
PC8102/07
TYPE2
µ
PC8102T
IN
C2
1 000 pF
ΩΩ
Ω>
ΩΩ
213
GNDOUT
564
1 000
pF
23 nH
VCCC1
1.5 pF
5
47 kΩ
pF
1 000 pF
TEST CIRCUIT 5 (330 MHz) <Matched with 50
6 pF
17 nH
3 pF
1 000 pF
ILLUSTRATION ON THE TEST CIRCUIT 5 ASSEMBLED ON EVALUATION BOARD
OUT
1.5 pF
47 kΩ
1 000 pF
6 pF
5 pF
23 nH
3 pF
1 000 pF
17 nH
IN
Note
(*1) 35 × 42 × 0.4 mm double copper clad polyimide board
(*2) Solder plated on pattern
: Through holes
(*3)
9
Page 10
TEST CIRCUIT 6 (330 MHz) <Matched to optimize NF>
µ
PC8102T
23 nH
10 pF
3 pF
1 000 pF
IN
C2
1 000 pF
213
GNDOUT
C1
564
1 000
pF
23 nH
V
CC
2 pF
6
47 kΩ
pF
1 000 pF
ILLUSTRATION ON THE TEST CIRCUIT 6 ASSEMBLED ON EVALUATION BOARD
1 000 pF
1 000 pF
IN
µ
PC8102/07
TYPE2
OUT
VCC
3
2
1
C2B
Mounting direction
4
5
6
OUT
47 kΩ
1 000 pF
10 pF
2 pF
6 pF
23 nH
3 pF
1 000 pF
23 nH
IN
Note
(*1) 35 × 42 × 0.4 mm double copper clad polyimide board
(*2) Solder plated on pattern
(1) Observe precautions for handling because of electro-static sensitive devices.
(2) Form a ground pattern as wide as possible to minimize ground impedance (to prevent undesired oscillation).
(3) Keep the track length of the ground pins as short as possible.
(4) The bypass capacitor (eg 1 000 pF) should be attached to the V
CC pin.
(5) The matching circuit must be each attached to input and output pins.
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered in the following recommended conditions. Other soldering methods and conditions
than the recommended conditions are to be consulted with our sales representatives.
µ
PC8102T
Soldering process Soldering conditions
Infrared ray reflowPackage peak temperature: 235 ˚C,IR35-00-3
Hour: within 30 s. (more than 210 ˚C),
Time: 3 time, Limited days: no.*
VPSPackage peak temperature: 215 ˚C,VP15-00-3
Hour: within 40 s. (more than 200 ˚C),
Time: 3 time, Limited days: no.*
Wave SolderingSoldering tub temperature: less than 260 ˚C, Hour: within 10 s.WS60-00-1
Time: 1 time, Limited days: no.*
Pin part heatingPin area temperature: less than 300 ˚C, Hour: within 3 s/pin.
Limited days: no.*
Recommended condition
symbol
* It is the storage days after opening a dry pack, the storage conditions are 25 ˚C, less than 65 % RH.
NoteThe combined use of soldering method is to be avoided (However, except the pin area heating method).
For details of recommended soldering conditions for surface mounting, refer to information document SEMICON-
No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this
document.
NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents,
copyrights or other intellectual property rights of NEC Corporation or others.
While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customer must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
NEC devices are classified into the following three quality grades:
“Standard“, “Special“, and “Specific“. The Specific quality grade applies only to devices developed based on
a customer designated “quality assurance program“ for a specific application. The recommended applications
of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each
device before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices in “Standard“ unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact NEC Sales Representative in advance.
Anti-radioactive design is not implemented in this product.
20
M4 94.11
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