Page 1
DATA SHEET
BIPOLAR ANALOG INTEGRATED CIRCUIT
µ
PC8100GR
SILICON UP/DOWN CONVERTERS IC
FOR 800 MHz to 900 MHz MOBILE COMMUNICATIONS
DESCRIPTION
µ
PC8100GR is a silicon monolithic integrated circuit designed as up/down converters for 800 MHz to 900 MHz mobile
communications, mainly CT2. This IC consists of upconverter and downconverter, which are packaged in 20 pin SSOP.
Quadrature modulator IC (µPC8101GR) is also available as for kit-use with this IC. So, these pair devices contribute to
make RF block small, high-performance and low power-consumption.
This product is manufactured using NEC’s 20 GHz f
passivation film and gold electrodes. These materials can protect chip surface from external pollution and prevent corrosion
and migration. Thus, this product has excellent performance, uniformity and reliability.
T NESAT
III silicon bipolar process. This process uses silicon nitride
FEATURES
• Operating frequency – fRF = 800 MHz to 900 MHz, fIF = 50 MHz to 150 MHz, fLo = 650 MHz to 1 050 MHz
• Upconverter and downconverter are integrated in 1 chip.
• 20 pin SSOP suitable for high-density surface mounting.
• Wide operating voltage V
• Equipped with Power Save Function.
• Excellent linearity
CC = 2.7 to 4.5 V
APPLICATIONS
• Typical application – Digital cordless phone CT2.
• Further application – Digital cellular, etc.
ORDERING INFORMATION
PART NUMBER PACKAGE SUPPLYING FORM
µ
PC8100GR-E2 20 pin plastic SSOP Embossed tape 12 mm wide. QTY 2.5 kp/Reel.
(225 mil) Pin 1 indicates roll-in direction of tape.
Remark To order evaluation samples, please contact your local NEC sales office. (Order number: µPC8100GR)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. P10817EJ3V0DS00 (3rd edition)
Date Published October 1999 N CP(K)
Printed in Japan
Caution electro-static sensitive devices
The mark shows major revised points.
©
1995,1999
Page 2
INTERNAL BLOCK DIAGRAM AND PIN CONNECTIONS
µ
PC8100GR
20 19 18 17 16 15 14 13 12 11
REG. REG.
12345678 910
1.
GND
2.
RF BYPASS
3.
RF INPUT
4.
PEAKING OUT
5.
P/S (for DOWN CONV.)
6.
P/S (for UP CONV.)
CC
(for UP CONV.)
7.
V
RF OUTPUT
8.
GND
9.
MIX OUTPUT1
10.
MIX OUTPUT2
11.
GND
12.
IF BYPASS
13.
IF INPUT
14.
OSC INPUT (for UP CONV.)
15.
OSC BYPASS (for UP CONV.)
16.
OSC BYPASS (for DOWN CONV.)
17.
OSC INPUT (for DOWN CONV.)
18.
CC
(for DOWN CONV.)
V
19.
IF OUTPUT
20.
10
(Top View)
1
2
3
4
5
6
7
8
9
20
19
18
17
16
15
14
13
12
11
2
Data Sheet P10817EJ3V0DS00
Page 3
PIN EXPLANATION
µ
PC8100GR
PIN
ASSIGNMENT
NO.
1 GND 0.0 –
2 RF bypass – 1.1
3 RF input – 0.9
4 Peaking out – 0.12
APPLIED
VOLTAGE (V)
PIN VOLTAGE
(V)
FUNCTION AND APPLICATION EQUIVALENT CIRCUIT
Ground for downconverter.
Must be connected to the system ground
with minimum inductance. Ground pattern on the board should be formed as
wide as possible.
(Track length should be kept as short as
possible.)
Bypass of RF input for downconverter.
This pin is RF input for downconverter
designed as double balanced mixer.
This high-impedance input should be
matched with external chip inductor. (eg
4.7 nH).
Open emitter pin of low noise amplifier.
Grounded with capacitor (eg 3 pF) and
register (eg 22 Ω) serially.
REG.
3
4
CC
V
2
REG.
5
Power-save pin
for
downconverter
6
Power-save pin
for
upconverter
7VCC for 2.7 to 4.5 –
upconverter
8 RF output same as –
0 to 4.5 –
0 to 4.5 –
VCC through
intactor
This pin can control downconverter’s
ON/OFF operation with bias as follows;
Bias: V Operation
VPS
This pin can control upconverter’s ON/
OFF operation with bias as follows;
V
PS
Supply voltage for upconverter.
Must be connected bypass capacitor
(e.g 1 000 pF) to minimize ground impedance.
F output from upconverter.
Connect the VCC through inductor (eg 15
nH).
≥1.8 ON
0 to 1.0 OFF
Bias: V Operation
≥1.8 ON
0 to 1.0 OFF
5
6
REG.
or
8
9 GND 0.0 –
Ground for RF amplifier of upconverter.
Data Sheet P10817EJ3V0DS00
3
Page 4
PIN EXPLANATION
µ
PC8100GR
PIN
NO. (V)
ASSIGNMENT
10 MIX OUT 1 2.3
11 MIX OUT 2 2.3
12 GND 0*
13 IF bypass 1.03
14 IF input 1.03
PIN VOLTAGE
FUNCTION AND APPLICATION EQUIVALENT CIRCUIT
Mixer output from upconverter.
Mixer output from upconverter.
10 and 11 pins should be externally
equipped with tank circuit of inductor (eg
4.7 nH) and capacitor (eg 3.5 pF).
10 11
Ground for oscillator buffer amplifier and
mixer of upconverter.
Must be connected to the system ground
with minimum inductance. Ground
pattern on the board should be formed
as wide as possible.
(Track length should be kept as short as
possible.)
Bypass of IF input for upconverter.
This pin is IF input for upconverter
designed as double balanced mixer.
This high-impedance input should be
externally equipped with matching circuit
of inductor (eg 220 nH) and capacitor
(eg 1.5 pF).
14
V
CC
13
REG.
15 OSC input 1.8
(for upconverter)
16 OSC bypass 1.8
(for upconverter)
17 OSC bypass 1.85
(for downconverter)
18 OSC input 1.85
(for downconverter)
19 VCC supply for 2.7 to 4.5*
for downconverter
20 IF output 1.45
* Externally supply voltage
Local oscillator input for upconverter. Required for matching with register 51 Ω.
Bypass of local oscillator input for
upconverter.
Bypass of local oscillator input for
downconverter.
Local oscillator input for downconverter. Required for matching with
register 51 Ω.
Supply voltage for downconverter.
It must be connected bypass capacitor
(e.g 1 000 pF) to minimize ground
impedance.
IF output from downconverter.
V
CC
,
1815
,
1716
VCC
20
4
Data Sheet P10817EJ3V0DS00
Page 5
µ
PC8100GR
ABSOLUTE MAXIMUM RATINGS
Supply Voltage VCC TA = +25 °C 5.0 V
Power Dissipation P
D Mounted on 50 × 50 × 1.6 mm double copper 530 mW
of package allowance clad epoxy glass board at TA = +70 °C
Operating Temperature Topt –20 to +70 °C
Storage Temperature T
stg –65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
PARAMETERS SYMBOL MIN. TYP. MAX. UNIT
Supply Voltage VCC 2.7 3.0 4.5 V
Operating Temperature Topt –20 +25 +70 °C
ELECTRICAL CHARACTERISTICS (TA = +25 °C, VCC = 2.7 V, ZL = ZS = 50 Ω, unless otherwise specified;
VP/S ≥ 1.8 V)
PARAMETERS SYMBOL MIN. TYP. MAX. UNIT TEST CONDITIONS
UPCONVERTER BLOCK*
1
Circuit current ICC 13.0 25.0 35.0 mA No input signal
Conversion gain CG 17.5 20.5 25.5 dB PIFin = –40 dBm
RF output level PRFout 0 3 dBm PIFin = –10 dBm, 50 Ω load
Noise figure NF 13 18 dB DSB mode
Local leakage at RFout Lorf –25.0 –10.0 dBm PIFin = –10 dBm
IF leakage at RFout IFrf –12.0 –5.0 dBm PIFin = –10 dBm
Circuit current in power-save mode*
Power-save control voltage VP/S(ON) 1.8 4.5 V
Rise up time T up 2.5 5.0
DOWNCONVERTER BLOCK*
Circuit current ICC 8.0 15.0 22.0 mA No input signal
Conversion gain CG 15.0 18.0 23.0 dB PRFin = –40 dBm
IF output level PIFout –4.5 –2.0 dBm PRFin = –10 dBm, 50 Ω load
3rd order intermodulation distortion IM3 –45.0 –49.0 dBc
Noise figure NF 7.5 10 dB DSB mode
Circuit current in power-save mode*
3
ICC(P/S) 220 350
VP/S(OFF) 1.0 V
2
3
ICC(P/S) 220 350
µ
A 6PIN(P/S) ≤ 1.0 V
µ
s
fRFin1 = 866.4 MHz, PRFin1 = –40 dBm
fRFin2 = 866.8 MHz, PRFin2 = –40 dBm
µ
A 5PIN(P/S) ≤ 1.0 V
Power-save control voltage VP/S(ON) 1.8 4.5 V
VP/S(OFF) 1.0 V
Rise up time T up 2.5 5.0
*1 :fIFin = 150.05 MHz, fRFout = 864.05 to 868.05 MHz
fLoin = 1014.10 to 1018.1 MHz (–9 dBm)
*2 :fRFin = 864.05 to 868.05 MHz, fIFout = 150.05 MHz
fLoin = 1014.10 to 1018.1 MHz (–9 dBm)
*3 : Circuit current in power-save mode is total value of upconverter+downconverter
Data Sheet P10817EJ3V0DS00
µ
s
5
Page 6
µ
PC8100GR
STANDARD CHARACTERISTIC FOR REFERENCE (TA = 25 °C, VCC = 2.7 V, ZL = ZS = 50 Ω, unless otherwise
specified; VP/S ≥ 1.8 V)
PARAMETERS SYMBOL REFERENCE UNIT TEST CONDITIONS
UPCONVERTER BLOCK
3rd order intermodulation distortion IM3 –39.0 dBc fIFin1 = 150.4 MHz, PIF1 = –30 dBm
fIFin2 = 150.8 MHz, PIF2 = –30 dBm
DOWNCONVERTER BLOCK
IF output 1 dB compression P1dB –7.0 dBm
Local leakage at IFout Pin Loif –29.0 dBm Pin = –40 dBm
RF leakage at IFout Pin RFif –44.0 dBm Pin = –40 dBm
6
Data Sheet P10817EJ3V0DS00
Page 7
TEST CIRCUIT
Signal
Generator
(LO)
µ
PC8100GR
(IF)
Spectrum Analyzer
50 Ω
120 pF
Signal Generator
51 Ω
51 W
1.5 pF
220 nH
30
1 500 pF
30 pF30 pF30 pF
pF
120 pF120 pF
20 19 18 17 16 15 14 13 12 11
in
out
IF
GND
(D)
(D)
in
CC
V
LO
RFbyRFinPEAKING
(D)
(U)
by
by
LO
LO
PC8100GR
µ
out
P/S (D)
(U)
in
LO
P/S (U)
IF
(U)
CC
V
by
IF
out
RF
GND
GND
out2
MIX
out1
MIX
12345678910
120 pF 120 pF 3 pF
50 Ω
4.7 nH
22 Ω
180 pF
1 500 pF
15 nH
4.7 nH
120 pF
Spectrum Analyzer
50 Ω
(IF)
Signal Generator
50 Ω
4.7 nH
Data Sheet P10817EJ3V0DS00
7
Page 8
TEST CIRCUIT ASSEMBLED ON EVALUATION BOARD
IC MOUNTED SIDE
30 pF
OSC IN
30 pF
NEC
PC8100
µ
120 pF
Trimer condenser
µ
PC8100GR
OSC IN
OSC IN
IF IN
RF IN
RF OUT
120 pF
3 pF
22 Ω
COMPONENT MOUNTED SIDE
51 Ω
30 pF
120 pF
30 pF
120 pF
0 Ω
150 nH
1.5 pF
4.7 nH
IF IN
IF OUT
OSC IN
51 Ω
RF IN
IF OUT
8
120 pF
22 nH
4.7 nF
Data Sheet P10817EJ3V0DS00
4.7 nF
120 pF
RF OUT
Page 9
TYPICAL PERFORMANCE (Unless otherwise specified VCC = 2.7 V Vps ≥ 1.8 V)
– Downconverter block –
µ
PC8100GR
RF input frequency vs. Noise figure
15.0
Vcc = 2.7 V
LO sweep (–9 dBm)
TA = +25 ˚C
A
= +80 ˚C
T
T
A
= –30 ˚C
10.0
Noise Figure NF (dB)
5.0
100 500 1000
RF input frequency f
15.0
RF input frequency vs. Noise figure
Vcc = 4.5 V
LO sweep (–9 dBm)
TA = +25 ˚C
T
A
= +80 ˚C
T
A
= –30 ˚C
10.0
Noise Figure NF (dB)
5.0
100 500 1000
RF input frequency f
RFin
RFin
(MHZ)
(MHZ)
RF input frequency vs. Conversion Gain
20.0
15.0
Vcc = 2.7 V
LO sweep (–9 dBm)
RF sweep (–40 dBm)
Conversion Gain CG (dB)
IF = 150 MH
Z
10.0
100 500 1000
RF input frequency f
25.0
RF input frequency vs. Conversion Gain
20.0
Vcc = 4.5 V
15.0
LO sweep (–9 dBm)
RF sweep (–40 dBm)
Conversion Gain CG (dB)
IF = 150 MH
Z
10.0
100 500 1000
RF input frequency f
TA = +25 ˚C
T
T
RFin
(MHZ)
TA = +25 ˚C
T
T
RFin
(MHZ)
A
= +80 ˚C
A
= –30 ˚C
A
= +80 ˚C
A
= –30 ˚C
RF input level vs. IF output level and IM
10
(dBm)
3
0
–10
–20
–30
, 3rd order distortion IM
–40
out
RF
–50
–60
–70
IF output level P
–80
–40
–30 –20 –10 0 10
RF input level P
3
Vcc = 2.7 V
1
= 866.4 MH
RF
RF2 = 866.8 MH
Z
Z
LO = 1016 MHZ (–9 dBm)
TA = +25 ˚C
T
A
= +80 ˚C
A
= –30 ˚C
T
RFin
(dBm)
25
Vcc = 2.7 V
RF = 866 MH
LO = 1016 MH
20
15
Conversion Gain CG (dB)
10
5
–27
Data Sheet P10817EJ3V0DS00
LO input level vs. Conversion Gain
Z
(– 40 dBm)
Z
(– 9 dBm)
TA = +25 ˚C
T
A
= +80 ˚C
A
= –30 ˚C
T
–24 –21 –18 –15 –12 –9 –6 –3 0
LO input level P
LOin
(dBm)
9
Page 10
– Downconverter block –
µ
PC8100GR
RF input level vs. IF output level and IM
10
0
(dBm)
3
–10
–20
–30
Vcc = 4.5 V
–40
1
= 866.4 MH
RF
RF2 = 866.8 MH
–50
LO = 1016 MHZ (– 9 dBm)
–60
–70
IF output level 3rd order distortion IM
–80
–40 –30 –20 –10 0 10
RF input level P
RFin
(dBm)
P/S control voltage vs. Circuit Current
30.0
Vcc = 2.7 V
25.0
Z
Z
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
3
LO input level vs. Conversion Gain
25
20
15
Vcc = 4.5 V
RF = 866 MHZ (–40 dBm)
Conversion Gain CG (dB)
10
LO = 1016 MHZ (–9 dBm)
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
5
–27 –24 –21 –18
–15 –12 –9 –6 –3 0
LO input level P
LOin
(dBm)
P/S control voltage vs. Circuit Current
30.0
Vcc = 4.5 V
25.0
20.0
15.0
10.0
Circuit Current Icc (mA)
5.0
0
Power-save-control voltage V
Supply voltage vs. Circuit Current
50
Vcc = V
P/S
40
TA = +25 ˚C
TA = +80 ˚C
30
TA = –30 ˚C
20
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
4.03.02.01.00
P/S
5.0
20.0
15.0
10.0
Circuit Current Icc (mA)
5.0
0
Power-save-control voltage V
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
4.03.02.01.00
P/S
5.0
Circuit Current Icc (mA)
10
0
10
2.7 4.5
Supply Voltage Vcc (V)
4.03.02.01.00
Data Sheet P10817EJ3V0DS00
5.0
Page 11
– Upconverter block –
)
)
µ
PC8100GR
F input level vs. RF outpint level and IM
10
0
(dBm)
3
–10
–20
–30
–40
–50
Vcc = 2.7 V
IF
1
= 150.4 MH
IF2 = 150.8 MH
LO = 1016 MHZ (– 9 dBm)
–60
RFin
(dBm)
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
3
–70
RF output level 3rd order distortion IM
–80
–40 –30 –20 –10 0 10
IF input level P
Pin - Pout, IM
10
0
(dBm)
3
–10
–20
3
LC input level vs. Conversion Gain
25
20
15
Z
Z
10
Conversion Gain CG (dB)
Vcc = 2.7 V
IF = 150 MHZ (–40 dBm)
LO = 1016 MH
Z
TA = +25 ˚C
TA = +80 ˚C
LOin
(dBm)
TA = –30 ˚C
5
–27
–24 –21 –18 –15 –12 –9 –6 –3 0
LO input level P
LO input level - CG
25
20
–30
–40
–50
Vcc = 4.5 V
IF
1
= 150.4 MH
IF2 = 150.8 MH
LO = 1016 MHZ (–9 dBm)
–60
RFin
(dBm
TA = +25 ˚C
TA = +80 ˚C
TA = –30 ˚C
–70
RF output level 3rd order distortion IM
–80
–40 –30 –20 –10 0 10
IF input level P
15
Z
Z
10
Conversion Gain CG (dB)
Vcc = 2.7 V
IF = 150 MHZ (–40 dBm)
LO = 1016 MH
Z
TA = +25 ˚C
TA = +80 ˚C
LOin
(dBm
TA = –30 ˚C
5
–27
–24 –21 –18 –15 –12 –9 –6 –3 0
LO input level P
Data Sheet P10817EJ3V0DS00
11
Page 12
– Downconverter block –
µ
PC8100GR
P/S control voltage vs. Circuit Current
50
Vcc = 2.7 V
No input signal
40
30
20
Circuit Current Icc (mA)
10
0
Power-save-control voltage V
Supply voltage vs. Circuit Current
50
Vcc = V
P/S
No input signal
40
TA = +25 ˚C
T
A
= +80 ˚C
T
A
30
= –30 ˚C
TA = +25 ˚C
A
= +80 ˚C
T
T
A
= –30 ˚C
4.03.02.01.00
P/S
5.0
P/S control voltage vs. Circuit Current
50
40
30
20
Circuit Current Icc (mA)
10
0
Power-save control voltage V
Vcc = 4.5 V
No input signal
TA = +25 ˚C
A
= +80 ˚C
T
T
A
= –30 ˚C
4.03.02.01.00
P/S
5.0
20
Circuit Current Icc (mA)
10
0
Supply Voltage Vcc (V)
Recommended
operating range
2.7 4.5
4.03.02.01.00
5.0
12
Data Sheet P10817EJ3V0DS00
Page 13
TYPICAL APPLICATION
CT2 BLOCK DIAGRAM
µ
PC8100GR
RX
PLL
SW
µ
PG131GR
0°
TX
µ
PC8100GR
The application circuits and their parameters are for references only and are not intended for use in actual design-in's.
F/F
90°
µ
PC8101GR
DEMO
PLL
I
Q
I
Q
Data Sheet P10817EJ3V0DS00
13
Page 14
PACKAGE DIMENSIONS
20 PIN PLASTIC SSOP (225 mil) (UNIT: mm)
µ
PC8100GR
20
11
110
6.7 ± 0.3
1.8 MAX.
1.5 ± 0.1
detail of lead end
3˚
6.4 ± 0.2
4.4 ± 0.1
+7˚
–3˚
1.0 ± 0.2
0.5 ± 0.2
0.65
0.22
+0.10
–0.05
0.10
0.15
M
0.575 MAX.
0.15
+0.10
–0.05
0.1 ± 0.1
NOTE Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material condition.
14
Data Sheet P10817EJ3V0DS00
Page 15
µ
PC8100GR
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electrostatic sensitive devices.
(2) Form a ground pattern as wide as possible to minimize ground impedance (to prevent undesired oscillation).
(3) Keep the track length of the ground pins as short as possible.
(4) Connect a bypass capacitor (e.g. 1 000 pF) to the V
CC pin.
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered in the following recommended conditions. Other soldering method and conditions than
the recommended conditions are to be consulted with our sales representatives.
µ
PC8100GR
Soldering
process
Infrared ray reflow
VPS
Wave soldering
Partial heating method
Peak package’s surface temperature: 235 °C or below,
Reflow time: 30 seconds or below (210 °C or higher),
Number of reflow process: 2, Exposure limit*: None
Peak package’s surface temperature: 215 °C or below,
Reflow time: 40 seconds or below (200 °C or higher),
Number of reflow process: 2, Exposure limit*: None
Solder temperature: 260 °C or below,
Flow time: 10 seconds or below
Number of flow process: 1, Exposure limit*: None
Terminal temperature: 300 °C or below,
Flow time: 10 seconds or below,
Exposure limit*: None
Soldering conditions
*: Exposure limit before soldering after dry-pack package is opened.
Storage conditions: 25 °C and relative humidity at 65 % or less.
Note: Apply only a single process at once, except for “Partial heating method”.
For details of recommended soldering conditions for surface mounting, refer to information document SEMICONDUCTOR
DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
Symbol
IR35–00-2
VP15–00-2
WS60–00-1
Data Sheet P10817EJ3V0DS00
15
Page 16
µ
PC8100GR
ATTENTION
OBSERVE PRECAUTIONS
FOR HANDLING
ELECTROSTATIC
SENSITIVE
DEVICES
NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights
or other intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated “quality assurance program“ for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98.8
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