choice with this circuit) and observe THD at the sig
-
nal output. Set the trim for minimum THD.
RMS-Level Detector
The RMS detector’s input is similar to that of the
VCA. An input resistor (R
6
,10kW) converts the ac in
-
put voltage to a current within the linear range of the
4301. (Peak detector input currents should be kept
under 1 mA for best linearity.) The coupling capacitor
(C
3
,47mf) is recommended to block dc current from
preceeding stages (and from offset voltage at the in
put of the detector). Any dc current into the detector
will limit the low-level resolution of the detector, and
will upset the rectifier balance at low levels. Note
that, as with the VCA input circuitry, C
3
in conjunc
tion with R
6
will set the lower frequency limit of the
detector.
The time response of the RMS detector is deter
mined by the capacitor attached to C
T(C4
,10mf) and
the size of the current in pin I
T
(determined by R7,
2MW and the negative power supply, –15V). Since the
voltage at I
T
is approximately 0 V, the circuit of Figure
14 produces 7.5 mAinI
T
. The current in ITis mir
-
rored with a gain of 1.1 to the C
T
pin, where it is
available to discharge the timing capacitor (C
4
). The
combination produces a log filter with time constant
equal to approximately 0.026 C
T/IT
(~35 ms in the
circuit shown).
The waveform at C
T
will follow the logged (decibel) value of the input signal envelope, plus a dc offset of about 1.3 V (2 V
BE
). This allows a polarized
capacitor to be used for the timing capacitor, usually
an electrolytic. The capacitor used should be a
low-leakage type in order not to add significantly to
the timing current.
The output stage of the RMS detector serves to
buffer the voltage at C
T
and remove the 1.3 V dc off
-
set, resulting in an output centered around 0 V for in
put signals of about 85 mV. The output voltage
increases 6.5 mV for every 1 dB increase in input sig
nal level. This relationship holds over more than a
60 dB range in input currents.
Control Path
A compressor/limiter is intended to reduce its
gain as signals rise above a threshold. The output of
the RMS detector represents the input signal level
over a wide range of levels, but compression only oc
-
curs when the level is above the threshold. OA
1
is
configured as a variable threshold detector to block
envelope information for low-level signals, passing
only information for signals above threshold.
OA
1
is an inverting stage with gain of 2 above
threshold and 0 below threshold. Neglecting the ac
-
tion of the THRESHOLD control (R
12
) and its associ
-
ated resistors (R
11
and R10), positive signals from the
RMS detector output drive the output of OA
1
nega
-
tive. This forward biases CR
2
, closing the feedback
loop such that the junction of R
9
and CR2(the output
of the threshold detector) sits at -(R
9/R8
) RMS
OUT
. For
the circuit of Figure 14, this is –2 RMS
OUT
. Negative
signals from the RMS detector drive the output of
OA
1
positive, reverse biasing CR2and forward biasing
CR
1
. In this case, the junction of R9and CR2rests at
0 V, and no signal level informaion is passed to the
threshold detector’s output.
In order to vary the threshold, R
12
, the THRESH
-
OLD control, is provided. Via R
11
(383 kW), R12adds
up to ±39.2 mA of current to OA
1
‘s summing junction,
requiring the same amount of opposite-polarity cur
rent from the RMS detector output to counterbalance
it. At 4.99 kW, the voltage across R
8
required to pro
duce a counterbalancing current is ± 195 mV, which
represents a ±30 dB change in RMS detector input
level.
Since the RMS detector’s 0 dB reference level is
85 mV, the center of the THRESHOLD pot’s range
would be 85 mV, were it not for R
10
(2 MW), which
provides an offset. R
10
adds an extra –7.5 matoOA1‘s
summing junction, which would be counterbalanced
by 37.4 mV at the detector output. This corresponds
to 5.8 dB, offsetting the THRESHOLD center by this
much to 165 mV, or approximately -16 dBV.
The output of the threshold detector represents
the signal level above the determined threshold, at a
constant of about 13 mV/dB (from
[R
9/R8
] 6.5 mV/dB). This signal is passed on to the
COMPRESSION control (R
13
), which variably attenu-
ates the signal passed on to OA
2
. Note that the gain of
OA
2
, from the wiper of the COMPRESSION control to
OA
2
‘s output, is R16/R15(0.5), precisely the inverse of
the gain of OA
1
. Therefore, the COMPRESSION con
-
trol lets the user vary the above-threshold gain be
-
tween the RMS detector output and the output of OA
1
from zero to a maximum of unity.
The gain control constant of the VCA, 6.5 mV/dB,
is exactly equal to the output scaling constant of the
RMS detector. Therefore, at maximum COMPRES
SION, above threshold, every dB increase in input
signal level causes a 6.5 mV increase in the output of
OA
2
, which in turn causesa1dBdecrease in the VCA
gain. With this setting, the output will not increase
despite large increases in input level above threshold.
This is infinite compression. For intermediate set
-
tings of COMPRESSION,a1dBincrease in input sig
nal level will cause less thana1dBdecrease in gain,
thereby varying the compression ratio.
The resistor R
14
is included to alter the taper of
the COMPRESSION pot to better suit common use. If
a linear taper pot is used for R
13
, the compression ra
tio will be 1:2 at the middle of the rotation. However,
1:2 compression in an above-threshold compressor
is not very strong processing, so 1:4 is often pre
ferred at the midpoint. R
14
warps the taper of R13so
that 1:4 compression occurs at approximately the
midpoint of R
13
‘s rotation.
THAT Corporation; 45 Sumner Street; Milford, Massachusetts 01757-1656; USA
Tel: +1 (508) 478-9200; Fax: +1 (508) 478-0990; Web: www.thatcorp.com
Page 10 Rev. 04/10/02