Datasheet STF40NF06 Datasheet (ST)

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STF40NF06

N-CHANNEL 60V - 0.024Ω - 23A - TO-220FP

STripFET™II MOSFET

Table 1: Ge neral Features

TYPE V

STF40NF06 60 V < 0.028 Ω 23 A

■ TYPICAL R

■ EXCEPTIONAL dv/dt CAPABILITY

■ LOW GATE CHARGE AT 100°C

■ APPLICATION ORIENTED

DSS

(on) = 0.024Ω

DS

R

DS(on)

I

D

CHARACTERIZATION

■ 100% AVALANCHE TESTED

DESCRIPTION

This MOSFET is th e latest developm ent of STM i­croelectronics unique “Single Feature Size

™”

strip-based process. The resulting transistor
shows extremely high pac king density for low on­resistance, rugged avalance characteristics and
less critical alignment steps therefore a remark­able manufacturing reproducibility.

APPLICATIONS

■ DC-DC & DC-AC CONVERTERS

■ MOTOR CONTROL, AUDIO AMPLIFIERS

■ HIGH CURRENT, HIGH SPEED SWITCHING

■ SOLENOID AND RELAY DRIVERS

Figure 1: Package

3

2

1

TO-220FP

Figure 2: Internal Schematic Diagram

Table 2: Order Codes

Part Number Marking Package Packaging

STF40NF06 F40NF06 TO-220FP TUBE

Rev.2

1/9November 2004

STF40NF06

Table 3: Absolute Maximum ratings

Symbol Parameter Value Unit

V

DS

V

DGR

V

GS

I

D

I

D

I

DM

P

TOT

dv/dt (1) Peak Diode Recovery voltage slope 10 V/ns

E

AS

V

ISO

T

stg

T

j

(1) ISD ≤ 40A, di/dt ≤ 300A/µs, VDD ≤ V
(2) Starting T



) Pulse wi dt h l i m i ted by safe operating area

(

Drain-source Voltage (VGS = 0)
Drain-gate Voltage (RGS = 20 kΩ)

60 V

60 V
Gate- source Voltage ± 20 V
Drain Current (continuous) at TC = 25°C
Drain Current (continuous) at TC = 100°C

()

Drain Current (pulsed) 92 A
Total Dissipation at TC = 25°C

23 A

16 A

30 W
Derating Factor 0.2 W/°C

(2)

Single Pulse Avalanche Energy 250 mJ
Insulation Withstand Voltage (DC) 2500 V
Storage Temperature
Operating Junction Temperature

=25°C, ID=20A, VDD=30V

j

(BR)DSS

, Tj ≤ T

JMAX.

.

–55 to 175 °C

Table 4: Thermal Data

Rthj-case Thermal Resistance Junction-case Max 5.0 °C/W

T

l

ELECTRICAL CHARACTERISTICS (T

Maximum Lead Temperature For Soldering Purpose 275 °C

=25°C UNLESS OTHERWISE SPECIFIED)

CASE

Table 5: Off

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

(BR)DSS

Drain-source

ID = 250 µA, VGS = 0 60 V

Breakdown Voltage

I

DSS

I

GSS

Zero Gate Voltage
Drain Current (V

GS

Gate-body Leaka ge
Current (V

DS

= 0)

V

= Max Rating

= 0)

DS

VDS= Max Rating, TC= 125°C
V

= ± 20V ±100 nA

GS

1µA

10 µA

Table 6: On

Symbol Parameter Test Conditions Min. Typ. Max. Unit

V

V

GS(th)

R

DS(on)

Gate Threshold Voltage
Static Drain-source On

Resistance

= VGS, ID = 250µA

DS

24V

VGS = 10V, ID = 11.5 A 0.024 0.028 Ω

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STF40NF06

ELECTRICAL CHARACTERISTICS (CONTINUED)
Table 7: Dynamic

Symbol Parameter Test Conditions Min. Typ. Max. Unit

(1) Forward Transconductance VDS = 30 V

g

fs

C

iss

C

oss

C

rss

Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance

V

DS

ID

= 25V, f = 1 MHz, VGS = 0 920

Table 8: Switching On

Symbol Parameter Test Conditions Min. Typ. Max. Unit

t

d(on)

Q
Q
Q

Turn-on Delay Time

t

r

g
gs
gd

Rise Time

Total Gate Charge
Gate-Source Charge
Gate-Drain Charge

VDD = 30V, ID = 20A
R

=4.7Ω VGS = 10V

G

(see Figure 16)
VDD = 48V, ID = 10A,

VGS = 10V

=11.5A 12 S

225

80

27
11

32

43 nC

6.5
15

pF
pF
pF

ns
ns

nC
nC

Table 9: Switching Off

Symbol Paramet er Test Conditions Min. Typ. Max. Unit

t

d(off)

Turn-off-Delay Time

t

f

Fall Time

VDD = 30V, ID = 20A,
RG=4.7Ω, V

GS

= 10V

27
11

(see Figure 16)

Table 10: Source Drain Diode

Symbol Parameter Test Conditions Min. Typ. Max. Unit

I

SD

I

(2)

SDM

VSD (1)

t

rr

Q

rr

I

RRM

(1) Pulsed: Pulse du rat i on = 300 µs, duty cycle 1. 5 %.
(2) Pulse width limited by safe operating area.

Source-drain Current 23 A
Source-drain Current (pulsed) 92 A
Forward On Voltage
Reverse Recovery Time

Reverse Recovery Charge
Reverse Recovery Current

ISD = 23A, VGS = 0

= 40A, di/dt = 100A/µs,

I

SD

V

= 10V, Tj = 150°C

DD

(see test circuit, Figure 5)

1.3 V

63

150

4.8

ns
ns

ns
nC

A

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STF40NF06

Figure 3: Safe Operating Area

Figure 4: Output Characteristics

Figure 6: Thermal Impedance

Figure 7: Transfer Characteristics

Figure 5: Transconductance

4/9

Figure 8: Static Drain-source On Resistance

STF40NF06

Figure 9: Gate Charge vs Gate-source Voltag e

Figure 10: Normalized Gate Thereshold Volt­age vs Temperature

Figure 12: Capacitance Variations

Figure 13: Normal ized On R esistance vs Tem­perature

Figure 11: S ource-Drain Diode Forw ard Char­acteristics

Figure 14: Normalized Breakdown Voltage vs
Temperature

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STF40NF06

Figure 15: Unclamped Inductive Load Test Cir­cuit

Figure 16: Switching Times Test Circuit For
Resistive Load

Figure 18: Unclamped Inductive Wafeform

Figure 19: Gate Charge Test Circuit

Figure 17: Test Circuit For Inductive Load
Switching and Diode Recovery Times

6/9

TO-220FP MECHANICAL DATA

STF40NF06

DIM.

A 4.4 4.6 0.173 0.181
B 2.5 2.7 0.098 0.106
D 2.5 2.75 0.098 0.108
E 0.45 0.7 0.017 0.027

F 0.75 1 0.030 0.039
F1 1.15 1.7 0.045 0.067
F2 1.15 1.7 0.045 0.067

G 4.95 5.2 0.195 0.204
G1 2.4 2.7 0.094 0.106

H 10 10.4 0.393 0.409
L2 16 0.630
L3 28.6 30.6 1.126 1.204
L4 9.8 10.6 .0385 0.417
L5 2.9 3.6 0.114 0.141
L6 15.9 16.4 0.626 0.645
L7 9 9.3 0.354 0.366

Ø 3 3.2 0.118 0.126

MIN. TYP MAX. MIN. TYP. MAX.

mm. inch

E

A

D

B

L3

L6

L7

F1

F

G1

H

F2

123

L4

L2

L5

G

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STF40NF06

Table 11: Revision History

Date Revision Description of Change s

07-Oct-2004 1 First release

11-Nov-2004 2 Final datasheet

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STF40NF06

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