Datasheet STA575 Datasheet (SGS Thomson Microelectronics)

100+100W STEREO POWER AMPLIFIER

■

MONOCHIP BRIDGE STEREO AMPLIFIER
ON BASH

■

80+80W OUTPUT POWER @ RL = 4/8
THD = 0.5%

■

100+100W OUTPUT POWER @ RL = 4/8
THD = 10%

■

HIGH DYNAMIC PREAMPLIFIER INPUT
STAGES

■

EXTERNAL PROGRAMMABLE FEEDBACK
TYPE COMPRESSORS

■

AC COUPLED INPUT TO CLASS AB BRIDGE
OUTPUT AMPLIFIER

■

PRECISION RECTIFIERS TO DRIVE THE
DIGITAL CONVERTER

■

ON-OFF SEQUENCE/ TIMER WITH MUTE
AND STANDBY

■

PROPORTIONAL OVER POWER OUTPUT
CURRENT TO LIMIT THE DIGITAL
CONVERTER

■

ABSOLUTE POWER BRIDGE OUTPUT

®

ARCHITECTURE

Ω,

Ω,

STA575

FLEXIWATT27

TRANSISTOR POWER PROTECTION

■

ABSOLUTE OUTPUT CURRENT LIMIT

■

INTEGRATED THERMAL PROTECTION

■

POWER SUPPLY OVER VOLTAGE
PROTECTION

■

FLEXIWATT POW ER PAC KAG E WI TH 2 7 PIN

■

BASH® LICENCE REQUIRED

DESCRIPTION

The STA575 is a fully integrated power module de­signed to implement a BASH® amplifier when used
in conjunction with STABP01 digital processor.

BLOCK DIAGRAM

July 2003

IN_PRE1

ATT_REL1

TRK_OUT

THRESH

ATT_REL2

IN_PRE2

COMPRESSOR

V/l

S1

Ict

Ict

S1

V/l

COMPRESSOR

-VSGND+VS

+

-

PEAK/2

DETECTOR

PEAK/2

DETECTOR

-

+

PWR_INP1TRK_1OUT_ PRE1

ABSOLUTE

VALUE
BLOCK

∆G

∆G

ABSOLUTE

VALUE
BLOCK

TRK_2OUT_ PRE2

+2

OUTPUT BRIDGE

SOA

VOLTAGE

PROTECTION

THERMAL

PROTECTION

PWR_INP2

DETECTOR

TURN-

ON/OFF

SEQUENCE

+2

OUTPUT BRIDGE CD-2

-1

-1

D01AU1263

CD+1
OUT1+

OUT1-

CD-1

CD+

PROT.

STBY/MUTE

CD+2
OUT2+

OUT2-

1/20

STA575

DESCRIPTION

(continued)

Notice that normally only one Digital Converter is needed to supply a stereo or multi-channel amplifier system,
therefore most of the functions implemented in the circuit have summing outputs

The signal circuits are bias ed by fixed negative and posi tive voltages r eferred to Ground. Instead the final stag­es of the output amplifiers are supplied by two external voltages that are following the audio signal . In this way
the headroom for the output transistors is kept at minimum level to obtain a high efficiency power amplifier.

The Compressor circuits, one for each channel, performs a particular transfer behavior to avoid the dynamic
restriction that an adaptive system like this requires. To have a high flexibility the attack / release time and the
threshold levels are exter nal ly progr ammable. The tracking s ignal for the ex ter nal digita l converter is generated
from the Absolute Value block that rectifies the audio signal present at the compressor output. The outputs of
these blocks are decoupled by a diode to permit an easy sum of this signal for the mult ichannel application. The
output power bridges have a dedicated input pin to perform an AC decoupling to cancel the compressor output
DC offset. The gain of the stage is equal to 4 (+12dB). A sophis ticated circuit performs the output transistor pow­er detector that , with the digital converter, reduces the power supply voltage . Moreover, a maximum current
output limiting and the over temperature sensor have been added to protect the circuit itself. The external volt­age applied to the STBY/MUTE pin forces the two amplifiers in the proper condition to guarantee a silent turn­on and turn-off.

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

+V

Positive supply voltage referred to pin 13 (GND) 30 V

s

-V

V

CD+

V

CD+

V

CD-

V

CD-

V

Att_Rel1

V

Att_Rel2

V

Pwr_Imp1

V

Pwr_Imp2

V

Trk_1

V

Trk_2

V

In_pre1

V

In_pre2

V

threshold

Negative supply voltage referred to pin 13 (GND) -24 V

s

Positive supply voltage tracking rail referred to pin 13 (GND) 22 V

Positive supply voltage operated to Vs+
Negative supply voltage referred to -Vs

Negative supply voltage tracking rail referred to pin 13 (GND) -22 V
Pin 3, 25 Negative & Positive maximum voltage referred to GND

(pin 13)
Pin 7, 21, 18, 10 Negative & Positive maximum voltage referred to

GND (pin 13)

Pin 8, 20 Negative & Positive maximum voltage referred to GND
(pin 13)

Pin 17 Negative & Positive maximum voltage referred to GND (pin

13)

I

stb-max

V

stbymute

I

out

Note 1: V
Note 2: All pin s wi t h s tand ±2KV ESD but not pin 11

Pin 11 maximum input current (Internal voltage clamp at 5V) 500 µA
Pin 11 negative maximum voltage referred to GND (pin 13) -0.5 V
Output current 7.7 A

must not be more negative than -Vs and V

CD-

(1)

(1)

must not be more positive than +V

CD+

0.3 V

-0.3 V

-0.5 to +20 V

-20 to +20 V

-0.5 to +0.5 V

-7 to +0.5 V

S

2/20

STA575

THERMAL DATA

Symbol Parameter Value Unit

T

Max Junction temperature 150 °C

j

R

th j_case

Thermal Resistance Junction to case .............................. ..max 1 °C/W

OPERATING RANGE

Symbol Parameter Value Unit

+V

-V

∆V

V

CD+

V

CD-

I

in_Max

V

trheshold

T

amb

I

sb_max

Positive supply voltage +20 to +28 V

s

Negative supply voltage -10 to -23 V

s

Delta positive supply voltage 5V ≤ (Vs+ - VCD+) ≤ 10V V

s+

Positive supply voltage tracking rail +3 to 20.7 V
Negative supply voltage tracking rail -20.7 to -3 V
Current at pin In_Pre1, In_Pre2, related to compressor behaviour -1 to +1 mA peak
Voltage at pin Threshold -5 to 0 V
Ambient Temperature Range 0 to 70 °C
Pin 11 maximum input current (Internal voltage clmp at 5V) 200 µA

PIN CONNECTION

1

S

-V
CD-1

Note: Slug c onnected to pi ns n. 1 and 27

OUT1+

ATT-REL1

OUT1-

CD+1

PWR_INP1

IN_PRE1

OUT_PRE1

TRK_1

STBY/MUTE

S

+V

CD+

GND

PROTECTION

TRK_OUT

THRESHOLD

TRK_2

OUT_PRE2

IN_PRE2

PWR_INP2

CD+2

OUT2-

OUT2+

27

CD-2

ATT_REL2

D01AU1251

-Vs

3/20

STA575

PIN FUNCTION

N° Name Description

1 - Vs Negative Bias Supply
2 CD-1 Channel 1 Time varying tracking rail negative power supply
3 Att_Rel1 Attack release rate for channel 1
4 Out1+ Channel 1 speaker positive output
5 Out1- Channel 1 speaker negative output
6 CD+1 Channel 1 positive power supply
7 Pwr_Inp1 Input to channel 1 power stage
8 In_pre1 Pre-amp input for channel 1 (virtual ground)

9 Out_pre1 Output channel 1 pre-amp
10 Trk_1 Absolute value block input for channel 1
11 Stby/mute Standby/mute input voltage control
12 Protection Protection signal for STABP01 digital processor
13 Gnd Analog Ground
14 +Vs Positive Bias Supply
15 CD+ Time varying tracking rail positive power supply
16 Trk_out Reference output for STABP01 digital processor
17 Threshold Compressor threshold input
18 Trk_2 Absolute value block input for channel 2
19 Out_pre2 Output channel 2 pre-amp
20 In_pre2 Pre-amp input for channel 2 (virtual ground)
21 Pwr_Inp2 Input to channel 2 power stage
22 CD+2 Channel 2 positive power supply
23 Out2- Channel 2 speaker negative output
24 Out2+ Channel 2 speaker positive output
25 Att_Rel2 Attack release rate for channel 2
26 CD-2 Channel 2 Time varying tracking rail negative power supply
27 -Vs Neg ative Bias Supply

4/20

STA575

ELECTRI CAL CH ARAC TER ISTC S

Ω

8

, external components at the nominal value f = 1KHz, Tamb = 25°C unless otherwise specified

(Test Condition: Vs+ = 28V, Vs- = -23V, V

= 20V, V

CD+

= -20V, RL =

CD-

Symbol Parameter Test Condition Min. Typ. Max. Unit

PREAMPLIFIER AND COMPRESSOR

V

out clamp

V

control

VC

Voffset Output Offset at Out_pre pin with: V

THD Distortion at Out_pre: V

Maximum Voltage at Out_pre pin 9 11 13 Vpeak

I

Audio input current 0.8 mA

in

Voltage at Attack_Release pin Attenuation = 0dB

Attenuation = 6dB
Attenuation = 26dB

Input voltage range for the

omp_
Th

compression

Z

Input impedance of Threshold pin 100 KΩ

th

= 0V; Attenuation = 0dB

CRT

V

= 0.5V; Attenuation = 6dB

CRT

V

= 9V;

Attenuation = 26dB

= 0V; Attenuation = 0dB
= 0.5V; Attenuation = 6dB
= 9V;

Attenuation = 26dB

= 0V; Attenuation = 0dB
= 0.5V; Attenuation = 6dB
= 9V;

Attenuation = 26dB

EN Noise at Out_pre pin : V

V
V

V
V

CRT

CRT
CRT
CRT

CRT
CRT
CRT

0.35
6

-5 -1 V

-15

-250

-1000

0

0.5
9

0.01

10

50
60

(2)

0.65
12

15

250
450

0.1

0.5
2

V
V
V

mV
mV
mV

%
%
%

µV
µV
µV

Attack time current at pin

I

ct

Attack_release

1. This value is due to the thermal noise of the external resistors Rr and Ri.

TRACKING PARAM ETER S

G

V

trk_out

I

trk_out

Z

Tracking reference voltage gain 13 14 15 V

trk

Tracking ref. output voltage 0 20 V
Current capability 5 6 7 mA
Input impedance (T

trk_in

)1MΩ

RK1/2

OUTPUT BRIDGE

G

G

∆G

P

Half Output bridge gain 5.5 6 6.5 dB

out

Output bridge differential gain 11 12 13 dB

ch

Output bridges gain mismatch -0 .5 0.5 dB

ch

Continuous Output Power THD = 0.5%

out

THD = 10%
THD = 10%; RL= 4Ω; V

V

= -16V; VS+ = 22V; VS- = -22V

CD-

THD Total harmonic distortion of the

Po = 5W 0.01 0.1 %

output bridge

f = 20Hz to 20KHz; Po = 50W 0.2 %

CD+

= 16V;

0.5 1.5 3 mA

75
9580100

W
W

90 100 W

V

Output bridge D.C. offset -70 70 mV

Off

5/20

STA575

ELECTRICAL CHARACTERISTCS

(continued)

Symbol Parameter Test Condition Min. Typ. Max. Unit

EN

Noise at Output bridge pins f = 20Hz to 20KHz; Rg = 50Ω 12 µV
Z
R

OLG

Input impedance 100 140 180 KΩ

br_in

Output power Rdson IO = 1A 200 400 mΩ

dson

Open Loop Voltage Gain 100 dB

GB Unity Gain Bandwidth 1.4 MHz
SR Slew Rate 8V/µs

PROTECTION

V

V

V

Stby voltage range 0 0.8 V

stby

Mute voltage range 1.6 2.5 V

mute

Play voltage range 4 5 V

play

T

First Over temperature threshold 130 °C

h1

Second Over temperature

T

h2

150 °C

threshold

Unbal.

Ground

Upper Unbalancing ground

threshold

Referred to (CD

+

- CD-)/2

5V

Unbal.

Ground

UV

th

P

d_reg.

Lower Unbalancing ground

threshold

Referred to (CD

Under voltage threshold |Vs+| + |Vs-| 18 20 22 V

Power dissipation threshold for

I

= 50µA; @ Vds = 10V 26 32 39 W

prot

+

- CD-)/2

system regulation

P

d_max

Switch off power dissipation

@ Vds = 10V 60 W

threshold

I

Protection current slope for Pd > Pd

prot

I

Limiting Current threshold 6.3 7 7.5 A

lct

reg

I+Vs Positive supply current Stby (Vstby/mute pin = 0V)

Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)2020

I-Vs Negative supply current Stby (Vstby/mute pin = 0V)

Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)2020

ICD+ Positive traking rail supply current Stby (Vstby/mute pin = 0V)

Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)

ICD- Negative traking rail supply current Stby (Vstby/mute pin = 0V)

Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)

50
60
60

50
60
60

-5 V

400 µA/W

5
35
35

5
35
35

100
110
110

100
110
110

7
50
50

7
50
50

200
180
180

200
180
180

mA
mA
mA

mA
mA
mA

µA
mA
mA

µA
mA
mA

6/20

STA575

FUNCTIONAL DESCRIPTION

The circuit contains all the blocks to build a stereo amplifier. Each si ngle channel is based on the Output Bridge
Power Amplifier, and its protection circuit. Moreover, the compression function and a signal rectifier are added
to complete the circuit.

The operation modes are driven by The Turn-on/off sequence block. In fact the IC can be set in three states by
the Stby/mute pin:

Standby ( V
In the Standby mode all the circuits involved in the signal path are in off condition, instead
in Mute mode the circuits are biased but the Speakers Outputs are forced to ground potential.
These voltages can be get by the external RC network connected to Stby/Mute pin.
The same block is used to force quickly the I.C. In standby mode or in mute mode when the I.C. dangerous

condition has been detected. The RC network in these cases is used to delay the Normal operation restore.
The protection of the I.C. are implemented by the Over Temperature, Unbalance Ground, Output Short circuit,

Under voltage, and output transistor Power sensing as shown in the following table:

Table 1. Protection Implementation

Fault Type Condition Protection strategy Action time Release time

Chip Over
temperature

Chip Over
temperature

Unbalancing
Ground

Short circuit Iout > 7A Standby Fast Slow, related to

Under Voltage |Vs+| + |Vs-|< 20V Standby Fast Slow, related to

Extra power
dissipation
at output transistor

Maximum power
dissipation
at output transistor

< 0.8V), Mute (1.6V < V

pin

Tj > 130 °C Mute Fast Slow Related to

Tj > 150 °C Standby Fast Slow, Related to

|Vgnd| > ((CD+) ­(CD-))/2 + 5V

Pd tr. > 32W Reducing DIGITAL

Pd tr. > 60W Standby Fast Slow, related to

< 2.5V), and Play (V

pin

Standby Fast Slow, Related to

CONVERTER output
voltage.

> 4V).

pin

Related to the
DIGITAL
CONVERTER

Turn_on sequence

Turn_on sequence

Turn_on sequence

Turn_on sequence

Turn_on sequence
Related to the

DIGITAL
CONVERTER

Turn_on sequence

See the POWER PROTECTION paragraph for the details

Compression

An other important function implemented, to avoid high power dissipation and clipping distortion, is the Com­pression of the signal input. In fact the preamplifier stage performs a voltag e gain equal to 5, fixed by Ri and Rr
external resistor, but in case of high input signal or low power supply voltage, its gain could be reduced of 26dB.
This function is obtained with a feedback type compressor that , in practice, reduces the impedance of the ex­ternal feedback network. The behavior of c ompression it's i nternally fixed but depends fr om the Audio input volt­age signal level, and from the Threshold voltage applied to the Threshold pin. The attack and release time are
programmable by the external RC network connected to the Att_Rel pins.

The constraints of the circuit in the typical application are the following:
Vthreshold range = -5 to 0
Vin peak max = 8V
Vout peak max = 10V

7/20

STA575

Gain without compression (G) = 5
Max Attenuation ratio = 26 dB
The following graph gives the representation of the Compressor activation status related to the Vthreshold and

the input voltage. The delimitation line between the two fields, compression or not, is expressed by the formula :

2 Vthreshold 200mV

--------------------------------------------------------------------------

+()⋅

G

Where G is the preamplifier gain without compression.
In the compression region the gain of the preamplifier will be reduced
(G = 2·Vthreshold/Vin) to maintain at steady state the output voltage equal 2*|Vthreshold| .
Instead in the other region the compressor will be off (G = 5).
The delimitation line between the two fields can be related to the output voltage of the preamplifier: in this case

the formula is :

V

2 Vthreshold 200mV

out

+()⋅=

Figure 1. Compressor activation field

PEAK

V

IN

8

6

COMPRESSION

4

G < 5

2

G = 5

D01AU1264

2345

1

|Vthreshold|

The relative attenuation introduced by the variable gain cell is the following :

Attenuation 20

log

⋅=

V

5

in_peak

+()

200mV

V

2

th

-- -

----------------------------------------- -

The total gain of the stage will be:

Gdb = 20log5 + Attenuation

The maximum input swing is related to the value of input resistor, to guarantee that the input current remain
under Iin_Max value (1 mA).

V

in_peak

--------------------- ->

R

i

I

in_max

8/20

Figure 2. Compressor attenuation vs. input amplitude

Attenuation(dB)

0

-6

STA575

-12

|Vth=5|

|Vth=2.5|

-18

|Vth=1|

-24

D01AU1265

2345

1

678

|Vinpk|

ABSOLUTE VALUE BLOCK

The absolute value block rec tifies the signal after the c ompressio n to extract the c ontrol voltage for the ex ternal
digital converter. The output voltage swing is internally limited, the gain is internally fixed to 14.

The input impedance of the rectifier is very high , to allow the appropriate filtering of the audio signal before the
rectification (between Out_pre and Trk pins).

OUTPUT BRIDGE

The Output bridge amplifier makes the single-ended to Differential conversion of the Audio signal using two
power amplifiers, one i n non-inver ting configuration with gain equal to 2 and the other in inv er ting confi guration
with unity gain. To guarantee the high input impedance at the input pins, Pwr_Inp1 and Pwr_Inp2, the second
amplifier stages are driven by the output of the first stages respectively.

POWER PROTECTION

To protect the output transistors of the power bridge a power detector is implemented (fig 3).
The current flowing in the power bridge and trough the series resistor Rsense is measured reading the voltage

drop between CD+1 and CD+. In the same time the voltage drop on the relevant power (Vds) is internally mea­sured. These two voltages are converted in current and multiplied: the resulting current , Ipd, is proportional to
the instantaneous dissipated power on the relevant output transistor. The current Ipd is compared with the ref­erence current Ipda, if bigger (dissipated power > 32W) a current, Iprot, is supplied to the Protection pin. The
aim of the current Iprot is to reduce the reference voltage for the digital converter supplying the power stage of
the chip, and than to reduce the dissipated power. The respons e time of the system must be les s than 200

µ

Sec
to have an effective protection. As further protection, when Ipd reaches an higher threshold (when the dissipated
value is higher then 60W) the chip is shut down, forcing low the Stby/Mute pin, and the turn on sequence is
restarted.

9/20

STA575

Figure 3. Power Protection Block Diagram

R

SENSE

CD+1

CD+

ILOAD

V/I

OC1

ILIM CURRENT COMP

TO TURN-ON/OFF
SEQUENCE

OPA

MULTIPLIER

V/I

CD-

I_PD

OUT1-OUT1+

X

OPA

IPD

IPDP

IPD

IPDA

PDP1

CURRENT COMP

IPROT

D01AU1266

TO TURN-ON/OFF
SEQUENCE

TO PROT PAD

In fig. 3 there is the power protection strategy pictur es. Under the curve of the 32W power, the chip is in nor mal
operation, over 60W the chip is forced in Standby. This las t status would be reached if the digital converter does
not respond quikly enough reducing the stress to less than 60W.

The fig.4 gives the protection current, Iprot, behavior. The current sourced by the pin Prot follows the formula:

–

⋅⋅

4

for P

< P

d

d_av_th

the I

prot

= 0

PdP

d_av_th

----------------------------------------------------------------- -

I

≡

prot

1.25V

)–( 510

Independently of the output voltage, the chip is also shut down in the folowing conditions:
When the currentthrough the sensing resistor, R

, reaches 7A (Voltage drop (CD+) - (CD+1) = 700mV).

sense

When the average junction temperature of the chip reaches 150°C.
When the ground potential differ from more than 5V from the half of the power supply voltage, ((CD+)-(CD-))/2

|

| +

Vs+

When the sum of the supply voltage

|Vs-| <20V

The output bridge is muted when the average junction temperature reaches 130°C.

10/20

Figure 4. Powe r prot ection thresh ol d Figure 5. Protection current behaviour

V

STA575

Ids (mA)

Ilim = 6A

7
6

Standby

BucK

4

Pd_M ax = 48W

Limitation

2

Normal

Pd_reg = 25W

Operation

Vds (

10 20 30 40

50

Figure 6. Test Circuit for STA575 Stand-alone

C17

R3 R9

INPUT1

R1

R5

C3

OUT_PRE1

IN_PRE1

ATT_REL1

8

3

Iprot(mA)

20

10

Iprot slope=0.4mA/W

10

D01AU1268

C5

R7 R11

C7

TRK_1 PWR_INP1

9107

20 30 40 50 60

C1

OUT1+

4

5

OUT1-

Pd(W)

5V

R13

CD+

+V

S

-V

S

CD-

TRK-OUT

R20

D1

C12

C13

PROT

R19

R24

C14

R22

THRESH

R16

R17

C10

C15

R18

CD+1

CD+

CD+2

+V

GND

C11

-V

-V
CD-1
CD-2

TRK-OUT

PROT

THRESH

6
15
22

S

14

13

27

S

1

S

2
26
16
12
17

C2

R8R12

191821

OUT_PRE2TRK_2PWR_INP2

C8

C6

11

24

23

25

20

R4R10

C16

STBY/
MUTE

OUT2+

OUT2-

ATT_REL2
IN_PRE2

R14

C9

C4

R6

R2

D01AU1267

MUTE STBY

R15

INPUT2

11/20

STA575

Cct attack

Ict

Vcontrol

------------------------ -

=

EXTER NA L COM P ON EN T S

Name Function Value Formula

Ri

R1 = R2

Rr

R3 = R4

Cac

C1 = C2

Cct

C3 = C4

R5 = R6 Release constant time Resistor 470KΩ

R7 = R8 Resistor for tracking input voltage

R9 = R10 Resistor for tracking input voltage

R11 = R12 Resistor for tracking input voltage

Input resistor 10KΩ

Feedback resistor 50KΩ

AC Decoupling capacitor 100nF

Capacitor for the attack time 2.2µF

filter

filter

filter

(refer to fig. 6

)

(|G| = 5, Rr = 50KΩ)

(|G| = 5, Ri = 10KΩ

(fp = 16Hz,

Rac =100KΩ )

(Tattack = 13mSec,

Vcontrol = 9V,

Ict = 1.5mA)

(t = 1 Sec. ,

Cct = 2.2 µF )

10KΩ

56KΩ

10KΩ

Cac

R

i

Rr G Rr⋅=

-------------------------------- -=

2π fp Rac⋅⋅

Rct

Rr

-------=

G

---------=

Cct

1

τ

C5 = C6 Capacitor for Tracking input

voltage filter

C7 = C8 Dc decoupling capacitor 1µF

R13 Bias Resistor for Stby/Mute

function
R14 Stby/Mute constant time resistor 30KΩ
R15 Mute resisto r 30KΩ

C9 Capacitor for Stby/Mute resistor 2.2µF

R16 = R17 Sensing resistor for SOA detector 100mΩ

R18 Conversion resistor for threshold

voltage

C10 = C11 Power supply filter capacitor 100nF
R22 = R24 Centering resistor 400 Ω , 1W
C12 = C13 Tracking rail power supply filter 680nF

R19 Protection 1KΩ
R20 TRK_out 40KΩ

C14 = C15 Power supply filter capacitor 470 µF , 63V
C16 = C17 Feedback capacitor 100pF

1nF

10KΩ

5% 4W
100KΩ

D1 Schottky diode SB360

Note: Vco ntrol is the voltage at Att_Rel pin.

12/20

STA575

APPLICATION HINTS

(refer to fig. 6)
PREAMPLIFIER AND COM PRESSOR
In the test circuit showed in figure 6, R
If the input signal is very low, is possible to increase the gain fixing the product Vin
In that case is possible to increase G decreasing R

cuitbehavior and remaining in the operating range I

(or R2/R4) ratio fix the gain of the preamplifier.

1/R3

from 10KΩ until 2KΩ without relevant effetcs on the cir-

1,2
in_max

= V

in_max/R1(2)

,<1mA.

∗

G = cost.

So it is possible to increase the preamplifier gain until 25.
If no compression is present (equivalnt compressor Gm=0), the effects are:

– T he outp ut voltage offset increase
– T he SNR decrease

The following table shows these variations:

R

1,2

10KΩ 8V 5 15mV 10µV

5KΩ 4V 10 30mV 13µV
2KΩ 1.6V 25 75mV 20µV

= 50KΩ and all the other external components are the same

R

3(4)

V

IN MAX

G

V

OFFSET

EN

Attenuation = 0 dB
If the compression is active the circuit behaviour is the same.
It”s also possible to eliminate the compressor. In this case the ATT_REL (1,2) pin must be connected to gnd.

STBY-MUT E CIRCUIT
In the suggested application circ uit (figure 6), the resistor for Standby/Mute function (R

) is connected between

13

the Standby/Mute switches and 5V Supply.
It is possible to connect the resistor to another Supply Voltage level V

(R

) must be changed according to the following formula (fixing V

13,14

R

R

13

14

4VL10–⋅()KΩ=

4VL10+⋅()KΩ=

, but in that case also the resistor value

L

STBY/MUTE

= 2.5V and R15 = 10KΩ):

HEADROOM

Ω

(R

In the suggested application circuit the supply voltage to obtain 75W (Power Output) on 8

load

)

is:

V

supply

∆VI

,

LMAX

⋅+=

R

DSon

It is also possible to increase the system’s efficiency forcing the headroom to follow the output signal (variable
drop insteadof a constant drop).

In that case:

V

supply

∆VI

V()R

L

⋅+=

DSon

13/20

STA575

Figure 7. BASH® module SAM351 5.1 with 2 x STA575

Signal Power Supply

+50VDC

+50VDC

Buck

Buck

Regulator

Regulator

STABP01

STABP01

Controller

Controller

Dynamic Power Supply

Dynamic Power Supply

(CD+ & CD-)

(CD+ & CD-)

Lines of Controls

Lines of Controls

Signal Power Supply
+/-24V DC / 50 mA

+/-24V DC / 50 mA

(see application note AN1656)

STA575

STA575

2 x100Watts

2 x100Watts

Audio

Audio
Inputs

Inputs

STA575

STA575

2 x 100Watts

2 x 100Watts

Audio

Audio
Input

Input

STA575STA575

STA575STA575

2 x 100Watts2 x 100Watts

2 x 100Watts2 x 100Watts

+/-24V DC / 50 mA

+/-24V DC / 50 mA

Signal Power Supply

Signal Power Supply

6 Ohm Loads

6 Ohm Loads

Power - On-Off sequences:

In order to avoid damages to the SAM261 board it is important to follow these sequences:

Power-On

At

(+50V)

apply in the first the

, in this condition the system is in "Mute state" and it can move in "play state" with the switch present

Auxiliary Power Supply (±24V)

and after the

Main Power Supply

on the pcb.

Power-Off

At
off the

is better to bring the SAM module in "Mute state" and after that to follow this order: switch-

Main Supply Voltage (+50V)

and subsequently the

Auxiliary Power Supply. (±24V)

.

System Description & Operating Rules

SAM351 is a BASH® 5.1 amplifier ( 6 x 100W) implementation utilizing the STA575 Integrated Circuit.
Specifically designed for multi-channel implementation in DVD - HTIB systems, Multi-Media systems, AV Re-

ceiv ers.
SAM351 is dimensioned to provide the maximum Output Power (THD=10 %) on two channels and instanta­neously and 1/3 max Pout on the remaining Outputs, or 1/8 of max Pout continuous; this rule is important to
define the main Power Supply size (+50V).

Buck Regulator Description

The function of the buck regulator is to convert efficiently an input voltage to a lower voltage by adjusting the
ratio of the switching transistor's on-time to off-time. The resulting waveform is averaged by the output filter to
recover an analog signal.

In the BASH amplifier this output is in effect split in half by centering it on the audio ground to provide CD+ and
CD- rails.

To avoid the need for a high side driver for the transistor switch in the buck regulator the buck circuit recom­mended has the switch in the return path. Hence the gate driv e circuit (par t of the STPB01) is refer enced to the
negative return of the main supply that provides power for the buck regulator.

14/20

STA575

Interfacing STA575 to STPB01 (Feedback circuit)

This circuit produces a control signal current that i s fed bac k to the STPB01 digital contr oller. The network used
in this example compares the track signal (STA575 track out) to a fixed ratio of buck regulator's output (CD+)
using a transistor. This method is effective because the controller's reference is the negative of the main DC
supply, which is not referenced to audio ground.

The tracking signal is generated inside the STA575 (track out) by taking the absolute value of the pre-amp's
output. The outputs of each channel and of each STA575 are then tied together in a diode-oring arrangement.
This means that the highest of any given output is the output that determines the tracking signal.

The absolute value circuit inside the STA575 has gain. This makes it possible to use an RC network and a re­sistor divider to create a phase shift in the tracking signal at higher frequencies. This is als o useful i n optimiz ing
the alignment of the buck regulator's output with the output signal of the bridge amplifier at high frequency

This circuit first converts the buck switch current to a peak voltage. The control current is then converted to a
voltage (using a resistor) and added to the peak voltage. By doing this, the buck is better able to maintain the
desired headroom over a wide load range and output level.

Centering Network for CD+ & C D- Rails

The power rail of a bridge amplifier has no current flowi ng through the ground node, as the load is not connected
to ground. However there are sev eral differ ent small sources of dynam ic and continuos ground cu rrents flow ing
from either CD+ or CD- to s upport the fu nction of various things such as the control signal to the STABP01 con­troller.

The centering network prevents these currents from shifting the CD+/- rails away from center i.e. away from a
symmetric split of the buck's output about ground. This is critical, even a small centering error requires an in­crease in headroom which res ults in a significant drop i n output los ses. In its s implest for m the cent ering network
could be a resistor divider from CD+ to CD- with its center tied to ground.

As long as the impedance is low enough (for example 200 ohms) this will swamp the smaller offset currents. It
is helpful to put this kind of passive network on the board with the STA575 devices to help when testing this
board on its own.

Power Amplifier Heatsink requirements

The heatsink requir ements are dependent on sev eral design goals. However there are tw o common references:
Pink noise at 1/8 of full power, all channels loaded. This would approximate a system with all channels repro­ducing music at full volume with clipping occurring only occasionally. The second would be full power at 1kHz
for 5 minutes after a one hour pre-soak at 1/8 power.

The worse of these two is the full power test. A conservative approach is to assume that the heatsink would
come to thermal equilibrium after 5 minutes. Thus the Rth of the heatsink can be determined by:

T

–

R

th heatsink

jmaxTamb

---------------------------------- R
P

d

–

th j case

R

––=

th c a s e t o heatsink

For example in the STA575 the Rth jc is 1°C / W. R case-to-heatsink with grease i s about 0.5°C / W. The max­imum operating junction temperature is 130°C, which for margin should be derated to 120°C

Buck Regulator Heatsink

The Buck regulator heatsink ca n be designed in a simi lar manner and does not change by var ying power supply.
In general the efficiency will be in the or der of 85%. The thermal impedances fr om the junction(s) to the heatsi nk
may be lower and the maximum operating temperature will be higher.

Usually either the sub or the remaining channels are tested at full power. The result is that usually the Buck
heatsink is about ¼ the size of the linear heatsink, but this can be strongly affected by the design.

15/20

STA575

Figure 8. PCBs AND COMPONENTS LAYOUT

50 VDC

Input

+/-24 VDC

Input

Mute

Channel 1 and 2

Channel 3 and 4

Channel 5

Channel 6

4 Pin Harness

Power Supply Connections

9 Pin Harness

Audio Con ne c t ions

SAM261 Specification

Parameter Rating Notes

Output Power 100Watts @10% - 6Ω see graphs
THD + N < 0.05% @ 40 Watts

< 0.05% @ 75 Watts

SNR -104 dB (relative to full power)

-113 dB (A-weighted)
Sensitivity 1 .3VRMS Amplifier
Crosstalk -76dB (relative to10W) 1KHz 8 Ohms,
Main Power Supply Inputs 60Volts @ 4 Amps Maximum Voltage is 60V

Aux Power Supply Inputs + 24 Volts @ 100mA

-24 Volts @ 100mA
Input Board 1 .3VRMS Suplied to facilitate testing

Measured @ 1KHZ

Minimum Voltage is 50V
Vs supply

16/20

STA575

k

k

Figure 9. THD +N FR C h a nn el

Audio Precision

Audio Precision

10

10

5

5

2

2

1

1

0.5

0.5

%

%

0.2

0.2

0.1

0.1

0.05

0.05

0.02

0.02

0.01

0.01
10 14020 30 40 50 60 70 80 90 100 110 120 130

10 14020 30 40 50 60 70 80 90 100 110 120 130

W

W

Figure 10. THD + N Frequency

Audio Precision

Audio Precision

10

10

5

5

2

2

1

1

0.5

0.5

%

%

0.2

0.2

0.1

0.1
Pout = 80W

0.05

0.05

0.02

0.02

0.01

0.01
20 20k50 100 200 500 1k 2k 5k 10k

20 20k50 100 200 500 1k 2k 5k 10k

Pout = 5W

Hz

Hz

Pout = 30W

Figure 11. Residual Noise vs. Frequency

Audio Precision

Audio Precision

+0

+0

-20

-20

-40

-40

-60

-60

dBr

dBr

-80

-80

-100

-100

-120

-120

-140

-140

-160

-160
20 20k50 100 200 500 1k 2k 5k 10k

20 20k50 100 200 500 1k 2k 5k 10k

Hz

Hz

Figure 12. Frequency Response

Audio Precision

Audio Precision

+40

+40
+38

+38
+36

+36
+34

+34
+32

+32
+30

+30
+28

+28
+26

+26
+24

+24
+22

+22
+20

+20

dBr

dBr

+18

+18
+16

+16
+14

+14
+12

+12
+10

+10

+8

+8
+6

+6
+4

+4
+2

+2
+0

+0

20 50 100 200 500 1k 2k 5k 10k 20k

20 50 100 200 500 1k 2k 5k 10k 20k

10 40

10 40

Hz

Hz

17/20

STA575

Figure 13. APPICATION BLOCK DIAGRAM

+V

-V

MUTE

+V

-V

DC++

GATE-DRIVE

I-SENSE

PWM-SPLY

PWM-SPLY

I-SENSE

GATE-DRIVE

DC++

S

MUTE CONTROL &

S

THRESHOLD
REFERENCE

MUTE-BUCK

S

MUTE-BUCK

S

BUCK CONTROLLER

300W BUCK

D02AU1454

DC++

GND

MUTE

+V

-V

S

1800pF

L2

15µH

1800pF

S

+V

-V

MUTE
THRESH-REF

TRACK
PROT

CD­CD+

CD+ CD­CD-

-V

S

+V

S

J3

J4

THRESH-REF

RED

WHITE

J1

J2

MUTE-LIN

RED

R77

R78

MUTE

IN1

IN2

CD-

CD+

CD+

MUTE

IN3

RED

IN4

WHITE

-V

+V

CD+

CD-

-V

+V

IN5

IN6

S
S

S
S

S
S

STA575

2 CHANNELS

STA575

2 CHANNELS

STA575

2 CHANNELS

OUT1+
OUT1-

OUT2+
OUT2-

TRACK
PROT

PROT
TRACK

OUT3+
OUT3-

OUT4+
OUT4-

PROT
TRACK

OUT5+
OUT0-

OUT6+
OUT8-

J1

J2

J3

J4

J5

J6

18/20

STA575

DIM.

MIN. TYP. MAX. MIN. TYP. MAX.

mm inch

A 4.45 4.50 4.65 0.175 0.177 0.183

B 1.80 1.90 2.00 0.070 0.074 0.079
C 1.40 0.055
D 0 .75 0.90 1.05 0.029 0.035 0.041

E 0.37 0.39 0.42 0.014 0.015 0.016

F (1) 0.57 0.022

G 0.80 1.00 1.20 0.031 0.040 0.047

G1 25.75 26.00 26.25 1.014 1.023 1.033

H (2) 28.90 29.23 29.30 1.139 1.150 1.153

H1 17.00 0.669
H2 12.80 0.503
H3 0.80 0.031

L (2) 22.07 22.47 22.87 0.869 0.884 0.904

L1 18.57 18.97 19.37 0.731 0.747 0.762

L2 (2) 15.50 15.70 15.90 0.610 0.618 0.626

L3 7.70 7.85 7.95 0.303 0.309 0.313
L4 5 0.197
L5 3.5 0.138

M 3.70 4.00 4.30 0.145 0.157 0.169

M1 3.60 4.00 4.40 0.142 0.157 0.173

N 2.20 0.086
O 2 0.079
R 1.70 0.067

R1 0.5 0.02
R2 0.3 0.12
R3 1.25 0.049
R4 0.50 0.019

V 5˚ (Typ.)

V1 3˚ (Ty p.)
V2 2 0˚ (Typ.)
V3 4 5˚ (Typ.)

(1): dam-bar protusio n not included
(2): molding protusion i ncluded

OUTLINE AND

MECHANICAL DA T A

Flexiwatt27 (vertical)

L2

V

C

B

H

V3

H3

OL3 L4

Pin 1

G

H1

G1

H2

R3

R4

N

V2

F

V

A

V1

R2

R

L

L1

V1

R2

FLEX27ME

L5

R1

R1 R1

M

D

E

M1

7139011

19/20

STA575

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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implic ation or oth erwise under any patent or pat ent rights of STMicroelectronic s. Specifications mentioned in this publication are subject
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 2003 STMi croelectr oni cs - All Righ ts Reserved

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20/20