Datasheet STA5150 Datasheet (SGS Thomson Microelectronics)

200W MONO POWER AMP LI F IER

■

MONOCHIP BRIDGE MONO AMPLIFIER FOR

®

BASH

■

160W OUTPUT POWER @ RL = 4
THD = 0.5%

■

200W OUTPUT POWER @ RL = 4
THD = 10%

■

HIGH DYNAMIC PREAMPLIFIER INPUT
STAGES

■

EXTERNAL PROGRAMMABLE FEEDBACK
TYPE COMPRESSORS

■

AC COUPLED INPUT TO CLASS AB BRID G E
OUTPUT AMPLIFIER

■

PRECISION RECTIFIERS TO DRIVE THE
DIGITAL CONVERTER

■

ON-OFF SEQUENCE/ TIMER WITH MUTE
AND STANDBY

■

PROPORTIONAL OVER POWER OUTPUT
CURRENT TO LIMIT THE DIGITAL
CONVERTER

■

ABSOLUTE POWER BRIDGE OUTPUT

ARCHITECTURE

Ω,

Ω,

STA5150

FLEXIWATT27

TRANSISTOR POWER PROTECTION

■

ABSOLUTE OUTPUT CURRENT LIMIT

■

INTEGRATED THERMAL PROTECTION

■

POWER SUPPLY OVER VOLTAGE
PROTECTION

■

FLEXIWATT POW ER PAC KAG E WI TH 2 7 PIN

■

BASH® LICENCE REQUIRED

DESCRIPTION

The STA5150 is a fully integrated power module de­signed to implement a BASH® amplifier when used
in conjunction with STABP01 digital processor.

BLOCK DIAGRAM

ATT_REL

TRK_OUT

IN_PRE

THRESH

COMPRESSOR

V/l

S1

Ict

-VSGND+VS

+

-

∆G

PEAK

DETECTOR

ABSOLUTE

VALUE
BLOCK

PWR_INPTRKOUT_ PRE

+2

+2

OUTPUT BRIDGE

SOA

OVER

VOLTAGE

PROTECTION

THERMAL

PROTECTION

DETECTOR

TURN-

ON/OFF

SEQUENCE

-1

-1

OUTPUT BRIDGE CD-N

CD+P
OUTP

OUTP

CD-P

CD+

PROT.

STBY/MUTE

CD+N
OUTN

OUTN

D01AU1280

July 2003

1/14

STA5150

DESCRIPTION

(continued)

Notice that normally only one Digital Converter is needed to supply a stereo or multi-channel amplifier system,
therefore most of the functions implemented in the circuit have summing outputs

The signal circuits are bias ed by fixed negative and posi tive voltages r eferred to Ground. Instead the final stag­es of the output amplifiers are supplied by two external voltages that are following the audio signal . In this way
the headroom for the output transistors is kept at minimum level to obtain a high efficiency power amplifier.

The Compressor circuits, one for each channel, performs a particular transfer behavior to avoid the dynamic
restriction that an adaptive system like this requires. To have a high flexibility the attack / release time and the
threshold levels are exter nal ly progr ammable. The tracking s ignal for the ex ter nal digita l converter is generated
from the Absolute Value block that rectifies the audio signal present at the compressor output. The outputs of
these blocks are decoupled by a diode to permit an easy sum of this signal for the mult ichannel application. The
output power bridges have a dedicated input pin to perform an AC decoupling to cancel the compressor output
DC offset. The gain of the stage is equal to 4 (+12dB). A sophis ticated circuit performs the output transistor pow­er detector that , with the digital converter, reduces the power supply voltage . Moreover, a maximum current
output limiting and the over temperature sensor have been added to protect the circuit itself. The external volt­age applied to the STBY/MUTE pin forces the two amplifiers in the proper condition to guarantee a silent turn­on and turn-off.

ABSOLUTE MAXIMUM RATINGS

Symbol Parameter Value Unit

+V

-V

Positive supply voltage referred to pin 13 (GND) 30 V

s

Negative supply voltage referred to pin 13 (GND) -24 V

s

V

CD+

V

CD+

V
V

V

Att_Rel

CD-

CD-

Positive supply voltage tracking rail referred to pin 13 (GND) 22 V

Positive supply voltage operated to Vs+
Negative supply voltage referred to -Vs

(1)

(1)

0.3 V

-0.3 V

Negative supply voltage tracking rail referred to pin 13 (GND) -22 V
Pin 3 Negative & Positive maximum voltage reffered to GND (pin

-0.5 to +20 V

13)

V

Pwr_Imp

VTrk Pin 7, 10 Negative & Positive maximum voltage referred to

-20 to +20 V

GNC (pin 13)

V

In_pre

Pin 8 Negative & Positive maximum voltage referred to GND (pin

-0.5 to +0.5 V

13)

V

threshold

Pin 17 Negative & Positive maximum voltage referred to GND (pin

-7 to +0.5 V

13)

I

stb-max

V

stbymute

Notes: 1. V

Pin 11 maximum input current (Internal voltage clamp at 5V) 500 µA
Pin 11 negative maximum voltage referred to GND (pin 13) -0.5 V

must not be m ore negativ e than -Vs and V

CD-

must not be more positive than +V

CD+

S

THERMAL DATA

Symbol Parameter Value Unit

R

2/14

T

j

th j_case

Max Junction temperature 150 °C

Thermal Resistance Junction to case .............................. ..max 1 °C/W

STA5150

OPERATING RANGE

Symbol Parameter Value Unit

+V

-V

∆V

V

CD+

V

CD-

I

in_Max

V

trheshold

T

amb

I

sb_max

Positive supply voltage +20 to +32 V

s

Negative supply voltage -10 to -24 V

s

Delta positive supply voltage 5V ≤ (Vs+ - VCD+) ≤ 10V V

s+

Positive supply voltage tracking rail +3 to 20.7 V
Negative supply voltage tracking rail -20.7 to -3 V
Current at pin In_Pre related to compressor behaviour -1 to +1 mA peak
Voltage at pin Threshold -5 to 0 V
Ambient Temperature Range 0 to 70 °C
Pin 11 maximum input current (Internal voltage clmp at 5V) 200 µA

PIN CONNECTION

N.C.

CD-N

D01AU1281

27

-Vs

1

S

-V
CD-P

ATT-REL

OUTP

OUTP

CD+P

PWR_INP

IN_PRE

OUT_PRE

TRK

STBY/MUTE

S

+V

CD+

GND

PROTECTION

TRK_OUT

THRESHOLD

N.C.

N.C.

N.C.

N.C.

CD+N

OUTN

OUTN

3/14

STA5150

PIN FUNCTION

N° Name Description

1 -Vs Negative Bias Supply
2 CD-P Channel P Time varying tracking rail negative power supply
3 Att_Rel Attack release rate
4 OutP Channel P
5 OutP Channel P
6 CD+P Channel P positive power supply
7 Pwr_Inp Input to power stage
8 In_pre Pre-amp input (virtual ground)

9 Out_pre Output channel
10 Trk Absolute value block input
11 Stby/mute Standby/mute input voltage control
12 Protection Protection signal for STABP01 digital processor
13 Gnd Analog Ground
14 +Vs Positive Bias Supply
15 CD+ Time varying tracking rail positive power supply
16 Trk_out Reference output for STABP01 digital processor
17 Threshold Compressor threshold input
18 N.C.
19 N.C.
20 N.C.
21 N.C.
22 CD+N Channel N positive power supply
23 OutN Channel N
24 OutN Channel N
25 N.C.
26 CD-N Channel N Time varying tracking rail negative power supply
27 -Vs Negative Bias Supply

4/14

STA5150

ELECTRICAL CHARACTERISTCS

R

= 4Ω, external components at the nominal value f = 1KHz, Tamb = 25°C unless otherwise specified

L

(Test Condition: Vs+ = 28V, Vs- = -24V, V

= 20V, V

CD+

= -20V,

CD-

Symbol Parameter Test Condition Min. Typ. Max. Unit

PREAMPLIFIER AND COMPRESSOR

V

out clamp

V

control

VC

Voffset Output Offset at Out_pre pin with: V

THD Distortion at Out_pre: V

Maximum Voltage at Out_pre pin 10 11 12 Vpeak

I

Audio input current 0.8 mA

in

Voltage at Attack_Release pin Attenuation = 0dB

Attenuation = 6dB
Attenuation = 26dB

Input voltage range for the

omp_
Th

compression

Z

Input impedance of Threshold pin 100 KΩ

th

= 0V; Attenuation = 0dB

CRT

V

= 0.5V; Attenuation = 6dB

CRT

V

= 9V;

Attenuation = 26dB

= 0V; Attenuation = 0dB
= 0.5V; Attenuation = 6dB
= 9V;

Attenuation = 26dB

= 0V; Attenuation = 0dB
= 0.5V; Attenuation = 6dB
= 9V;

Attenuation = 26dB

EN Noise at Out_pre pin : V

V
V

V
V

CRT

CRT
CRT
CRT

CRT
CRT
CRT

0.35
6

-5 -1 V

-10

-250

-450

0

0.5
9

0.01

10

50
60

(2)

0.65
12

10

250
450

5
5

V
V
V

mV
mV
mV

%
%
%

µV
µV
µV

Attack time current at pin

I

ct

Attack_release

2. This value is due to the thermal noise of the external resistors Rr and Ri.

TRACKING PA RAM ETER S

G

V

trk_out

I

trk_out

Z

Tracking reference voltage gain 13 14 15 V

trk

Tracking ref. output voltage 0 20 V
Current capability 5 6 7 mA
Input impedance (Trk)1MΩ

trk_in

OUTPUT BRIDGE

G

G

∆G

P

Half Output bridge gain 5.5 6 6.5 dB

out

Output bridge differential gain 11 12 13 dB

ch

Output bridges gain mismatch -1 1 dB

ch

Continuous Output Power THD = 0.5%

out

THD = 10%

THD Total harmonic distortion of the

Po = 5W 0.01 %

output bridge

f = 20Hz to 20KHz; Po = 50W 0.1 %

V

Output bridge D.C. offset 50 mV

Off

150
190

1.5 mA

160
200

W
W

Z

EN

Noise at Output bridge pins f = 20Hz to 20KHz; Rg = 50Ω 12 µV
Input impedance 100 140 180 KΩ

br_in

5/14

STA5150

ELECTRICAL CHARACTERISTCS

(continued)

Symbol Parameter Test Condition Min. Typ. Max. Unit

R

OLG

Output power Rdson IO = 1A 100 200 mΩ

dson

Open Loop Voltage Gain 100 dB
GB Unity Gain Bandwidth 1.4 MHz
SR Slew Rate 7V/µs

PROTECTION

V

V

V

Stby voltage range 0 0.8 V

stby

Mute voltage range 1.6 3 V

mute

Play voltage range 4 5 V

play

First Over temperature threshold 130 °C

T

h1

T

Second Over temperature

h2

150 °C

threshold

Unbal.

Ground

Unbal.

Ground

Upper Unbalancing ground

threshold

Lower Unbalancing ground

threshold

+

Referred to (CD

- CD-)/2

Referred to (CD+ - CD-)/2

5V

-5 V

UV

P

d_reg.

Under voltage threshold |Vs+| + |Vs-| 20 V

th

Power dissipation threshold for

I

= 50µA; @ Vds = 10V 64 78 W

prot

system regulation

P

d_max

Switch off power dissipation

@ Vds = 10V 120 W

threshold

I

Protection current slope for Pd > Pd

prot

I

Limiting Current threshold 12 14 16 A

lct

reg

I+Vs Positive supply current Stby (Vstby/mute pin = 0V)

Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)

I-Vs Negative supply current Stby (Vstby/mute pin = 0V)

Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)

ICD+ Positive traking rail supply current Stby (Vstby/mute pin = 0V)

Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)

ICD- Negative traking rail supply current Stby (Vstby/mute pin = 0V)

Mute (Vstby/mute pin = 2.5V)
Play (Vstby/mute pin = 5V no signal)

400 µA/W

4
30
30

4
30
30

100
110
110

100
110
110

mA
mA
mA

mA
mA
mA

µA
mA
mA

µA
mA
mA

6/14

STA5150

FUNCTIONAL DESCRIPTION

The circuit contains all the blocks to build a mono amplifier. It is based on the Output Bridge Power Amplifier,
and its protection circuit. Moreover, the compression function and a signal rectifier are added to complete the
circuit.

The operation modes are driven by The Turn-on/off sequence block. In fact the IC can be set in three states by
the Stby/mute pin:

Standby ( V
In the Standby mode all the circuits involved in the signal path are in off condition, instead
in Mute mode the circuits are biased but the Speakers Outputs are forced to ground potential.
These voltages can be get by the external RC network connected to Stby/Mute pin.
The same block is used to force quickly the I.C. In standby mode or in mute mode when the I.C. dangerous

condition has been detected. The RC network in these cases is used to delay the Normal operation restore.
The protection of the I.C. are implemented by the Over Temperature, Unbalance Ground, Output Short circuit,

Under voltage, and output transistor Power sensing as shown in the following table:

Table 1. Protection Implementation

Fault Type Condition Protection strategy Action time Release time

Chip Over
temperature

Chip Over
temperature

Unbalancing
Ground

Short circuit Iout > 14A Standby Fast Slow, related to

Under Voltage |Vs+| + |Vs-|< 20V Standby Fast Slow, related to

Extra power
dissipation
at output transistor

Maximum power
dissipation
at output transistor

< 0.8V), Mute (1.6V < V

pin

Tj > 130 °C Mute Fast Slow Related to

Tj > 150 °C Standby Fast Slow, Related to

|Vgnd| > ((CD+) ­(CD-))/2 + 5V

Pd tr. > 64W Reducing DIGITAL

Pd tr. > 120W Standby Fast Slow, related to

< 3V), and Play (V

pin

Standby Fast Slow, Related to

CONVERTER output
voltage.

> 4V).

pin

Related to the
DIGITAL
CONVERTER

Turn_on sequence

Turn_on sequence

Turn_on sequence

Turn_on sequence

Turn_on sequence
Related to the

DIGITAL
CONVERTER

Turn_on sequence

See the POWER PROTECTION paragraph for the details

Compression

An other important function implemented, to avoid high power dissipation and clipping distortion, is the Com­pression of the signal input. In fact the preamplifier stage performs a voltag e gain equal to 5, fixed by Ri and Rr
external resistor, but in case of high input signal or low power supply voltage, its gain could be reduced of 26dB.
This function is obtained with a feedback type compressor that , in practice, reduces the impedance of the ex­ternal feedback network. The behavior of c ompression it's i nternally fixed but depends fr om the Audio input volt­age signal level, and from the Threshold voltage applied to the Threshold pin. The attack and release time are
programmable by the external RC network connected to the Att_Rel pins.

The constraints of the circuit in the typical application are the following:
Vthreshold range = -5 to 0
Vin peak max = 8V
Vout peak max = 10V

7/14

STA5150

-

Gain without compression (G) = 5
Max Attenuation ratio = 26 dB
The following graph gives the representation of the Compressor activation status related to the Vthreshold and

the input voltage. The delimitation line between the two fields, compression or not, is expressed by the formula :

⋅

2Vthreshold

=

------------------------------------------

V

in

Where G is the preamplifier gain without compression.
In the compression region the gain of the preamplifier will be reduced
(G = 2·Vthreshold/Vin) to maintain at steady state the output voltage equal 2*|Vthreshold| .
Instead in the other region the compressor will be off (G = 5).
The delimitation line between the two fields can be related to the output voltage of the preamplifier: in this case

the formula is :

V

2Vthreshold

out

Figure 1. Compressor activation field

PEAK

V

IN

G

⋅=

8

6

COMPRESSION

4

G < 5

2

G = 5

D01AU1264

2345

1

|Vthreshold|

The relative attenuation introduced by the variable gain cell is the following :

Attenuatio n 20

log

2

-- -

5

--------------------- -

⋅=

V

in_peak

th

V

The total gain of the stage will be:

Gdb = 20log5 + Attenuation

The maximum input swing is related to the value of input resistor, to guarantee that the input current remain
under Iin_Max value (1 mA).

V

in_peak

--------------------- ->

R

i

I

in_max

8/14

Figure 2. Compressor attenuation vs. input amplitude

Attenuation(dB)

0

-6

STA5150

-12

|Vth=5|

|Vth=2.5|

-18

|Vth=1|

-24

D01AU1265

2345

1

678

|Vinpk|

ABSOLUTE VALUE BLOCK

The absolute value block rec tifies the signal after the c ompressio n to extract the c ontrol voltage for the ex ternal
digital converter. The output voltage swing is internally limited, the gain is internally fixed to 14.

The input impedance of the rectifier is very high , to allow the appropriate filtering of the audio signal before the
rectification (between Out_pre and Trk pins).

OUTPUT BRIDGE

The Output bridge amplifier makes the single-ended to Differential conversion of the Audio signal using two
power amplifiers, one i n non-inver ting configuration with gain equal to 2 and the other in inv erting confi gur ation
with unity gain. To guarantee the high input impedance at the input pins, Pwr_Inp1 and Pwr_Inp2, the second
amplifier stages are driven by the output of the first stages respectively.

POWER PROTECTION

To protect the output transistors of the power bridge a power detector is implemented (fig 3).
The current flowing in the power bridge and trough the series resistor Rsense is measured reading the voltage

drop between CD+1 and CD+. In the same time the voltage drop on the relevant power (Vds) is internally mea­sured. These two voltages are converted in current and multiplied: the resulting current , Ipd, is proportional to
the instantaneous dissipated power on the relevant output transistor. The current Ipd is compared with the ref­erence current Ipda, if bigger (dissipated power > 64W) a current, Iprot, is supplied to the Protection pin. The
aim of the current Iprot is to reduce the reference voltage for the digital converter supplying the power stage of
the chip, and than to reduce the dissipated power. The respons e time of the sy stem must be les s than 200

µ

Sec
to have an effective protection. As further protection, when Ipd reaches an higher threshold (when the dissipated
value is higher then 120W) the chip is shut down, forcing low the Stby/Mute pin, and the turn on sequence is
restarted.

9/14

STA5150

Figure 3. Power Protection Block Diagram

R

SENSE

CD+P

CD+

ILOAD

V/I

OC1

ILIM CURRENT COMP

TO TURN-ON/OFF
SEQUENCE

MULTIPLIER

V/I

I_PD

OPA

CD-

X

OPA

OUTPOUTP

IPD

IPDP

IPD

IPDA

CURRENT COMP

D01AU1282

PDP1

IPROT

TO TURN-ON/OFF
SEQUENCE

TO PROT PAD

In fig. 4 there is the power protection strategy pictur es. Under the curve of the 64W power, the chip is in nor mal
operation, over 120W the chip is forced in Standby. This last status would be reached if the digital converter
does not respond quikly enough reducing the stress to less than 120W.

The fig.5 gives the protection current, Iprot, behavior. The current sourced by the pin Prot follows the formula:

–

⋅⋅

4

for P

< P

d

d_av_th

the I

prot

= 0

PdP

d_av_th

----------------------------------------------------------------- -

I

≡

prot

)–( 510

1.25V

Independently of the output voltage, the chip is also shut down in the folowing conditions:
When the currentthrough the sensing resistor, R

, reaches 14A (Voltage drop (CD+) - (CD+1) = 700mV).

sense

When the average junction temperature of the chip reaches 150°C.
When the ground potential differ from more than 5V from the half of the power supply voltage, ((CD+)-(CD-))/2

|

| +

Vs+

When the sum of the supply voltage

|Vs-| <20V

The output bridge is muted when the average junction temperature reaches 130°C.

10/14

STA5150

Figure 4. Powe r prot ection thresh ol d Figure 5. Protection current behaviour

Ids(mA)

8

4

Ilim=14A

B

u

c

k

L

Normal
Operation

100

Standby

Pd_Max=120W

i

m

i

t

a

t

i

o

n

20 30 40 50

Pd_reg=64W

D01AU1283

16

12

Figure 6. Tes t an d A pplication Ci rc ui t

INPUT1

R1

IN_PRE

R3

ATT_REL

C2

Vds(V)

C12

R2 R5

OUT_PRE

C3

C4

9107

8

3

Iprot(mA)

20

10

D01AU1284

R4 R6

TRK PWR_INP

Iprot slope=0.4mA/W

20

40 64 80 100 120

C1

OUTP

4

5

OUTP

Pd(W)

OUTP

5V

R13

CD+

+V

S

-V

S

CD-

TRK-OUT

R14

D1

C8

C9

PROT

R13

R16

C10

R15

THRESH

R10

R11

C6

C11

R12

CD+P

CD+

CD+N

+V

GND

C7

-V

-V
CD-N
CD-P

TRK-OUT

PROT

THRESH

6
15
22

S

14

STBY/
MUTE

11

R14

C9

MUTE STBY

R15

STA5150

13

27

S

1

S

2
26
16
12
17

OUTN

24

23

OUTN

D01AU1285

OUTN

11/14

STA5150

Cct attack

Ict

Vcontrol

------------------------ -=

EXTER NA L COM P ON EN T S

Name Function Value Formula

Ri

R1

Input resistor 10KΩ

(|G| = 5, Rr = 50KΩ)

Rr

R

-------=

i

G

Rr

R2

Cac

C1

Cct

C2

R3 Release constant time Resistor 470KΩ

R4 Resistor for tracking input voltage

R5 Resistor for tracking input voltage

R6 Resistor for tracking input voltage

C3 Capacitor for Tracking input

C4 Dc decoupling capacitor 1µF
R7 Bias Resistor for Stby/Mute

R8 Stby/Mute constant time resistor 30KΩ
R9 M ute resisto r 30KΩ
C5 Capacitor for Stby/Mute resistor 2.2µF

R10 = R11 Sensing resistor for SOA detector 50mΩ

R12 Conversion resistor for threshold

C6 = C7 Power supply filter capacitor 100nF

R15 = R16 Centering resistor 400 Ω , 1W

C8 = C9 Tracking rail power supply filter 680nF

R13 Protection 1KΩ
R14 TRK_out 40KΩ

C10 = C11 Power supply filter capacitor 470 µF , 63V

C12 Feedback capacitor 100pF

D1 Schottky diode SB360

Feedback resistor 50KΩ

(|G| = 5, Ri = 10KΩ

AC Decoupling capacitor 100nF

(fp = 16Hz,

Rac =100KΩ )

Capacitor for the attack time 2.2µF

(Tattack = 13mSec,

Vcontrol = 9V,

Ict = 1.5mA)

(t = 1 Sec. ,

Cct = 2.2 µF )

10KΩ

filter

56KΩ

filter

10KΩ

filter

1nF

voltage filter

10KΩ

function

5% 4W
100KΩ

voltage

Cac

Rr G Rr⋅=

-------------------------------- -=

2π fp Rac⋅⋅

Rct

1

τ

---------=

Cct

Note: Vco ntrol is the voltage at Att _Rel pin.

12/14

STA5150

DIM.

MIN. TYP. MAX . MIN. TYP. MAX.

mm inch

A 4.45 4.5 0 4.65 0.175 0 .177 0.1 83
B 1.80 1.9 0 2.00 0.070 0 .074 0.0 79
C 1.40 0.055
D 0.75 0.90 1.05 0.029 0.035 0.041
E 0.37 0.3 9 0.42 0.014 0 .015 0.0 16

F (1) 0.57 0.022

G 0.80 1.00 1.20 0.031 0.040 0.047

G1 25.75 26.00 26.25 1.014 1.023 1.033

H (2) 28.90 29.23 29.30 1.139 1.150 1.153

H1 17.00 0.669
H2 12.80 0.503
H3 0.80 0.031

L (2) 22.07 22.47 22.87 0.869 0.884 0.904

L1 18.57 18.97 19.37 0.731 0.747 0.762

L2 (2) 15.50 15.70 15.90 0.610 0.618 0.626

L3 7.70 7.85 7.95 0.303 0.309 0.313
L4 5 0.197
L5 3.5 0.138

M 3.70 4.00 4.30 0.145 0.157 0.169

M1 3.60 4.00 4.40 0.142 0.157 0.173

N 2.20 0.086
O 2 0.079

R 1.70 0.067
R1 0.5 0.02
R2 0.3 0.12
R3 1.25 0.049
R4 0.50 0.019

V 5˚ (Typ.)
V1 3˚ (Typ.)
V2 20˚ (Typ.)
V3 45˚ (Typ.)

(1): dam-bar protusion not includ ed
(2): molding protusi on i ncluded

OUTLINE AND

MECH AN ICAL DAT A

Flexiwatt27 (vertical)

L2

V

C

B

H

V3

H3

OL3 L4

Pin 1

G

H1

G1

H2

R3

R4

N

V2

F

V

A

V1

R2

R

R2

L

FLEX27ME

L1

L5

V1

R1

R1 R1

M1

M

D

E

7139011

13/14

STA5150

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