
DESCRIPTION
ST1433A
P Channel Enhancement Mode MOSFET
-3.0A
ST1433A is the P-Channel logic enhancement mode power field effect transistor which is
produced using high cell density, DMOS trench technology.This high density process is
especially tailored to minimize on-state resistance.These devices are particularly suited for
low voltage application such as cellular phone and notebook computer power management,
other battery powered circuits, and low in-line power loss are required. The product is in a
very small outline surface mount package.
PIN CONFIGURATION
SOT-353 ( SC-70-5L )
FEATURE
-30V/-3.0A, R
-30V/-2.5A, R
-30V/-1.5A, R
Super high density cell design for
extremely low R
Exceptional on-resistance and maximum
DC current capability
SOT-353 package design
= 120mΩ
DS(ON)
@VGS = -10.0V
= 135mΩ
DS(ON)
@VGS = -4.5V
= 165mΩ
DS(ON)
@VGS = -2.5V
DS(ON)
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
ST1433A 2005. V1

ST1433A
P Channel Enhancement Mode MOSFET
ABSOULTE MAXIMUM RATINGS (Ta = 25℃ Unless otherwise noted )
-3.0A
Parameter Symbol
Drain-Source Voltage V
Gate-Source Voltage V
Continuous Drain Current (TJ=150℃)
Pulsed Drain Current IDM -7 A
Continuous Source Current (Diode Conduction) IS -1.6 A
Power Dissipation
Operation Junction Temperature TJ 150
Storage Temperature Range T
Thermal Resistance-Junction to Ambient
TA=25℃
TA=70℃
TA=25℃
TA=70℃
-30 V
DSS
GSS
ID
PD
-55/150
STG
θ
R
JA
Typical Unit
±
12
-3.0
-2.0
1.25
0.8
105
W
℃
℃
℃
V
A
/W
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
ST1433A 2005. V1

ST1433A
P Channel Enhancement Mode MOSFET
ELECTRICAL CHARACTERISTICS ( Ta = 25℃ Unless otherwise noted )
-3.0A
Parameter Symbol
Condition Min Typ Max Unit
Static
Drain-Source Breakdown
Voltage
Gate Threshold Voltage V
Gate Leakage Current I
V
(BR)DSS
GS(th)
GSS
VGS=0V,ID=-250uA -30
VDS=VGS,ID=-250uA
VDS=0V,VGS=±12V
-0.4
V
-1.0 V
±
100
VDS=-20V,VGS=0V -1
Zero Gate Voltage Drain
Current
On-State Drain Current I
Drain-source On-Resistance R
I
DSS
D(on)
DS(on)
VDS=-20V,VGS=0V
TJ=55℃
≦
V
-5V,VGS=-4.5V
DS
≦
V
-5V,VGS=-2.5V
DS
VGS=-10.0V,ID=-3.0A
VGS=-4.5V,ID=-2.5A
VGS=-2.5V,ID=-1.5A
-5
-3
0.100
0.115
0.135
-5
0.120
0.135
0.165
uA
A
Ω
Forward Transconductance gfs VDS=-10V,ID=-2.8V 4 S
Diode Forward Voltage VSD IS=-1.2A,VGS=0V -0.8 -1.2 V
Dynamic
Total Gate Charge Qg 5.8
Gate-Source Charge Qgs 1.0
Gate-Drain Charge Qgd
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance
385
iss
55
oss
C
rss
VDS=-15V
VGS=-4.5V
≡
I
-2.0A
D
VDS=-15V
VGS=0V
F=1MHz
1.5
40
nC
pF
Turn-On Time
Turn-Off Time
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
t
d(on)
tr
t
d(off)
tf
VDD=-15V
RL=15Ω
ID=-1A
V
=-10V
GEN
RG=3Ω
6
3.9
40
15
nS
ST1433A 2005. V1

TYPICAL CHARACTERICTICS
ST1433A
P Channel Enhancement Mode MOSFET
-3.0A
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
ST1433A 2005. V1

ST1433A
P Channel Enhancement Mode MOSFET
TYPICAL CHARACTERICTICS
-3.0A
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
ST1433A 2005. V1

ST1433A
TYPICAL CHARACTERICTICS
P Channel Enhancement Mode MOSFET
-3.0A
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
ST1433A 2005. V1

SOT-23-3L PACKAGE OUTLINE
ST1433A
P Channel Enhancement Mode MOSFET
-3.0A
STANSON TECHNOLOGY
120 Bentley Square, Mountain View, Ca 94040 USA
www.stansontech.com
ST1433A 2005. V1