Datasheet SP3223U, SP3243U Datasheet (Sipex)

查询SP3223UCA供应商

®

High Speed Intelligent +3.0V to +5.5V

■ Meets true EIA/TIA-232-F Standards
from a +3.0V to +5.5V power supply

■ Interoperable with EIA/TIA-232 and
adheres to EIA/TIA-562 down to a +2.7V
power source

■

AUTO ON-LINE

wakes up from a 1µA shutdown

■ Regulated Charge Pump Yields Stable
RS-232 Outputs Regardless of V
Variations

■ ESD Specifications:

+2kV Human Body Model

■ 1000 Kbps minimum transmission rate

■ Ideal for High Speed RS-232 Applications

®

circuitry automatically

CC

SP3223U/3243U

RS-232 Transceivers

EN

1
2

C1+

3

V+

C1-

4
5

C2+

C2-

V-

OUT

T

2

IN

R

2

OUT

R

2

SP3223U

6

7

8
9

10

Now Available in Lead Free Packaging

20

SHUTDOWN
V

19

GND

18

T1OUT

17
16

R

15

R

14

ONLINE

13

T

12

T

STATUS

11

CC

1

1

1

2

IN
OUT

IN
IN

DESCRIPTION

The SP3223U and SP3243U products are RS-232 transceiver solutions intended for portable or hand-
held applications such as notebook and palmtop computers. The "U" series is based on Sipex's SP3223/
SP3243 series and has been enhanced for high speed. The data rate is improved to 1000kbps, easily
meeting the demands of high speed RS-232 applications. The SP3223U and SP3243U use an internal
high-efficiency, charge-pump power supply that requires only 0.1µF capacitors in 3.3V operation. This
charge pump and Sipex's driver architecture allow the SP3223U/SP3243U series to deliver compliant RS­232 performance from a single power supply ranging from +3.0V to +5.5V. The SP3223U is a 2-driver/
2-receiver device, and the SP3243U is a 3-driver/5-receiver device, ideal for laptop/notebook computer
and PDA applications. The SP3243U includes one complementary receiver that remains alert to
monitor an external device's Ring Indicate signal while the device is shutdown.

The AUTO ON-LINE® feature allows the device to automatically "wake-up" during a shutdown state
when an RS-232 cable is connected and a connected peripheral is turned on. Otherwise, the device
automatically shuts itself down drawing less than 1µA.

SELECTION TABLE

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srevirD

U3223PSV5.5+otV0.3+22sroticapac4SEYSEY02

U3423PSV5.5+otV0.3+35sroticapac4SEYSEY82

Applicable U.S. Patents - 5,306,954; and other patents pending.

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

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1

ABSOLUTE MAXIMUM RATINGS

These are stress ratings only and functional operation
of the device at these ratings or any other above those
indicated in the operation sections of the specifications
below is not implied. Exposure to absolute maximum
rating conditions for extended periods of time may
affect reliability and cause permanent damage to the
device.

Power Dissipation per package

20-pin PDIP (derate 16.0mW/oC above+70oC).....1300mW

20-pin SSOP (derate 9.25mW/oC above +70oC)....750mW

20-pin TSSOP (derate 11.1mW/oC above +70oC)..900mW

28-pin SOIC (derate 12.7mW/oC above +70oC)....1000mW

28-pin SSOP (derate 11.2mW/oC above +70oC).....900mW

28-pin TSSOP (derate 13.2mW/oC above +70oC)......1059mW

32-pin QFN (derate 29.4mW/oC above +70oC)........2352mW

VCC.......................................................-0.3V to +6.0V

V+ (NOTE 1).......................................-0.3V to +7.0V

V- (NOTE 1)........................................+0.3V to -7.0V

V+ + |V-| (NOTE 1)...........................................+13V

ICC (DC VCC or GND current).........................+100mA

Input Voltages

TxIN, ONLINE,

SHUTDOWN, EN (SP3223U)...........-0.3V to +6.0V

RxIN...................................................................+25V

Output Voltages

TxOUT.............................................................+13.2V

RxOUT, STATUS.......................-0.3V to (V

Short-Circuit Duration

+ 0.3V)

CC

TxOUT.....................................................Continuous

Storage Temperature......................-65°C to +150°C

NOTE 1: V+ and V- can have maximum magnitudes of 7V, but their absolute difference cannot exceed 13V.

ELECTRICAL CHARACTERISTICS

Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with T
C1 - C4 = 0.1µF. Typical values apply at VCC = +3.3V or +5.0V and T

AMB

= 25°C.

AMB

= T

MIN

to T

MAX

,

PARAMETER MIN. TYP. MAX. UNITS CONDITIONS

DC CHARACTERISTICS
Supply Current,AUTO ON-LINE

®

1.0 10 µA All RxIN open, ONLINE = GND,
SHUTDOWN = VCC, VCC = +3.3V,
T

= +25°C, TxIN = GND or V

AMB

Supply Current, Shutdown 1.0 10 µA SHUTDOWN = GND, V

T

= +25°C, TxIN = VCC or GND

AMB

= +3.3V,

CC

CC

Supply Current, 0.3 1.0 mA ONLINE = SHUTDOWN = VCC, no load,
AUTO ON-LINE® Disabled

VCC = +3.3V, T

= +25°C, TxIN = GND or V

AMB

LOGIC INPUTS AND RECEIVER OUTPUTS
Input Logic Threshold VCC = +3.3V or +5.0V, TxIN, EN(SP3223U),

LOW 0.8 V ONLINE, SHUTDOWN

HIGH 2.4 V

Input Leakage Current ±0.01 ±1.0 µA TxIN, EN, ONLINE, SHUTDOWN,

T

= +25°C, VIN = 0V to V

AMB

Output Leakage Current ±0.05 ±10 µA Receivers disabled, V
Output Voltage LOW 0.4 V I
Output Voltage HIGH VCC - 0.6 VCC - 0.1 V I

= 1.6mA

OUT

= -1.0mA

OUT

= 0V to V

OUT

CC

CC

DRIVER OUTPUTS
Output Voltage Swing ±5.0 ±5.4 V All driver outputs loaded with 3KΩ to GND,

T

= +25°C

AMB

Output Resistance 300 Ω VCC = V+ = V- = 0V, V
Output Short-Circuit Current ±35 ±60 mA V

OUT

= 0V

Output Leakage Current ±25 µAVCC = 0V or 3.0V to 5.5V, V

OUT

= ±2V

OUT

= ±12V,

Drivers disabled

CC

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

2

Unless otherwise noted, the following specifications apply for VCC = +3.0V to +5.5V with T
C1 - C4 = 0.1µF. Typical values apply at VCC = +3.3V or +5.0V and T

AMB

= 25°C.

PARAMETER MIN. TYP. MAX. UNITS CONDITIONS

RECEIVER INPUTS
Input Voltage Range -25 25 V
Input Threshold LOW 0.6 1.2 V V
Input Threshold LOW 0.8 1.5 V V

CC

CC

= 3.3V

= 5.0V
Input Threshold HIGH 1.5 2.4 V VCC = 3.3V
Input Threshold HIGH 1.8 2.4 V VCC = 5.0V
Input Hysteresis 0.3 V
Input Resistance 3 5 7 kΩ
AUTO ON-LINE® CIRCUITRY CHARACTERISTICS (ONLINE = GND, SHUTDOWN = VCC)
STATUS Output Voltage LOW 0.4 V I
STATUS Output Voltage HIGH VCC - 0.6 V I

= 1.6mA

OUT

= -1.0mA

OUT

Receiver Threshold to Drivers 200 µS Figure 19
Enabled (t

ONLINE

)

Receiver Positive or Negative 0.5 µS Figure 19
Threshold to STATUS HIGH
(t

)

STSH

Receiver Positive or Negative 20 µS Figure 19
Threshold to STATUS LOW
(t

)

STSL

TIMING CHARACTERISTICS
Maximum Data Rate 1000 Kbps RL = 3KΩ, CL = 250pF, one driver active
Receiver Propagation Delay

t

PHL

t

PLH

0.15 µs Receiver input to Receiver output, CL = 150pF

0.15
Receiver Output Enable Time 200 ns Normal operation
Receiver Output Disable Time 200 ns Normal operation
Driver Skew 100 ns | t
Receiver Skew 50 ns | t
Transition-Region Slew Rate 90 V/µsV

- t

PHL

PLH

- t

PHL

PLH

= 3.3V, RL = 3KΩ, T

CC

measurements taken from -3.0V to +3.0V or
+3.0V to -3.0V

= T

to T

AMB

MIN

MAX

,

|
|

= 25°C,

AMB

ELECTRICAL CHARACTERISTICS

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

3

Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all drivers

TYPICAL PERFORMANCE CHARACTERISTICS

loaded with 3kΩ, 0.1µF charge pump capacitors, and T

= +25°C.

AMB

200

150

100

Skew (ns)

50

0

0 250 500 1000 1500 2000

T1 at 500Kbps
T2 at 31.2Kbps
All TX loaded 3K // CLoad

Load Capacitance (pF)

Figure 1. Transmitter Skew VS. Load Capacitance for
the SP3223U / SP3243U

6

4

T1 at 1Mbps
T2 at 62.5Kbps

2

0

Transmitter

-2

Output Voltage (V)

-4

-6
0 250 500 1000 1500

Load Capacitance (pF)

6

4

2

0

Voltage (V)

-2

Transmitter Output

-4

-6

2.7 3 3.5 4 4.5 5

1Driver at 1Mbps
Other Drivers at 62.5Kbps
All Drivers Loaded with 3K // 250pF

Supply Voltage (V)

Figure 2. Transmitter Output Voltage VS. Supply
Voltage for the SP3223U

35
30
25
20
15
10

Supply Current (mA)

5
0

0 250 500 1000 1500

Load Capacitance (pF)

T1 at 1Mbps
T2 at 62.5Kbps

Figure 3. Transmitter Output Voltage VS. Load
Capacitance for the SP3223U

20

15

10

5

SupplyCurrent (mA)

0

2.7 3 3.5 4 4.5 5

T1 at 1Mbps
T2 at 62.5Kbps
All Drivers loaded
with 3K//250pF

Supply Voltage (V)

Figure 5. Supply Current VS. Supply Voltage for the
SP3223U

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

Figure 4. Supply Current VS. Load Capacitance for the
SP3223U

6

4

2

0

Voltage (V)

-2

Transmitter Output

-4

-6

2.7 3 3.5 4 4.5 5

T1 at 1Mbps
T2 at 62.5Kbps
All Drivers loaded
with 3K//250pF

Supply Voltage (V)

Figure 6. Transmitter Output Voltage VS. Supply
Voltage for the SP3223U

4

TYPICAL PERFORMANCE CHARACTERISTICS

Unless otherwise noted, the following performance characteristics apply for VCC = +3.3V, 1000kbps data rate, all drivers
loaded with 3kΩ, 0.1µF charge pump capacitors, and T

= +25°C.

AMB

6

2Mbps

4

1.5Mbps
1Mbps

2

1 TX at full data rate

0

2 TX’s at1/16 data rate

Transmitter

-2

Output Voltage (V)

-4

2Mbps

-6
0 250 500 1000 1500 2000

1.5Mbps

1Mbps

Load Capacitance (pF)

Figure 7. Transmitter Output Voltage VS. Load
Capacitance for the SP3243U

50

40

2 Mbps

30

20

10

SupplyCurrent (mA)

0

0 250 500 1000 1500

1.5 Mbps

1 TX at full data rate
2 TX’s at 1/16 data rate
All TX loaded 3K // CLoad

Load Capacitance (pF)

1 Mbps

120

100

80

60

Slew +

1 TX at 1Mbps
2 TX’s at 62.5Kbps
All TX loaded 3K // CLoad

40

Slew Rate (V / µs)

20

0

0 250 500 1000 1500 2000

Slew -

Load Capacitance (pF)

Figure 8. Slew Rate VS. Load Capacitance for the
SP3243U

30

25

20

15

10

Supply Current (mA)

5

0

2.7 3 3.5 4 4.5 5

1 Driver at 1Mbps
Other Drivers at 62.5Kbps
All Drivers Loaded with 3K // 250pF

Supply Voltage (V)

Figure 9. Supply Current VS. Load Capacitance for the
SP3243U

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

Figure 10. Supply Current VS. Supply Voltage for the
SP3243U

5

PIN NUMBER

NAME FUNCTION SP3223U SP3243U QFN

SP3243UCR

EN Receiver Enable. Apply logic LOW for normal operation. 1 - -

Apply logic HIGH to disable the receiver outputs (high-Z state).

C1+ Positive terminal of the voltage doubler charge-pump capacitor. 2 28 28

V+ Regulated +5.5V output generated by the charge pump. 3 27 26

C1- Negative terminal of the voltage doubler charge-pump capacitor. 4 24 22

C2+ Positive terminal of the inverting charge-pump capacitor. 5 1 29

C2- Negative terminal of the inverting charge-pump capacitor. 6 2 31

V- Regulated -5.5V output generated by the charge pump. 7 3 32

R1IN RS-232 receiver input. 16 4 2

R2IN RS-232 receiver input. 9 5 3

R3IN RS-232 receiver input. - 6 4

R4IN RS-232 receiver input. - 7 5

R5IN RS-232 receiver input. - 8 6

R1OUT TTL/CMOS receiver output. 15 19 17

R2OUT TTL/CMOS receiver output. 10 18 16

R2OUT Non-inverting receiver-2 output, active in shutdown. - 20 18

R3OUT TTL/CMOS receiver output. - 17 15

R4OUT TTL/CMOS receiver output. - 16 14

R5OUT TTL/CMOS receiver output. - 15 13

STATUS TTL/CMOS Output indicating online and shutdown status. 11 21 19

T1IN TTL/CMOS driver input. 13 14 12

T2IN TTL/CMOS driver input. 12 13 11

T3IN TTL/CMOS driver input. - 12 10

ONLINE Apply logic HIGH to override Auto-Online circuitry keeping 14 23 21

drivers active (SHUTDOWN must also be logic HIGH,
refer to Table 2).

T1OUT RS-232 driver output. 17 9 7

T2OUT RS-232 driver output. 8 10 8

T3OUT RS-232 driver output. - 11 9

GND Ground. 18 25 23

V

+3.0V to +5.5V supply voltage. 19 26 25

CC

SHUTDOWN Apply logic LOW to shut down drivers and charge pump. 20 22 20

This overrides all AUTO ON-LINE® circuitry and ONLINE
(refer to Table 2).

NC No Connection - - 1,24,27,30

Table 1. Device Pin Description

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

6

T

R

EN

C1+

C1-

C2+

C2-

OUT

2

R

2

OUT

2

V+

V-

IN

1
2
3

4
5

6

7

8
9

10

SP3223U

20

SHUTDOWN
V

CC

19

GND

18

T1OUT

17
16

R

1

15

R

1

14

ONLINE

13

T

1

12

T

2

STATUS

11

IN
OUT

IN
IN

T

T

T

R
R
R

R4IN

R

OUT

1

OUT

2

OUT

3

T

T2IN
T

C2+

C2-

V-

IN

1

IN

2

IN

3

IN

5

IN

3

IN

1

1
2
3

4
5

6

7

8

9
10

11
12

13

14

SP3243U

28

C1+

V+

27

V

26
25

GND

24

C1-

23

ONLINE

22

SHUTDOWN

21

STATUS

R

20

R

19
18

R

17

R

16

R

15

R

CC

OUT

2

OUT

1

OUT

2

OUT

3

OUT

4

OUT

5

Figure 11. SP3223U Pinout Configuration

V-

323130

1

NC

2

IN

R

1

3

R

IN

2

4

IN

R

3

5

R

IN

4

6

IN

R

5

OUT

1

OUT

2

7
8

9

OUT

3

T

T
T

Figure 13. SP3243U QFN Pinout Configuration

C2-NCC2+

29

SP3243U

101112

IN

IN

IN

3

2

1

T

T

T

Figure 12. SP3243U Pinout Configuration

27

14

OUT

4

R

26

15

OUT

3

R

CC

V

25

24

NC

23

OUT

2

R

GND

22

C1-

21

ONLINE

20

SHUTDOWN

19

STATUS

18

R

OUT

2

17

OUT

R

1

®

®

16

C1+NCV+

28

13

OUT

5

R

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

7

+3.3V to +5V

+

C5

+

C1

+

C2

TTL/CMOS

INPUTS

TTL/CMOS

OUTPUTS

0.1µF

0.1µF

0.1µF

13

12

15

10

2

4

5

6

C1+

C1-

C2+

C2-

T

IN

1

T

IN

2

R

1

R

2

SP3223U

OUT

OUT

19

V

CC

3

V+

V-

7

C3

C4

+

0.1µF

0.1µF

+

T

OUT

1

17

RS-232

8

16

OUTPUTS

RS-232

5KΩ

T

OUT

2

R

1

IN

INPUTS

R

IN

9

2

5KΩ

1

V

CC

To µP Supervisor
Circuit

EN

20

SHUTDOWN

14

ONLINE

11

STATUS

GND

18

Figure 14. SP3223U Typical Operating Circuit

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

8

VCC

+

C5

+

C1

+

C2

TTL/CMOS

INPUTS

TTL/CMOS

OUTPUTS

0.1µF

µ

0.1

µ

0.1

26

V

CC

28

C1+

F

24

C1-

1

C2+

SP3243U

F

2

C2-

14

13

T1IN

T2IN

T

T

V+

V-

OUT

1

OUT

2

27

3

9

10

C3

C4

RS-232

+

+

0.1

0.1

µ

F

µ

F

OUTPUTS

T

12

20

19

T

IN

3

R2OUT

R

OUT

1

OUT

3

R1IN

11

4

5KΩ

R

18

R

OUT

2

IN

5

2

5KΩ

IN

5KΩ

R

6

3

RS-232
INPUTS

R

IN

4

7

17

16

R

R

OUT

3

OUT

4

5KΩ

R

To µP Supervisor

Circuit

OUT

5

15

V

CC

22

SHUTDOWN

23

ONLINE

21

STATUS

GND

5KΩ

R

IN

5

8

25

Figure 15. SP3243U Typical Operating Circuit

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

9

DESCRIPTION

The SP3223U and SP3243U transceivers
meet the EIA/TIA-232 and ITU-T V.28/V.24
communication protocols and can be
implemented in battery-powered, portable, or
hand-held applications such as notebook or
palmtop computers. The SP3223U and SP3243U
devices feature Sipex's proprietary and patented
(U.S.-- 5,306,954) on-board charge pump cir­cuitry that generates ±5.5V RS-232 voltage lev­els from a single +3.0V to +5.5V power supply.
The SP3223U and SP3243U devices can operate
at a data rate of 1000kbps fully loaded.

The SP3223U and SP3243U series is an ideal
choice for power sensitive designs. The SP3223U
and SP3243U devices feature AUTO ON-LINE
circuitry which reduces the power supply drain
to a 1µA supply current. In many portable or
hand-held applications, an RS-232 cable can be
disconnected or a connected peripheral can be
turned off. Under these conditions, the internal
charge pump and the drivers will be shut down.
Otherwise, the system automatically comes
online. This feature allows design engineers to
address power saving concerns
without major design changes.

®

The SP3223U is a 2-driver/2-receiver device,
and the SP3243U is a 3-driver/5-receiver device,
ideal for portable or hand-held applications. The
SP3243U includes one complementary
always-active receiver that can monitor an
external device (such as a modem) in shutdown.
This aids in protecting the UART or serial
controller IC by preventing forward biasing
of the protection diodes where VCC may be
disconnected.

VCC

RESET

UART

or

Serial µC

µP

Supervisor

IC

+

0.1µF

C5

+

0.1µF

C1

+

C2

0.1µF

TxD

RTS

DTR

RxD

CTS

DSR

DCD

RI

V

CC

V

IN

28

C1+

24

C1-

1

C2+

2

C2-

T1IN

14

T2IN

13

T

12

R2OUT

20

R

19

R

18

R

17

16

15

22

SHUTDOWN

23

ONLINE

21

STATUS

3

1

2

R

R

IN

OUT

OUT

OUT

3

OUT

4

OUT

5

26

V

CC

SP3243U

GND

25

27

V+

+

0.1µF

C3

3

V-

0.1µF

C4

+

OUT

T

9

1

OUT

T

10

2

RS-232
OUTPUTS

T

OUT

11

3

R1IN

4

5KΩ

R

IN

5

2

5KΩ

IN

R

6

3

RS-232

5KΩ

5KΩ

5KΩ

INPUTS

R

IN

4

7

R

IN

5

8

THEORY OF OPERATION

The SP3223U and SP3243U series is made up of
four basic circuit blocks:

1. Drivers

2. Receivers

3. the Sipex proprietary charge pump, and

4. AUTO ON-LINE

®

circuitry.

Drivers

The drivers are inverting level transmitters that
convert TTL or CMOS logic levels to 5.0V EIA/
TIA-232 levels with an inverted sense relative to
the input logic levels. Typically, the RS-232
output voltage swing is +5.4V with no load and
+5V minimum fully loaded. The driver outputs
are protected against infinite short-circuits to
ground without degradation in reliability. These
drivers comply with the EIA-TIA-232-F and all
previous RS-232 versions. Unused drivers in­puts should be connected to GND or VCC.

The drivers have a minimum data rate of
1000kbps fully loaded with 3kΩ in parallel with
250pF, ensuring compatibility with PC-to-PC
communication software.

Figure 16. Interface Circuitry Controlled by Micropro­cessor Supervisory Circuit

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

10

U3223PS:ECIVED

NWODTUHSNETXTUORXTUO

00 ZhgiHevitcA

01 ZhgiHZhgiH

10 evitcAevitcA

11 evitcAZhgiH

U3423PS:ECIVED

NWODTUHST

TUORXTUOR2TUO

X

0ZhgiHZhgiHevitcA

1evitcAevitcAevitcA

Table 2. SHUTDOWN and EN Truth Tables
Note: In AUTO ON-LINE® Mode where ONLINE =
GND and SHUTDOWN = VCC, the device will shut down
if there is no activity present at the Receiver inputs.

+3V to +5V

+

0.1µF

C5

C1

C2

TTL/CMOS

INPUTS

TTL/CMOS

OUTPUTS

V

CC

To µP Supervisor
Circuit

*

SP3223EU Only

+

0.1µF

+

0.1µF

C1+

C1-

SP3223U

C2+

SP3243U

C2-

IN

T

1

T

IN

X

R

OUT

1

R

OUT

X

EN *

SHUTDOWN

ONLINE

STATUS

CC

V

GND

V+

T

OUT

1

OUT

T

X

IN

R

1

5k

Ω

R

IN

X

5k

Ω

+

0.1µF

C3

V-

1000pF

0.1µF

C4

+

1000pF

Figure 17. Loopback Test Circuit for RS-232 Driver
Data Transmission Rates

Figure 17 shows a loopback test circuit used to
test the RS-232 Drivers. Figure 18 shows the test
results where one driver was active at 1Mbps and
all three drivers loaded with an RS-232 receiver
in parallel with a 250pF capacitor. Figure 19
shows the test results of the loopback circuit with
all drivers active at 250kbps with typical
RS-232 loads in parallel with 1000pF capacitors. A
superior RS-232 data transmission rate of 1Mbps
makes the SP3223U/3243U series an ideal match

for high speed LAN and personal computer
peripheral applications.

Receivers

The receivers convert +5.0V EIA/TIA-232
levels to TTL or CMOS logic output levels. The
SP3223U receivers have an inverting output that
can be disabled by using the EN pin.

Figure 18. Loopback Test results at 1Mbps

Figure 19. Loopback Test results at 250Kbps

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

11

Receivers are active when the AUTO ON-LINE
circuitry is enabled or when in shutdown.
During the shutdown, the receivers will continue
to be active. If there is no activity present at the
receivers for a period longer than 100µs or when
SHUTDOWN is enabled, the device goes into a
standby mode where the circuit draws 1µA.
Driving EN to a logic HIGH forces the outputs of
the receivers into high-impedance. The truth
table logic of the SP3223U and SP3243U driver
and receiver outputs can be found in Table 2.

The SP3243U includes an additional non-in­verting receiver with an output R

OUT. R2OUT

2

is an extra output that remains active and
monitors activity while the other receiver
outputs are forced into high impedance.
This allows Ring Indicator (RI) from a
peripheral to be monitored without forward
biasing the TTL/CMOS inputs of the other
devices connected to the receiver outputs.

Since receiver input is usually from a transmis­sion line where long cable lengths and system
interference can degrade the signal, the inputs
have a typical hysteresis margin of 300mV. This
ensures that the receiver is virtually immune to
noisy transmission lines. Should an input be left
unconnected, an internal 5KΩ pulldown resistor
to ground will commit the output of the receiver
to a HIGH state.

Charge Pump

The charge pump is a Sipex–patented design
(U.S. 5,306,954) and uses a unique approach
compared to older less–efficient designs. The
charge pump still requires four external
capacitors, but uses a four–phase voltage
shifting technique to attain symmetrical 5.5V
power supplies. The internal power supply
consists of a regulated dual charge pump that
provides output voltages 5.5V regardless of the
input voltage (VCC) over the +3.0V to +5.5V
range. This is important to maintain compliant
RS-232 levels regardless of power supply
fluctuations.

®

The charge pump operates in a discontinuous
mode using an internal oscillator. If the output
voltages are less than a magnitude of 5.5V, the
charge pump is enabled. If the output voltages
exceed a magnitude of 5.5V, the charge pump is
disabled. This oscillator controls the four phases
of the voltage shifting. A description of each
phase follows.

Phase 1

— VSS charge storage — During this phase of
the clock cycle, the positive side of capacitors

and C2 are initially charged to VCC. C

C

1

then switched to GND and the charge in C
transferred to C
VCC, the voltage potential across capacitor C2 is

–

. Since C

2

+

is connected to

2

now 2 times VCC.

Phase 2

— VSS transfer — Phase two of the clock
connects the negative terminal of C2 to the V
storage capacitor and the positive terminal of C
to GND. This transfers a negative generated
voltage to C3. This generated voltage is
regulated to a minimum voltage of -5.5V.
Simultaneous with the transfer of the voltage to
C3, the positive side of capacitor C1 is switched
to VCC and the negative side is connected to
GND.

Phase 3

— VDD charge storage — The third phase of the
clock is identical to the first phase — the charge
transferred in C1 produces –VCC in the negative
terminal of C1, which is applied to the negative
side of capacitor C2. Since C
voltage potential across C2 is 2 times VCC.

2

Phase 4

— VDD transfer — The fourth phase of the clock
connects the negative terminal of C2 to GND,
and transfers this positive generated voltage
across C2 to C4, the VDD storage capacitor. This
voltage is regulated to +5.5V. At this voltage,
the internal oscillator is disabled. Simultaneous
with the transfer of the voltage to C4, the
positive side of capacitor C1 is switched to V
and the negative side is connected to GND,
allowing the charge pump cycle to begin again.
The charge pump cycle will continue as long as
the operational conditions for the internal
oscillator are present.

1

+

is at VCC, the

+

is

l

–

is

SS

2

CC

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

12

Since both V+ and V– are separately generated

from VCC, in a no–load condition V+ and V– will
be symmetrical. Older charge pump approaches
that generate V– from V+ will show a decrease in
the magnitude of V– compared to V+ due to the
inherent inefficiencies in the design.

RECEIVER

RS-232 INPUT

VOLTAGES

STATUS

+2.7V

0V

-2.7V

V

CC

0V

t

STSL

The clock rate for the charge pump typically
operates at 250kHz. The external capacitors can
be as low as 0.1µF with a 16V breakdown
voltage rating.

S
H
U
T

D
O

W

N

t

STSH

t

ONLINE

DRIVER

RS-232 OUTPUT

VOLTAGES

+5V

0V

-5V

Figure 20. AUTO ON-LINE® Timing Waveforms

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

13

VCC = +5V

Figure 21. Charge Pump — Phase 1

C

Figure 22. Charge Pump — Phase 2

a) C

2+

1

2

2

+5V

++

C

1

–5V –5V

C

2

––

C

+

–

C

VCC = +5V

++

1

C

2

––

–10V

T[]

T

4

–

V

DD

+

V

SS

3

C

4

+

–

+

–

C

3

Storage Capacitor

Storage Capacitor

Storage Capacitor

V

DD

Storage Capacitor

V

SS

+6V

0V

0V

b) C2-

T

Ch1 2.00V Ch2 2.00V M 1.00µs Ch1 1.96V

-6V

Figure 23. Charge Pump Waveforms

VCC = +5V

+5V

++

C

1

–5V

C

2

––

–5V

C

4

+

–

Storage Capacitor

V

DD

+

–

V

C

3

Storage Capacitor

SS

Figure 24. Charge Pump — Phase 3

VCC = +5V

+10V

++

C

1

C

2

––

C

4

+

–

Storage Capacitor

V

DD

+

–

Storage Capacitor

V

SS

C

3

Figure 25. Charge Pump — Phase 4

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

14

6

4

1.82

2.67

Vout+
Vout-

3.46

4.93

Transmitter Output Voltage [V]

2

0

0.62

-2

-4

-6

1.02

1.12

1.23

0.869

0.939

Load Current Per Transmitter [mA]

1.38

1.57

Figure 26. SP3243U Driver Output Voltages vs. Load
Current per Transmitter

+

0.1µF

C5

28

+

0.1µF

C1

24

1

+

C2

0.1µF
2

14

13

12

20

19

18

17

16

15

V

CC

22
23

To µP Supervisor

DB-9 Connector Pins:

1. Received Line Signal Detector

2. Received Data

3. Transmitted Data

4. Data Terminal Ready

5. Signal Ground (Common)

Circuit

21

C1+

C1-

SP3243U

C2+

C2-

T1IN

T2IN

T

IN

3

R2OUT

OUT

R

1

R

OUT

2

OUT

R

3

OUT

R

4

OUT

R

5

SHUTDOWN

ONLINE

STATUS

V

GND

8.6

26

CC

5KΩ

5KΩ

5KΩ

5KΩ

25

V

CC

V+

V-

OUT

T

1

OUT

T

2

T

OUT

3

R1IN

IN

R

2

5KΩ

IN

R

3

R

IN

4

IN

R

5

6. DCE Ready

7. Request to Send

8. Clear to Send

9. Ring Indicator

27

+

0.1µF

C3

3

0.1µF

C4

+

9

10

11

4

5

6

7

8

DB-9

Connector

6
7
8
9

1

2
3
4
5

Figure 27. Circuit for the connectivity of the SP3243U with a DB-9 connector

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

15

LANGIS232-SR

REVIECERTA

TUPNI

NWODTUHS

TUPNI

TUPNIENILNOTUPTUOSUTATS

REVIECSNART

SUTATS

SEYHGIH-HGIH

ONHGIHHGIHWOL

ONHGIHWOLWOL

SEYWOL-HGIH

ONWOL-WOL

Table 3. AUTO ON-LINE® Logic

RXIN

LOW

HIGH / LOW

HIGH / LOW

Inactive Detection Block

RS-232

Receiver Block

RXINACT

RXOUT

(Auto-Online)

nwodtuhS

(

nwodtuhS

nwodtuhS

noitarepOlamroN

noitarepOlamroN

enilnO-otuA

)

Figure 28. Stage I of AUTO ON-LINE® Circuitry

Delay
Stage

R1INACT

Delay
Stage

R2INACT

Delay
Stage

R3INACT

Delay
Stage

R4INACT

SHUTDOWN

Delay
Stage

R5INACT

STATUS

Figure 29. Stage II of AUTO ON-LINE® Circuitry

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

16

AUTO ON-LINE® Circuitry

The SP3223U and SP3243U devices have a
patent pending AUTO ON-LINE® circuitry on
board that saves power in applications such as
laptop computers, palmtop (PDA) computers
and other portable systems.

The SP3223U and SP3243U devices
incorporate an AUTO ON-LINE® circuit that
automatically enables itself when the external
transmitters are enabled and the cable is
connected. Conversely, the AUTO ON-LINE
circuit also disables most of the internal circuitry
when the device is not being used and goes into
a standby mode where the device typically draws
1mA. This function can also be externally
controlled by the ONLINE pin. When this pin is
tied to a logic LOW, the AUTO ON-LINE
function is active. Once active, the device is
enabled until there is no activity on the receiver
inputs. The receiver input typically sees at least
+3V, which are generated from the transmitters
at the other end of the cable with a +5V
minimum. When the external transmitters are
disabled or the cable is disconnected, the
receiver inputs will be pulled down by their
internal 5kΩ resistors to ground. When this
occurs over a period of time, the internal
transmitters will be disabled and the device goes
into a shutdown or standy mode. When ONLINE
is HIGH, the AUTO ON-LINE® mode is dis­abled.

The AUTO ON-LINE® circuit has two stages:

1) Inactive Detection

2) Accumulated Delay

The first stage, shown in Figure 28, detects an
inactive input. A logic HIGH is asserted on
RXINACT if the cable is disconnected or the
external transmitters are disabled. Otherwise,
RXINACT will be at a logic LOW. This circuit
is duplicated for each of the other receivers.

The second stage of the AUTO ON-LINE® cir­cuitry, shown in Figure 29, processes all the
receiver's RXINACT signals with an accumu­lated delay that disables the device to a 1µA
supply current.

The STATUS pin goes to a logic LOW when the
cable is disconnected, the external transmitters
are disabled, or the SHUTDOWN pin is
invoked. The typical accumulated delay is
around 20µs.

®

When the SP3223U and SP3243U drivers or
internal charge pump are disabled, the supply
current is reduced to 1µA. This can commonly
occur in hand-held or portable applications where
the RS-232 cable is disconnected or the RS-232
drivers of the connected peripheral are turned off.

®

The AUTO ON-LINE® mode can be disabled by
the SHUTDOWN pin. If this pin is a logic LOW,
the AUTO ON-LINE® function will not operate
regardless of the logic state of the ONLINE pin.
Table 3 summarizes the logic of the AUTO ON­LINE® operating modes. The truth table logic of
the SP3223U and SP3243U driver and receiver
outputs can be found in Table 2.

The STATUS pin outputs a logic LOW signal
if the device is shutdown. This pin goes to a
logic HIGH when the external transmitters are
enabled and the cable is connected.

When the SP3223U and SP3243U devices
are shut down, the charge pumps are turned off.
V+ charge pump output decays to VCC, the
V- output decays to GND. The decay time will
depend on the size of capacitors used for the
charge pump. Once in shutdown, the time
required to exit the shut down state and have
valid V+ and V- levels is typically 200µs.

For easy programming, the STATUS can be
used to indicate DTR or a Ring Indicator signal.
Tying ONLINE and SHUTDOWN together
will bypass the AUTO ON-LINE® circuitry so
this connection acts like a shutdown input pin.

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

17

ESD TOLERANCE

The SP3223U/3243U series incorporates
ruggedized ESD cells on all driver output and
receiver input pins. The ESD structure is
improved over our previous family for more
rugged applications and environments sensitive
to electro-static discharges and associated
transients.

The Human Body Model has been the generally
accepted ESD testing method for semi­conductors. This method is also specified in
MIL-STD-883, Method 3015.7 for ESD testing.
The premise of this ESD test is to simulate the
human body’s potential to store electro-static
energy and discharge it to an integrated circuit.
The simulation is performed by using a test
model as shown in Figure 30. This method will
test the IC’s capability to withstand an ESD
transient during normal handling such as in
manufacturing areas where the ICs tend to be
handled frequently.

For the Human Body Model, the current limiting
resistor (RS) and the source capacitor (CS) are

1.5kΩ and 100pF, respectively.

R

R

R

C

C

SW1

SW1

DC Power
Source

Figure 30. ESD Test Circuit for Human Body Model

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

R

S

S

SW2

SW2

C

C

S

S

Device
Under
Test

18

D1 = 0.005" min.

(0.127 min.)

D

e = 0.100 BSC

(2.540 BSC)

(BOTH ENDS)

B1

B

ALTERNATE

END PINS

PACKAGE: PLASTIC

DUAL–IN–LINE
(NARROW)

E1

E

A1 = 0.015" min.

(0.381min.)

A = 0.210" max.

(5.334 max).

A2

L

C

Ø

eA = 0.300 BSC

(7.620 BSC)

DIMENSIONS (Inches)

Minimum/Maximum

(mm)

A2

B

B1

C

D

E

E1

L

Ø

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

16–PIN

0.115/0.195

(2.921/4.953)

0.014/0.022

(0.356/0.559)

0.045/0.070

(1.143/1.778)

0.008/0.014

(0.203/0.356)

0.780/0.800

(19.812/20.320)

0.300/0.325

(7.620/8.255)

0.240/0.280

(6.096/7.112)

0.115/0.150

(2.921/3.810)

0°/ 15°

(0°/15°)

20–PIN

0.115/0.195

(2.921/4.953)

0.014/0.022

(0.356/0.559)

0.045/0.070

(1.143/1.778)

0.008/0.014

(0.203/0.356)

0.980/1.060

(24.892/26.924)

0.300/0.325

(7.620/8.255)

0.240/0.280

(6.096/7.112)

0.115/0.150

(2.921/3.810)

0°/ 15°

(0°/15°)

28–PIN

0.115/0.195

(2.921/4.953)

0.014/0.022

(0.356/0.559)

0.045/0.070

(1.143/1.778)

0.008/0.014

(0.203/0.356)

1.385/1.454

(35.17/36.90)

0.300/0.325

(7.620/8.255)

0.240/0.280

(6.096/7.112)

0.115/0.150

(2.921/3.810)

0°/ 15°

(0°/15°)

19

PACKAGE: PLASTIC SHRINK

SMALL OUTLINE
(SSOP)

EH

D

A

Ø

Be

DIMENSIONS (Inches)

Minimum/Maximum

A1

(mm)
A

A1

B

D

E

e

H

L

Ø

16–PIN

0.068/0.078
(1.73/1.99)

0.002/0.008
(0.05/0.21)

0.010/0.015
(0.25/0.38)

0.239/0.249
(6.07/6.33)

0.205/0.212
(5.20/5.38)

0.0256 BSC
(0.65 BSC)

0.301/0.311
(7.65/7.90)

0.022/0.037
(0.55/0.95)

0°/8°

(0°/8°)

20–PIN

0.068/0.078
(1.73/1.99)

0.002/0.008
(0.05/0.21)

0.010/0.015
(0.25/0.38)

0.278/0.289
(7.07/7.33)

0.205/0.212
(5.20/5.38)

0.0256 BSC

(0.65 BSC)

0.301/0.311
(7.65/7.90)

0.022/0.037
(0.55/0.95)

0°/8°

(0°/8°)

24–PIN

0.068/0.078
(1.73/1.99)

0.002/0.008
(0.05/0.21)

0.010/0.015
(0.25/0.38)

0.317/0.328
(8.07/8.33)

0.205/0.212
(5.20/5.38)

0.0256 BSC
(0.65 BSC)

0.301/0.311
(7.65/7.90)

0.022/0.037
(0.55/0.95)

0°/8°

(0°/8°)

L

28–PIN

0.068/0.078
(1.73/1.99)

0.002/0.008
(0.05/0.21)

0.010/0.015
(0.25/0.38)

0.397/0.407

(10.07/10.33)

0.205/0.212
(5.20/5.38)

0.0256 BSC
(0.65 BSC)

0.301/0.311
(7.65/7.90)

0.022/0.037
(0.55/0.95)

0°/8°

(0°/8°)

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

20

PACKAGE: PLASTIC

SMALL OUTLINE (SOIC)
(WIDE)

EH

D

A

Ø

Be

A1

DIMENSIONS (Inches)

Minimum/Maximum

(mm)

A

A1

B

D

E

e

H

L

Ø

28–PIN

0.090/0.104

(2.29/2.649)

0.004/0.012

(0.102/0.300)

0.013/0.020

(0.330/0.508)

0.697/0.713

(17.70/18.09)

0.291/0.299

(7.402/7.600)

0.050 BSC

(1.270 BSC)

0.394/0.419

(10.00/10.64)

0.016/0.050

(0.406/1.270)

0°/8°

(0°/8°)

L

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

21

in inches (mm) Minimum/Maximum

DIMENSIONS

Symbol 20 Lead 28 Lead

D 0.252/0.260 0.378/0.386

(6.40/6.60) (9.60/9.80)

e 0.026 BSC 0.026 BSC

(0.65 BSC) (0.65 BSC)

e

PACKAGE: PLASTIC THIN

SMALL OUTLINE
(TSSOP)

0.126 BSC (3.2 BSC)

0.039 (1.0)

0’-8’ 12’REF

0.039 (1.0)

0.007 (0.19)

0.012 (0.30)

1.0 OIA

0.252 BSC (6.4 BSC)

0.169 (4.30)

0.177 (4.50)

e/2

D

0.002 (0.05)

0.006 (0.15)

Gage
Plane

0.043 (1.10) Max

0.033 (0.85)

0.037 (0.95)

(θ2)

0.008 (0.20)

0.004 (0.09) Min

0.004 (0.09) Min

0.010 (0.25)

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

(θ3)

1.0 REF

0.020 (0.50)

0.026 (0.75)

(θ1)

22

4X غ

PACKAGE: 32 PIN QFN

D

E

32 PIN QFN
JEDECMO220
(VHHD-4)

A
A1
A2

A3

D

E

e

b 0.18 0.25 0.30

Ø

D2
E2

L

K
N

ND
NE

MIN NOM MAX

0.80 0.90 1.00
0 0.02 0.05

0 0.65 1.00

0º - 14º

3.50 3.65 3.80

3.50 3.65 3.80

0.35 0.40 0.45

0.20 - -

SEATING PLANE

Dimensions in
(mm)

0.20 REF

5.00 BSC

5.00 BSC

0.50 BSC

32

8
8

A

A2

A1

D2

e

NX b

A3

NX K

NX L

E2

NX K

32 PIN QFN

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

23

ORDERING INFORMATION

Part Number Temperature Range Package Types

SP3223UCP ...................................................... 0°C to +70°C...................................................... 20-pin PDIP

SP3223UCA ...................................................... 0°C to +70°C.................................................... 20-pin SSOP

SP3223UCA/TR ................................................ 0°C to +70°C .................................................... 20-pin SSOP

SP3223UCY ...................................................... 0°C to +70°C.................................................. 20-pin TSSOP

SP3223UCY/TR ................................................ 0°C to +70°C .................................................. 20-pin TSSOP

SP3243UCT ...................................................... 0°C to +70°C .................................................. 28-pin WSOIC

SP3243UCT/TR ................................................ 0°C to +70°C .................................................. 28-pin WSOIC

SP3243UCA ...................................................... 0°C to +70°C.................................................... 28-pin SSOP

SP3243UCA/TR ................................................ 0°C to +70°C .................................................... 28-pin SSOP

SP3243UCY ...................................................... 0°C to +70°C.................................................. 28-pin TSSOP

SP3243UCY/TR ................................................ 0°C to +70°C .................................................. 28-pin TSSOP

SP3243UCR ...................................................... 0°C to +70°C....................................................... 32-pin QFN

SP3243UCR/TR ................................................ 0°C to +70°C....................................................... 32-pin QFN

SP3223UEP .................................................... -40°C to +85°C .................................................... 20-pin PDIP

SP3223UEA .................................................... -40°C to +85°C .................................................. 20-pin SSOP

SP3223UEA/TR .............................................. -40°C to +85°C .................................................. 20-pin SSOP

SP3223UEY .................................................... -40°C to +85°C ................................................ 20-pin TSSOP

SP3223UEY/TR .............................................. -40°C to +85°C ................................................ 20-pin TSSOP

SP3243UET..................................................... -40°C to +85°C ................................................ 28-pin WSOIC

SP3243UET/TR............................................... -40°C to +85°C ................................................ 28-pin WSOIC

SP3243UEA .................................................... -40°C to +85°C .................................................. 28-pin SSOP

SP3243UEA/TR .............................................. -40°C to +85°C .................................................. 28-pin SSOP

SP3243UEY .................................................... -40°C to +85°C ................................................ 28-pin TSSOP

SP3243UEY/TR .............................................. -40°C to +85°C ................................................ 28-pin TSSOP

SP3243UER .................................................... -40°C to +85°C ..................................................... 32-pin QFN

SP3243UER/TR .............................................. -40°C to +85°C ..................................................... 32-pin QFN

Available in lead free packaging. To order add "-L" suffix to part number.
Example: SP3243UER/TR = standard; SP3243UER-L/TR = lead free

/TR = Tape and Reel
Pack quantity is 1,500 for SSOP, TSSOP and WSOIC.

REVISION HISTORY

DATE REVISION DESCRIPTION

5/25/04 A Replaced MLPQ package with QFN.

Corporation

ANALOG EXCELLENCE

Sipex Corporation

Headquarters and
Sales Office

233 South Hillview Drive
Milpitas, CA 95035
TEL: [phone]
FAX: [phone]

Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.

Date: 5/25/04 SP3223U/3243U +3.0V to +5.5V RS-232 Transceivers © Copyright 2004 Sipex Corporation

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