D Small, Thermally Enhanced SC-70 Package
D Ultra Low On-Resistance
APPLICATIONS
D Active Clamp Circuits in DC/DC Power
Supplies
Lot Traceability
and Date Code
Vishay Siliconix
S
G
D
P-Channel MOSFET
Product Is
Completely
Pb-free
ABSOLUTE MAXIMUM RATINGS (TA = 25_C UNLESS OTHERWISE NOTED)
ParameterSymbol5 secsSteady StateUnit
Drain-Source VoltageV
Gate-Source VoltageV
a
=
nuous Drain Curren
Pulsed Drain CurrentI
Continuous Diode Current (Diode Conduction)
Single Pulse Avalanche Current
Single Pluse Avalanch Energy
Maximum Power Dissipation
Operating Junction and Storage Temperature RangeTJ, T
_
a
a
TA = 25_C
TA = 85_C
L = 0.1 mH
TA = 25_C
TA = 85_C
DM
I
I
AS
E
P
DS
GS
AS
D
S
D
stg
−0.52
−0.38−0.3
−1.3−0.83
1.561.0
0.810.52
−150
"20
−0.8
−2.1
0.22mJ
−55 to 150_C
THERMAL RESISTANCE RATINGS
ParameterSymbolTypicalMaximumUnit
Maximum Junction-to-Ambient
Maximum Junction-to-Foot (Drain)Steady StateR
Notes
a. Surface Mounted on 1” x 1” FR4 Board.
a
t v 5 sec
Steady State
R
thJA
thJF
6080
100125
3445
V
−0.42
A
W
_C/W
Document Number: 73242
S-50461—Rev. B, 14-Mar-05
www.vishay.com
1
Page 2
Si1411DH
DS
,
GS
,
D
VDD = −75 V, RL = 75 W
g
ns
Vishay Siliconix
New Product
SPECIFICATIONS (TJ = 25_C UNLESS OTHERWISE NOTED)
ParameterSymbolT est ConditionMinTypMaxUnit
Static
Gate Threshold VoltageV
Gate-Body LeakageI
Zero Gate Voltage Drain CurrentI
On-State Drain Current
Drain-Source On-State Resistance
Forward Transconductance
Diode Forward Voltage
Dynamic
b
a
a
a
a
Total Gate ChargeQ
Gate-Source ChargeQ
Gate-Drain ChargeQ
Gate ResistanceR
Turn-On Delay Timet
Rise Timet
Turn-Off Delay Timet
Fall Timet
Reverse Recovery Timet
Body Diode Reverse Recovery ChargeQ
Notes
a. Pulse test; pulse width v 300 ms, duty cycle v 2%.
b. Guaranteed by design, not subject to production testing.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation
of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating
GS(th)
GSS
DSS
I
D(on)
r
DS(on)
g
V
d(on)
d(off)
fs
SD
g
gs
gd
g
r
f
rr
rr
conditions for extended periods may affect device reliability.
VDS = VGS, I
VDS = 0 V, VGS = "20 V
= −100 mA−2.5−4.5V
D
"100nA
VDS = −150 V, VGS = 0 V−1
VDS = −150 V, VGS = 0 V, TJ = 85_C−5
VDS = −15 V, VGS = −10 V−0.8A
VGS = −10 V, ID = −0.5 A2.052.6
VGS = −6 V, ID = −0.5 A2.142.7
VDS = −10 V, ID = −0.5 A1.5S
IS = −1.4 A, VGS = 0 V−0.80−1.1V
4.26.3
V
= −75 V, VGS = −10 V, ID = −0.5 A0.9nC
DS
1.3
f = 1.0 MHz8.5W
4.57
VDD = −75 V, RL = 75 W
ID ^ −1 A, V
GEN
= −4.5 V, Rg = 6 W
1117
914
1117
IF = −0.5 A, di/dt = 100 A/ms
3655
65100nC
mA
W
ns
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
0.8
0.7
VGS = 10 thru 5 V
0.6
0.5
0.4
0.3
− Drain Current (A)I
D
0.2
0.1
4 V
3 V
0.0
0246810
VDS − Drain-to-Source Voltage (V)
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2
Output CharacteristicsTransfer Characteristics
0.8
0.7
0.6
0.5
0.4
0.3
− Drain Current (A)I
D
0.2
TC = 125_C
25_C
0.1
0.0
012345
VGS − Gate-to-Source Voltage (V)
Document Number: 73242
S-50461—Rev. B, 14-Mar-05
−55_C
Page 3
Si1411DH
New Product
TYPICAL CHARACTERISTICS (25_C UNLESS NOTED)
On-Resistance vs. Drain Current
VGS = 6 V
VGS = 10 V
ID − Drain Current (A)
Gate Charge
VDS = 75 V
I
= 0.5 A
D
C − Capacitance (pF)
W )
− On-Resistance (r
DS(on)
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.00.10.20.30.40.50.60.70.8
10
8
Vishay Siliconix
250
200
150
100
50
C
rss
0
0306090120150
V
On-Resistance vs. Junction Temperature
2.5
VGS = 10 V
I
= 0.5 A
2.0
D
Capacitance
C
iss
C
oss
− Drain-to-Source Voltage (V)
DS
− Gate-to-Source Voltage (V)
GS
V
0.1
− Source Current (A)I
S
6
4
2
0
0.00.61.21.82.43.03.64.2
Qg − Total Gate Charge (nC)
Source-Drain Diode Forward VoltageOn-Resistance vs. Gate-to-Source Voltage
2
1
TJ = 150_C
TJ = 25_C
1.5
1.0
− On-Resiistance
(Normalized)
DS(on)
r
0.5
0.0
−50 −250255075100 125 150
6
5
W )
4
3
− On-Resistance (r
2
DS(on)
1
T
− Junction Temperature (_C)
J
ID = 0.5 A
0.01
00.30.60.9
VSD − Source-to-Drain Voltage (V)VGS − Gate-to-Source Voltage (V)
Vishay Siliconix maintains worldwide manuf ac t ur ing capability. Produc ts m ay be manufac tured at one of several qualified locations. Reliability data f or Silicon Technology and
Package Reliability represent a composite of all qualified locations. For related documents such as package/tape drawings, part marking, and reliability data, see
http://www.vishay.com/ppg?73242.
Document Number: 73242
S-50461—Rev. B, 14-Mar-05
www.vishay.com
5
Page 6
Legal Disclaimer Notice
Vishay
Notice
Specifications of the products displayed herein are subject to change without notice. Vishay Intertechnology, Inc.,
or anyone on its behalf, assumes no responsibility or liability for any errors or inaccuracies.
Information contained herein is intended to provide a product description only. No license, express or implied, by
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