Datasheet SAA4963, SAA4963T Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

SAA4963

Integrated NTSC comb filter

Preliminary specification
Supersedes data of 1996 Nov 22
File under Integrated Circuits, IC02

1997 Mar 03

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

FEATURES

• One chip NTSC comb filter

• Time discrete but continuous amplitude signal

GENERAL DESCRIPTION

The SAA4963 is an alignment-free one chip comb filter
compatible with NTSC M systems.

processing with analog interfaces

• Internal delay lines, filters, clock processing and signal
switches

• Alignment-free

• Few external components.

QUICK REFERENCE DATA

SYMBOL PARAMETER MIN. TYP. MAX. UNIT

V

CCA

V

DDD

V

CCO

V

CCPLL

I

CCO

I

DDD

I

CCA

I

CCPLL

V

13(p-p)

V

14(p-p)

V

7(p-p)

V

1(p-p)

V

11(p-p)

V

9(p-p)

analog supply voltage 4.75 5 5.5 V
digital supply voltage 4.75 5 5.5 V
analog supply voltage output buffer 4.75 5 5.5 V
analog supply voltage PLL 4.75 5 5.5 V
analog supply current output buffer − 35 45 mA
digital supply current − 36mA
analog supply current − 10 17 mA
analog supply current PLL − 1.5 2.5 mA
CVBS input signal (peak-to-peak value) 0.7 1 1.4 V
luminance input signal (peak-to-peak value) 0.7 1 1.4 V
chrominance input signal (peak-to-peak value) − 0.7 1 V
subcarrier input signal (peak-to-peak value) 100 200 400 mV
luminance output signal (peak-to-peak value) 0.6 1 1.54 V
chrominance output signal (peak-to-peak value) − 0.7 1.1 V

ORDERING INFORMATION

TYPE

NUMBER

SAA4963 DIP20
SAA4963T SO20

NAME DESCRIPTION VERSION

plastic dual in-line package; 20 leads (300 mil)
plastic small outline package; 20 leads; body width 7.5 mm

1997 Mar 03 2

PACKAGE

SOT146-1
SOT163-1

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

BLOCK DIAGRAM

+5 V

+5 V

handbook, full pagewidth

+5 V

+5 V

CL3

HSEL

O

C

9

CCOMB

LPFO20.5−1

BPF

BPF

1H DELAY

LPFI

LINES

S2B

i.c.

19

CONT1

CL3

CL3

CL3

CL3

HSEL

CONT2

SAA4963

CHROMACOMB

3

MHA558

i.c.

Fig.1 Block diagram.

O

Y

11

100 nF

A

CONT1

CL3

1H DELAY

STOPS

−0.5

BPF

LINES

CL3

20 10

100 nF

100 nF

100 nF

100 nF

100 nF

REFBP REFDL

47 Ω

DDD

V

16 15

DGND

CCO

V

OGND

86

CCA

V

AGND

54

CCPLL

V

17 18

PLLGND

A

100 µF

D

100 µF

A

100 µF

A

100 µF

A

VOLTAGE

REFERENCE

CURRENT

REFERENCE

CONT1

CONT2

LPF

CONTROL

LPFO1

HSEL

CL3

CL3

LUMACOMB

STOPS

CL3

DET

H

DET

V

S2A

YCOMB

LPFO1

DELAY

COMPENSATION

DET

A

D

V

DET

H

1

FSC

CLOCK

CONTROL

2

SVHS

SYNC

12

CSY
A

SEPARATOR

330 nF

1997 Mar 03 3

CLAMP

STOPS

14
ext

Y

330 nF

13

CVBS

330 nF

BIAS

ext 7

C

100 nF

Remark: all switches in LOW position.

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

PINNING

SYMBOL PIN DESCRIPTION

FSC 1 subcarrier frequency input
SVHS 2 SVHS mode forcing
i.c. 3 internally connected
V

CCA

AGND 5 analog ground
V

CCO

C

ext

OGND 8 analog ground output buffer
C

O

REFDL 10 decoupling capacitor for delay lines
Y

O

CSY 12 storage capacitor
CVBS 13 CVBS input signal
Y

ext

V

DDD

DGND 16 digital ground
PLLGND 17 analog ground PLL
V

CCPLL

i.c. 19 internally connected
REFBP 20 decoupling capacitor for band-pass

4 analog supply voltage

6 analog supply voltage output buffer
7 external chrominance input

9 chrominance output signal

11 luminance output signal

14 external luminance input
15 digital supply voltage

18 analog supply voltage PLL

filter reference

handbook, halfpage

FSC

1

SVHS

2

i.c.

3

V

4

CCA

AGND

5

V

CCO

C

ext

OGND

C

REFDL

SAA4963

6
7
8
9

O

10

MHA559

Fig.2 Pin configuration.

20
19
18
17
16
15
14
13
12
11

REFBP
i.c.
V

CCPLL

PLLGND
DGND
V

DDD

Y

ext
CVBS
CSY
Y

O

1997 Mar 03 4

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

FUNCTIONAL DESCRIPTION
Functional requirements

The NTSC comb filter processes the video standard
NTSC M. For SVHS signals the input signals are
bypassed to the output without processing by selecting the
SVHS mode.

A sync separation circuit is incorporated to generate
control signals for the internal clock processing. With a
sync compression of up to 12 dB (see Fig.5) the sync
separator works properly.

The IC is controlled via the pin SVHS (pin 2) which forces
the IC into the SVHS mode (bypass) if the comb filter
function is not desired. It is possible to select the following
modes:

COMB-mode: Luminance and chrominance comb filter
function active, if SVHS mode not active

SVHS-mode: No IC function active, all clocks inactive,

(pin 7) is bypassed to CO (pin 9) and Y

C

ext

(pin 14) is

ext

bypassed to YO (pin 11). This mode is forced via SVHS
(pin 2).

The mode changes from SVHS to COMB and vice versa
are always performed asynchronously with respect to the
vertical blanking interval.

Pin description

PIN 1)

FSC (
Input for the reference frequency fsc (see note 3 of Chapter

“Characteristics”). For SVHS signals the signal
performance can be increased by switching the input
signal at FSC off.

SVHS (

PIN 2)

Input signal that controls the operation mode. An internal
low-pass filter suppresses the subcarrier frequencies.
Thus applications are supported where the operation
mode (COMB or SVHS) is controlled by the DC level of the
FSC input signal at pin 1. For those applications the SVHS
input can be externally connected to FSC (pin 1).

The PLL and the clock processing are always stopped if
the selected level for SVHS is applied to SVHS
(independent of the vertical pulse).

V

CCA,VCCO,VDDD

AND V

(PINS 4, 6, 15 AND 18)

CCPLL

Supply voltages.

AGND, OGND, DGND

AND 17)

16

AND PLLGND (PINS 5, 8,

Ground connection. AGND is used as signal reference for
all analog input and output signals.

C

(PIN 7)

ext

Input for an external chrominance signal which is
correlated with the external VBS signal in SVHS-mode.

(PIN 9)

C

O

Chrominance output signal. This output delivers the comb
filtered chrominance from the CVBS signal in
COMB-mode or the external chrominance signal from the
input C

if the IC is forced into the SVHS-mode.

ext

In COMB-mode the output is delayed by an additional
processing delay.

Table 2 C

MODE C

output signal

O

OUTPUT SIGNAL

O

COMB comb filtered chrominance signal
SVHS external chrominance signal from C

REFDL (

PIN 10)

ext

input

Decoupling capacitor for the delay line reference voltage.

Y

(PIN 11)

O

VBS output signal. This output delivers the comb filtered
luminance signal (including synchronization pulses) in
COMB-mode or the external (C)VBS signal from the input
Y

if the IC is forced into SVHS-mode. In COMB-mode

ext

the output is delayed by an additional processing delay.

Table 1 SVHS function

SVHS SELECTED MODE

LOW COMB
HIGH SVHS (PLL and clock processing stopped)

1997 Mar 03 5

Table 3 Y

MODE Y

output signal

O

OUTPUT SIGNAL

O

COMB comb filtered luminance signal
SVHS external (C)VBS signal from Y

ext

input

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

CSY (PIN 12)
Sync top capacitor for the sync separator.

CVBS (

PIN 13)

Input for the CVBS signal in COMB-mode.

(PIN 14)

Y

EXT

Input for an external luminance signal in SVHS-mode.

REFBP (

PIN 20)

Decoupling capacitor for the band-pass filter reference
voltage.

Internal functional description

WITCHED CAPACITOR DELAY LINE

S
Delays the CVBS input signal by 1 line. Input signals for

the delay lines are the CVBS signal, the clock CL3 (3 × fsc)
and the control signal HSEL.

Output signals are the non-delayed and the 1-line delayed
CVBS signal.

WITCHED CAPACITOR BAND-PASS FILTERS (BPFS)

S

L

OW-PASS FILTER INPUT (LPFI)

Analog input low-pass filter to reduce the outband
frequencies of EMC. The input low-pass filter is included in
the signal path.

OW-PASS FILTER OUTPUTS (LPFO1 AND LPFO2)

L
Two different types of output low-pass filters LPFO1 and

LPFO2 are necessary to get equal signal delays within the
luminance path and the chrominance path (important for
good transient behaviour). The low-pass output filter type
LPFO1 is used for the luminance output while LPFO2 is
used for the chrominance output. The filters are analog 3rd
order elliptic low-pass filters that convert the output signals
from the time discrete to the time continuous domain
(reconstruction filter).

CONTROL

LPF
Automatic tuning of the low-pass filters is achieved by

adjusting the filter delays. The control information for all
filters (CONT1 and CONT2) is derived from a built-in
reference filter (LPFO1-type) that is part of a control loop.
The control loop tunes the reference filter delay and thus
all other filter delays to a time reference derived from the
system clock CL3.

The comb filter input BPFs attenuate the low frequencies
to guarantee a correct signal processing within the
comb filter.

The comb filter output BPF reduces the alias components
that are the result of the signal processing within the
comb filter.

C

HROMINANCE COMB FILTER

Separates the chrominance from the band-pass filtered
CVBS signal.

D

ELAY COMPENSATION

Compensates the internal processing time of the
band-pass filters and the chrominance comb filter section.

UMINANCE COMB FILTER

L
The comb filtered luminance output signal is obtained by

adding the delayed CVBS signal and the inverted comb
filtered chrominance signal.

ONTROL AND CLOCK PROCESSING (CLOCK CONTROL)

C
The control and clock processing block consists of the

sub-blocks PLL, clock processing and mode control. Only
if the input level at SVHS (pin 2) selects the COMB mode
the PLL and the clock processing are released for
operation.

Main tasks of the control and clock processing are:

• Clock generation of system clock CL3

• Delay line start control

• Mode control.

The signal processing is based on a 3 × fsc system clock
(CL3), that is generated by the clock processing from the
fsc-signal at FSC (pin 1) via a PLL. A clock phase
correction of 180° is necessary every line because the
subcarrier frequency divided by the line frequency results
not in an integer value. Additionally the clock processing is
synchronized fieldwise by the H-signal (correction of line
frequency instabilities).

1997 Mar 03 6

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

The PLL provides a master clock MCK of 6 × fsc, which is
locked to the subcarrier frequency at FSC (pin 1).
The system clock CL3 (3 × fsc) is obtained from MCK by a
divide-by-two circuit. The 180° phase shift is generated by
stopping the divide-by-two circuit for one MCK clock cycle.

The generated clock is a pseudo-line-locked clock that is
referenced to fsc. The sync separator generates the
necessary signals H

DET

and V

indicating the line (H)

DET

and the field (V) sync periods.
The input signals of the control and clock processing

(CLOCK CONTROL) are:

H

: analog horizontal pulse from sync separator

DET

V

: analog vertical pulse from sync separator

DET

FSC: subcarrier frequency
SVHS: SVHS control signal.

The output signals are:

CL3: system clock (3 × fsc)
HSEL: line start signal for the delay line
STOPS: forces the IC via the switches S2A and S2B into

the SVHS-mode or into COMB-mode (always
asynchronous).

ORIZONTAL AND VERTICAL SYNC SEPARATOR

H
A built-in sync separator circuit generates the H

V

signals from the CVBS input signal. This circuit is still

DET

DET

and

working properly with a 12 dB attenuated sync in a normal
700 mV black-to-white video input signal (see Fig.5).

Table 4 Function of pre clamp and main clamp

INPUT COMB-MODE SVHS-MODE

CVBS main clamp pre clamp
Y

ext

pre clamp main clamp

SIGNAL SWITCHES S2A AND S2B
Two switches are included to bypass the comb filter signal

processing. The input video signal C

for the switch S2B

ext

is internally biased.
For the YO output two signals can be selected via S2A.

Table 5 Y

SVHS Y

output signal

O

OUTPUT SIGNAL MODE

O

LOW YCOMB (combed luminance) COMB
HIGH input Y

For the C

Table 6 C

output two signals can be selected via S2B.

O

output signal

O

SVHS C

ext

OUTPUT SIGNAL MODE

O

SVHS

LOW CCOMB (combed chrominance) COMB
HIGH input C

ext

SVHS

LAMP

C
The black level clamping of the video input signals (CVBS

and Y

) is performed by the sync separator stage.

ext

The clamping level is nearly adequate to the voltage at
REFDL (pin 10). The clamp consists of a pre clamp and a
main clamp. Always the signal which is switched to the
output is clamped via the main clamp while the other signal
is pre clamped. This reduces the distortion during
switching from COMB-mode to SVHS-mode and vice
versa.

1997 Mar 03 7

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC

V input voltage protection threshold (except pin 1) −0.3 V
I

CCA

I

CCO

I

DDD

I

CCPLL

I

O

P

tot

T

stg

T

amb

V

es

supply voltage − 6.5 V

+ 0.3 V

CC

analog supply current − 17 mA
analog supply current output buffer − 45 mA
digital supply current − 6mA
analog supply current PLL − 2.5 mA
output current at pins 11 and 9 −±15 mA
total power dissipation − 400 mW
storage temperature −25 +150 °C
operating ambient temperature 0 70 °C
electrostatic handling (all pins) note 1 −±300 V

note 2 −±2000 V

Notes

1. Machine model: equivalent to discharging a 200 pF capacitor through a 0 Ω series resistor (0 Ω means:

2.5 µH+25Ω); ESD classification B in accordance with

“UZW-B0/FQ-0601”

.

2. Human body model: equivalent to discharging a 100 pF capacitor through a 1.5 kΩ series resistor; ESD
classification B in accordance with

“UZW-B0/FQ-0601”

.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER VALUE UNIT

R

th j-a

thermal resistance from junction to ambient in free air

SOT146-1 65 K/W
SOT163-1 80 K/W

1997 Mar 03 8

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

CHARACTERISTICS

V

DDD=VCCA=VCCO=VCCPLL

C

= 0.7 V (p-p) (0 dB); input signal FSC = 200 mV (p-p), sine wave, DC level = 2 V; test signal: EBU colour bar

ext

100/0/75/0

“CCIR471-1”

FSC=75Ω; load impedance for YO, CO=1kΩ and 20 pF in parallel; see Fig.9; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

Supply voltage

V

CCA

V

CCO

V

DDD

V

CCPLL

analog supply voltage (pin 4) note 1 4.75 5 5.5 V
analog supply voltage output buffer (pin 6) note 1 4.75 5 5.5 V
digital supply voltage (pin 15) note 1 4.75 5 5.5 V
analog supply voltage PLL (pin 18) note 1 4.75 5 5.5 V

FSC (pin 1)

V
V
C
I
Z

leak

1(p-p)
1

1

1

input AC voltage (peak-to-peak value) note 2 100 200 400 mV
input DC level 0 − 5.3 V
input capacitance −−10 pF
input leakage current −−10 µA
source impedance −−800 Ω

SVHS (pin 2)

V

IH

V

IL

I

leak

C

2

V

(pin 4)

CCA

I

CCA

(pin 6)

V

CCO

I

CCO

(pin 7)

C

ext

V

7

R

7

C

7

Z

7

(pin 9)

C

O

V

9/V7

HIGH level input voltage 2.4 − V
LOW level input voltage 0 0.85 1.5 V
input leakage current −−10 µA
input capacitance −−10 pF

analog supply current − 10 17 mA

supply current − 35 45 mA

input voltage (AC coupled) − 03dB
input resistance 1.25 V 100 250 400 kΩ
input capacitance −−10 pF
source impedance −−1kΩ

SVHS-mode: CO/C
COMB-mode: transfer function C-path see Fig.6
V

9

 DC jump when forcing into SVHS-mode − 200 500 mV

∆V

9

R

9

R

L

C

L

DC offset voltage related to input −400 0 +400 mV

output resistance − 10 100 Ω

load resistance (to ground) 1.0 −−kΩ

load capacitance (to ground) −−25 pF

=5V; T

=25°C; input signal Y

amb

; source impedance for Y

ext

, CVBS, C

ext

/CVBS=1V(p-p) (0 dB); input signal

ext

=75Ω decoupled with 100 nF; source impedance for

ext

V

CC

fsc±0.3fsc; note 3 −1 0 +1 dB

1997 Mar 03 9

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

9

S/N signal-to-noise ratio (0.7 V/V

FPN(p-p) fixed pattern noise peak-to-peak

α

cr

V

9

G

d

REFDL (pin 10)

V

10

(pin 11)

Y

O

V

11/V14

COMB-mode: transfer function Y-path see Fig.7
V

11

 DC jump when forcing into SVHS mode − 200 500 mV

∆V

11

R

11

R

L

C

L

V

11

S/N signal-to-noise ratio (0.7 V/V

FPN(p-p) fixed pattern noise peak-to-peak

α

cr

V

11

G

d

CSY (pin 12)

V

12

suppression (comb depth) related to the

nearest ‘nominal’ chrominance frequency

noise) unweighted; fsc±0.3fsc;

eff

see Fig.3 and note 4

227 × f

H

(227 − 35) × f
(227 + 28) × f

H
H

26 30 − dB
18 22 − dB
18 22 − dB
52 −−dB

note 3

30 −−dB
36 −−dB
50 −−dB
30 −−dB

referenced to 0.7 V (p-p) video

3f

sc

3

⁄2f

sc

f

sc

3

⁄4f

sc

crosstalk between different inputs 0 to 5 MHz −−60 −40 dB

FSC residue in SVHS mode related to

−−−60 dB

700 mV (p-p)

differential gain 0.95 −−

DC voltage 1.1 1.25 1.4 V

SVHS-mode: YO/Y

ext

0 to 5 MHz −1 0 +1 dB

DC offset voltage related to input −400 0 +400 mV

output resistance − 10 100 Ω

load resistance (to ground) 1.0 −−kΩ

load capacitance (to ground) −−25 pF

suppression (comb depth) related to the

nearest ‘nominal’ luminance frequency

noise) unweighted;

eff

see Fig.4 and note 4

227.5 × f
(227.5 − 35) × f
(227.5 + 28) × f

H

H
H

26 30 − dB
19 21 − dB
10 12 − dB
52 −−dB

200 kHz to 5 MHz

referenced to 0.7 V (p-p) video

3f

sc

3

⁄2f

sc

f

sc

3

⁄4f

sc

30 −−dB
30 −−dB
30 −−dB

40 −−dB
crosstalk between different inputs 0 to 5 MHz −−60 −40 dB
FSC residue in SVHS mode related to

−−−60 dB

700 mV (p-p)
differential gain 0.95 −−

DC voltage 0 2.0 V

CC

V

1997 Mar 03 10

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

CVBS (pin 13)

V

13

I

13

V

13

Z

13

(pin 14)

Y

ext

V

14

I

14

V

14

Z

14

(pin 15)

V

DDD

I

DDD

(pin 18)

V

CCPLL

I

18

REFBP (pin 20)

V

20

Notes

input voltage (AC coupled) 12 dB sync compression

possible; see Fig.5

input current during sync pulse;

main clamp active
during active video;

main clamp active
DC voltage during black level 1.1 1.25 1.4 V
source impedance −−1kΩ

input voltage (AC coupled) 12 dB sync compression

possible; see Fig.5
input current during sync pulse;

pre clamp active

during active video;

pre clamp active
DC voltage during black level 1.1 1.25 1.4 V
source impedance −−1kΩ

supply current − 36mA

supply current − 1.5 2.5 mA

DC voltage 1.1 1.25 1.4 V

−3 0 +3 dB

−30 −16 −µA

− 2.2 4.5 µA

−3 0 +3 dB

−30 −20 −µA

− 2.2 4.5 µA

∆VV

1.

∆VV
∆VV

– 300 mV≤= ∆VV

CCAVDDD

– 300 mV≤= ∆VV

CCAVCCO

– 300 mV≤= ∆VV

CCOVDDD

– 300 mV≤=

CCAVCCPLL

– 300 mV≤=

CCOVCCPLL

– 300 mV≤=

DDDVCCPLL

2. Input AC voltage and detection level are valid for sine wave signals and for square wave signals with a duty factor of

0.4 to 0.6.

3. Subcarrier frequency f

= 3.579545 MHz.

sc

4. Line frequency fH= 15.734264 kHz.

1997 Mar 03 11

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

handbook, full pagewidth

f

f

sc

NTSC

handbook, full pagewidth

C

(n − 0.5)f

Y

H

nf

H

Y

(n − 2)f

C

Y

H

(n − 1.5)f

H

(n − 1)f

H

Fig.3 Principle frequency response of a comb filtered NTSC chrominance signal.

f

f

sc

NTSC

MHA560

Y

(n − 2)f

C

H

(n − 1.5)f

H

Y

(n − 1)f

H

Fig.4 Principle frequency response of a comb filtered NTSC luminance signal.

1997 Mar 03 12

C

(n − 0.5)f

Y

nf

H

H

MHA561

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

handbook, full pagewidth

0.714
U

(V)

0.537

0.165

0

−0.072

−0.165

−0.286

MHA562

Fig.5 FCC/EIA colour bar 100% saturation, 75% amplitude with 12 dB sync attenuation.

handbook, full pagewidth

gain
(dB)

+1

0

−1

−4

−25

−30

0.13 0.66 0.85 1 1.12 1.35 2.0

Fig.6 Chrominance path: tolerance band with anti-alias filter.

1997 Mar 03 13

MHA563

frequency (fsc)

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

handbook, full pagewidth

gain
(dB)

+1

0

−1

−2

−3

−5

−32

0.7 1 1.12 1.4 2.7

Fig.7 Luminance path: tolerance band with anti-alias filter.

TEST AND APPLICATION INFORMATION

MGD848

frequency (fsc)

handbook, full pagewidth

SVHS-C

SVHS-VBS

CVBS

int

MHA565

I2C-bus

C

ext

79

Y

ext

14

CVBS

13

Fig.8 Application diagram: SAA4963 with TDA837X.

1997 Mar 03 14

CONTROLLER

I/O PORT

SVHS

2

SAA4963




COMB FILTER

1

FSC

11

IF input

C

O

TDA837X

Y

O

MSD

R

G

TDA4665

BBDL

I

2

C-bus

B

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

handbook, full pagewidth

DDDS

V

1

33 µH

DDD

V

2

100

100

µF

nF

CCOS

V

1

33 µH

CCO

V

2

100

100

µF

nF

REFBP

20

100

47 Ω

nF

i.c.

CCAS

V

33 µH

V

19

1

CCA

2

100

100

CCPLL

V

CCPLL

V

18

µF

nF

PLLGND

CCPLLS

1

2

V

33 µH

100

100

CCPLL

V

DDD

V

DGND

17

16

µF

nF

DDD

V

15

MHA564

ext

Y

CVBS

330 nF

CVBS

131112

75 Ω

CSY

330 nF

SVHS-Y
O

Y

1 kΩ

75 Ω

330 nF

ext

Y

14

Fig.9 Test circuit.

2

3

i.c.

V

FSC

FSC

1

SVHS

75 Ω

1997 Mar 03 15

4

CCA

CCA

V

5

AGND

SAA4963

6

CCO

V

CCO

V

75 Ω

ext

C

8

9

7

ext

C

100 nF

C

OGND

SVHS-C

SVHS

10

O

REFDL

100 nF

1 kΩ

3

2

4

1

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

PACKAGE OUTLINES

DIP20: plastic dual in-line package; 20 leads (300 mil)

D

seating plane

L

Z

20

pin 1 index

e

b

SOT146-1

M

E

A

2

A

A

1

w M

b

1

11

E

c

(e )

1

M

H

1

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

A

A 

A 

UNIT

inches

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

max.

mm

OUTLINE
VERSION

SOT146-1

1 2

min.

max.

1.73

1.30

0.068

0.051

IEC JEDEC EIAJ

  SC603

b

b

1

0.53

0.38

0.021

0.015

0.36

0.23

0.014

0.009

REFERENCES

cD E e M

(1) (1)

26.92

26.54

1.060

1.045

1997 Mar 03 16

6.40

6.22

0.25

0.24

10

(1)

M

e

L

1

3.60

8.25

3.05

7.80

0.14

0.32

0.12

0.31

EUROPEAN

PROJECTION

H

E

10.0

0.2542.54 7.62

8.3

0.39

0.010.10 0.30

0.33

ISSUE DATE

w

92-11-17
95-05-24

Z

max.

2.04.2 0.51 3.2

0.0780.17 0.020 0.13

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

SO20: plastic small outline package; 20 leads; body width 7.5 mm

D

c

y

Z

20

pin 1 index

1

e

11

A

2

10

w M

b

p

SOT163-1

E

H

E

Q

A

1

L

p

L

detail X

(A )

A

X

v M

A

A

3

θ

0 5 10 mm

scale

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

OUTLINE
VERSION

SOT163-1

A

max.

2.65

0.10

A

1

0.30

0.10

0.012

0.004

A2A

2.45

2.25

0.096

0.089

IEC JEDEC EIAJ

075E04 MS-013AC

0.25

0.01

b

3

p

0.49

0.32

0.36

0.23

0.019

0.013

0.014

0.009

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

(1)E(1) (1)

cD

13.0

7.6

7.4

0.30

0.29

1.27

0.050

12.6

0.51

0.49

REFERENCES

1997 Mar 03 17

eHELLpQ

10.65

10.00

0.42

0.39

1.4

0.055

1.1

0.4

0.043

0.016

1.1

1.0

0.043

0.039

PROJECTION

0.25

0.25 0.1

0.01

0.01

EUROPEAN

ywv θ

Z

0.9

0.4

8

0.004

ISSUE DATE

0.035

0.016

92-11-17
95-01-24

0

o
o

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

SOLDERING
Introduction

There is no soldering method that is ideal for all IC
packages. Wave soldering is often preferred when
through-hole and surface mounted components are mixed
on one printed-circuit board. However, wave soldering is
not always suitable for surface mounted ICs, or for
printed-circuits with high population densities. In these
situations reflow soldering is often used.

This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in

“IC Package Databook”

our

(order code 9398 652 90011).

DIP

OLDERING BY DIPPING OR BY WA VE

S
The maximum permissible temperature of the solder is

260 °C; solder at this temperature must not be in contact
with the joint for more than 5 seconds. The total contact
time of successive solder waves must not exceed
5 seconds.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified maximum storage temperature (T

stg max

). If the
printed-circuit board has been pre-heated, forced cooling
may be necessary immediately after soldering to keep the
temperature within the permissible limit.

R

EPAIRING SOLDERED JOINTS

Apply a low voltage soldering iron (less than 24 V) to the
lead(s) of the package, below the seating plane or not
more than 2 mm above it. If the temperature of the
soldering iron bit is less than 300 °C it may remain in
contact for up to 10 seconds. If the bit temperature is
between 300 and 400 °C, contact may be up to 5 seconds.

SO

REFLOW SOLDERING
Reflow soldering techniques are suitable for all SO

packages.

Several techniques exist for reflowing; for example,
thermal conduction by heated belt. Dwell times vary
between 50 and 300 seconds depending on heating
method. Typical reflow temperatures range from
215 to 250 °C.

Preheating is necessary to dry the paste and evaporate
the binding agent. Preheating duration: 45 minutes at
45 °C.

AVE SOLDERING

W
Wave soldering techniques can be used for all SO

packages if the following conditions are observed:

• A double-wave (a turbulent wave with high upward
pressure followed by a smooth laminar wave) soldering
technique should be used.

• The longitudinal axis of the package footprint must be
parallel to the solder flow.

• The package footprint must incorporate solder thieves at
the downstream end.

During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Maximum permissible solder temperature is 260 °C, and
maximum duration of package immersion in solder is
10 seconds, if cooled to less than 150 °C within
6 seconds. Typical dwell time is 4 seconds at 250 °C.

A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

EPAIRING SOLDERED JOINTS

R
Fix the component by first soldering two diagonally-

opposite end leads. Use only a low voltage soldering iron
(less than 24 V) applied to the flat part of the lead. Contact
time must be limited to 10 seconds at up to 300 °C. When
using a dedicated tool, all other leads can be soldered in
one operation within 2 to 5 seconds between
270 and 320 °C.

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.

1997 Mar 03 18

Philips Semiconductors Preliminary specification

Integrated NTSC comb filter SAA4963

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

1997 Mar 03 19

Philips Semiconductors – a worldwide company

Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Prags Boulevard 80, PB 1919, DK-2300 COPENHAGEN S,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]/xxx
France: 4 Rue du Port-aux-Vins, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]
Greece: No. 15, 25th March Street, GR 17778 TAVROS/ATHENS,

Tel. [phone], Fax. [phone]

Hungary: see Austria
India: Philips INDIA Ltd, Shivsagar Estate, A Block, Dr. Annie Besant Rd.

Worli, MUMBAI 400 018, Tel. [phone], Fax. [phone]

Indonesia: see Singapore
Ireland: Newstead, Clonskeagh, DUBLIN 14,

Tel. [phone], Fax. [phone]
Israel: RAPAC Electronics, 7 Kehilat Saloniki St, TEL AVIV 61180,

Tel. [phone], Fax. [phone]
Italy: PHILIPS SEMICONDUCTORS, Piazza IV Novembre 3,

20124 MILANO, Tel. [phone], Fax. [phone]
Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku, TOKYO 108,

Tel. [phone], Fax. [phone]
Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,

Tel. [phone], Fax. [phone]
Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,

Tel. [phone], Fax. [phone]
Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,

Tel. [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Ul. Lukiska 10, PL 04-123 WARSZAWA,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 1231,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 7430 Johannesburg 2000,
Tel. [phone], Fax. [phone]

South America: Rua do Rocio 220, 5th floor, Suite 51,
04552-903 São Paulo, SÃO PAULO - SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone], Fax. [phone]

Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Talatpasa Cad. No. 5, 80640 GÜLTEPE/ISTANBUL,
Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors, Marketing & Sales Communications,
Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. 1997 SCA53
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

Internet: http://www.semiconductors.philips.com

Printed in The Netherlands 547047/1200/02/pp20 Date of release: 1997 Mar 03 Document order number: 9397 750 01765