Datasheet RF1S30N06LESM Datasheet (Intersil)

Page 1
RFP30N06LE, RF1S30N06LESM
/ j
/
/
[ /Title (RFP3 0N06L E, RF1S3 0N06L ESM)
Sub-
ect (30A, 60V, ESD Rated,
0.047 Ohm, Logic Level N­Chan­nel Power MOS­FETs)
Autho r ()
Key­words (Inter­sil Corpo­ration, ESD Rated,
0.047 Ohm, Logic Level N­Chan-
Data Sheet April 1999 File Number
30A, 60V, ESD Rated, 0.047 Ohm, Logic Level N-Channel Power MOSFETs
These transistors incorporate ESD protection and are designed to withstand 2kV (Human Body Model) of ESD.
Formerly developmental type TA49027.
Ordering Information
PART NUMBER PACKAGE BRAND
RFP30N06LE TO-220AB F30N06LE RF1S30N06LESM TO-263AB 1S30N06L
NOTE: Whenordering usethe entire part number.Add suffix, 9A, to obtain the TO-263 variant in tape and reel i.e. RF1S30N06LESM9A.
Packaging
JEDEC TO-220AB JEDEC TO-263AB
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
Features
• 30A, 60V
•r
• 2kV ESD Protected
• Temperature Compensating PSPICE™ Model
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
= 0.047
DS(ON)
Components to PC Boards”
Symbol
D
G
S
DRAIN
GATE
SOURCE
(FLANGE)
3629.2
6-260
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE™ is a trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
Page 2
RFP30N06LE, RF1S30N06LESM
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
A
RFP30N06LE, RF1S30N06LESM UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Drain to Gate Voltage (RGS= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Pulsed Avalanche Rating. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
DSS
DGR
GS
DM
AS
D
Refer to Peak Current Curve
D
Derate Above 25oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Electrostatic Discharge Rating, MIL-STD-883, Category B(2). . . . . . . . . . . . . . . .ESD 2 kV
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief 334. . . . . . . . . . . . . . . . . . . . . . . . . . . . T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
60 V 60 V
+10, -8 V
30
Refer to UIS Curve
96
0.645
-55 to 175
300 260
A
W
W/oC
o
C
o
C
o
C
NOTE:
1. TJ= 25oC to 150oC.
Electrical Specifications T
= 25oC, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV Gate to Threshold Voltage V
GS(TH)VGS
Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I Drain to Source On Resistance (Note 2) r
DS(ON)ID
Turn-On Time t Turn-On Delay Time t
d(ON)
Rise Time t Turn-Off Delay Time t
d(OFF)
Fall Time t Turn-Off Time t Total Gate Charge Q
g(TOT)VGS
Gate Charge at 5V Q Threshold Gate Charge Q
Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C Thermal Resistance Junction to Case R Thermal Resistance Junction to Ambient R
DSSID
DSS
GSS
ON
r
f
OFF
g(5)
g(TH)
ISS OSS RSS
θJC
θJA
= 250µA, VGS = 0V, Figure 11 60 - - V
= VDS, ID = 250µA, Figure 10 1 - 2 V VDS = Rated B VDS = 0.8 x Rated B
, VGS = 0 - - 25 µA
VDSS
, VGS = 0, TC = 150oC - - 250 µA
VDSS
VGS = +10, -8V - - ±10 µA
= 30A, VGS = 5V, Figure 9 - - 0.047
VDD = 30V, ID = 30A, RL = 1, VGS = 5V, RGS = 2.5Ω, Figures 13, 16, 17
- - 140 ns
-11-ns
-88-ns
-30-ns
-40-ns
- - 100 ns
= 0V to 10V VDD = 48V, VGS = 0V to 5V - 28 34 nC VGS = 0V to 1V - 1.8 2.6 nC
ID = 30A, RL = 1.6 Figures 18, 19
VDS = 25V, VGS = 0V, f = 1MHz Figure 12
-5162nC
- 1350 - pF
- 290 - pF
-85-pF
- - 1.55oC/W
--80oC/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage (Note 2) V
SD
Diode Reverse Recovery Time t
NOTES:
2. Pulse Test: Pulse Width 300ms, Duty Cycle 2%.
3. Repetitive Rating: Pulse Width limited by max junction temperature. See Transient Thermal Impedance Curve (Figure 3) and Peak Current Capability Curve (Figure 5).
6-261
ISD = 30A - - 1.5 V ISD = 30A, dISD/dt = 100A/µs - - 125 ns
rr
Page 3
RFP30N06LE, RF1S30N06LESM
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
25 50 75 100
0
0
TC, CASE TEMPERATURE (oC)
Unless Otherwise Specified
125
FIGURE 1. NORMALIZED POWERDISSIPATION vs CASE
TEMPERATURE
1
0.5
150
175
40
30
20
, DRAIN CURRENT (A)
10
D
I
0
25 50 75 100
TC, CASE TEMPERATURE (oC)
125 150
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
175
0.2
0.1
0.1
THERMAL IMPEDANCE
0.01
0.05
0.02
0.01 SINGLE PULSE
-5
10
-4
10
-3
10
, NORMALIZED
JC
θ
Z
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
200
100
10
, DRAIN CURRENT (A) I
D
OPERATION IN THIS AREA MAY BE LIMITED BY r
1
1 10 100
DS(ON)
VDS, DRAIN TO SOURCE VOLTAGE (V)
TC = 25oC
= MAX RATED
T
J
-2
10
t, RECTANGULAR PULSE DURATION (s)
500
100ms
1ms
10ms
100ms
DC
VGS = 10V
100
, PEAK CURRENT CAPABILITY (A)
DM
I
20
-6
10
VGS = 5V
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION
P
DM
t
1
t
2
NOTES: DUTY FACTOR: D = t PEAK TJ = PDM x Z
-1
10
FOR TEMPERATURES ABOVE 25 CURRENT AS FOLLOWS:
-5
10
-4
10
10-310
t, PULSE WIDTH (s)
1/t2
x R
JC
θ
0
10
o
C DERATE PEAK
175 Tc–

II
=
---------------------- -

25

-2
+ T
JC
C
θ
1
10
150
TC = 25oC
10-110010
1
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
6-262
FIGURE 5. PEAK CURRENT CAPABILITY
Page 4
RFP30N06LE, RF1S30N06LESM
Typical Performance Curves
100
10
If R = 0
, AVALANCHE CURRENT (A)
tAV = (L)(IAS)/(1.3*RATED BV
AS
If R 0
I
= (L/R)ln[(IAS*R)/(1.3*RATED BV
t
AV
1
0.01
0.1
tAV, TIME IN AVALANCHE (ms)
DSS
Unless Otherwise Specified (Continued)
STARTING T
STARTING TJ = 150oC
- VDD)
DSS
= 25oC
J
- VDD) +1]
110
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING
100
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX.
80
o
25
60
40
-55oC
C
175oC
100
TC = 25oC
80
60
40
, DRAIN CURRENT (A)
D
20
I
0
0 1.5
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 10V
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX.
3.0
4.5
FIGURE 7. SATURATION CHARACTERISTICS
3.0
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX.
2.5
2.0
1.5
1.0
ON RESISTANCE
= 5V, ID = 30A
V
GS
VGS = 5V
V
= 4.5V
GS
= 4V
V
GS
VGS = 3V
6.0 7.5
20
, DRAIN TO SOURCE CURRENT (A)
DS(ON)
I
0
0
V
GS
3.0
, GATE TO SOURCE VOLTAGE (V)
4.5
VDD = 15V
6.0
FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
2.0 VGS= VDS, ID = 250µA
1.5
1.0
NORMALIZED GATE
0.5
THRESHOLD VOLTAGE
0
-80
-40
04080
TJ, JUNCTION TEMPERATURE (oC)
160
120 200
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGEvs
JUNCTION TEMPERATURE
0.5
NORMALIZED DRAIN TO SOURCE
0
7.51.5
-80 -40
04080
TJ, JUNCTION TEMPERATURE (oC)
120
160
200
RESISTANCE vs JUNCTION TEMPERATURE
2.0 ID = 250µA
1.5
1.0
0.5
BREAKDOWN VOLTAGE
NORMALIZED DRAIN TO SOURCE
0
-80 -40 0 40 80 120 160 200 TJ, JUNCTION TEMPERATURE (oC)
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
6-263
Page 5
RFP30N06LE, RF1S30N06LESM
Typical Performance Curves
Unless Otherwise Specified (Continued)
2000
C
1500
ISS
VGS = 0V, f = 1MHz
1000
500
C, CAPACITANCE (pF)
0
0
ISS
C
= C
RSS
C
CDS + C
C
OSS
C
RSS
5
10 15 20 25
OSS
GD
GD
GD
C
= CGS + C
VDS, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Test Circuits and Waveforms
V
DS
L
VARY tP TO OBTAIN REQUIRED PEAK I
V
GS
AS
R
G
DUT
60
45
30
15
, DRAIN TO SOURCE VOLTAGE (V)
DS
0
V
VDD = BV
I
20
I
DSS
0.75 BV
0.50 BV
0.25 BV
G(REF) G(ACT)
DSS DSS DSS
RL = 2.0 I
= 0.62mA
G(REF)
= 5V
V
GS
t, TIME (s)
0.75 BV
0.50 BV
0.25 BV
VDD = BV
DSS DSS DSS
I
G(REF)
80
I
G(ACT)
DSS
5.0
3.75
2.5
1.25
0
, GATE TO SOURCE VOLTAGE (V)
GS
V
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
BV
DSS
t
P
I
+
V
DD
-
AS
V
DS
V
DD
0V
P
I
AS
0.01
0
t
AV
t
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
t
ON
t
d(ON)
90%
10%
t
r
R
L
V
DS
V
GS
V
GS
+
-
V
DS
0
0V
R
GS
DUT
V
GS
10%
0
50%
PULSE WIDTH
FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
t
d(OFF)
90%
t
OFF
50%
t
f
10%
90%
6-264
Page 6
RFP30N06LE, RF1S30N06LESM
Test Circuits and Waveforms
V
DS
V
GS
I
G(REF)
FIGURE 18. GATE CHARGE TEST CIRCUIT
(Continued)
R
L
DUT
V
DD
+
V
DD
­VGS= 1V
0
I
G(REF)
0
V
GS
Q
Q
g(TH)
V
g(5)
DS
Q
g(TOT)
VGS= 10V
VGS= 5V
FIGURE 19. GATE CHARGE WAVEFORMS
6-265
Page 7
PSPICE Electrical Model
SUBCKT RFP30N06LE 2 1 3; rev 6/2/93 CA 12 8 1 3.34e-9 CB 15 14 3.44e-9 CIN 6 8 0 1.343e-9
DBODY 7 5 DBDMOD DBREAK 5 11 DBKMOD DESD1 91 9 DESD1MOD DESD2 91 7 DESD2MOD DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 75.39 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTO 20 6 18 8 1
IT 8 17 1
LDRAIN 2 5 1e-9 LGATE 1 9 7.22e-9 LSOURCE 3 7 6.31e-9
MOS1 16 6 8 8 MOSMOD M = 0.99 MOS2 16 21 8 8 MOSMOD M = 0.01
RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 11.86e-3 RGATE 9 20 2.52 RIN 6 8 1e9 RSCL1 5 51 RSLVCMOD 1e-6 RSCL2 5 50 1e3 RSOURCE 8 7 RDSMOD 26.6e-3 RVTO 18 19 RVTOMOD 1
RFP30N06LE, RF1S30N06LESM
DPLCAP
10
-
6
ESG
8
GATE
1
9
LGATE RGATE
DESD1
91
DESD2
+
EVTO
20
+
18
8
S1A
12
S1B
CA
-
13814
EGS
6
RIN
S2A
13
S2B
13
+
6 8
-
VTO
15
EDS
16
+
CIN
CB
+
--
5
5
51
14
5 8
RSCL1RSCL2
51
+
ESCL
50 RDRAIN
21
MOS1
8
DBREAK
EBREAK
MOS2
RSOURCE
11
17
+
17 18
-
7
RBREAK
IT
LDRAIN
DBODY
LSOURCE
SOURCE
18
RVTO
19
VBAT
+
DRAIN
2
3
S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD
VBAT 8 19 DC 1 VTO 21 6 0.5
ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/89,7))
.MODEL DBDMOD D (IS = 3.80e-13 RS = 1.12e-2 TRS1 = 1.61e-3 TRS2 = 6.08e-6 CJO = 1.05e-9 TT = 3.84e-8) .MODEL DBKMOD D (RS = 1.82e-1 TRS1 = 7.50e-3 TRS2 = -4.0e-5) .MODEL DESD1MOD D (BV = 13.54 TBV1 = 0 TBV2 = 0 RS = 45.5 TRS1 = 0 TRS2 = 0) .MODEL DESD2MOD D (BV = 11.46 TBV1 = -7.576e-4 TBV2 = -3.0e-6 RS = 0 TRS1 = 0 TRS2 = 0) .MODEL DPLCAPMOD D (CJO = 0.591e-9 IS = 1e-30 N = 10) .MODEL MOSMOD NMOS (VTO = 1.94 KP = 139.2 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL RBKMOD RES (TC1 = 1.07e-3 TC2 = -3.03e-7) .MODEL RDSMOD RES (TC1 = 5.38e-3 TC2 = 1.64e-5) .MODEL RSLVCMOD RES (TC1 = 1.75e-3 TC2 = 3.90e-6) .MODEL RVTOMOD RES (TC1 = -2.15e-3 TC2 = -5.43e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -4.05 VOFF = -1.5) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -1.5 VOFF = -4.05) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -2.2 VOFF = 2.8) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 2.8 VOFF = -2.2)
.ENDS
NOTE: For further discussion of the PSPICE model, consult A New PSPICE Sub-Circuit for the Power MOSFET Featuring Global Temperature Options; IEEE Power Electronics Specialist Conference Records 1991.
6-266
Page 8
RFP30N06LE, RF1S30N06LESM
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA
Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240
6-267
EUROPE
Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05
ASIA
Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
Loading...