Datasheet RF1S25N06SM, RFP25N06 Datasheet (Intersil)

Page 1
RFP25N06, RF1S25N06SM
Data Sheet July 1999 File Number
25A, 60V, 0.047 Ohm, N-Channel Power MOSFETs
Formerly developmental type TA09771.
Ordering Information
P AR T NUMBER P ACKAGE BRAND
RFP25N06 TO-220AB RFP25N06 RF1S25N06SM TO-263AB F1S25N06
NOTE: When ordering use the entire part number. Add the suffix, 9A, toobtaintheTO-263ABvariant in tape and reel, e.g. RF1S25N06SM9A.
Features
• 25A, 60V
DS(ON)
= 0.047
®
Model
•r
• Temperature Compensating PSPICE
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
o
C Operating Temperature
• 175
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount Components to PC Boards”
Symbol
D
G
1492.4
Packaging
DRAIN
(FLANGE)
S
JEDEC TO- 220AB JEDEC TO-263AB
SOURCE
DRAIN
GATE
GATE SOURCE
DRAIN
(FLANGE)
4-511
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
PSPICE® is a registered trademark of MicroSim Corporation.
http://www.intersil.com or 407-727-9207
| Copyright © Intersil Corporation 1999
Page 2
RFP25N06, RF1S25N06SMS
Absolute Maximum Ratings T
= 25oC, Unless Otherwise Specified
C
RFP25N06,
RF1S25N06SM UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Drain to Gate Voltage (RGS = 20k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . V
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Continuous Drain Current (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Single Pulse Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
DSS
DGR
GS
D
DM
AS
D
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . TJ, T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operationofthe device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
60 V 60 V
±20 V
25
(Figure 5) (Figure 6)
72
0.48
-55 to 175
300 260
A
W
W/oC
o
C
o
C
o
C
NOTE:
1. TJ= 25oC to 150oC.
Electrical Specifications T
= 25oC, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV Gate to Source Threshold Voltage V Zero Gate Voltage Drain Current I
DSS ID
GS(TH) VGS
DSS
= 250µA, VGS = 0V (Figure 11) 60 - - V
= VDS, ID = 250µA (Figure 10) 2 - 4 V VDS= 60V TC = 25oC--1µA VGS = 0V TC = 150oC--50µA
Gate to Source Leakage Current I Drain to Source On Resistance r
DS(ON) ID
Turn-On Time t Turn-On Delay Time t
d(ON)
Rise Time t Turn-Off Delay Time t
d(OFF)
Fall Time t Turn-Off Time t Total Gate Charge Q
g(TOT) VGS
Gate Charge at 10V Q Threshold Gate Charge Q Input Capacitance C Output Capacitance C Reverse Transfer Capacitance C Thermal Resistance Junction to Case R Thermal Resistance Junction to Ambient R
GSS
OFF
g(10)
g(TH)
OSS
VGS = ±20V - - ±100 nA
= 25A, VGS = 10V (Figure 9) - - 0.047
VDD = 30V, ID = 12.5A
ON
RL = 2.4, VGS = 10V RGS = 10 (Figure 13)
r
- - 60 ns
-14-ns
-30-ns
-45-ns
f
-22-ns
- - 100 ns
= 0 to 20V VDD = 48V, ID = 25A, VGS = 0 to 10V - - 45 nC VGS = 0 to 2V - - 3 nC VDS = 25V, VGS = 0V
ISS
RL= 1.92 I
= 0.75mA
g(REF)
(Figure 13)
f = 1MHz (Figure 12)
RSS
(Figure 3) - - 2.083oC/W
θJC θJA
- - 80 nC
- 975 - pF
- 330 - pF
-95-pF
--62oC/W
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V Reverse Recovery Time t
4-512
ISD = 25A - - 1.5 V
SD
ISD = 25A, dISD/dt = 100A/µs - - 125 ns
rr
Page 3
RFP25N06, RF1S25N06SM
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
Unless Otherwise Specified
POWER DISSIPATION MULTIPLIER
0
025
50
TC, CASE TEMPERATURE (oC)
75 100
125
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
2
1
0.5
150
175
30
25
20
15
10
, DRAIN CURRENT (A)
D
I
5
0
25 50 75 100
TC, CASE TEMPERATURE (oC)
125
150
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
175
0.2
0.1
0.1
, NORMALIZED
Z
200
100
10
, DRAIN CURRENT (A)
D
I
1
1
0.05
JC
0.02
θ
0.01
THERMAL IMPEDANCE
0.01
-5
10
OPERATION IN THIS AREA MAY BE LIMITED BY r
V
DS
SINGLE PULSE
-4
10
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
TC = 25oC T
J
SINGLE PULSE
DS(ON)
10
, DRAIN TO SOURCE VOLTAGE (V)
-3
10
t1, RECTANGULAR PULSE DURATION (s)
= MAX RATED
100µs
1ms
10ms
100ms
DC
100
-2
10
200
100
, PEAK CURRENT (A)
DM
I
10
-1
10
VGS = 20V
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION
-5
10
-4
10
P
DM
NOTES: DUTY FACTOR: D = t1/t PEAK TJ = PDM x Z
FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT CAPABILITY AS FOLLOWS:
VGS = 10V
-3
10
t, PULSE WIDTH (s)
10
II
-2
2
x R
C
J
θ
0
10

=

25

-1
10
t
1
t
2
C
J
θ
175 TC–
----------------------- ­150
+ T
C
10
TC = 25oC
0
10
1
1
10
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY
4-513
Page 4
RFP25N06, RF1S25N06SM
Typical Performance Curves
100
10
STARTING TJ = 150oC
If R = 0
, AVALANCHE CURRENT (A)
tAV = (L)(IAS)/(1.3*RATED BV
AS
I
If R0 t
= (L/R)ln[(IAS*R)/(1.3*RATED BV
AV
1
0.01
0.1
tAV, TIME IN AVALANCHE (µs)
DSS
Unless Otherwise Specified (Continued)
STARTING TJ = 25oC
- VDD)
) +1]
DSS-VDD
1
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
70
VDD= 15V
PULSE DURATION = 80µs
60
DUTY CYCLE = 0.5% MAX
50
40
-55oC
25oC
175oC
70
= 20V
V
GS
60
50
40
30
20
, DRAIN CURRENT (A)
D
I
10
10
0
0
2
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 10V
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
= 25oC
T
C
VGS = 4.5V
468
= 8V
V
GS
VGS = 7V
V
= 6V
GS
VGS = 5V
FIGURE 7. SATURATION CHARACTERISTICS
2.5
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
= 10V, ID = 25A
V
GS
2.0
1.5
30
DRAIN CURRENT (A)
20
D,
I
10
0
0468102
VGS, GATE TO SOURCE VOLTAGE (V)
FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
2.0 VGS = V
DS
ID = 250µA
1.5
1.0
NORMALIZED GATE
0.5
THRESHOLD VOLTAGE
0
-80 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE (oC)
160
200
1.0
ON RESISTANCE
0.5
NORMALIZED DRAIN TO SOURCE
0
-80 -40 0 40 80 120 160 TJ, JUNCTION TEMPERATURE (oC)
RESISTANCE vs JUNCTION TEMPERATURE
2.0 ID = 250µA
1.5
1.0
0.5
BREAKDOWN VOLTAGE
NORMALIZED DRAIN TO SOURCE
0
-80 -40 0 40 80 120 160 , JUNCTION TEMPERATURE (oC)
T
J
200
200
FIGURE 10. NORMALIZED GATETHRESHOLD VOLTAGEvs
JUNCTION TEMPERATURE
4-514
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
Page 5
RFP25N06, RF1S25N06SM
Typical Performance Curves
1600
C
1200
800
400
C, CAPACITANCE (pF)
0
0 5 10 15 20 25
ISS
C
OSS
C
RSS
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
Unless Otherwise Specified (Continued)
VGS = 0V, f = 1MHz
= CGS + C
C C C
ISS RSS OSS
= C = CDS + C
GD
GD
GD
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Test Circuits and Waveforms
V
DS
L
VARY t
TO OBTAIN
P
REQUIRED PEAK I
V
GS
AS
R
G
DUT
+
-
60
45
30
15
, DRAIN TO SOURCE VOLTAGE (V)
DS
V
0
VDD = BV
I
g REF()
--------------------
20
I
g ACT()
DSS
0.75 BV
0.50 BV
0.25 BV
RL = 2.4
= 0.75mA
I
g(REF)
V
= 10V
GS
t, TIME (µs)
DSS DSS
DSS
V
= BV
DD
I
g REF()
--------------------
80
I
g ACT()
DSS
10
7.5
5.0
2.5
0
, GATE TO SOURCE VOLTAGE (V)
GS
V
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
BV
DSS
t
P
I
AS
V
DD
V
DS
V
DD
0V
P
I
AS
0.01
0
t
AV
t
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
t
ON
t
10%
d(ON)
90%
50%
10%
t
r
PULSE WIDTH
V
DS
V
DS
R
DUT
L
+
V
DD
-
0
V
GS
0
V
GS
R
GS
V
GS
t
d(OFF)
90%
FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
t
OFF
50%
t
f
90%
10%
4-515
Page 6
RFP25N06, RF1S25N06SM
Test Circuits and Waveforms
V
DS
V
GS
I
g(REF)
FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORM
(Continued)
R
L
DUT
V
DD
+
V
DD
-
VGS= 2V
0
I
g(REF)
0
V
GS
Q
Q
g(TH)
V
DS
g(10)
Q
g(TOT)
VGS= 20V
VGS = 10V
4-516
Page 7
PSPICE Electrical Model
.SUBCKT RFP25N06 2 1 3 ; rev 8/19/94
CA 12 8 1.83e-9 CB 15 14 1.98e-9 CIN 6 8 9.7e-10
DBODY 7 5 DBDMOD DBREAK 5 11 DBKMOD DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 65.9 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTO 20 6 18 8 1
IT 8 17 1
LDRAIN 2 5 1e-9 LGATE 1 9 4.92e-9 LSOURCE 3 7 4.5e-9
MOS1 16 6 8 8 MOSMOD M = 0.99 MOS2 16 21 8 8 MOSMOD M = 0.01
RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 1.1e-3 RGATE 9 20 2.88 RIN 6 8 1e9 RSCL1 5 51 RSCLMOD 1e-6 RSCL2 5 50 1e3 RSOURCE 8 7 RDSMOD 20.3e-3 RVTO 18 19 RVTOMOD 1
S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD
GATE
1
L
GATE
RFP25N06, RF1S25N06SM
R
GATE
EVTO
+
209
S1A S2A
12
CA
10
DPLCAP
RSCL2
-
6
E
SG
8
+
6
-
18
8
RIN
14
13
13
8
S2BS1B 13
+
6
EGS EDS
8
-
VTO
15
CIN
CB
5
RSCL1
51
+
5
51
50 RDRAIN
16
+
MOS1
14
+
5 8
-
ESCL
21
8
DBREAK
11
EBREAK
MOS2
RSOURCE
17
+
17 18
-
RBREAK
7
IT
LDRAIN
DBODY
LSOURCE
18
RVTO
19
VBAT
+
DRAIN 2
3
SOURCE
VBAT 8 19 DC 1 VTO 21 6 0.764
ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/108,6))}
.MODEL DBDMOD D (IS = 2.32e-13 RS = 5.72e-3 TRS1 = 2.56e-3 TRS2 = -5.13e-6 CJO = 1.18e-9 TT = 5.62e-8) .MODEL DBKMOD D (RS = 2.00e-1 TRS1 = 3.33e-4 TRS2 = 2.68e-6) .MODEL DPLCAPMOD D (CJO = 6.55e-10 IS = 1e-30 N = 10) .MODEL MOSMOD NMOS (VTO = 3.89 KP = 15.03 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL RBKMOD RES (TC1 = 1.04e-3 TC2 = -1.04e-6) .MODEL RDSMOD RES (TC1 = 5.85e-3 TC2 = 1.77e-5) .MODEL RSCLMOD RES (TC1 = 2.0e-3 TC2 = 1.5e-6) .MODEL RVTOMOD RES (TC1 = -5.35e-3 TC2 = -3.77e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -5.04 VOFF= -3.04) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.04 VOFF= -5.04) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.02 VOFF= 1.98) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 1.98 VOFF= -3.02)
.ENDS
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley.
4-517
Page 8
RFP25N06, RF1S25N06SM
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with­out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However ,no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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4-518
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