Datasheet RF1S25N06 Datasheet (Fairchild Semiconductor)

Page 1
G
D
S
DRAIN
(FLANGE)
GATE
SOURCE
RFP25N06, RF1S25N06, RF1S25N06SM
Data Sheet January 2002
25A, 60V, 0.047 Ohm, N-Channel Power MOSFETs
These N-Channel power MOSFETs are manufactured using the MegaFET process. This process, which uses feature sizes approaching those of LSI integrated circuits gives optimum utilization of silicon, resulting in outstanding performance. They were designed for use in applications such as switching regulators, switching converters, motor drivers, and relay drivers. These transistors can be operated directly from integrated circuits.
Formerly developmental type TA09771.
Ordering Information
PART NUMBER PACKAGE BRAND
RFP25N06 TO-220AB RFP25N06
RF1S25N06 TO-262AA F1S25N06
RF1S25N06SM TO-263AB F1S25N06
NOTE: When ordering use the entire part number. Add the suffix, 9A, to obtain the TO-263AB variant in tape and reel, e.g. RF1S25N06SM9A.
Features
• 25A, 60V
DS(ON)
= 0.047
®
Model
•r
• Temperature Compensating PSPICE
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
o
• 175
C Operating Temperature
• Related Literature
- TB334, “Guidelines for Soldering Surface Mount Components to PC Boards”
Symbol
Packaging
DRAIN
(FLANGE)
JEDEC TO- 220AB JEDEC TO-263AB
SOURCE
DRAIN
GATE
JEDEC TO-262AA
SOURCE
DRAIN
DRAIN
(FLANGE)
GATE
©2002 Fairchild Semiconductor Corporation
RFP25N06, RF1S25N06, RF1S25N06SM Rev. C
Page 2
±
µ
µ
= ±
±
θ
θ
RFP25N06, RF1S25N06, RF1S25N06SMS
Absolute Maximum Ratings
o
T
= 25
C, Unless Otherwise Specified
C
RFP25N06,
RF1S25N06, RF1S25N06SM UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Drain to Gate Voltage (R
= 20k ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
Continuous Drain Current (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
Single Pulse Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Junction Temperature Range . . . . . . . . . . . . . . . . . . T
DSS
DGR
GS
D
DM
AS
D
, T
J
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . T
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
L
pkg
60 V
60 V
20 V
25
(Figure 5)
(Figure 6)
72
0.48
-55 to 175
300 260
W/
A
W
o
C
o
C
o
C
o
C
NOTE:
J
= 25
o
C to 150
1. T
Electrical Specifications
o
C.
o
T
= 25
C, Unless Otherwise Specified
C
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Drain to Source Breakdown Voltage BV
Gate to Source Threshold Voltage V
GS(TH)
Zero Gate Voltage Drain Current I
Gate to Source Leakage Current I
Drain to Source On Resistance r
DS(ON)
Turn-On Time t
Turn-On Delay Time t
d(ON)
Rise Time t
Turn-Off Delay Time t
d(OFF)
Fall Time t
Turn-Off Time t
Total Gate Charge Q
g(TOT)
Gate Charge at 10V Q
Threshold Gate Charge Q
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Thermal Resistance Junction to Case R
Thermal Resistance Junction to Ambient R
DSS
GSS
OFF
g(10)
g(TH)
OSS
RSS
I
DSS
ON
r
= 250 µ A, V
D
V
= V
GS
DS
V
= 60V T
DS
V
= 0V T
GS
V
I
V R R
20V - -
GS
= 25A, V
D
= 30V, I
DD
= 2.4 , V
L
= 10
GS
(Figure 13)
= 0V (Figure 11) 60 - - V
GS
, I
= 250 µ A (Figure 10) 2 - 4 V
D
o
= 25
C--1
C
o
= 150
C
= 10V (Figure 9) - - 0.047
GS
= 12.5A
D
= 10V
GS
C--50
- - 60 ns
-14-ns
-30-ns
-45-ns
f
-22-ns
- - 100 ns
V
ISS
= 0 to 20V V
GS
V
= 0 to 10V - - 45 nC
GS
V
= 0 to 2V - - 3 nC
GS
V
= 25V, V
DS
GS
f = 1MHz (Figure 12)
DD
R
L
I
g(REF)
(Figure 13)
= 0V
= 48V, I
= 1.92
= 0.75mA
= 25A,
D
- - 80 nC
- 975 - pF
- 330 - pF
-95-pF
(Figure 3) - - 2.083
JC
JA
--62
100 nA
o
C/W
o
C/W
A
A
Source to Drain Diode Specifications
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
Source to Drain Diode Voltage V
Reverse Recovery Time t
©2002 Fairchild Semiconductor Corporation RFP25N06, RF1S25N06, RF1S25N06SM Rev. C
SD
rr
I
= 25A - - 1.5 V
SD
I
= 25A, dI
SD
/dt = 100A/ µ s - - 125 ns
SD
Page 3
5
0
25 50 75 100
125
150
20
I
D
, DRAIN CURRENT (A)
TC, CASE TEMPERATURE (oC)
175
25
30
15
10
t, PULSE WIDTH (s)
10
10
-5
10
-4
10
-3
10
-2
10
-1
10
0
10
1
100
I
DM
, PEAK CURRENT (A)
200
TRANSCONDUCTANCE MAY LIMIT CURRENT IN THIS REGION
VGS = 20V
FOR TEMPERATURES ABOVE 25oC DERATE PEAK CURRENT CAPABILITY AS FOLLOWS:
II
25
175 T
C
150
------------------------



=
VGS = 10V
TC = 25oC
RFP25N06, RF1S25N06, RF1S25N06SM
Typical Performance Curves
1.2
1.0
0.8
0.6
0.4
0.2
POWER DISSIPATION MULTIPLIER
0
025
50
TC, CASE TEMPERATURE (oC)
75 100
Unless Otherwise Specified
125
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
2
1
0.5
150
175
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
0.2
0.1
0.1
, NORMALIZED
Z
200
100
10
, DRAIN CURRENT (A)
D
I
1
1
0.05
JC
0.02
θ
0.01
THERMAL IMPEDANCE
0.01
-5
10
OPERATION IN THIS AREA MAY BE LIMITED BY r
V
DS
SINGLE PULSE
-4
10
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
TC = 25oC T
J
SINGLE PULSE
DS(ON)
, DRAIN TO SOURCE VOLTAGE (V)
10
-3
10
t1, RECTANGULAR PULSE DURATION (s)
= MAX RATED
100µs
1ms
10ms
100ms
DC
100
-2
10
NOTES: DUTY FACTOR: D = t PEAK TJ = PDM x Z
-1
10
P
DM
t
1
t
2
1/t2
x R
C
J
θ
0
10
+ T
C
J
C
θ
1
10
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA FIGURE 5. PEAK CURRENT CAPABILITY
©2002 Fairchild Semiconductor Corporation RFP25N06, RF1S25N06, RF1S25N06SM Rev. C
Page 4
0
10
30
0
2
468
40
I
D
, DRAIN CURRENT (A)
VDS, DRAIN TO SOURCE VOLTAGE (V)
VGS = 6V
VGS = 7V
VGS = 20V
60
70
V
GS
= 8V
VGS = 10V
50
20
VGS = 4.5V
VGS = 5V
PULSE DURATION = 80µs
TC = 25oC
DUTY CYCLE = 0.5% MAX
0
0.5
1.0
1.5
2.0
-80 -40 0 40 80 120 160
NORMALIZED DRAIN TO SOURCE
TJ, JUNCTION TEMPERATURE (oC)
200
2.5
PULSE DURATION = 80µs
V
GS
= 10V, ID = 25A
ON RESISTANCE
DUTY CYCLE = 0.5% MAX
2.0
1.5
1.0
0.5
0
-80 -40 0 40 80 120 160
T
J
, JUNCTION TEMPERATURE (oC)
NORMALIZED DRAIN TO SOURCE
BREAKDOWN VOLTAGE
200
ID = 250µA
RFP25N06, RF1S25N06, RF1S25N06SM
Typical Performance Curves Unless Otherwise Specified (Continued)
100
STARTING TJ = 25oC
10
STARTING TJ = 150oC
If R = 0
, AVALANCHE CURRENT (A)
tAV = (L)(IAS)/(1.3*RATED BV
AS
I
If R0 t
= (L/R)ln[(IAS*R)/(1.3*RATED BV
AV
1
0.01
0.1
tAV, TIME IN AVALANCHE (µs)
NOTE: Refer to Fairchild Application Notes AN9321 and AN9322.
FIGURE 6. UNCLAMPED INDUCTIVE SWITCHING CAPABILITY
DSS
- VDD)
DSS-VDD
) +1]
1
10
FIGURE 7. SATURATION CHARACTERISTICS
70
60
50
40
30
DRAIN CURRENT (A)
20
D,
I
10
= 15V
V
DD
PULSE DURATION = 80µs DUTY CYCLE = 0.5% MAX
0
0468102
VGS, GATE TO SOURCE VOLTAGE (V)
-55oC 25oC
175oC
FIGURE 8. TRANSFER CHARACTERISTICS FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
2.0 VGS = V
DS
ID = 250µA
1.5
1.0
NORMALIZED GATE
0.5
THRESHOLD VOLTAGE
0
-80 -40 0 40 80 120
FIGURE 10. NORMALIZED GATE THRESHOLD VOLTAGE vs
©2002 Fairchild Semiconductor Corporation RFP25N06, RF1S25N06, RF1S25N06SM Rev. C
TJ, JUNCTION TEMPERATURE (oC)
JUNCTION TEMPERATURE
160
200
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
Page 5
30
15
0
20
I
g REF()
I
g ACT()
--------------------
t, TIME (µs)
80
I
g REF()
I
g ACT()
--------------------
10
5.0
2.5
0
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
60
7.5
45
V
DD
= BV
DSS
VDD = BV
DSS
0.75 BV
DSS
0.50 BV
DSS
0.25 BV
DSS
RL = 2.4 I
g(REF)
= 0.75mA
V
GS
= 10V
V
DD
V
DS
BV
DSS
t
P
I
AS
t
AV
0
t
ON
t
d(ON)
t
r
90%
10%
V
DS
90%
10%
t
f
t
d(OFF)
t
OFF
90%
50%
50%
10%
PULSE WIDTH
V
GS
0
0
RFP25N06, RF1S25N06, RF1S25N06SM
Typical Performance Curves Unless Otherwise Specified (Continued)
1600
C
1200
800
400
C, CAPACITANCE (pF)
0
0 5 10 15 20 25
ISS
C
OSS
C
RSS
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
VGS = 0V, f = 1MHz
= CGS + C
C C C
ISS RSS OSS
= C = CDS + C
GD
GD
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
Test Circuits and Waveforms
V
DS
L
GD
NOTE: Refer to Fairchild Application Notes AN7254 and AN7260.
FIGURE 13. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
VARY t
TO OBTAIN
P
REQUIRED PEAK I
V
GS
AS
R
G
+
V
DD
-
DUT
0V
P
I
AS
t
0.01
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
V
DS
R
DUT
L
+
V
DD
-
V
GS
V
GS
©2002 Fairchild Semiconductor Corporation RFP25N06, RF1S25N06, RF1S25N06SM Rev. C
FIGURE 16. SWITCHING TIME TEST CIRCUIT FIGURE 17. RESISTIVE SWITCHING WAVEFORMS
R
GS
Page 6
RFP25N06, RF1S25N06, RF1S25N06SM
Test Circuits and Waveforms (Continued)
V
DS
R
L
V
GS
DUT
I
g(REF)
FIGURE 18. GATE CHARGE TEST CIRCUIT FIGURE 19. GATE CHARGE WAVEFORM
+
V
-
DD
V
DD
V
0
I
g(REF)
0
GS
V
GS
= 2V
Q
g(TH)
Q
V
DS
g(10)
Q
g(TOT)
VGS = 10V
V
= 20V
GS
©2002 Fairchild Semiconductor Corporation RFP25N06, RF1S25N06, RF1S25N06SM Rev. C
Page 7
RFP25N06, RF1S25N06, RF1S25N06SM
PSPICE Electrical Model
.SUBCKT RFP25N06 2 1 3 ; rev 8/19/94
CA 12 8 1.83e-9 CB 15 14 1.98e-9 CIN 6 8 9.7e-10
DBODY 7 5 DBDMOD DBREAK 5 11 DBKMOD DPLCAP 10 5 DPLCAPMOD
EBREAK 11 7 17 18 65.9 EDS 14 8 5 8 1 EGS 13 8 6 8 1 ESG 6 10 6 8 1 EVTO 20 6 18 8 1
IT 8 17 1
LDRAIN 2 5 1e-9 LGATE 1 9 4.92e-9 LSOURCE 3 7 4.5e-9
MOS1 16 6 8 8 MOSMOD M = 0.99 MOS2 16 21 8 8 MOSMOD M = 0.01
RBREAK 17 18 RBKMOD 1 RDRAIN 50 16 RDSMOD 1.1e-3 RGATE 9 20 2.88 RIN 6 8 1e9 RSCL1 5 51 RSCLMOD 1e-6 RSCL2 5 50 1e3 RSOURCE 8 7 RDSMOD 20.3e-3 RVTO 18 19 RVTOMOD 1
S1A 6 12 13 8 S1AMOD S1B 13 12 13 8 S1BMOD S2A 6 15 14 13 S2AMOD S2B 13 15 14 13 S2BMOD
GATE
1
L
GATE
R
GATE
E
EVTO
+
209
S1A S2A
12
CA
10
DPLCAP
RSCL2
-
6
SG
8
+
6
-
18
8
RIN
14
13
13
8
S2BS1B 13
+
6
EGS EDS
8
-
VTO
15
CIN
CB
5
LDRAIN
RSCL1
51
+
5
51
50
RDRAIN
16
+
MOS1
14
+
5 8
-
ESCL
21
8
DBREAK
EBREAK
MOS2
RSOURCE
11
17
+
17 18
-
RBREAK
7
IT
DBODY
LSOURCE
18
RVTO
19
VBAT
+
DRAIN 2
3
SOURCE
VBAT 8 19 DC 1 VTO 21 6 0.764
ESCL 51 50 VALUE = {(V(5,51)/ABS(V(5,51)))*(PWR(V(5,51)*1e6/108,6))}
.MODEL DBDMOD D (IS = 2.32e-13 RS = 5.72e-3 TRS1 = 2.56e-3 TRS2 = -5.13e-6 CJO = 1.18e-9 TT = 5.62e-8) .MODEL DBKMOD D (RS = 2.00e-1 TRS1 = 3.33e-4 TRS2 = 2.68e-6) .MODEL DPLCAPMOD D (CJO = 6.55e-10 IS = 1e-30 N = 10) .MODEL MOSMOD NMOS (VTO = 3.89 KP = 15.03 IS = 1e-30 N = 10 TOX = 1 L = 1u W = 1u) .MODEL RBKMOD RES (TC1 = 1.04e-3 TC2 = -1.04e-6) .MODEL RDSMOD RES (TC1 = 5.85e-3 TC2 = 1.77e-5) .MODEL RSCLMOD RES (TC1 = 2.0e-3 TC2 = 1.5e-6) .MODEL RVTOMOD RES (TC1 = -5.35e-3 TC2 = -3.77e-6) .MODEL S1AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -5.04 VOFF= -3.04) .MODEL S1BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.04 VOFF= -5.04) .MODEL S2AMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = -3.02 VOFF= 1.98) .MODEL S2BMOD VSWITCH (RON = 1e-5 ROFF = 0.1 VON = 1.98 VOFF= -3.02)
.ENDS
NOTE: For further discussion of the PSPICE model consult A New PSPICE Sub-circuit for the Power MOSFET Featuring Global Temperature Options; written by William J. Hepp and C. Frank Wheatley.
©2002 Fairchild Semiconductor Corporation RFP25N06, RF1S25N06, RF1S25N06SM Rev. C
Page 8
TRADEMARKS
The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.
ACEx™ Bottomless™ CoolFET™ CROSSVOLT™ DenseTrench™ DOME™ EcoSPARK™ E2CMOS EnSigna
TM
TM
FACT™ FACT Quiet Series™
STAR*POWER is used under license
FAST FASTr™ FRFET™ GlobalOptoisolator™ GTO™ HiSeC™ ISOPLANAR™ LittleFET™ MicroFET™ MicroPak™ MICROWIRE™
OPTOLOGIC™ OPTOPLANAR™ PACMAN™ POP™ Power247™ PowerTrench
QFET™ QS™ QT Optoelectronics™ Quiet Series™ SILENT SWITCHER
SMART START™ STAR*POWER™ Stealth™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8 SyncFET™ TinyLogic™ TruTranslation™ UHC™
UltraFET
VCX™
DISCLAIMER
FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein:
1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.
PRODUCT STATUS DEFINITIONS Definition of Terms
Datasheet Identification Product Status Definition
Advance Information
Preliminary
No Identification Needed
Formative or In Design
First Production
Full Production
2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or
effectiveness.
This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.
This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.
Obsolete
Not In Production
This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.
Rev. H4
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