Datasheet NE572N, NE572D, SA572F, SA572N Datasheet (Philips)

INTEGRATED CIRCUITS

SA572

Programmable analog compandor

Product specification 1998 Nov 03
IC17 Data Handbook

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Philips Semiconductors Product specification

T

A

SA572Programmable analog compandor

DESCRIPTION

The SA572 is a dual-channel, high-performance gain control circuit
in which either channel may be used for dynamic range
compression or expansion. Each channel has a full-wave rectifier to
detect the average value of input signal, a linearized,
temperature-compensated variable gain cell (∆G) and a dynamic
time constant buffer. The buf fer permits independent control of
dynamic attack and recovery time with minimum external
components and improved low frequency gain control ripple
distortion over previous compandors.

The SA572 is intended for noise reduction in high-performance
audio systems. It can also be used in a wide range of
communication systems and video recording applications.

FEA TURES

•Independent control of attack and recovery time

•Improved low frequency gain control ripple

•Complementary gain compression and expansion with

external op amp

•Wide dynamic range—greater than 110dB

•T emperature-compensated gain control

•Low distortion gain cell

•Low noise—6µV typical

•Wide supply voltage range—6V-22V

•System level adjustable with external components

PIN CONFIGURATION

D1, N, Packages

TRACK TRIM A

RECOV. CAP A

RECT. IN A

ATTACK CAP A

∆G OUT A

THD TRIM A

NOTE:

1. D package released in large SO (SOL) package only.

1
2
3
4
5
6

∆G IN A

7
8

GND

Figure 1. Pin Configuration

APPLICATIONS

•Dynamic noise reduction system

•Voltage control amplifier

•Stereo expandor

•Automatic level control

•High-level limiter

•Low-level noise gate

•State variable filter

16

V

CC

15

TRACK TRIM B

14

RECOV. CAP B

13

RECT. IN B

12

ATTACK CAP B
∆G OUT B

11
10

THD TRIM B
∆G IN B

9

SR00694

ORDERING INFORMATION

DESCRIPTION TEMPERATURE RANGE ORDER CODE DWG #

16-Pin Plastic Small Outline (SOL) –40 to +85°C SA572D SOT162-1
16-Pin Plastic Dual In-Line Package (DIP) –40 to +85°C SA572N SOT38-4

ABSOLUTE MAXIMUM RATINGS

SYMBOL PARAMETER RATING UNIT

V

CC

P

D

Supply voltage 22 V
Operating temperature range

SA572 –40 to +85 °C

Power dissipation 500 mW

DC

1998 Nov 03 853-0813 20294

2

Philips Semiconductors Product specification

SYMBOL

PARAMETER

TEST CONDITIONS

UNIT

SA572Programmable analog compandor

BLOCK DIAGRAM

(7,9)

(6,10)

(3,13)

(16)

R1

6.8k
∆G

500

Ω

GAIN CELL

–
+

270

Ω

RECTIFIER

P.S.

(8) (4,12) (2,14)

10k

–
+

BUFFER 10k

(5,11)

(1,15)

SR00695

Figure 2. Block Diagram

DC ELECTRICAL CHARACTERISTICS

Standard test conditions (unless otherwise noted) VCC=15V, TA=25°C; Expandor mode (see Test Circuit).
Input signals at unity gain level (0dB) = 100mV

V

CC

I

CC

V

R

Supply voltage 6 22 V
Supply current No signal 6.3 mA
Internal voltage reference 2.3 2.5 2.7 V

at 1kHz; V

RMS

1

THD Total harmonic distortion (untrimmed) 1kHz CA=1.0µF 0.2 1.0 %
THD Total harmonic distortion (trimmed) 1kHz CR=10µF 0.05 %
THD Total harmonic distortion (trimmed) 100Hz 0.25 %

No signal output noise Input to V1 and V2 grounded (20–20kHz) 6 25 µV
DC level shift (untrimmed) Input change from no signal to 100mV
Unity gain level –1.5 0 +1.5 dB
Large-signal distortion V1=V2=400mV 0.7 3 %

Tracking error
(measured relative to value at unity
gain)= [VO–VO (unity gain)]dB –V2dB

Channel crosstalk

PSRR Power supply rejection ratio 120Hz 70 dB

= V2; R

= 3.3kΩ; R

2

= 17.3kΩ.

3

SA572

Min Typ Max

RMS

±20 ±50 mV

Rectifier input

V2=+6dB V1=0dB ±0.2 dB

V2=–30dB V1=0dB ±0.5 –2.5, +1.6 dB

200mV

measured output on channel B

into channel A,

RMS

60 dB

DC

DC

1998 Nov 03

3

Philips Semiconductors Product specification

SA572Programmable analog compandor

TEST CIRCUIT

2.2µF

V

1

5Ω

= 10µF

2.2µF

1%

R

2

3.3k (3,13)

V

2

(7,9)

6.8k

(2,14)

(4,12)

∆G

BUFFER

RECTIFIER

(5,11)

(6,10)

(8)

(1,15)

(16)

Figure 3. Test Circuit

AUDIO SIGNAL PROCESSING IC COMBINES VCA
AND FAST ATTACK/SLOW RECOVERY LEVEL
SENSOR

In high-performance audio gain control applications, it is desirable to
independently control the attack and recovery time of the gain
control signal. This is true, for example, in compandor applications
for noise reduction. In high end systems the input signal is usually
split into two or more frequency bands to optimize the dynamic
behavior for each band. This reduces low frequency distortion due
to control signal ripple, phase distortion, high frequency channel
overload and noise modulation. Because of the expense in
hardware, multiple band signal processing up to now was limited to
professional audio applications.

With the introduction of the Signetics SA572 this high-performance
noise reduction concept becomes feasible for consumer hi fi
applications. The SA572 is a dual channel gain control IC. Each
channel has a linearized, temperature-compensated gain cell and an
improved level sensor. In conjunction with an external low noise op

+

22µF

22µF

100Ω

V

+15V

–15V

0

SR00696

82k

1k +

2.2k

2.2µF

1%

R

17.3k

270pF

1µF

3

–

NE5234

+

.1µF

+

amp for current-to-voltage conversion, the VCA features low
distortion, low noise and wide dynamic range.

The novel level sensor which provides gain control current for the
VCA gives lower gain control ripple and independent control of fast
attack, slow recovery dynamic response. An attack capacitor C
with an internal 10k resistor RA defines the attack time tA. The
recovery time t

and an internal 10k resistor RR. Typical attack time of 4ms for

C

R

of a tone burst is defined by a recovery capacitor

R

the high-frequency spectrum and 40ms for the low frequency band
can be obtained with 0.1µF and 1.0µF attack capacitors,
respectively. Recovery time of 200ms can be obtained with a 4.7µF
recovery capacitor for a 100Hz signal, the third harmonic distortion
is improved by more than 10dB over the simple RC ripple filter with
a single 1.0µF attack and recovery capacitor, while the attack time
remains the same.

The SA572 is assembled in a standard 16-pin dual in-line plastic
package and in oversized SOL package. It operates over a wide
supply range from 6V to 22V . Supply current is less than 6mA. The
SA572 is designed for applications from –40°C to +85°C.

A

1998 Nov 03

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Philips Semiconductors Product specification

SA572Programmable analog compandor

SA572 BASIC APPLICATIONS
Description

The SA572 consists of two linearized, temperature-compensated
gain cells (∆G), each with a full-wave rectifier and a buffer amplifier
as shown in the block diagram. The two channels share a 2.5V
common bias reference derived from the power supply but otherwise
operate independently. Because of inherent low distortion, low noise
and the capability to linearize large signals, a wide dynamic range
can be obtained. The buffer amplifiers are provided to permit control
of attack time and recovery time independent of each other.
Partitioned as shown in the block diagram, the IC allows flexibility in
the design of system levels that optimize DC shift, ripple distortion,
tracking accuracy and noise floor for a wide range of application
requirements.

Gain Cell

Figure 4 shows the circuit configuration of the gain cell. Bases of the
differential pairs Q
inputs of OPA A
of Q1-Q2 and the VBE of Q3-Q4 equal. The following relationship can
be derived from the transistor model equation in the forward active
region.

V

(VBE = VT IIN IC/IS)

VTI

where I

BE

n

Q3Q4



 

1

I



G

2

I

S



IN

R1 = 6.8kΩ
I1 = 140µA
I

= 280µA

2

and Q3-Q4 are both tied to the output and

1-Q2

. The negative feedback through Q1 holds the V

1

BE

Q1Q2

1

I

O

2

 VTI



V

IN

R

1



n

1

1

I



I

G

O

2

2



I

S

BE

I1 I

IN



V

I

n

T

where I

is the differential output current of the gain cell and IG is the gain

I

O

control current of the gain cell.
If all transistors Q1 through Q4 are of the same size, equation (2)

can be simplified to:
I



O

The first term of Equation 3 shows the multiplier relationship of a
linearized two quadrant transconductance amplifier. The second
term is the gain control feedthrough due to the mismatch of devices.
In the design, this has been minimized by large matched devices
and careful layout. Offset voltage is caused by the device mismatch
and it leads to even harmonic distortion. The offset voltage can be
trimmed out by feeding a current source within ±25µA into the THD
trim pin.

The residual distortion is third harmonic distortion and is caused by
gain control ripple. In a compandor system, available control of fast
attack and slow recovery improve ripple distortion significantly. At
the unity gain level of 100mV, the gain cell gives THD (total harmonic
distortion) of 0.17% typ. Output noise with no input signals is only
6µV in the audio spectrum (10Hz-20kHz). The output current I
must feed the virtual ground input of an operational amplifier with a
resistor from output to inverting input. The non-inverting input of the
operational amplifier has to be biased at V

is DC coupled.

I

O

I

S



IN

R1 = 6.8kΩ
I

= 140µA

1

I

= 280µA

2

2

 IIN I

I

2



V

IN

R

 VTI

1

G

n

1



I

I2 I1 I



I



I2 2I

2

IN



S

1

(2)



 I

G

REF

(3)

O

if the output current

1998 Nov 03

V+

1

1

I



I

G

O

2

2

I

O

Q

Q

4

I

G

3

THD

TRIM

Figure 4. Basic Gain Cell Schematic

A1

+

V

REF

5

I

1

140µA

–

Q

1

I

2

2

SR00697

R1

6.8k

Q

280µA

V

IN

Philips Semiconductors Product specification

SA572Programmable analog compandor

Rectifier

The rectifier is a full-wave design as shown in Figure 5. The input
voltage is converted to current through the input resistor R
turns on either Q

or Q6 depending on the signal polarity. Deadband

5

of the voltage to current converter is reduced by the loop gain of the
gain block A
from input bias current of gain block A

. If AC coupling is used, the rectifier error comes only

2

. The input bias current is

2

typically about 70nA. Frequency response of the gain block A
causes second-order error at high frequency. The collector current
of Q

is mirrored and summed at the collector of Q5 to form the full

6

wave rectified output current I

 V

V

IN

V

R

(AVG)

IN

R

REF

2

2

I



R

If V

is AC-coupled, then the equation will be reduced to:

IN

I



RAC

. The rectifier transfer function is

R

(4)

The internal bias scheme limits the maximum output current IR to be
around 300µA. Within a ±1dB error band the input range of the rectifier
is about 52dB.

V+

V

V

REF

IN

+

A2

–

R2

Q5

Q6

and

2

also

2

VIN V

I



R

D7

REF

R

2

Buffer Amplifier

In audio systems, it is desirable to have fast attack time and slow
recovery time for a tone burst input. The fast attack time reduces
transient channel overload but also causes low-frequency ripple
distortion. The low-frequency ripple distortion can be improved with
the slow recovery time. If different attack times are implemented in
corresponding frequency spectrums in a split band audio system,
high quality performance can be achieved. The buffer amplifier is
designed to make this feature available with minimum external
components. Referring to Figure 6, the rectifier output current is
mirrored into the input and output of the unipolar buffer amplifier A
through Q8, Q9 and Q10. Diodes D11 and D12 improve tracking
accuracy and provide common-mode bias for A
positive-going input signal, the buffer amplifier acts like a
voltage-follower . Therefore, the output impedance of A
contribution of capacitor CR to attack time insignificant. Neglecting
diode impedance, the gain Ga(t) for ∆G can be expressed as
follows:

t

Ga(t)  (Ga

Ga

=Initial Gain

INT

Ga

=Final Gain

FNL

τ

• CA=10k • CA

A=RA

INT

 Ga

FNL

t

e

 Ga

A

where τA is the attack time constant and RA is a 10k internal
resistor. Diode D

opens the feedback loop of A3 for a

15

negative-going signal if the value of capacitor CR is larger than
capacitor CA. The recovery time depends only on CR • R
diode impedance is assumed negligible, the dynamic gain G
∆G is expressed as follows.

t

(t)  (G

G

R

GR(t)=(G

 G

RINT

R INT–GR FNL

RFNL

) e +G

t

e

R

R FNL

 G

RFNL

τR=RR • CR=10k • CR

where τR is the recovery time constant and R
resistor. The gain control current is mirrored to the gain cell through
Q

. The low level gain errors due to input bias current of A2 and A

14

can be trimmed through the tracking trim pin into A3 with a current
source of ±3µA.

. For a

3

FNL

is a 10k internal

R

makes the

3

. If the

R

(t) for

R

3

3

1998 Nov 03

SR00698

Figure 5. Simplified Rectifier Schematic

6

Philips Semiconductors Product specification

SA572Programmable analog compandor

V+

Q17

Q8 Q9

V

I



R

IN

R

10k

Q10

I

= 2I

Q

R2

I

R2

10k

–

A3

+

I

R1

D15

D13

Q14

X2
Q16

X2
Q18

D11

CA

D12

TRACKING

Figure 6. Buffer Amplifier Schematic

Basic Expandor

Figure 7 shows an application of the circuit as a simple expandor.
The gain expression of the system is given by

R

V

OUT

V
(I



IN

=140µA)

1

2

I

Both the resistors R
is a 6.8k internal resistor. The maximum input current into the gain
cell can be as large as 140µA. This corresponds to a voltage level of
140µA • 6.8k=952mV peak. The input peak current into the rectifier
is limited to 300µA by the internal bias system. Note that the value
of R

can be increased to accommodate higher input level. R2 and

1

R

are external resistors. It is easy to adjust the ratio of R3/R2 for

3

desirable system voltage and current levels. A small R
higher gain control current and smaller static and dynamic tracking

 V

3



1

IN(AVG)

R2 R

1

and R2 are tied to internal summing nodes. R

1

(5)

results in

2

TRIM

1

CR

SR00699

error. However, an impedance buffer A

may be necessary if the

1

input is voltage drive with large source impedance.
The gain cell output current feeds the summing node of the external

OPA A

. R3 and A2 convert the gain cell output current to the output

2

voltage. In high-performance applications, A

has to be low-noise,

2

high-speed and wide band so that the high-performance output of
the gain cell will not be degraded. The non-inverting input of A

can

2

be biased at the low noise internal reference Pin 6 or 10. Resistor
R

is used to bias up the output DC level of A2 for maximum swing.

4

The output DC level of A

 V

REF



1 

V

ODC

can be tied to a regulated power supply for a dual supply system

V

B

is given by

2

R

3



 V

R

4

R

3

B

(6)

R

4

and be grounded for a single supply system. CA sets the attack time
constant and CR sets the recovery time constant. *5COL

1998 Nov 03

7

Philips Semiconductors Product specification

SA572Programmable analog compandor

R4 R3

+VB

17.3k

–

R5
100k

A1

+

C

V

IN1

IN

2.2µF

C

C

IN3

2.2µF

IN2

R2

3.3k

(7,9)

(3,13)

R1

6.8k

(8)

Figure 7. Basic Expandor Schematic

Basic Compressor

Figure 8 shows the hook-up of the circuit as a compressor. The IC is
put in the feedback loop of the OPA A
is as follows:

V

OUT

V

IN

R

, R

DC1

level of A

V

ODC

 

, and CDC form a DC feedback for A1. The output DC

DC2

is given by

1

 V

 V

I

1

2

REF

B







1 

R

R3 V

R

DC1



 R

2

R

1

IN(AVG)

DC1

 R

R

4

 R

R

The zener diodes D1 and D2 are used for channel overload
protection.

. The system gain expression

1

1



4

DC2

2

DC2



(7)

(8)



∆

G

BUFFER

(16)

V

REF

V

IN

(5,11)

(6,10) R6

1k

(2,14)

(4,12)

CA CR

10µF1µF

+V

CC

R4 RDC1

C

IN1

2.2µF

R3

17.3k

C1

(5,11)

(2,14)

C1

2.2µF

C2

(4,12)

.1µF

A2

9.1k

–

+

1k R5
(6,10)

A1

V

REF

∆

G

BUFFER

CDC

10µF

D1

R1

6.8k

RDC2

9.1k

D2

(7,9)

V

OUT

SR00700

C

IN2

2.2µF

V

OUT

C

2.2µF

IN3

1998 Nov 03

3.3k
R2

CR CA

10µF

1µF

(8)

V

CC

(16)

(3,13)

SR00701

Figure 8. Basic Compressor Schematic

8

Philips Semiconductors Product specification

SA572Programmable analog compandor

Basic Compandor System

The above basic compressor and expandor can be applied to
systems such as tape/disc noise reduction, digital audio, bucket
brigade delay lines. Additional system design techniques such as

1
2

V

RMS

COMPRESSION

IN

3.0V

547.6MV
400MV

100MV

10MV

1MV

100µV

INPUT TO ∆G

AND RECT

bandlimiting, band splitting, pre-emphasis, de-emphasis and
equalization are easy to incorporate. The IC is a versatile functional
block to achieve a high performance audio system. Figure 9 shows
the system level diagram for reference.

2

EXPANDOR

REL LEVEL ABS LEVEL

OUT

+29.54

+14.77

dB dBM

+12.0

0.0

–20

–40

–60

+11.76

–3.00
–5.78

–17.78

–37.78

–57.78

–77.78

10µV

Figure 9. SA572 System Level

–80

–97.78

SR00702

1998 Nov 03

9

Philips Semiconductors Product specification

SA572Programmable analog compandor

SO16: plastic small outline package; 16 leads; body width 7.5 mm SOT162-1

1998 Nov 03

10

Philips Semiconductors Product specification

SA572Programmable analog compandor

DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4

1998 Nov 03

11

Philips Semiconductors Product specification

SA572Programmable analog compandor

Data sheet status

Data sheet
status

Objective
specification

Preliminary
specification

Product
specification

Product
status

Development

Qualification

Production

Definition

This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.

This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.

This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.

[1]

[1] Please consult the most recently issued datasheet before initiating or completing a design.

Definitions

Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For

detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one

or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.

Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.

Disclaimers

Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can

reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.

Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.

Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone [phone]

 Copyright Philips Electronics North America Corporation 1998

All rights reserved. Printed in U.S.A.

Date of release: 11-98

Document order number: 9397 750 04749

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

1998 Nov 03

12