Datasheet NE5517DG Specification

Dual Operational Transconductance Amplifier

NE5517

The NE5517 contains two current-controlled transconductance amplifiers, each with a differential input and push-pull output. The NE5517 offers significant design and performance advantages over similar devices for all types of programmable gain applications. Circuit performance is enhanced through the use of linearizing diodes at the inputs which enable a 10 dB signal-to-noise improvement referenced to 0.5% THD. The NE5517 is suited for a wide variety of industrial and consumer applications.

Constant impedance of the buffers on the chip allow general use of the NE5517. These buffers are made of Darlington transistors and a biasing network that virtually eliminate the change of offset voltage due to a burst in the bias current I noise that could otherwise be heard in high quality audio applications.

Features

• Constant Impedance Buffers

• DV

of Buffer is Constant with Amplifier I

BE

• Excellent Matching Between Amplifiers

• Linearizing Diodes

• High Output Signal-to-Noise Ratio

• This is a Pb−Free Device

Applications

• Multiplexers

• Timers

• Electronic Music Synthesizers

• Dolby® HX Systems

• Current-Controlled Amplifiers, Filters

• Current-Controlled Oscillators, Impedances

, hence eliminating the audible

ABC

Change

BIAS

DATA SHEET

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1

SOIC−16

D SUFFIX

CASE 751B

MARKING DIAGRAM

xx5517DG AWLYWW

1

xx = NE A = Assembly Location WL = Wafer Lot YY, Y = Year WW = Work Week G = Pb−Free Package

PIN CONNECTIONS

1

I

ABCa

2

D

a

3

+IN

a

4

−IN

a

5

VO

a

6

V−

IN

BUFFERa

VO

BUFFERa

7

8

(Top View)

ORDERING INFORMATION

See detailed ordering and shipping information in the package dimensions section on page 13 of this data sheet.

16

15

14

13

12

11

10

9

I

ABCb

D

b

+IN

b

−IN

b

VO

b

V+

IN

BUFFERb

VO

BUFFERb

January, 2022 − Rev. 5

1 Publication Order Number:

NE5517/D

NE5517

PIN DESCRIPTION

Pin No. Symbol Description

1 I

2 D

3 +IN

4 −IN

5 VO

ABCa

a

6 V− Negative Supply

7 IN

8 VO

9 VO

10 IN

BUFFERa

BUFFERb

11 V+ Positive Supply

12 VO

13 −IN

14 +IN

15 D

16 I

b

ABCb

Amplifier Bias Input A

Diode Bias A

Non-inverted Input A

Inverted Input A

Output A

Buffer Input A

Buffer Output A

Buffer Output B

Buffer Input B

Output B

Inverted Input B

Non-inverted Input B

Diode Bias B

Amplifier Bias Input B

V+

11

2,15

−INPUT

AMP BIAS

INPUT

V−

6

4,13

1,16

D4

Q6

Q7

D2

Q4

Q5

Q2

Q1

D1

D3

+INPUT 3,14

Q10

Q8

Q9

Q11

D6

Q14

V

OUTPUT

5,12

Q15 Q16

R1

D5

7,10

D7

D8

Q12

Q13

8,9

Q3

Figure 1. Circuit Schematic

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2

NE5517

B AMP BIAS

INPUT

16 15 14 13 12 11 10 9

123 45 6 7 8

AMP BIAS

INPUT

A

B

DIODE

BIAS

DIODE

BIAS

AA

B

INPUT

(+)

INPUT

(+)

INPUT

−

+

−

INPUT

B

(−)

A

B

OUTPUT

B

A

OUTPUT

V+ (1)

A

V−

B

BUFFER

INPUT

BUFFER

INPUT

A

NOTE: V+ of output buffers and amplifiers are internally connected.

Figure 2. Connection Diagram

B BUFFER OUTPUT

BUFFER OUTPUT

A

MAXIMUM RATINGS

Rating Symbol Value Unit

Supply Voltage (Note 1) V

Power Dissipation, T

= 25 °C (Still Air) (Note 2) P

amb

Thermal Resistance, Junction−to−Ambient

Differential Input Voltage V

Diode Bias Current I

Amplifier Bias Current I

Output Short-Circuit Duration I

Buffer Output Current (Note 3) I

Operating Temperature Range T

Operating Junction Temperature T

DC Input Voltage V

Storage Temperature Range T

Lead Soldering Temperature (10 sec max) T

R

ABC

OUT

S

D

q

JA

IN

D

SC

amb

J

DC

stg

sld

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.

1. For selections to a supply voltage above ±22 V, contact factory.

2. The following derating factors should be applied above 25 °C D package at 7.1 mW/°C.

3. Buffer output current should be limited so as to not exceed package dissipation.

44 VDC or ±22 V

1125 mW

140 °C/W

±5.0 V

2.0 mA

Indefinite

20 mA

0 °C to +70 °C °C

150 °C

+VS to −V

S

−65 °C to +150 °C °C

230 °C

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3

NE5517

ELECTRICAL CHARACTERISTICS (Note 4)

Characteristic

Input Offset Voltage

DVOS/DT

VOS Including Diodes Diode Bias Current

Input Offset Change

Input Offset Current I

DIOS/DT

Input Bias Current

DIB/DT

Forward Transconductance

gM Tracking 0.3 dB

Peak Output Current

Peak Output Voltage

Positive

Negative

Supply Current

VOS Sensitivity

Positive

Negative

Common-mode Rejection Ration CMRR 80 11 0 dB

Common-mode Range ±12 ±13.5 V

Crosstalk Referred to Input (Note 5)

Differential Input Current I

Leakage Current I

Input Resistance R

Open-loop Bandwidth B

Slew Rate Unity Gain Compensated SR 50

Buffer Input Current 5 IN

Peak Buffer Output Voltage 5 VO

DVBE of Buffer

4. These specifications apply for VS = ±15 V, T

specified. The inputs to the buffers are grounded and outputs are open.

5. These specifications apply for V

is connected to the transconductance amplifier output.

6. V

= ±15, R

S

= 5.0 kW connected from Buffer output to −VS and 5.0 mA ≤ I

OUT

= ±15 V, I

S

= 25°C, amplifier bias current (I

amb

= 500 mA, R

ABC

Test Conditions Symbol Min Typ Max Unit

Overtemperature Range

5.0 mA

I

ABC

V

OS

0.4

0.3

Avg. TC of Input Offset Voltage 7.0

0.5 5 mV

) = 500 mA

(I

D

5.0 mA ≤ I

ABC

≤ 500 mA

V

OS

0.1 mV

0.1 0.6

Avg. TC of Input Offset Current 0.001

Overtemperature Range

I

BIAS

0.4

1.0

Avg. TC of Input Current 0.01

Overtemperature Range

RL = 0, I

= 0, I

R

L

RL = 0, Overtemperature

ABC

= 5.0 mA

= 500 mA

g

I

OUT

6700

M

5400

9600 13000

5.0

500

350

650

300

Range

RL = ∞, 5.0 mA ≤ I

= ∞, 5.0 mA ≤ I

R

L

I

= 500 mA, both channels

ABC

D VOS/D V+

/D V−

D V

OS

ABC ABC

≤ 500 mA ≤ 500 mA

OUT

I

CC

+12

−12

+14.2

−14.4

2.6 4.0 mA

20

150

20

150

V

100 dB

20 Hz < f < 20 kHz

= 0, Input = ±4.0 V I

ABC

= 0 (Refer to Test Circuit) 0.2 100 nA

ABC

IN

W

BUFFER

Refer to Buffer VBE Test

0.02 100 nA

10 26

2.0 MHz

0.4 5.0

10 V

0.5 5.0 mV

Circuit (Note 6)

) = 500 mA, Pins 2 and 15 open unless otherwise

ABC

= 5.0 kW connected from the buffer output to −VS and the input of the buffer

OUT

≤ 500 mA.

ABC

5.0

8.0

mV

mV/°C

mA

mA/°C

mA

mA/°C

mmho

mA

V

mV/V

kW

V/ms

mA

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4

NE5517

TYPICAL PERFORMANCE CHARACTERISTICS

5

4

3

2

1

-55°C

0

-1

+25°C

-2

-3

-4

-5

-6

INPUT OFFSET VOLTAGE (mV)

-7

-8

0.1mA1mA10mA 100mA 1000mA

AMPLIFIER BIAS CURRENT (I

VS = ±15V

+125°C

ABC

Figure 3. Input Offset Voltage

4

10

μ

3

10

2

10

PEAK OUTPUT CURRENT ( A)

1

0.1mA1mA10mA 100mA 1000mA

AMPLIFIER BIAS CURRENT (I

VS = ±15V

+125°C

Figure 6. Peak Output Current

+25°C

-55°C

ABC

3

10

2

10

1

INPUT OFFSET CURRENT (nA)

0.1

0.1mA1mA10mA 100mA 1000mA

)

AMPLIFIER BIAS CURRENT (I

-55°C

+25°C

VS = ±15V

+125°C

ABC

)

Figure 4. Input Bias Current

5

4

3

2

1

0

-1

-2

-3

-4

-5

COMMON-MODE RANGE (V)

PEAK OUTPUT VOLTAGE AND

-6

-7

-8

0.1mA1mA10mA 100mA 1000mA

)

V

OUT

V

CMR

VS = ±15V

RLOAD = ∞

T

= 25°C

amb

V

CMR

V

OUT

AMPLIFIER BIAS CURRENT (I

ABC

)

Figure 7. Peak Output Voltage and

4

10

3

10

2

10

-55°C

10

INPUT BIAS CURRENT (nA)

+25°C

1

0.1mA1mA10mA 100mA 1000mA

AMPLIFIER BIAS CURRENT (I

VS = ±15V

+125°C

ABC

Figure 5. Input Bias Current

5

10

(+)VIN = (−)VIN = V

4

10

3

10

2

10

LEAKAGE CURRENT (pA)

10

-50°C-25°C0°C25°C50°C75°C100°C125°C

AMBIENT TEMPERATURE (TA)

OUT

= 36V

0V

Figure 8. Leakage Current

)

Common-Mode Range

4

10

3

10

2

10

INPUT LEAKAGE CURRENT (pA)

1

+125°C

+25°C

012345 67

INPUT DIFFERENTIAL VOLTAGE

Figure 9. Input Leakage Figure 10. Transconductance

5

10

gM

μ

TRANSCONDUCTANCE (gM) — ( ohm)

M

4

10

3

10

2

10

0.1mA1mA10mA 100mA 1000mA

AMPLIFIER BIAS CURRENT (I

mq m

PINS 2, 15

VS = ±15V

-55°C

OPEN

+125°C

+25°C

ABC

2

10

Ω

1

10

1

0.1

INPUT RESISTANCE (MEG )

0.01

0.1mA1mA10mA 100mA 1000mA

)

AMPLIFIER BIAS CURRENT (I

PINS 2, 15

OPEN

ABC

)

Figure 11. Input Resistance

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5

NE5517

TYPICAL PERFORMANCE CHARACTERISTICS (continued)

2000

1800

1600

1400

1200

1000

800

600

400

AMPLIFIER BIAS VOLTAGE (mV)

200

0

0.1mA1mA10mA 100mA 1000mA

-55°C

+25°C

+125°C

AMPLIFIER BIAS CURRENT (I

ABC

)

Figure 12. Amplifier Bias Voltage vs.

Amplifier Bias Current

20

0

-20

-40

-60

1 VOLT RMS (dB)

-80

OUTPUT VOLTAGE RELATIVE TO

-100

VS = ±15V

RL = 10kW

VIN = 80mV

0.1mA1mA10mA 100mA 1000mA

AMPLIFIER BIAS CURRENT (mA)

I

ABC

Figure 15. Voltage vs. Amplifier Bias Current

P-P

VIN = 40mV

OUTPUT NOISE 20kHz BW

7

VS = ±15V

6

5

4

3

CAPACITANCE (pF)

2

1

0

0.1mA1mA10mA 100mA 1000mA

AMPLIFIER BIAS CURRENT (I

C

IN

OUT

T

amb

= +25°C

ABC

Figure 13. Input and Output

Capacitance

P-P

OUTPUT NOISE CURRENT (pA/Hz)

100

RL = 10kW

I

= 1mA

ABC

10

1

0.1

OUTPUT DISTORTION (%)

0.01 1 10 100 1000

)

DIFFERENTIAL INPUT VOLTAGE (mV

Figure 14. Distortion vs. Differential

Input Voltage

600

500

400

300

I

= 1mA

I

ABC

= 100mA

200

100

0

10 100 1k 10k 100k

FREQUENCY (Hz)

Figure 16. Noise vs. Frequency

P-P

)

+36V

4, 13

2, 15

3, 14

−

+

A

NE5517

11

7, 10

5, 12

1, 15

6

8, 9

4V

A

4, 13

2, 15

3, 14

−

+

+15V

11

5, 12

NE5517

1, 10

6

−15V

Figure 17. Leakage Current Test Circuit Figure 18. Differential Input Current Test Circuit

V+

V

50kW

V−

Figure 19. Buffer V

Test Circuit

BE

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6

NE5517

APPLICATIONS

+15V

0.01mF

INPUT

10kW

390pF

51W

1.3kW

3, 14

2, 15

4, 13

Figure 20. Unity Gain Follower

CIRCUIT DESCRIPTION

The circuit schematic diagram of one-half of the NE5517, a dual operational transconductance amplifier with linearizing diodes and impedance buffers, is shown in Figure 21.

Transconductance Amplifier

The transistor pair, Q4 and Q5, forms a transconductance stage. The ratio of their collector currents (I respectively) is defined by the differential input voltage, V

and I5,

4

IN

which is shown in Equation 1.

VIN+

KT

In

q

I

4

(eq. 1)

I

5

Where VIN is the difference of the two input voltages

KT ≅ 26 mV at room temperature (300°k).

Transistors Q focuses the sum of current I current I

B

, Q2 and diode D1 form a current mirror which

1

and I5 to be equal to amplifier bias

4

:

I4) I5+ I

B

(eq. 2)

−

+

1, 16

0.01mF

62kW

5, 12

7, 10

8, 9

5kW

−15V

OUTPUT

NE5517

10kW

11

6

−15V

0.001mF

If VIN is small, the ratio of I5 and I4 will approach unity and

the Taylor series of In function can be approximated as

[

B

I5* I

2KT

q

ǒ

2KT

I

B

4

B

I5* I

I

B

q

Ǔ

4

KT

q

4

+

IN

I

5

KT

In

q

I

4

and I4^ I5^ I

5

[

4

I5* I

KT

q

1ń2I

I5* I4+ V

I

KT

In

q

I

,

The remaining transistors (Q6 to Q11) and diodes (D4 to D6) form three current mirrors that produce an output current equal to I

minus I4. Thus:

5

V

q

ǒ

Ǔ

I

The term

B

is then the transconductance of the amplifier

2KT

and is proportional to I

q

ǒ

Ǔ

I

IN

B

.

B

2KT

+ I

O

+ V

(eq. 3)

(eq. 4)

IN

(eq. 5)

V+

11

2,15

−INPUT

AMP BIAS

INPUT

V−

6

4,13

1,16

Q11

Q9

D6

Q14

V

OUTPUT

5,12

Q15 Q16

R1

D5

7,10

D7

D8

Q12

Q13

8,9

Q3

D4

Q6

Q7

Q5

D3

+INPUT 3,14

D2

Q4

Q2

Q1

D1

Q10

Q8

Figure 21. Circuit Diagram of NE5517

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7

NE5517

Linearizing Diodes

For VIN greater than a few millivolts, Equation 3 becomes invalid and the transconductance increases non-linearly. Figure 22 shows how the internal diodes can linearize the transfer function of the operational amplifier. Assume D and D3 are biased with current sources and the input signal current is I that is: I

= (I

4

I

S

. Since I

S

− I0), I

B

I

D 2

D

1/2I

S

* I

3

D

S

1/2I

D

5

+VS

I

= (I

I

D 2

+ I

4

D

) I

= IB and I

5

+ I0)

B

S

D

2

I0+ I5* I

I

4

Q

4

−VS

I

B

− I

5

I0+ 2I

4

I

5

= I0,

4

I

B

ǒ

S

I

D

5

Figure 22. Linearizing Diode

For the diodes and the input transistors that have identical geometries and are subject to similar voltages and temperatures, the following equation is true:

I

D

) I

2

I

D

* I

2

IO+ I

S

+

2IB

I

D

KT

In

q

for |IS| t

T

In

q

1ń2(I 1ń2(I

) IO)

B

* IO)

B

I

D

2

(eq. 6)

The only limitation is that the signal current should not exceed I

.

D

Impedance Buffer

The upper limit of transconductance is defined by the

maximum value of I

(2.0 mA). The lowest value of IB for

B

which the amplifier will function therefore determines the overall dynamic range. At low values of I

2

, a buffer with

B

very low input bias current is desired. A Darlington amplifier with constant-current source (Q D

, and R1) suits the need.

8

, Q15, Q16, D7,

14

APPLICATIONS

Voltage-Controlled Amplifier

In Figure 23, the voltage divider R2, R3 divides the

Ǔ

input-voltage into small values (mV range) so the amplifier operates in a linear manner.

It is:

R

I

+*VIN@

OUT

+ I

V

OUT

V

OUT

A +

V

IN

(3) g

+

M

(gM in mmhos for I

Since gM is directly proportional to I is controlled by the voltage V

When V

is taken relative to −VCC the following formula

C

3

@ RL;

3

ABC

@ gM;

3

@ gM@ R

3

ABC

in mA)

R2) R

OUT

R

R2) R

= 19.2 I

ABC

in a simple way.

C

L

, the amplification

is valid:

* 1.2V)

(V

+

C

R

1

I

ABC

The 1.2 V is the voltage across two base-emitter baths in the current mirrors. This circuit is the base for many applications of the NE5517.

V

IN

R4 = R2/ /R

R

2

V

C

+V

CC

R

I

1

3

+

11

NE5517

6

−

4

R

3

TYPICAL VALUES:

ABC

1

5

7

I

OUT

R

L

R1 = 47kW R

= 10kW

2

R

= 200W

3

= 200W

R

4

RL = 100kW R

= 47kW

S

INT

+V

CC

8

V

OUT

R

S

INT

−V

CC

Figure 23.

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8

NE5517

Stereo Amplifier With Gain Control

Figure 24 shows a stereo amplifier with variable gain via a control input. Excellent tracking of typical 0.3 dB is easy to achieve. With the potentiometer, R

, the offset can be

P

adjusted. For AC-coupled amplifiers, the potentiometer may be replaced with two 510 W resistors.

V

IN1

V

IN2

10kW

R

IN

1k

30kW

C

R

C

10kW

R

IN

1k

15kW

R

P

R

D

+V

CC

15kW

R

P

+V

CC

15

R

D

14

13

Modulators

Because the transconductance of an OTA (Operational Transconductance Amplifier) is directly proportional to I the amplification of a signal can be controlled easily. The output current is the product from transconductance×input voltage. The circuit is effective up to approximately 200 kHz. Modulation of 99% is easy to achieve.

+V

CC

3

+

4

NE5517

−

+

NE5517

−

11

I

ABC

1

R

L

10kW

16

I

ABC

6

10

12

R

L

10kW

5.1kW

R

S

8

9

INT +V

V

OUT1

−V

+V

V

OUT2

−V INT

CC

ABC

,

V

IN2

SIGNAL

V

IN1

CARRIER

Figure 24. Gain-Controlled Stereo Amplifier

R

C

V

OS

10kW

1kW

30kW

I

D

15kW

I

ABC

+V

CC

11

3

+

2

NE5517

−

4

6

−V

CC

1

Figure 25. Amplitude Modulator

INT +V

CC

5

R

L

10kW

7

8

V

OUT

R

S

−V

CC

INT

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9

NE5517

Voltage-Controlled Resistor (VCR)

Because an OTA is capable of producing an output current proportional to the input voltage, a voltage variable resistor can be made. Figure 26 shows how this is done. A voltage presented at the R This voltage is multiplied by g through the R

terminals forces a voltage at the input.

X

and thereby forces a current

M

terminals:

X

R

+

x

R ) R

gM) R

A

where gM is approximately 19.21 mMHOs at room temperature. Figure 27 shows a Voltage Controlled Resistor using linearizing diodes. This improves the noise performance of the resistor.

Voltage-Controlled Filters

Figure 28 shows a Voltage Controlled Low-Pass Filter. The circuit is a unity gain buffer until X R/R

. Then, the frequency response rolls off at a 6dB per

A

C/gM

is equal to

octave with the −3 dB point being defined by the given equations. Operating in the same manner, a Voltage Controlled High-Pass Filter is shown in Figure 29. Higher order filters can be made using additional amplifiers as shown in Figures 30 and 31.

Voltage-Controlled Oscillators

Figure 32 shows a voltage-controlled triangle-square

wave generator. With the indicated values a range from

2.0 Hz to 200 kHz is possible by varying I

from 1.0 mA

ABC

to 10 mA.

The output amplitude is determined by I

OUT

× R

OUT

.

Please notice the differential input voltage is not allowed

to be above 5.0 V.

With a slight modification of this circuit you can get the

sawtooth pulse generator, as shown in Figure 33.

APPLICATION HINTS

To hold the transconductance gM within the linear range,

I

should be chosen not greater than 1.0 mA. The current

ABC

mirror ratio should be as accurate as possible over the entire current range. A current mirror with only two transistors is not recommended. A suitable current mirror can be built with a PNP transistor array which causes excellent matching and thermal coupling among the transistors. The output current range of the DAC normally reaches from 0 to

−2.0 mA. In this application, however, the current range is set through R

I

(10 kW) to 0 to −1.0 mA.

REF

V

DACMAX

+ 2 @

REF

R

REF

+ 2 @

5V

10kW

+ 1mA

200W 200W

R ) R

+V

CC

3

2

4

+

NE5517

−

−V

11

CC

30kW

I

O

5

7

C

100kW

8

R

10kW

R

X

V

−V

+V

INT

C

INT

RX+

CC

OUT

CC

gM@ R

A

Figure 26. VCR

+V

CC

I

D

R

P

V

OS

1kW

+V

3

2

NE5517

4

−V

CC

1

CC

11

6

30kW

5

7

C

R

X

8

R

100kW

10kW

−V

V

INT

+V

INT

C

CC

Figure 27. VCR with Linearizing Diodes

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10

NE5517

NOTE:

fO+

V

NULL

NOTE:

fO+

V

IN

g(R ) RA) 2pC

+V

CC

OS

-V

CC

RAg

g(R ) RA) 2pC

30kW

5

7

C

100kW 10kW

R

100kW

RAg

200W

M

1

+V

CC

3

2

R

A

4

200W

+

NE5517

−

−V

11

6

CC

I

ABC

150pF

Figure 28. Voltage-Controlled Low-Pass Filter

30kW

5

7

C

100kW 10kW

R

100kW

1kW

1

+V

CC

3

2

R

A

1kW

M

4

+

NE5517

−

−V

11

6

CC

I

ABC

0.005mF

V

C

INT

+V

CC

8

V

OUT

−V

CC

INT

V

C

INT

+V

CC

8

V

OUT

−V

CC

INT

V

IN

fO+

NOTE:

200W

R

A

200

RAg

M

(R ) RA)2p C

+V

+

NE5517

−

−V

Figure 29. Voltage-Controlled High-Pass Filter

CC

C

100pF

R

100kW 10kW

100kW

-V

CC

+V

200W

CC

R

100

kW

A

Figure 30. Butterworth Filter − 2nd Order

+

NE5517

−

R

A

200W

15kW

200pF

C

2

10kW

V

C

INT

+V

CC

V

OUT

−V

CC

INT

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11

NE5517

10kW

800pF

20kW

15kW

5.1kW

LOW PASS

V

OUT

9

V

C

INT

+V

CC

−V

CC

INT

1kW

1

+V

CC

3

+

11

2

NE5517

−

6

−V

CC

5

7

800pF

20kW 5.1kW

+V

20kW

−V

CC

14

15

13

1kW

BANDPASS OUT

+

NE5517

−

16

12 10

Figure 31. State Variable Filter

V

C

30kW

+V

CC

4

−

11

NE5517

3

+

6

−V

CC

1

0.1mF

5

7

C

20kW

INT

+V

CC

13

−

NE5517

8

−V

V

CC

OUT1

+

14

+V

CC

10kW

INT

+V

CC

V

OUT2

−V

CC

INT

GAIN CONTROL

47kW

12 10

16

9

NOTE:

VPK+

V

30kW

(VC* 0.8) R

R1) R

Figure 32. Triangle−Square Wave Generator (VCO)

I

1

2VPKxC

B

0.1mF

I

C

+V

CC

INT

+V

CC

13

5

7

C

20kW

I

f

OSC

2VPKxC

−V

C

V

CC

OUT1

ICttI

8

−

NE5517

+

14

B

16

47kW

12 10

R

2

30kW

INT

+V

CC

30kW

−V

CC

V

OUT2

INT

I

C

470kW

C

+V

CC

4

+

11

2

NE5517

3

−

6

R

1

TH+

2

−V

CC

2VPKxC

I

B

TL+

Figure 33. Sawtooth Pulse VCO

www.onsemi.com

12

NE5517

ORDERING INFORMATION

Device Temperature Range Package Shipping

NE5517DR2G 0 to +70 °C SOIC−16

(Pb−Free)

†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging

Specifications Brochure, BRD8011/D.

2500 / Tape & Reel

†

Intel is a registered trademark of Intel Corporation in the U.S. and/or other countries.

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13

MECHANICAL CASE OUTLINE

PACKAGE DIMENSIONS

SCALE 1:1

−A−

16 9

−B−

18

G

K

C

−T−

SEATING

PLANE

D

16 PL

0.25 (0.010) A

M

S

B

T

S

CASE 751B−05

8 PLP

0.25 (0.010) B

SOIC−16

ISSUE K

M

DATE 29 DEC 2006

NOTES:

1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR

M

S

X 45

R

_

F

J

PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION.

DIM MIN MAX MIN MAX

A 9.80 10.00 0.386 0.393 B 3.80 4.00 0.150 0.157 C 1.35 1.75 0.054 0.068 D 0.35 0.49 0.014 0.019

F 0.40 1.25 0.016 0.049

G 1.27 BSC 0.050 BSC

J 0.19 0.25 0.008 0.009 K 0.10 0.25 0.004 0.009 M 0 7 0 7

____

P 5.80 6.20 0.229 0.244 R 0.25 0.50 0.010 0.019

INCHESMILLIMETERS

STYLE 1:

PIN 1. COLLECTOR

2. BASE

3. EMITTER

4. NO CONNECTION

5. EMITTER

6. BASE

7. COLLECTOR

8. COLLECTOR

9. BASE

10. EMITTER

11. NO CONNECTION

12. EMITTER

13. BASE

14. COLLECTOR

15. EMITTER

16. COLLECTOR

STYLE 5:

PIN 1. DRAIN, DYE #1

2. DRAIN, #1

3. DRAIN, #2

4. DRAIN, #2

5. DRAIN, #3

6. DRAIN, #3

7. DRAIN, #4

8. DRAIN, #4

9. GATE, #4

10. SOURCE, #4

11. GATE, #3

12. SOURCE, #3

13. GATE, #2

14. SOURCE, #2

15. GATE, #1

16. SOURCE, #1

STYLE 2:

PIN 1. CATHODE

2. ANODE

3. NO CONNECTION

4. CATHODE

5. CATHODE

6. NO CONNECTION

7. ANODE

8. CATHODE

9. CATHODE

10. ANODE

11. NO CONNECTION

12. CATHODE

13. CATHODE

14. NO CONNECTION

15. ANODE

16. CATHODE

STYLE 6:

PIN 1. CATHODE

2. CATHODE

3. CATHODE

4. CATHODE

5. CATHODE

6. CATHODE

7. CATHODE

8. CATHODE

9. ANODE

10. ANODE

11. ANODE

12. ANODE

13. ANODE

14. ANODE

15. ANODE

16. ANODE

STYLE 3:

PIN 1. COLLECTOR, DYE #1

2. BASE, #1

3. EMITTER, #1

4. COLLECTOR, #1

5. COLLECTOR, #2

6. BASE, #2

7. EMITTER, #2

8. COLLECTOR, #2

9. COLLECTOR, #3

10. BASE, #3

11. EMITTER, #3

12. COLLECTOR, #3

13. COLLECTOR, #4

14. BASE, #4

15. EMITTER, #4

16. COLLECTOR, #4

STYLE 7:

PIN 1. SOURCE N‐CH

2. COMMON DRAIN (OUTPUT)

3. COMMON DRAIN (OUTPUT)

4. GATE P‐CH

5. COMMON DRAIN (OUTPUT)

6. COMMON DRAIN (OUTPUT)

7. COMMON DRAIN (OUTPUT)

8. SOURCE P‐CH

9. SOURCE P‐CH

10. COMMON DRAIN (OUTPUT)

11. COMMON DRAIN (OUTPUT)

12. COMMON DRAIN (OUTPUT)

13. GATE N‐CH

14. COMMON DRAIN (OUTPUT)

15. COMMON DRAIN (OUTPUT)

16. SOURCE N‐CH

STYLE 4:

PIN 1. COLLECTOR, DYE #1

2. COLLECTOR, #1

3. COLLECTOR, #2

4. COLLECTOR, #2

5. COLLECTOR, #3

6. COLLECTOR, #3

7. COLLECTOR, #4

8. COLLECTOR, #4

9. BASE, #4

10. EMITTER, #4

11. BASE, #3

12. EMITTER, #3

13. BASE, #2

14. EMITTER, #2

15. BASE, #1

16. EMITTER, #1

SOLDERING FOOTPRINT

1

16X

0.58

89

8X

6.40

16X

1.12

16

DIMENSIONS: MILLIMETERS

1.27 PITCH

DOCUMENT NUMBER:

DESCRIPTION:

ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor reserves the right to make changes without further notice to any products herein. ON Semiconductor makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does ON Semiconductor assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. ON Semiconductor does not convey any license under its patent rights nor the rights of others.

98ASB42566B

SOIC−16

Electronic versions are uncontrolled except when accessed directly from the Document Repository. Printed versions are uncontrolled except when stamped “CONTROLLED COPY” in red.

PAGE 1 OF 1

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