Datasheet NDH8504P Datasheet (Fairchild Semiconductor)

February 1997

NDH8504P Dual P-Channel Enhancement Mode Field Effect Transistor

General Description Features

SuperSOTTM-8 P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management and other battery powered circuits where fast high-side switching, and low in-line power loss are needed in a very small outline surface mount package.

___________________________________________________________________________________________

-2.7 A, -30 V. R R

= 0.07Ω @ VGS = -10 V

DS(ON)

= 0.115 Ω @ VGS = -4.5 V.

DS(ON)

Proprietary SuperSOTTM-8 package design using copper lead frame for superior thermal and electrical capabilities.

High density cell design for extremely low R

DS(ON)

.

Exceptional on-resistance and maximum DC current capability.

5

6

7

8

Absolute Maximum Ratings T

= 25°C unless otherwise noted

A

Symbol Parameter

V

DSS

V

GSS

I

D

Drain-Source Voltage -30 V Gate-Source Voltage ±20 V Drain Current - Continuous (Note 1) -2.7 A

- Pulsed -8 P T

D

J,TSTG

Maximum Power Dissipation (Note 1) 0.8 W Operating and Storage Temperature Range -55 to 150 °C

THERMAL CHARACTERISTICS

R

JA

θ

R

JC

θ

Thermal Resistance, Junction-to-Ambient (Note 1) 156 °C/W Thermal Resistance, Junction-to-Case (Note 1) 40 °C/W

4

3

2

1

NDH8504P

Units

NDH8504P Rev.C

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

A

Symbol Parameter Conditions Min Typ Max Units OFF CHARACTERISTICS

BV I

DSS

I

GSSF

I

GSSR

DSS

Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 µA -30 V Zero Gate Voltage Drain Current

VDS = -24V, V

GS

= 0 V

TJ= 55°C

-1 µA

-10 µA Gate - Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA Gate - Body Leakage, Reverse

VGS = -20 V, VDS= 0 V

-100 nA

ON CHARACTERISTICS (Note 2)

V

R

I

g

GS(th)

DS(ON)

D(on)

FS

Gate Threshold Voltage VDS = VGS, ID = - 250 µA -1 -1.6 -3 V

TJ= 125°C

-0.8 -1.2 -2.4

Static Drain-Source On-Resistance VGS = -10 V, ID = -2.7 A 0.062 0.07

0.088 0.125

0.102 0.115

-8 A

-3

5.5 S

On-State Drain Current

Forward Transconductance

TJ= 125°C VGS = -4.5 V, ID = -2.1 A VGS = -10 V, VDS = -5 V VGS = -4.5 V, VDS = -5 V VDS = -10 V, ID = -2.7 A

Ω

DYNAMIC CHARACTERISTICS

C

iss

C

oss

C

rss

Input Capacitance VDS = -15 V, V Output Capacitance 340 pF

f = 1.0 MHz

GS

= 0 V,

560 pF

Reverse Transfer Capacitance 130 pF

SWITCHING CHARACTERISTICS (Note 2)

t t t t Q Q Q

D(on)

r

D(off)

f

Turn - On Delay Time Turn - On Rise Time 16 30 ns

VDD = -10 V, ID = -1 A, VGS = -10 V, R

GEN

= 6 Ω

Turn - Off Delay Time 35 70 ns Turn - Off Fall Time 40 80 ns

g

gs

gd

Total Gate Charge Gate-Source Charge 3.8 nC Gate-Drain Charge 4.7 nC

VDS = -10 V, ID = -2.7 A, VGS = -10 V

13 25 ns

19 27 nC

NDH8504P Rev.C

ELECTRICAL CHARACTERISTICS (T

= 25°C unless otherwise noted)

A

Symbol Parameter Conditions Min Typ Max Units DRAIN-SOURCE DIODE CHARACTERISTICS AND MAXIMUM RATINGS

I

S

V

SD

Notes:

1. R design while R

P

Typical R

Scale 1 : 1 on letter size paper

2. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%.

Maximum Continuous Drain-Source Diode Forward Current -0.67 A Drain-Source Diode Forward Voltage

is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R

JA

θ

D

(t) =

is determined by the user's board design.

CA

θ

T

R

JA

θ

156oC/W when mounted on a 0.0025 in2 pad of 2oz copper.

T

J−TA

θJ A

using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:

J−TA

=

R

(t)

θJ C+RθCA

2

= I

(t) × R

DS(ON)@T

D

(t)

J

VGS = 0 V, IS = -0.67 A (Note 2)

-0.74 -1.2 V

is guaranteed by

JC

θ

NDH8504P Rev.C

Typical Electrical Characteristics

-10 V = -10V

GS

-6.0

-5.0

-8

-6

-4

-2

D

I , DRAIN-SOURCE CURRENT (A)

0

V , DRAIN-SOURCE VOLTAGE (V)

DS

-4.5

-4.0

-3.5

-3.0

-3-2.5-2-1.5-1-0.50

3

2.5

V = -3.5V

GS

2

1.5

DS(on)

R , NORMALIZED

1

DRAIN-SOURCE ON-RESISTANCE

0.5

-4.0

-4.5

-5.0

-6.0

I , DRAIN CURRENT (A)

D

Figure 1. On-Region Characteristics. Figure 2. On-Resistance Variation with Gate

Voltage and Drain Current.

1.6

I = -2.7A

D

V = -10V

1.4

1.2

DS(ON)

R , NORMALIZED

0.8

DRAIN-SOURCE ON-RESISTANCE

0.6

GS

1

-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)

J

1.8 V = -10V

GS

1.6

1.4

1.2

1

0.8

R , NORMALIZEDDS(on)

0.6

DRAIN-SOURCE ON-RESISTANCE

0.4

I , DRAIN CURRENT (A)

D

T = 125°C

J

25°C

-55°C

-7.0

-10

-10-8-6-4-20

Figure 3. On-Resistance Variation with

Temperature.

-10

V = -10V

DS

-8

-6

-4

D

I , DRAIN CURRENT (A)

-2

0

V , GATE TO SOURCE VOLTAGE (V)

GS

T = -55°C

J

Figure 5. Transfer Characteristics.

125°C

25°C

-5-4-3-2-1

Figure 4. On-Resistance Variation with Drain

Current and Temperature.

1.2

V = V

1.1

1

0.9

0.8

GS(th)

V , NORMALIZED

0.7

GATE-SOURCE THRESHOLD VOLTAGE

0.6

-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)

J

DS

I = -250µA

D

Figure 6. Gate Threshold Variation with

Temperature.

GS

NDH8504P Rev.C

Typical Electrical Characteristics

1.1

I = -250µA

D

1.08

1.06

1.04

1.02

1

DSS

0.98

BV , NORMALIZED

0.96

DRAIN-SOURCE BREAKDOWN VOLTAGE

0.94

-50 -25 0 25 50 75 100 125 150 T , JUNCTION TEMPERATURE (°C)

J

Figure 7. Breakdown Voltage Variation with

Temperature.

1500

1000

600

400

200

CAPACITANCE (pF)

f = 1 MHz

100

V = 0 V

GS

50

0.1 0.2 0.5 1 2 5 10 20 30

-V , DRAIN TO SOURCE VOLTAGE (V) DS

C

iss

oss

rss

10

3

V = 0V

GS

1

0.5

0.1

0.01

0.001

S

-I , REVERSE DRAIN CURRENT (A)

0.0001

0.2 0.4 0.6 0.8 1 1.2

T = 125°C

J

25°C

-55°C

-V , BODY DIODE FORWARD VOLTAGE (V)

SD

Figure 8. Body Diode Forward Voltage Variation

with Current and Temperature.

10

I = -2.7A

D

8

6

4

2

GS

-V , GATE-SOURCE VOLTAGE (V) 0

0 4 8 12 16 20

Q , GATE CHARGE (nC)

g

V =-5V

DS

-10V

-15V

Figure 9. Capacitance Characteristics. Figure 10. Gate Charge Characteristics.

-V

V

IN

V

GS

R

GEN

G

Figure 11. Switching Test Circuit.

DD

t

V

d(on)

OUT

R

L

D

V

OUT

DUT

S

V

IN

10%

t t

on off

t

r

d(off)

90%

10%

50%

PULSE WIDTH

Figure 12. Switching Waveforms.

50%

10%

90%

tt

90%

INVERTED

NDH8504P Rev.C

f

Typical Electrical and Thermal Characteristics

12

V = -10V

DS

9

T = -55°C

J

25°C

125°C

6

3

FS

g , TRANSCONDUCTANCE (SIEMENS)

0

I , DRAIN CURRENT (A)

D

Figure 13. Transconductance Variation with Drain

Current and Temperature.

1

D = 0.5

0.2

0.1

0.01

r(t), NORMALIZED EFFECTIVE

TRANSIENT THERMAL RESISTANCE

0.001

0.0001 0.001 0.01 0.1 1 10 100 300

0.2

0.1

0.05

0.02

0.01

0.01 Single Pulse

Single Pulse

-15-12-9-6-30

15 10

5

RDS(ON) LIMIT

2 1

0.5

0.1

D

0.05

-I , DRAIN CURRENT (A)

0.01

0.1 0.2 0.5 1 2 5 10 20 30

V = -10V

GS

SINGLE PULSE

R = See Note 1

JA

θ

A

T = 25°C

A

- V , DRAIN-SOURCE VOLTAGE (V)

DS

Figure 14. Maximum Safe Operating Area.

R (t) = r(t) * R

JA

θ

R = See Note 1

JA

θ

P(pk)

t

1

t

T - T = P * R (t)

J

A

Duty Cycle, D = t / t

t , TIME (sec)

1

1ms

10ms

100ms

1s

10s

DC

JA

θ

2

JA

θ

1

2

Figure 15. Transient Thermal Response Curve.

Note: Thermal characterization performed using the conditions described in note1 .Transient thermal response will change

depending on the circuit board design.

NDH8504P Rev.C

SuperSOTTM-8 Tape and Reel Data and Package Dimensions

SSOT-8 Packaging Configuration: Figure 1.0

Customized Label

F63TNR Label

Emboss ed Carrier Tape

Antistatic Cover Tape

Static Dissi pative

852

F

831N

Packaging Description:

SSOT-8 parts are shipped in tape. The carrier tape is made from a di ssipative (carbo n filled) po lycarbonate resin. The cov er tap e is a mu lt ilayer film (Heat Act ivat ed Adhesiv e in nat ure) prim aril y c omp osed of po lyes ter film , adhesive layer, sealant, and anti-static sprayed agent. These reeled parts in standar d option are ship ped wi th 3,000 u n i t s pe r 13" o r 330c m d ia m et er r e el. Th e r e el s ar e dark blue in color and is made of po ly s t yr ene plas t ic (antistatic c oated). Other option comes in 500 units per 7" or 177c m diam eter reel. This and s ome o ther opt ion s are furth er described in the Packaging Information table.

These fu ll reels are individu ally barcode labeled and placed in side a standard intermediat e box (illus trated in figur e 1.0) made of recyclable cor rugated brow n paper. One box cont ains t wo reels maxi mum. And t hese bo xes are placed ins ide a barc ode labeled shipp ing bo x whic h co m e s i n di ffe r e n t si z es de pend in g on t he nu m b e r of pa rts sh i ppe d.

852

F

831N

F

831N

852

F

831N

852

F

831N

Pin 1

SSOT-8 Packaging Information

Packaging Option Packaging type

Qty per Reel/Tube/Bag Reel Size Box Dimension (mm) Max qty per Box Weight per unit (gm) Weight per Reel (kg)

Note/Comments

184mm x 187mm x 47mm

Stan dard

(no flow c ode )

3,000 500

13" Dia

343x64x343 184x187x47

6,000 1,000

0.0416 0.0416

0.5615 0.0980

TNR

D84Z

TNR

7" Dia

F63TNR Label

Pizza Box for D84Z Option

SSOT-8 Tape Leader and Trailer Configuration: Figur e 2.0

F63TNR Label

SSOT-8 Unit Orientation

343mm x 342mm x 64mm

Inter mediate box for Standar d

and L 99Z Options

F63TNR Label sampl e

LOT: CBVK7 41B019

FSID: FDR835N

D/C1: D9842 QTY1: SPEC REV: D/C2: QTY2: CPN:

F63TNR Label

QTY: 3000

SPEC:

N/F: F (F63TNR)3

Carrier Tape

Cover Tape

Tr ailer Tape 300mm mi n i mum or 38 empty pock ets

Components

Leader Tape 500mm mi n i mum or 62 empty pocket s

August 1999, Rev. C

SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued

SSOT-8 Embossed Carrier Tape Configuration: Figur e 3.0

T

K0

Wc

B0

P0

D0

E1

F

W

E2

Tc

A0

P1

D1

User Direction of Feed

Dimensions are in millimeter

Pkg type

SSOT-8

(12mm)

Notes: A0, B0, and K0 dimensions are determined with r espect to t he EIA/Jedec RS-481

rotational and lateral movement requi rements (see sketches A, B, and C).

SSOT-8 Reel Configuration: Figur e 4.0

A0 B0 W D0 D1 E1 E2 F P1 P0 K0 T Wc Tc

4.47

5.00

12.0

1.55

1.50

1.75

10.25

+/-0.10

20 deg maximum component rotation

Sketc h A (Side or Front Sec tional Vi ew)

Component Rotation

+/-0.3

+/-0.05

+/-0.10

B0

5.50

min

+/-0.05

20 deg maximum

Typical component cavity center line

Typical component center line

A0

Sketc h B (Top View)

Component Rotation

W1 Measured at Hub

Dim A

Max

8.0 +/-0.1

4.0 +/-0.1

1.37

0.280 +/-0.150

9.5 +/-0.025

0.5mm maximum

+/-0.10

0.5mm maximum

Sketc h C (Top View )

Component lateral movement

0.06 +/-0.02

Dim A

max

13" Diameter Option

Tape Size

12mm 7" Dia

12mm 13" Dia

 1998 Fairchild Semiconductor Corporation

Reel

Option

Dim A Dim B Dim C Dim D Dim N Dim W1 Dim W2 Dim W3 (LSL-USL)

7.00

177.8

13.00 330

0.059

1.5

0.059

1.5

Dim N

See detail AA

W3

W2 max Measured at Hub

Dimensions are in inches and millimeters

512 +0.020/ -0.008 13 +0.5/-0.2

0.795

20.2

0.795

20.2

5.906 150

7.00 178

Dim D

min

0.488 +0.078/-0.000

12.4 +2/0

0.488 +0.078/-0.000

12.4 +2/0

Diameter Option

7"

DETAIL AA

0.724

18.4

0.724

18.4

See detail AA

B Min

Dim C

0.469 – 0.606

11.9 – 15.4

0.469 – 0.606

11.9 – 15.4

July 1999, Rev. C

SuperSOTTM-8 Tape and Reel Data and Package Dimensions, continued

SuperSOT-8 (FS PKG Code 34, 35)

1 : 1

Scale 1:1 on letter size paper

Dimensio ns shown below are in:

inches [mil lime ters ]

Part Weight per unit (gram): 0.0416

September 1998, Rev. A

TRADEMARKS

The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended to be an exhaustive list of all such trademarks.

ACEx™ CoolFET™ CROSSVOLT™

2

E

CMOS

TM

FACT™ FACT Quiet Series™

®

FAST FASTr™ GTO™ HiSeC™

ISOPLANAR™ MICROWIRE™ POP™ PowerTrench™ QFET™ QS™

Quiet Series™ SuperSOT™-3 SuperSOT™-6 SuperSOT™-8

TinyLogic™ UHC™ VCX™

DISCLAIMER

FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICA TION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.

LIFE SUPPORT POLICY

FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROV AL OF FAIRCHILD SEMICONDUCTOR CORPORA TION. As used herein:

1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body, or (b) support or sustain life, or (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in significant injury to the user.

2. A critical component is any component of a life support device or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or

effectiveness.

PRODUCT STA TUS DEFINITIONS Definition of Terms

Datasheet Identification Product Status Definition

Advance Information

Preliminary

No Identification Needed

Obsolete

Formative or In Design

First Production

Full Production

Not In Production

This datasheet contains the design specifications for product development. Specifications may change in any manner without notice.

This datasheet contains preliminary data, and supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice in order to improve design.

This datasheet contains specifications on a product that has been discontinued by Fairchild semiconductor. The datasheet is printed for reference information only.

Datasheet NDH8504P Datasheet (Fairchild Semiconductor)

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Frequently Asked Questions

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