NDH8502P
Dual P-Channel Enhancement Mode Field Effect Transistor
General Description Features
December 1996
SuperSOTTM-8 P-Channel enhancement mode power field
effect transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high density
process is especially tailored to minimize on-state resistance.
These devices are particularly suited for low voltage
applications such as notebook computer power management
and other battery powered circuits where fast high-side
switching, and low in-line power loss are needed in a very small
outline surface mount package.
-2.2 A, -30 V. R
R
Proprietary SuperSOTTM-8 package design using copper
lead frame for superior thermal and electrical capabilities.
High density cell design for extremely low R
Exceptional on-resistance and maximum DC current
Maximum Continuous Drain-Source Diode Forward Current-0.67A
Drain-Source Diode Forward Voltage
is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R
JA
θ
(t)
D
is determined by the user's board design.
CA
θ
T
=
R
JA
θ
156oC/W when mounted on a 0.0025 in2 pad of 2oz copper.
T
J−TA
θJA
using the board layouts shown below on 4.5"x5" FR-4 PCB in a still air environment:
J−TA
=
(t)
R
θJC+RθCA
2
= I
(t) ×R
DS(ON ) T
D
(t)
J
VGS = 0 V, IS = -0.67 A (Note 2)
-0.76-1.2V
is guaranteed by
JC
θ
NDH8502P Rev.C
Page 4
Typical Electrical Characteristics
-10
V = -10V
GS
-6.0
-5.0
-8
-6
-4
-2
D
I , DRAIN-SOURCE CURRENT (A)
0
V , DRAIN-SOURCE VOLTAGE (V)
DS
-4.5
-4.0
-3.5
-3.0
-5-4-3-2-10
3
V = -3.5V
GS
2.5
2
1.5
DS(on)
R , NORMALIZED
1
DRAIN-SOURCE ON-RESISTANCE
0.5
-4.0
-4.5
-5.0
I , DRAIN CURRENT (A)
D
-5.5
Figure 1. On-Region Characteristics.Figure 2. On-Resistance Variation with Gate
Voltage and Drain Current.
1.6
I = -2.2A
D
V = -10V
1.4
GS
1.2
1
DS(ON)
R , NORMALIZED
0.8
DRAIN-SOURCE ON-RESISTANCE
0.6
-50-250255075100125150
T , JUNCTION TEMPERATURE (°C)
J
1.8
V = -10V
GS
1.5
1.2
0.9
R , NORMALIZEDDS(on)
0.6
DRAIN-SOURCE ON-RESISTANCE
0.3
T = 125°C
J
25°C
I , DRAIN CURRENT (A)
D
-55°C
-6.0
-10
-10-8-6-4-20
-10-8-6-4-20
Figure 3. On-Resistance Variation with
Temperature.
-10
V = -10V
DS
-8
-6
-4
D
I , DRAIN CURRENT (A)
-2
0
V , GATE TO SOURCE VOLTAGE (V)
GS
T = -55°C
J
Figure 5. Transfer Characteristics.
25°C
125°C
-6-5-4-3-2-1
Figure 4. On-Resistance Variation with Drain
Current and Temperature.
1.2
V = V
DS
1.1
1
0.9
GS(th)
V , NORMALIZED
0.8
GATE-SOURCE THRESHOLD VOLTAGE
0.7
-50-250255075100125150
T , JUNCTION TEMPERATURE (°C)
J
I = -250µA
D
Figure 6. Gate Threshold Variation with
Temperature.
GS
NDH8502P Rev.C
Page 5
Typical Electrical Characteristics
1.08
I = -250µA
D
1.06
1.04
1.02
1
DSS
0.98
BV , NORMALIZED
0.96
DRAIN-SOURCE BREAKDOWN VOLTAGE
0.94
-50-250255075100125150
T , JUNCTION TEMPERATURE (°C)
J
Figure 7. Breakdown Voltage Variation with
Temperature.
1000
800
600
400
200
CAPACITANCE (pF)
100
f = 1 MHz
V = 0 V
GS
50
0.10.20.51251020 30
-V , DRAIN TO SOURCE VOLTAGE (V)
DS
C
C
C
iss
oss
rss
10
V = 0V
5
GS
1
0.1
0.01
0.001
S
-I , REVERSE DRAIN CURRENT (A)
0.0001
00.20.40.60.811.2
-V , BODY DIODE FORWARD VOLTAGE (V)
T= 125°C
J
25°C
-55°C
SD
Figure 8. Body Diode Forward Voltage Variation
with Current and Temperature.
10
I = -2.2A
D
8
6
4
2
GS
-V , GATE-SOURCE VOLTAGE (V)
0
024681012
Q , GATE CHARGE (nC)
g
V = -10V
DS
-15V
-20V
Figure 9. Capacitance Characteristics.
-V
V
IN
D
V
GS
R
GEN
G
S
Figure 11. Switching Test Circuit.
DD
Figure 10. Gate Charge Characteristics.
tt
onoff
t
R
L
d(on)
r
90%
V
OUT
V
OUT
DUT
10%
t
d(off)
90%
10%
tt
f
90%
V
IN
50%
50%
10%
PULSE WIDTH
INVERTED
Figure 12. Switching Waveforms.
NDH8502P Rev.C
Page 6
Typical Electrical and Thermal Characteristics
12
V = - 5V
DS
10
8
6
T = -55°C
J
25°C
125°C
4
2
FS
g , TRANSCONDUCTANCE (SIEMENS)
0
I , DRAIN CURRENT (A)
D
Figure 13. Transconductance Variation with Drain
Current and Temperature.
1
D = 0.5
0.2
0.1
0.01
r(t), NORMALIZED EFFECTIVE
TRANSIENT THERMAL RESISTANCE
0.001
0.00010.0010.010.1110100300
0.1
0.05
0.02
0.01
Single Pulse
-20-15-10-50
20
10
5
RDS(ON) LIMIT
2
1
0.5
V = -4.5V
0.1
D
0.05
-I , DRAIN CURRENT (A)
0.01
0.10.20.51251020 30 50
GS
SINGLE PULSE
R = See Note 1c
JA
θ
A
T = 25°C
A
- V , DRAIN-SOURCE VOLTAGE (V)
DS
Figure 14. Maximum Safe Operating Area.
R (t) = r(t) * R
JA
θ
R = See Notes 1
JA
θ
P(pk)
t
1
t
2
T - T = P * R (t)
J
A
Duty Cycle, D = t / t
t , TIME (sec)
1
DC
10s
JA
θ
100ms
1s
1
θ
100us
1ms
10ms
JA
2
Figure 15. Transient Thermal Response Curve.
Note: Thermal characterization performed using the conditions described in note 1. Transient thermal response will change
depending on the circuit board design.
NDH8502P Rev.C
Page 7
NDH8502P Rev.C
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