Page 1
INTEGRATED CIRCUITS
74F676
16-bit serial/parallel-in, serial-out shift
register (3-State)
Product specification
IC15 Data Handbook
1989 Apr 18
Page 2
Philips Semiconductors Product specification
74F67616-bit serial/parallel-in, serial-out shift register (3-State)
FEA TURES
•16-bit parallel-to-serial conversion
•16-bit serial-in, serial-out
•Chip select control
•Power supply current 48mA typical
•Shift frequency 110MHz tyical
•Available in 300mil-wide 24-pin Slim DIP package
DESCRIPTION
The 74F676 contains 16 flip-flops with provision for synchronous
parallel or serial entry and serial output. When the mode (M) input is
High, information present on the parallel data (D0–D15) inputs is
entered on the falling edge of the clock pulse (CP
When M is Low, data is shifted out of the most significant bit position
while information present on the serial (SI) input shifts into the least
significant bit position. A High signal on the chip select (CS
prevents both parallel and serial operations.
The 16 bit shift register operates in one of three modes, as indicated
in the shift register Function Table.
Hold: A High signal on the Chip Select (CS
and data is stored in the 16 registers.
Serial load: Data present on the SI pin shifts into the register on the
falling edge of CP
. Data enters the Q0 position and shifts toward
Q15 on successive clocks finally appearing on the SO pin.
Parallel load: Data present on D0–D15 is entered into the register
on the falling edge of CP
. The SO output represents the Q15 register
output.
To prevent false clocking, CP
transition of CS
.
must be Low during a Low-to-High
) input signal.
) input
) input prevents clocking
PIN CONFIGURATION
CS
CP
2 D15
3
NC
4
SI
5
M
SO
6
7
D0
D1
8
D2
9
D3
10 15
D4
11
GND
12 13
TYPE TYPICAL f
MAX
74F676 110MHz 48mA
V
241
CC
23
22
D14
21
D13
20
D12
19
D11
18
D10
17
D9
16
D8
D7
14
D6
D5
SF01209
TYPICAL SUPPL Y
CURRENT
(TOTAL)
ORDERING INFORMATION
COMMERCIAL RANGE
DESCRIPTION
24-Pin Plastic Slim
DIP (300mil)
24-Pin Plastic SOL N74F676D SOT137-1
VCC = 5V ±10%,
T
= 0°C to +70°C
amb
N74F676N SOT222-1
PKG DWG #
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
PINS DESCRIPTION
74F(U.L.)
HIGH/LOW
D0–D15 Parallel data inputs 1.0/1.0 20µA/0.6mA
SI Serial data input 1.0/1.0 20µA/0.6mA
CS Chip Select input (active Low) 1.0/1.0 20µA/0.6mA
CP Clock Pulse input (active falling edge) 1.0/1.0 20µA/0.6mA
M Mode select input 1.0/1.0 20µA/0.6mA
SO Serial data output 50/33 1mA/20mA
NOTE: One (1.0) FAST Unit Load is defined as: 20µA in the High state and 0.6mA in the Low state.
1990 Apr 18 853–0284 99394
2
LOAD VALUE
HIGH/LOW
Page 3
Philips Semiconductors Product specification
OPERATING MODE
74F67616-bit serial/parallel-in, serial-out shift register (3-State)
LOGIC SYMBOL
4
SI
1
CS
2
CP
5
M
= Pin 24
V
CC
GND = Pin 12
8910
D0 D1 D4 D5 D6 D7D3D2
11 13 147 16 17 18
LOGIC SYMBOL (IEEE/IEC)
SRG16
5
1
2
7
8
9
10
11
13
14
15
16
17
18
19
20
21
22
23
4
0
1
2, 3D
2, 3D
1, 3D
0
M
2
&
C3/1
D8 D9 D12 D13 D14 D15D11D10
SO
6
19 20 21 2215 23
SF01210
6
SF01211
LOGIC DIAGRAM
2
CP
1
CS
5
M
4
SI
7
D0
8
D1
9
D2
10
D3
11
D4
13
D5
14
D6
15
D7
16
D8
17
D9
18
D10
19
D11
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
CP
Q
D
FUNCTION TABLE
CONTROL INPUTS
CS M CP
H X X Hold
L L ↓ Shift/Serial load
L H ↓ Parallel load
H = High voltage level
L = Low voltage level
X = Don’t care
↓ = High-to-Low transition of clock input
1990 Apr 18
3
20
D12
21
D13
22
D14
23
D15
VCC = Pin 24
GND = Pin 12
CP
Q
D
CP
Q
D
CP
Q
D
CP
D
6
Q
SO
SF01212
Page 4
Philips Semiconductors Product specification
SYMBOL
PARAMETER
UNIT
NO TAG
VOHHigh-level output voltage
CC
,
IL
,
VOLLow-level output voltage
CC
,
IL
,
74F67616-bit serial/parallel-in, serial-out shift register (3-State)
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device.
Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
V
I
IN
V
I
OUT
T
T
CC
IN
OUT
amb
stg
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +5.0 mA
Voltage applied to output in High output state –0.5 to +V
Current applied to output in Low output state 40 mA
Operating free-air temperature range 0 to +70 °C
Storage temperature –65 to +150 °C
RECOMMENDED OPERATING CONDITIONS
V
V
V
I
I
I
T
CC
IH
IL
IK
OH
OL
amb
Supply voltage 4.5 5.0 5.5 V
High-level input voltage 2.0 V
Low-level input voltage 0.8 V
Input clamp current –18 mA
High-level output current –1 mA
Low-level output current 20 mA
Operating free-air temperature range 0 70 °C
PARAMETER RATING UNIT
CC
V
LIMITS
MIN NOM MAX
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
SYMBOL PARAMETER TEST CONDITIONS
p
p
V
IK
I
I
I
IH
I
IL
I
OS
I
CC
Input clamp voltage VCC = MIN, II = I
Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA
High-level input current VCC = MAX, VI = 2.7V 20 µA
Low-level input current VCC = MAX, VI = 0.5V –0.6 mA
Short-circuit output current
NO TAG
Supply current (total) VCC = MAX 48 72 mA
VCC = MIN, VIL = MAX,
VIH = MIN, I
OH
= MAX
VCC = MIN, VIL = MAX,
VIH = MIN, I
OL
= MAX
VCC = MAX –60 –150 mA
±10%V
±5%V
±10%V
±5%V
IK
CC
CC
MIN
2.5 V
CC
2.7 3.4 V
CC
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value under the recommended operating conditions for the applicable type.
2. All typical values are at VCC = 5V, T
3. Not more than one output should be shorted at a time. For testing I
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
amb
= 25°C.
, the use of high-speed test apparatus and/or sample-and-hold
OS
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
should be performed last.
OS
TYP
NO TAG
MAX
0.30 0.50 V
0.30 0.50 V
–0.73 –1.2 V
UNIT
1990 Apr 18
4
Page 5
Philips Semiconductors Product specification
TEST
CONDITION
74F67616-bit serial/parallel-in, serial-out shift register (3-State)
AC ELECTRICAL CHARACTERISTICS
LIMITS
T
SYMBOL PARAMETER
f
MAX
t
PLH
t
PHL
Maximum clock frequency Waveform
NO TAG
Propagation delay
CP to SO
Waveform
NO TAG
AC SETUP REQUIREMENTS
SYMBOL PARAMETER TEST CONDITION
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
th(L)
ts(H)
ts(L)
th(H)
t
(L)
h
ts(L)
th(H)
tw(H)
tw(L)
Setup time, High or Low
SI to CP
Hold time, High or Low
SI to CP
Setup time, High or Low
Dn to CP
Hold time, High or Low
Dn to CP
Setup time, High or Low
M to CP
Hold time, High or Low
M to CP
Setup time, Low
CS to CP
Hold time, High
CS to CP
CP Pulse width,
High or Low
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 2
Waveform 2 10.0 10.0 ns
Waveform 2 10.0 10.0 ns
Waveform NO TAG
= +25°C T
amb
VCC = +5.0V VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω
MIN TYP MAX MIN MAX
100 110 90 MHz
4.5
5.0
8.0
7.0
11.0
12.5
LIMITS
T
= +25°C T
amb
VCC = +5.0V VCC = +5.0V ± 10%
CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω
MIN TYP MAX MIN MAX
4.0
4.0
4.0
4.0
3.0
3.0
4.0
4.0
8.0
8.0
2.0
2.0
4.0
6.0
= 0°C to +70°C
amb
4.5
5.0
= 0°C to +70°C
amb
4.0
4.0
4.0
4.0
3.0
3.0
4.0
4.0
8.0
8.0
2.0
2.0
4.0
6.0
12.0
13.5
UNIT
ns
ns
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC WAVEFORMS
For all waveforms, VM = 1.5V.
The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
MAX
CP
SO
V
M
t
PLH
tw(L)
V
M
tw(H)
V
M
V
M
t
PHL
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
1990 Apr 18
V
M
SF01213
Dn, CS,
M, SI
CP
V
M
ts(H) ts(L)th(H) th(L)
V
Waveform 2. Setup and Hold Times
5
V
M
M
VMV
M
V
M
SF01214
Page 6
Philips Semiconductors Product specification
74F67616-bit serial/parallel-in, serial-out shift register (3-State)
TEST CIRCUIT AND WAVEFORM
V
CC
PULSE
GENERATOR
V
IN
R
T
D.U.T.
V
OUT
R
C
L
L
Test Circuit for Totem-Pole Outputs
DEFINITIONS:
= Load resistor;
R
L
see AC ELECTRICAL CHARACTERISTICS for value.
C
= Load capacitance includes jig and probe capacitance;
L
see AC ELECTRICAL CHARACTERISTICS for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
OUT
of
NEGATIVE
PULSE
POSITIVE
PULSE
family
74F
90%
10%
amplitude
t
w
V
M
10%
)
V
90%
M
t
THL (tf
t
TLH (tr
)
t
TLH (tr
t
THL (tf
t
w
Input Pulse Definition
INPUT PULSE REQUIREMENTS
V
rep. rate
M
3.0V 1.5V
1MHz 500ns
10%
)
)
90%
t
w
V
M
V
M
90%
10%
t
TLHtTHL
2.5ns 2.5ns
AMP (V)
0V
AMP (V)
0V
SF00006
1990 Apr 18
6
Page 7
Philips Semiconductors Product specification
74F67616-bit serial/parallel-in, serial-out shift register (3-State)
DIP24: plastic dual in-line package; 24 leads (300 mil) SOT222-1
1989 Apr 18
7
Page 8
Philips Semiconductors Product specification
74F67616-bit serial/parallel-in, serial-out shift register (3-State)
SO24: plastic small outline package; 24 leads; body width 7.5 mm SOT137-1
1989 Apr 18
8
Page 9
Philips Semiconductors Product specification
74F67616-bit serial/parallel-in, serial-out shift register (3-State)
NOTES
1989 Apr 18
9
Page 10
Philips Semiconductors Product specification
74F67616-bit serial/parallel-in, serial-out shift register (3-State)
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98
Document order number: 397-750-05173
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