Page 1
INTEGRATED CIRCUITS
74F240/74F240A
Octal inverter buffer (3-State)
74F241/74F241A
Octal buffer (3-State)
Product specification
IC15 Data Handbook
1001 Jan 02
Page 2
Philips Semiconductors Product specification
Buffers
74F240/74F240A/
74F241/74F241A
FEA TURES
• Octal bus interface
• 3-State buffer outputs sink 64mA
• 15mA source current
• Guaranteed output skew less than 2.0ns
(74F240A/74F241A)
• Reduced ground bounce (74F240A/74F241A)
• Reduced I
• Reduced loading (74F240A I
74F241A I
TYPE TYPICAL PROPAGATION DELAY TYPICAL SUPPLY CURRENT (TOTAL)
74F240 4.3ns 37mA
74F240A 3.8ns 40mA
74F241 5.0ns 53mA
74F241A 4.5ns 32mA
(74F241A only)
CC
= 40µA)
IL
= 100µA,
IL
DESCRIPTION
The 74F240 and 74F241 are octal buffers that are ideal for
driving bus lines of buffer memory address registers. The
outputs are all capable of sinking 64mA and sourcing up to
15mA. The device features two output enables, each
controlling four of the 3–state outputs.
The 74F240A and 74F241A are functionally equivalent to
their non–A counterparts. They have been designed to
reduce effects of ground noise. Other advantages are noted
in the features.
ORDERING INFORMATION
ORDER CODE
DESCRIPTION COMMERCIAL RANGE
= 5V ±10%, T
V
CC
20–pin plastic DIP N74F240N, N74F240AN, N74F241N, N74F241AN SOT146-1
20–pin plastic SOL N74F240D, N74F240AD, N74F241D, N74F241AD SOT163-1
20-pin plastic SSOP II N74F240DB SOT339-1
= 0°C to +70°C
amb
PKG DWG #
INPUT AND OUTPUT LOADING AND FAN OUT TABLE
PINS DESCRIPTION
Data inputs (74F240) 1.0/1.67 20µA/1.0mA
Ian, Ibn Data inputs (74F240A) 1.0/0.167 20µA/100µA
Data inputs (74F241) 1.0/2.67 20µA/1.6mA
Data inputs (74F241A) 1.0/0.067 20µA/40µA
OEa, OEb Output enable inputs (active low) (74F240) 1.0/0.33 20µA/0.2mA
Output enable inputs (active low) (74F240A) 1.0/0.167 20µA/100µA
OEa, OEb Output enable input (74F241) 1.0/1.67 20µA/1.0mA
Output enable input (74F241A) 1.0/0.067 20µA/40µA
Yan, Ybn Data outputs (74F241, 74F241A) 750/106.7 15mA/64mA
Yan, Ybn Data outputs (74F240, 74F240A) 750/106.7 15mA/64mA
Note to input and output loading and fan out table
One (1.0) FAST unit load is defined as: 20µA in the high state and 0.6mA in the low state.
74F (U.L.)
HIGH/LOW
LOAD VALUE
HIGH/LOW
January 2, 1991 853–0355 01345
2
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Philips Semiconductors Product specification
Buffers
PIN CONFIGURATION FOR 74F240/74F240A
1
OEa
2
Ia0
3
Yb0
4
Ia1
5
Y
b1
6
Ia2
7
Y
b2
8
Ia3
9
Yb3
10 11
GND
LOGIC SYMBOL FOR 74F240/74F240A
2 4 6 8 17 15 13 11
V
20
OEb
19
Y
18
17
Ib0
16
Y
15
Ib1
14
Y
13
Ib2
12
Ya3
Ib3
SF00320
CC
a0
a1
a2
74F240/74F240A/
74F241/74F241A
IEC/IEEE SYMBOL FOR 74F240/74F240A
1
19
17
15
13
11
LOGIC DIAGRAM FOR 74F240/74F240A
2
Ia0
EN1
EN2
2
4
6
8
2D
18
1
2
a0
Y
Ib0
18
16
14
12
3
5
7
9
SF00322
17
3
Yb0
Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3
119OEa
OEb
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3
181614123579
VCC = Pin 20
GND = Pin 10
SF00321
FUNCTION TABLE FOR 74F240/74F240A
INPUTS OUTPUTS
OEa Ia OEb Ib Ya Yb
L L L L H H
L H L H L L
H X H X Z Z
Notes to function table for 74F240/74F240A
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance ”off” state
Ia1
Ia2
Ia3
OEa
VCC = Pin 20
GND = Pin 10
5
7
9
SF00323
Y
Yb2
Y
b1
b3
OE
Ib1
Ib2
Ib3
15
13
11
10
b
4
6
8
1
16
Y
a1
14
Ya2
12
Y
a3
January 2, 1991
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Philips Semiconductors Product specification
Buffers
PIN CONFIGURATION FOR 74F241/74F241A
V
1
OEa
2
Ia0
3
Yb0
4
Ia1
5
Yb1
6
Ia2
7
Yb2
8
Ia3
9
Yb3
10 11
GND
LOGIC SYMBOL FOR 74F241/74F241A
2 4 6 8 17 15 13 11
20
19
18
17
16
15
14
13
12
SF00324
CC
OEb
Ya0
Ib0
Ya1
Ib1
Ya2
Ib2
Ya3
Ib3
74F240/74F240A/
74F241/74F241A
IEC/IEEE SYMBOL FOR 74F241/74F241A
1
19
2
4
6
8
17
15
13
11
LOGIC DIAGRAM FOR 74F241/74F241A
2
Ia0
EN1
EN2
2D
18
Ya0
1
2
Ib0
18
16
14
12
3
5
7
9
SF00326
17
3
Yb0
Ia0 Ia1 Ia2 Ia3 Ib0 Ib1 Ib2 Ib3
1
OEa
19
VCC = Pin 20
GND = Pin 10
OEb
Ya0 Ya1 Ya2 Ya3 Yb0 Yb1 Yb2 Yb3
18 16 14 12 3 5 7 9
SF00325
FUNCTION TABLE FOR 74F241/74F241A
INPUTS OUTPUTS
OEa Ia OEb Ib Ya Yb
L L H L L L
L H H H H H
H X L X Z Z
Notes to function table for 74F241/74F241A
H = High voltage level
L = Low voltage level
X = Don’t care
Z = High impedance ”off” state
4
Ia1
6
Ia2
8
Ia3
1
OE
a
VCC = Pin 20
GND = Pin 10
16
Ya1
14
Ya2
12
Ya3
Ib1
Ib2
Ib3
OEb
15
13
11
10
5
7
9
SF00327
Yb1
Yb2
Yb3
January 2, 1991
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Philips Semiconductors Product specification
Buffers
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limit set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the
operating free air temperature range.)
SYMBOL
V
V
I
IN
V
I
OUT
T
T
CC
IN
OUT
amb
stg
Supply voltage –0.5 to +7.0 V
Input voltage –0.5 to +7.0 V
Input current –30 to +5 mA
Voltage applied to output in high output state –0.5 to V
Current applied to output in low output state
Operating free air temperature range 0 to +70
Storage temperature range –65 to +150
RECOMMENDED OPERATING CONDITIONS
SYMBOL PARAMETER LIMITS UNIT
V
V
V
I
I
I
T
CC
IH
IL
Ik
OH
OL
amb
Supply voltage 4.5 5.0 5.5 V
High–level input voltage 2.0 V
Low–level input voltage 0.8 V
Input clamp current –18 mA
High–level output current –15 mA
Low–level output current
Operating free air temperature range 0 +70
PARAMETER RATING UNIT
MIN NOM MAX
74F241/74F241A
CC
128 mA
64 mA
74F240/74F240A/
V
°C
°C
°C
January 2, 1991
5
Page 6
Philips Semiconductors Product specification
3
Buffers
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
SYMBOL
V
V
V
I
I
I
IH
I
IL
I
OZH
I
OZL
I
OS
I
CC
OH
OL
IK
High-level output voltage
Low-level output voltage
Input clamp voltage VCC = MIN, II = I
Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA
High–level input current VCC = MAX, VI = 2.7V 20 µA
Low–level input current 74F241 OEa, OEb VCC = MAX, VI = 0.5V –1.0 mA
Off–state output current,
high–level voltage applied
Off–state output current,
low–level voltage applied
Short–circuit output current
Supply current (total) I
Notes to DC electrical characteristics
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. Not more than one output should be shorted at a time. For testing I
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any
sequence of parameter tests, I
PARAMETER TEST LIMITS UNIT
CONDITIONS
VCC = MIN, IOH = –3mA
VIL = MAX,
VIH = MIN IOH =
–15mA
VCC = MIN,
VIL = MAX,
IOL = MAX
1
±10%V
±5%V
±10%V
±5%V
±10%V
VIH = MIN, ±5%V
IK
74F240 all inputs –1.0 mA
74F240A all inputs –100 µA
74F241 Ian, Ibn –1.6 mA
74F241A all inputs –40 µA
VCC = MAX, V
VCC = MAX, VO = 0.5V –50
= 2.7V 50
O
VCC = MAX -100 -225 mA
I
CCH
74F240 I
74F240A I
74F241 I
74F241A I
= 5V, T
CC
OS
= 25°C.
amb
tests should be performed last.
CCL
I
CCZVCC
I
CCH
CCL
CCZ
I
CCH
CCL
I
CCZVCC
I
CCH
CCL
I
CCZ
= MAX 35 45 mA
= MAX 65 90 mA
, the use of high-speed test apparatus and/or sample-and-hold
OS
74F241/74F241A
MIN TYP2MAX
2.4 V
C
C
C
C
2.7 3.4 V
CC
2.0 V
C
2.0 V
CC
C
CC
0.42 0.50 V
–0.73 -1.2 V
12 18 mA
50 70 mA
28 37 mA
58 75 mA
34 50 mA
40 60 mA
60 90 mA
20 30 mA
49 65 mA
26 40 mA
0.50 V
µA
µA
74F240/74F240A/
January 2, 1991
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Philips Semiconductors Product specification
Buffers
AC ELECTRICAL CHARACTERISTICS
T
= +25°C T
amb
SYMBOL PARAMETER TEST VCC = +5.0V
CONDITION CL = 50pF, RL = 500Ω CL = 50pF, RL = 500Ω
MIN TYP MAX MIN MAX
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
sk(0)
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
sk(0)
Notes to AC electrical characteristics
1. | t
PN
2. Skew times are valid only under same test conditions (temperature, V
Propagation delay
Ian, Ibn to Y
n
Output enable time
to high or low level
Output disable time
from high or low level
Propagation delay
Ian, Ibn to Yn
Output enable time
to high or low level
Output disable time
from high or low level
1, 2
Output skew
Propagation delay
Ian, Ibn to Yn
Output enable time
to high or low level
Output disable time
from high or low level
Propagation delay
Ian, Ibn to Yn
Output enable time
to high or low level
Output disable time
from high or low level
1, 2
Output skew
Waveform 1
74F240
Waveform 3
Waveform 4
Waveform 3
Waveform 4
Waveform 1
74F240A
Waveform 3
Waveform 4
Waveform 3
Waveform 4
Waveform 5 1.5 2.0 ns
Waveform 2
74F241
Waveform 3
Waveform 4
Waveform 3
Waveform 4
Waveform 2
74F241A
Waveform 3
Waveform 4
Waveform 3
Waveform 4
Waveform 5 1.5 2.0 ns
3.0
2.0
3.0
4.5
3.0
3.0
2.5
2.0
2.0
3.5
2.0
1.5
2.5
2.5
2.0
2.0
2.0
2.0
2.5
2.5
2.5
3.5
2.0
1.5
4.5
3.0
5.0
6.5
5.5
5.0
4.0
3.5
4.0
5.0
3.5
2.5
4.0
4.0
4.0
5.0
4.0
4.0
4.5
4.5
4.5
5.0
4.0
3.5
actual – tPM actual| for any output compared to any other output where N and M are either LH or HL.
, loading, etc.,).
CC
74F240/74F240A/
74F241/74F241A
LIMITS
= 0°C to +70°C
amb
VCC = +5.0V ± 10%
6.5
4.5
7.5
8.5
7.0
7.0
5.5
5.5
6.5
7.5
6.0
5.0
5.2
5.2
5.7
7.0
6.0
6.0
5.8
5.8
6.0
7.0
6.0
5.5
3.0
2.0
3.0
4.0
3.0
3.0
2.0
2.0
2.0
3.0
1.5
1.0
2.5
2.5
2.0
2.0
2.0
2.0
2.5
2.5
2.0
3.0
1.5
1.0
7.5
5.0
9.0
10.0
7.5
7.5
6.5
6.0
7.0
8.5
6.5
5.5
6.2
6.5
6.7
8.0
7.0
7.0
6.5
6.5
6.7
8.0
6.5
6.0
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
AC WAVEFORMS
Ian, Ibn
Waveform 1. Propagation delay for inverting outputs
January 2, 1991
V
M
t
PHL
Yn
V
M
t
PLH
V
M
Ian, Ibn
V
M
SF00328
Yn
V
M
t
PLH
V
M
t
PHL
V
V
M
M
SF00329
Waveform 2. Propagation delay for non–invertIng outputs
7
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Philips Semiconductors Product specification
Buffers
OEn
OEb
Yn, Y
n
Waveform 3. 3-state output enable time to high level
and output disable time from high level
OEn
OEb
Yn, Y
n
Waveform 4. 3-state output enable time to low level and output
V
t
PZH
V
t
PZL
M
M
V
M
t
PHZ
V
M
V
M
t
PLZ
V
M
disable time from low level
VOH -0.3V
0V
SF00330
3.5V
VOL +0.3V
SF00331
74F240/74F240A/
74F241/74F241A
Yn, Yn
Yn,
Yn
Waveform 5. Output skew
Notes to AC waveforms
1. For all waveforms, VM = 1.5V.
2. The shaded areas indicate when the input is permitted to change
for predictable output performance.
V
M
t
sk(0)
V
M
SF00332
TEST CIRCUIT AND WAVEFORMS
V
CC
V
PULSE
GENERATOR
IN
R
T
Test Circuit for Open Collector Outputs
SWITCH POSITION
TEST SWITCH
t
t
PLZ
PZL
closed
closed
All other open
DEFINITIONS:
= Load resistor;
R
L
see AC electrical characteristics for value.
C
= Load capacitance includes jig and probe capacitance;
L
see AC electrical characteristics for value.
R
= Termination resistance should be equal to Z
T
pulse generators.
D.U.T.
V
OUT
t
7.0V
R
L
C
R
L
L
NEGATIVE
PULSE
POSITIVE
PULSE
90%
10%
V
M
10%
t
THL (tf
t
TLH (tr
90%
V
M
w
V
M
10%
)
)
t
)
TLH (tr
t
)
THL (tf
90%
V
M
t
w
90%
10%
AMP (V)
0V
AMP (V)
0V
Input Pulse Definition
INPUT PULSE REQUIREMENTS
V
amplitude
3.0V
M
1.5V
rep. rate
1MHz 500ns
t
w
t
TLH
t
THL
2.5ns 2.5ns
SF00128
OUT
of
family
74F
January 2, 1991
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Philips Semiconductors Product specification
Buffers
DIP20: plastic dual in-line package; 20 leads (300 mil) SOT146-1
74F241/74F241A
74F240/74F240A
1991 Jan 02
9
Page 10
Philips Semiconductors Product specification
Buffers
SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1
74F241/74F241A
74F240/74F240A
1991 Jan 02
10
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Philips Semiconductors Product specification
Buffers
SSOP20: plastic shrink small outline package; 20 leads; body width 5.3 mm SOT339-1
74F241/74F241A
74F240/74F240A
1991 Jan 02
11
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Philips Semiconductors Product specification
Buffers
Data sheet status
Data sheet
status
Objective
specification
Preliminary
specification
Product
specification
Product
status
Development
Qualification
Production
74F240/74F240A
74F241/74F241A
Definition
This data sheet contains the design target or goal specifications for product development.
Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date.
Philips Semiconductors reserves the right to make chages at any time without notice in order to
improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make
changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook.
Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or
at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended
periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips
Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or
modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard
cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no
responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these
products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless
otherwise specified.
Philips Semiconductors
811 East Arques Avenue
P.O. Box 3409
Sunnyvale, California 94088–3409
Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98
Document order number: 9397-750-05101
yyyy mmm dd
12
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