Datasheet N74F174D Datasheet (Philips)

Page 1
INTEGRATED CIRCUITS
74F174
Hex D flip-flops
Product specification IC15 Data Handbook
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1988 Oct 07
Page 2
74F174Hex D flip-flop
FEA TURES
PIN CONFIGURATION
Six edge-triggered D-type flip-flops
Buffered common Clock
MR
Buffered, asynchronous Master Reset
DESCRIPTION
The 74F174 has six edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR
The register is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition is transferred to the corresponding flip-flop’s Q output.
All Q outputs will be forced Low independent of Clock or Data inputs by a Low voltage level on the MR applications where true outputs only are required, and the Clock and Master Reset are common to all storage elements.
INPUT AND OUTPUT LOADING AND FAN-OUT TABLE
NOTE: One (1.0) FAST unit load is defined as: 20µA in the High state and 0.6mA in the Low state.
) inputs load and reset (clear) all flip-flops simultaneously.
input. The device is useful for
ORDERING INFORMA TION
TYPICAL
TYPE
TYPICAL f
MAX
SUPPLY CURRENT
(TOTAL)
74F174 100MHz 35mA
PINS DESCRIPTION 74F (U.L.) HIGH/LOW LOAD VALUE HIGH/LOW
D0–D5 Data inputs 1.0/1.0 20µA/0.6mA
CP Clock Pulse input (active rising edge) 1.0/1.0 20µA/0.6mA
MR Master Reset input (active-Low) 1.0/1.0 20µA/0.6mA
Q0–Q5 Outputs 50/33 1.0mA/20mA
DESCRIPTION
16-pin plastic DIP N74F174N SOT38-4
16-pin plastic SO N74F174D SOT109-1
1 2
Q0
3
D0
4
D1
5
Q1
6
D2 Q2
COMMERCIAL RANGE
VCC = 5V ±10%,
T
= 0°C to +70°C
amb
16 15 14 13 12 11 107
98GND CP
SF00188
V Q5 D5
D4 Q4 D3 Q3
CC
PKG DWG #
LOGIC SYMBOL
346
D0 D1 D2 D3 D4 D5
V
= Pin 16
CC
GND = Pin 8
9 1
CP MR
Q1
5Q02
October 7, 1988 853–0060 94766
11 13 14
Q2 Q3 Q4 Q5
7101215
SF00189
IEC/IEEE SYMBOL
2
9 1
3
4
6
11
13
14
C1
R
1D
2
5
7
10
12
15
SF00190
Page 3
Philips Semiconductors Product specification
OPERATING MODE
SYMBOL
PARAMETER
UNIT
74F174Hex D flip-flop
LOGIC DIAGRAM
D0
3
D1
4
D2
6
D3
11
D4
13
D5
14
= Pin 16
V
CC
GND = Pin 8
CP
MR
Q
D
CP
R
D
9
1
2
Q0
Q
D
CP
R
D
5
Q1
Q
D
CP
R
D
7
Q2
FUNCTION TABLE
INPUTS OUTPUTS
MR CP D Qn
L X X L Reset (clear) H hH Load “1” H l L Load “0”
H = High voltage level L = Low voltage level X = Don’t care = Low-to-High Clock transition h = High voltage level one set-up time prior to the Low-to-High Clock transition. l = Low voltage level one set-up time prior to the Low-to-High Clock transition.
ABSOLUTE MAXIMUM RATINGS
(Operation beyond the limits set forth in this table may impair the useful life of the device. Unless otherwise noted these limits are over the operating free-air temperature range.)
SYMBOL
V
CC
V
IN
I
IN
V
OUT
I
OUT
T
amb
T
stg
Supply voltage –0.5 to +7.0 V Input voltage –0.5 to +7.0 V Input current –30 to +5 mA Voltage applied to output in High output state –0.5 to V Current applied to output in Low output state 40 mA Operating free-air temperature range 0 to +70 °C Storage temperature range –65 to +150 °C
PARAMETER RATING UNIT
Q
D
CP
R
D
10
Q3
Q
D
CP
R
D
12
Q4
D
CC
CP
R
Q
D
15
Q5
SF00192
V
RECOMMENDED OPERATING CONDITIONS
V
CC
V
IH
V
IL
I
IK
I
OH
I
OL
T
amb
October 7, 1988
Supply voltage 4.5 5.0 5.5 V High-level input voltage 2.0 V Low-level input voltage 0.8 V Input clamp current –18 mA High-level output current –1 mA Low-level output current 20 mA Operating free-air temperature range 0 +70 °C
LIMITS
MIN NOM MAX
3
Page 4
Philips Semiconductors Product specification
1
SYMBOL
PARAMETER
TEST CONDITIONS
1
UNIT
VOHHigh-level output voltage
V
VOLLow-level output voltage
V
74F174Hex D flip-flop
DC ELECTRICAL CHARACTERISTICS
(Over recommended operating free-air temperature range unless otherwise noted.)
LIMITS
MIN TYP
p
p
V
IK
I
I
I
IH
I
IL
I
OS
I
CC
Input clamp voltage VCC = MIN, II = I Input current at maximum input voltage VCC = MAX, VI = 7.0V 100 µA High-level input current VCC = MAX, VI = 2.7V 20 µA Low-level input current VCC = MAX, VI = 0.5V –0.6 mA Short-circuit output current
3
Supply current (total) VCC = MAX, Dn = MR = 4.5V, CP = 35 45 mA
VCC = MIN, VIL = MAX ±10%V VIH = MIN, IOH = MAX ±5%V
CC
VCC = MIN, VIL = MAX ±10%V VIH = MIN, IOL = MAX ±5%V
IK
CC
VCC = MAX –60 –150 mA
CC
CC
2.5
2.7 3.4
NOTES:
1. For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions for the applicable type.
2. All typical values are at V
3. Not more than one output should be shorted at a time. For testing I
= 5V, T
CC
techniques are preferable in order to minimize internal heating and more accurately reflect operational values. Otherwise, prolonged shorting
amb
= 25°C.
, the use of high-speed test apparatus and/or sample-and-hold
OS
of a High output may raise the chip temperature well above normal and thereby cause invalid readings in other parameter tests. In any sequence of parameter tests, I
tests should be performed last.
OS
2
MAX
0.30 0.50
0.30 0.50
–0.73 –1.2 V
AC ELECTRICAL CHARACTERISTICS
LIMITS
SYMBOL PARAMETER
TEST
CONDITION
VCC = +5.0V
T
= +25°C
amb
C
= 50pF, RL = 500
L
VCC = +5.0V ± 10%
T
= 0°C to +70°C
amb
C
= 50pF, RL = 500
L
MIN TYP MAX MIN MAX
f
MAX
t
PLH
t
PHL
t
PHL
Maximum clock frequency Waveform 1 80 100 80 MHz
Propagation delay CP to Qn
Waveform 1
3.5
4.5
5.5
6.0
8.0
10.0
3.5
4.5
9.0
11.0
Propagation delay MR to Qn Waveform 2 5.0 8.5 14.0 5.0 15.0 ns
AC SETUP REQUIREMENTS
LIMITS
SYMBOL PARAMETER
TEST
CONDITION
VCC = +5.0V
T
= +25°C
amb
C
= 50pF, RL = 500
L
MIN TYP MAX MIN MAX
tS(H) tS(L)
th(H) th(L)
tw(H) tw(L)
Setup time, High or Low Dn to CP
Hold time, High or Low Dn to CP
CP Pulse width, High or Low
Waveform 3
Waveform 3
Waveform 1
4.0
4.0
0.0
0.0
4.0
6.0 tw(L) MR Pulse width, Low Waveform 2 5.0 5.0 ns t
REC
Recovery time, MR to CP W aveform 2 5.0 5.0 ns
VCC = +5.0V ± 10%
T
= 0°C to +70°C
amb
C
= 50pF, RL = 500
L
4.0
4.0
0.0
0.0
4.0
6.0
UNIT
ns
UNIT
ns
ns
ns
October 7, 1988
4
Page 5
Philips Semiconductors Product specification
74F174Hex D flip-flop
AC WAVEFORMS
For all waveforms, VM = 1.5V. The shaded areas indicate when the input is permitted to change for predictable output performance.
1/f
MAX
tw(L)
CP
Qn
V
M
tw(H)
t
PHL
V
M
t
PLH
V
M
V
M
SF00166
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock Frequency
Dn
CP
V
V
M
M
th(H)ts(H)
V
M
V
V
M
M
th(L)ts(L)
V
M
Waveform 3. Data Setup and Hold Times
SF00191
MR
CP
Qn
V
M
tw(L)
t
PHL
V
M
V
M
t
REC
V
M
Waveform 2. Master Reset Pulse Width, Master Reset to
Output Delay and Master Reset to Clock recovery Time
TEST CIRCUIT AND WAVEFORMS
V
CC
V
PULSE
GENERATOR
IN
R
T
Test Circuit for Totem-Pole Outputs
D.U.T.
V
OUT
R
C
L
L
SF00158
NEGATIVE PULSE
POSITIVE PULSE
90%
10%
t
w
TLH (tr
THL (tf
10%
)
)
90%
V
M
V
M
V
M
10%
t
V
90%
M
THL (tf
t
TLH (tr
)
)
t
t
t
w
90%
10%
AMP (V)
0V
AMP (V)
0V
DEFINITIONS:
= Load resistor;
R
L
see AC ELECTRICAL CHARACTERISTICS for value.
C
= Load capacitance includes jig and probe capacitance;
L
see AC ELECTRICAL CHARACTERISTICS for value.
= Termination resistance should be equal to Z
R
T
pulse generators.
October 7, 1988
OUT
of
family
74F
5
Input Pulse Definition
INPUT PULSE REQUIREMENTS
V
amplitude
3.0V 1.5V
rep. rate
M
1MHz 500ns
t
w
t
TLHtTHL
2.5ns 2.5ns
SF00006
Page 6
Philips Semiconductors Product specification
74F174Hex D flip-flops
DIP16: plastic dual in-line package; 16 leads (300 mil) SOT38-4
1988 Oct 07
6
Page 7
Philips Semiconductors Product specification
74F174Hex D flip-flops
SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
1988 Oct 07
7
Page 8
Philips Semiconductors Product specification
74F174Hex D flip-flops
Data sheet status
Data sheet status
Objective specification
Preliminary specification
Product specification
Product status
Development
Qualification
Production
Definition
This data sheet contains the design target or goal specifications for product development. Specification may change in any manner without notice.
This data sheet contains preliminary data, and supplementary data will be published at a later date. Philips Semiconductors reserves the right to make chages at any time without notice in order to improve design and supply the best possible product.
This data sheet contains final specifications. Philips Semiconductors reserves the right to make changes at any time without notice in order to improve design and supply the best possible product.
[1]
[1] Please consult the most recently issued datasheet before initiating or completing a design.
Definitions
Short-form specification — The data in a short-form specification is extracted from a full data sheet with the same type number and title. For
detailed information see the relevant data sheet or data handbook. Limiting values definition — Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one
or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information — Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.
Disclaimers
Life support — These products are not designed for use in life support appliances, devices or systems where malfunction of these products can
reasonably be expected to result in personal injury . Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application.
Right to make changes — Philips Semiconductors reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no license or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.
Philips Semiconductors 811 East Arques Avenue P.O. Box 3409 Sunnyvale, California 94088–3409 Telephone 800-234-7381
Copyright Philips Electronics North America Corporation 1998
All rights reserved. Printed in U.S.A.
print code Date of release: 10-98 Document order number: 9397-750-05089
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